Battery monitoring system

Abstract

The objective is to provide a battery monitoring system that enables early detection of thermal runaway in battery cells. [Solution] The battery monitoring system comprises a tape-shaped abnormality detection member having a signal line, arranged along the pressure relief valve of one or more battery cell bodies, and a processor connected to the abnormality detection member. The abnormality detection member is configured such that the signal line is disconnected or short-circuited in response to high-temperature gas from the pressure relief valve. The processor detects high-temperature gas from the pressure relief valve of the battery cell body by analyzing a pulse signal generated by a pulse circuit and sent to the signal line, and a signal received through the signal line.

Description

Technical Field

[0001] The disclosed technology relates to a battery monitoring system that enables early detection of thermal runaway of battery cells.

Background Art

[0002] Early detection of abnormalities when an abnormality occurs in a battery pack is required by electric vehicle manufacturers. Battery cells are likely to be in a dangerous state in various forms, including overcharging, undercharging, physical damage, etc. Such a state may lead to a short circuit of one or more cells, and when this occurs, the temperature and pressure inside the cells increase. When the temperature and pressure increase, it becomes a dangerous state, and there is a risk of the battery cell catching fire and / or exploding.

[0003] Patent Document 1 discloses a technique for detecting an abnormality in a battery by detecting gas released by a battery cell during thermal runaway using a gas sensor.

[0004] According to Patent Document 2, in a battery pack having at least one battery cell, the at least one battery cell expands or contracts according to the chemical state of the battery cell. A substrate having a first portion is configured to contact the first portion of the battery cell. A sensor is attached to the substrate and generates a signal representing the displacement of the substrate. A control device is communicably connected to the sensor, receives a signal from the sensor, and processes this signal to generate a notification of the state of the battery cell.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0006] Patent Document 1 achieves thermal runaway abnormality detection by detecting off-gases that may be released from the battery pack. However, detecting off-gases presents a challenge because it requires complex preparations, such as identifying or pre-sealing substances released from the battery in response to thermal runaway, and configuring a sensor threshold to respond to the concentration of substances achieved in the event that should be considered abnormal.

[0007] Patent Document 2 describes a method for detecting abnormalities in battery cells by measuring the amount of displacement, based on the assumption that abnormalities in battery cells occur when they expand or contract. However, this technique requires the placement of a sensor in contact with the battery cell, which presents difficulties in both sensor installation and sensor replacement.

[0008] This invention was made in view of the above-mentioned technical problems, and aims to provide a battery monitoring system that enables early detection of thermal runaway in battery cells. [Means for solving the problem]

[0009] The disclosed technology relates to a battery monitoring system that enables early detection of thermal runaway in battery cells. The battery monitoring system comprises a tape-shaped anomaly detection member having a signal line, arranged along the pressure relief valve of one or more battery cell bodies, and a processor connected to the anomaly detection member. The anomaly detection member is configured such that the signal line is disconnected or short-circuited in response to hot gas from the pressure relief valve. The processor detects hot gas from the pressure relief valve of the battery cell body by analyzing a pulse signal generated by a pulse circuit and sent to the signal line, and a signal received through the signal line.

[0010] This configuration makes it possible to detect thermal runaway in battery cells early using inexpensive anomaly detection components.

[0011] The disclosed technology further comprises a first processor and a second processor, the first and second processors analyzing the transmitted signal and the received signal using different logics.

[0012] This configuration meets the requirements for a given level of functional safety and further expands the scope of application of the disclosed battery monitoring system. [Effects of the Invention]

[0013] The battery monitoring system, which applies the disclosed technology, enables early detection of thermal runaway in battery cells. [Brief explanation of the drawing]

[0014] [Figure 1] This is a schematic diagram of a battery monitoring system that applies the disclosed technology. [Figure 2] This is a schematic diagram illustrating the application of an anomaly detection component to a battery. [Figure 3] This is a schematic diagram of the processing rules for the signal analysis program. [Figure 4] This is the first example of anomaly detection using a signal analysis program. [Figure 5] This is a second example of anomaly detection using a signal analysis program. [Figure 6] This is a third example of anomaly detection using a signal analysis program. [Modes for carrying out the invention]

[0015] Embodiments of this disclosure will be described below with reference to the drawings. In each drawing, the same or corresponding parts are denoted by the same reference numerals, and their descriptions are simplified or omitted.

[0016] The battery monitoring system in this embodiment will be described. A schematic diagram of a battery monitoring system to which the technology disclosed in FIG. 1 is applied is shown. The battery monitoring system 1 includes an abnormality detection member 100, a processor A 201, a processor B 202, and a pulse circuit 203. In addition, there are also a pulse circuit 203, a power supply circuit for operating the processor A 201 and the processor B 202, etc., but they will not be specifically described. Each will be described in detail below.

[0017] <Abnormality detection member> The abnormality detection member 100 typically has a film-like or sheet-like shape. For example, it is an FPC (Flexible printed circuits) cable or the like. The abnormality detection member 100 can also take various outer shapes such as a cable shape or a rod shape. The abnormality detection member 100 has signal lines 101 and 102 which are conductors inside, with a film or the like functioning as an insulator.

[0018] The signal lines 101 and 102 can conduct electrical signals. The signal lines 101 and 102 are incorporated into the abnormality detection member 100 in parallel at a close interval (for example, several millimeters or less). As long as there is insulation in the abnormality detection member 100, insulation between the signal line 101 and the signal line 102 is maintained. Both ends of the signal line 101 are connected to the terminal 103a and the terminal 103d. Also, both ends of the signal line 102 are connected to the terminal 103b and the terminal 103c. The terminals 103a to 103d are provided on the abnormality detection member 100, and through them, an external signal processing unit or the like can input and output electrical signals to the signal lines 101 and 102. <(

[0019] <Regarding the installation of the abnormality detection member><00^00094>The installation position of the abnormality detection member 100 will be described. The abnormality detection member 100 is installed near the pressure release valve of the battery pack. As shown in FIG. 2(a), usually, a battery pack is constituted by arranging a plurality of battery cells 300 in an array. The abnormality detection member 100 is arranged along the pressure release valves 301 arranged in a row as shown in FIG. 2(b). By arranging the abnormality detection member 100 in this way, abnormalities of a plurality of battery cells 300 can be efficiently detected.

[0020] The size of the gap between the pressure release valve 301 and the abnormality detection member 100 is appropriately set based on the relationship between the assumed temperature of the high-temperature gas discharged from the pressure release valve 301 and the temperature at which the abnormality detection member 100 can undergo a shape change, so that the characteristics of the abnormality detection member 100 that respond to the high-temperature gas can be exhibited as expected. <Regarding the characteristics of the abnormality detection member>

[0021] The characteristics of the abnormality detection member 100 will be described. In terms of design, the abnormality detection member 100 is configured such that the signal lines are disconnected or short-circuited in response to high-temperature gas. It is desirable that the material of the abnormality detection member 100 be selected so that its melting point is lower than the temperature of the high-temperature gas released during an abnormality in the battery pack. In addition, it is desirable that the signal lines 101 and 102 be made of a metal with a relatively low melting point or be thin films or thin wires so that they can be disconnected in response to high-temperature gas.

[0022] By combining the abnormality detection member 100 with signal processing, disconnection or short-circuit of the signal lines 101 and 102 is detected, and thereby an abnormality in the battery cell 300 is detected. Next, the signal processing will be described in detail. [[ID= 14]]

[0023] <Pulse generation circuit> The pulse generation circuit 203 synchronizes with the pulse clock of the processor A201 and generates a pulse signal and its inverted pulse signal. The pulse signal and the inverted pulse signal are typically rectangular waves. The pulse clock, the pulse signal, and the inverted pulse signal are continuous signals that are treated as 0 and 1 at the input 2 of the processor A201 and the processor B202. That is, when the pulse clock indicates 1, the pulse signal also outputs 1. The pulse signal is output to output circuit 1. Output circuit 1 is connected to terminal 103a, GPIO1 of processor A201, and GPIO1 of processor B202. The inverted pulse signal is output to output circuit 2. Output circuit 2 is connected to terminal 103b, GPIO2 of processor A201, and GPIO2 of processor B202.

[0024] <Processor> Processors A201 and B202 are described below. Processors A201 and B202 may be processors provided in the battery management system (BMS) of the battery cell 300, or other processors may be used. Processors A201 and B202 each have multiple GPIOs (General Purpose IOs). Processors A201 and B202, on the other hand, have four GPIOs, which are defined as GPIO1, GPIO2, GPIO3, and GPIO4, respectively.

[0025] GPIO1 and GPIO2 are connected to the aforementioned output 1 circuit and output 2 circuit, respectively, and receive pulse signals and inverted pulse signals. GPIO3 and GPIO4 are connected to input 1 circuit and input 2 circuit, respectively. Input 1 circuit is connected to terminal 103c of the anomaly detection member 100. Input 2 circuit is connected to terminal 103d of the anomaly detection member 100. Input 1 circuit and input 2 circuit obtain pulse signals and inverted pulse signals, respectively, through signal lines 101 and 102.

[0026] Processor A201 also has GPIO5 for outputting a pulse clock. Processor A201 executes a program to generate a pulse clock, producing a continuous repetition of 0s and 1s, which is output from GPIO5 and input to the pulse generation circuit 203. Hereafter, this will also be referred to as "output 1" to mean "the signal obtained through the output 1 circuit." The same applies to output 2, input 1, and input 2.

[0027] <Signal Analysis Program> This section describes signal analysis programs P1 and P2. Processors A201 and B202 execute signal analysis programs P1 and P2, respectively. First, the processing of signal analysis program P1 is explained. Signal analysis program P1 detects abnormalities by applying processing rules to numerical values ​​obtained by assigning pulses from output 1, output 2, input 2, and input 1, obtained through each GPIO of processor A201, to registers R1 and R2 based on bit assignment rules. It goes without saying that processing rules can also be constructed using the main memory area instead of registers.

[0028] The bit assignment rule applied is as follows, as explained in Figure 3(a): the third bit of register R1 is assigned output 2 and the fourth bit is assigned output 1; the third bit of register R2 is assigned input 2 and the fourth bit is assigned input 1. In both registers, the first and second bits are fixed at 0. The processing rule is to determine whether the values ​​of registers R1 and R2 are the same; if they are the same, it is considered normal; otherwise, it is considered abnormal. For example, if signal line 101 is disconnected, the pulse for output 1 will not be transmitted to input 1, resulting in a mismatch between the values ​​of registers R1 and R2.

[0029] Next, the processing of the signal analysis program P2 will be explained. The signal analysis program P2 detects abnormalities by applying processing rules to numerical values ​​obtained by assigning the pulses of output 1, output 2, input 2, and input 1 obtained through each GPIO of the processor B202 to registers R1 and R2 based on bit assignment rules.

[0030] The bit assignment rule applied is as follows: when the pulse clock is 0, the bit assignment is made to register R1; when the pulse clock is 1, the bit assignment is made to register R2. Specifically, in both bit assignments, the first bit is assigned input 2 OR input 1, the second bit is assigned input 1 OR output 2, the third bit is assigned output 2 OR output 1, and the fourth bit is assigned output 1. Here, OR is a bit operator. This is equivalent to left-shifting the bit sequences of input 2, input 1, output 2, and output 1 and adding them together without considering the carry over from the original value. The processing rule is that the operation is normal when register R1 = 0xE (hexadecimal representation) and register R2 = 0xF; otherwise, it is abnormal. Note that during the first clock cycle in which the signal analysis program P2 is running, the values ​​of register R1 or register R2 will not yet be set, i.e., they will be 0x0 (or the value of the register's reset state), and according to the processing rules, an abnormality will be detected. However, this is illogical, so for example, the signal analysis program P2 may be configured not to perform an abnormality detection during the first clock cycle.

[0031] With this configuration, processors A201 and B202 can detect open circuits or short circuits in signal lines 101 and 102 by processing the signals received from the GPIO with signal analysis programs P1 and P2, respectively.

[0032] <Regarding improved robustness> In the battery monitoring system 1, robustness is improved and anomaly detection capabilities are enhanced by using two processors, each executing a different signal analysis program, and making judgments based on different processing rules (algorithms). In other words, the battery monitoring system 1 may consider the monitored battery pack to be abnormal if at least one of the signal analysis programs P1 or P2 determines that it is abnormal.

[0033] <Example of anomaly detection processing: When no anomaly has occurred> Next, an example of the above execution is shown. Figure 4 shows an example of a case that is determined to be normal. In the processing result of the signal analysis program P1 shown in Figure 4(a), when neither signal line 101 nor signal line 102 is open or short-circuited, the values ​​of register R1 and register R2 are the same because inputs 1 and 2 and outputs 1 and 2 are the same, and it is determined to be normal based on the processing rule. Figure 4(a) illustrates the determination at the moment when pulse clock = output 1 = 0, but at the moment when pulse clock = output 1 = 1, register R1 = register R2 = 1, and it is similarly determined to be normal.

[0034] Furthermore, in the processing result of the signal analysis program P2 shown in Figure 4(b), register R1 = 0xE and register R2 = 0xF, so it is determined to be normal. As described above, it can be seen that when there are no abnormalities in at least signal line 101 and signal line 102, both signal analysis programs will determine that it is normal.

[0035] <Example of anomaly detection processing: When signal line 101 is disconnected> Next, we will show an example of execution assuming an abnormality. Assume that signal line 101 is disconnected due to a battery pack malfunction. In this case, the pulse from output 1 does not reach input 1. In the processing result of signal analysis program P1 shown in Figure 4(a), when the pulse clock is 1, R1≠R2, and it is determined to be abnormal. Also, in the processing result of signal analysis program P2 shown in Figure 4(b), R1=0xE but R2=3, so the condition R2=0xF is no longer met, and it is determined to be abnormal. As shown above, it can be seen that if signal line 101 is disconnected, it will be determined to be abnormal in both signal analysis programs.

[0036] <Example of anomaly detection processing: When signal line 101 and signal line 102 are short-circuited> Next, we will show an example of execution assuming other abnormalities. Suppose that signal lines 101 and 102 are short-circuited due to a battery pack malfunction. In this case, both the pulse of output 1 and the pulse of output 2 will stick to 0. In the processing result of signal analysis program P1 shown in Figure 4(a), R1=R2, and it is determined to be normal. Also, in the processing result of signal analysis program P2 shown in Figure 4(b), R1≠0xE and R2≠0xF, and it is determined to be abnormal. In this example, only signal analysis program P2 is able to correctly detect the abnormality. The battery monitoring system 1 can detect a battery pack malfunction by considering the monitored battery pack to be abnormal when at least one of the signal analysis programs P1 or P2 determines that there is an abnormality.

[0037] (modified version) The embodiments described above are merely examples, and this disclosure may be modified as appropriate without departing from its essence. For example, the processes and means described in this disclosure can be freely combined and implemented, as long as no technical inconsistencies arise. Furthermore, a process described as being performed by a single device may be divided and executed by multiple devices. Conversely, a process described as being performed by different devices may be executed by a single device. In a computer system, the hardware configuration (server configuration) by which each function is implemented can be flexibly changed. The present disclosure can also be realized by supplying a computer program implementing the functions described in the embodiments above to a computer, and having one or more processors in the computer read and execute the program. Such a computer program may be provided to the computer by a non-temporary computer-readable storage medium that can be connected to the computer's system bus, or it may be provided to the computer via a network. Non-temporary computer-readable storage mediums include, for example, any type of disk such as magnetic disks (floppy disks, hard disk drives (HDDs), etc.), optical disks (CD-ROMs, DVDs, Blu-ray discs, etc.), read-only memory (ROM), random access memory (RAM), EPROM, EEPROM, magnetic cards, flash memory, optical cards, and any type of medium suitable for storing electronic instructions. [Explanation of Symbols]

[0038] 1. Battery monitoring system 100 Anomaly detection component 101 signal line 102 signal line 103a terminal 103b terminal 103c terminal 103d terminal 201 Processor A 202 Processor B 203 Pulse Circuit 300 battery cells 301 Pressure relief valve

Claims

1. A tape-shaped abnormality detection member having a signal line is arranged along the pressure release valve of one or more battery cell bodies, A processor connected to the anomaly detection member, A battery monitoring system comprising: The abnormality detection member is configured such that the signal line is disconnected or short-circuited in response to the high-temperature gas from the pressure relief valve. The aforementioned processor, By analyzing the pulse signal generated by the pulse circuit and sent to the signal line, and the signal received via the signal line, the high-temperature gas from the pressure release valve of the battery cell body is detected. Battery monitoring system.

2. The battery monitoring system has a first processor and a second processor as the processor, The first processor and the second processor analyze the transmitted signal and the received signal using different algorithms. The battery monitoring system according to claim 1.

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