AC / DC conversion circuit

JP2026137640APending Publication Date: 2026-08-27ROHM CO LTD
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Patent Information

Application Number
JP2025176787
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-02-17
Filing Date
2025-10-20
Publication Date
2026-08-27

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Abstract

This suppresses conducted interference waves in voltage clamper-type AC / DC conversion circuits. [Solution] The AC / DC conversion circuit includes a rectifier circuit that full-wave rectifies the input AC voltage and outputs the rectified voltage, a capacitor that smooths the rectified voltage, a switch that turns on and off according to a drive signal, connecting the rectifier circuit and the capacitor when it is in the ON state and disconnecting the rectifier circuit and the capacitor when it is in the OFF state, a driver that outputs a drive signal, and a control circuit that controls the driver. The control circuit controls the driver so that the switch turns ON when the level of the rectified voltage falls below a predetermined clamp voltage level, and turns OFF before the level of the rectified voltage rises above the clamp voltage level.
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Description

[Technical Field]

[0001] The disclosed technology relates to AC / DC conversion circuits. [Background technology]

[0002] The following technologies are known regarding voltage clamper type AC / DC conversion circuits. Non-patent document 1 describes an input active clamp circuit in which an FET switch is provided between a diode bridge and an input capacitor.

[0003] Patent Document 2 describes an overvoltage protection circuit connected between a rectifier circuit and a load having an input capacitor. The overvoltage protection circuit comprises a semiconductor switch connected between the rectifier circuit and the load, and a control circuit that controls the on or off of the semiconductor switch. The control circuit turns off the semiconductor switch when the rectified voltage exceeds a predetermined value, while generating a control voltage to turn on the semiconductor switch during a period when the potential difference across the semiconductor switch is zero or a predetermined small value. The overvoltage protection circuit includes a current changing circuit that gradually changes the current flowing through the semiconductor switch so that the conducted interference wave voltage in the output voltage output from the overvoltage protection circuit is less than or equal to a predetermined value when the semiconductor switch is turned off and when it is turned on. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2019-30179 [Non-patent literature]

[0005] [Non-Patent Document 1] HCA-23-023 Optimization study of input active clamp circuit for low-power AC / DC converter

[0006] [overview] A voltage clamper type AC / DC converter circuit includes a rectifier circuit that full-wave rectifies an AC voltage and outputs a rectified voltage, a capacitor that smooths the rectified voltage, and a switch that controls the level of the smoothed rectified voltage so that it does not exceed a predetermined clamp voltage.

[0007] In voltage clamper type AC / DC conversion circuits, a surge voltage is generated when the switch transitions to the off state, and this surge voltage can induce conducted interference waves. Patent document 1 (Japanese Patent Application Publication No. 2019-30179) describes a method of gradually changing the current flowing through a semiconductor switch using a low-pass filter including a resistive element and a capacitor in order to suppress conducted interference wave voltage. However, since the means for suppressing conducted interference wave voltage is implemented by hardware, it becomes difficult to flexibly adjust it for optimization.

[0008] Furthermore, in voltage clamper-type AC / DC conversion circuits, relatively large ripple can occur in the output voltage (smoothed rectified voltage). Since ripple results in fluctuations in the input voltage in subsequent systems, large ripple makes it difficult to design the subsequent systems. One way to suppress ripple is to increase the capacitance of the smoothing capacitor, but this comes with disadvantages such as increased cost and larger device size.

[0009] The disclosed technology suppresses conducted interference waves in a voltage clamper type AC / DC conversion circuit. The purpose is to suppress ripple in the output voltage.

[0010] The AC / DC conversion circuit relating to the disclosed technology includes a rectifier circuit that full-wave rectifies an input AC voltage and outputs a rectified voltage, a capacitor that smooths the rectified voltage, a switch that turns on and off in response to a drive signal, connecting the rectifier circuit and the capacitor when it is in the ON state and disconnecting the rectifier circuit and the capacitor when it is in the OFF state, a driver that outputs the drive signal, and a control circuit that controls the driver. The control circuit controls the driver such that the switch turns ON when the level of the rectified voltage falls below a predetermined clamp voltage level, and turns OFF before the level of the rectified voltage rises above the clamp voltage level. [Brief explanation of the drawing]

[0011] [Figure 1] Figure 1 shows an example of the configuration of an AC / DC conversion circuit according to an embodiment of the disclosed technology. [Figure 2A] Figure 2A is a circuit block diagram showing an example of the configuration of a control circuit according to an embodiment of the disclosed technology. [Figure 2B] Figure 2B is a circuit block diagram showing another example of the configuration of a control circuit according to an embodiment of the disclosed technology. [Figure 2C] Figure 2C is a circuit block diagram showing another example of the configuration of a control circuit according to an embodiment of the disclosed technology. [Figure 2D] Figure 2D is a circuit block diagram showing another example of the configuration of a control circuit according to an embodiment of the disclosed technology. [Figure 3] Figure 3 is a timing chart showing an example of the operation of an AC / DC conversion circuit in a comparative example. [Figure 4A] Figure 4A shows the measured waveform when switch control is performed according to the comparative example. [Figure 4B] Figure 4B shows the analysis results of the frequency spectrum of the drain-source voltage when the switch control according to the comparative example is performed. [Figure 5] Figure 5 is a timing chart showing an example of the operation of an AC / DC conversion circuit according to an embodiment of the disclosed technology. [Figure 6] Figure 6 is a timing chart showing an example of the operation of an AC / DC converter circuit according to another embodiment of the disclosed technology. [Figure 7] Figure 7 shows an example of the configuration of an AC / DC conversion circuit according to another embodiment of the disclosed technology. [Figure 8A] Figure 8A is a circuit block diagram showing an example of the configuration of a control circuit according to an embodiment of the disclosed technology. [Figure 8B] Figure 8B is a circuit block diagram showing an example of the configuration of a control circuit according to an embodiment of the disclosed technology. [Figure 9] Figure 9 is a timing chart showing an example of the operation of an AC / DC converter circuit according to another embodiment of the disclosed technology. [Figure 10A] Figure 10A shows the measured waveform when switch control is performed according to another embodiment of the disclosed technology. [Figure 10B] Figure 10B shows the results of an analysis of the frequency spectrum of the drain-source voltage when switch control is performed according to another embodiment of the disclosed technology. [Figure 11] Figure 11 shows an example of the configuration of an AC / DC conversion circuit according to a modified example. [Figure 12] Figure 12 is a timing chart showing an example of the operation of an AC / DC converter circuit according to another embodiment of the disclosed technology. [Figure 13] Figure 13 is a timing chart showing an example of the operation of an AC / DC converter circuit according to another embodiment of the disclosed technology. [Figure 14] Figure 14 shows an example of the configuration of another AC / DC conversion circuit of the disclosed technology. [Figure 15] Figure 15 shows an example of the configuration of another AC / DC conversion circuit of the disclosed technology. [Figure 16] Figure 16 shows an example of the operating waveform of an AC / DC converter circuit according to another embodiment of the disclosed technology. [Figure 17]Figure 17 shows an example of the operating waveform of an AC / DC converter circuit according to another embodiment of the disclosed technology. [Detailed Description] Embodiments of the disclosed technology will be described below with reference to the drawings. In each drawing, substantially identical or equivalent components or parts are given the same reference numerals.

[0012] [First Embodiment] Figure 1 shows an example of the configuration of an AC / DC conversion circuit 10 according to an embodiment of the disclosed technology. The AC / DC conversion circuit 10 is a voltage clamper type AC / DC conversion circuit, and the level of the DC voltage obtained by full-wave rectifying and smoothing the AC voltage is clamped by a predetermined clamp voltage V clamp It has a function to reduce the output level to a certain level. The AC / DC conversion circuit 10 includes a rectifier circuit 11, a rectified voltage monitor circuit 12, a switch 13, a driver 14, a control circuit 15, and a capacitor 16.

[0013] The rectifier circuit 11 full-wave rectifies the AC voltage supplied from the AC power supply 30, and the rectified voltage |V AC It outputs |. The rectifier circuit 11 is composed of, for example, a diode bridge circuit including multiple diodes. One output terminal of the rectifier circuit 11 is connected to one terminal of the switch 13, and the other output terminal is connected to the ground line.

[0014] Switch 13 is composed of an n-channel MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). The MOSFET's drain is connected to the rectifier circuit 11, its source is connected to the load 40, and its gate is connected to the driver 14. Switch 13 receives a drive signal V supplied from the driver 14. G It turns on and off accordingly. When switch 13 is in the ON state, the rectifier circuit 11 and capacitor 16 are connected. When switch 13 is in the OFF state, the rectifier circuit 11 and capacitor 16 are disconnected.

[0015] The capacitor 16 has one end connected to the source of the MOSFET constituting the switch 13 and the other end connected to the ground line. The capacitor 16 smooths the rectified voltage |V AC | output from the rectifier circuit 11. The smoothed rectified voltage is supplied to the load 40 as a DC output voltage V out . When the switch 13 intermittently turns on, the level of the output voltage V out is limited.

[0016] Based on the control signal V cnt supplied from the control circuit 15, the driver 14 outputs a drive signal V G for driving the switch 13. The drive signal V G is input to the gate of the MOSFET constituting the switch 13.

[0017] The rectified voltage monitor circuit 12 is a circuit for monitoring the rectified voltage |V AC | output from the rectifier circuit 11 in the control circuit 15. The rectified voltage monitor circuit 12 includes diodes 21, 22 and resistor elements 23, 24. The anode of the diode 21 is connected to one of the input lines of the AC voltage, and the anode of the diode 22 is connected to the other input line of the AC voltage. The cathodes of the diodes 21, 22 are connected to one end of the resistor element 23. The other end of the resistor element 23 is connected to one end of the resistor element 24, and the other end of the resistor element 24 is connected to the ground line. The rectified voltage monitor circuit 12 outputs a monitor voltage V AC obtained by dividing the same voltage as the rectified voltage |V m1 by the resistor elements 23, 24 from the connection point of the resistor element 23 and the resistor element 24. The monitor voltage V m1 is supplied to the control circuit 15.

[0018] Based on the monitor voltage V m1 , the control circuit 15 outputs a control signal V cnt for controlling the driver 14. More specifically, the control circuit 15 determines that when the level of the rectified voltage |V AC | is the clamp voltage V clampWhen the level drops below |V|, switch 13 turns on, and the rectified voltage |V| is turned on. AC | Level is clamp voltage V clamp The driver 14 is controlled so that switch 13 switches to the off state (turns off) before the clamp voltage V rises above this level. clamp The output voltage V out This is the voltage that defines the level and is set in advance.

[0019] Figure 2A is a circuit block diagram showing an example of the configuration of the control circuit 15. The control circuit 15 includes an analog-to-digital converter (ADC) 51, a CPU (Central Processing Unit) 52, and It has a Mori 53 and an I / O circuit 54. The analog-to-digital converter 51 receives a monitor voltage V supplied from the rectified voltage monitor circuit 12. m1 It converts the value to a digital value. Memory 53 is work memory for the CPU 52 to execute processing according to the program.

[0020] CPU52 monitors the voltage V, which has been converted to a digital value. m1 Rectified voltage |V AC Monitor the level of |. CPU52 monitors the voltage V m1 The on and off timings of switch 13 are determined based on this. The CPU 52 gives commands to the I / O circuit 54 specifying the on and off timings of switch 13. The I / O circuit 54 generates a control signal V, which is a pulse signal, based on the commands from the CPU 52. cnt Outputs.

[0021] Figure 2B is a circuit block diagram showing another example of the configuration of the control circuit 15. The control circuit 15 may have a PWM circuit 55 instead of the I / O circuit 54 shown in Figure 2A. The PWM circuit 55 receives a control signal V, which is a pulse signal of a predetermined pulse width, based on a command from the CPU 52. cnt Outputs.

[0022] Figure 2C is a circuit block diagram showing another example of the configuration of the control circuit 15. The control circuit 15 may have a comparator 56 instead of the analog-to-digital converter 51 shown in Figure 2A. The comparator 56 monitors the voltage V m1 Level and reference voltage V ref Outputs the comparison result with the level of the reference voltage V. ref The level is the same as the voltage division ratio by resistors 23 and 24, with a clamp voltage V clamp The voltage level is set to the voltage obtained by dividing the voltage. That is, the output signal of comparator 56 is the rectified voltage |V AC | Level and clamp voltage V clamp The comparison results with the level are shown. The CPU 52 determines the on-timing and off-timing of the switch 13 based on the output signal of the comparator 56.

[0023] Figure 2D is a circuit block diagram showing another example of the configuration of the control circuit 15. The control circuit 15 may have a PWM circuit 55 instead of the I / O circuit 54 shown in Figure 2C. The PWM circuit 55 receives a control signal V, which is a pulse signal of a predetermined pulse width, based on a command from the CPU 52. cnt Outputs.

[0024] Here, Figure 3 is a timing chart showing an example of the operation of an AC / DC conversion circuit according to a comparative example. The AC / DC conversion circuit according to the comparative example differs from the switch control by the control circuit 15 in terms of the switch control method of the disclosed technology.

[0025] The control circuit 15 in the comparative example has a rectified voltage |V AC |Level, Output voltage V out When the level drops below |V|, switch 13 turns ON, and the rectified voltage |V| is turned ON. AC | Level is clamp voltage V clamp The driver 14 is controlled so that when the level becomes higher than a certain level, switch 13 switches to the off state.

[0026] The driver 14 receives a drive signal V based on the control of the control circuit 15. GIt generates and supplies this to switch 13. Switch 13 receives the drive signal V G Therefore, the rectified voltage |V AC |Level, Output voltage V out It switches to the ON state when the level falls below |V|, rectified voltage |V| AC | Level is clamp voltage V clamp It operates to switch to the off state when the level becomes higher than |V|. This allows the switch 13 to switch on and off, respectively, based on the rectified voltage |V|. AC This is performed during the period when the | level is rising. Hereafter, this control method will be referred to as "climbing clamp". According to the clamp, when switch 13 transitions to the off state, the drain current I D The drain-source voltage V changes rapidly as a result. DS A surge voltage occurs in this location.

[0027] Figure 4A shows the control voltage V when switch control is performed according to the comparative example. cnt , drive voltage V G , drain current I D and drain-source voltage V DS This is the measured waveform. Figure 4A shows the drain current I when switch 13 transitions to the off state. D The rapid change in the drain-source voltage V DS The image shows a surge voltage occurring.

[0028] Figure 4B shows the drain-source voltage V when the switch control according to the comparative example is performed. DS This figure shows the results of the frequency spectrum analysis. Drain-source voltage V DS A significant peak was observed around 20 kHz in the frequency spectrum. This is caused by surge voltage and can become a conducted interference wave, so it is preferable to suppress it.

[0029] On the other hand, Figure 5 is a timing chart showing an example of the operation of the AC / DC conversion circuit 10 according to an embodiment of the disclosed technology. Figure 5 shows the rectified voltage |V AC |, clamp voltage V clamp Output voltage V out , drive voltage V G , drain current I D , drain-source voltage V DS The waveform is shown.

[0030] The rectifier circuit 11, for example, full-wave rectifies the AC voltage input via a commercial power outlet, and the rectified voltage |V AC Output.

[0031] The control circuit 15 controls the rectified voltage |V AC | Level is clamp voltage V clamp When the level drops below |V|, switch 13 turns ON, and the rectified voltage |V| is turned ON. AC | Level is clamp voltage V clamp The driver 14 is controlled so that switch 13 switches to the off state before it rises above a certain level.

[0032] The driver 14 receives a drive signal V based on the control of the control circuit 15. G This is generated and supplied to switch 13.

[0033] Switch 13 receives the drive signal V G Therefore, the rectified voltage |V AC | Level is clamp voltage V clamp It switches to the ON state when the level falls below |V|, rectified voltage |V| AC | Level is clamp voltage V clamp It operates to switch to the off state before the level rises above the rectified voltage |V. AC This takes place during a period when the | level is decreasing.

[0034] When switch 13 is turned ON, the drain current I DThis current flows, charging capacitor 16, and the output voltage V out The level increases. When switch 13 is turned off, capacitor 16 is discharged by load 40, and the output voltage V out The level of decreases. Switch 13 is intermittently turned on, causing the output voltage V out The level is the rectified voltage |V AC A clamp voltage V lower than the level along the peak of | (shown as a dashed line in Figure 5) clamp It is suppressed to this level. Drain current I when switch 13 is turned ON. D The drain-source voltage V changes rapidly as a result. DS A surge voltage occurs in this location.

[0035] According to the switch control (see Figure 5) of the first embodiment of the disclosed technology, the transition of switch 13 to the ON state (turn-on) and the transition to the OFF state (turn-off) is controlled by the rectified voltage |V AC This is performed during the period when the level of | is decreasing. Hereinafter, this control method will be referred to as "downward clamping". According to downward clamping, switch 13 transitions to the off state. In the ming, the rectified voltage |V AC Since the level of | has decreased, the drain current I D The current decreases gradually. Therefore, no surge voltage occurs when switch 13 transitions to the off state. On the other hand, when switch 13 transitions to the on state, the drain current I D Although a surge voltage is generated due to a rapid change in the voltage, the rectified voltage |V AC | Drain current I during the period when the level is decreasing DThe change is suppressed by the inductance (cylindrical transformer) of the wire for supplying an AC voltage from the AC power supply 30. That is, according to the switch control according to the embodiment of the disclosed technology, compared with the switch control according to the comparative example (see the climbing clamp in FIG. 4), the change in current when the switch 13 transitions to the on state and when it transitions to the off state becomes gentle. As a result, it becomes possible to suppress the surge voltage generated along with the switching of the switch 13, and it becomes possible to suppress the conducted interference wave. Further, according to the AC / DC conversion circuit 10 according to the present embodiment, since the means for suppressing the conducted interference wave is realized by software, it is possible to flexibly perform adjustment for optimization.

[0036] [Second Embodiment] FIG. 6 is a timing chart showing an example of the operation of the AC / DC conversion circuit 10 according to the second embodiment of the disclosed technology. In the AC / DC conversion circuit 10 according to the second embodiment, the mode of switch control by the control circuit 15 is different from the switch control according to the above-described first embodiment.

[0037] The control circuit 15 according to the second embodiment controls the driver 14 so that the switch 13 transitions to the on state when the level of the rectified voltage |V AC | is lower than the level of the clamp voltage V clamp , and the switch 13 transitions to the off state when the level of the rectified voltage |V AC | is higher than the level of the clamp voltage V clamp .

[0038] The driver 14 generates a drive signal V G according to the control by the control circuit 15 and supplies this to the switch 13. The switch 13 transitions to the on state when the level of the rectified voltage |V G | is lower than the level of the clamp voltage V AC according to the drive signal V clamp , and the level of the rectified voltage |V AC | is higher than the level of the clamp voltage V clampIt switches to the off state when the level becomes higher than the rectified voltage |V. This causes the switch 13 to switch on (turn on) when the rectified voltage |V AC The transition of switch 13 to the off state (turn-off) occurs during the period when the level of | is decreasing, and the rectified voltage |V AC This takes place during a period when the level of | is increasing.

[0039] The rectified voltage |V| is rectified within the period from when switch 13 is turned ON until when it is turned OFF. AC There exists a timing when the level of | is at its minimum (zero), which means that when switch 13 transitions to the ON state, the output voltage V out The rise in the output voltage can be suppressed. That is, according to the AC / DC conversion circuit 10 of the second embodiment of the disclosed technology, the output voltage V out This makes it possible to suppress the ripple that occurs. Alternatively, if suppressing ripple is not required, the capacitance of the smoothing capacitor 16 can be reduced, thereby enabling miniaturization of the device. Furthermore, by reducing the capacitance of the smoothing capacitor 16, the ESR (Equivalent Series Resistance) can be reduced. This reduces the current, making it possible to reduce losses. Furthermore, according to the control configuration of this embodiment, the current is divided, which reduces the peak value of the current, making it possible to suppress conducted interference waves.

[0040] [Third Embodiment] Figure 7 shows an example of the configuration of an AC / DC conversion circuit 10A according to a third embodiment of the disclosed technology. The AC / DC conversion circuit 10A differs from the AC / DC conversion circuit 10 (see Figure 1) according to the first embodiment described above in that it has an output voltage monitor circuit 17.

[0041] The output voltage monitor circuit 17 monitors the output voltage V out This is a circuit for monitoring the output voltage. The output voltage monitor circuit 17 has resistors 25 and 26 connected in parallel with the capacitor 16. The output voltage monitor circuit 17 monitors the output voltage V outThe monitor voltage V obtained by dividing the voltage m2 The output voltage V is generated from the connection point between resistor element 25 and resistor element 26. m2 This is supplied to the control circuit 15. The control circuit 15 monitors the voltage V m1 and V m2 Based on this, a control signal V for controlling the driver 14 is generated. cnt Outputs.

[0042] Figures 8A and 8B are circuit block diagrams showing examples of the configuration of the control circuit 15 according to the third embodiment. The control circuit 15 according to the third embodiment has a rectified voltage |V AC | Monitor voltage V indicating the level m1 and output voltage V out Monitor voltage V, which indicates the level m2 It has a selector 57 for selectively inputting to the analog-to-digital converter 51. The other components of the control circuit 15 are the same as those of the control circuit 15 according to the first embodiment described above, so their description is omitted.

[0043] Figure 9 is a timing chart showing an example of the operation of the AC / DC conversion circuit 10A according to the third embodiment. The control circuit 15 controls the rectified voltage |V AC | level is output voltage V out When the level drops below |V|, switch 13 turns ON, and the rectified voltage |V| is turned ON. AC | Level is clamp voltage V clamp The control circuit 15 controls the driver 14 so that the switch turns off when the level rises above a certain level. The control circuit 15 further controls the driver 14 so that the switch 13 turns on for short periods multiple times in succession immediately after the switch 13 turns off. A short period is a period that is sufficiently shorter than the on period of the switch 13 immediately before the multiple consecutive on periods occur. The on / off timing of the switch 13 according to this embodiment can be set as appropriate by the program of the control circuit 15.

[0044] The driver 14 receives the drive signal V according to the control of the control circuit 15. GIt generates and supplies this to switch 13. Switch 13 receives the drive signal V G Therefore, the rectified voltage |V AC |Level, Output voltage V out It switches to the ON state when the level falls below |V|, rectified voltage |V| AC | Level is clamp voltage V clamp It operates to switch to the OFF state when the level rises above a certain level. Switch 13 also operates to cause multiple short ON states to occur consecutively immediately after the transition to the OFF state.

[0045] According to the switch control in the comparative example described above (see Figure 3), when the switch 13 transitions to the off state, the drain current I D The drain-source voltage V changes rapidly as a result. DS A surge voltage occurs at this point. On the other hand, according to the switch control of this embodiment, the switch 13 operates so that a short ON state occurs multiple times in succession immediately after transitioning to the OFF state. As a result, the drain current I when the switch 13 transitions to the OFF state D The change becomes gradual, and the surge voltage is suppressed.

[0046] Figure 10A shows the control signal V when switch control is performed according to the third embodiment. cnt , drive voltage V G , drain current I D and drain-source voltage V DS This is the measured waveform. Compared with the measured waveform for the comparative example shown in Figure 5A, the drain current I when switch 13 transitions to the off state is shown. D The change is gradual, and surge voltage is suppressed.

[0047] Figure 10B shows the drain-source voltage V when switch control is performed according to the third embodiment. DS This figure shows the results of the frequency spectrum analysis. Compared to the frequency spectrum of the comparative example shown in Figure 5B, the peak around 20 kHz caused by surge voltage is suppressed. In other words, conducted interference waves are suppressed.

[0048] Furthermore, according to the AC / DC conversion circuit 10A of this embodiment, conductive interference voltage is suppressed. Because the means of optimization are implemented through software, it is possible to flexibly adjust the settings for optimization.

[0049] Figure 11 shows an example of the configuration of a modified AC / DC conversion circuit 10B. The AC / DC conversion circuit 10B differs from the AC / DC conversion circuit 10A shown in Figure 7 in that it has a capacitor 18 and a resistor 19. The capacitor 18 is provided between the gate and source of the MOSFET constituting the switch 13. The resistor 19 is provided between the gate of the MOSFET constituting the switch 13 and the driver 14. By connecting the capacitor 18 and the resistor 19 to the MOSFET, the drain current I when the switch 13 transitions to the off state is reduced. D This allows for a further gradual reduction in the rate of change. This, in turn, enhances the effect of suppressing conducted interference waves.

[0050] [Fourth Embodiment] Figure 12 is a timing chart showing an example of the operation of the AC / DC conversion circuit 10 according to the fourth embodiment of the disclosed technology. The AC / DC conversion circuit 10 according to the fourth embodiment differs from the switch control according to the first embodiment in the manner of switch control by the control circuit 15.

[0051] The control circuit 15 according to the fourth embodiment provides a rectified voltage |V AC | Level is clamp voltage V clamp When the level drops below |V|, switch 13 turns ON, and the rectified voltage |V| is turned ON. AC | Level is clamp voltage V clampThe control circuit 15 controls the driver 14 so that switch 13 transitions to the off state before it rises above a certain level. The control circuit 15 further controls the driver 14 so that short periods of the switch 13 being on occur consecutively multiple times immediately before it transitions to the on state. A short period is a period that is sufficiently shorter than the on period of switch 13 immediately after multiple consecutive on states have occurred. The on / off timing of switch 13 according to this embodiment can be appropriately set by the program of the control circuit 15.

[0052] The driver 14 receives the drive signal V according to the control of the control circuit 15. G It generates and supplies this to switch 13. Switch 13 receives the drive signal V G Therefore, the rectified voltage |V AC | Level is clamp voltage V clamp It switches to the ON state when the level falls below |V|, rectified voltage |V| AC | Level is clamp voltage V clamp It operates to transition to the off state before the level rises above a certain threshold. Switch 13 also operates to cause multiple short periods of the on state to occur consecutively immediately before transitioning to the on state.

[0053] According to the switch control according to the first embodiment described above (see Figure 5), when the switch 13 transitions to the ON state, the drain current I D The drain-source voltage V changes rapidly as a result. DS A surge voltage occurs at this point. On the other hand, according to the switch control of this embodiment, the switch 13 operates so that short periods of being on occur repeatedly in succession immediately before transitioning to the on state. As a result, the drain current I at the time of transition of the switch 13 to the on state D The change becomes more gradual, and surge voltage is suppressed. As a result, further suppression of conducted interference waves becomes possible.

[0054] Furthermore, following the example of the AC / DC conversion circuit 10B shown in Figure 11, a capacitor may be provided between the gate and source of the MOSFET constituting the switch 13, and a resistive element may be provided between the gate of the MOSFET constituting the switch 13 and the driver 14. This makes it possible to enhance the effect of suppressing conducted interference waves.

[0055] [Fifth Embodiment] Figure 13 is a timing chart showing an example of the operation of the AC / DC converter circuit 10 according to a fifth embodiment of the disclosed technology. The AC / DC converter circuit 10 according to the fifth embodiment is controlled The mode of switch control by circuit 15 differs from the switch control according to the first embodiment.

[0056] The control circuit 15 according to the fifth embodiment provides a rectified voltage |V AC | Level is clamp voltage V clamp When the level drops below |V|, switch 13 turns ON, and the rectified voltage |V| is turned ON. AC | Level is clamp voltage V clamp The control circuit 15 controls the driver 14 so that when the level rises above a certain level, the switch 13 transitions to the off state. The control circuit 15 further controls the driver 14 so that immediately before the switch 13 transitions to the on state, the switch 13 is continuously in a short on state multiple times, and immediately after the switch 13 transitions to the off state, the switch 13 is continuously in a short on state multiple times. A short on period is a period that is sufficiently shorter than the on period of the switch 13 before and after the multiple consecutive on states occur. The on / off timing of the switch 13 according to this embodiment can be appropriately set by the program of the control circuit 15.

[0057] The driver 14 receives the drive signal V according to the control of the control circuit 15. G It generates and supplies this to switch 13. Switch 13 receives the drive signal V G Therefore, the rectified voltage |V AC | Level is clamp voltage V clamp It switches to the ON state when the level falls below |V|, rectified voltage |V|AC | Level is clamp voltage V clamp The switch operates to transition to the OFF state when the level rises above a certain level. Furthermore, the switch 13 operates so that short ON states occur in succession multiple times immediately before transitioning to the ON state, and short ON states occur in succession multiple times immediately after transitioning to the OFF state.

[0058] According to the switch control according to the second embodiment described above (see Figure 6), when the switch 13 transitions to the ON state and when it transitions to the OFF state, the drain current I D The drain-source voltage V changes rapidly as a result. DS A surge voltage occurs at this point. On the other hand, according to the switch control of this embodiment, the switch 13 operates so that short periods of the ON state occur continuously multiple times immediately before transitioning to the ON state and immediately after transitioning to the OFF state. As a result, the drain current I when the switch 13 transitions to the ON state and when it transitions to the OFF state D The change becomes more gradual, and surge voltage is suppressed. This makes it possible to suppress conducted interference waves.

[0059] Furthermore, according to the switch control of this embodiment, the rectified voltage |V| is maintained within the period from when the switch 13 transitions to the ON state until when it transitions to the OFF state. AC There exists a timing when the level of | is at its minimum (zero), which means that when switch 13 transitions to the ON state, the output voltage V out The rise in voltage can be suppressed. That is, according to the AC / DC conversion circuit 10 of this embodiment, the output voltage V out This makes it possible to suppress the ripple that occurs.

[0060] Furthermore, following the example of the AC / DC conversion circuit 10B shown in Figure 11, a capacitor may be provided between the gate and source of the MOSFET constituting the switch 13, and a resistive element may be provided between the gate of the MOSFET constituting the switch 13 and the driver 14. This makes it possible to enhance the effect of suppressing conducted interference waves.

[0061] Figure 14 shows an example of the configuration of an AC / DC conversion circuit 10C according to a modified example. In the AC / DC conversion circuit 10C, the positional relationship between the "switch 13" and the "capacitor 16, output voltage monitor circuit 17, and load 40" is reversed compared to the AC / DC conversion circuits 10, 10A, and 10B according to the above embodiments. That is, in the AC / DC conversion circuits 10, 10A, and 10B, the switch 13 is located on the high-side, whereas in the modified AC / DC conversion circuit 10B, the switch 13 is located on the low-side. The disclosed technology can also be applied to an AC / DC conversion circuit 10C with such a configuration.

[0062] [Sixth Embodiment] Figure 15 shows an example of the configuration of an AC / DC conversion circuit 10D according to a sixth embodiment of the disclosed technology. The AC / DC conversion circuit 10D differs from the AC / DC conversion circuit 10A according to the third embodiment described above (see Figure 7) in that it has a capacitor 50, a switch 51, and a driver 52.

[0063] Capacitor 50 has one end connected to the source of the MOSFET constituting switch 13, and the other end connected to the drain of the MOSFET constituting switch 51. The MOSFET constituting switch 51 has its source connected to the ground line and its gate connected to driver 52. Capacitor 50 is an example of a “second capacitor” in the disclosed art.

[0064] Switch 51 receives the drive signal V supplied from driver 52. G2 It is switched on and off accordingly. When switch 51 is turned on, a parallel circuit of capacitor 16 and capacitor 50 is formed. As a result, a composite capacitor consisting of capacitor 16 and capacitor 50 is formed, and the rectified voltage |V| is output from the rectifier circuit 11. AC The function of smoothing the | is enhanced. When switch 51 is turned off, the connection of capacitor 50 is disconnected. Switch 51 is an example of a “second switch” in the disclosed technology.

[0065] The driver 52 receives the control signal V supplied from the control circuit 15. cnt2 Based on this, a drive signal V for driving switch 51 is generated. G2 Outputs the drive signal V. G2 This is input to the gate of the MOSFET constituting switch 51. Driver 52 is an example of a “second driver” in the disclosed technology. Drive signal V G2 This is an example of a “second drive signal” in the disclosed technology.

[0066] The control circuit 15 controls the rectified voltage |V AC | Monitor voltage V indicating the level m1 Based on this, control signal V for controlling driver 52 cnt2 It outputs the following. More specifically, the control circuit 15 outputs the rectified voltage |V AC When the peak level of | is lower than the threshold voltage level, switch 51 turns ON and the rectified voltage |V AC The driver 52 is controlled so that switch 51 is turned off when the peak level of | is higher than the threshold voltage level. The threshold voltage is the rectified voltage |V AC | is a criterion for determining the peak level of | and is set in advance. In the control circuit 15 according to this embodiment, control signal V for controlling the driver 14 cnt A first system for generating and a control signal V for controlling driver 52 cnt2 A second system for generating the signal is configured independently. Specifically, the driver circuit 15 has a first system including a voltage sensor 61 and a signal generation circuit 71, and a second system including a voltage sensor 62 and a signal generation circuit 72. The voltage sensor 61 monitors the voltage V m1 and V m2 The signal generation circuit 71 detects the level and, based on the voltage level detection result from the voltage sensor 61, generates a control signal V cnt This outputs the same output voltage V as in the first to fifth embodiments described above. out The clamping action is achieved. The voltage sensor 62 monitors the voltage V m1 The signal generation circuit 72 detects the level and, based on the voltage level detection result from the voltage sensor 62, generates a control signal V cnt2It outputs the rectified voltage |V|. AC This enables the switching operation of the function that smooths out |.

[0067] Here, Figure 16 shows the rectified voltage |V AC Figure 16 shows an example of the operating waveform of an AC / DC converter circuit 10A (see Figure 7) according to a third embodiment of the technology of the disclosure, in which the capacitor that smooths the | is a single capacitor 16. Figure 16 shows an example of the operating waveform of the rectified voltage |V AC |, Output voltage V out , drive signal V G and capacitor current I C The waveform is shown. Capacitor current I C This is the charging current of capacitor 16. The left side of Figure 16 shows the waveform when the level of the AC voltage supplied from the AC power supply 30 is high (high voltage input), and the right side of Figure 16 shows the waveform when the level of the AC voltage supplied from the AC power supply 30 is low (low voltage input).

[0068] According to the AC / DC conversion circuit 10A of the third embodiment, the output voltage V when a low voltage is input is out The ripple range is significantly lower than the ripple range at high voltage input. To resolve this, the rectified voltage |V AC One option is to increase the capacitance of capacitor 16, which smooths the |. However, if the capacitance of capacitor 16 is increased, the capacitor current I will increase when a high voltage is input. C It becomes excessive.

[0069] Figure 17 shows an example of the operating waveform of the AC / DC conversion circuit 10D according to the sixth embodiment of the disclosed technology. Figure 17 shows the rectified voltage |V AC |, Output voltage V out and capacitor current I C The waveform is shown. In Figure 17, the output voltage V in the AC / DC conversion circuit 10A (see Figure 7) according to the third embodiment without a capacitor 50 is shown. out and capacitor current I C The waveform is shown by the dotted line. Capacitor current I when capacitor 50 is absent CThis is the charging current of capacitor 16, and the capacitor current I when capacitor 50 is present. C This is the charging current of the composite capacitor consisting of capacitor 16 and capacitor 50.

[0070] The control circuit 15 controls the rectified voltage |V AC When the peak level of | is lower than the threshold voltage, i.e., when a low voltage is input, switch 51 is controlled to the ON state. This forms a parallel circuit between capacitor 16 and capacitor 50. As a result, a composite capacitor consisting of capacitor 16 and capacitor 50 is formed, and its capacitance is larger than that of capacitor 16 alone. As a result, the capacitor current I C As the rectified voltage |V| increases, AC The function for smoothing | has been enhanced, and the output voltage V at low voltage inputs has been improved. out This makes it possible to suppress the decline.

[0071] On the other hand, the control circuit 15 rectifies the voltage |V AC When the peak level of | is higher than the threshold voltage, i.e., when a high voltage is input, switch 51 is controlled to the off state. This disconnects capacitor 50. This causes the capacitor current I to be released when a high voltage is input. C This makes it possible to avoid the value becoming excessive. The control circuit 15 controls the on / off state of the switch 13 in the same manner as the control modes of the first to fifth embodiments described above.

[0072] As described above, the AC / DC conversion circuit 10D according to the sixth embodiment of the disclosed technology includes a capacitor 50 and a drive signal V G2 The switch 51 turns on and off in response to the drive signal V, and when it is in the ON state, it forms a parallel circuit between capacitor 16 and capacitor 50, and the drive signal V G2 The control circuit 15 has a driver 52 that outputs a rectified voltage |V AC When the peak level of | is lower than a predetermined threshold voltage, switch 51 turns ON, and the rectified voltage |V ACWhen the peak level of | is higher than the threshold voltage, the driver 52 is controlled so that the switch 51 is turned off. This control is performed according to the output voltage V of the first to fifth embodiments described above. out This is performed in parallel with the clamping operation. According to the AC / DC conversion circuit 10D of this embodiment, when a high voltage is input, the capacitor current I C While avoiding excessive values, the output voltage V at low voltage input out This makes it possible to suppress the decline.

[0073] The following additional information is disclosed regarding the embodiments described above. (Note 1) A rectifier circuit that full-wave rectifies the input AC voltage and outputs a rectified voltage, A capacitor for smoothing the rectified voltage, A switch that turns on and off in response to a drive signal, connecting the rectifier circuit and the capacitor when in the ON state, and disconnecting the rectifier circuit and the capacitor when in the OFF state, A driver that outputs the aforementioned drive signal, A control circuit for controlling the driver, It has, The control circuit controls the driver such that the switch turns ON when the rectified voltage level falls below a predetermined clamp voltage level, and turns OFF before the rectified voltage level rises above the clamp voltage level. AC / DC conversion circuit.

[0074] (Note 2) The control circuit controls the driver so that the switch is in a short-term ON state multiple times in succession immediately before it transitions to the ON state. The AC / DC conversion circuit described in Appendix 1.

[0075] (Note 3) The control circuit controls the driver such that the switch turns ON when the rectified voltage level is lower than the clamp voltage level, and turns OFF when the rectified voltage level is higher than the clamp voltage level. The AC / DC conversion circuit described in Appendix 1.

[0076] (Note 4) The control circuit controls the driver such that the switch is continuously in a short-term ON state multiple times immediately before transitioning to the ON state, and that the switch is continuously in a short-term ON state multiple times immediately after transitioning to the OFF state. The AC / DC conversion circuit described in Appendix 3.

[0077] (Note 5) A rectifier circuit that full-wave rectifies the input AC voltage and outputs a rectified voltage, A capacitor for smoothing the rectified voltage, A switch that turns on and off in response to a drive signal, connecting the rectifier circuit and the capacitor when in the ON state, and disconnecting the rectifier circuit and the capacitor when in the OFF state, A driver that outputs the aforementioned drive signal, A control circuit for controlling the driver, It has, The control circuit controls the driver such that the switch turns ON when the level of the rectified voltage is lower than the level of the output voltage, which is the rectified voltage smoothed by the capacitor, turns OFF when the level of the rectified voltage is higher than a predetermined clamp voltage level, and immediately after the switch turns OFF, the switch is continuously turned ON for a short period of time multiple times. AC / DC conversion circuit.

[0078] (Note 6) The aforementioned switch is an n-channel MOSFET, A capacitor is provided between the gate and source of the MOSFET, A resistive element is provided between the gate of the MOSFET and the driver, An AC / DC conversion circuit as described in any one of Appendix 1 to Appendix 5, further comprising the above.

[0079] (Note 7) The control circuit controls the driver according to the program. An AC / DC conversion circuit as described in any one of the appendices 1 through 6.

[0080] (Note 8) The second capacitor, A second switch that turns on and off in response to a second drive signal, and when in the ON state, forms a parallel circuit between the capacitor and the second capacitor, A second driver that outputs the second drive signal, It has, The control circuit controls the second driver such that the second switch turns on when the peak level of the rectified voltage is lower than a predetermined threshold voltage, and turns off when the peak level of the rectified voltage is higher than the threshold voltage. An AC / DC conversion circuit according to any one of the appendix 1 to claim 7. [Explanation of symbols]

[0081] 10, 10A, 10B AC / DC conversion circuit, 11 rectifier circuit, 12 rectifier voltage monitor circuit, 13 switch, 14 driver, 15 control circuit, 16 capacitor, 17 output voltage monitor circuit, 18 capacitor, 19 resistor, 30 AC power supply, 40 load

Claims

1. A rectifier circuit that full-wave rectifies the input AC voltage and outputs a rectified voltage, A capacitor for smoothing the rectified voltage, A switch that turns on and off in response to a drive signal, connecting the rectifier circuit and the capacitor when in the ON state, and disconnecting the rectifier circuit and the capacitor when in the OFF state, A driver that outputs the aforementioned drive signal, A control circuit for controlling the driver, It has, The control circuit controls the driver such that the switch turns ON when the rectified voltage level falls below a predetermined clamp voltage level, and turns OFF before the rectified voltage level rises above the clamp voltage level. AC / DC conversion circuit.

2. The control circuit controls the driver so that the switch is in a short-term ON state multiple times in succession immediately before it transitions to the ON state. The AC / DC conversion circuit according to claim 1.

3. The control circuit controls the driver such that the switch turns ON when the rectified voltage level is lower than the clamp voltage level, and turns OFF when the rectified voltage level is higher than the clamp voltage level. The AC / DC conversion circuit according to claim 1.

4. The control circuit controls the driver such that the switch is continuously in a short-term ON state multiple times immediately before transitioning to the ON state, and that the switch is continuously in a short-term ON state multiple times immediately after transitioning to the OFF state. The AC / DC conversion circuit according to claim 3.

5. A rectifier circuit that full-wave rectifies the input AC voltage and outputs a rectified voltage, A capacitor for smoothing the rectified voltage, A switch that turns on and off in response to a drive signal, connecting the rectifier circuit and the capacitor when in the ON state, and disconnecting the rectifier circuit and the capacitor when in the OFF state, A driver that outputs the aforementioned drive signal, A control circuit for controlling the driver, It has, The control circuit controls the driver such that the switch turns ON when the level of the rectified voltage is lower than the level of the output voltage, which is the rectified voltage smoothed by the capacitor, turns OFF when the level of the rectified voltage is higher than a predetermined clamp voltage level, and immediately after the switch turns OFF, the switch is continuously turned ON for a short period of time multiple times. AC / DC conversion circuit.

6. The aforementioned switch is an n-channel MOSFET, A capacitor is provided between the gate and source of the MOSFET, A resistive element is provided between the gate of the MOSFET and the driver, The AC / DC conversion circuit according to any one of claims 1 to 5, further comprising:

7. The control circuit controls the driver according to the program. The AC / DC conversion circuit according to any one of claims 1 to 5.

8. The second capacitor, A second switch that turns on and off in response to a second drive signal, and when in the ON state, forms a parallel circuit between the capacitor and the second capacitor, A second driver that outputs the second drive signal, It has, The control circuit controls the second driver such that the second switch turns on when the peak level of the rectified voltage is lower than a predetermined threshold voltage, and turns off when the peak level of the rectified voltage is higher than the threshold voltage. The AC / DC conversion circuit according to any one of claims 1 to 5.

Citation Information

Patent Citations

  • Overvoltage protection circuit and power source device

    JP2019030179A