Two-layer optical switch

Optical switching cells with low insertion loss and wide wavelength support are fabricated using CMOS-compatible techniques, addressing high loss and limited wavelength issues in existing switches, suitable for various applications including communications and AI systems.

JP2026502152APending Publication Date: 2026-01-21N I SYST INC
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Patent Information

Application Number
JP2025536527
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-12-22
Filing Date
2023-12-20
Publication Date
2026-01-21

AI Technical Summary

Technical Problem

Existing optical switch networks suffer from high optical insertion loss and limited wavelength support, making them difficult and expensive to fabricate, and they often require significant power consumption.

Method used

The development of optical switching cells with low optical insertion loss and wide wavelength support, fabricated using CMOS-compatible techniques, featuring a fixed waveguide layer and a suspended waveguide layer mechanically supported by a conductive clamp structure, with a commutation optical waveguide that redirects light between bus waveguides upon electromechanical actuation.

Benefits of technology

The solution provides low-loss optical switches that support a wide wavelength range, reducing power consumption and fabrication complexity, suitable for applications in communications, data centers, high-performance computing, and artificial intelligence systems.

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Abstract

The present disclosure is directed to the design and fabrication of a two-layer optical switching cell that controllably distributes and reroutes optical signals between bus optical waveguides of an optical switch network. The two-layer optical switching cell includes one or more mechanical optical switches fabricated on a waveguide layer containing bus optical waveguides. The optical switches include suspended commutation optical waveguides supported by a metal structure and configured to couple light from one bus optical waveguide to another bus optical waveguide upon electromechanical actuation. A method for fabricating such an optical switch includes steps that enable fabrication of an optical switching cell with silicon nitride or single crystal silicon optical waveguides and a metal clamp support structure.
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Description

[Technical Field]

[0001] This application claims the benefit under 35 U.S.C. Section 119(e) of U.S. Provisional Patent Application No. 63 / 476,883, entitled "DUAL LAYER SWITCH WITH SILICON WAVEGUIDES," filed December 22, 2022, the contents of which are incorporated herein by reference in their entirety. [Background technology]

[0002] FIELD OF THE DISCLOSURE This disclosure relates generally to optical switches used to route optical signals in photonic systems, and more particularly to electromechanically actuated optical switching cells and optical switches. Summary of the Invention [Problem to be solved by the invention]

[0003] Performing data processing and data transmission tasks in the optical domain can significantly increase data transmission and processing speeds compared to electronic systems. One of the key tasks in most computing or communication systems is controlling signal paths within a network of signal channels. Switching circuits can include reconfigurable interconnects that controllably redirect signals between different channels. Optical switching circuits, which provide reconfigurable optical interconnects between multiple optical waveguides, are key components in most optical processing and communication systems, and their performance advantages have a significant impact on these systems. [Means for solving the problem]

[0004] In one aspect, the technology described herein relates to an optical switching cell including: a fixed waveguide layer fixed on a substrate, the fixed waveguide layer including a first bus optical waveguide extending between a first optical port and a second optical port and a second bus optical waveguide extending between a third optical port and a fourth optical port, and a suspended waveguide layer suspended above the fixed waveguide layer, the suspended waveguide layer being vertically separated from the fixed waveguide layer and mechanically supported by a conductive clamp structure. and the suspended waveguide layer includes a commutation optical waveguide configured to redirect light from the first bus optical waveguide to the second optical bus waveguide, the commutation optical waveguide comprising silicon nitride or monocrystalline silicon, and upon electromechanical actuation, the commutation optical waveguide optically couples a first end region thereof to the first bus optical waveguide and a second end region thereof to the second bus optical waveguide to redirect the light.

[0005] In another aspect, the technology described herein relates to a method of fabricating an optical switch, including providing a fixed waveguide layer having a first bus optical waveguide and a second bus optical waveguide fixed on a substrate, forming a sacrificial layer on the fixed waveguide layer, forming a suspended waveguide layer including monocrystalline silicon on the sacrificial layer, forming a conductive clamp structure vertically separating the fixed waveguide layer and the suspended waveguide layer, and forming a commutation optical waveguide on the suspended waveguide layer configured to redirect light from the first bus optical waveguide to the second bus optical waveguide, wherein upon electromechanical actuation, the commutation optical waveguide optically couples a first end region of the commutation optical waveguide to the first bus optical waveguide and a second end region of the commutation optical waveguide to redirect light.

[0006] In another aspect, the technology described herein is a method of making an optical switch, the method including: providing a fixed waveguide layer having a first bus optical waveguide and a second bus optical waveguide fixed on a substrate; forming a sacrificial layer on the fixed waveguide layer; forming a suspended waveguide layer comprising silicon nitride on the sacrificial layer; forming a conductive clamping structure vertically separating the fixed waveguide layer and the suspended waveguide layer; forming a commutation optical waveguide on the suspended waveguide layer configured to redirect light from the first bus optical waveguide to the second bus optical waveguide; and removing the sacrificial layer such that the suspended waveguide layer is substantially mechanically supported above the fixed waveguide layer by the conductive clamping structure, wherein upon electromechanical actuation, the commutation optical waveguide optically couples a first end region thereof to the first bus optical waveguide and a second end region thereof to the second bus optical waveguide to redirect light. [Brief explanation of the drawings]

[0007] [Figure 1A] FIG. 1 is a schematic diagram illustrating an optical switch network including a plurality of optical waveguides controllably interconnected using a plurality of switching cells. [Figure 1B] 1 is a schematic diagram illustrating an example of a switching cell comprising a waveguide crossover and an optical switch. [Figure 1C] 1B is a cross-sectional view showing a schematic representation of a portion of the switching cell shown in FIG. 1A at the cut plane (designated AA′ in FIG. 1B) when the optical switch is in the off state (C) and in the on state (D). [Figure 1D] 1B is a cross-sectional view showing a schematic representation of a portion of the switching cell shown in FIG. 1A at the cut plane (designated AA′ in FIG. 1B) when the optical switch is in the off state (C) and in the on state (D). [Figure 1E] FIG. 10 is a schematic diagram illustrating another example switching cell comprising a waveguide crossover and two optical switches. [Figure 2A] 1C-1D are cross-sectional views that schematically depict intermediate structures at several steps in the fabrication process of the switching cell shown in FIG. 1B. [Figure 2B]1C-1D are cross-sectional views that schematically depict intermediate structures at several steps in the fabrication process of the switching cell shown in FIG. 1B. [Figure 2C] 1C-1D are cross-sectional views that schematically depict intermediate structures at several steps in the fabrication process of the switching cell shown in FIG. 1B. [Figure 2D] 1C-1D are cross-sectional views that schematically depict intermediate structures at several steps in the fabrication process of the switching cell shown in FIG. 1B. [Figure 3A] FIG. 1C is a cross-sectional view that schematically illustrates an intermediate structure associated with the switching cell shown in FIG. 1B after depositing a second waveguide layer on the sacrificial layer. [Figure 3B] FIG. 1C illustrates a schematic of the fabrication step of bonding a second waveguide layer, originally formed on a separate chip, to a sacrificial layer of an intermediate structure involved in fabricating the switching cell shown in FIG. 1B. [Figure 3C] FIG. 1C illustrates a schematic of the fabrication step of bonding a second waveguide layer, originally formed on a separate chip, to a sacrificial layer of an intermediate structure involved in fabricating the switching cell shown in FIG. 1B. [Figure 3D] FIG. 1C illustrates a schematic of the fabrication step of bonding a second waveguide layer, originally formed on a separate chip, to a sacrificial layer of an intermediate structure involved in fabricating the switching cell shown in FIG. 1B. [Figure 4A] 1C is a cross-sectional view that schematically illustrates an intermediate structure during fabrication of the switching cell shown in FIG. 1B after patterning the second waveguide layer. [Figure 4B] 1C is a cross-sectional view that schematically illustrates an intermediate structure during fabrication of the switching cell shown in FIG. 1B after patterning the second waveguide layer. [Figure 4C] FIG. 1C is a front view diagrammatically illustrating an intermediate structure during fabrication of the switching cell shown in FIG. 1B after patterning the second waveguide layer. [Figure 4D] 1C is a cross-sectional view that schematically illustrates an intermediate structure during fabrication of the switching cell shown in FIG. 1B after forming vias for fabricating clamping support structures. [Figure 4E]1C is a cross-sectional view that schematically illustrates an intermediate structure during fabrication of the switching cell shown in FIG. 1B after forming vias for fabricating clamping support structures. [Figure 4F] 1C is a cross-sectional view that schematically illustrates an intermediate structure during fabrication of the switching cell shown in FIG. 1B after metal deposition and before removal of the sacrificial layer. [Figure 4G] 1C is a cross-sectional view that schematically illustrates an intermediate structure during fabrication of the switching cell shown in FIG. 1B after metal deposition and before removal of the sacrificial layer. [Figure 4H] FIG. 1C is a schematic front view of an intermediate structure during fabrication of the switching cell shown in FIG. 1B after metal deposition and before removal of the sacrificial layer. [Figure 5A] FIG. 1C is a cross-sectional view that schematically illustrates the final structure of the switching cell shown in FIG. 1B after the sacrificial layer has been removed. [Figure 5B] FIG. 1C is a cross-sectional view that schematically illustrates the final structure of the switching cell shown in FIG. 1B after the sacrificial layer has been removed. [Figure 5C] 1C is a schematic cross-sectional side view of the switching cell shown in FIG. 1B illustrating movement of the optical switch from an OFF state (solid lines) to an ON state (dashed lines). DETAILED DESCRIPTION OF THE INVENTION

[0008] Signal operation in the optical domain can significantly increase bandwidth and reduce losses in data processing and transmission compared to operation in the electrical domain, making it advantageous to perform at least some of the data processing and transmission tasks required by an application in the optical domain.

[0009] One of the key tasks in computing and communications operations is the control of signal paths in a network of signal channels. In many applications, this task is performed by switching circuits that contain multiple reconfigurable interconnections between the signal channels.

[0010] Optical switch networks and circuits are modules that can provide reconfigurable optical interconnections between multiple optical channels (e.g., optical waveguides), and can replace their electrical counterparts when data processing and transmission is performed in the optical domain.

[0011] Such optical switch modules may be composed of multiple optically interconnected switching cells, each configured to control the flow of optical signals between at least two individual optical channels of the module. Optical switch networks and circuits may have much lower power requirements than electrical switch networks and circuits. While the insertion loss of optical switches can be much smaller than that of electrical ones, in some cases, cascading optical switches within an optical switch network can result in path-dependent optical loss that varies along different paths. Such path-dependent optical loss variations can degrade the performance of the optical switch network and corresponding optical system. Low-loss optical switches can alleviate this problem and improve system power consumption.

[0012] Some existing optical switch networks are implemented based on optical switch technologies and configurations that can introduce excessive optical insertion loss when connecting two optical waveguides and can be difficult and / or expensive to fabricate. Furthermore, some existing optical switches only support optical signals having wavelengths within a limited portion of the optical spectrum (e.g., the near-infrared region).

[0013] This disclosure describes the structure, design, and fabrication methods of optical switches and optical switching cells that have low optical insertion loss compared to existing optical switches and cells and support optical signals over a wide wavelength range (e.g., spanning the visible wavelength region). The improved performance of the disclosed optical switches is a result of using methods that allow the optical waveguides of the optical switching cells to be fabricated from materials with desired optical properties (e.g., lower absorption loss and a wider transparency window). The disclosed optical switches and corresponding optical switching cells and circuits can be used in a variety of applications, including, but not limited to, communications, data centers, high performance computing (HPC), and artificial intelligence (AI) and machine learning (ML) systems.

[0014] The disclosed optical switches and switching cells can be fabricated using CMOS-compatible fabrication techniques. Thus, in some embodiments, these optical switches and switching cells can be built directly on a silicon chip by leveraging the capabilities of a CMOS foundry, and in some cases can be fabricated at least in part in conjunction with CMOS devices and electronic circuitry (e.g., control circuitry that controls the optical switches) on a common chip.

[0015] In some cases, the disclosed optical switching cells (also referred to as switching cells) can be used to form a network of controllable optical interconnections between optical waveguides fabricated on a common chip or substrate. In some examples, the optical waveguides can form a matrix structure or arrangement comprising a first array of waveguides (e.g., horizontal waveguides) and a second array of waveguides (e.g., vertical waveguides) forming a matrix of waveguide intersections. In some cases, the waveguide intersections can include overlapping portions of waveguides in the first array of waveguides and waveguides in the second array of waveguides. In some cases, the waveguide intersections are reconfigurable using optical switches. The reconfigurable waveguide intersections can controllably couple light propagating in one of the waveguides to another of the waveguides at the waveguide intersection.

[0016] In some embodiments, the switching cell may be a reconfigurable optical waveguide crossover comprising at least one pair of fixed-position bus waveguides of an optical network and an optical switch including a movable optical waveguide portion (referred to herein as a switching waveguide) that is optically coupled to or decoupled from each of the pair of bus waveguides by controlled actuation (e.g., electromechanical actuation). In such a case, a first bus waveguide of the pair of bus waveguides provides an optical connection between a first port and a second port of the optical network, and a second bus waveguide of the pair of bus waveguides provides an optical connection between a third port and a fourth port of the optical network. The bus waveguides may cross each other at a crossover junction such that, when the optical switch is in an on state, the commutation waveguide optically connects the first port to the third port and optically decouples the first port from the second port by coupling light from the first bus waveguide to the second bus waveguide. In some embodiments, the commutation waveguide may comprise a bent (e.g., L-shaped) waveguide configured to couple light from a bus waveguide to another bus waveguide through two coupling regions in the commutation waveguide. Each coupling region may be proximate an end of the commutation waveguide and may be configured to couple light from the bus waveguide to the commutation waveguide when the optical switch is in an on state (e.g., when mechanically actuated).

[0017] Some examples of optical waveguide networks comprising switching cells with optical switches are described in U.S. Patent No. 10,061,085, issued August 28, 2018, which is incorporated herein by reference in its entirety. To the extent that any of the incorporated content may be construed to contradict the corresponding content of this disclosure, the present disclosure will be understood to control.

[0018] 1A schematically illustrates an exemplary optical switch network 10 having a matrix architecture. The optical switch network 10 comprises a first plurality of optical waveguides 15 controllably interconnected to a second plurality of optical waveguides 25 using a matrix of switching cells (SC1, SC2, ... SC12). When all switching cells are in an off state, the first plurality of waveguides 15 optically connect the first plurality of optical ports 12a to the second plurality of optical ports 12b, and the second plurality of waveguides 25 optically connect the third optical port 20a to the fourth plurality of optical ports 20b.

[0019] In the illustrated example, the first plurality of optical waveguides 15 includes four waveguides, the second plurality of optical waveguides 25 includes three waveguides, and the matrix of switching cells includes twelve switching cells SC1 to SC12. In some examples, each switching cell provides a controllable optical coupling between a respective waveguide of the first plurality of waveguides 15 and a respective waveguide of the second plurality of waveguides 25. In some examples, an individual switching cell may include at least one optical switch configured to optically couple one of the optical waveguides of the first plurality of waveguides 15 to one of the optical waveguides of the second plurality of waveguides 25. For example, when a switching cell is in an on state, an optical signal received from one of the first plurality of optical ports 12 a may be rerouted by the optical switch of one of the switching cells to one of the third plurality of optical ports 20 b, or vice versa. However, when in an on state, the same optical switch may not reroute an optical signal received from one of the second plurality of optical ports 12b to one of the third plurality of optical ports 20b or one of the fourth plurality of optical ports 20a. In some embodiments, an individual switching cell may comprise two optical switches configured to switchably couple one optical waveguide of the first plurality of waveguides 15 to one optical waveguide of the second plurality of waveguides 25. In some such embodiments, when both optical switches of a switching cell are in an on state, an optical signal received from one of the first plurality of optical ports 12a is rerouted to one of the third plurality of optical ports 20b, or vice versa, and an optical signal received from one of the second plurality of optical ports 12b is rerouted to one of the third plurality of optical ports 20b (or vice versa) or to one of the fourth plurality of optical ports 20a.

[0020] FIG. 1B schematically illustrates a top view (e.g., parallel to a plane) looking down on a portion of an optical switch network including an exemplary optical switching cell (also referred to as a switching cell). The switching cell 50 illustrated in FIG. 1B comprises a reconfigurable waveguide intersection including a first bus optical waveguide 132a and a second bus optical waveguide 132b arranged to intersect each other at a connection point (e.g., intersection region 142). In some embodiments, the bus optical waveguides (also referred to as bus waveguides) 132a, 132b are substantially orthogonal to each other. In other embodiments, the optical waveguides 132a, 132b may not be orthogonal to each other. In the illustrated example, the first bus waveguide 132a optically connects the first optical port 140a to the second optical port 140b of the optical network, and the second bus waveguide 132b optically connects the third optical port 141a to the fourth optical port 141b of the optical network. In some cases, optical ports 140a, 140b, 141a, 141b may be any point along the respective waveguides used to separate different switching cells and may therefore not represent an optical discontinuity along the waveguide.

[0021] In some embodiments, the intersection of two bus waveguides 132a, 132b (referred to herein as intersection region 142) may be configured to reduce or potentially eliminate propagation of light from first or second optical ports 140a, 140b to third or fourth optical ports 141a, 141b, and vice versa. In some cases, intersection region 142 may comprise a multimode interference region configured to prevent propagation of light between the first and second waveguides at the intersection, for example, by concentrating the optical energy of the optical signal near the center of intersection region 142 as the optical signal passes through intersection region 142. In some embodiments, bus waveguides 132a, 132b and the multimode interference region may be optically coupled via flared or tapered waveguide regions that mitigate optical losses associated with propagation from the bus waveguides to the intersection region, and vice versa.

[0022] The switching cell 50 may further include an optical switch 135 configured to controllably redirect or couple at least a portion of light propagating in one bus waveguide to the other bus waveguide. For example, when in an on state, the optical switch 135 may redirect substantially all of the optical power received from the third optical port 141a and propagating in the first bus waveguide 132a to the second bus waveguide 132b such that a negligible or substantially zero amount of optical power passes through the intersection region via the first waveguide 132a. For example, when in an on state, the optical switch 135 may redirect 90% or more, 95% or more, 97% or more, or 99% or more of the optical power received from the third optical port 141a and propagating in the first bus waveguide 132a to the second bus waveguide 132b. Optionally, the optical switch 135 may be a structure or patterned layer fabricated above the bus waveguides 132 a, 132 b and may comprise at least one waveguide portion of the commutation waveguide 133 configured to guide light and one or more electrodes (or conductive regions) configured to enable electromechanical actuation of the optical switch 135. Optionally, the optical switch 135 may comprise a slab region and a ridge (or rib) region configured to confine light in a lateral direction perpendicular to the propagation direction of the light in the corresponding commutation waveguide 133.

[0023] In some embodiments, the commutation waveguide 133 can be a curved optical waveguide section that extends from one end of the optical switch 135 to the other. One or more electrodes (e.g., conductive lines) can be configured to enable electromechanical actuation of at least a portion of the optical switch structure. In some cases, the commutation waveguide 133 can be a rib or ridge optical waveguide and can be at least partially embedded in the optical switch structure.

[0024] In some examples, optical switch 135 may be at least partially suspended above substrate 100 and supported by one or more support structures that mechanically couple or clamp at least a portion of optical switch 135 to substrate 100. In some cases, the support structures may be comprised of one or more clamping support structures 122 (also referred to as clamping structures) and one or more flexible support structures 120. Clamping support structures 122 may be configured to clamp a portion (e.g., a middle portion) of optical switch 135 to substrate 100, and flexible support structures 120 may be configured to allow two end regions of optical switch 135 to move in a vertical direction perpendicular to a major surface of substrate 100. In some embodiments, clamping support structures 122 may be conductive clamping structures comprising a conductive material. In some embodiments, clamping support structures 122 may include one or more pillars (e.g., metal pillars) extending downward from optical switch 135 to substrate 100. In some cases, the clamping support structure 122 may include a metal such as aluminum, copper, or an alloy including aluminum, copper, and / or other metals. In some cases, the clamping support structure 122 may include a dielectric material. In some cases, at least a portion of the clamping support structure 122 may include an organic material (e.g., a polymer). In some cases, the flexible support structure 120 may mechanically connect one end of the optical switch 135 to a base structure fabricated on the substrate 100. In some examples, at least a portion of the flexible support structure 120 may include a folded spring structure. The flexible support structure 120 may be connected to an end of the optical switch 135, allowing its end to bend toward the substrate 100 when actuated, for example, by an electrostatic force applied at least in part using an electrode of the optical switch 135.

[0025] In some cases, the optical switch 135 may be aligned with the bus waveguides 132a, 132b such that the commutation waveguide 133 controllably commutates light from one of the bus waveguides 132a, 132b to the other to change the optical connection between the optical ports associated with those waveguides. For example, when the optical switch 135 is in the off state, the commutation waveguide 133 is optically decoupled from the first and second bus waveguides 132a, 132b, and light entering the third port 141a propagates through the intersection region 142 to the fourth port 141b. When the optical switch 135 is in an on state, the commutation waveguide 133 is optically coupled to the first and second bus waveguides 132a (e.g., using electromechanical actuation) to provide an optical path that bypasses the intersection region 142 and connects a portion of the first waveguide 132a to a portion of the second waveguide 132b so that light entering the third port 141a propagates through the commutation waveguide 133 to the second port 140b.

[0026] In some embodiments, the commutation waveguide 133 may include a first coupling region 134 (also referred to as a first end region), a second coupling region 136, and an intermediate region extending from the first coupling region 134 to the second coupling region 136 (also referred to as a second end region). The first coupling region 134 may extend from a first end of the commutation waveguide 133 to the intermediate region, and the second coupling region 136 may extend from a second end of the commutation waveguide 133 to the intermediate region. The commutation waveguide 133 may be positioned above the bus waveguides 132a, 132b. This causes the first and second coupling regions 134, 136 to be vertically separated from the first and second bus waveguides 132a, 132b by first and second gap sizes, respectively, when the optical switch 135 is in an off state. Additionally, when the optical switch 135 is in the on state, the first and second coupling regions 134, 136 are vertically separated from the first and second bus waveguides 132a, 132b by third and fourth gap sizes, respectively.

[0027] Optionally, the first, second, third, and fourth gap sizes may each comprise a vertical distance between a bottom surface of the coupling region and a top surface of the respective bus waveguide. In some cases, the first and second gap sizes may be larger than the third and fourth gap sizes, respectively. The first and second gap sizes may be configured such that the commutation waveguide 133 is optically decoupled from the first and second bus waveguides 132 a, 132 b when the optical switch 135 is in an off state. The third and fourth gap sizes may be configured such that the commutation waveguide 133 is optically coupled to the first and second bus waveguides 132 a, 132 b when the optical switch 135 is in an on state.

[0028] Optionally, the commutation waveguide 133 can be aligned with the first and second bus waveguides 132a, 132b, and when the optical switch 135 is in an on state, the commutation waveguide is optically coupled to the first and second bus waveguides 132a, 132b via the first and second coupling regions 134, 136, respectively.

[0029] Optionally, when the optical switch 135 is in an on state, the first and second coupling regions 134, 136 may be fleetingly coupled to the first and second bus waveguides 132a, 132b.

[0030] In a preferred embodiment, when the optical switch 135 is in the on state, at least a portion of each of the first and second coupling regions 134, 136 is not in contact with, but is positioned immediately adjacent to, the first and second bus waveguides 132a, 132b. In some other embodiments, when the optical switch 135 is in the on state, at least a portion of each of the first and second coupling regions 134, 136 can be in contact with the first and second bus waveguides 132a, 132b.

[0031] Optionally, when optical switch 135 is in an on state, first coupling region 134 and first bus waveguide 132a can form a first optical directional coupler, and second coupling region 136 and second bus waveguide 132b can form a second optical directional coupler. For some embodiments, the first directional coupler and second directional coupler can be configured to couple a specific fraction of light propagating in one of bus waveguides 132a, 132b to commutation waveguide 133, or vice versa. Optionally, the specific fraction can be 1% to 5%, 5% to 10%, 10% to 30%, 30% to 50%, 50% to 70%, 70% to 90%, 90% to 95%, 95% to 99%, or more. In some cases, one of the first or second directional couplers may be configured to couple nearly 100% (e.g., 98% or more), and the other directional coupler may be configured to couple a specific portion of the light propagating in one of the bus waveguides 132a, 132b within the range described above to the commutation waveguide 133 (or vice versa).

[0032] Optionally, when optical switch 135 is in an on state, a certain portion of the light received from third optical port 141a and propagating in first bus waveguide 132a is transmitted to the second bus waveguide via commutation waveguide 133, or vice versa. Optionally, the certain portion may be between 50% and 70%, between 70% and 90%, between 90% and 95%, between 95% and 99%, or more.

[0033] In some cases, when optical switch 135 is in the off state, the portion of light coupled from first bus waveguide 132a to second bus waveguide 132b may not exceed 3%, 2%, 1%, 0.1%, 0.01%, or less.

[0034] In some cases, the gap between the bus waveguide and each coupling region of the commutation waveguide 133 may be adjustable using an actuation mechanism. In some examples, the actuation mechanism may comprise a microelectromechanical system (or MEMS structure) in which a controllable electrostatic force moves the coupling region toward the bus waveguide, reducing the coupling gap. Implemented actuators may include, but are not limited to, electrothermal, thermal, magnetic, electromagnetic, electrostatic combdrive, magnetostrictive, piezoelectric, fluidic, pneumatic actuators, etc. In this manner, the strength of the optical coupling between each one of the coupling regions 134, 136 of the commutation waveguide 133 and the respective bus waveguide may be controlled by electrical actuation. In some embodiments, the electrostatic force may be generated and controlled by generating a potential difference between a region (e.g., a conductive region) of the optical switch 135 and the substrate 100 (e.g., a conductive region of the substrate). In these embodiments, the coupling gap, and therefore the optical coupling, between the coupling regions 134, 136 and each one of the bus waveguides 132a, 132b may be controlled or adjusted by adjusting the potential difference between the corresponding portion of the optical switch 135 and the substrate 100. In this manner, the strength of the optical coupling between each one of the coupling regions 134, 136 of the commutation waveguide 133 and the respective bus waveguide may be controlled by electrical actuation. In some embodiments, an electrostatic force may be generated and controlled by generating a potential difference between a region (e.g., a conductive region) of the optical switch 135 and the substrate 100 (e.g., a conductive region of the substrate). In these embodiments, the coupling gap, and therefore the optical coupling, between the coupling regions 134, 136 and each one of the bus waveguides 132a, 132b may be controlled or adjusted by adjusting the potential difference between the corresponding portion of the optical switch 135 and the substrate 100. For example, the state of optical switch 135 can be changed from an off state to an on state by providing a potential difference between an end portion of optical switch 135 and substrate 100 such that the first gap size changes to a third gap size and the second gap size changes to a fourth gap size.In some examples, the potential difference may be provided by a voltage source electrically connected to the conductive regions of the optical switch 135 and the substrate 100 (e.g., via conductive lines disposed on the substrate 100).

[0035] In some cases, at least one coupling region 134, 136 of the commutation waveguide 133 may include a tapered region having a width that tapers toward the end of the commutation waveguide 133. In some examples, when a coupling region having a tapered region is activated and bent toward its respective bus waveguide, an adiabatic optical coupler is formed by the coupling region and the bus waveguide, enabling low-loss adiabatic transmission of optical power from the bus waveguide to the commutation waveguide 133 and vice versa.

[0036] Examples of waveguide intersection regions with multimode interference regions and shunt waveguides with tapered coupling regions are discussed in U.S. Patent No. 10,061,085, issued August 28, 2018, which is incorporated herein by reference in its entirety. To the extent that any of the incorporated content may be construed as inconsistent with the corresponding content of the present disclosure, the present disclosure will be understood to control.

[0037] 1C-1D schematically illustrate cross-sectional views of a portion of the switching cell shown in FIG. 1B taken along a cutting plane (designated AA′ in FIG. 1B) perpendicular to a major surface of the substrate 100 (e.g., parallel to the x-axis). In FIG. 1C, the optical switch 135 is in an off state, and a vertical gap size g between the commutation waveguide 133 and the bus waveguide 132 a below the commutation waveguide 133 is large enough to prevent optical coupling between the commutation waveguide 133 and the bus waveguide 132 a. Optionally, in the off state, a potential difference between the second upper electrode portion (e.g., upper conductive lines 124 a, 124 b) of the optical switch 135 and the electrode (e.g., lower conductive lines 106 a, 106 b) on the substrate 100 may be substantially zero. Optionally, in the off state, the vertical gap size g can be 0.1 microns to 0.5 microns, 0.5 microns to 1 micron, 1 micron to 2 microns, 2 microns to 3 microns, 3 microns to 4 microns, or more.

[0038] 1D , the optical switch 135 is actuated to an on state. The optical switch 135 may be actuated, for example, by generating a potential difference between the upper conductive lines 124 a, 124 b of the optical switch 135 and the lower conductive lines 106 a, 106 b on the substrate 100. In some examples, actuation of the optical switch may cause a portion of the optical switch suspended above the first optical waveguide 132 a (e.g., the portion including the coupling region 134) to bend toward the bus waveguide, thereby reducing the vertical gap size g between the coupling region 134 of the commutation waveguide 133 and the bus waveguide 132 a, thereby optically coupling the commutation waveguide 133 to the bus waveguide 132 a. In some cases, in the on state, the vertical gap size g may be 0.5 microns to 0.3 microns, 0.3 microns to 0.2 microns, 0.2 microns to 0.1 microns, 0.1 microns to 0.05 microns, or smaller.

[0039] 1E schematically illustrates an example of a switching cell 200 that includes a waveguide crossover and two optical switches. For example, the switching cell 200 may include, in addition to the optical switch 135, a second optical switch 155 having a second commutation waveguide 153, such that each of the optical switches 135, 155 optically couples a different portion of the first and second waveguides 132a, 132b. The second optical switch 155 may have one or more of the features described above with respect to the optical switch 135. In this example, the switching cell 200 may provide a controllable optical path from the third optical port 141a to the second optical port 140b and a controllable optical path from the first optical port 141a to the fourth optical port 141b. When both optical switches 135, 155 of the switching cell 200 are in the on state, the third optical port 141a is bidirectionally connected to the second optical port 140b, and the first optical port 140a is bidirectionally connected to the fourth optical port 141b.

[0040] In some embodiments, the switching cell 50 shown in FIG. 1B can be fabricated on a silicon substrate using CMOS-compatible fabrication methods and processes. The following embodiments and methods provide non-limiting examples of fabrication steps and structural characteristics (e.g., geometric and material properties) of a switching cell including at least one commutation waveguide controllably coupled to two bus waveguides. Advantageously, the disclosed fabrication steps enable fabrication of bus waveguides and commutation waveguides with lower optical loss (e.g., insertion loss) in the visible and / or near-infrared wavelength ranges compared to bus waveguides and commutation waveguides used in existing switching cells. In some examples, the disclosed switching cells can include bus waveguides and commutation waveguides comprising single-crystal silicon (also referred to as monocrystalline silicon) and silicon nitride. In some embodiments, the optical propagation loss in the bus and commutation optical waveguides of the switching cells described below can be less than 1 dB / cm, less than 0.5 dB / cm, less than 0.1 dB / cm, less than 0.01 dB / cm, or less for light having a wavelength within the operating wavelength range of the switching cell, which in some cases can be 400 nm to 1100 nm, 1100 nm to 1200 nm, 1200 nm to 1400 nm, 1400 nm to 1500 nm, 1500 nm to 1600 nm, 1260 nm to 1360 nm, 1450 nm to 1650 nm, or any range within a range formed by these values ​​or greater or lesser values.

[0041] In some embodiments, the bus waveguide is fabricated as a first layer and the commutation waveguide is fabricated as a second layer above the first layer using a sacrificial layer as a spacer. In some examples, the sacrificial layer can be based on an organic material so that it can be removed without affecting the structural properties (e.g., surface roughness) of the substrate, bus waveguide, and commutation waveguide. Furthermore, the disclosed fabrication methods enable the fabrication of optical switches connected to the substrate by metal clamping support structures (e.g., metal posts or vias).

[0042] 2A-2D schematically illustrate cross-sectional views of intermediate structures at several steps in a fabrication process of a switching cell (e.g., switching cell 50) that includes a mechanically actuated optical switch (e.g., optical switch 135). Optionally, the fabrication process can include fabrication of at least two optical waveguides (e.g., optical waveguides 132a and 132b) on a layered substrate (e.g., substrate 50) and a commutation waveguide (e.g., commutation waveguide 133) disposed above the optical waveguides and at least partially movable relative to the substrate.

[0043] In some embodiments, the fabrication process can begin by providing a substrate 100 (e.g., a layered substrate) comprising a silicon substrate 101 having a dielectric layer 102 (e.g., a base dielectric layer) on one of its major surfaces (e.g., a top surface). Optionally, the dielectric layer 102 can include a silicon dioxide (SiO2) layer. In some examples, the silicon dioxide layer can be a thermally grown or deposited silicon dioxide layer. Figure 2A shows a cross-sectional view of the substrate 100 (e.g., a layered substrate).

[0044] In some embodiments, the thickness of the dielectric layer 102 along a vertical direction perpendicular to the major surface of the silicon (Si) substrate 101 (e.g., along the x-axis) can be 1 micron to 1.5 microns, 1.5 microns to 2 microns, 2 microns to 3 microns, 3 microns to 4 microns, 4 microns to 5 microns, 5 microns to 6 microns, or more.

[0045] The fabrication steps shown in FIG. 2B may include depositing a first waveguide layer 104 on a surface of the dielectric layer 102 opposite the Si substrate 101 (e.g., on top of the SiO2 layer 102). In some embodiments, the first waveguide layer 104 may include a silicon (Si) layer or a silicon nitride (SiN) layer. In some examples, the silicon layer may be composed of a single-crystal Si layer, a polysilicon layer, or an amorphous Si layer. In various implementations, the Si layer may be grown, deposited, or bonded onto the SiO2 layer. In some examples, SiN may be deposited on the SiO2 layer 102 (e.g., by chemical vapor deposition (CVD), hot-filament chemical vapor deposition, plasma-enhanced chemical vapor deposition (PECVD), low-pressure chemical vapor deposition (LPCVD), or other methods).

[0046] In some embodiments, the thickness of the first waveguide layer 104 along a direction (vertical direction) perpendicular to the major surface of the Si substrate 101 (e.g., along the x-axis) can be 0.1 to 0.2 microns, 0.2 to 0.3 microns, 0.3 to 0.5 microns, 0.5 to 1 micron, 1 micron to 1.5 microns, 1.5 to 2 microns, any range formed by any of these values ​​or any value greater or less than these.

[0047] The fabrication steps shown in FIG. 2C may include patterning the first waveguide layer 104 to form one or more bus optical waveguides (e.g., bus waveguides 132a, 132b), followed by depositing and patterning a conductive layer to form at least one electrode (e.g., conductive region) on the patterned waveguide layer 108 (also referred to as a fixed waveguide layer). In some cases, the patterned waveguide layer 108 may constitute an optical switch (e.g., optical switch 135). In some such examples, the patterned waveguide layer 108 may constitute at least a portion of a flexible support structure and / or a clamping support structure (e.g., a portion of the flexible support structure 120). In some examples, the electrode (also referred to as a bottom electrode or a fixed electrode) may function as a bottom actuation electrode of the optical switch. In some cases, fabrication of the bus optical waveguide may include photolithographically patterning a photoresist layer on the first waveguide layer 104 and etching exposed areas of the waveguide layer (areas not covered by the hardened photoresist layer) to form waveguide region 108a of patterned waveguide layer 108. In some examples, waveguide region 108a may comprise a rib (or ridge) waveguide portion. In some such examples, the bus optical waveguide (e.g., bus waveguide 132a or 132b) may be comprised of a rib (or ridge) optical waveguide. Waveguide region 108a may confine an optical field in a lateral direction (e.g., along the y-axis) and a longitudinal direction (e.g., along the x-axis) and allow propagation of the confined optical field in a direction perpendicular to the lateral and longitudinal directions (e.g., along the z-axis). In some examples, the waveguide region 108a may be a region where most of the optical energy is confined (e.g., 90% or more or 95% or more of the optical energy). In some cases, the width of the waveguide region 108a may be greater than the actual width of the bus waveguide 132a (or 132b), which may be defined by the width of a ridge or rib portion of the patterned waveguide layer 108.

[0048] In some examples, such as the example shown in FIG. 2C , fabricating the at least one electrode may include depositing a conductive layer on the patterned waveguide layer 108, photolithographically patterning a photoresist layer on the conductive layer, and etching the exposed areas of the conductive layer to form the electrode. In some cases, the at least one electrode may have two bottom conductive lines 106 a, 106 b formed on opposite sides of the waveguide region 108 a. In some cases, when the waveguide region 108 a is a ridge waveguide, the patterned waveguide layer 108 may not cover a portion of the SiO 2 layer 108 outside the waveguide region 108 a. In such cases, the two bottom conductive lines 106 a, 106 b may be disposed on and in contact with the SiO 2 layer.

[0049] In some embodiments, at least one electrode (at least one bottom electrode) may have a conductive region formed on the patterned waveguide layer 108 by increasing the conductivity of a region of the patterned waveguide layer 108. Optionally, instead of metal deposition, such a conductive region may be formed by doping the patterned waveguide layer 108 via thermal diffusion, ion implantation, or other methods. In some examples, at least one electrode may have two longitudinally extending conductive regions formed on opposite sides of the waveguide region 108a.

[0050] In some embodiments, the thickness of the conductive layer and bottom conductive lines 106a, 106b along a vertical direction perpendicular to the major surface of the Si substrate 101 (e.g., along the x-axis) can be 0.1 to 0.5 microns, 0.5 to 1 micron, or any range formed by these values, or a larger or smaller value.

[0051] In some embodiments, the geometric dimensions of the waveguide region 108a (e.g., the width and thickness of the rib or ridge waveguide region 108a) may be configured to support propagation of a single optical mode (e.g., a single transverse optical mode) within the waveguide region 108a at a wavelength within a specified wavelength range (e.g., a wavelength range suitable for optical communications). In some cases, the single optical mode may be a transverse electric (TE) mode of the waveguide region 108a (bus waveguide 132a or 132b). In some examples, the thickness t2 of the rib (or ridge) portion of the waveguide region 108a may be 0.1 to 0.2 microns, 0.2 to 0.3 microns, 0.3 to 0.5 microns, 0.5 to 1 micron, 1 micron to 1.5 microns, 1.5 to 2 microns, or any range formed by these values ​​or greater. In some examples, the thickness t1 of the patterned waveguide layer 108 outside the rib (or ridge) portion (also called the slab portion) of the waveguide region 108a can be 0.05 to 0.1 microns, 0.1 to 0.15 microns, 0.15 to 0.2 microns, 0.2 to 0.3 microns, 0.3 to 0.5 microns, or more.

[0052] In some examples, two or more bus optical waveguides of an optical waveguide network can be fabricated together by patterning first waveguide layer 104. In some cases, two or more bus optical waveguides can include at least two waveguides that intersect each other at a junction. For example, bus waveguide 132a and bus waveguide 132b and corresponding electrodes can be fabricated together in the fabrication steps shown in FIG. 2C . As such, the cross section shown in FIG. 2C can represent an intermediate structure along cross section AA′, which includes bus waveguide 132a, or an intermediate structure along cross section BB′, which includes bus waveguide 132b.

[0053] In the fabrication step shown in FIG. 2D , a sacrificial layer 110 may be disposed on the patterned waveguide layer 108 and at least one electrode (e.g., bottom conductive lines 106 a, 106 b). In some cases, the sacrificial layer 110 may comprise an inorganic material (e.g., SiO ). In some cases, the sacrificial layer 110 may be an organic sacrificial layer including an organic material such as a polymer (e.g., a photoresist material, e.g., SU-8, polyimide). In various embodiments, the sacrificial layer 110 may be disposed by a polymer deposition process, lamination, adhesion, spin coating, or other methods. In some examples, the sacrificial layer 110 may comprise a material that can be removed by an etching process that does not substantially affect surrounding layers and structures upon completion of the mechanical optical switch. In some cases, the etching process may include wet etching using a solvent or dry etching using oxygen plasma. Thus, in some cases, the configuration of the sacrificial layer 110 may be determined at least in part based on the compositions and properties of the first waveguide layer 104, the dielectric layer 102, and the second waveguide layer, which will be described later.

[0054] 3A and 3B-3D illustrate different fabrication steps that may follow those shown in FIG. 2D to place a second waveguide layer 112 on the sacrificial layer 110. The second waveguide layer may comprise a silicon (Si) or silicon nitride (SiN) layer. The SiN layer may comprise a stoichiometric nitride, a low-stress nitride, or other type. In some examples, the Si layer may comprise single-crystal Si (also referred to as monocrystalline silicon). In other examples, the Si layer may comprise polysilicon or amorphous Si. In some examples, the composition of the second waveguide layer 112 may be identical to the composition of the first waveguide layer 104. For example, both the first and second waveguide layers 104, 112 may be silicon nitride layers. In some cases, the thickness of the second waveguide layer 112 may be substantially equal to the thickness of the first waveguide layer 104. In other cases, the thickness of the second waveguide layer 112 may differ from the thickness of the first waveguide layer 104 .

[0055] 3A, the second waveguide layer 112 is deposited or grown on the sacrificial layer 110. For example, the second waveguide layer 112 comprises SiN deposited using chemical vapor deposition, CVD, hot filament chemical vapor deposition, plasma enhanced chemical vapor deposition, PECVD, low pressure chemical vapor deposition (LPCVD), or other methods.

[0056] In some embodiments, the second waveguide layer 112 can be fabricated separately and bonded onto the sacrificial layer using flip-chip bonding. In the fabrication steps shown in Figures 3B through 3D, the second waveguide layer 112 can have a single-crystal Si layer 113 transferred from a silicon-on-insulator (SOI) wafer (also called a donor substrate) and bonded to the sacrificial layer 110. In the example shown in Figure 3B, the SOI wafer is a layered substrate having a Si substrate 114, a SiO2 layer 116, and a single-crystal Si layer 113. In some examples, the single-crystal Si layer 113 can have a thickness of 0.1 to 0.2 microns, 0.2 to 0.3 microns, 0.3 to 0.5 microns, or 0.5 to 1 micron. In the fabrication step shown in Figure 3C, a major surface of the Si layer 113 of the SOI wafer is brought into contact with a major surface (e.g., top surface) of the sacrificial layer 110 to form a bond (e.g., by thermal bonding). 3D, the Si substrate 114 is separated from the bonded Si layer 113 bonded to the sacrificial layer 110, for example by grinding the Si substrate 114 followed by wet etching the SiO2 layer 116, or optionally by wet etching the SiO2 layer 116. In this way, the Si layer 113 is transferred onto the sacrificial layer 110 and functions as the second waveguide layer 112.

[0057] In the fabrication steps shown in FIGS. 4A-4B, the second waveguide layer 112 can be patterned to form a commutation waveguide 133, and optionally, a structure (e.g., flexible support structure 120) supporting the commutation waveguide 133 can be formed on the sacrificial layer 110. FIGS. 4A and 4B show longitudinal cross sections of a portion of the fabricated layer structure taken along a B-B′ plane away from the coupling end of the commutation waveguide 133 and an A-A′ plane near the coupling end, respectively. FIG. 4C shows a top view of a portion of the second patterned waveguide layer 118 (also referred to as a suspended waveguide layer) including the second waveguide region 118a and the support structure 120. The second patterned waveguide layer 118 can include at least a portion of an optical switch (e.g., optical switch 135). The second waveguide region 118a can include the commutation waveguide 133 and optionally the support structure 120. The flexible support structure 120 can be configured to movably support the coupling regions 134, 136 of the commutation waveguide 133 (see FIG. 1A ). In some examples, the second waveguide region 118a can be a region where a majority of the optical energy (e.g., 90% or more or 95% or more of the optical energy) is confined. In some cases, the width of the second waveguide region 118a can be wider than the actual width of the commutation waveguide 133, which is defined by the width of the ridge or rib portion of the second patterned waveguide layer 118. In some embodiments, the flexible support structure 120 can be fabricated separately from the commutation optical waveguide 133 and can comprise a different material than the second patterned waveguide layer 118. In some cases, at least a portion of the flexible support structure 120 can be fabricated before or after patterning the second waveguide layer 112.

[0058] Fabrication of the bus optical waveguide may optionally include photolithographically patterning a photoresist layer on the second waveguide layer 112 and etching exposed areas of the waveguide layer (areas not covered by the hardened photoresist layer) to form waveguide region 118a of the patterned waveguide layer 112. In such cases, second waveguide region 118a includes commutation waveguide 133. In some examples, second waveguide region 118a may include a rib (or ridge) waveguide portion. In such cases, commutation optical waveguide 133 may include a rib (or ridge) optical waveguide. Second waveguide region 118a may confine an optical field in a lateral direction (e.g., along the y-axis) and a longitudinal direction (e.g., along the x-axis) and allow the confined optical field to propagate in a direction perpendicular to the lateral and longitudinal directions (e.g., along the z-axis).

[0059] In some embodiments, the geometric dimensions of the second waveguide region 118a (e.g., the width and thickness of the rib or ridge waveguide region 118a) may be configured to support propagation of a single optical mode (e.g., a single transverse optical mode) in the second waveguide region 118a at wavelengths within a particular wavelength range (e.g., a wavelength range suitable for optical communications). In some cases, the single optical mode may be a transverse electric (TE) mode of the second waveguide region 118a (commutation waveguide 133). In some examples, the thickness t4 of the rib (or ridge) portion of the second waveguide region 118a may be 0.1 to 0.2 microns, 0.2 to 0.3 microns, 0.3 to 0.5 microns, 0.5 to 1 micron, 1 micron to 1.5 microns, 1.5 to 2 microns, or any range formed by these values ​​or greater. In some examples, the thickness t3 of the second patterned waveguide layer 118 outside the rib (or ridge) portion of the second waveguide region 118a (also called the second slab portion) can be 0.05 to 0.1 microns, 0.1 to 0.15 microns, 0.1 to 0.2 microns, 0.2 to 0.3 microns, 0.3 to 0.5 microns, or more.

[0060] In some embodiments, the thickness of the sacrificial layer 110 along a vertical direction (e.g., the x-axis) perpendicular to the major surface of the Si substrate 101 can be 0.1 to 0.5 microns, 0.5 to 1 micron, 1 to 2 microns, 2 to 3 microns, 3 to 4 microns, or any range formed by these values ​​or more. In some cases, the thickness of the sacrificial layer 110 can be determined, at least in part, based on the configuration of the first and second waveguide layers 104, 112 and the geometric characteristics of the corresponding waveguide regions 108 a, 118 a, to provide a desired optical coupling strength (e.g., optical coupling coefficient) between the waveguide regions 108 a, 118 a when the commutating waveguide is in the on and off states.

[0061] 4D-4E, one or more through vias 126 may be formed in regions of the second waveguide region 118a away from both ends (e.g., coupling region 134 or coupling region 136 of commutation waveguide 133). The through vias 126 may include a clamping support structure (e.g., clamping support structure 122) for clamping a region (e.g., an intermediate region) of the second patterned waveguide layer 118. In some cases, the vias may extend from the upper surface of the second patterned waveguide layer 118 to the upper surfaces of the conductive lines (e.g., bottom conductive lines 106a, 106b) fabricated on the first patterned waveguide layer 108. FIG. 4D shows a vertical cross-section of a portion of the fabricated layer structure at section B-B' (shown in FIG. 4H) with a pair of vias 126 formed above each conductive line. FIG. 4E shows a longitudinal cross section of a portion of the fabricated layer structure at the A-A′ cross section (shown in FIG. 4H) near the end of a waveguide region 118a (e.g., coupling region 134 or 136 of commutation waveguide 133) where no vias are formed.

[0062] 4F-4G, the fabrication steps include filling the vias 126 with a fill material to form the clamping support structure 122 and optionally disposing and patterning a conductive layer on the second patterned waveguide layer 118 to form one or more electrodes (referred to as top electrodes). The second patterned conductive layer may comprise at least a first top electrode portion (e.g., electrode portions 123a, 123b) on the second patterned waveguide layer 118 above the clamping support structure. Optionally, the first top electrode portion may comprise a planar metal layer or region. Optionally, the vias may be filled with a conductive material. Optionally, the conductive material used to form the clamping support structure 122 may be substantially the same as the conductive material used to form the second patterned conductive layer. Optionally, the conductive material used to form the clamping support structure 122 may be different from the conductive material used to form the second conductive layer. Optionally, the conductive material may include aluminum, copper, gold, tungsten, or an alloy including one or more of these metals or other metals. Optionally, the vias may be filled with a non-conductive material (e.g., a dielectric, an organic material). In some examples, the clamp support structure 122 may include two or more conductive pillars or conductive vias (e.g., metal pillars) extending from the first top electrode portion to the bottom electrode.

[0063] The second patterned conductive layer may further include at least a second top electrode portion on the second patterned waveguide layer 118. The second top electrode portion (e.g., top conductive lines 124a, 124b) may extend from the first top electrode portion to the coupled end of the commutation waveguide 133. In some embodiments, the first and second top electrode portions may be electrically isolated such that a voltage difference exists between the second top electrode portion and the bottom electrode (e.g., bottom conductive lines 106a, 106b). In some cases, the first top electrode portion is not electrically connected to any circuitry.

[0064] In some embodiments, the second top electrode portion may include a conductive region formed on the second patterned waveguide layer 118 by increasing the conductivity of a region of the second patterned waveguide layer 118. In some cases, such a conductive region may be formed by doping the second patterned waveguide layer 118 by thermal diffusion, ion implantation, or other methods.

[0065] In various embodiments, the first and second top electrode portions can have any geometric shape, including, but not limited to, rectangular, square, circular, oval, and the like.

[0066] Figure 4F shows a longitudinal cross-section of a portion of the fabricated layered structure at a B-B' cut plane (shown in Figure 4H) away from the coupling end, depicting the first top electrode portions 123a, 123b and the clamping support structure 122 comprising conductive (e.g., metal) posts contacting the first top electrode portions 123a, 123b and the bottom conductive lines 106a, 106b. Figure 4G shows a longitudinal cross-section of a portion of the fabricated layered structure at an A-A' cut plane (shown in Figure 4H) near the coupling end of the commutation waveguide 133, depicting the second electrode portion comprising two top conductive lines 124a, 124b extending from the first top electrode portions 123a, 123b to the end of the second patterned waveguide layer 118 (e.g., along the coupling region of the commutation waveguide 133). In the illustrated example, the first top electrode portions 123 a, 123 b and the top conductive lines 124 a, 124 b (second top electrode portions) are separated by two insulating gaps, each gap being provided between the first top electrode portion (123 a or 123 b) and the top conductive line (124 a or 124 b). In some embodiments, instead of a metal layer, the second top electrode portion may have two doped conductive regions formed in the second patterned waveguide layer 118 and extending the first top electrode portions 123 a, 123 b to the coupling ends of the commutation waveguide 133.

[0067] FIG. 4H is a schematic plan view showing a portion of the second patterned waveguide layer 118 including the commutation waveguide and the second patterned conductive layer including the first upper electrode portions 123a, 123b and the second upper electrode portions (upper conductive lines 124a, 124b).

[0068] In some embodiments, the first top electrode portions 123a, 123b and the clamp support structure 122 are not electrically connected to any circuitry, and in some embodiments, the first top electrode portions 123a, 123b and the clamp support structure 122 are electrically isolated from the top conductive lines 124a, 124b.

[0069] 5A-5B, the fabrication steps include at least partially removing sacrificial layer 110 and suspending the unclamped portions of second patterned waveguide layer 118 to form an optical switch (optical switch 135). In various embodiments, sacrificial layer 110 (e.g., an organic sacrificial layer) can be removed by a dry etching process. Optionally, the dry etching process can include oxygen plasma etching or other processes involving oxidation of organic materials. Optionally, removing sacrificial layer 110 provides air gaps below at least longitudinal portions of second patterned waveguide layer 118 corresponding to coupling regions 134, 136 of commutation waveguide 133 such that, for example, when a potential difference is provided between top conductive lines 124a, 124b and bottom conductive lines 106a, 106b, coupling regions 134, 136 move toward and become optically coupled to bus waveguides 132a, 132b, respectively. Optionally, the removal (e.g., etching) process can be controlled so that a portion of the sacrificial layer 110 near the clamping support structure remains between the first and second patterned waveguide layers 108 and 118. Optionally, the remaining portion of the sacrificial layer 110 can provide additional support to the clamping portion of the second patterned waveguide layer 118. FIG. 5A shows a longitudinal cross-section of a portion of the fabricated layered structure at a B-B′ cut plane away from the bond after the sacrificial layer 110 removal process. As shown in FIG. 5A, a portion 130 of the sacrificial layer remains within the clamping support structure 122. Thus, optional, the clamping support structure 122 may have a hybrid structure including metallic regions (e.g., conductive posts or vias) and non-conductive (e.g., polymeric) regions. Optionally, the non-conductive regions of the clamping support structure 122 can mechanically reinforce the conductive regions. FIG. 5B shows a longitudinal cross section of a portion of the fabricated layered structure at the AA′ section near the coupling end of commutation waveguide 133, with sacrificial layer 110 completely removed to suspend the coupling region (e.g., coupling region 134 or 136) of commutation waveguide 133.The flexible support structure 120 partially supports the corresponding coupling region of the commutation waveguide 133 and helps the bent coupling region of the commutation waveguide 133 return to a neutral position and optically decouple from the bus waveguide when the state of the optical switch is changed from an on state to an off state.

[0070] In some embodiments, a cladding layer may be disposed on the commutation waveguide 133, for example, after the fabrication steps illustrated in Figures 4A-4B, to adjust the effective refractive index of the commutation waveguide 133 (e.g., the effective refractive index of the widest portion of the commutation waveguide 133). In some examples, the composition and thickness of the cladding layer may be configured such that when the optical switch is in the on state, the effective refractive index of the commutation waveguide 133 is close to the refractive index of the bus waveguide to which the commutation waveguide 133 is optically coupled. For example, second waveguide region 118a may constitute a core region of commutation waveguide 133 where light is confined, and cladding layer 500 may be a dielectric layer disposed on waveguide region 118a above the core region to adjust the effective refractive index of commutation waveguide 133 (or the group velocity of light propagating within commutation waveguide 133) to improve optical coupling between commutation waveguide 133 and a corresponding bus waveguide (e.g., 132a or 132b). In some examples, cladding layer 500 may comprise one or more dielectric layers coated on the core region of commutation waveguide 133. In some cases, the difference between the effective refractive index of branch waveguide 133 with cladding layer 500 and the effective refractive index of the bus waveguide may be 1% to 5% of the effective refractive index of the bus waveguide. In some examples, the effective refractive index of a commutation waveguide having a tapered portion (e.g., a tapered end region) can be determined based on the width of the commutation waveguide away from the tapered portion. For example, the effective refractive index can be determined based on the longitudinal region of the commutation waveguide that has the greatest width.

[0071] 5C shows a cross-sectional side view of optical switch 135 near one coupled end of commutation waveguide 133 when the optical switch is in the off state (solid line corresponding to FIG. 1B) and the on state (dashed line corresponding to FIG. 1C). As shown in FIG. 5C, clamping support structure 122 clamps the intermediate region of optical switch 135, and flexible support structure 120 allows commutation waveguide 133 to move vertically (e.g., along the x-axis) while providing an upward mechanical force Fmech.

[0072] Illustrative Embodiments Various additional exemplary embodiments of the present disclosure are illustrated by the following examples.

[0073] Group I Example 1. A fixed waveguide layer fixed on a substrate, the fixed waveguide layer comprising: a first bus optical waveguide extending between the first optical port and the second optical port; a second bus optical waveguide extending between the third optical port and the fourth optical port; a suspended waveguide layer suspended above a fixed waveguide layer, the suspended waveguide layer being vertically separated from the fixed waveguide layer and mechanically supported by a conductive clamping structure; the suspended waveguide layer comprises silicon nitride or single crystal silicon and has a commutation optical waveguide configured to redirect light from the first bus optical waveguide to the second optical bus waveguide; Upon electromechanical actuation, the commutation optical waveguide optically couples its first end region to the first bus optical waveguide and its second end region to the second bus optical waveguide, redirecting light; Photoswitching cell.

[0074] Example 2. The optical switching cell of example 1, wherein the conductive clamping structure clamps a longitudinal region of the commutating optical waveguide between a first end region and a second end region of the commutating optical waveguide, thereby defining a longitudinal distance between the fixed waveguide layer and the suspended waveguide layer.

[0075] Example 3. The optical switching cell of example 2, wherein the conductive clamping structure is formed above the fixed waveguide layer and has lithographically defined metal posts extending vertically through the suspended waveguide layer.

[0076] Example 4. The optical switching cell of example 3, wherein the metal pillars are formed of aluminum or copper.

[0077] Example 5. The optical switching cell of example 3, wherein the conductive clamping structure further comprises a planar metal layer connected to opposing ends of the metal posts.

[0078] Example 6. The optical switching cell of example 3, wherein the space between the fixed waveguide layer and the suspended waveguide layer does not contain any material other than the conductive clamp structure.

[0079] Example 7. The optical switching cell of Example 3, wherein the conductive clamping structure is not electrically connected to a circuit.

[0080] Example 8. The optical switching cell of Example 1, wherein the substrate comprises a silicon wafer having a silicon dioxide layer with an anchoring waveguide layer formed thereon.

[0081] Example 9. The optical switching cell of example 1, wherein the first bus optical waveguide comprises silicon nitride deposited over the removed sacrificial material.

[0082] Example 10. The optical switching cell of example 1, wherein the first bus optical waveguide comprises monocrystalline silicon transferred from a silicon-on-insulator (SOI) substrate by flip-chip bonding.

[0083] Example 11. The optical switching cell of example 1, wherein the first bus optical waveguide comprises a rib waveguide or a ridge waveguide.

[0084] Example 12. The optical switching cell of example 1, wherein the second bus optical waveguide comprises a rib waveguide or a ridge waveguide.

[0085] Example 13. The optical switching cell of example 1, wherein the first and second bus optical waveguides are configured to support propagation of light having one of two orthogonal polarizations.

[0086] Example 14. The optical switching cell of example 1, wherein the first and second bus optical waveguides are configured to support propagation of light having transverse electric (TE) polarization relative to the first and second bus optical waveguides.

[0087] Example 15. The optical switching cell of example 1, wherein the suspended waveguide layer further comprises a suspended conductive region.

[0088] Example 16. The optical switching cell of example 15, wherein the fixed waveguide layer further comprises a fixed conductive region.

[0089] Example 17. The optical switching cell of example 16, wherein applying a potential difference between the suspended conductive region and the fixed conductive region changes the state of the commutating optical waveguide from an off state to an on state.

[0090] Example 18. The optical switching cell of Example 17, wherein the suspended conductive region is configured to move at least one of the first and second end regions of the commutating optical waveguide along a longitudinal direction toward the substrate when a potential difference is applied between the suspended conductive region and the fixed conductive region.

[0091] Example 19. The optical switching cell of example 15, wherein the suspended conductive region comprises a patterned metal layer disposed on the suspended waveguide layer.

[0092] Example 20. The optical switching cell of example 19, wherein the suspended conductive region is fabricated with a conductive clamping structure.

[0093] Example 21. The optical switching cell of example 15, wherein the suspended conductive region comprises a doped portion of the suspended waveguide layer.

[0094] Example 22. The optical switching cell of example 16, wherein the fixed conductive region comprises a patterned metal layer disposed on the fixed waveguide layer.

[0095] Example 23. The optical switching cell of example 16, wherein the fixed conductive region comprises a doped portion of the fixed waveguide layer.

[0096] Example 24. The optical switching cell of example 19, wherein the patterned metal layer has two conductive lines on opposite sides of the commutating optical waveguide.

[0097] Example 25. The optical switching cell of example 1, wherein actuation of the optical switching cell causes the commutating optical waveguide to be in an on state and reduces a vertical separation between the fixed waveguide layer and each of the first and second end regions.

[0098] Example 26. The optical switching cell of Example 25, wherein when the commutation optical waveguide is in an on state, the first end region is optically coupled to the first bus optical waveguide and the second end region is optically coupled to the second bus optical waveguide such that greater than or equal to 90% of the optical power received from the first optical port is redirected to the fourth optical port.

[0099] Example 27. The optical switching cell of Example 26, wherein at least the first end region includes a tapered region configured to adiabatically couple light between the first end region and the first bus optical waveguide when the commutation optical waveguide is in an on state.

[0100] Example 28. The optical switching cell of example 2, wherein the suspended waveguide layer further comprises a flexible support structure configured to allow the first and second end regions to move vertically relative to the substrate.

[0101] Example 29. The optical switching cell of example 2, wherein the commutation optical waveguide comprises a core region and a cladding layer disposed on the core region, the cladding layer configured such that an effective refractive index of the commutation optical waveguide and an effective refractive index of the first and second bus optical waveguides are equal.

[0102] Group II Example 1. A method for fabricating a semiconductor device comprising: providing a fixed waveguide layer having a first bus optical waveguide and a second bus optical waveguide fixed on a substrate; forming a sacrificial layer on the fixed waveguide layer; forming a suspended waveguide layer having monocrystalline silicon on the sacrificial layer; forming a conductive clamp structure that vertically separates the fixed waveguide layer and the suspended waveguide layer; forming a commutation optical waveguide on the suspended waveguide layer configured to redirect light from a first bus optical waveguide to a second bus optical waveguide; removing the sacrificial layer such that the suspended waveguide layer is substantially mechanically supported above the fixed waveguide layer by a conductive clamping structure; wherein, upon electromechanical actuation, the commutation optical waveguide optically couples its first end region to the first bus optical waveguide and its second end region to the second bus optical waveguide to redirect light.

[0103] Example 2. The method of example 1, wherein removing the sacrificial layer includes removing by a dry etching process.

[0104] Example 3. The method of example 2, wherein the sacrificial layer comprises an organic material and removing the sacrificial layer comprises oxidizing the organic material.

[0105] Example 4. The method of example 2, wherein the sacrificial layer comprises an inorganic material and removing the sacrificial layer comprises selectively removing by reactive etching.

[0106] Example 5. The method of example 2, wherein forming the conductive clamping structure includes forming a vertical via through the suspended waveguide layer and further through the sacrificial layer, and filling the vertical via.

[0107] Example 6. The method of example 5, wherein forming the vertical via includes lithographically patterning and etching through the suspended waveguide layer and the sacrificial layer.

[0108] Example 7. The method of example 6, wherein filling the vertical vias includes depositing aluminum or copper.

[0109] Example 8. The method of example 2, wherein forming the suspended waveguide layer includes transferring the monocrystalline silicon layer from the donor substrate by flip-chip bonding.

[0110] Example 9. Flip chip bonding providing a silicon-on-insulator (SOI) substrate having a monocrystalline silicon layer formed over a silicon substrate and separated therefrom by a buried oxide (BOX) layer; contacting the monocrystalline silicon layer with the sacrificial layer to bond the monocrystalline silicon layer to the sacrificial layer; removing the silicon substrate and the BOX layer.

[0111] Example 10. The method of example 9, including direct thermal bonding without adhesive.

[0112] Example 11. The method of example 9, wherein the bonding comprises adhesive-free bonding.

[0113] Example 12. The method of example 1, wherein the substrate comprises a silicon wafer having a silicon dioxide layer with a fixed waveguide layer formed thereon.

[0114] Example 13. The method of example 1, wherein the first bus optical waveguide comprises a rib waveguide or a ridge waveguide.

[0115] Example 14. The method of example 1, wherein the second bus optical waveguide comprises a rib waveguide or a ridge waveguide.

[0116] Example 15. The method of example 1, wherein the first and second bus optical waveguides are configured to support propagation of light having one of two orthogonal polarizations.

[0117] Example 16. The method of example 1, wherein the first and second bus optical waveguides are configured to support propagation of light having transverse electric (TE) polarization relative to the first and second bus optical waveguides.

[0118] Example 17. The method of example 1, further comprising forming a fixed conductive region on the fixed waveguide layer before forming the sacrificial layer.

[0119] Example 18. The method of example 17, further comprising forming a suspended conductive region on the suspended waveguide layer.

[0120] Example 19. The method of example 18, wherein applying a potential difference between the fixed conductive region and the suspended conductive region causes at least one of the first end region and the second end region to move toward the substrate.

[0121] Example 20. The method of example 17, wherein forming the fixed conductive region includes disposing a first conductive layer on the fixed waveguide layer and lithographically patterning the first conductive layer.

[0122] Example 21. The method of example 18, wherein forming the suspended conductive region includes disposing a second conductive layer over the suspended waveguide layer and lithographically patterning the second conductive layer.

[0123] Example 22. The method of example 17, wherein forming the fixed conductive region includes doping the fixed waveguide layer.

[0124] Example 23. The method of example 18, wherein forming the suspended conductive region includes doping the suspended waveguide layer.

[0125] Example 24. The method of example 1, wherein when the optical switch is in an on state, the vertical separation between the substrate and the first and second end regions is decreased.

[0126] Example 25. The method of example 24, wherein when the commutation optical waveguide is in an on state, the first end region is optically coupled to the first bus optical waveguide and the second end region is optically coupled to the second bus optical waveguide, and greater than or equal to 95% of the optical power carried by the optical beam propagating in the first bus optical waveguide is transmitted to the second bus optical waveguide.

[0127] Example 26. The method of example 25, wherein at least the first end region includes a tapered region configured to adiabatically couple light between the first end region and the first bus optical waveguide when the commutation optical waveguide is in an on state.

[0128] Example 27. The method of example 1, wherein forming the commutating optical waveguide includes forming a flexible support structure configured to allow the first and second end regions to move longitudinally relative to the substrate.

[0129] Example 28. The method of example 21, wherein forming the conductive clamping structure includes disposing a second conductive layer.

[0130] Example 29. The method of example 1, wherein the conductive clamping structure includes a conductive post extending from the fixed waveguide layer to the suspended waveguide layer.

[0131] Example 30. The method of example 1, wherein the conductive clamping structure comprises copper or aluminum.

[0132] Example 31. The method of example 1, wherein the sacrificial layer comprises a polymer.

[0133] Example 32. The method of example 31, wherein the sacrificial layer comprises SU-8 or polyimide.

[0134] Example 33. The method of example 1, further comprising disposing a dielectric layer on the suspended waveguide layer before lithographically forming the commutating optical waveguide.

[0135] Example 34. The method of example 33, wherein forming the commutation optical waveguide includes forming an index matching layer on the commutation optical waveguide, the index matching layer configured to match an effective index of the commutation optical waveguide to an effective index of the first and second bus optical waveguides.

[0136] Group III Example 1. A method of making an optical switch, comprising: providing a fixed waveguide layer having a first bus optical waveguide and a second bus optical waveguide fixed on a substrate; forming a sacrificial layer on the fixed waveguide layer; forming a suspended waveguide layer comprising silicon nitride on the sacrificial layer; forming a conductive clamp structure that vertically separates the fixed waveguide layer and the suspended waveguide layer; forming a commutation optical waveguide on the suspended waveguide layer configured to redirect light from a first bus optical waveguide to a second bus optical waveguide; removing the sacrificial layer such that the suspended waveguide layer is substantially mechanically supported above the fixed waveguide layer by the conductive clamping structure; wherein, upon electromechanical actuation, the commutation optical waveguide optically couples its first end region to the first bus optical waveguide and its second end region to the second bus optical waveguide, redirecting light.

[0137] Example 2. The method of example 1, wherein removing the sacrificial layer includes removing by a dry etching process.

[0138] Example 3. The method of example 2, wherein the sacrificial layer comprises an organic material and removing the sacrificial layer comprises oxidizing the organic material.

[0139] Example 4. The method of example 2, wherein the sacrificial layer comprises an inorganic material and removing the sacrificial layer comprises selectively removing by reactive etching.

[0140] Example 5. The method of example 2, wherein forming the conductive clamping structure includes forming a vertical via through the suspended waveguide layer and further through the sacrificial layer and filling the vertical via.

[0141] Example 6. The method of example 5, wherein forming the vertical via includes lithographically patterning and etching through the suspended waveguide layer and the sacrificial layer.

[0142] Example 7. The method of example 6, wherein filling the vertical vias includes depositing aluminum or copper.

[0143] Example 8. The method of example 6, wherein the first and second bus optical waveguides comprise silicon nitride.

[0144] Example 9. The method of example 1, wherein forming the suspended waveguide layer includes depositing a silicon nitride layer using chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), or low-pressure chemical vapor deposition (LPCVD).

[0145] Example 10. The method of example 1, wherein the substrate comprises a silicon wafer having a silicon dioxide layer, the silicon dioxide layer having an anchoring waveguide layer formed thereon.

[0146] Example 11. The method of example 1, wherein the first bus optical waveguide comprises a rib waveguide or a ridge waveguide.

[0147] Example 12. The method of example 1, wherein the second bus optical waveguide comprises a rib waveguide or a ridge waveguide.

[0148] Example 13. The method of example 1, wherein the first bus light guide and the second bus light guide are configured to support propagation of light having one of two orthogonal polarizations.

[0149] Example 14. The method of example 1, wherein the first and second bus optical waveguides are configured to support propagation of light having transverse electric (TE) polarization relative to the first and second bus optical waveguides.

[0150] Example 15. The method of example 1, further comprising forming a fixed conductive region on the fixed waveguide layer before forming the sacrificial layer.

[0151] Example 16. The method of example 15, further comprising forming a suspended conductive region on the suspended waveguide layer.

[0152] Example 17. The method of example 16, wherein applying a potential difference between the fixed conductive region and the suspended conductive region causes at least one of the first end region and the second end region to move toward the substrate.

[0153] Example 18. The method of example 15, wherein forming the fixed conductive region includes disposing a first conductive layer on the fixed waveguide layer and lithographically patterning the first conductive layer.

[0154] Example 19. The method of example 16, wherein forming the suspended conductive region includes disposing a second conductive layer on the suspended waveguide layer and lithographically patterning the second conductive layer.

[0155] Example 20. The method of example 1, wherein when the optical switch is in an on state, the vertical separation between the substrate and the first and second end regions is decreased.

[0156] Example 21. The method of example 20, wherein when the commutation optical waveguide is in an on state, the first end region is optically coupled to the first bus optical waveguide and the second end region is optically coupled to the second bus optical waveguide, whereby greater than or equal to 95% of the optical power carried by the optical beam propagating in the first bus optical waveguide is transmitted to the second bus optical waveguide.

[0157] Example 22. The method of example 21, wherein at least the first end region includes a tapered region configured to adiabatically couple light between the first end region and the first bus optical waveguide when the commutation optical waveguide is in an on state.

[0158] Example 23. The method of example 1, wherein forming the commutating optical waveguide includes forming a flexible support structure configured to allow the first end region and the second end region to move vertically relative to the substrate.

[0159] Example 24. The method of example 19, wherein forming the conductive clamping structure includes disposing a second conductive layer.

[0160] Example 25. The method of example 1, wherein the conductive clamping structure includes a conductive post extending from the fixed waveguide layer to the suspended waveguide layer.

[0161] Example 26. The method of example 1, wherein the conductive clamping structure comprises copper or aluminum.

[0162] Example 27. The method of example 1, wherein the sacrificial layer comprises a polymer.

[0163] Example 28. The method of example 1, wherein the sacrificial layer comprises SU-8 or polyimide.

[0164] Example 29. The method of example 1, further comprising disposing a dielectric layer on the suspended waveguide layer before lithographically forming the commutating optical waveguide.

[0165] Example 30. The method of example 29, wherein forming the commutation optical waveguide includes forming an index matching layer on the commutation optical waveguide, the index matching layer configured to match an effective index of the commutation optical waveguide to an effective index of the first and second bus optical waveguides.

[0166] Other Considerations Additional details related to the present invention may employ materials and fabrication techniques within the level of ordinary skill in the relevant art. The same applies to method-based aspects of the invention, insofar as additional acts are generally or logically employed. It is also contemplated that any feature of the described inventive variations may be set forth and claimed independently or in combination with any one or more of the features described herein. Similarly, reference to a singular item includes the possibility of a plurality of the same item. More specifically, as used in this specification and the appended claims, the words "a," "and," "said," and "the" include plural references unless the context clearly dictates otherwise. It is further noted that the claims may be drafted to exclude any element. Therefore, this specification is intended as a predicate for the use of exclusive language, such as "solely," "only," or "negative" limitations in connection with the recitation of claim elements. Unless otherwise defined herein, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The breadth of the present invention is not limited by the subject specification, but rather only by the plain meaning of the claim terms employed.

[0167] In the above embodiments, devices, systems, and methods for detecting electrical overstress events have been described with reference to specific embodiments. However, it will be appreciated that the principles and advantages of the present embodiments may be used in any other system, device, or method having a need to detect and / or protect against electrical overstress events.

[0168] The principles and advantages described herein can be implemented in a variety of devices, including, but not limited to, consumer electronic products, consumer electronic product components, and electronic test equipment. Examples of consumer electronic product components include clocking circuits, analog-to-digital converters, amplifiers, rectifiers, programmable filters, attenuators, and variable frequency circuits. Examples of electronic devices include memory chips, memory modules, circuitry in optical and other communications networks, and disk driver circuits. Consumer electronic products include, but are not limited to, wireless devices, mobile phones (e.g., smartphones), mobile phone base stations, telephones, televisions, computer monitors, computers, handheld computers, tablet computers, laptop computers, personal digital assistants (PDAs), microwave ovens, refrigerators, stereo systems, cassette recorders or players, DVD players, CD players, digital video recorders (DVRs), VCRs, MP3 players, radios, camcorders, cameras, digital cameras, portable memory chips, washing machines, dryers, washer-dryers, copiers, fax machines, scanners, watches, smart watches, clocks, wearable health monitoring devices, etc. Additionally, equipment may include unfinished products.

[0169] Unless the context clearly dictates otherwise, throughout this specification and claims, terms such as "comprises," "having," "including," and the like are intended to be interpreted in an inclusive sense, rather than an exclusive or exhaustive sense. That is, "including, but not limited to." As generally used herein, terms such as "coupled" or "connected" refer to two or more elements that are directly connected or connected via one or more intermediate elements. Furthermore, as used in this application, terms such as "herein," "above," "described below," and the like, and terms of similar meaning, refer to this application as a whole and not to particular portions of this application. Where the context permits, words in the detailed description using the singular or plural may also include the singular or plural, respectively. The word "or" when referring to a list of two or more items is intended to include all of the following interpretations: any item in the list, all items in the list, and any combination of items in the list. All numerical values ​​provided herein are intended to include similar values ​​within the measurement error.

[0170] Additionally, conditional language used herein, e.g., "can," "can be," "may," "could," "for example," "such," and the like, is intended to generally convey that certain embodiments include certain features, elements, and / or conditions, but not other embodiments, unless specifically stated otherwise or understood otherwise within the context in which it is used.

[0171] The inventive teachings provided herein may be applied to other systems, not necessarily those described above. Elements and acts of the various embodiments described above may be combined to provide further embodiments. Acts of the methods described herein may be performed in any order, as appropriate. Furthermore, acts of the methods described herein may be performed serially or in parallel, as appropriate.

[0172] While specific embodiments of the present invention have been described, these embodiments are presented by way of example only and are not intended to limit the scope of the present disclosure. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms. Furthermore, various omissions, substitutions, and changes in the form of the methods and systems described herein may be made without departing from the spirit of the present disclosure. The appended claims and their equivalents are intended to cover such forms or modifications as fall within the scope and spirit of the present disclosure. The scope of the present invention is therefore defined by reference to the claims.

Claims

1. a fixed waveguide layer fixed on a substrate, the fixed waveguide layer comprising: a first bus optical waveguide extending between the first optical port and the second optical port; a second bus optical waveguide extending between the third optical port and the fourth optical port; a suspended waveguide layer suspended above the fixed waveguide layer, the suspended waveguide layer being vertically separated from the fixed waveguide layer and mechanically supported by a conductive clamping structure; the suspended waveguide layer comprises silicon nitride or single crystal silicon and has a commutation optical waveguide configured to redirect light from the first bus optical waveguide to the second optical bus waveguide; Upon electromechanical actuation, the commutation optical waveguide optically couples its first end region to the first bus optical waveguide and its second end region to the second bus optical waveguide to redirect the light. Photoswitching cell.

2. 2. The optical switching cell of claim 1, wherein the conductive clamping structure clamps a longitudinal region of the optical waveguide between the first end region and the second end region of the commutating optical waveguide, thereby defining a vertical distance between the fixed waveguide layer and the suspended waveguide layer.

3. 10. The optical switching cell of claim 1, wherein the conductive clamping structure comprises a lithographically defined metal post formed above the fixed waveguide layer and extending vertically through the suspended waveguide layer.

4. The optical switching cell of claim 3 , wherein the conductive clamping structure further comprises a planar metal layer connected to opposite ends of the metal pillar.

5. The optical switching cell of claim 3 , wherein the conductive clamping structure is not electrically connected to a circuit.

6. The optical switching cell of claim 1 , wherein the first bus optical waveguide comprises silicon nitride deposited over removed sacrificial material.

7. 6. The optical switching cell according to claim 1, wherein the first bus optical waveguide comprises monocrystalline silicon transferred from an SOI (Silicon-on-Insulator) substrate by flip-chip bonding.

8. The optical switching cell of claim 1 , wherein the suspended waveguide layer further comprises a suspended conductive region.

9. The optical switching cell of claim 8 , wherein the suspended conductive region is fabricated with a conductive clamping structure.

10. 6. An optical switching cell as claimed in any one of claims 1 to 5, wherein when the optical switching cell is operated, the first end region is optically coupled to the first bus optical waveguide, the second end region is optically coupled to the second bus optical waveguide, and more than 90% of the optical power received from the first optical port is redirected to the fourth optical port.

11. providing a fixed waveguide layer having a first bus optical waveguide and a second bus optical waveguide fixed on a substrate; forming a sacrificial layer on the fixed waveguide layer; forming a suspended waveguide layer comprising monocrystalline silicon on the sacrificial layer; forming a conductive clamp structure vertically separating the fixed waveguide layer and the suspended waveguide layer; forming a commutation optical waveguide on the suspended waveguide layer configured to redirect light from the first bus optical waveguide to the second bus optical waveguide; removing the sacrificial layer such that the suspended waveguide layer is substantially mechanically supported above the fixed waveguide layer by the conductive clamping structure; wherein, upon electromechanical actuation, the commutation optical waveguide optically couples its first end region to the first bus optical waveguide and its second end region to the second bus optical waveguide to redirect the light.

12. The method of claim 11 , wherein removing the sacrificial layer comprises removing by a dry etching process.

13. 12. The method of claim 11, wherein forming the conductive clamping structure comprises forming a vertical via through the suspended waveguide layer and further through the sacrificial layer, and filling the vertical via.

14. 14. The method of any one of claims 11 to 13, wherein forming the suspended waveguide layer comprises transferring a monocrystalline silicon layer from a donor substrate by flip-chip bonding.

15. Flip chip bonding is providing a silicon-on-insulator (SOI) substrate having the monocrystalline silicon layer formed above a silicon substrate and separated by a buried oxide (BOX) layer; contacting the monocrystalline silicon layer with the sacrificial layer to bond the monocrystalline silicon layer to the sacrificial layer; and removing the silicon substrate and the BOX layer.

16. 14. The method of claim 11, further comprising forming an index matching layer on the commutation optical waveguide, the index matching layer configured to match an effective index of the commutation optical waveguide to an effective index of the first and second bus optical waveguides.

17. 1. A method of making an optical switch, comprising: providing a fixed waveguide layer having a first bus optical waveguide and a second bus optical waveguide fixed on a substrate; forming a sacrificial layer on the fixed waveguide layer; forming a suspended waveguide layer comprising silicon nitride on the sacrificial layer; forming a conductive clamp structure vertically separating the fixed waveguide layer and the suspended waveguide layer; forming a commutation optical waveguide on the suspended waveguide layer configured to redirect light from the first bus optical waveguide to the second bus optical waveguide; removing the sacrificial layer such that the suspended waveguide layer is substantially mechanically supported above the fixed waveguide layer by the conductive clamping structure; wherein, upon electromechanical actuation, the commutation optical waveguide optically couples its first end region to the first bus optical waveguide and its second end region to the second bus optical waveguide to redirect the light.

18. 20. The method of claim 17, wherein the sacrificial layer comprises an organic material, and removing the sacrificial layer comprises oxidizing the organic material.

19. 19. The method of claim 17 or 18, wherein forming the conductive clamping structure comprises lithographically patterning and etching through the suspended waveguide layer and the sacrificial layer.

20. 19. The method of claim 17 or 18, wherein forming the conductive clamping structure comprises forming a conductive region on the suspended waveguide layer.