High-voltage sampling circuit, high-voltage sampling method, and battery management system

Abstract

The high-voltage sampling circuit includes a high-voltage MOS transistor (201) and a battery sampling device (202). The output terminal of the battery sampling device (202) is connected to the gate of the high-voltage MOS transistor (201) and is used to output a high or low level. The analog-to-digital conversion terminal of the battery sampling device (202) is connected to the source of the high-voltage MOS transistor (201) and is used to collect the voltage of the source of the high-voltage MOS transistor (201). The drain of the high-voltage MOS transistor (201) is connected to the positive electrode of the battery pack via a first voltage dividing resistor (203). The source of the high-voltage MOS transistor (201) is connected to the negative electrode of the battery pack via a second voltage dividing resistor (204). When the battery sampling device (202) outputs a high level to the high-voltage MOS transistor (201), it collects the voltage passing through the high-voltage MOS transistor (201) and converts it to obtain the power supply voltage of the battery pack. Compared to an optical coupler, using a high-voltage MOS transistor as the high-voltage sampling electronic switch can reduce costs. It also relates to a high voltage sampling method and a battery management system.

Description

[Technical Field]

[0001] The present invention relates to the field of battery technology, and in particular to a high voltage sampling circuit, a high voltage sampling method and a battery management system. [Background technology]

[0002] The battery pack is one of the three most important components of a new energy vehicle. To ensure the safety of users and the safety of the vehicle's electric control unit, and to ensure safe charging and discharging and efficient energy utilization by the electric control unit in the new energy vehicle, a high-voltage sampling circuit is required to sample the connection status of relays and other components in the high-voltage circuit of the battery pack. In the high-voltage sampling circuit, new energy vehicle companies often use optocouplers as electronic switches, but the cost of optocouplers is high. Summary of the Invention

[0003] SUMMARY OF THE INVENTION The present invention provides a high voltage sampling circuit, a high voltage sampling method and a battery management system to solve the shortcomings in the related art.

[0004] According to a first aspect of the present invention, there is provided a high-voltage sampling circuit for collecting voltage from a battery pack, wherein a positive electrode of the battery pack is connected to a positive relay, and a negative electrode of the battery pack is connected to a negative relay, and the high-voltage sampling circuit includes a high-voltage MOS transistor and a battery sampling device; The output terminal of the battery sampling device is connected to the gate of the high-voltage MOS transistor and is used to output a high level or a low level; an analog-to-digital conversion terminal of the battery sampling device is connected to the source of the high-voltage MOS transistor and is used to collect the voltage of the source of the high-voltage MOS transistor; a drain of the high-voltage MOS transistor is connected to a positive electrode of the battery pack via a first voltage dividing resistor, and a source of the high-voltage MOS transistor is connected to a negative electrode of the battery pack via a second voltage dividing resistor; A high-voltage sampling circuit is provided, which is used for collecting the voltage passing through the high-voltage MOS transistor when the battery sampling device outputs a high level to the high-voltage MOS transistor and obtaining the power supply voltage of the battery pack after conversion.

[0005] In some embodiments, a gate of the high-voltage MOS transistor is connected to one end of a third voltage dividing resistor, and the other end of the third voltage dividing resistor is connected to an output terminal of the battery sampling device; The gate of the high-voltage MOS transistor is connected to one end of a fourth voltage dividing resistor, and the other end of the fourth voltage dividing resistor is grounded.

[0006] In some embodiments, the circuitry further includes a filter circuit for filtering the voltage collected by the battery sampling device; a filter current limiting resistor in the filter circuit is connected in series between the source of the high-voltage MOS transistor and the analog-to-digital conversion terminal of the battery sampling device; One end of the filter capacitor in the filter circuit is connected to the analog-to-digital conversion terminal of the battery sampling device, and the other end of the filter capacitor is grounded.

[0007] In some embodiments, the circuit further comprises a shunt; a first end of the shunt connected to the negative terminal of the battery pack, a second end of the shunt connected to the negative terminal relay, and a third end of the shunt connected to a current sampling pin of the battery sampling device; The battery sampling device is used to collect the current passing through the shunt.

[0008] In some embodiments, the first voltage dividing resistor includes a plurality of sub-resistors, each sub-resistor being connected in series; The resistance values ​​of the sub-resistors may be the same and / or different, and the number and resistance values ​​of the sub-resistors are determined according to the required divided voltage value.

[0009] In some embodiments, the high-voltage MOS transistor is The source-drain voltage of the high-voltage MOS transistor is higher than the power supply voltage of the battery pack; The maximum gate-source voltage of the high-voltage MOS transistor is greater than the power supply voltage of the battery pack; and the distance between the pins of the high-voltage MOS transistors is greater than a distance threshold.

[0010] According to a second aspect of the present invention, there is provided a method for performing high voltage sampling using the high voltage sampling circuit according to any one of the above aspects, comprising: In response to receiving a high voltage sampling command from the battery sampling device, the output terminal is controlled to output a high level, thereby making the gate and source of the high voltage MOS transistor conductive; and using an analog-to-digital conversion terminal of the battery sampling device to collect the voltage passing through the high-voltage MOS transistor, and obtain a power supply voltage of the battery pack after conversion.

[0011] In some embodiments, the method further comprises: The method further includes collecting current passing through a shunt from a current sampling pin in response to the battery sampling device receiving a current sampling command.

[0012] According to a third aspect of the embodiment of the present invention, there is provided a battery management system including the high-voltage sampling circuit according to any one of the above aspects.

[0013] As can be seen from the above embodiments, the high-voltage sampling circuit according to the present invention includes a high-voltage MOS transistor and a battery sampling device, the output terminal of which is connected to the gate of the high-voltage MOS transistor and is used to output a high or low level signal, the analog-to-digital conversion terminal of which is connected to the source of the high-voltage MOS transistor and is used to collect the source voltage of the high-voltage MOS transistor, the drain of which is connected to the positive electrode of the battery pack via a first voltage divider resistor, and the source of the high-voltage MOS transistor is connected to the negative electrode of the battery pack via a second voltage divider resistor, and when the battery sampling device outputs a high level signal to the high-voltage MOS transistor, it collects the voltage passing through the high-voltage MOS transistor and uses it to obtain the power supply voltage of the battery pack after conversion, and compared with an optocoupler, using the high-voltage MOS transistor as the high-voltage sampling electronic switch can reduce costs.

[0014] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. [Brief explanation of the drawings]

[0015] The drawings herein are incorporated in and constitute a part of the specification, illustrate embodiments consistent with the present invention, and together with the specification, serve to explain the principles of the invention. [Figure 1] 1 is a schematic diagram illustrating a high-voltage sampling circuit employing an optical coupler according to an embodiment of the present invention as an electronic switch; [Figure 2] 1 is a schematic diagram showing a high-voltage sampling circuit employing a high-voltage MOS transistor as an electronic switch according to an embodiment of the present invention; [Figure 3] 1 is a schematic diagram illustrating a high-voltage sampling circuit including a shunt according to an embodiment of the present invention. [Figure 4] 1 is a schematic diagram illustrating a high-pressure sampling method according to an embodiment of the present invention. [Figure 5]1 is a specific schematic diagram showing a high-voltage sampling circuit according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION

[0016] Illustrative embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description refers to the drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise noted. It should be noted that the embodiments described in the following illustrative examples do not represent all embodiments consistent with the present invention. On the contrary, they are merely examples of apparatus and methods consistent with certain aspects of the present invention, as set forth in the appended claims.

[0017] The terms used in the present invention are merely for the purpose of describing particular embodiments and are not intended to limit the present invention. As used in the present invention and in the claims, the singular forms "a," "the," and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used in the present invention means to include any and all possible combinations of one or more of the associated listed items.

[0018] While the present invention may use terms such as "first," "second," and "third" to describe various pieces of information, it should be understood that such information is not limited to these terms. These terms are used only to distinguish between pieces of information of the same type. For example, first information may be referred to as "second information," and similarly, second information may be referred to as "first information" without departing from the scope of the present invention. Also, depending on the context, the word "if" used herein may be interpreted as "with," "when," or "in response to a determination."

[0019] An optical coupler (OC) is also known as an optical isolator or optical coupler, and is abbreviated to "optical coupler." An optical coupler is a device that transmits electrical signals using light as a medium, and is usually composed of a light emitter (infrared light emitting diode LED) and a light receiver (photodiode) enclosed in the same case. When an electrical signal is applied to the input terminal, the light emitter emits light, and the light receiver receives the light and generates a photocurrent, which flows from the output terminal, thereby achieving "electrical-optical-electrical" conversion.

[0020] 1 is a schematic diagram of a high-voltage sampling circuit using an optical coupler as an electronic switch according to an embodiment of the present invention. In high-voltage sampling circuits, new energy vehicle companies often use optical couplers as electronic switches, but the cost of optical couplers is high.

[0021] In view of this, an embodiment of the present invention provides a high-voltage sampling circuit that uses a high-voltage MOS transistor as an electronic switch for high-voltage sampling, and compared with an optical coupler, adopting a high-voltage MOS transistor can reduce costs.

[0022] The design principles of high-voltage architectures in new energy vehicles are basically the same, and the high-voltage positive side of the battery pack is equipped with pyrotechnical safety switches (PSS), traditional fuses, positive relays, pre-charge relays, and fast-charge relays, all of which are abbreviated as fuses. These are primarily intended to reduce the risk of short circuits, and it is also possible to design circuits for real-time monitoring of the voltage and status information of each of the aforementioned devices. Therefore, high-voltage sampling of the battery pack is divided into multiple paths, and the sampling principle for each path is the same, and the high-voltage sampling circuit according to the embodiment of the present invention can be applied to any of these paths.

[0023] The following embodiments will explain a high-voltage sampling circuit according to the present invention with reference to the drawings.

[0024] The high voltage sampling circuit of the present invention is used to collect voltage from a battery pack, and the positive electrode of the battery pack is connected to a positive relay, and the negative electrode of the battery pack is connected to a negative relay. Figure 2 is a schematic diagram showing a high voltage sampling circuit using a high voltage MOS transistor as an electronic switch according to an embodiment of the present invention. As shown in Figure 2, the circuit includes a high voltage MOS transistor 201 and a battery sampling device 202.

[0025] The output terminal of the battery sampling device 202 is connected to the gate of the high-voltage MOS transistor 201 and is used to output a high level or a low level.

[0026] The analog-to-digital conversion terminal of the battery sampling device 202 is connected to the source of the high-voltage MOS transistor 201 and is used to collect the voltage of the source of the high-voltage MOS transistor.

[0027] The drain of the high-voltage MOS transistor 201 is connected to the positive electrode of the battery pack via a first voltage dividing resistor 203, and the source of the high-voltage MOS transistor is connected to the negative electrode of the battery pack via a second voltage dividing resistor 204.

[0028] The battery sampling device 202 is used to collect the voltage passing through the high voltage MOS transistor 201 when outputting a high level to the high voltage MOS transistor 201, and obtain the power supply voltage of the battery pack after conversion.

[0029] The battery sampling device may include a battery monitor unit (BMU) and a circuit supervision control unit (CSC), and the circuit supervision control unit CSC includes a battery sampling chip (analog front end (AFE)). The battery sampling chip AFE may include a 16-bit analog-to-digital converter (ADC), a high-precision voltage reference, a high-voltage multiplexer, and a serial peripheral interface (SPI), and the battery sampling chip AFE and the battery management unit BMU communicate serially.

[0030] In this embodiment, the output terminal of the battery sampling chip is connected to the gate of the high-voltage MOS transistor, and the analog-to-digital conversion terminal of the battery sampling chip is connected to the source of the high-voltage MOS transistor. The battery management unit (BMU) reads the register of the battery sampling chip via SPI communication and converts the read voltage to obtain the power supply voltage of the battery pack.

[0031] In one embodiment, the battery sampling chip may be an AFE2950 chip. As will be appreciated by those skilled in the art, the battery sampling chip may be any chip with a different model number, and the present invention is not limited thereto.

[0032] In some embodiments, the high level output from the battery sampling device is usually greater than the on level of the high-voltage MOS transistor, and in order to reduce the high level input to the high-voltage MOS transistor, a voltage divider resistor can be connected in series between the high-voltage MOS transistor and the battery sampling device. As shown in Figure 2, the gate of the high-voltage MOS transistor can be connected to one end of a third voltage divider resistor 205, the other end of which is connected to the output terminal of the battery sampling device, and the gate of the high-voltage MOS transistor can be connected to one end of a fourth voltage divider resistor 206, the other end of which is grounded.

[0033] For example, the voltage sampling device can output a high level of 12V, and the on-voltage of the high-voltage MOS transistor is 4.5V. In this case, the voltage can be divided using the third and fourth voltage dividing resistors.

[0034] In some embodiments, the circuit may further include a filter circuit for filtering the voltage collected by the battery sampling device. As shown in Figure 2, a filter current limiting resistor 207 in the filter circuit is connected in series between the source of the high-voltage MOS transistor and the analog-to-digital conversion terminal of the battery sampling device, one end of a filter capacitor 208 in the filter circuit is connected to the analog-to-digital conversion terminal of the battery sampling device, and the other end of the filter capacitor 208 is grounded.

[0035] In the embodiments of the present invention, the high-voltage sampling circuit and the BMU may be integrated on one PCB board, or the high-voltage sampling circuit and the BMU may be separated, or the high-voltage sampling and current sampling may be integrated on one PCB board, and the present invention is not limited thereto.

[0036] In some embodiments, the circuit further includes a shunt, a first end of the shunt connected to a negative terminal of the battery pack, a second end of the shunt connected to the negative relay, and a third end of the shunt connected to a current sampling pin of the battery sampling device, the battery sampling device being used to collect current passing through the shunt.

[0037] 3 is a schematic diagram showing a high-voltage sampling circuit including a shunt according to an embodiment of the present invention, and as shown in FIG. 3, a third end of the shunt may be connected to the IxA pin and the IxB pin of the battery sampling device. The high-voltage sampling circuit according to an embodiment of the present invention can sample both voltage and current.

[0038] In some embodiments, the first voltage dividing resistor may include multiple sub-resistors, each sub-resistor being connected in series, with the resistance values ​​of the sub-resistors being the same and / or different, and the number and resistance values ​​of the sub-resistors being determined according to the required voltage dividing value.

[0039] In an embodiment of the present invention, the resistance value and number of each sub-resistor in the first voltage dividing resistor may be determined by comprehensively considering the power supply voltage of the battery pack, the on-state internal resistance of the high-voltage MOS transistor, and the second voltage dividing resistor. In actual selection, the withstand voltage performance of the resistor may be taken into consideration. For example, if the maximum operating voltage of a certain resistor is 200V, selecting five or six resistors on an 800V voltage platform will meet the voltage dividing requirements. Furthermore, the resistance value of each sub-resistor may be selected in the MΩ range, such as a 1MΩ resistor or a 2.4MΩ resistor, taking into consideration factors such as the voltage discrimination range of the ADC in the battery sampling chip and the high-voltage sampling accuracy. For example, on an 800V voltage platform, six sub-resistors with a resistance value of 1MΩ may be selected.

[0040] The second voltage dividing resistor may be selected to have a resistance value in the kΩ range based on the voltage discrimination range of the ADC interface of the voltage sampling device. Therefore, the resistance value of each sub-resistor in the first voltage dividing resistor is much greater than the resistance value of the second voltage dividing resistor. For example, in this embodiment, the resistance value of the second voltage dividing resistor may be 15 kΩ.

[0041] In the embodiment of the present invention, when selecting a high-voltage MOS transistor, the withstand voltage performance, insulating performance, etc. of the high-voltage MOS transistor can be taken into consideration, and specifically, the selection may be made based on the following conditions.

[0042] (1) The source-drain voltage of the high-voltage MOS transistor is greater than the power supply voltage of the battery pack.

[0043] That is, when considering derating from the viewpoint of the withstand voltage performance of the drain and source of a high-voltage MOS transistor, the V DS The drain and source breakdown voltage is required to be greater than the platform voltage to which it is applied. For example, an 800V battery pack platform may select a MOS transistor with a voltage of 1000V or more.

[0044] (2) The maximum gate-source voltage of the high-voltage MOS transistor is greater than the power supply voltage of the battery pack.

[0045] Maximum gate-source voltage V of a high-voltage MOS transistor ESD(G-S) It is necessary to have a margin at least larger than the maximum voltage of the platform to satisfy tests such as ESD. Taking an 800V battery pack platform as an example, the V of selectable MOS transistors ESD(G-S) The value is 3000V.

[0046] (3) The distance between the pins of the high-voltage MOS transistors is greater than a distance threshold.

[0047] Regarding the sealing surface of a high-voltage MOS transistor, the space between the pins of the high-voltage MOS transistor must meet the requirements for high and low voltage isolation surfaces. For example, for a high voltage of 600V to 1000V, a device with a pin-to-pin distance of at least 5mm should be selected.

[0048] (4) The leakage current of the high-voltage MOS transistor is smaller than the current threshold.

[0049] Since a large leakage current means a large sampling error when sampling in a high-temperature environment, it is preferable for the leakage current of the high-voltage MOS transistor to be small. In one example, the current threshold may be 50 μA. As will be appreciated by those skilled in the art, the current threshold may change with technological advances. For example, with technological advances, high-voltage MOS transistors with smaller leakage currents may be produced, in which case the current threshold may be adjusted as needed.

[0050] In the embodiment of the present invention, the on-internal resistance of a high-voltage MOS transistor is generally small and can be substantially ignored for a high-voltage circuit, so that the on-internal resistance of a high-voltage MOS transistor does not need to be taken into consideration at the time of selection.

[0051] As will be understood by those skilled in the art, the above 800V voltage platform is an example for explaining how to select an appropriate high-voltage MOS transistor, and does not limit the present invention. Appropriate high-voltage MOS transistors can also be selected for voltage platforms of 800V or more based on the above selection conditions.

[0052] In the following embodiment, the performance when a high-voltage MOS transistor and an optical coupler are used as an electronic switch will be compared and explained.

[0053] The following table compares high-voltage MOS transistors and optocouplers in high-voltage sampling circuits from different perspectives. [Table 1]

[0054] The above table will now be described in detail.

[0055] (1) Compared to optical couplers, the use of high-voltage MOS transistors in the high-voltage sampling circuit can reduce costs.

[0056] To intuitively demonstrate the cost advantage of high-voltage MOS transistors, this example quantifies the cost using specific model numbers. Taking the TLX9160T optical coupler and the STD4NK100Z high-voltage MOS transistor as an example, the cost of one TLX9160T optical coupler is about 14 RMB, and the cost of one STD4NK100Z high-voltage MOS transistor is about 5 RMB, so replacing just one can save 9 RMB. When replacing multiple paths or for large-scale production, the cost reduction of the product is very significant.

[0057] (2) High-voltage MOS transistors consume less power.

[0058] High-voltage MOS transistors are voltage-controlled devices, and their current consumption is very small, whereas the normal operation of an optical coupler requires the constant consumption of a large current.

[0059] (3) The size of high-voltage MOS transistors is small.

[0060] The small size of high-voltage MOS transistors reduces PCB space. As electronic devices become increasingly smaller and more integrated, the PCB space saved by simplifying circuits can reduce product volume, optimize layout, and improve product reliability.

[0061] The length, width, and height of the high-voltage MOS transistor are 10.1 mm x 6.6 mm x 2.4 mm, respectively, and the length, width, and height of the optical coupler are 10.5 mm x 10.2 mm x 2.55 mm, respectively. In terms of size, it can be seen that the high-voltage MOS transistor is significantly smaller than the optical coupler.

[0062] (4) The number of discrete components is small, which simplifies the circuit and reduces the failure rate.

[0063] In circuit design, the more components there are, the greater the risk of failure; that is, the more components there are, the greater the probability of component degradation and failure. Comparing Figures 1 and 2, we can see that replacing the optical coupler with a high-voltage MOS transistor reduces the number of discrete driving components, simplifies the circuit, and improves reliability.

[0064] (5) High-voltage MOS transistors have larger overcurrent capability and lower on-state internal resistance.

[0065] Exemplarily, overcurrent parameters: The MOS transistor has ID=2.2A (25°C) and ID=1.0A (100°C). The optical coupler has an ION = 50 mA (25°C) and an ION = 10 mA (125°C).

[0066] On-state internal resistance: The MOS transistor has R(DS)ON=6.8Ω (VDS=10V, ID=1.1A, T=25℃), The optical coupler has a RON of 250 Ω (max) (ION = 50 mA, IF = 10 mA, T = 25°C).

[0067] As can be seen from the above comparison, compared with an optical coupler, a high-voltage MOS transistor has a larger overcurrent capability and a lower on-state internal resistance, and can be powered by a battery sampling chip AFE, eliminating the need for a separate battery power supply.

[0068] In summary, the high voltage sampling circuit of the present invention can reduce costs, simplify the circuit, improve product reliability, and reduce the product failure rate.

[0069] Based on the same inventive idea, the present invention further provides a method for performing high-voltage sampling using the high-voltage sampling circuit described in the above embodiment. Figure 4 is a schematic diagram showing a high-voltage sampling method according to an embodiment of the present invention. As shown in Figure 4, the method includes the following steps 401 and 402:

[0070] In step 401, in response to receiving a high voltage sampling command, the battery sampling device controls the output terminal to output a high level, making the gate and source of the high voltage MOS transistor conductive.

[0071] In step 402, the analog-to-digital conversion terminal of the battery sampling device is used to collect the voltage passing through the high-voltage MOS transistor, and after conversion, obtain the power supply voltage of the battery pack.

[0072] In some embodiments, the method further includes collecting current through a shunt from a current sampling pin in response to the battery sampling device receiving a current sampling command.

[0073] FIG. 5 is a specific schematic diagram of a high-voltage sampling circuit according to an embodiment of the present invention. As shown in FIG. 5, PSS, FUSE, and LINK are fuses, which are electrical elements for ensuring the safe operation of the circuit and may be understood as short-circuit protectors for short-circuit protection or severe overload protection. The high-voltage sampling of the battery pack has multiple paths, and the sampling principle for each path is the same. FIG. 5 takes FUSE+sampling as an example. In FIG. 5, the first voltage dividing resistor includes five sub-resistors R1 to R5, the second voltage dividing resistor is represented by R6, the third voltage dividing resistor is represented by R8, the fourth voltage dividing resistor is represented by R9, the filter current limiting resistor is represented by R7, and the filter capacitor is represented by C1.

[0074] When the battery management system BMS is powered on and enters operating mode, the battery management unit BMU sends a command to the battery sampling chip to operate the register of the battery sampling chip, causing the GPO pin of the battery sampling chip to output a high level. The high level is divided by resistors R8 and R9, causing the high-voltage MOS transistor to conduct, and the divided sampling voltage is filtered and transmitted to the battery sampling chip using the voltage division principle. The battery management unit BMU reads the register value corresponding to the battery sampling chip through IsoSPI communication, converts the read value to obtain the power supply voltage, and determines the next operation based on the obtained power supply voltage.

[0075] The present invention further provides a battery management system including the high-voltage sampling circuit according to any one of the above embodiments, which can significantly reduce product costs, simplify the circuit, and improve product reliability and competitiveness while still meeting product performance requirements.

[0076] At least one embodiment of the present invention provides a new energy vehicle to which the above-mentioned battery management system is applied, wherein the high-voltage sampling circuit in the battery management system of the new energy vehicle uses a high-voltage MOS transistor as an electronic switch, and the battery management system stores executable computer instructions, and when the computer instructions are executed, the high-voltage sampling method described in any of the embodiments of the present invention can be implemented.

[0077] At least one embodiment of the present invention further provides a computer-readable storage medium having stored thereon a computer program, which, when executed by a processor, performs any of the high-voltage sampling methods of the present invention.

[0078] As will be appreciated by those skilled in the art, one or more embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, one or more embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware. Furthermore, one or more embodiments of the present invention may take the form of a computer program product embodied in one or more computer-usable storage media (including, but not limited to, magnetic disk memory, CD-ROM, optical memory, etc.) containing computer-usable program code.

[0079] In the present invention, "and / or" means having at least one of two, for example, "A and / or B" includes the three cases of A, B, and "A and B."

[0080] Each embodiment of the present invention will be described step by step, and commonalities and similarities between the embodiments may be referred to, and differences between each embodiment will be emphasized. In particular, the data processing device embodiment is basically similar to the method embodiment, and therefore the description will be simplified, and relevant parts may be referred to the description of the method embodiment.

[0081] Specific embodiments of the present invention have been described above. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims may be performed in a different order than in the examples and still achieve desirable results. Also, the processes depicted in the figures do not necessarily require the particular order shown or sequential order to achieve desirable results. In some embodiments, multitasking and parallel processing may be possible or advantageous.

[0082] Although the present invention includes many specific implementation details, these should not be construed as limiting the scope of the invention or the claims, but are used primarily to describe the features of specific embodiments of the invention. Specific features described in multiple embodiments of the invention may be implemented in combination in a single embodiment. Conversely, various features described in a single embodiment may be implemented separately in multiple embodiments or in any suitable subcombination. Also, while features may function in a combination as described above and are initially claimed as such, one or more features from a claimed combination may, in some cases, be deleted from that combination, and a claimed combination may refer to a subcombination or a variation of a subcombination.

[0083] Similarly, although operations are shown in a particular order in the figures, this should not be understood as requiring that these operations be performed in the particular order shown, or sequentially, or that all of the illustrated operations be performed, to achieve desired results. Multitasking or parallel processing may be advantageous in some cases. Furthermore, the separation of system modules and components in the above examples should not be understood as requiring such separation in all embodiments; the program components and systems described may typically be integrated into a single software product or packaged into multiple software products.

[0084] The foregoing describes specific embodiments of the present invention. Other embodiments are within the scope of the following claims. In some cases, the actions recited in the claims may be performed in a different order to achieve desirable results. Also, the processes depicted in the figures do not necessarily require the particular order shown or sequential order to achieve desirable results. In some implementations, multitasking or parallel processing may be advantageous.

[0085] It should be noted that in the drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. Furthermore, when an element or layer is described as being "on" another element or layer, it may be directly on top of the other element, or intermediate layers may be present. Furthermore, when an element or layer is described as being "below" another element or layer, it may be directly below the other element, or one or more intermediate layers or elements may be present. Furthermore, when a layer or element is described as being "between" two layers or elements, it may be the only layer between the two layers or elements, or one or more intermediate layers or elements may be present. Like reference symbols indicate like elements.

[0086] In the present invention, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance. The term "plurality" refers to two or more, unless specifically limited.

[0087] Other embodiments of the present invention will readily occur to those skilled in the art after considering the specification and practicing the disclosures herein. The present invention is intended to cover any modifications, uses, or adaptations of the present invention, which modifications, uses, or adaptations comply with the general principles of the present invention and include common general knowledge or customary technical means in the art that are not disclosed herein. The specification and examples are exemplary only, with the true scope and spirit of the invention being indicated by the following claims.

[0088] It should be understood that the present invention is not limited to the exact construction described above and illustrated in the drawings, and various modifications and variations are possible without departing from the scope of the present invention, which is limited only by the appended claims.

Claims

1. A high-voltage sampling circuit for collecting voltage from a battery pack, wherein a positive electrode of the battery pack is connected to a positive relay and a negative electrode of the battery pack is connected to a negative relay, and the high-voltage sampling circuit includes a high-voltage MOS transistor and a battery sampling device; an output terminal of the battery sampling device is connected to the gate of the high-voltage MOS transistor and is used to output a high level or a low level; an analog-to-digital conversion terminal of the battery sampling device is connected to the source of the high-voltage MOS transistor and is used to collect the voltage of the source of the high-voltage MOS transistor; a drain of the high-voltage MOS transistor is connected to a positive electrode of the battery pack via a first voltage dividing resistor, and a source of the high-voltage MOS transistor is connected to a negative electrode of the battery pack via a second voltage dividing resistor; the battery sampling device is used to collect a voltage passing through the high-voltage MOS transistor when outputting a high level to the high-voltage MOS transistor, and obtain a power supply voltage of the battery pack after conversion; A high-voltage sampling circuit comprising:

2. a gate of the high-voltage MOS transistor is connected to one end of a third voltage dividing resistor, and the other end of the third voltage dividing resistor is connected to the output end of the battery sampling device; a gate of the high-voltage MOS transistor is connected to one end of a fourth voltage dividing resistor, and the other end of the fourth voltage dividing resistor is grounded; 2. The circuit of claim 1.

3. further comprising a filter circuit for filtering the voltage collected by the battery sampling device; a filter current limiting resistor in the filter circuit is connected in series between a source of the high-voltage MOS transistor and an analog-to-digital conversion terminal of the battery sampling device; one end of a filter capacitor in the filter circuit is connected to an analog-to-digital conversion terminal of the battery sampling device, and the other end of the filter capacitor is grounded; 2. The circuit of claim 1.

4. further comprising a current divider; a first end of the shunt connected to the negative terminal of the battery pack, a second end of the shunt connected to the negative terminal relay, and a third end of the shunt connected to a current sampling pin of the battery sampling device; the battery sampling device is used to collect the current passing through the shunt; 4. The circuit according to claim 1, wherein the first and second electrodes are electrically connected to each other.

5. the first voltage dividing resistor includes a plurality of sub-resistors, each of which is connected in series; The resistance values ​​of the sub-resistors may be the same and / or different, and the number and resistance values ​​of the sub-resistors are determined according to a required divided voltage value.

4. The circuit according to claim 1, wherein the first and second electrodes are electrically connected to each other.

6. The high-voltage MOS transistor is The source-drain voltage of the high-voltage MOS transistor is higher than the power supply voltage of the battery pack; The maximum gate-source voltage of the high-voltage MOS transistor is greater than the power supply voltage of the battery pack; the distance between the pins of the high-voltage MOS transistors is greater than a distance threshold; 4. The circuit according to claim 1, wherein the first and second electrodes are electrically connected to each other.

7. A method for performing high-voltage sampling using the high-voltage sampling circuit according to any one of claims 1 to 6, comprising: In response to receiving a high voltage sampling command from the battery sampling device, the output terminal is controlled to output a high level, thereby making the gate and source of the high voltage MOS transistor conductive; and collecting a voltage passing through the high-voltage MOS transistor using an analog-to-digital conversion terminal of the battery sampling device, and obtaining a power supply voltage of the battery pack after conversion. A method characterized by:

8. and collecting current passing through a shunt from a current sampling pin in response to the battery sampling device receiving a current sampling command.

8. The method of claim 7.

9. A high-voltage sampling circuit comprising the high-voltage sampling circuit according to any one of claims 1 to 6. A battery management system characterized by:

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