Surface code calculations using iSWAP gates
iSWAP gates are used in surface codes to address the challenge of quantum error correction in quantum computing, providing efficient and reliable error correction by reducing qubit movement and padding, thereby optimizing computational resources.
Patent Information
- Application Number
- JP2025540895
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-01-12
- Filing Date
- 2024-01-12
- Publication Date
- 2026-02-03
AI Technical Summary
Existing quantum computing systems face challenges in implementing reliable quantum error correction due to the limitations of physical qubits, as they cannot be copied and require efficient error correction methods like surface codes, which are difficult to implement with conventional gates like CNOT and CZ.
The use of iSWAP gates in surface codes to perform entangling operations, allowing for efficient and reliable error correction by reducing logical qubit movement and qubit padding, and alternating surface code cycles to optimize computational resources.
iSWAP gates provide a more efficient and reliable method for quantum error correction, reducing calibration constraints and optimizing computational resources by minimizing qubit movement and padding, thus enhancing the performance of quantum computers.
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Figure 2026504076000001_ABST
Abstract
Description
[Technical Field]
[0001] This specification relates to quantum computing. [Background technology]
[0002] Quantum computing offers a means to solve certain problems that cannot be solved in a reasonable period of time using conventional classical computers. These problems include factoring very large numbers into prime numbers and searching large unstructured data sets. Many physical systems, including ions, spins in semiconductors, and superconducting circuits, are being investigated for use in quantum computing. However, none of these systems are functional enough to act directly as computational qubits. For example, a single two-state physical system that could be used as a physical qubit cannot reliably encode information and retain it long enough to be useful.
[0003] Scalable quantum computers therefore require quantum error correction. Classical error correction employs redundancy. For example, in a repetition code, information is copied and stored multiple times. If the copies are later found to be inconsistent, an error can be determined and a majority vote can be taken to recover the information. Due to the quantum no-cloning theorem, quantum information cannot be copied. Therefore, quantum error correction codes spread the logical information of one qubit across the entangled states of multiple physical qubits. The multiple physical qubits are collectively referred to as logical qubits.
[0004] Surface codes are a family of quantum error-correcting codes defined on a two-dimensional grid of qubits. In surface codes, physical qubits are entangled using a series of physical-qubit CNOT operations, and subsequent measurements of the entangled state provide a means for error correction and error detection. A set of entangled physical qubits is then used to define a logical qubit, which, through entangling and measurement, has significantly better performance than the underlying physical qubit. One of the major advantages of surface codes is their relative tolerance to localized errors. Surface codes can handle an error rate of approximately 3% per surface code clock cycle, which is much less stringent than alternative quantum computing approaches. This error tolerance, along with the simple two-dimensional qubit layout, makes surface code architectures a realistic approach for building solid-state quantum computers. Summary of the Invention
[0005] Described herein are techniques for constructing surface codes using iSWAP gates.
[0006] One innovative aspect of the subject matter described herein can be practiced in a method including performing a first surface code cycle in a system including a plurality of physical qubits arranged on a grid, wherein performing the first surface code cycle includes applying a first entangling operation between a ground state measurement qubit and a first data qubit, the first entangling operation including a first iSWAP gate consecutively with application of at least one other operation, such that a result of applying the first entangling operation between the ground state measurement qubit and the first data qubit is equal to a result of applying a CZ gate between the ground state measurement qubit and the first data qubit. applying a second iSWAP gate between the measurement qubit and the second data qubit, applying a third iSWAP gate between the measurement qubit and the third data qubit, applying a second entangling operation between the measurement qubit and a fourth data qubit, the second entangling operation including a fourth iSWAP gate followed by application of at least one other operation, whereby a result of applying the second entangling operation to the measurement qubit and the fourth data qubit is equal to a result of applying a CZ gate between the measurement qubit and the fourth data qubit, and measuring the measurement qubit to detect the error.
[0007] Further implementations of these aspects include corresponding computer systems, devices, and computer programs recorded on one or more computer storage devices, each configured to perform the actions of the methods. One or more classical and quantum computer systems can be configured to perform particular operations or actions by having installed thereon software, firmware, hardware, or a combination thereof that causes the system to perform the actions during operation. One or more computer programs can be configured to perform particular operations or actions by including instructions that, when executed by a data processing device, cause the device to perform the actions.
[0008] Each of the above and other embodiments may optionally include one or more of the following features, alone or in combination: In some embodiments, applying the first entangling operation further includes applying one or more single-qubit gates to the measurement qubit and the first data qubit.
[0009] In some implementations, applying the one or more single-qubit gates to the measurement qubit includes applying a Hadamard gate to the measurement qubit before applying the first iSWAP gate.
[0010] In some embodiments, applying the one or more single-qubit gates to the measurement qubit and the first data qubit comprises applying a first iSWAP gate followed by applying an inverse S gate to the measurement qubit and the first data qubit, and applying a Hadamard gate to the first data qubit.
[0011] In some embodiments, applying the second entangling operation includes applying a Hadamard gate to the fourth data qubit before applying the fourth iSWAP gate.
[0012] In some embodiments, applying the second entangling operation comprises applying a fourth iSWAP gate followed by applying an inverse S gate to the measurement qubit and the fourth data qubit, and applying a Hadamard gate to the measurement qubit.
[0013] In some implementations, the method further includes applying a reset operation to the measurement qubit to reset the measurement qubit to a ground state before applying the first entangling operation.
[0014] In some embodiments, performing a first surface code cycle transfers information encoded by the measurement qubit and the first, second, third, and fourth data qubits to another qubit in the grid.
[0015] In some implementations, information encoded by the measurement qubit travels to another qubit within the grid in a first direction, and information encoded by one or more of the first data qubit, the second data qubit, the third data qubit, or the fourth data qubit travels to another qubit within the grid in a second direction, the second direction being opposite to the first direction.
[0016] In some implementations, in a third direction perpendicular to the first direction, information encoded by the measurement qubits and the data qubits coupled to the measurement qubits moves collectively within the grid.
[0017] In some implementations, the method further includes performing a second surface code cycle, where performing the second surface code cycle includes performing the first surface code cycle in reverse order.
[0018] The subject matter described herein can be implemented in a particular manner to realize one or more of the following advantages.
[0019] Some quantum hardware can perform the iSWAP gate more efficiently and reliably than other two-qubit gates, such as the CNOT or CZ gates. For example, the iSWAP gate typically introduces fewer calibration constraints than the CZ gate. The circuit schedules described herein are particularly suited to such quantum hardware and provide new surface code compilations that use the iSWAP gate instead of the CNOT or CZ gate. Furthermore, the circuit schedules described herein are designed to reduce the logical movement of qubits (i.e., the movement of information within the qubit array) and reduce the amount of qubit padding required for information drift (thus optimizing the amount of required computational resources). Furthermore, the circuit schedules two different surface code cycles alternately so that the logical movement of the qubits fluctuates around a central position and does not drift in one direction (also optimizing the amount of required computational resources because less space is required).
[0020] The details of one or more embodiments of the subject matter herein are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages of the subject matter will become apparent from the description, drawings, and claims. [Brief explanation of the drawings]
[0021] [Figure 1] FIG. 1 is a block diagram of an exemplary system for implementing iSWAP surface codes. [Figure 2] 10 is a flowchart of an exemplary process for performing an iSWAP surface code cycle. [Figure 3A] 1 shows an exemplary quantum circuit for implementing a first entangling operation. [Figure 3B] 1 shows an exemplary quantum circuit for implementing the second entangling operation. [Figure 4-1] 1 illustrates an exemplary quantum circuit layer for performing iSWAP surface code cycles. [Figure 4-2] 1 illustrates an exemplary quantum circuit layer for performing iSWAP surface code cycles. [Figure 5] 1 is an illustration showing how information encoded by qubits contained in a surface code patch is transferred. [Figure 6A] It shows the interactions performed by the measurement qubit and tracks the transfer of information stored by the measurement. [Figure 6B] It shows the interactions performed by the measurement qubit and tracks the transfer of information stored by the measurement. [Figure 6C] It shows the interactions performed by the measurement qubit and tracks the transfer of information stored by the measurement. [Figure 6D] It shows the interactions performed by the measurement qubit and tracks the transfer of information stored by the measurement. [Figure 6E] It shows the interactions performed by the measurement qubit and tracks the transfer of information stored by the measurement. [Figure 6F] It shows the interactions performed by the measurement qubit and tracks the transfer of information stored by the measurement. [Figure 6G] It shows the interactions performed by the measurement qubit and tracks the transfer of information stored by the measurement. [Figure 7] 10 illustrates an exemplary qubit grid padding for transferring information encoded by measurement qubits. [Figure 8] 1 illustrates an exemplary quantum computer. DETAILED DESCRIPTION OF THE INVENTION
[0022] Like reference symbols and designations in the various drawings indicate like elements.
[0023] The iSWAP gate is a two-qubit quantum logic gate that implements an XX+YY interaction, where applying the iSWAP gate, the states of the two qubits are swapped with the amplitudes of the phases of the states |01〉 and |10〉, depending on i. In matrix representation, the iSWAP gate is given by:
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[0024] Some quantum hardware can perform the iSWAP gate more efficiently and reliably than other two-qubit gates, such as the CNOT gate or the CZ gate. For example, the iSWAP gate typically introduces fewer calibration constraints than the CZ gate. However, the action of the iSWAP gate is similar to that of a CZ gate combined with a SWAP gate. Thus, applying the iSWAP gate to a patch of qubits transfers the information encoded by the patch of qubits to another qubit, deforming the logical layout of the running patch. This then makes it difficult to monitor where the information is encoded and how to operate or couple the patch of qubits.
[0025] This specification describes a technique for implementing surface codes using iSWAP gates, for example, instead of CZ or CNOT gates. The technique includes a quantum circuit schedule of iSWAP gates that implements surface code cycles. The circuit schedule is designed to reduce the logical movement of qubits (i.e., the movement of information within the qubit array) and reduce the amount of qubit padding required for information drift. Furthermore, the circuit alternately schedules two different surface code cycles so that the logical movement of qubits fluctuates around a central position and does not drift in one direction.
[0026] 1 is a block diagram of an exemplary system for implementing the iSWAP surface code. Exemplary system 100 is an example of a system implemented as part of a quantum computing device that can implement the systems, components, and techniques described herein.
[0027] System 100 includes multiple qubits 102 in communication with control electronics 104. Qubits 102 are physical qubits, e.g., physical devices that operate as quantum systems with at least two states. Each qubit can be in a respective quantum state, occupying one or more levels. The levels can include at least two computational levels (e.g., levels 0 and 1) and one or more non-computational levels (e.g., levels 2 and 3), each higher than the computational qubit levels. Populating the higher non-computational qubit levels can introduce errors into algorithmic operations or quantum computations performed using the qubits. For example, occupancy of qubit levels outside the computational subspace can interfere with or prevent the performance of quantum error correction operations.
[0028] In some implementations, qubit 102 can be a superconducting qubit or a semiconductor qubit. For example, qubit 102 can include an Xmon qubit, a flux qubit, a phase qubit, or a qubit that provides frequency interactions. In general, qubit 102 is a physical device configured to meet the fundamental requirements of quantum computing. For example, qubit 102 includes physical devices that can be initialized, physical devices that can perform single-qubit rotations, physical devices that can participate in two-qubit entangling operations such as iSWAP gates, CZ gates, and CNOT gates, physical devices that can perform a topological version of the Hadamard transform by exchanging their quantum states in a SWAP operation, and physical devices that can be measured.
[0029] The qubits 102 can be arranged in an array. For example, as shown in Figure 1, in some implementations, the qubits 102 can be arranged as a two-dimensional array, such as a square lattice 110. The exemplary two-dimensional grid 110 shown in Figure 1 includes 11 x 7 = 77 qubits, although in some implementations, the system 100 can include a fewer or greater number of qubits.
[0030] The qubits 102 can interact with each other through multiple qubit couplers. The qubit couplers can define nearest-neighbor interactions between qubits, for example, so that each qubit interacts with up to four neighboring qubits in a square lattice. The couplers can, in principle, be any type of coupler (e.g., capacitive or inductive). In some implementations, the strength of the coupler can be controllable, e.g., frequency controllable. In other implementations, the coupler can be a coupler with a fixed coupling strength.
[0031] Control electronics 104 includes a control device (e.g., an arbitrary waveform generator) capable of operating multiple qubits 102. For example, control electronics 104 may include a control device that adjusts the operating frequency of qubits 102 by applying control signals (e.g., voltage pulses) to the qubits via respective control lines.
[0032] As another example, the control electronics 104 can control the individual frequencies of the qubits 102, thereby adjusting the frequency of one or more of the qubits toward or away from the frequency of excitation pulses generated by an excitation pulse generator on an excitation drive line. The excitation pulses may include pulses with frequencies that perform quantum operations, e.g., quantum logic gates. The qubits 102 can be coupled to one or more excitation drive lines via respective couplers. In some cases, the couplers may be capacitive couplers, realized, for example, by microwave lines running adjacent to the qubit capacitors.
[0033] Control electronics 104 may also include a control device that adjusts the frequency of a coupler that couples multiple qubits 102 .
[0034] The type of control electronics 104 utilized by system 100 depends on the type of qubits the system uses. For example, qubits implemented by atomic, molecular, or solid-state quantum systems typically provide energy separation of associated qubit levels in the microwave or optical domain. The states of such qubits can be manipulated and controlled using external fields, such as those in the microwave or optical domain. In such cases, for example, a mode-locked laser can serve as the control electronics, thanks to its broadband optical spectrum featuring both radio frequency and microwave structures. In other examples, control electronics 104 can include a collection of individual qubit controllers implemented by radio frequency generators and one or a collection of global excitation controllers implemented by radio frequency or microwave generators. In either case, control electronics 104 can be operated manually or connected to a computer (e.g., a classical computer) and controlled using appropriate software that allows the required qubit operations to be specified and executed automatically.
[0035] System 100 can program control electronics 104 to implement surface codes. To implement surface codes, each qubit in plurality of qubits 102 has one of two functional types: a data qubit (e.g., qubit 106) and a measurement qubit (e.g., qubit 108). A data qubit (e.g., qubit 106) is a qubit that participates in a quantum computation performed by system 100 and stores quantum information corresponding to the quantum computation. That is, the state of a data qubit encodes the logical information of the quantum computation. A measurement qubit is a qubit used to determine the result of a computation performed by a data qubit. For example, during a computation, the unknown state of a data qubit can be correlated with the state of a measurement qubit using an appropriate physical operation, and the measurement qubit can then be measured. The measurement qubits may include an X measurement qubit (e.g., a measurement qubit located at the center of a light gray square, such as square 128) and a Z measurement qubit (e.g., a measurement qubit located at the center of a dark gray square, such as square 130).
[0036] Each data qubit is directly coupled to multiple measurement qubits (and not directly coupled to any other data qubits), and each measurement qubit is directly coupled to multiple data qubits (and not directly coupled to any other measurement qubits). For example, each measurement qubit is coupled to four data qubits (if the measurement qubit is in the bulk, and to fewer data qubits if the measurement qubit is at a boundary). Each data qubit is coupled to two Z measurement qubits and two X measurement qubits (if the data qubit is in the bulk, and to fewer measurement qubits if the data qubit is at a boundary).
[0037] The Z measurement qubit multiplies its neighboring data qubits a, b, c, and d by the operator
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[0038] In conventional implementations of surface codes (different from the implementations described in this disclosure), control electronics 104 operates on the Z and X measurement qubits by repeatedly applying quantum circuits to the Z and X measurement qubits and neighboring data qubits. Each application of the quantum circuit performs one surface code cycle. Each quantum circuit includes a sequence of operations applied to one or more physical qubits. In some examples, the measurement qubit is first reset, for example, to its basis state. Next, four entangling operations, for example, CNOT gates or CZ gates, are performed. For the Z measurement qubit, each of the four entangling operations targets the measurement qubit, with each nearest-neighbor data qubit acting as the control qubit for each entangling operation. For the X measurement qubit, each of the four entangling operations targets each nearest-neighbor data qubit, with the X measurement qubit acting as the control qubit for each of the four entangling operations. In this case, the sequence of operations also includes Hadamard gates applied to the measurement qubit before and after the entangling operations. After the entangling operation is performed, the measurement qubit is measured, for example, by a projection measurement, followed by a subsequent surface code cycle.
[0039] Unlike conventional implementations of surface codes, the implementation of the surface code described herein uses iSWAP gates instead of CNOT or CZ gates, and therefore the surface code described herein is referred to herein as an iSWAP surface code 112.
[0040] As described in more detail below, the iSWAP surface code cycle also includes four layers of entangling operations, each of which includes an iSWAP gate. After the measurement qubit of a surface code patch is reset, the first layer of entangling operations is applied to the qubit contained in the surface code patch. Thus, as described in more detail below, the first layer of entangling operations can be designed to be exactly equivalent to a CZ gate (and can also be exactly equivalent to a CNOT gate by including an additional Hadamard gate and using the relationship HZH=X, where H represents a Hadamard gate, Z represents a Pauli Z gate, and X represents a Pauli X gate). The fourth layer of entangling operations is applied to the qubit contained in the surface code patch before the measurement qubit contained in the surface code patch is measured. Thus, as explained in more detail below, the fourth layer of entangling operations can also be designed to be exactly equivalent to a CZ gate or a CNOT gate (with a change of frame tracked by classical control hardware). By applying four layers of entangling operations, the information encoded by the qubits contained in the surface code patches moves, as shown, for example, by deformed surface code patches 114 and 116 (where the lighter gray shapes (e.g., shape 132) represent XXXX stabilizers and the darker gray shapes (e.g., shape 134) represent ZZZZ stabilizers). Thus, successive iSWAP surface code cycles alternate between executing cycles in the forward direction and the reverse direction, so that the information does not continue to move in the same direction.
[0041] 2 is a flowchart of an exemplary process 200 for performing an iSWAP surface code cycle. For convenience, process 200 is described as being performed by components of a quantum computing system. For example, classical control electronics in communication with an array of physical qubits, such as control electronics 104 of FIG. 1, can be appropriately programmed to perform exemplary process 200.
[0042] For clarity, exemplary process 200 is described with reference to performing an iSWAP surface code cycle on one (bulk) measurement qubit coupled to four data qubits, however, exemplary process 200 can be performed (in parallel) for each of multiple data qubits and their neighboring measurement qubits included in a surface code patch.
[0043] The system applies a reset operation to the measurement qubit to reset the measurement qubit to the ground state (step 202).
[0044] The system applies a first entangling operation between the ground state measurement qubit and the first data qubit (step 204). The first entangling operation is a sequence of gates including a first iSWAP gate and one or more single-qubit gates determined such that a result of applying the first entangling operation is equal to a result of applying a CZ gate between the ground state measurement qubit and the first data qubit.
[0045] 3A shows an exemplary quantum circuit 300 that implements a first entangling operation. As shown in FIG. 3A, when an iSWAP gate is applied to a qubit that is being reset, the iSWAP gate functions as a controlled Pauli gate. For example, applying a reset operation 302 to a first qubit followed by a first CNOT gate 304 between the first qubit and a second qubit (where the second qubit functions as the control qubit) is equivalent to applying a reset operation 302 and a second CNOT gate 306 to the first qubit and the second qubit (where the first qubit functions as the control qubit) and applying the first CNOT gate 304 after the second CNOT gate 306. This is because after reset operation 302, the first qubit is known to be in the 0 state, and thus the CNOT gate has no effect on the second qubit (because the CNOT gate only flips the state of the target qubit if the control qubit is in the 1 state.) In other words, the result of applying operation 302 followed by operation 304 is the same as the result of applying operation 302 followed by operation 306 followed by operation 304.
[0046] According to Cartan's KAK decomposition, the sequential application of two CNOT gates to the same two qubits (where the control of the CNOT gates is different) results in the same interaction as the iSWAP gate. Therefore, a single-qubit gate can be added before or after two CNOT gates to obtain a gate sequence equivalent to the iSWAP gate. Similarly, a single-qubit gate can be added before or after an iSWAP gate to obtain a gate sequence exactly equivalent to the sequential application of two CNOT gates (or two CZ gates) to the same two qubits (where the control of the CNOT gates or CZ gates is different). For example, as shown in FIG. 3A, the sequential application of CNOT gates 306 and 304 is equivalent to the application of a first Hadamard gate 308 to the first qubit, an iSWAP gate 310 between the first and second qubits, inverse-S gates 312 and 314 to the first and second qubits, and a second Hadamard gate 316 to the second qubit, respectively.
[0047] Returning to FIG. 2, the system applies a second iSWAP gate between the measurement qubit and the second data qubit (step 206).
[0048] The system applies a third iSWAP gate between the measurement qubit and the third data qubit (step 208).
[0049] The system applies a second entangling operation between the measurement qubit and the fourth data qubit (step 210). The second entangling operation is a sequence of gates including a fourth iSWAP gate and one or more single-qubit gates such that a result of applying the second entangling operation is equal to a result of applying a CZ gate between the measurement qubit and the fourth data qubit in their basis states.
[0050] FIG. 3B shows an exemplary quantum circuit 320 that implements a second entangling operation. As shown in FIG. 3B, when an iSWAP gate is applied before a measurement operation, the iSWAP gate functions as a controlled Pauli gate. For example, applying a CNOT gate 322 to a first qubit and a second qubit (the first qubit functions as a control qubit), followed by a measurement operation 324 on the second qubit, is equivalent to applying a CNOT gate 322, followed by two CNOT gates 326 and 328 (the second qubit functions as a control qubit), followed by a measurement operation 324 on the second qubit. This is because the square of the Pauli matrix is an identity matrix, so sequential application of the same controlled Pauli gate to two qubits does not affect the two qubits. In other words, the result of applying operation 322 followed by operation 324 is the same as the result of applying operation 322 followed by operation 326, followed by operation 328, followed by operation 324.
[0051] As described above with reference to FIG. 3A, the sequential application of two CNOT gates to the same two qubits (with different controls for the CNOT gates) results in the same interaction as the iSWAP gate. Therefore, a single-qubit gate can be added before or after two CNOT gates to obtain a gate sequence equivalent to the iSWAP gate. Similarly, a single-qubit gate can be added before or after an iSWAP gate to obtain a gate sequence exactly equivalent to the sequential application of two CNOT gates (or two CZ gates) to the same two qubits (where the controls for the CNOT gates or CZ gates are different). For example, as shown in FIG. 3B, the sequential application of CNOT gates 322 and 326 is equivalent to the application of a first Hadamard gate 330 to the first qubit, an iSWAP gate 332 between the first and second qubits, inverse-S gates 334 and 336 to the first and second qubits, and a second Hadamard gate 338 to the second qubit, respectively.
[0052] This leaves the CNOT gate 340. However, because the second qubit functions only as a control qubit in the CNOT gate 430, the CNOT gate 340 can be applied after the measurement operation 324 has been performed on the second qubit, for example, as a classical controlled NOT operation 342. In quantum error correction circuits, the Pauli feedback does not need to be performed in real time, but can be addressed by post-processing of the measurement results; i.e., there is no need to perform the controlled NOT operation 342 during the surface code cycle.
[0053] Returning to Figure 2, the system measures the measurement qubit (step 212). The result of the measurement can be used to detect errors in the quantum computation being performed by the data qubit.
[0054] 4 shows exemplary quantum circuit layers for performing an iSWAP surface code cycle. Illustrated layer 402 corresponds to step 202 of illustrative process 200 of FIG. 2 and shows each measurement qubit of a surface code patch being reset, e.g., by applying a reset operation, such as reset operation 420. In each illustrative layer, qubits located at the centers of the darker gray squares (e.g., square 430) and lighter gray squares (e.g., square 432) represent data qubits, and qubits located at the vertices of the darker gray squares (e.g., square 430) and lighter gray squares (e.g., square 432) represent measurement qubits.
[0055] 2 and show a first layer of entangling operations being applied to each measurement qubit and data qubit coupled to the measurement qubit in a first direction (in this example, the northwest direction). As described above with reference to FIG. 2, the first layer of entangling operations includes a layer of iSWAP gates 404b, including, for example, iSWAP gate 422. The first layer of entangling operations also includes a first layer of single-qubit gates 404a applied to both the measurement qubit and the data qubit included in the surface code patch, and a second layer of single-qubit gates 404c applied to both the measurement qubit and the data qubit included in the surface code patch.
[0056] The illustrations of layers 406 and 408 correspond to steps 206 and 208 in example process 200 of Figure 2 and show two layers of iSWAP gates applied to respective measurement and data qubits coupled to the measurement qubit in a second and third direction, which are parallel to each other and perpendicular to the first direction (in this example, the second and third directions are northeast and southwest, respectively).
[0057] The illustration of layers 410a-c corresponds to step 210 of exemplary process 200 of FIG. 2 and shows a layer of a second entangling operation being applied to each measurement qubit and data qubit coupled to a measurement qubit in the fourth direction. The fourth direction is parallel to the first direction (in this example, the southeast direction). As described above with reference to FIG. 2, the layer of the second entangling operation includes a layer of iSWAP gates 410b. The layer of the second entangling operation also includes a first layer of single-qubit gates 410a applied to both the measurement qubit and the data qubit included in the surface code patch, and a second layer of single-qubit gates 410c applied to both the measurement qubit and the data qubit included in the surface code patch. In layers 404a, 404c, 410a, and 410c, the single-qubit gates are labeled “H,” “HXY,” or “CXYZ.”
[0058] The illustration of layer 412 corresponds to step 212 of exemplary process 200 of FIG. 2 and shows each measurement qubit of the surface-code patch being measured, for example, by applying a measurement operation such as measurement operation 420.
[0059] As described above with reference to FIG. 1, application of the four layers 404, 406, 408, and 410 of entangling operations transfers information encoded by a qubit contained in a surface code patch to another qubit in the grid. FIG. 5 is an illustration showing how information encoded by a qubit contained in a surface code patch is transferred. For illustrative purposes, FIG. 5 (and FIGS. 6A-6G) describe the transfer of information by moving the qubit. However, in a physical implementation, the physical qubit remains in the same location in the grid, and the information stored by the physical qubit is transferred.
[0060] By construction, during a first surface code cycle, the measurement qubits included in the surface code patch move in a first direction. The data qubits move in a second direction, where the second direction is opposite to the first direction. This movement forms a "conveyor belt" of moving qubits (e.g., conveyor belt 502, etc.), which move collectively / together. As the qubit conveyor belt moves, qubits on a line (e.g., line 504), in this example, on a diagonal extending from the bottom left of the grid to the top right of the grid, and having a third direction that is perpendicular to the direction in which the conveyor belt extends, move collectively and remain on the line; that is, their positions relative to each other do not change. In other words, the measurement qubits remain next to and move "through" the data qubits along their conveyors.
[0061] This means that when the first surface code cycle described with reference to Figures 2 and 4 is repeated, the measurement qubit and the data qubit continue to move in the same direction, so that the surface code patches are pulled further and further apart until they are destroyed. Thus, the iSWAP surface code alternates between running the first surface code cycle in the forward direction (described with reference to Figures 2 and 4) and running it in the reverse direction (i.e., in reverse order).
[0062] For example, two successive cycles of the iSWAP surface code can be performed as follows: reset the measurement qubit, perform a CZ-style entangling operation to interact with a first data qubit, advance the conveyor one step, whereby the second data qubit and the measurement qubit interact as they cross, advance the conveyor one step, whereby the third data qubit and the measurement qubit interact as they cross, perform a CZ-style entangling operation to interact with a fourth data qubit, measure the measurement qubit, reset the measurement qubit, perform a CZ-style entangling operation to interact with the first data qubit, move the conveyor back one step, whereby the second data qubit and the measurement qubit interact as they cross, move the conveyor back one step, whereby the third data qubit and the measurement qubit interact as they cross, perform a CZ-style entangling operation to interact with the fourth data qubit, and measure the measurement qubit. The movement of a measurement qubit and its neighboring data qubits is shown and described below with reference to Figures 6A-6G.
[0063] 6A-6H illustrate interactions performed by the measurement qubit, tracking the transfer of information accumulated by the measurement. FIG. 6A shows a measurement qubit (square 602) coupled to four data qubits a, b, c, and d (e.g., for square 504, the square representing the data qubit turns a lighter shade of gray after interacting with the measurement qubit shown in square 606 in FIG. 6C). FIG. 6A corresponds to the output of a previous iSWAP surface code cycle, so that data qubit "c" is not adjacent to the measurement qubit. In FIG. 6B, the measurement qubit is reset. This illustration corresponds to step 202 of example process 200 of FIG. 2.
[0064] In Figure 6C, the reset measurement qubit interacts with the data qubit "a" using the first entangling operation described above with reference to Figures 2 and 3. In this example, the data qubit "a" is above and to the left of the measurement qubit.
[0065] In Figure 6D, the measurement qubit interacts with data qubit "b" using an iSWAP gate. In this example, data qubit "b" is perpendicular to data qubit "a" and is below and to the left of the measurement qubit. The interaction between the measurement qubit and data qubit "b" causes measurement qubits "b" and "c" to move in a first direction (southwest) such that the measurement qubit intersects with data qubit "b." The measurement qubit, data qubit "a," and data qubit "d" move in opposite directions (northeast) and are aligned in a line.
[0066] In Figure 6E, the measurement qubit interacts with data qubit "c" using an iSWAP gate. This causes measurement qubits "b" and "c" to move in a first direction (southwest) so that the measurement qubit intersects with data qubit "c." The measurement qubit, data qubit "a," and data qubit "d" move in the opposite direction (northeast) and are aligned in a line.
[0067] In Figure 6F, the measurement qubit interacts with the data qubit "d" using the second entangling operation described above with reference to Figures 2 and 3. In this example, the data qubit "d" is below and to the right of the measurement qubit. In Figure 6G, the measurement qubit is measured.
[0068] In subsequent iSWAP surface code cycles, the same operations are repeated, but in reverse order. For example, the measurement qubit is reset. The reset measurement qubit interacts with data qubit "d" using a first entangling operation. The measurement qubit interacts with qubit "c" using an iSWAP gate, and then with qubit "b" using an iSWAP gate. The measurement qubit then interacts with qubit "a" using a second entangling operation before being measured. These alternating forward and reverse cycles can be repeated as necessary.
[0069] FIG. 7 shows exemplary qubit grid padding for transferring information encoded by measurement qubits. In the first example qubit grid padding 700, two additional rows and columns of qubits are added, one on each side of a square lattice. This effectively reduces the distance of the placeable code by one. In the second example, qubit grid padding 702 adds one row (shorter) and one column (shorter). If it is possible to measure a subset of the readout lines, padding is not necessary. In FIG. 7, qubits located at the centers of the darker gray squares (e.g., square 704) and lighter gray squares (e.g., square 706) represent data qubits, while qubits located at the corners of the darker gray squares (e.g., square 704) and lighter gray squares (e.g., square 706) represent measurement qubits.
[0070] 8 illustrates an exemplary quantum computer 800 for performing the quantum operations described herein. The exemplary quantum computer 800 includes an exemplary quantum computing device 802. The quantum computing device 802 is intended to represent various forms of quantum computing devices. The components shown here, their connections and relationships, and their functions are for illustrative purposes only and do not limit the implementation of the invention(s) described and / or claimed in this document.
[0071] Exemplary quantum computing device 802 includes a qubit assembly 852 and a control and measurement system 804. The qubit assembly includes multiple qubits (e.g., qubits 806) used to perform algorithmic operations or quantum computations. While the qubits shown in FIG. 8 are arranged in a rectangular array, this is schematic and not intended to be limiting. Qubit assembly 852 also includes adjustable coupling elements (e.g., couplers 808) that enable interaction between coupled qubits. In the schematic of FIG. 8, each qubit is adjustably coupled to each of its four neighboring qubits by a respective coupling element. However, this is an exemplary arrangement of qubits and couplers, and other arrangements are possible, including arrangements that are non-rectangular, arrangements that allow coupling between non-adjacent qubits, and arrangements that include adjustable coupling between more than two qubits.
[0072] Each qubit may be a physical two-level quantum system or device with levels representing logical values 0 and 1. The specific physical implementation of the qubits and how the qubits interact with each other depends on various factors, such as the type of quantum computing device 802 included in exemplary computer 800 or the type of quantum computation the quantum computing device is performing. For example, in an atomic quantum computer, the qubits may be implemented by atomic, molecular, or solid-state quantum systems (e.g., hyperfine atomic states). As another example, in a superconducting quantum computer, the qubits may be implemented by superconducting qubits or semiconductor qubits (e.g., superconducting transmon states). As another example, in an NMR quantum computer, the qubits may be implemented by nuclear spin states.
[0073] In some implementations, quantum computation can proceed by, for example, loading qubits from a quantum memory and applying a sequence of unitary operators to the qubits. Applying unitary operators to the qubits can include applying a corresponding sequence of quantum logic gates to the qubits, for example, to implement the surface code surfaces described herein. Examples of quantum logic gates include single-qubit gates, such as Pauli X, Pauli Y, and Pauli Z (also referred to as X, Y, and Z), Hadamard gates, S gates, and rotations; two-qubit gates, such as controlled X, controlled Y, and controlled Z (also referred to as CX, CY, and CZ), controlled NOT gates (also referred to as CNOT), iSWAP gates, and gates involving three or more qubits (e.g., Toffoli gates). Quantum logic gates can be implemented by applying control signals 810 generated by the control and measurement system 804 to the qubits and couplers.
[0074] For example, in some implementations, the qubits in qubit assembly 852 may be frequency tunable. In these examples, each qubit may have an associated operating frequency that can be adjusted by applying voltage pulses through one or more drive lines coupled to the qubit. Exemplary operating frequencies include a qubit idle frequency, a qubit interaction frequency, and a qubit readout frequency. Different frequencies correspond to different operations that the qubit can perform. For example, setting the operating frequency to a corresponding idle frequency may place the qubit in a state where it does not strongly interact with another qubit and can be used to function a single-qubit gate. As another example, when qubits interact through couplers with fixed couplings, the qubits can be configured to interact with each other by setting their respective operating frequencies at some gate-dependent frequency that is detuned from their common interaction frequency. In other cases, for example, when qubits interact through tunable couplers, the qubits can be configured to interact with each other by setting the parameters of each coupler to enable interaction between the qubits and then setting each of the operating frequencies of the qubits at some gate-dependent frequency that is detuned from their common interaction frequency. Such interactions can be performed to function multi-qubit gates.
[0075] The type of control signal 810 used depends on the physical implementation of the qubit. For example, the control signal may include an RF or microwave pulse in an NMR or superconducting quantum computer system, or an optical pulse in an atomic quantum computer system.
[0076] A quantum computation can be completed by measuring the state of the qubit using a quantum observable such as X or Z using each control signal 810. The measurement causes a readout signal 812 representing the measurement result to be communicated back to measurement and control system 804. Readout signal 812 may include an RF signal, a microwave signal, or an optical signal, depending on the physical form of the quantum computing device and / or qubit. For convenience, control signals 810 and readout signals 812 shown in FIG. 8 are shown to address only selected elements of the qubit assembly (i.e., the top and bottom rows), but in operation, control signals 810 and readout signals 812 can address each element in qubit assembly 852.
[0077] Control and measurement system 804 is an example of a classical computer system that can be used to perform various operations on qubit assembly 852, as described above, as well as other classical subroutines or calculations. Control and measurement system 804 includes one or more classical processors (e.g., classical processor 814), one or more memories (e.g., memory 816), and one or more I / O units (e.g., I / O unit 818), connected by one or more data buses. Control and measurement system 804 can be programmed to send sequences of control signals 810 to the qubit assembly, e.g., to perform a selected series of quantum gate operations, and to receive sequences of readout signals 812 from the qubit assembly, e.g., as part of performing a measurement operation.
[0078] Processor 814 is configured to process instructions for execution within control and measurement system 804. In some embodiments, processor 814 is a single-threaded processor. In other embodiments, processor 814 is a multi-threaded processor. Processor 814 is capable of processing instructions stored in memory 816.
[0079] Memory 816 stores information within control and measurement system 804. In some implementations, memory 816 includes a computer-readable medium, a volatile memory unit, and / or a non-volatile memory unit. In some cases, memory 816 may include a storage device (e.g., a hard disk device, an optical disk device) capable of providing mass storage to system 804, a storage device shared over a network by multiple computing devices (e.g., a cloud storage device), and / or some other mass storage device.
[0080] Input / output devices 818 provide input / output operations for control and measurement system 804. Input / output devices 818 include D / A converters, A / D converters, and RF / microwave / optical signal generators, transmitters, and receivers to send control signals 810 to and receive readout signals 812 from the qubit assemblies, as appropriate for the physics of the quantum computer. In some implementations, input / output devices 818 may also include one or more network interface devices (e.g., Ethernet cards), serial communication devices (e.g., RS-232 ports), and / or wireless interface devices (e.g., 802.8 cards). In some implementations, input / output devices 818 may include driver devices configured to receive input data and send output data to another external device (e.g., a keyboard, printer, and display device).
[0081] Although an exemplary control and measurement system 804 is shown in FIG. 8, implementations of the subject matter and functional operations described herein can be implemented in other types of digital electronic circuitry, or in computer software, firmware, or hardware, or in combinations of one or more of them, including the structures disclosed herein and structural equivalents thereof.
[0082] Embodiments of the subject matter and operations described herein may be implemented in digital electronic circuitry, analog electronic circuitry, suitable quantum circuitry, or more generally, a quantum computing system, including the structures disclosed herein and structural equivalents thereof, in tangibly embodied software or firmware, in hardware, or in one or more combinations thereof. The term "quantum computing system" may include, but is not limited to, a quantum computer, a quantum information processing system, a quantum cryptography system, or a quantum simulator.
[0083] Implementations of the subject matter described herein can be implemented as one or more computer programs, i.e., as one or more modules of computer program instructions encoded on a tangible, non-transitory storage medium for execution by or to control the operation of a data processing apparatus. The computer storage medium can be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more qubits, or a combination of one or more thereof. Alternatively or additionally, the program instructions can be encoded in an artificially generated propagated signal capable of encoding digital and / or quantum information (e.g., a machine-generated electrical, optical, or electromagnetic signal generated to encode digital and / or quantum information for transmission to a suitable receiving device for execution by a data processing apparatus).
[0084] The terms "quantum information and quantum data" refer to information or data carried by, held, or stored in a quantum system, with the smallest nontrivial system being a qubit, i.e., a system defining a unit of quantum information. The term "qubit" is understood to encompass all quantum systems that can be suitably approximated as two-level systems in the corresponding context. Such quantum systems may include, for example, multi-level systems having two or more levels. By way of example, such systems may include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, a computational basis state is specified using a ground state and a first excited state, although it is understood that other setups are possible in which a computational state is specified using a higher-level excited state.
[0085] The term "data processing apparatus" refers to digital and / or quantum data processing hardware and encompasses all types of apparatus, devices, and machines for processing digital and / or quantum data, including, by way of example, programmable digital processors, programmable quantum processors, digital computers, quantum computers, multiple digital and quantum processors or computers, and combinations thereof. An apparatus may also be or include special-purpose logic circuits, such as FPGAs (field-programmable gate arrays), ASICs (application-specific integrated circuits), or quantum simulators, i.e., quantum data processing apparatuses designed to simulate or generate information about specific quantum systems. Specifically, quantum simulators are special-purpose quantum computers that do not have the capability to perform universal quantum computation. An apparatus may also optionally include, in addition to hardware, code that creates an execution environment for digital and / or quantum computer programs (e.g., code constituting processor firmware, protocol stacks, database management systems, operating systems, or any combination of one or more of these).
[0086] A digital computer program, which may also be referred to as or described as a program, software, software application, module, software module, script, or code, can be written in any form of programming language, including a compiled or interpreted language, or a declarative or procedural language, and can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a digital computing environment. A quantum computer program, which may also be referred to as or described as a program, software, software application, module, software module, script, or code, can be written in any form of programming language, including a compiled or interpreted language, or a declarative or procedural language, and converted to a suitable quantum programming language, or can be written in a quantum programming language (e.g., QCL or Quipper).
[0087] A computer program may, but need not, correspond to a file in a file system. A program can be stored in part of a file holding another program or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple associated files (e.g., files storing one or more modules, subprograms, or portions of code). A computer program can be deployed to run on one computer or on multiple computers, which may be located at one site or distributed across multiple sites and interconnected by a digital / quantum data communication network. A quantum data communication network is understood to be a network that can transmit quantum data using quantum systems (e.g., qubits). Generally, digital data communication networks cannot transmit quantum data, but quantum data communication networks can transmit both quantum data and digital data.
[0088] The processes and logic flows described herein may be performed by one or more programmable computers operating with one or more processors, executing one or more computer programs to perform functions by operating on input data and generating output, as appropriate. The processes and logic flows may also be performed by, and the apparatus may be implemented as, special purpose logic circuitry (e.g., FPGAs or ASICs) or quantum simulators, or a combination of special purpose logic circuitry or quantum simulators with one or more programmed digital computers and / or quantum computers.
[0089] When a system of one or more computers is "configured to" perform a particular operation or action, it means that the system has installed thereon software, firmware, hardware, or a combination thereof that, when in operation, causes the system to perform the operation or action. When one or more computer programs are configured to perform a particular operation or action, it means that the one or more programs contain instructions that, when executed by a data processing device, cause the device to perform the operation or action. For example, a quantum computer may receive instructions from a digital computer that, when executed by a quantum computing device, cause the device to perform an operation or action.
[0090] A computer suitable for executing a computer program may be based on a general-purpose or special-purpose processor, or any other type of central processing unit. Typically, the central processing unit receives instructions and data from a read-only memory, a random-access memory, or a quantum system suitable for transmitting quantum data (e.g., photons), or a combination thereof.
[0091] Elements of a computer include a central processing unit for performing or executing instructions, and one or more memory devices for storing instructions and digital, analog, and / or quantum data. The central processing unit and memory can be supplemented by, or incorporated in, special purpose logic circuitry or a quantum simulator. Generally, a computer also includes, or is operatively coupled to receive data from, or transfer data to, one or more mass storage devices for storing data (e.g., magnetic disks, magneto-optical disks, optical disks, or quantum systems suitable for storing quantum information). However, a computer need not have such devices.
[0092] Quantum circuit elements (also called quantum computing circuit elements) include circuit elements for performing quantum processing operations. That is, quantum circuit elements are configured to exploit quantum mechanical phenomena such as superposition and quantum entanglement to perform operations on data in a non-deterministic manner. Certain quantum circuit elements, such as qubits, can be configured to represent information in multiple states simultaneously and perform operations on that information. Examples of superconducting quantum circuit elements include circuit elements such as quantum LC oscillators, qubits (e.g., flux qubits, phase qubits, or charge qubits), and superconducting quantum interference devices (SQUIDs) (e.g., RF-SQUIDs or DC-SQUIDs), among others.
[0093] In contrast, classical circuit elements generally process data in a deterministic manner. Classical circuit elements can be configured to collectively carry out the instructions of a computer program by performing basic arithmetic, logical, and / or input / output operations on data, where the data is represented in analog or digital form. In some implementations, classical circuit elements can be used to send data to and / or receive data from quantum circuit elements via electrical or electromagnetic connections. Examples of classical circuit elements include circuit elements based on CMOS circuitry, rapid single flux quantum (RSFQ) devices, reciprocal quantum logic (RQL) devices, and ERSFQ devices (which are an energy-efficient version of RSFQ that do not use bias resistors).
[0094] In certain cases, some or all of the quantum and / or classical circuit elements may be implemented using, for example, superconducting quantum and / or classical circuit elements. Fabrication of superconducting circuit elements may involve the deposition of one or more materials, such as superconductors, dielectrics, and / or metals. Depending on the materials selected, these materials may be deposited using deposition processes such as chemical vapor deposition, physical vapor deposition (e.g., evaporation or sputtering), or epitaxial techniques, among others. Processes for fabricating circuit elements described herein may involve removing one or more materials from the device during fabrication. Depending on the material being removed, the removal process may include, for example, wet etching techniques, dry etching techniques, or lift-off processes. Materials forming the circuit elements described herein can be patterned using known lithography techniques (e.g., photolithography or electron beam lithography).
[0095] During operation of a quantum computing system using superconducting quantum and / or classical superconducting circuit elements, such as those described herein, the superconducting circuit elements are cooled in a cryostat to a temperature at which the superconducting material can exhibit superconducting properties. A superconductor (alternatively, superconducting) material can be understood as a material that exhibits superconducting properties at or below its superconducting critical temperature. Examples of superconducting materials include aluminum (superconducting critical temperature of 1.2 Kelvin) and niobium (superconducting critical temperature of 9.3 Kelvin). Thus, superconducting structures, such as superconducting traces and superconducting ground planes, are formed from materials that exhibit superconducting properties at or below their superconducting critical temperature.
[0096] In certain embodiments, control signals for quantum circuit elements (e.g., qubits and qubit couplers) may be provided using classical circuit elements that are electrically and / or electromagnetically coupled to the quantum circuit elements. The control signals may be provided in digital and / or analog form.
[0097] Suitable computer-readable media for storing computer program instructions and data include all forms of non-volatile digital and / or quantum memories, media, and memory devices, including, by way of example, semiconductor memory devices (e.g., EPROM, EEPROM, and flash memory devices), magnetic disks (e.g., internal hard disks or removable disks), magneto-optical disks, CD-ROM and DVD-ROM disks, and quantum systems (e.g., trapped atoms or electrons). Quantum memory is understood to be a device capable of storing quantum data with high fidelity and efficiency for long periods of time, for example, a light-matter interface that uses light for transmission and matter for storage and preservation of the quantum characteristics of the quantum data, such as superposition or quantum coherence.
[0098] Control of the various systems described herein, or portions thereof, may be embodied in a computer program product that is stored on one or more non-transitory machine-readable storage media and includes instructions executable by one or more processing devices. The systems described herein, or portions thereof, may each be implemented as an apparatus, method, or system that may include one or more processing devices and memory for storing executable instructions for performing the operations described herein.
[0099] While this specification contains details of many specific embodiments, these should not be construed as limiting the scope of what may be claimed, but rather as descriptions of features that may be inherent in particular embodiments. Certain features described herein in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Furthermore, while features may be described above as acting in a particular combination and may initially be claimed as such, one or more features from a claimed combination can, in some cases, be deleted from that combination, and the claimed combination may be directed to a subcombination or a variation of the subcombination.
[0100] Similarly, although operations are shown in the figures in a particular order, this should not be understood as requiring that such operations be performed in the particular order or sequence shown, or that all of the operations shown be performed, to achieve desirable results. In certain situations, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system modules and components in the above-described embodiments should not be understood as requiring such separation in all embodiments, and it should be understood that the program components and systems described generally can be integrated together in a single software product or packaged in multiple software products.
[0101] Specific implementations of the present subject matter have been described. Other implementations are within the scope of the following claims. For example, the actions recited in the claims can be performed in a different order and still achieve desirable results. As an example, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous.
Claims
1. 1. A method performed by a quantum computer, comprising: performing a first surface code cycle in a system comprising a plurality of physical qubits arranged on a grid, the performing the first surface code cycle comprising: applying a first entangling operation between the measurement qubit in a basis state and a first data qubit, the first entangling operation comprising a first iSWAP gate followed by application of at least one other operation, whereby a result of applying the first entangling operation between the measurement qubit in the basis state and the first data qubit is equal to a result of applying a CZ gate between the measurement qubit in the basis state and the first data qubit; applying a second iSWAP gate between the measurement qubit and a second data qubit; applying a third iSWAP gate between the measurement qubit and a third data qubit; applying a second entangling operation between the measurement qubit and a fourth data qubit, the second entangling operation comprising a fourth iSWAP gate followed by application of at least one other operation, whereby a result of applying the second entangling operation to the measurement qubit and the fourth data qubit is equal to a result of applying a CZ gate between the measurement qubit and the fourth data qubit; measuring the measurement qubit to detect an error; A method comprising:
2. 2. The method of claim 1 , wherein applying the first entangling operation further comprises applying one or more single-qubit gates to the measurement qubit and the first data qubit.
3. 3. The method of claim 2 , wherein applying one or more single-qubit gates to the measurement qubit comprises applying a Hadamard gate to the measurement qubit before applying the first iSWAP gate.
4. Applying one or more single-qubit gates to the measurement qubit and the first data qubit may include, after applying the first iSWAP gate: applying an inverse S gate to the measurement qubit and the first data qubit; applying a Hadamard gate to the first data qubit; The method of claim 2 or 3, comprising:
5. 5. The method of claim 1, wherein applying the second entangling operation comprises applying a Hadamard gate to the fourth data qubit before applying the fourth iSWAP gate.
6. Applying the second entangling operation includes, after applying the fourth iSWAP gate: applying an inverse S gate to the measurement qubit and the fourth data qubit; applying a Hadamard gate to the measurement qubit; The method according to any one of claims 1 to 5, comprising:
7. The method of claim 6 , wherein measuring the measurement qubit to detect an error comprises using a result of a classically controlled NOT operation.
8. 8. The method of claim 1, further comprising applying a reset operation to the measurement qubit to reset it at the basis state before applying the first entangling operation.
9. 9. The method of claim 1, wherein performing the first surface code cycle transfers information encoded by the measurement qubit and the first, second, third, and fourth data qubits to another qubit in the grid.
10. 10. The method of claim 9, wherein information encoded by the measurement qubit is transferred to another qubit in the grid in a first direction, and information encoded by one or more of the first, second, third, or fourth data qubit is transferred to another qubit in the grid in a second direction, the second direction being opposite the first direction.
11. 11. The method of claim 10 , wherein information encoded by the measurement qubits and data qubits coupled to the measurement qubits in a third direction perpendicular to the first direction moves collectively within the grid.
12. 12. The method of claim 1, further comprising performing a second surface code cycle, wherein performing the second surface code cycle comprises performing the first surface code cycle in reverse order.
13. 1. A quantum computing device, comprising: a plurality of physical qubits arranged on a grid; a qubit coupler defining nearest neighbor interactions between the plurality of qubits; control electronics configured to operate the plurality of qubits and qubit coupler, the control electronics configured to perform operations to implement one or more surface code cycles, the operations comprising the method of any one of claims 1 to 12; and A quantum computing device comprising: