Radio frequency divertor assembly enabling different spatial power outputs on demand

Abstract

An apparatus and method for spatially switching RF power from a single radio frequency (RF) generator to a selected one of two or more impedance matching networks coupled to associated RF electrodes to form a plasma in a plasma chamber. The total RF power can be switched to a selected one of the two or more impedance matching networks within microseconds. The two or more impedance matching networks can be coupled to one or more plasma generating electrodes. The two or more impedance matching networks can be interleaved during a plasma processing recipe step. The impedance matching networks can be alternated back and forth during a plasma processing recipe step. This interleaving of steps and impedance transformation capabilities can also be performed with three or more impedance matching networks, which can be beneficial in enabling the use of fixed tunable impedance matching networks instead of requiring a variable impedance matching network with variable tunability.

Description

[Technical Field]

[0001] FIELD OF THE DISCLOSURE

[0001] Embodiments of the present disclosure generally relate to an apparatus and method for controlling radio frequency (RF) power from an RF generator to a plasma processing electrode in a plasma processing chamber. [Background technology]

[0002]

[0002] Reliably producing high aspect ratio features is one of the key technological challenges for next generation semiconductor devices. One method for forming high aspect ratio features uses a plasma-assisted etching process to bombard material formed on the surface of a substrate through openings formed in a patterned mask layer formed on the substrate surface.

[0003] As technology nodes advance toward 2 nanometers (nm), the fabrication of smaller features with higher aspect ratios requires atomic-level precision for plasma processing. In etching processes in which plasma ions play a key role, ion energy control has always been a challenge for developing reliable and repeatable device formation processes in the semiconductor device industry. In a typical plasma-assisted etching process, a substrate is placed on a substrate support disposed within a processing chamber, a plasma is formed above the substrate by using a radio frequency (RF) generator coupled to an electrode disposed on or within the plasma processing chamber, and ions are accelerated from the plasma across a plasma sheath toward the substrate. Furthermore, RF substrate biasing methods, which require the use of a separate RF bias source in addition to the RF generator used to initiate and maintain the plasma within the processing chamber, have not been able to provide the desired control over plasma sheath characteristics to achieve the desired plasma processing results that would enable the formation of these smaller device feature sizes.

[0004] However, non-uniformities in plasma density and / or plasma sheath shape can occur due to variations in the electrical characteristics and / or spatial arrangement of processing components located within the processing region of a plasma processing chamber. Typical plasma density variations are generated in conventional inductively coupled plasma (ICP) sources that include a coil positioned above the processing region of a plasma chamber because the coil is axially symmetric and therefore has a magnetic field null point located at the central axis of the coil. Plasma variations can cause undesirable processing results in etched features formed across the surface of the substrate. Excessive variations in plasma non-uniformity can adversely affect process results and reduce device yield. Such non-uniformities are often particularly pronounced near the center of the substrate or between the center and the edge.

[0005] In a conventional capacitively coupled plasma (CCP) processing chamber, a radio frequency (RF) power source provides RF power to an electrode in the processing chamber to generate plasma within the processing chamber through an impedance matching network coupled between the RF power source and the electrode. However, the conventional multi-electrode approach requires separate RF generators (RF power sources) and associated impedance matching networks to provide RF power to separate RF electrodes. Therefore, current technology CCP processing chambers are complex, difficult to control, and expensive.

[0006] During a plasma processing recipe, the electrode RF load impedance may change rapidly, requiring the associated impedance matching network to quickly adjust (e.g., rematch (fine-tune)) to the new load impedance of one or more electrodes. Because the impedance matching network uses a motor-driven tuning element such as a vacuum variable capacitor, the matching time may take several milliseconds or longer, or it may interrupt and / or degrade the plasma processing of the substrate. Different fixed impedance matching networks may be used for different electrode impedances during the plasma process, but these fixed impedance matching networks preferably need to be switched quickly at the full RF power provided by the RF generator. Also, some plasma processing recipes may require switching from an upper electrode to a lower electrode, which also requires fast switching at high RF power. However, switching at high RF power between matching networks and / or electrodes may be problematic due to arcing, as high voltages and currents generated by high RF power may be involved.

[0007]

[0007] Therefore, what is needed is an apparatus and method for rapidly switching high-power RF from an RF generator to two or more impedance matching networks coupled to one or more electrodes without interrupting or degrading the plasma-generating energy provided by the one or more RF generators. Summary of the Invention

[0008]

[0008] Several embodiments of the present disclosure include an RF diverter assembly that provides different spatial RF outputs on demand, including a first hybrid coupler having four radio frequency (RF) ports and a second hybrid coupler having four RF ports. The first RF port of the first hybrid coupler is coupled to a first RF port of the second hybrid coupler. The second RF port of the first hybrid coupler is coupled to a second RF port of the second hybrid coupler. A first controllable impedance circuit has a first node coupled to the first RF ports of the first and second hybrid couplers and a second node coupled to a common device. A second controllable impedance circuit has a first node coupled to the second RF ports of the first and second hybrid couplers and a second node coupled to the common device. The first and second controllable impedance circuits have a first impedance at a frequency when configured to resonate in parallel at the frequency and a second impedance when not configured to resonate in parallel at the frequency, where the first impedance is greater than the second impedance.

[0009]

[0009] Several embodiments of the present disclosure include a plasma processing chamber. The plasma processing chamber has a substrate support assembly including a substrate support surface within the plasma processing chamber, at least partially defining a processing volume of the plasma processing chamber, and first and second electrodes. A radio frequency (RF) power assembly includes an RF generator and an RF diverter assembly. The RF diverter assembly has an RF input adapted to couple to the RF generator and first and second RF outputs adapted to couple to first and second impedance matching networks, respectively. An output of the first impedance matching network is coupled to the first electrode. An output of the second impedance matching network is coupled to the second electrode. The RF diverter assembly includes a first hybrid coupler having four RF ports and a second hybrid coupler having four RF ports. The first RF port of the first hybrid coupler is coupled to the first RF port of the second hybrid coupler. The second RF port of the first hybrid coupler is coupled to the second RF port of the second hybrid coupler. The third RF port of the first hybrid coupler is coupled to the RF input of the RF diverter assembly. The third RF port of the second hybrid coupler is coupled to the first RF output of the RF diverter assembly. The fourth RF port of the first hybrid coupler is coupled to the second RF output of the RF diverter assembly. The third RF port of the first hybrid coupler is coupled to the third RF port of the second hybrid coupler when the first and second controllable impedance circuits are at a first impedance. The third RF port of the first hybrid coupler is coupled to the fourth RF port of the first hybrid coupler when the first and second controllable impedance circuits are at a second impedance. The first electrode is an upper electrode above the substrate support assembly, and the second electrode is a lower electrode integral with the substrate support assembly. The first and second electrodes are upper electrodes above the substrate support assembly. Both the first and second electrodes are coupled to first and second impedance matching networks.a plurality of RF diverters having an input selectively coupled to the RF generator and an output coupled to a respective one of a plurality of impedance matching networks, the outputs of which are coupled to a respective one of a plurality of electrodes within the plasma processing chamber, and a system controller controlling the first and second controllable impedance circuits to select a first or second impedance of the first and second controllable impedance circuits;

[0010]

[0010] Several embodiments of the present disclosure include a plasma processing method for generating a plasma in a processing region defined by an electrode assembly and a substrate support assembly. The electrode assembly includes first and second electrodes. A radio frequency (RF) power supply assembly includes an RF generator and an RF diverter assembly. The RF diverter assembly has an RF input coupled to an output of the RF generator and first and second RF outputs selectively switchable to the RF input. A first impedance matching network has an input coupled to the first output of the RF diverter assembly. A second impedance matching network has an input coupled to the second output of the RF diverter assembly. The method also includes generating, by the RF generator, an RF waveform. The generated RF waveform establishes a first RF waveform at the first electrode when the first output of the RF diverter assembly is switched to the input of the RF diverter assembly, and establishes a second RF waveform at the second electrode when the second output of the RF diverter assembly is switched to the input of the RF diverter assembly.

[0011]

[0011] Embodiments of the present disclosure may also include a radio frequency (RF) diverter assembly. The RF diverter assembly includes a first hybrid coupler having four RF ports and a second hybrid coupler having four RF ports, where a first port of the first hybrid coupler is coupled to a first port of the second hybrid coupler, and a second RF port of the first hybrid coupler is coupled to a second RF port of the second hybrid coupler. The RF diverter assembly further includes a first impedance generating element coupled between the first RF port of the first hybrid coupler and a common device, and a second impedance generating element coupled between the first RF port of the first hybrid coupler and a first terminal of a first switchable electrical contact, where a second terminal of the first switchable electrical contact is coupled to the common device. The RF diverter assembly further includes a third impedance generating element coupled between the second RF port of the first hybrid coupler and the common device, and a fourth impedance generating element coupled between the second RF port of the first hybrid coupler and the first terminal of the second switchable electrical contact, where the second terminal of the second switchable electrical contact is coupled to the common device. The first impedance generating element has a resonant frequency at the first RF frequency. The first impedance generating element may include an inductor connected in series between the input port of the first switched parallel resonant trap and the common device.

[0012]

[0012] So that the features of the present disclosure described above may be understood in detail, a more particular description of the present disclosure briefly summarized above may be had by reference to several embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the accompanying drawings depict only exemplary embodiments and therefore should not be considered to limit the scope of the present disclosure, as other equally effective embodiments may also be permissible. [Brief explanation of the drawings]

[0013] [Figure 1A]1 shows a schematic cross-sectional side view of a plasma processing chamber and a block diagram of the supporting electrical circuitry of a plasma processing system in accordance with one or more embodiments of the present disclosure. [Figure 1B] 1 shows a schematic cross-sectional side view of a plasma processing chamber and a block diagram of the supporting electrical circuitry of a plasma processing system in accordance with one or more embodiments of the present disclosure. [Figure 2]

[0014] 1 illustrates a voltage pulse provided in a voltage waveform supplied to a first electrode and an RF signal simultaneously supplied to a second electrode during plasma processing, according to one or more embodiments. [Figure 3A]

[0015] 1 shows a schematic circuit and block diagram of an RF diverter comprising two controllable impedance circuits and two hybrid couplers in accordance with one or more embodiments of the present disclosure. [Figure 3B]

[0016] 1 shows a schematic plan view of a four-port hybrid coupler in accordance with the teachings of the present disclosure. [Figure 3C]

[0017] 1 shows a schematic diagram of a four-port hybrid coupler including quarter-wave coaxial cable sections and a phase delay combination through the coaxial cable sections in accordance with the teachings of the present disclosure. [Figure 4]

[0018] 3B shows a schematic circuit diagram of a controllable impedance circuit (two of which are used in FIG. 3A) in accordance with one or more embodiments of the present disclosure. [Figure 5]

[0019] 3B shows a schematic circuit diagram of a lower frequency version of the controllable impedance circuit (two of which are used in FIG. 3A ), in accordance with one or more embodiments of the present disclosure. [Figure 5A]

[0020] 3B shows a schematic circuit diagram of a controllable impedance circuit (two of which are used in FIG. 3A) in accordance with one or more embodiments of the present disclosure. [Figure 5B]

[0021] 3B shows a schematic circuit diagram of a controllable impedance circuit (two of which are used in FIG. 3A) in accordance with one or more embodiments of the present disclosure. [Figure 6]

[0022] FIG. 1 shows a schematic block diagram of multiple RF diverters and associated impedance matching networks in accordance with one or more embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0014]

[0023] For ease of understanding, where possible, the same reference numerals have been used to designate identical elements that are common to multiple figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.

[0015]

[0024] Embodiments of the present disclosure generally relate to an apparatus and method for switching RF power from a single radio frequency (RF) generator to a selected one of two or more impedance matching networks coupled to associated RF electrodes to form a plasma in a plasma processing chamber. Embodiments of the disclosure provided herein may enable total RF power to be switched between RF electrodes, each coupled to one of two or more impedance matching networks, in a time span of sub-microseconds. The two or more impedance matching networks may be interleaved in time during a plasma recipe process. The tuning parameters of one impedance matching network may be configured for a first plasma processing chamber process condition. The tuning parameters of another impedance matching network may be configured for a second processing chamber process condition. These may each be implemented at a different time during the plasma process. Then, when plasma processing recipe process conditions change, another preset impedance matching network with new tuning parameters may be quickly (in microseconds) replaced without any discernible interruption in the plasma generation process or damage to the RF power supply hardware due to rapid switching under full power supply. Thus, the delivery of RF power by both impedance matching networks can be alternated back and forth during the steps of a plasma processing recipe. This interleaving of steps and impedance transformation capabilities can also be performed with more than two impedance matching networks and can be beneficial in allowing the use of fixed tunable impedance matching networks instead of requiring a variable impedance matching network with variable tunability.

[0016]

[0025] In one configuration, two or more impedance matching networks can be coupled to the same electrode or a group of commonly connected electrodes. For example, at least two different impedance matching network outputs, either fixed or variable impedance transformation, can be coupled to the same electrode or a group of commonly connected electrodes (a common output connection to the electrode), and each input of the at least two impedance matching networks can be selectively switched (coupled) to the output of the RF generator. The impedance matching network selected to be coupled to the RF generator can determine the impedance transformation between the 50 Ω output of the RF generator and the combined low-impedance load of the electrode / plasma. According to one or more embodiments of the present disclosure, rapid microsecond switching between the inputs of the at least two impedance matching networks is possible. Thus, known or expected changes in the plasma chamber impedance during one or more process recipe steps can be compensated for to avoid high reflected RF power that may be generated due to the inability of the matching network to adapt to the rapidly changing plasma chamber impedance, and therefore to avoid problems related to associated subsequent plasma fluctuations and plasma non-uniformity. In contrast, conventional single impedance matching networks that use a motor-driven vacuum variable capacitor to adapt to changes in plasma chamber impedance can require several milliseconds or more to adapt to the new electrode / plasma chamber impedance.

[0017]

[0026] In another configuration, two or more impedance matching networks may be coupled to respective ones of two or more different electrodes. For example, the output of an RF generator may be switched between an upper electrode (above the substrate support assembly) and a lower electrode (embedded within the substrate support assembly). According to one or more embodiments of the present disclosure, rapid microsecond switching between the upper and lower electrodes is possible.

[0018]

[0027] In some embodiments, RF voltage, current, and phase sensor data from the RF voltage and current sensors may be used and recorded for training purposes, and based on the collected sensor data, the impedance characteristics of one or more resonant tuned circuits in an RF power supply assembly, including an RF generator and an impedance matching network, may be adjusted to better control one or more characteristics of a plasma that may be formed in the plasma processing chamber.

[0019]

[0028] In some embodiments, process control algorithm settings, such as RF power process levels and impedance matching network tuning settings, can be stored in memory and then used and / or enhanced for subsequent plasma manufacturing processes. The process control algorithm settings can also include the selection of various impedance matching network connections to be used at different times to provide RF power to one or more electrodes during a plasma processing recipe. Thus, well-established and consistent manufacturing process results can be achieved. This is particularly advantageous for the multiple chamber plasma processes that occur during a semiconductor device manufacturing day. The same process and matching network tuning recipe can be modified within different process control algorithms depending on the required semiconductor manufacturing process. Different plasma processing recipes can be distributed among multiple manufacturing plasma chamber systems depending on the manufacturing requirements for different semiconductor products.

[0020]

[0029] As will be further described below, process information, such as RF sensor values ​​and tuning circuit element positions, can be evaluated and adjusted during the semiconductor manufacturing process. The process information can be recorded (in memory) for subsequent evaluation and possible refinement for further manufacturing process executions. For example, plasma chamber conditions can change over time, and different or modified RF supply sequences can be implemented during the process recipe to reduce substrate-to-substrate and chamber-to-chamber process result variations.

[0021]

[0030] Referring now to the drawings, details of several exemplary embodiments are shown generally, in which like elements within the drawings are represented by like numerals and similar elements are represented by like numerals with different lower case suffixes.

[0022]

[0031] 1A and 1B, a schematic cross-sectional side view of a plasma processing chamber and a block diagram of the supporting electrical circuitry of the plasma processing system are shown, in accordance with one or more embodiments of the present disclosure. The plasma processing system includes a plasma processing chamber 110, generally designated by the numeral 100, having a lid 120, a sidewall 122, and a chamber base 124. Within the plasma processing chamber 110 is a substrate support assembly 114. The substrate support assembly 114 includes a dielectric material 107 with an embedded electrode 108 (e.g., an electrostatic chuck (ESC) bias electrode, a ring electrode 116), and is adapted to support a semiconductor substrate 106 during plasma processing. The substrate support assembly 114 is disposed between a chamber lower section 124 and an RF electrode assembly 112. The space between the substrate support assembly 114 and the RF electrode assembly 112 confines a plasma 102 within a processing region 129 upon RF excitation. A plasma sheath 104 is also formed over the substrate support assembly 114, the ring electrode 116, and the top of the semiconductor substrate 106 during plasma processing.

[0023]

[0032] One example of an RF electrode assembly 112 includes an electrically (RF) non-conductive plate 132 facing a substrate support surface (i.e., upper surface) of a substrate support assembly 114, the plate 132 having an outer electrode 172 and an inner electrode 170 thereunder. The outer electrode 172 and / or the inner electrode 170 are disposed on at least a portion of the substrate support surface of the substrate support assembly 114 and are spaced apart from the substrate support surface by a first distance in a first direction (e.g., the Z direction) perpendicular to the lower surfaces 170 a, 172 a of the inner electrode 170 and / or the outer electrode 172. The lower surfaces 170 a, 172 a of the inner electrode 170 and / or the outer electrode 172 at least partially define a processing volume of the plasma processing chamber 110. A ground plate (RF shield) 128 is attached to the top of the non-conductive plate 132 and may be electrically coupled to the grounded wall 122 of the plasma chamber 110. Gas ports 138 provide fluid (gas) through the ground plate 128 and the inner and outer electrodes 170 and 172 to a gas distribution head 130 that includes multiple gas ports. Process gas 188 is distributed from a process gas source 186 through a gas distribution pipe 184 to the gas distribution subchannels 180 and 182. The process gas is then distributed into the space between the RF electrode assembly 112 and the substrate support assembly 114 to become the plasma 102 upon RF excitation.

[0024]

[0033] The RF power assembly 141 for exciting the process gas into a plasma may include an RF generator 140, an RF power measurement module 142, an RF diverter 150, a first RF impedance matching network 144, a second RF impedance matching network 146, and RF voltage and current sensors 152 and 154. The RF generator 140 may be adapted to provide RF power at frequencies from about 1 MHz to about 200 MHz, e.g., 1 MHz, 13.56 MHz, or 40 MHz. The RF output from the RF power generator 140 may be from about 100 to about 5,000 watts (W). The RF power may also be pulsed on and off at a pulse rate from about 1 hertz (Hz) to about 100 kHz, with an on / off duty cycle of about five (5) percent to about 95 percent.

[0025]

[0034] The output of the DC pulse generator (PVT) 160 may be coupled to the recessed electrode 108 in the substrate support assembly 114. The recessed electrode 108 may be an electrostatic chuck electrode disposed in an electrostatic chuck in the substrate support assembly 114. RF shielding filters 162 and 164 may be coupled between the DC pulse generator 160 and the recessed electrode 108 and may be used to substantially block RF energy from entering the DC pulse generator 160. Generally, the pulsed voltage (PV) waveform established at the recessed electrode 108, such as a negative pulse waveform, a shaped pulse waveform, or a positive pulse waveform, includes a periodic series of pulse voltage (PV) waveforms repeated with a period TPD, on top of a voltage offset (ΔV). In one example, the period TPD of the PV waveform may be between about 1 μs and about 5 μs, e.g., about 2.5 μs, e.g., between about 200 kHz and about 1 MHz, or about 400 kHz, e.g., about 1 MHz or less, or about 500 kHz or less. The DC pulse generator 160 may be adapted to supply asymmetric DC pulses to the embedded electrode 108 for control of the plasma sheath 104 formed above the surface of the semiconductor substrate 106 .

[0026]

[0035] 2 , in a plasma processing configuration in which a PV waveform 196 and an RF signal 195 are simultaneously provided to one or more electrodes disposed within the processing region 129 to form the plasma 102, the impedance of the composite load created by the plasma 102 will vary at least in part due to the varying voltages applied within each of the voltages provided within the PV waveform provided from the PVT generator 160. In some other plasma processing configurations in which a pulsed RF signal is provided to the processing region 129 of the plasma processing chamber 110 to form the plasma 102, the impedance of the composite load created by the plasma 102 will vary at least in part due to the varying RF power levels. Those skilled in the art will appreciate that the impedance of the composite load will vary during different states of the PV waveform, such as the first state 191 (i.e., sheath collapse phase) and the second state 192 (i.e., ion current phase), and / or during different phases of the pulsed RF signal, once provided to the electrode 108 disposed below the substrate 106. As shown by the zero volt reference line 198 in FIG. 2 , in some embodiments, the PV waveform may include the generation of a positive voltage during the first state 191 and a negative voltage of greater magnitude during the second state 192. However, due to the varying impedance of the composite load, the RF matching element used to ensure efficient delivery of RF power to the composite load requires impedance tuning adjustments in response to the varying impedance to ensure that maximum forward RF power is delivered to the composite load while always minimizing the amount of reflected power. However, as described above, most conventional RF matching networks include mechanical tuning elements that cannot keep up with the rate at which the impedance of the composite load changes, leading to large variations in the match point, the amount of reflected RF power, and inefficiencies and / or damage to the power delivery system. Therefore, as described above, a need exists to control and synchronize the delivery of RF signals provided from the RF generator 140 to one or more electrodes in the process chamber 100 through the use of different RF matching networks at different times.Different RF matching networks at different times are each tuned to match different impedances, thereby preventing any discernible interruption in the plasma generation process due to the changing impedance of the composite load. In one embodiment, as described further below, an RF diverter 150 is configured to rapidly switch between a first RF supply path and a second RF supply path. The first RF supply path is coupled to one or more electrodes to compensate for the plasma impedance created during a first state 191 of the PV waveform. Then, the second RF supply path is coupled to one or more electrodes during a second state 192 of the PV waveform to compensate for the change in plasma impedance created by the difference in the impedance of the composite load due to the differently applied voltages provided to the plasma 102 during the first state 191 and the second state 192 of the PV waveform.

[0027]

[0036] In some embodiments, the plasma processing chamber 110 may be configured for plasma-assisted etching processes, such as reactive ion etching (RIE) plasma processing. The plasma processing chamber 110 may also be used in other plasma-assisted processes, such as plasma-enhanced deposition processes (e.g., plasma-enhanced chemical vapor deposition (PECVD) processes, plasma-enhanced physical vapor deposition (PEPVD) processes, plasma-enhanced atomic layer deposition (PEALD) processes), plasma processing, plasma-based ion implantation processes, or plasma doping (PLAD) processes.

[0028]

[0037] The system controller 126, also referred to herein as a processing chamber controller, includes a central processing unit (CPU) 133, memory 134, and support circuits 135. The system controller 126 is used to control the process sequence used to process the substrate 106, such as controlling an RF diverter to select which matching network 144 or 146 receives RF power from the RF generator 140, as described more fully hereinafter. The CPU 133 may be a general-purpose computer processor configured for use in an industrial setting to control a processing chamber and its associated sub-processors. The memory 134 described herein is generally non-volatile memory and may include random access memory, read-only memory, floppy or hard disk drives, or other suitable forms of local or remote digital storage. The support circuits 135 are conventionally coupled to the CPU 133 and include cache, clock circuits, input / output subsystems, power supplies, etc., and combinations thereof. Software instructions (programs) and data may be coded and stored in the memory 134 to instruct the processor within the CPU 133. A software program (or computer instructions) readable by the CPU 133 in the system controller 126 determines which tasks can be performed by the processing chamber 110 and components within the plasma processing system 100 .

[0029]

[0038] Typically, a program stored in memory 134 is readable by CPU 133 in system controller 126 and includes code that, when executed by the processor (CPU 133), performs the tasks associated with the plasma processing schemes described herein. The program includes instructions that are used to control various hardware and electrical components within processing chamber 110 to perform the various process tasks and process sequences used to implement the methods described herein.

[0030]

[0039] Referring to FIG. 3A, a schematic circuit and block diagram of an RF diverter including two controllable impedance circuits and two hybrid couplers is shown in accordance with one or more embodiments of the present disclosure. FIG. 3A generally illustrates the functionality of an RF diverter 150 configured to selectively deliver RF power from an RF generator to different RF delivery paths coupled to the same or different electrodes disposed within a plasma processing chamber 110. In one example shown in FIG. 1B, a single RF diverter 150 is configured to deliver RF power to combined electrodes 170a and 172a through either RF delivery path 153 or 155. RF power provided from RF generator 140 through RF power measurement module 142 can be delivered separately along path 153 or path 155 due to a control signal at input node 464 provided from system controller 126. The settings of the internal impedance adjustment components within first match 144 and second match 146 are preset to compensate for different complex load impedances during the plasma process, and the RF ports provided by RF generator 140 can be rapidly switched to compensate for different complex load impedances experienced during processing. In one embodiment, the switching between different RF supply paths is synchronized with the establishment of different PV waveform states generated by PV generator 160, such as first state 191 and second state 192 as described above and shown in FIG. 2 .

[0031]

[0040] The RF diverter 150 includes a first hybrid coupler 450, a second hybrid coupler 452, a first controllable impedance circuit 454, a second controllable impedance circuit 456, and a 50 Ω load 458. The hybrid couplers 450, 452 may be four-port 3 dB hybrid couplers that phase shift an input signal into two output signals with a phase shift between the two output signals. As will be explained more fully hereinafter, the first and second controllable impedance circuits 454, 456 are either at a first impedance (high) at the frequency of the RF generator when a control signal 464 is at a first logic level, or at a second impedance (low) when the control signal 464 is at a second logic level.

[0032]

[0041] The hybrid coupler ports coupled to the first and second controllable impedance circuits 454, 456 are at a low RF impedance, typically a 50 Ω transmission line impedance. The first and second controllable impedance circuits 454, 456 are connected in parallel between the hybrid coupler ports as shown and a common device (e.g., ground). The first and second controllable impedance circuits 454, 456 are in a high impedance parallel resonant configuration at the operating frequency of the RF generator when the control signal 464 is at a first logic level, and therefore do not affect RF operation between the RF ports of the hybrid couplers 450, 452.

[0033]

[0042] RF power from the RF generator 140 is fed into a first RF input 466 of the RF diverter 150, which is coupled to port P1 of the hybrid coupler 450. The RF power is split between ports P3 and P4 of the hybrid coupler 450. Thus, from the input RF power at port P1 of the hybrid coupler 450, half the RF power is output from port P3 with a 180-degree phase shift, and the other half of the RF power is output from port P4 with a 270-degree phase shift. These two half-power feeds (90 degrees out of phase) are coupled to input ports P1′ and P2′ of the hybrid coupler 452. These two half-power feeds (90 degrees apart) are combined back into a single RF output at port P3′ of the hybrid coupler 452, and are available as full RF power at the output 460 of the RF diverter 150. Any difference in RF power and phase (other than 90 degrees) will be coupled from port P4' of hybrid coupler 452 to 50Ω load 458.

[0034]

[0043] The first and second controllable impedance circuits 454, 456 are in a low impedance configuration when the control signal 464 is at a second logic level. This effectively RF-couples ports P3 and P4 of hybrid coupler 450 and ports P1' and P2' of hybrid coupler 452 to a common device (e.g., ground). Port P2 of hybrid coupler 450 then receives full RF power from its port P1 and is available as full RF power at output 462 of RF diverter 150. No RF power is provided to ports P1' and P2' of hybrid coupler 452 because these ports are at effective RF ground, and therefore no power will be present at port P3' of hybrid coupler 452, which is coupled to output 460 of RF diverter 150.

[0035]

[0044] Referring to Figure 3B, a schematic plan view of a four-port hybrid coupler according to the teachings of the present disclosure is shown. A stripline 3 dB hybrid coupler is shown. Ports P1 and P2, P2 and P3, and P3 and P4 are electrically coupled together via λ / 4 sections. This diagram represents a four-port rat-race coupler.

[0036]

[0045] Referring to FIG. 3C, a schematic diagram of a four-port hybrid coupler including quarter-wave coaxial cable sections and phase-delay combinations through the coaxial cable sections is shown in accordance with the teachings of the present disclosure. For lower frequency operation, a 3 dB hybrid coupler can be constructed from quarter-wave (λ / 4) coaxial sections connected together with coaxial T-connections that form connections between the quarter-wave coaxial sections and provide port connections to the quarter-wave sections. The coaxial for the quarter-wave sections can be selected to handle the RF power generated by RF generator 140. The characteristic impedance of the coaxial can be, but is not limited to, 50 Ω.

[0037]

[0046] RF power from the RF generator 140 is coupled to the input 466 of the RF diverter 150 (port P1 of the hybrid coupler 450), and when the first and second controllable impedance circuits 454, 456 are in a high-impedance parallel-resonant configuration (Configuration 1), the RF power into port P1 exits from ports P3 and P4. Ports P3 and P4 each have half the power of the RF generator 140 and a phase shift of λ / 4 (90 degrees) between them. Half the RF power from ports P3 and P4 is coupled to ports P1′ and P2′ of the hybrid coupler 452. They then recombine within the hybrid coupler 452 at port P3′ to provide full power at the output 460 of the RF diverter 150.

[0038]

[0047] When the first and second controllable impedance circuits 454, 456 are in the low-impedance configuration (Configuration 2), ports P3 and P4 of the hybrid coupler 450 are substantially at RF ground (common equipment), and RF power into port P1 exits port P2 at full power. Port P3 is λ / 4 (90° electrical angle) from port P2, and port P4 is 3λ / 4 (270° electrical angle) from port P1. A quarter-wave (λ / 4) or multiple quarter-wave (3λ / 4) transmission line has one end that is an open circuit (very high impedance) when the other ends (center conductor and coaxial shield) are shorted together (e.g., to RF ground (common equipment)). Therefore, the grounded ports P3 and P4 appear to ports P2 and P1, respectively, as not being in or affecting the RF power path. This allows port P1 to be directly coupled to port P2 with substantially no power loss between them.

[0039]

[0048] 3C, the phasing of the RF power paths results in a 360 degree phase shift (one cycle) between the RF power to the input 466 of the RF diverter 150 and the RF output 460. In configuration 2, the phasing of the RF power paths results in a 90 degree phase shift between the RF power at the input 466 and the RF power at the output 462 of the RF diverter 150.

[0040]

[0049] 4, a schematic circuit diagram of the controllable impedance circuit shown in FIG. 3A is shown in accordance with one or more embodiments of the present disclosure. Each of the controllable impedance circuits 454, 456 includes at least one inductor comprising a first inductor portion 504, a second inductor portion 506, a switch 508 (e.g., an electrically operable switch (relay) or a manually operable switch) having first and second electrical contacts, and an RF conductive housing 502 configured and connected as shown. In some embodiments, the at least one inductor may include two separate inductive elements, where the first inductor portion 504 and the second inductor portion 506 each include a separate, separate inductive element. For ease of explanation and without intending to limit the disclosure provided herein, first inductor portion 504 and second inductor portion 506 will be referred to herein simply as first inductor 504 and second inductor 506, although, as noted above, in some cases they may be formed from different portions of a single inductor (coil), or may be separate individual inductors (coils), as shown in Figures 4, 5, and 5A. First inductor 504 has a first inductance, and second inductor 506 has a parallel capacitance C when first and second electrical contacts of switch 508 are open, or a second inductance when first and second electrical contacts of switch 508 are closed. Switch 508 may be, for example, without limitation, a high-voltage relay such as a vacuum contact relay. When a control voltage 464 is applied to a relay contact actuator (not shown), the first and second electrical contacts of the switch 508 may close, connecting the free end of the inductor 506 to the RF conductive housing 502 (RF ground).

[0041]

[0050] When the first and second electrical contacts of the switch 508 are open, the second inductor 506 forms one plate of a capacitor, and the RF conductive housing 502 forms the other plate of the capacitor. The capacitor formed by the inductor 506 and the RF conductive housing 502 are in parallel with the first inductor 504 to form a parallel-resonant high-impedance circuit. The inductance value of the first inductor 504 and the capacitance values ​​of the second inductor 506 (acting as one capacitor plate) and the RF conductive housing 502 can be selected to resonate in parallel at the output frequency of the RF generator 140, such as 40 MHz. The RF conductive housing 502 can be made of, but is not limited to, copper, aluminum, or an RF conductive-plated substrate (e.g., a printed circuit board configured as a housing and grounded to the plasma generating device).

[0042]

[0051] When the first and second electrical contacts of the switch 508 are closed, the second inductor 506 forms an inductance in parallel with the inductance of the first inductor 504. This, of course, negates the parallel resonant circuit that occurs when the first and second electrical contacts of the switch 508 are open, as described above. There are then two inductances in parallel. The inductive reactance is then X L1 *X L2 / (X L1 +X L2 ), which is less than the inductive reactance of either of the coils 502 and 504. X L1 <X L2 , the RF current through the first and second electrical contacts of the switch 508 is X L1 , and therefore "hot switching" the first and second electrical contacts of switch 508 under full RF power is not fatal because more RF current will be passing through inductor 504 than through inductor 506. Also, the switched RF voltage will be lower because X L1 is X L2The first and second electrical contacts of switch 508 are at the "cold" end of inductor 506 and have a lower RF voltage across them when open. These factors allow RF switching of the first and second electrical contacts of switch 508, either open or closed, at full RF power and without damage at microsecond speeds, e.g., tens (10) microseconds.

[0043]

[0052] 5, a schematic circuit diagram of a lower frequency version of the controllable impedance circuit shown in FIG. 3A is shown, in accordance with one or more embodiments of the present disclosure. At lower frequencies (longer wavelengths), the combination of the inductor coil 506 and the RF conductive housing 502 may not provide enough capacitance for the first inductor 504 to form a parallel resonant circuit at the desired frequency (13.56 MHz, 2 MHz, etc.). In that case, a second capacitor 510 can be added in parallel with the first inductor 504. The second capacitor 510 can be fixed or variable.

[0044]

[0053] Referring to FIG. 5A, a schematic circuit diagram of the controllable impedance circuit shown in FIG. 3A is shown in accordance with one or more embodiments of the present disclosure. In this embodiment, RF conductive enclosure 502 is not used, and capacitor 510a is sized to resonate in parallel with inductor 504 at the RF generator frequency. When first and second electrical contacts of switch 508 are closed, inductor 506 is placed in parallel with inductor 504, thereby lowering the combined inductance of inductors 504 and 506 and increasing their parallel resonant frequency. The impedance of inductor 506 limits the RF current through the first and second electrical contacts of switch 508 when they are closed. Capacitor 510a can be fixed or variable.

[0045]

[0054] Referring to FIG. 5B, a schematic circuit diagram of the controllable impedance circuit shown in FIG. 3A is shown in accordance with one or more embodiments of the present disclosure. The capacitance of capacitor 510a is sized to resonate in parallel with inductor 506a at the RF generator frequency when the first and second electrical contacts of switch 508 are closed, thereby providing a high-impedance parallel resonant circuit between the hybrid coupler node and common ground. RF conductive enclosure 502 is not used in this embodiment. When the first and second electrical contacts of switch 508 are open, inductor 506a is no longer in the circuit, and all RF current flows through capacitor 510a. Capacitor 510a has low RF impedance at the operating frequency of the RF generator. The impedance of inductor 506a limits the RF current through the first and second electrical contacts of switch 508 when they are closed. Capacitor 510a may be fixed or variable.

[0046]

[0055] It is contemplated, and within the scope of this disclosure, that one having ordinary skill in the art of RF circuits and the benefit of this disclosure may design other RF circuits that can be used as controllable impedance circuits that can be configured to a first impedance at a frequency when in a parallel resonant configuration and to a second impedance when not in a parallel resonant configuration at that frequency, the first impedance being greater than the second impedance.

[0047]

[0056] Referring to FIG. 6, a schematic block diagram of multiple RF diverters and associated impedance matching networks is shown in accordance with one or more embodiments of the present disclosure. The output of RF generator 140 is coupled to a first input port 466a of RF diverter 150a. When control input 464a is at logic 0 (logic low), first input port 466a is coupled to first output port 460a, and impedance matching network 144a receives RF power from RF generator 140. When control input 464a is at logic 1 (logic high), first input port 466a is coupled to second output port 462a. Second output port 462a is coupled to first input port 466b of RF diverter 150b. It is contemplated and within the scope of the present disclosure that the logic levels to control input 464 are interchangeable and can be either logic 0, 1 or 1, 0 (inverted but performing the same control function).

[0048]

[0057] When control input 464b is at logic 0 (logic low), first input port 466b of RF diverter 150b is coupled to first output port 460b, and impedance matching network 144b receives RF power from RF generator 140 through RF diverters 150a and 150b. When control input 464b is at logic 1 (logic high), first input port 466b is coupled to second output port 462b. Second output port 462b is coupled to first input port 466c of RF diverter 150c.

[0049]

[0058] When the control input 464c is at logic 0 (logic low), the first input port 466c of RF diverter 150c is coupled to the first output port 460c, and the impedance matching network 144c receives RF power from the RF generator 140 through the RF diverters 150a, 150b, and 150c. When the control input 464c is at logic 1 (logic high), the first input port 466c is coupled to the second output port 462c. The second output port 462c is coupled to the first input port 466n of the RF diverter 150n.

[0050]

[0059] When the control input 464n is at logic 0 (logic low), the first input port 466n of the RF diverter 150n is coupled to the first output port 460n, and the impedance matching network 144n receives RF power from the RF generator 140 through the RF diverters 150a to 150n. When the control input 464n is at logic 1 (logic high), the first input port 466n is coupled to the second output port 462n. The second output port 462n may be coupled to the last impedance matching network 146. Thus, RF power from the RF generator 140 passes through at least one of the multiple RF diverters 150. One of the multiple impedance matching networks 144, 146 associated with the RF diverter 150 (whose control input is at logic 0) will supply RF power to its associated RF electrode, e.g., 170, 172, or 108. Depending on which one of the RF diverters 150, e.g., diverter 150c, drives its control input 464c to logic 0, the RF diverters 150 (e.g., diverters 150a and 150b between this diverter 150c) will drive their control input 464 to logic 1. Thus, selection of the impedance matching networks 144, 146 can be made within microseconds at full RF power.

[0051]

[0060] Table 1, provided below, illustrates an example of a plasma process performed on a substrate. It includes four process recipe steps that utilize four different electrodes (i.e., n=4 in FIG. 6) positioned within the plasma chamber during processing. The outputs of diverters 150a, 150b, 150c, and 150d during each of the recipe steps, based on logic level signals sent by system controller 126, are described for each of the process recipe steps. TIFF2026507041000002.tif108170

[0052]

[0061] While the above description is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, the scope of which is determined by the following claims.

Claims

1. 1. A radio frequency (RF) diverter assembly comprising: a first hybrid coupler having four RF ports; a second hybrid coupler having four RF ports; a first RF port of the first hybrid coupler coupled to a first RF port of the second hybrid coupler; a second RF port of the first hybrid coupler coupled to a second RF port of the second hybrid coupler; The RF diverter assembly further comprises: a first controllable impedance circuit having a first node coupled to the first RF ports of the first hybrid coupler and the second hybrid coupler, and a second node coupled to a common device; a second controllable impedance circuit having a first node coupled to the second RF ports of the first hybrid coupler and the second hybrid coupler and a second node coupled to the common device; an RF diverter assembly, wherein the first controllable impedance circuit and the second controllable impedance circuit have a first impedance at a frequency when configured to resonate in parallel at the frequency, and a second impedance when configured not to resonate in parallel at the frequency, the first impedance being greater than the second impedance.

2. a third RF port of the first hybrid coupler coupled to a third RF port of the second hybrid coupler when the first controllable impedance circuit and the second controllable impedance circuit are at the first impedance; 2. The RF diverter assembly of claim 1, wherein the third RF port of the first hybrid coupler is coupled to a fourth RF port of the first hybrid coupler when the first controllable impedance circuit and the second controllable impedance circuit are at the second impedance.

3. The first controllable impedance circuit comprises: a switch having a first electrical contact and a second electrical contact, the second electrical contact coupled to the second node; a first impedance-generating element coupled between the first node and the second node; and a second impedance-generating element coupled between the first node and the first electrical contact; when the first electrical contact and the second electrical contact are open, the first controllable impedance circuit is at the first impedance; 2. The RF diverter assembly of claim 1, wherein the first controllable impedance circuit is at the second impedance when the first electrical contact and the second electrical contact are closed.

4. the second controllable impedance circuit a switch having a first electrical contact and a second electrical contact, the second electrical contact coupled to the second node; a first impedance-generating element coupled between the first node and the second node; and a second impedance-generating element coupled between the first node and the first electrical contact; when the first electrical contact and the second electrical contact are open, the second controllable impedance circuit is at the first impedance; 2. The RF diverter assembly of claim 1, wherein the second controllable impedance circuit is at the second impedance when the first electrical contact and the second electrical contact are closed.

5. the first impedance-generating element of the first controllable impedance circuit and the second controllable impedance circuit is a first inductor; the second impedance-generating element of the first controllable impedance circuit and the second controllable impedance circuit is a capacitor when the first electrical contact and the second electrical contact are open, and is a second inductor when the first electrical contact and the second electrical contact are closed; 5. The RF diverter assembly of claim 4, whereby the first impedance-generating element and the second impedance-generating element form a parallel resonant circuit at the frequency when the first electrical contact and the second electrical contact are open.

6. 6. The RF diverter assembly of claim 5, wherein the second impedance-generating element has a higher impedance value than the first impedance-generating element when the first electrical contact and the second electrical contact are closed.

7. the first impedance generating element of the first controllable impedance circuit and the second controllable impedance circuit is a first inductor and a capacitor connected in parallel with the first inductor; the second impedance-generating element of the first controllable impedance circuit and the second controllable impedance circuit is a second inductor when the first electrical contact and the second electrical contact are closed; As a result, the first impedance generating element forms a parallel resonant circuit at the frequency when the first electrical contact and the second electrical contact are open, and has the first impedance; 5. The RF diverter assembly of claim 4, wherein the first impedance-generating element and the second impedance-generating element form a non-resonant circuit at the frequency and have the second impedance when the first electrical contact and the second electrical contact are closed.

8. The first controllable impedance circuit comprises: a switch having a first electrical contact and a second electrical contact, the second electrical contact coupled to the second node; a first impedance-generating element coupled between the first node and the second node; and a second impedance-generating element coupled between the first node and the first electrical contact; the first controllable impedance circuit and the second controllable impedance circuit form a parallel resonant circuit at the frequency when the first electrical contact and the second electrical contact are closed, and have the first impedance; 2. The RF diverter assembly of claim 1, wherein the first controllable impedance circuit is at the second impedance when the first electrical contact and the second electrical contact are open.

9. the second controllable impedance circuit a switch having a first electrical contact and a second electrical contact, the second electrical contact coupled to the second node; a first impedance-generating element coupled between the first node and the second node; and a second impedance-generating element coupled between the first node and the first electrical contact; the first controllable impedance circuit and the second controllable impedance circuit form a parallel resonant circuit at the frequency when the first electrical contact and the second electrical contact are closed, and have the first impedance; 9. The RF diverter assembly of claim 8, wherein the first controllable impedance circuit is at the second impedance when the first electrical contact and the second electrical contact are open.

10. the first impedance-generating element of the first controllable impedance circuit and the second controllable impedance circuit is a capacitor; 10. The RF diverter assembly of claim 9, wherein the second impedance-generating elements of the first controllable impedance circuit and the second controllable impedance circuit are inductors when the first electrical contacts and the second electrical contacts are closed.

11. 5. The RF diverter assembly of claim 4, wherein the first and second electrical contacts are remotely controllable first and second relay contacts.

12. The RF diverter assembly of claim 1 , wherein the frequency is from about 1 MHz to about 200 MHz.

13. The RF diverter assembly of claim 1 , wherein a fourth RF port of the second hybrid coupler is adapted to be coupled to a resistive load.

14. The RF diverter assembly of claim 13 , wherein the resistive load has a characteristic impedance of the RF port.

15. The RF diverter assembly of claim 14 , wherein the characteristic impedance of the RF port is 50Ω.

16. 1. A plasma processing chamber comprising: a substrate support assembly including a substrate support surface that at least partially defines a processing volume of the plasma processing chamber; a first electrode and a second electrode in the plasma processing chamber; and a radio frequency (RF) power supply assembly, the RF power supply assembly comprising: RF generator, and an RF diverter assembly having an RF input adapted to couple to the RF generator, and first and second RF outputs adapted to couple to first and second impedance matching networks, respectively; an output of the first impedance matching network coupled to the first electrode; an output of the second impedance matching network coupled to the second electrode; The RF diverter assembly includes: a first hybrid coupler having four RF ports; a second hybrid coupler having four RF ports; a first RF port of the first hybrid coupler coupled to a first RF port of the second hybrid coupler; a second RF port of the first hybrid coupler coupled to a second RF port of the second hybrid coupler; a third RF port of the first hybrid coupler coupled to the RF input of the RF diverter assembly; a third RF port of the second hybrid coupler coupled to the first RF output of the RF diverter assembly; A plasma processing chamber, wherein a fourth RF port of the first hybrid coupler is coupled to the second RF output of the RF diverter assembly.

17. the third RF port of the first hybrid coupler is coupled to the third RF port of the second hybrid coupler when the first controllable impedance circuit and the second controllable impedance circuit are at the first impedance; 17. The plasma processing chamber of claim 16, wherein the third RF port of the first hybrid coupler is coupled to the fourth RF port of the first hybrid coupler when the first controllable impedance circuit and the second controllable impedance circuit are at the second impedance.

18. 17. The plasma processing chamber of claim 16, further comprising a plurality of RF diverters having inputs selectively coupled to the RF generator and outputs coupled to respective ones of a plurality of impedance matching networks.

19. 20. The plasma processing chamber of claim 18, wherein outputs of the plurality of impedance matching networks are coupled to respective ones of a plurality of electrodes in the plasma processing chamber.

20. A plasma processing method, comprising: (a) generating a plasma within a processing region defined by an electrode assembly and a substrate support assembly, the electrode assembly including a first electrode and a second electrode; A radio frequency (RF) power supply assembly RF generator, an RF diverter assembly having an RF input coupled to an output of the RF generator and first and second RF outputs selectively switchable to the RF input; a first impedance matching network having an input coupled to the first RF output of the RF diverter assembly; and a second impedance matching network having an input coupled to the second RF output of the RF diverter assembly; The method further comprises: (b) generating, with the RF generator, an RF waveform that establishes a first RF waveform at the first electrode when a first RF output of the RF diverter assembly is switched to an RF input of the RF diverter assembly, and that establishes a second RF waveform at the second electrode when a second RF output of the RF diverter assembly is switched to an RF input of the RF diverter assembly.

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