Parametric amplifier with inductive input coupling for quantum computing systems

Abstract

The present disclosure is directed to a parametric amplifier with inductive input coupling for use in a quantum computing system. One exemplary aspect of the present disclosure is directed to a quantum computing system including a first qubit, a first measurement device, and a first amplifier. The first measurement device is configured to generate a first qubit signal corresponding to a first quantum state of the first qubit. The first amplifier is configured to amplify the first qubit signal. The first amplifier includes a first transmission line resonator. The first transmission line resonator provides an inductive reactance to an electrical coupling between the first measurement device and the first amplifier. The inductive reactance of the electrical coupling enables transmission of the first qubit signal.

Description

[Technical Field]

[0001] This application is based on and claims priority to U.S. patent application Ser. No. 18 / 176,394, filed Feb. 28, 2023, which is incorporated herein by reference.

[0002] The present disclosure relates generally to quantum computing and information processing systems, and more particularly to a parametric amplifier with inductive input coupling for quantum computing systems. [Background technology]

[0003] Quantum computing is a computing method that utilizes quantum effects such as superposition of basis states and entanglement to perform certain calculations more efficiently than classical digital computers. In contrast to digital computers, which store and manipulate information in the form of bits, e.g., "1" or "0," quantum computing systems can manipulate information using quantum bits ("qubits"). A qubit can refer to a quantum device that allows for the superposition of data in multiple states, e.g., both "0" and "1," and / or the superposition of data in multiple states itself. In conventional terminology, the superposition of "0" and "1" states in a quantum system can be expressed, for example, as a|0>+b|1>. The "0" and "1" states of a digital computer are analogous to the |0> and |1> ground states of the qubit, respectively. Summary of the Invention

[0004] Aspects and advantages of embodiments of the present disclosure will be set forth in part in the description that follows, or may be learned from the description, or may be learned by practice of the embodiments.

[0005] One exemplary aspect of the present disclosure is directed to a quantum computing system including a first qubit, a first measurement device, and a first amplifier. The first measurement device is configured to generate a first qubit signal corresponding to a first quantum state of the first qubit. The first amplifier is configured to amplify the first qubit signal. The first amplifier includes a first transmission line resonator. The first transmission line resonator provides an inductive reactance for an electrical coupling between the first measurement device and the first amplifier. The inductive reactance of the electrical coupling enables transmission of the first qubit signal.

[0006] Other aspects of the present disclosure are directed to various systems, methods, apparatus, non-transitory computer-readable media, computer-readable instructions, and computing devices.

[0007] These and other features, aspects, and advantages of various embodiments of the present disclosure will become better understood with reference to the following description and appended claims. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the present disclosure and, together with the detailed description, explain associated principles.

[0008] Detailed descriptions of embodiments directed to those skilled in the art are set forth herein with reference to the accompanying drawings. [Brief explanation of the drawings]

[0009] [Figure 1] 1 provides a schematic diagram of a parametric amplifier. [Figure 2] 1 illustrates an exemplary quantum computing system according to an exemplary embodiment of the present disclosure. [Figure 3] 1 provides a schematic diagram of a parametric amplifier, according to various embodiments; [Figure 4] 4 provides a circuit-level diagram of the parametric amplifier of FIG. 3 showing quantities used to calculate the capacitance value of the coupling capacitor of the second pole of the parametric amplifier, according to various embodiments. [Figure 5] 1 illustrates another exemplary quantum computing system according to an exemplary embodiment of the present disclosure. [Figure 6] 6 illustrates non-limiting frequency response curves for the parametric amplifiers of FIGS. 3 and 5, according to various embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0010] Exemplary aspects of the present disclosure are directed to methods, architectures, and hardware configurations that provide for resetting the quantum state of a multi-state device (e.g., a qubit) via an adjustable energy transfer device (e.g., an adjustable qubit coupler) within a quantum computing system. In a quantum computing system, a qubit has two or more possible "pure" quantum states, where a "pure" state is defined with respect to the eigenstates of a particular qubit measurement device (or the eigenstates of a matrix operator corresponding to the measurement device). At least two of the possible quantum states are employed as information-carrying states and are therefore referred to as the computational states of the qubit. A qubit may have more possible pure states in addition to its computational states. For example, the quantum states of a qubit may include non-computational states. Also, note that prior to all possible "collapses" of the qubit's wave function, which occur when it becomes entangled with the wave function of the measurement device (e.g., when a qubit measurement is performed), the qubit is in any possible "superposition" of its pure states (e.g., defined by the complex-valued amplitudes for each pure state subject to a global normalization constraint and any total phase irrelevance to the amplitudes).

[0011] Josephson parametric amplifiers (JPAs) may be used in quantum computing systems, such as those employing superconducting qubits (e.g., transmon qubits). Such systems may rely on dispersive readout of their qubits. A JPA may be used to provide a first gain stage with near-quantum-limited noise, enabling rapid and accurate detection of low-power readout signals. The JPA may be followed by a low-noise cryogenic amplifier and a room-temperature receiver. In such applications, it is advantageous for the JPA to have both (1) a high instantaneous bandwidth to accommodate sufficient spectral separation between readout tones and (2) a high dynamic range to avoid loss of readout fidelity due to gain compression and intermodulation distortion.

[0012] Embodiments include a JPA that meets both of the above design goals (e.g., high instantaneous bandwidth and high dynamic range), and thus, the JPA of embodiments can be utilized to enable a variety of quantum computing systems. More specifically, the JPA of embodiments includes a multi-pole matching network (e.g., an impedance matching network) and a quarter-wave resonator along the transmission line that is the input to the multi-pole matching network (and therefore the input to the JPA). The multi-pole network of the JPA increases the bandwidth of the JPA, while the resonator functions to invert the input coupling reactance from capacitive to inductive. Because the JPA's coupling to the input signal is inductive (rather than capacitive), unwanted resonances within the JPA are mitigated.

[0013] Some JPA designs may use multi-pole matching networks (e.g., impedance matching networks) to increase the bandwidth of the JPA. However, such JPAs are typically designed with lumped-element LC resonators that have capacitive mutual coupling, which may result in unwanted resonance with other components of the JPA or components in electrical contact with the JPA (e.g., circuit elements external to the JPA).

[0014] FIG. 1 provides a schematic diagram of a parametric amplifier 02. The parametric amplifier 02 may be a JPA and may include a matching network 08. The matching network 08 may be a multi-pole matching network including three poles: a first pole, a second pole, and a third pole. The first pole may include a first LC resonator 10, the second pole may include a second LC resonator 20, and the third pole may include a third LC resonator 30. As a lumped-element LC resonator, the first LC resonator 10 includes a first resonator inductor 12 (e.g., having a variable first inductance L1) and a first resonator capacitor 14 (e.g., having a first capacitance C1). Similarly, the second LC resonator 20 includes a second resonator inductor 22 (e.g., having a second inductance L2) and a second resonator capacitor 24 (e.g., having a second capacitance C2). The third LC resonator 30 includes a third resonator inductor 32 (e.g., having a third inductance L3) and a third resonator capacitor 34 (e.g., having a third capacitance C3). The first LC resonator 10 includes a first pole coupling capacitor 18 (e.g., having a capacitance C 12 The second LC resonator 20 is electrically coupled to the second LC resonator 20 via a second pole coupling capacitor 28 (e.g., having capacitance C 23 The first resonator inductor 12 is electrically coupled to the third LC resonator 30 via a first resonator inductor 12 having a variable inductance, which at least partially enables the amplification of the parametric amplifier 02. For example, when the variable inductance of the first resonator inductor 12 is modulated at a certain frequency (the "pump frequency"), the parametric amplifier 02 can amplify signals near half the pump frequency.

[0015] The parametric amplifier 02 has an input terminal 50. In the parametric amplifier 02, the input terminal 50 is connected to an input capacitor 38 (e.g., a capacitance C 34) and an input feed line 40 (e.g., having an input impedance magnitude (or resistance) denoted as Z0). Note that the input capacitor 38 causes the input coupling reactance of the parametric amplifier 02 to be a capacitive input coupling reactance. Capacitive reactance can cause unwanted resonances within the parametric amplifier 02. Specifically, the input capacitor 38 tends to be large (e.g., Z0·ω0·C 34 >>1, where ω is the center frequency of the parametric amplifier 02), which may itself resonate with other reactances (e.g., bond wire and trace lengths on the chip or package) external to the parametric amplifier 02. The additional resonances in the circuit are uncontrolled and ultimately degrade the performance of the parametric amplifier 02, resulting in, for example, out-of-specification gain ripple.

[0016] In various embodiments, the capacitance of the input capacitor 38 may be rather large (e.g., Z0·ω0·C 34 For example, if amplifier 02 is designed for a center frequency of 4.5 GHz and a bandwidth of 500 MHz, then C 34 may be greater than 1 pF. Although not shown in FIG. 1 , the input capacitor 38 may further be connected to a 50 ohm (Ω) on-chip transmission line several millimeters long from the amplifier to the bond pad. This length, combined with the inductance of the wirebond, may create stray resonances whose frequencies are close to the amplifier frequency, resulting in a reduction in the amplifier's gain or ripple. Capacitive input coupling to a lumped-element resonator (e.g., in the resonator of the parametric amplifier 02) may have a frequency-dependent reactance. That is, the parametric amplifier 02 may be employed only over a narrow band of input frequencies. Because the target coupling occurs only at a single frequency, the applicability of the parametric amplifier 02 may be limited for quantum computing systems.

[0017] To address these and other issues with the parametric amplifier 02, and as described above, embodiments replace the third LC resonator 30 of the matching network 08 with a quarter-wave transmission line resonator (see, for example, FIG. 3 ). The quarter-wave transmission line resonator of the embodiments inverts the input coupling reactance from capacitive to inductive. Thus, the JPA of the embodiments can be inductively coupled to the input terminal of the JPA. Because the reactance is inductive, this reduces the possibility of unintended resonances near the operating frequency of the amplifier. The quarter-wave transmission line resonator also helps to cover the physical distance on the chip from the bond pad to the device, thereby further reducing stray resonances associated with wiring over this distance.

[0018] Aspects of the present disclosure provide several technical effects and advantages. For example, as described above, JPAs of embodiments achieve at least two design goals associated with JPAs employed in quantum computing systems (e.g., high instantaneous bandwidth and high dynamic range) while mitigating stray resonances. More specifically, JPAs of embodiments may be employed to reliably amplify qubit readout signals in quantum computing systems while mitigating unwanted resonances. Variable inductances included in embodiments further help achieve these design goals. Thus, embodiments may be employed to enable a variety of quantum computing systems.

[0019] 2 illustrates an exemplary quantum computing system 100. System 100 is one example of a system of one or more classical computers and / or quantum computing devices at one or more locations that may implement the systems, components, and techniques described below. Using the disclosure provided herein, one skilled in the art will understand that other quantum computing devices or systems may be used without departing from the scope of the present disclosure.

[0020] System 100 includes quantum hardware 102 in data communication with one or more classical processors 104. Classical processor 104 can be configured to execute computer-readable instructions stored in one or more memory devices to perform operations such as any of those described herein. Quantum hardware 102 includes components for performing quantum computations. For example, quantum hardware 102 includes quantum system 110, control device(s) 112, and readout device(s) 114 (e.g., readout resonator(s)). Quantum system 110 can include one or more multi-level quantum subsystems, such as a register of qubits (e.g., qubit 120). In some implementations, the multi-level quantum subsystem can include superconducting qubits, such as flux qubits, charge qubits, transmon qubits, gmon qubits, and spin-based qubits.

[0021] The type of multi-level quantum subsystem utilized by system 100 may vary. For example, in some cases, it may be advantageous to include one or more readout device(s) 114 attached to one or more superconducting qubits, e.g., transmon, flux, gmon, xmon, or other qubits. In other cases, ion traps, photonic devices, or superconducting cavities (which may prepare states without the need for qubits) may be used. Further examples of implementations of multi-level quantum subsystems include fluxmon qubits, silicon quantum dots, or phosphorus impurity qubits. Some of the readout devices 114 may be referred to as qubit measurement devices. For example, readout device 114 may include qubit measurement device 510 of FIG. 5.

[0022] Quantum circuits may be constructed and applied to a register of qubits included in quantum system 110 via multiple control lines coupled to one or more control devices 112. Exemplary control devices 112 operating on a register of qubits may be used to implement quantum gates or quantum circuits having multiple quantum gates, such as, for example, Pauli gates, Hadamard gates, controlled-NOT (CNOT) gates, controlled phase gates, T-gates, multi-qubit quantum gates, coupler quantum gates, etc. One or more control devices 112 may be configured to operate on quantum system 110 through one or more respective control parameters (e.g., one or more physical control parameters). For example, in some implementations, the multi-level quantum subsystem may be a superconducting qubit, and control device 112 may be configured to provide control pulses to the control lines to generate magnetic fields that tune the frequencies of the qubits.

[0023] The quantum hardware 102 may further include a readout device 114 (e.g., a readout resonator). Measurements 108 obtained via the measurement device may be provided to the classical processor 104 for processing and analysis. In some embodiments, the quantum hardware 102 may include quantum circuits, and the control device(s) 112 and readout device(s) 114 may implement one or more quantum logic gates that operate on the quantum computing system 100 via physical control parameters (e.g., microwave pulses) transmitted through wires included in the quantum hardware 102. Further examples of control devices include arbitrary waveform generators, from which a DAC (digital-to-analog converter) produces a signal.

[0024] The readout device(s) 114 may be configured to perform quantum measurements on the quantum system 110 and transmit the measurement results 108 to the classical processor 104. In some embodiments, the measurement results are encoded in the form of a qubit output signal (e.g., qubit output signal 512 of FIG. 5 ). In such embodiments, a parametric amplifier (e.g., parametric amplifier 300 of FIG. 3 and / or parametric amplifier 520 of FIG. 5 ) may be employed to amplify such a signal; for example, the parametric amplifier may be disposed in a transmission line transmitting the measurement results 108 from the readout device 114 to the classical processor 104. Furthermore, the quantum hardware 102 may be configured to receive data from the classical processor 104 specifying the physical control qubit parameter values ​​106. The quantum hardware 102 may use the received physical control qubit parameter values ​​106 to update the actions of the control device(s) 112 and the readout device(s) 114 on the quantum system 110. For example, quantum hardware 102 may receive data specifying new values ​​representing voltage magnitudes of one or more DACs included in control device 112 and may accordingly update the actions of the DACs on quantum system 110. Classical processor 104 may be configured to initialize quantum system 110 to an initial quantum state, for example, by sending data to quantum hardware 102 specifying an initial set of parameters 106.

[0025] In some implementations, the readout device(s) 114 can measure the state of an element (e.g., a qubit) of a quantum system, such as a qubit, by utilizing the difference in impedance for the |0> and |1> states of the element. For example, the resonant frequency of the readout resonator can be different when the qubit is in the |0> or |1> state due to the nonlinearity of the qubit. Thus, microwave pulses reflected from the readout device 114 convey amplitude and phase shifts that depend on the qubit state. In some implementations, a Purcell filter can be used in conjunction with the readout device(s) 114 to prevent microwave propagation at the qubit frequency.

[0026] In some embodiments, quantum system 110 may include multiple qubits 120 arranged, for example, in a two-dimensional grid 122. For clarity, two-dimensional grid 122 shown in FIG. 2 includes 4x4 qubits, although in some implementations, system 110 may include a fewer or greater number of qubits. In some embodiments, multiple qubits 120 may interact through multiple qubit couplers, such as qubit coupler 124. The qubit coupler may define nearest-neighbor interactions between multiple qubits 120. In some implementations, the strength of the multiple qubit coupler is a tunable parameter. In some cases, the multiple qubit couplers included in quantum computing system 100 may be couplers with fixed coupling strengths.

[0027] In some implementations, the plurality of qubits 120 may include data qubits, such as qubit 126, and measurement qubits, such as qubit 127. A data qubit is a qubit that participates in a computation being performed by system 100. A measurement qubit is a qubit that can be used to determine the result of a computation performed by a data qubit. That is, during a computation, the unknown state of a data qubit is conveyed to a measurement qubit using an appropriate physical operation and measured by an appropriate measurement operation performed on the measurement qubit.

[0028] In some implementations, each qubit of plurality of qubits 120 can operate using a respective operating frequency, such as an idle frequency, an interaction frequency, a readout frequency, and / or a reset frequency. The operating frequency can vary from qubit to qubit. For example, each qubit can idle at a different operating frequency. The operating frequency of qubit 120 can be selected before a computation is performed.

[0029] 2 illustrates an example of a quantum computing system that can be used to implement methods and operations according to exemplary aspects of the present disclosure. Other quantum computing systems can be used without departing from the scope of the present disclosure.

[0030] FIG. 3 provides a schematic diagram of a parametric amplifier 300 according to various embodiments. The parametric amplifier 300 may be a Josephson parametric amplifier (JPA). The parametric amplifier 300 may include a matching network 308 (e.g., an impedance matching network). The matching network 308 may be a multi-pole matching network including three poles: a first pole, a second pole, and a third pole. The first pole may include a first LC resonator 310, and the second pole may include a second LC resonator 320. The third pole may include a first transmission line resonator (e.g., transmission line resonator 330). The transmission line resonator 330 may be characterized by an impedance (e.g., Z). The transmission line resonator 330 may be a quarter-wave transmission line resonator (e.g., θ represents the electrical length of the transmission line of the transmission line resonator 330). In some embodiments, θ = ω τ, where ω is the frequency at which the length is specified, and τ is the electrical delay for that length of the transmission line. The parametric amplifier 300 may further include a shunt inductor 338. As a lumped-element LC resonator, the first LC resonator 310 includes a first resonator inductor 312 (e.g., having a variable first inductance L1) and a first resonator capacitor 314 (e.g., having a first capacitance C1). In some embodiments, the first resonator inductor 312 may be comprised of a Josephson junction or an array of Josephson junctions. In other embodiments, the first resonator inductor 312 may be constructed of a superconducting quantum interference device (SQUID) or an array of SQUIDS (e.g., an array of radio frequency (RF)-SQUIDS). In some embodiments, a DC-SQUID may be employed to construct the first resonator inductor 312. In other embodiments, RF-SQUIDs may be employed to construct the first resonator inductor 312. When an array of RF-SQUIDs is used, the parametric amplifier 300 can achieve a high dynamic range as described above.

[0031] Similarly, the second LC resonator 320 includes a second resonator inductor 322 (e.g., having a second inductance L2) and a second resonator capacitor 324 (e.g., having a second capacitance C2). Unlike the third LC resonator 30 of FIG. 1, the third pole of the parametric amplifier includes a transmission line resonator 330. The first LC resonator 310 includes a first pole coupling capacitor 318 (e.g., having a capacitance C 12 The second LC resonator 320 is electrically coupled to the second LC resonator 320 via a second pole coupling capacitor 328 (e.g., having capacitance C 23 The first resonator inductor 312 is electrically coupled to the transmission line resonator 330 via a first resonator inductor 312 having a variable inductance that at least partially enables the amplification of the parametric amplifier 300. For example, when the variable inductance of the first resonator inductor 312 is modulated at a certain frequency (the "pump frequency"), the parametric amplifier 300 can amplify signals near half the pump frequency.

[0032] The parametric amplifier 300 has one or more input terminals, such as input terminal 350. The matching network 308 includes an input feedline 340 and a shunt inductor 338 (e.g., L 34 1 , the electrical coupling between input terminal 350 and matching network 308 of parametric amplifier 300 is inductive, and is enabled at least in part through transmission line resonator 330 and shunt inductor 338. In some embodiments, input feedline 340 is an input feedline, and in other embodiments, input feedline 340 is a feedline (e.g., having an impedance magnitude (or resistance) of Z0).

[0033] Comparing the amplifier 02 of FIG. 1 with the parametric amplifier 300 of FIG. 3, in FIG. 3, the third LC resonator 30 of the matching network 08 (of the amplifier 02) is replaced with a transmission line resonator 330 in the matching network 308 of the parametric amplifier 300. The transmission line resonator 330 may be a quarter-wave transmission line resonator that inverts the input coupling reactance from capacitive (e.g., as in FIG. 1) to inductive (e.g., as in FIG. 3). Thus, the parametric amplifier 300 can be inductively coupled to a signal input circuit (e.g., via the input terminal 350). Because the reactance is now inductive, this mitigates unintended resonances. The transmission line resonator 330 also helps to cover the physical distance on the chip from the bond pad to the device, thereby further reducing stray resonances associated with wiring over this distance. Also, note that the input capacitor 38 of the amplifier 02 is replaced with a shunt inductor 330 in the parametric amplifier 300.

[0034] The use of inductive coupling (facilitated by the use of quarter-wave transmission line resonator 330) may at least partially mitigate resonances between the bond wires and the input to parametric amplifier 300. Furthermore, the length of transmission line resonator 330 may be sufficient to cover any physical distance between the amplifier and the bond pad, eliminating the need for an additional transmission line and any stray resonances associated with that additional length.

[0035] As noted above in conjunction with FIG. 1 , the input capacitor 38 (or amplifier 302) may be connected to the 50Ω feed. Referring to FIG. 1 , coupling occurs between a lumped parallel LC (e.g., the third LC resonator 30) and the 50Ω feed. The coupling between the input capacitor 38 and the 50Ω feed may need to be approximated because the admittance inverter is considered to have a negative compensation capacitance that may not be absorbed on the 50Ω side. This approximation tends to add significant frequency dependence to the coupling, potentially limiting the bandwidth of the design. Therefore, using the transmission line resonator 330 has another advantage. This is that because the coupling is inductive (rather than capacitive as in FIG. 1 ), there is no need to absorb negative reactance on the 50Ω side when the transmission line resonator 330 is employed in the parametric amplifier 300. The symmetry between the transmission line resonator 330 and the input feed line 340 may make it better suited to absorbing negative reactance. Both the input feed line 340 and the transmission line resonator 330 may be shortened to accommodate the negative reactance.

[0036] In the non-limiting embodiment of FIG. 3 , the matching network 308 has three matching sections (or poles). However, the embodiment is not so limited, and the matching network 308 may have any number of matching sections (or poles). For example, the parametric amplifier 300 may also be easily generalized to two or four sections. Furthermore, other resonators, such as quarter-wave or half-wave resonators, may be implemented as the transmission line resonator 330. Advantages of using the transmission line resonator 330 include the fact that a transmission line resonator can be easily implemented with modest manufacturing resources, for example, by a single-layer planar manufacturing process. The coupled shunt inductor 338 may further be realized by a short-circuit transmission line having a 45-degree electrical length according to the Richards transform.

[0037] Comparing FIG. 1 and FIG. 3, the second pole coupling capacitor 328 (in FIG. 3) couples a lumped-element LC resonator (e.g., second LC resonator 320) on one side and a transmission line resonator 330 on the other side, so its capacitance value (e.g., C 23 ) may be calculated differently than the formula used to calculate the capacitance value of the second-pole coupling capacitor 28 of FIG. 1. FIG. 4 provides a circuit-level diagram of a portion of the parametric amplifier 300 of FIG. 3 showing quantities used to calculate the capacitance value of the second-pole coupling capacitor 328 of the parametric amplifier 300, according to various embodiments. In FIG. 4, B0 may be the reactance of the second-pole coupling capacitor 328, B1 may be the negative reactance required to compensate for the coupling capacitance B0, and θ may be the transmission length of the transmission line resonator 330. Y in is the input admittance (eg, the inverse of the impedance) and may be calculated as follows:

number

[0038] If this structure acts as an admittance inverter with value J, then the constraint Y in =J 2 / Y L Substituting this constraint into the above equation gives:

number

[0039] The reactances B0 and B1 can be written in terms of J as follows:

number

[0040] The compensation line length of the transmission line resonator 330 can be calculated as follows:

number

[0041] The capacitance of the second pole coupling capacitor 328 (e.g., C 23 ) is related to B0, and the compensation capacitance related to B1 can be written as:

number

[0042] FIG. 5 illustrates another exemplary quantum computing system 500 according to an exemplary embodiment of the present disclosure. Quantum computing system 500 may be similar to quantum computing system 100 of FIG. 2. Accordingly, quantum computing system 500 may include qubits, including at least a first qubit (e.g., qubit 526). Qubit 526 has a quantum state. Qubit 526 may be a superconducting transmon qubit. The quantum state of qubit 526 may be encoded with a wave function represented as a projection onto the surface of a Bloch sphere, as shown in FIG. 5. Quantum computing system 500 also includes at least a first qubit measurement device (e.g., qubit measurement device 510). Qubit measurement device 510 enables the quantum state of qubit 526 to be measured (or observed) (via received signal 502). Qubit measurement device 510 may be a readout device included in readout device 114 of quantum computing system 100. Qubit measurement device 510 may receive received signal 502 from qubit 526. Accordingly, qubit measurement device 510 is configured to generate a first qubit signal (e.g., qubit signal 512) corresponding to the quantum state of qubit 526. Qubit signal 512 may be one embodiment of measurement result 108 in quantum computing system 100. Note that when the quantum state of qubit 526 is measured by qubit measurement device 510, the wave function of the quantum state may collapse into a single eigenstate of qubit measurement device 510.

[0043] Quantum computing system 500 may further include a first amplifier (e.g., parametric amplifier 520). Note that parametric amplifier 520 may be employed in amplifier device 530. Parametric amplifier 520 may be similar to parametric amplifier 300 of FIG. 3. In addition to parametric amplifier 520, amplifier device 530 may include circulator 528. Circulator 538 may be a three-port circulator such that amplifier device 530 operates as a reflection amplifier.

[0044] There is an electrical coupling between the qubit measurement device 510 and the parametric amplifier 520 (e.g., via a circulator 528). Thus, the parametric amplifier 520 may be configured to amplify the qubit signal 512 via the electrical coupling. Thus, when the qubit signal 512 is provided as an input to the parametric amplifier 520, the parametric amplifier 520 may provide an amplified qubit signal 522 as an output. Note that in the quantum computing system 100 of FIG. 2 , the amplifier device 530 (e.g., including the parametric amplifier 520) may be disposed along a transmission line that transmits the measurement result 108. For example, the parametric amplifier 520 may be disposed along a transmission line coupling the readout device 114 and the classical processor 104 of the quantum computing system 100. Via the circulator 528, the probe signal 502 may be fed back to the qubit 526.

[0045] As described above, parametric amplifier 520 may be similar to (or equivalent to) parametric amplifier 300 of FIG. 3. Thus, parametric amplifier 520 may be a Josephson parametric amplifier (JPA). Thus, parametric amplifier 520 may include a first transmission line resonator (e.g., transmission line resonator 330 of FIG. 3). As described in conjunction with FIG. 3, the transmission line resonator provides inductive reactance to the electrical coupling between qubit measurement device 510 and parametric amplifier 520. The inductive coupling between qubit measurement device 510 and parametric amplifier 520 enables transmission of qubit signal 512.

[0046] Although not explicitly shown in FIG. 5 , the parametric amplifier 520, which is similar (or equivalent) to the parametric amplifier 300 of FIG. 3 , may include a multi-pole impedance matching network (e.g., matching network 308 of FIG. 3 ). Thus, the multi-pole impedance matching network of the parametric amplifier 520 may include a first pole, a second pole, and a third pole. The third pole may include a transmission line resonator. The third pole of the parametric amplifier 520 may further include a terminal transmission line. The terminal transmission line of the third pole may include a shunt inductor (e.g., shunt inductor 338 of FIG. 3 ). The transmission line resonator may electrically (e.g., inductively) couple a terminal line of the parametric amplifier 520 (e.g., input terminal 350 of FIG. 3 ) to one or more poles of the impedance matching network of the parametric amplifier 520.

[0047] A first pole of the multi-pole impedance matching network includes a first inductive-capacitive (LC) resonant circuit (e.g., first LC resonator 310 in FIG. 3 ) and a second LC resonant circuit (e.g., second LC resonator 320 in FIG. 3 ). A capacitor (e.g., second pole coupling capacitor 328 in FIG. 3 ) may electrically (e.g., capacitively) couple the transmission line resonator to the second LC resonant circuit. A second capacitor (e.g., first pole coupling capacitor 318 in FIG. 3 ) may electrically (e.g., capacitively) couple the first LC resonant circuit to the second LC resonant circuit.

[0048] Although not explicitly shown in FIG. 5 , quantum computing system 500 may include a set of qubits, a set of transmission lines, and a set of Josephson parametric amplifiers (JPAs). Each JPA in the set of JPAs may be similar to (or equivalent to) parametric amplifier 300 of FIG. 3 and / or parametric amplifier 520 of FIG. 5 . Thus, the set of JPAs may include parametric amplifier 300 and / or parametric amplifier 520 of FIG. 3 . The set of qubits may include qubit 526. Thus, each qubit in the set of qubits may be a superconducting transmon qubit. Each transmission line in the set of transmission lines may be configured to transmit a qubit signal (e.g., qubit signal 512) encoding a measurement of the quantum state of a corresponding qubit in the set of qubits (e.g., a measurement made by a qubit measurement device, including, but not limited to, qubit measurement device 510). Each JPA in the set of JPAs may include a transmission line resonator (e.g., transmission line resonator 330 of FIG. 3 ). The transmission line resonator of the JPA can inductively couple the JPA to a corresponding transmission line of the set of transmission lines via an inductive reactance, and the transmission line corresponding to the JPA can inductively provide the qubit signal to the JPA for amplification.

[0049] FIG. 6 illustrates a non-limiting frequency response curve 600 for the parametric amplifier of FIGS. 3 and 5 , according to various embodiments. That is, the frequency response curve 600 may be similar to the frequency response curve of the parametric amplifier 300 of FIG. 3 and / or the parametric amplifier 500 of FIG. 5 . The frequency response curve 600 may characterize the bandwidth of the parametric amplifier. FIG. 6 illustrates an amplifier gain 602 of approximately 20 decibels (dB) for the parametric amplifier. In some embodiments, the amplifier gain 602 is in the range of 15 to 25 decibels (dB). The bandwidth of the parametric amplifier may have a center frequency 604 of approximately 4.6 GHz and a full width at half maximum (e.g., FWHM 606) of approximately 400 MHz. In other non-limiting embodiments, the center frequency 604 may be approximately 10 GHz. In some embodiments, the parametric amplifier of the embodiments may be designed to have a center frequency 604 anywhere in the range of 4 to 10 GHz. The FWHM 606 may be in the range of 200 to 600 MHz.

[0050] Implementations of the digital, classical, and / or quantum subject matter, and digital functional operations and quantum operations described herein may be implemented in digital electronic circuitry, suitable quantum circuitry, or more generally, in a quantum computing system, in tangibly embodied digital and / or quantum computer software or firmware, in digital and / or quantum computing hardware including the structures disclosed herein and their equivalents, or in one or more combinations thereof. The term "quantum computing system" may include, but is not limited to, a quantum computer / computing system, a quantum information processing system, a quantum cryptography system, or a quantum simulator.

[0051] Implementations of the digital, classical, and / or quantum subject matter, and digital functional operations and quantum operations described herein may be implemented in digital electronic circuitry, suitable quantum circuitry, or more generally, in a quantum computing system, in tangibly embodied digital and / or quantum computer software or firmware, in digital and / or quantum computing hardware including the structures disclosed herein and their equivalents, or in one or more combinations thereof. The term "quantum computing system" may include, but is not limited to, a quantum computer / computing system, a quantum information processing system, a quantum cryptography system, or a quantum simulator.

[0052] Embodiments of the digital and / or quantum subject matter described herein can be implemented as one or more digital and / or quantum computer programs, i.e., as one or more modules of digital and / or quantum computer program instructions encoded on a tangible, non-transitory storage medium for execution by or to control the operation of a data processing apparatus. The digital and / or quantum computer storage medium may be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more qubit / qubit structures, or a combination of one or more thereof. Alternatively or additionally, the program instructions can be encoded on an artificially generated propagated signal (e.g., a machine-generated electrical, optical, or electromagnetic signal) capable of encoding digital and / or quantum information, generated to encode digital and / or quantum information for transmission to a suitable receiver device for execution by a data processing apparatus.

[0053] The terms quantum information and quantum data refer to information or data conveyed by, held in, or stored in a quantum system, where the smallest nontrivial system is a qubit, i.e., a system defining a unit of quantum information. The term "qubit" is understood to encompass all quantum systems that can be appropriately approximated as a two-level system in the corresponding context. Such quantum systems may include, for example, multi-level systems having two or more levels. By way of example, such systems may include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, a computational basis state is specified in a ground state and a first excited state, although it is understood that other configurations are possible in which a computational state is specified in a higher-level excited state (e.g., a qubit).

[0054] The term "data processing apparatus" refers to digital and / or quantum data processing hardware and encompasses all types of apparatus, devices, and machines for processing digital and / or quantum data, including, by way of example, a programmable digital processor, a programmable quantum processor, a digital computer, a quantum computer, or multiple digital and quantum processors or computers, as well as combinations thereof. An apparatus may also be or further include special-purpose logic circuits, such as an FPGA (field-programmable gate array), or an ASIC (application-specific integrated circuit), or a quantum simulator, i.e., a quantum data processing apparatus designed to simulate or generate information about a particular quantum system. Specifically, a quantum simulator is a special-purpose quantum computer that does not have the capability to perform universal quantum computation. An apparatus may optionally include, in addition to hardware, code that creates an execution environment for digital and / or quantum computer programs, such as code constituting processor firmware, a protocol stack, a database management system, an operating system, or one or more combinations thereof.

[0055] A digital or classical computer program, which may also be called or described as a program, software, software application, module, software module, script, or code, can be written in any form of programming language, including a compiled or interpreted language, or a declarative or procedural language, and can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a digital computing environment. A quantum computer program, which may also be called or described as a program, software, software application, module, software module, script, or code, can be written in any form of programming language, including a compiled or interpreted language, or a declarative or procedural language, and can be converted to or written in an appropriate quantum programming language, e.g., QCL, Quipper, Cirq, etc.

[0056] A digital and / or quantum computer program may, but need not, correspond to a file in a file system. A program can be stored in part of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple associated files (e.g., files storing one or more modules, subprograms, or portions of code). A digital and / or quantum computer program can be deployed to run on one digital or quantum computer, on multiple digital and / or quantum computers located at one location, or on multiple digital and / or quantum computers distributed at multiple locations and interconnected by a digital and / or quantum data communication network. A quantum data communication network is understood to be a network that can transmit quantum data using quantum systems (e.g., qubits). Generally, digital data communication networks cannot transmit quantum data, but quantum data communication networks can transmit both quantum data and digital data.

[0057] The processes and logic flows described herein may be implemented by one or more programmable digital and / or quantum computers, as appropriate, running one or more digital and / or quantum computer programs that operate with one or more digital and / or quantum processors to perform functions by performing operations on input digital and quantum data to generate outputs. The processes and logic flows may also be performed, and the apparatus may be implemented, as special purpose logic circuits (e.g., FPGAs or ASICs) or quantum simulators, or by a combination of special purpose logic circuits or quantum simulators with one or more programmed digital and / or quantum computers.

[0058] One or more digital and / or quantum computers or processors "configured" or "operable" to perform a particular operation or action means that the system has installed thereon software, firmware, hardware, or a combination thereof that, during operation, causes the system to perform the operation or action. One or more digital and / or quantum computer programs configured to perform a particular operation or action means that the one or more programs contain instructions that, when executed by a digital and / or quantum data processing device, cause the device to perform the operation or action. A quantum computer may receive instructions from a digital computer that, when executed by a quantum computing device, causes the device to perform an operation or action.

[0059] A digital and / or quantum computer suitable for executing a digital and / or quantum computer program can be based on a general-purpose or a dedicated digital and / or quantum microprocessor, or both, or any other kind of central digital and / or quantum processing unit. Typically, the central digital and / or quantum processing unit receives instructions and digital and / or quantum data from a read-only memory, or a random access memory, or a quantum system suitable for transmitting quantum data (e.g., photons), or a combination thereof.

[0060] Some exemplary elements of a digital and / or quantum computer are a central processing unit for performing or executing instructions and one or more memory devices for storing instructions and digital and / or quantum data. The central processing unit and memory may be supplemented by or incorporated into special-purpose logic circuitry or a quantum simulator. Generally, a digital and / or quantum computer also includes one or more mass storage devices for storing digital and / or quantum data, such as, for example, magnetic, magneto-optical, or optical disks, or quantum systems suitable for storing quantum information, or is operably coupled to receive digital and / or quantum data from or transfer digital and / or quantum data to one or more mass storage devices, or both. However, a digital and / or quantum computer need not have such devices.

[0061] Digital and / or quantum computer-readable media suitable for storing digital and / or quantum computer program instructions and digital and / or quantum data include, by way of example, semiconductor memory devices (e.g., EPROM, EEPROM, and flash memory devices), magnetic disks (e.g., internal hard disks or removable disks), magneto-optical disks, CD-ROM and DVD-ROM disks, and all forms of non-volatile digital and / or quantum memories, media, and memory devices, including quantum systems (e.g., trapped atoms or electrons). A quantum memory is understood to be a device capable of storing quantum data with high fidelity and efficiency for long periods of time, for example, a light-matter interface that uses light for transmission and matter for storage and preservation of the quantum characteristics of the quantum data, such as superposition or quantum coherence.

[0062] Control of the various systems, or portions thereof, described herein may be implemented in a digital and / or quantum computer program product stored on one or more tangible, non-transitory, machine-readable storage media and including instructions executable on one or more digital and / or quantum processing devices. The systems described herein, or portions thereof, may each be implemented as an apparatus, method, or electronic system, which may include one or more digital and / or quantum processing devices and a memory for storing executable instructions for performing the operations described herein.

[0063] While this specification contains details of many specific embodiments, these should not be construed as limiting the scope of what may be claimed, but rather as descriptions of features that may be inherent in particular embodiments. Certain features described herein in the context of separate embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented in multiple embodiments separately or in any suitable subcombination. Furthermore, while features may be described above as acting in a particular combination and initially claimed as such, one or more features from a claimed combination may, in some cases, be deleted from the combination, and the claimed combination may be directed to a subcombination or a variation of the subcombination.

[0064] Similarly, although operations are depicted in the figures in a particular order, this should not be understood as requiring such operations to be performed in the particular order or sequentially depicted, or to perform all of the depicted operations, to achieve desirable results. In certain situations, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system modules and components in the above-described embodiments should not be understood as requiring such separation in all embodiments, and it should be understood that the program components and systems described above may generally be integrated into a single software product or packaged into multiple software products.

[0065] Specific implementations of the present subject matter have been described. Other implementations are within the scope of the following claims. For example, the actions recited in the claims can be performed in a different order and still produce desirable results. By way of example, the processes depicted in the accompanying figures do not necessarily require the particular order shown or sequential order to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous.

Claims

1. 1. A quantum computing system, comprising: a first qubit; and a first measurement device configured to generate a first qubit signal corresponding to a first quantum state of the first qubit; a first amplifier configured to amplify the first qubit signal, the first amplifier including a first transmission line resonator providing an inductive reactance to an electrical coupling between the first measurement device and the first amplifier, the inductive reactance to the electrical coupling enabling transmission of the first qubit signal. Quantum computing system.

2. 10. The quantum computing system of claim 1, wherein the first amplifier is a Josephson parametric amplifier.

3. 10. The quantum computing system of claim 1, wherein the first amplifier further comprises a multi-pole impedance matching network including a first pole, a second pole, and a third pole.

4. The quantum computing system of claim 3 , wherein the third pole comprises the first transmission line resonator.

5. 5. The quantum computing system of claim 4, wherein the third pole terminal transmission line includes a shunt inductor.

6. 4. The quantum computing system of claim 3, wherein the first pole comprises a first inductive-capacitive (LC) resonant circuit and the second pole comprises a second LC resonant circuit.

7. 7. The quantum computing system of claim 6, wherein a first capacitor electrically couples the first transmission line resonator to the second LC resonant circuit.

8. 8. The quantum computing system of claim 7, wherein a second capacitor electrically couples the first LC resonant circuit to the second LC resonant circuit.

9. 10. The quantum computing system of claim 1, wherein the nonlinear inductor of the first amplifier comprises at least one of a Josephson junction, a direct current (DC) superconducting quantum interference device (SQUID), or a radio frequency (RF) SQUID.

10. 10. The quantum computing system of claim 1, wherein the first transmission line resonator electrically couples a terminal line of the first amplifier to one or more poles of an impedance matching network of the first amplifier.

11. 10. The quantum computing system of claim 1, wherein the first amplifier has a gain in the range of 15 to 25 decibels (dB).

12. 10. The quantum computing system of claim 1, wherein the bandwidth of the first amplifier has a center frequency in the range of 4 to 10 GHz.

13. 10. The quantum computing system of claim 1, wherein the bandwidth of the first amplifier has a full width at half maximum (FWHM) in the range of 200 to 600 MHz.

14. 1. An amplifier device comprising: a first pole including a first inductive-capacitive (LC) resonant circuit; a second pole comprising a transmission line resonator providing an inductive reactance at the input to the amplifier device; 1. An amplifier device comprising:

15. The amplifier device of claim 14 , further comprising: a multi-pole impedance matching network including the first pole and the second pole.

16. 16. The amplifier device of claim 15, wherein the multi-pole impedance matching network further includes a third pole comprising a second LC resonant circuit.

17. The amplifier device of claim 16 , further comprising a capacitor electrically coupling the first pole and the third pole.

18. The amplifier device of claim 14 , wherein the second pole further comprises a shunt inductor.

19. The amplifier device of claim 14 , wherein a first inductor of the first LC resonant circuit has a variable inductance.

20. 1. A quantum computing system, comprising: A set of qubits, a set of transmission lines, each transmission line of the set of transmission lines configured to transmit a qubit signal encoding a measurement of a quantum state of a corresponding qubit in the set of qubits; a set of Josephson parametric amplifiers (JPAs), each JPA of the set including a transmission line resonator that electrically couples the JPA to a corresponding transmission line of the set of transmission lines via an inductive reactance, the corresponding transmission line inductively providing its qubit signal to the JPA for amplification; 1. A quantum computing system comprising:

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