Systems, apparatus, and methods for improving the operational efficiency of autonomous robots

The system optimizes task assignment for autonomous robots by considering local and global variables, addressing inefficiencies caused by congestion and resource waste in warehouses.

JP2026510032APending Publication Date: 2026-03-27OCADO INNOVATION LTD
View PDF 0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-06
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

Existing task assignment methods for autonomous robots in warehouses do not account for conditions within the warehouse that affect task completion, leading to inefficiencies due to congestion and unnecessary resource consumption.

Method used

A system that assigns tasks to autonomous robots based on both local and global variables, including task characteristics, robot capabilities, and environmental conditions, such as congestion levels, to optimize navigation and task execution efficiency.

Benefits of technology

Enhances the operational efficiency of autonomous robots by minimizing interruptions and resource consumption, improving task completion times and overall performance.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2026510032000001_ABST
    Figure 2026510032000001_ABST
Patent Text Reader

Abstract

Systems, devices, and methods for improving the execution efficiency of an autonomous robot are disclosed. An exemplary device includes a processor circuit for identifying a first task and a second task; detecting a first condition associated with a first location, the first condition affecting a first task execution condition associated with the execution of the first task by an autonomous vehicle, and detecting a second condition associated with a second location, the first condition affecting a second task execution condition associated with the execution of the second task by an autonomous vehicle, including congestion at the first location; selecting one of the first or second tasks to be performed based on the first and second conditions, and causing an autonomous vehicle to proceed to the first or second location to perform the selected one of the first or second tasks.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application claims priority to U.S. Patent Application No. 18 / 179,033, filed on March 6, 2023, the entire content of which is incorporated herein by reference.

[0002] The present disclosure generally relates to autonomous robots, and more particularly, to systems, devices, and methods for improving the performance efficiency of autonomous robots.

Background Art

[0003] Autonomous robots can be used in a warehouse to perform tasks such as retrieving and transporting items. Two or more autonomous robots may be moving through the warehouse at a given time and, in some cases, may be in proximity to each other within the warehouse. For example, two or more autonomous robots may be moving along one aisle of the warehouse at the same time. Also, other types of equipment, such as individual workers and / or manually operated forklifts, may be moving within the warehouse during the movement of the autonomous robots.

Summary of the Invention

[0004] According to this disclosure, the present invention relates to a device comprising memory, machine-readable instructions, and a processor circuit, wherein the processor circuit, in use, identifies a first task and a second task, detects a first condition associated with the first location such that the first task is associated with a first location, the second task is associated with a second location, and the second location is different from the first location, and the first condition affects the first task execution conditions associated with the execution of the first task by an autonomous vehicle, and the first condition affects congestion at the first location. A device is provided which is configured to execute machine-readable instructions to detect a second condition associated with a second location, including a first condition, select one of a first or second task to be performed by an autonomous vehicle based on the first and second conditions, such that the second condition affects a second task performance condition associated with the autonomous vehicle performing the second task, and cause the autonomous vehicle to proceed to the first or second location in order to perform the selected one of the first or second tasks.

[0005] Embodiments of the present disclosure will be described merely by example, with reference to the accompanying drawings, which have similar reference numbers indicating the same or corresponding portions. [Brief explanation of the drawing]

[0006] [Figure 1] A diagram illustrating an exemplary system taught in this disclosure, including an autonomous robot in an environment and an exemplary workload control circuit for assigning tasks to the autonomous robot. [Figure 2] Figure 1 shows a block diagram of an exemplary autonomous robot. [Figure 3] Block diagram of an exemplary machine learning model training circuit. [Figure 4] An illustrative block diagram of a workload control circuit. [Figure 5]A flowchart illustrating exemplary machine-readable instructions and / or exemplary actions that may be performed by exemplary processor circuits to implement the machine learning training control circuit shown in Figure 3. [Figure 6] A flowchart illustrating exemplary machine-readable instructions and / or exemplary operations that may be performed by exemplary processor circuits to implement the workload control circuit of Figure 4. [Figure 7] A block diagram of an exemplary processing platform, including a processor circuit structured to perform exemplary machine-readable instructions and / or exemplary actions in Figure 5, in order to implement the machine learning model training circuit in Figure 3. [Figure 8] A block diagram of an exemplary processing platform, including a processor circuit structured to perform exemplary machine-readable instructions and / or exemplary operations in Figure 6, in order to implement the workload control circuit of Figure 4. [Figure 9] Block diagrams of exemplary implementation configurations of the processor circuit shown in Figure 7 and / or Figure 8. [Figure 10] Block diagram of another exemplary implementation of the processor circuit in Figure 7 and / or Figure 8. [Figure 11] A block diagram of an exemplary software distribution platform (e.g., one or more servers) for distributing software (e.g., software corresponding to the exemplary machine-readable instructions in Figure 8) to client devices associated with end users and / or consumers. [Modes for carrying out the invention]

[0007] As described above, autonomous robots may be used in warehouses to perform tasks such as retrieving and transporting goods. Two or more autonomous robots may be moving through the warehouse at a given time, and in some cases, they may be in close proximity to each other within the warehouse. For example, two or more autonomous robots may be moving down the same aisle in the warehouse at the same time, each robot performing its assigned task. In addition, individual workers and / or other types of equipment, such as manual forklifts, may be moving through the warehouse, particularly along the robots' paths, during the autonomous robots' movements.

[0008] In some cases, autonomous robots are assigned pending or incomplete tasks by a central source, such as a dispatcher or warehouse management system, using algorithms that assign tasks based on the robot's current availability. These tasks may be assigned based on variables such as which task will be completed next in the chronological order of the incomplete tasks, or which task has the highest priority over other incomplete tasks. However, task assignment based solely on chronological order or priority does not take into account conditions within the warehouse that may affect task completion.

[0009] For example, the highest-priority task may involve one or more items located in an area where other robots and / or equipment are located at a given time. In some known examples, a robot may be assigned the highest-priority task without considering the presence of other robots or equipment near the location of one or more items that need to be retrieved in connection with the performance of the highest-priority task. As a result, the robot will proceed into an area of ​​congestion.

[0010] Autonomous robots include safety features to prevent or mitigate accidents between other autonomous robots, equipment, and / or individuals. For example, if an autonomous robot detects an obstacle in its path, it may take one or more actions to prevent a collision, such as stopping and refraining from proceeding until the obstacle is gone, correcting its path, or reducing its speed.

[0011] For example, when assigned the task of retrieving an item from a location within a warehouse, the first autonomous robot navigates to that location. However, congestion within the warehouse can affect the efficiency of the first autonomous robot in performing the task.

[0012] For example, the first autonomous robot may detect the presence of a first obstacle in the aisle it is moving along, such as a manual forklift. The first autonomous robot may stop for a period of time until the first obstacle is gone. Upon resuming movement, the first autonomous robot may detect a second obstacle in the aisle, such as a second autonomous robot retrieving an item close to the first robot's destination. Thus, the first autonomous robot may stop again until the second autonomous robot moves. Frequent stops by the first autonomous robot reduce the speed at which the first autonomous vehicle performs its task, thus decreasing the efficiency of the first autonomous robot in performing its task. These interruptions also hinder the operation of the first robot (for example, the first autonomous robot may need to be commanded or reset to resume movement). Therefore, congestion in the warehouse can lead to unnecessary consumption of autonomous robot resources (e.g., power consumption, wear and tear), as well as unnecessary consumption of processing resources for controlling the robot, and generally affect the efficiency of the robot's operation.

[0013] Exemplary systems, apparatus, and methods for providing scheduling of tasks to be performed by autonomous robots (e.g., autonomous vehicles) are disclosed herein, by considering the performance efficiency of the autonomous robot in completing the task. In the examples disclosed herein, performance efficiency may include the efficiency with which the autonomous robot navigates an environment such as a warehouse to perform the task (e.g., minimizing interruptions in progress, reducing unplanned stoppages), and / or the efficiency of the task execution (e.g., based on the robot type).

[0014] Examples disclosed herein involve selectively assigning pending or incomplete tasks to an autonomous robot to increase the robot's efficiency in performing the tasks, taking into account the nature of the tasks (e.g., the characteristics of the items associated with the tasks, the deadline for completion), as well as conditions in the environment in which the robot is located (e.g., a warehouse) that may affect the robot's performance of the tasks. Some examples disclosed herein involve scheduling the performance of tasks by an autonomous robot to minimize congestion in the warehouse caused by the presence of other autonomous robots, individual workers, and / or other types of equipment (e.g., manual equipment) in the warehouse.

[0015] For example, when a robot is available to perform a task, the examples disclosed herein may not assign the highest-priority or oldest task to the robot if the robot would not be able to complete such a task as efficiently as another pending task. For example, if the highest-priority incomplete task would cause the robot to proceed to a congested area in the warehouse to complete the task, thereby slowing down the task's completion, the examples disclosed herein may instead select another pending task for the robot to complete that would cause the robot to proceed to a less congested area of ​​the warehouse. The examples disclosed herein can then evaluate which available robot should receive the highest-priority task, for example, based on changes in congestion levels over time, robot type, etc.

[0016] The examples disclosed herein provide an optimization of the execution efficiency of autonomous robots when assigning tasks to robots. The examples disclosed herein consider both local variables and global variables related to activities in the warehouse when assigning tasks to autonomous robots. Local variables may include, for example, the characteristics of an order and / or the (one or more) items of an order to be retrieved (e.g., size, weight, deadline for order completion, location in the warehouse), and / or the characteristics of the autonomous robot (e.g., availability, capacity). Global variables may include the current and / or expected locations of other autonomous robots, equipment, and / or individuals in the warehouse at a particular time, and the nature of other orders being performed in the warehouse at a given time (e.g., whether an order may require additional time and / or equipment to retrieve from the shelf, whether multiple orders include items stored in similar locations in the warehouse, order fulfillment time requirements, etc.). Local and / or global variables may be identified, for example, from order data, the output of sensors associated with autonomous robots and / or other equipment in the warehouse, the output of handheld devices carried by individual workers, historical task execution data, etc.

[0017] Some examples disclosed herein consider robot type and / or equipment type when assigning pending or incomplete tasks. Some examples may consider differences in robots, such as size and storage area capacity, when assigning tasks. Some examples disclosed herein may choose to assign different tasks to a particular robot, for example, a high-priority task, if the robot can perform a different task more efficiently based on its robot type (e.g., an autonomous robot with a forklift versus an autonomous robot with an arm for reaching items on a shelf). Some examples disclosed herein consider other types of equipment (e.g., a manual forklift) when assigning tasks to robots.

[0018] The examples disclosed in this specification are described with respect to a warehouse for storing inventory, but the examples disclosed in this specification can be implemented with respect to other environments including autonomous robots. Thus, the examples disclosed in this specification are not limited to inventory storage warehouses.

[0019] FIG. 1 shows an exemplary system 100 according to the teachings of the present disclosure. In the example of FIG. 1, a warehouse 102 stores inventory (e.g., (one or more) products) for one or more merchants (e.g., (one or more) retailers, (one or more) sellers, or (one or more) other providers). The warehouse 102 includes storage locations for storing inventory, such as shelves, boxes, containers, baskets, and / or other means for storing inventory. For illustrative purposes, the warehouse 102 in FIG. 1 includes a first inventory storage location 104, a second inventory storage location 106, a third inventory storage location 108, a fourth inventory storage location 110, and n other inventory storage locations 112. Each of the storage locations 104, 106, 108, 110, 112 stores one or more products. In the example of FIG. 1, the (one or more) products retrieved from the (one or more) storage locations 104, 106, 108, 110, 112 associated with an order (e.g., an order received via a retailer or other seller's website) can be delivered, for example, to an order assembly area where the order packaging is performed.

[0020] In the example of FIG. 1, one or more autonomous robots are used to retrieve the (one or more) products from the (one or more) storage locations 104, 106, 108, 110, 112 to facilitate order fulfillment for the (one or more) products. In the example of FIG. 1, the autonomous robots include autonomous vehicles (or motor vehicles). In particular, a first autonomous vehicle 116, a second autonomous vehicle 118, and n other autonomous vehicles 120 are located within the warehouse 102. The warehouse 102 can include additional autonomous vehicles, or fewer autonomous vehicles than shown in FIG. 1. Also, the warehouse 102 can include other types of autonomous robots or automated robots.

[0021] In the exemplary system 100 of FIG. 1, the autonomous vehicles 116, 118, 120 are communicatively coupled to a workload control circuit 122 (e.g., a processor circuit). The autonomous vehicles 116, 118, 120 proceed to specific inventory storage locations 104, 106, 108, 110, 112 in the warehouse 102 in response to instructions received from the workload control circuit 122. For example, the workload control circuit 122 can assign a task or workload to the first autonomous vehicle 116 in relation to a first order to cause the first autonomous vehicle 116 to move to the first inventory storage location 104 to retrieve the first product 119 stored at the first inventory storage location 104. The workload control circuit 122 can cause the first autonomous vehicle 116 to leave the first inventory storage location 104 when the first product 119 is loaded onto the first autonomous vehicle 116 from the first inventory storage location 104. In some examples, a user (e.g., a warehouse employee) loads the first product 119 onto the first autonomous vehicle 116. In some examples, the first autonomous vehicle 116 includes a robotic arm for, e.g., picking the first product 119 from the first inventory storage location 104 and moving the first product 119 to a storage area of the first autonomous vehicle 116.

[0022] The workload control circuit 122 manages the assignment of tasks to the autonomous vehicles 116, 118, and 120. For example, the workload control circuit 122 receives orders made by consumers through one or more order sources (e.g., online store, telephone order). The workload control circuit 122 identifies one or more tasks to be performed to facilitate the completion of one or more orders, such as retrieving one or more items in an order from the corresponding inventory storage locations 104, 106, 108, 110, and 112. In some examples, one or more of the tasks to be performed (i.e., one or more pending or incomplete tasks) may be assigned a higher priority level than other tasks, for example, due to the due date associated with the order. In some examples, pending tasks are associated in chronological order based on the task's age. Tasks may be associated with other properties, such as size, weight, or location in warehouse 102.

[0023] In the example shown in Figure 1, the workload control circuit 122 identifies one or more autonomous vehicles 116, 118, 120 that are available or expected to be available to perform a given task. The workload control circuit 122 may identify such (one or more) autonomous vehicles 116, 118, 120 based, for example, on (a) the status of tasks previously assigned to the autonomous vehicles 116, 118, 120 at a given time (or lack thereof), and (b) the properties of the autonomous vehicles (e.g., size, capacity) taking into account the nature of the task to be performed (e.g., size, weight, location).

[0024] When assigning tasks to specific autonomous vehicles 116, 118, and 120, the exemplary workload control circuit 122 also considers variables indicating conditions in warehouse 102 that may affect task execution. For example, the first autonomous vehicle 116 is available to perform a task. A first pending task may include retrieving a first product 119 from a first inventory storage location 104. The first task may be associated with a higher priority level than a second pending task that includes retrieving a second product 124 from a second inventory storage location 106.

[0025] However, as shown in Figure 1, the area of ​​warehouse 102, including the first inventory storage location 104, is congested in that two autonomous vehicles 120, a first manual equipment device 126 (e.g., a forklift), a second manual equipment device 128, and a first user 130 are in close proximity to the first inventory storage location 104.

[0026] The workload control circuit 122 can identify conditions in warehouse 102, such as congestion, based on data output from, for example, one or more sensors 121 carried by autonomous vehicles 116, 118, 120, one or more sensors 123 carried by equipment devices 126, 128, and / or one or more sensors 125 of user device 132 carried by user 130. The robot, equipment, and / or user device sensors 121, 123, 125 may include, for example, position sensors for generating an output indicating location relative to warehouse 102, and image sensors for capturing images of different areas of warehouse 102 that can be analyzed by the workload control circuit 122. In some examples, the workload control circuit 122 identifies conditions in warehouse 102 based on one or more sensors 127 located within warehouse 102. The one or more environmental sensors 127 may include, for example, image sensors for capturing images of warehouse 102.

[0027] If, taking congestion into consideration, the workload control circuit 122 is configured to assign the first task to the first autonomous vehicle 116 so that it is performed before the second task, then congestion in the area of ​​the first inventory storage location and / or along the vehicle's path may reduce the efficiency with which the first autonomous vehicle 116 navigates to the first inventory storage location 104, and therefore the efficiency with which the first autonomous vehicle 116 performs the first task. For example, due to congestion, the first autonomous vehicle 116 may stop moving to avoid a collision with manual equipment devices 126, 128.

[0028] Instead, in this example, the workload control circuit 122 instructs the first autonomous vehicle 116 to perform a second task: to retrieve a second product 124 from a second inventory storage location 106. As shown in Figure 1, the second inventory storage location 106 is located in a less congested area than the first inventory storage location 104. Therefore, the first autonomous vehicle 116 can navigate to the second task and perform it more efficiently than the first task. In some examples, the lack of congestion at the second inventory storage location 106 allows the first autonomous vehicle 116 to navigate to the second task and perform it more efficiently than the first task, even if it has to travel a greater distance to the second inventory storage location 106 than it has to travel to the first inventory storage location 104.

[0029] The workload control circuit 122 may, for example, assign the first task to the first autonomous vehicle 116 after the second task has been completed, based on monitoring the congestion level at the first inventory storage location 104. In another example, the workload control circuit 122 may instruct the second autonomous vehicle 118 to perform the first task at a later time, such as while the first autonomous vehicle is performing the second task.

[0030] The above example illustrates scheduling tasks while considering congested areas in warehouse 102 to reduce or prevent navigation interruptions when performing tasks, but the workload control circuit 122 can consider other variables when assigning tasks. For example, the workload control circuit 122 can consider differences in robot types and the impact of robot types on performing different tasks. As an example, a third task may include retrieving a third product 134 from a third inventory storage location 108, and a fourth task may include retrieving a fourth product 136 from a fourth inventory storage location 110. In this example, the third task is held longer than the fourth task. Also in this example, the third product 134 is located on a shelf in the third inventory storage location 108, and the fourth product 136 is on the ground in the fourth storage location 110.

[0031] The workload control circuit 122 can identify that the first autonomous vehicle 116 is currently available to perform the third task. However, the workload control circuit 122 also identifies that the first autonomous vehicle 116 includes a fork but does not include a robotic arm. In this example, in order to complete the third task using the first autonomous vehicle 116, the user will need a ladder to retrieve the third product 134 and place the third product 134 into the first autonomous vehicle 116.

[0032] The workload control circuit 122 can determine that the second autonomous vehicle 118 will become available within a specific time threshold and will include a robotic arm. Thus, the workload control circuit 122 can determine that the second autonomous vehicle 118 will be more efficient than the first autonomous vehicle 116 in completing the third task. Thus, the workload control circuit 122 can instruct the first autonomous vehicle 116 to perform the fourth task, where the forks of the first autonomous vehicle 116 can provide efficient completion of the fourth task, which is to lift the fourth product 136 from the ground.

[0033] Accordingly, the workload control circuit 122 in Figure 1 takes into account local variables relating to (a) the nature of the task to be performed and the current or expected availability of one or more types of autonomous robots to perform the task, and global variables relating to conditions in warehouse 102 that may affect the progress of the autonomous robots and the performance of the task. As disclosed herein, the workload control circuit 122 runs a machine learning model to assign tasks to the autonomous vehicles 116, 118, and 120 in order to facilitate (e.g., optimize, maximize) the navigation efficiency of the autonomous vehicles 116, 118, and 120, and thus the efficiency of task performance.

[0034] Figure 2 shows an exemplary autonomous vehicle 200, which may be one of the first autonomous vehicle 116, the second autonomous vehicle 118, or other autonomous vehicles 120 in Figure 1. Figure 2 also shows an exemplary user device 202 (e.g., user device 132 in Figure 1) for use by a user (e.g., user 130) in warehouse 102.

[0035] The exemplary autonomous robot 200 in Figure 2 moves to locations within the warehouse 102 without user input control or with limited user input control during the movement of the vehicle 200. The exemplary autonomous vehicle 200 in Figure 2 includes one or more motors 204 (e.g., one or more electric motors and / or one or more other drive mechanisms) for causing the movement of the autonomous vehicle 200 via one or more wheels 206 of the vehicle 200. The autonomous vehicle 200 includes a motor control circuit 208 (e.g., hardware and / or software components) for controlling the speed of the vehicle 200. The autonomous vehicle 200 includes a vehicle control circuit 210 for controlling the movement of the autonomous vehicle 200. In the example in Figure 2, the vehicle control circuit 210 is implemented by the processor circuit 212 of the vehicle 200. The exemplary vehicle 200 in Figure 2 includes a power source 211, such as a battery, for providing power to components of the vehicle 200 that are communicably coupled via a bus 216.

[0036] An exemplary vehicle 200 includes sensors 121 (one or more motion sensors (e.g., one or more accelerometers), one or more GPS receivers, one or more image sensors, etc.) for outputting signals indicating the location of the autonomous vehicle 200 in warehouse 102. Signals from the navigation sensors 121 may be analyzed by the vehicle control circuit 210 with respect to controlling the movement of the vehicle 200.

[0037] In the example in Figure 2, the workload control circuit 122 is implemented by executable instructions executed on the processor circuit 212 of the autonomous vehicle 200. However, in other examples, the workload control circuit 122 is implemented by the processor circuit 215 of a user device 202 communicating with the autonomous vehicle 200 (for example, via a wired or wireless communication protocol) and / or by a cloud-based device 218 (for example, one or more servers, one or more processors, and / or one or more virtual machines). In other examples, one or more components of the workload control circuit 122 are implemented by dedicated circuits located on the autonomous vehicle 200 and / or the user device 202. These components may be implemented in software, in hardware, or in any combination of two or more of software, firmware, and / or hardware.

[0038] In the example shown in Figure 2, the workload control circuit 122 communicates with the management engine 220. The management engine 220 receives orders made by consumers through one or more order sources 222. The (one or more) order sources 222 may include, for example, an online store, telephone orders, orders made to customer service representatives, and / or other sources for collecting or obtaining orders. The workload control circuit 122 receives information relating to the orders made through the (one or more) order sources 222 (e.g., an online store), such as each product in the order, the priority level assigned to the order (e.g., urgent order), and the expected performance time or shipping date. As disclosed herein, the workload control circuit 122 assigns (one or more) tasks or (one or more) workloads to the autonomous vehicle 200 based on the orders received.

[0039] The vehicle control circuit 210 of the autonomous vehicle 200 can cause the autonomous vehicle 200 to move to a specific location in warehouse 102 in Figure 1, based on commands from the workload control circuit 122. The vehicle control circuit 210 can communicate with the workload control circuit 122 to notify the workload control circuit of things like when the vehicle 200 arrives at a location associated with a task (for example, inventory storage locations 104, 106, 108, 110, 112), when the vehicle 200 leaves that location, whether the task is completed or includes exceptions, and whether the vehicle 200 is available to perform a new task. More generally, the vehicle control circuit 210 can communicate robot status information to the workload control circuit 122.

[0040] In the example in Figure 2, the user workload application 214 is executed by the processor circuit 215 of the user device 202. In some examples, the user workload application 214 may receive instructions from the workload control circuit 122 regarding (one or more) tasks or workloads assigned to a specific user (e.g., user 130) to which the user device 202 is associated. The (one or more) tasks and / or workloads may be displayed via the display screen 226 of the user device 202. The user can provide input via the user workload application 214, such as whether the task has been completed or whether the task cannot be completed. The (one or more) user tasks or workloads may be associated with a specific order, for example.

[0041] Figure 3 is a block diagram of a machine learning model training circuit 300 for training (one or more) machine learning models, which will be executed by a workload control circuit 122 to assign tasks to autonomous robots (e.g., autonomous vehicles 116, 118, 120, 200) to improve the robots' execution efficiency (e.g., minimize navigation interruptions to the robots). The machine learning model training circuit 300 in Figure 3 may be instantiated (e.g., create an instance of it, make it exist for a short time, materialize it, implement it, etc.) by a processor circuit, such as a central processing unit that executes instructions. Additionally or alternatively, the machine learning model training circuit 300 in Figure 3 may be instantiated (e.g., create an instance of it, make it exist for a short time, materialize it, implement it, etc.) by an ASIC or FPGA structured to perform actions corresponding to instructions. Therefore, it should be understood that some or all of the circuit in Figure 3 may be instantiated at the same time or at different times. Some or all of the circuit may be instantiated, for example, in one or more threads running concurrently and / or sequentially on hardware. Furthermore, in some examples, part or all of the circuit in Figure 3 may be implemented by a microprocessor circuit that executes instructions for implementing one or more virtual machines and / or containers.

[0042] The exemplary machine learning model training circuit 300 in Figure 3 includes a training control circuit 302, a neural network training circuit 304, and a neural network processor circuit 306. In some examples, the training control circuit 302 is instantiated by a processor circuit that executes training control instructions and / or is configured to perform operations as shown by the flowchart in Figure 5. In some examples, the neural network training circuit 304 is instantiated by a processor circuit that executes training control instructions and / or is configured to perform operations as shown by the flowchart in Figure 5.

[0043] Generally, implementing an ML / AI system involves two phases: the learning / training phase and the inference phase. In the learning / training phase, a training algorithm is used to train a model to operate according to patterns and / or associations based on training data, for example. Generally, a model includes internal parameters that guide how input data is transformed into output data, through a set of nodes and connections within the model for transforming input data into output data.

[0044] Furthermore, hyperparameters are used as part of the training process to control how learning is carried out (for example, the learning rate, the number of layers to be used in the machine learning model, etc.). Hyperparameters are defined as training parameters that are determined before the training process begins.

[0045] Different types of training can be performed based on the type of ML / AI model and / or expected output. For example, supervised training uses inputs and corresponding expected (e.g., labeled) outputs to select parameters for an ML / AI model that reduce model error (e.g., by iterating across combinations of selected parameters). As used herein, labeling refers to the expected output of a machine learning model (e.g., classification, expected output value, etc.). Alternatively, unsupervised training (used, for example, in deep learning, a subset of machine learning, etc.) involves inferring patterns from inputs to select parameters for an ML / AI model (e.g., without the benefit of expected (e.g., labeled) outputs).

[0046] In the examples disclosed herein, training is performed either remotely (e.g., in the cloud or on a server) or locally (e.g., on robots 116, 118, 120, 200). Training is performed using hyperparameters that control how learning is performed (e.g., the learning rate, the number of layers to be used in the machine learning model). Training is performed using training data. In the examples disclosed herein, training data is generated from, for example, autonomous or automated robots (e.g., autonomous vehicles 116, 118, 120, 200), other types of equipment (e.g., manual equipment 126, 128), user devices (e.g., user devices 132, 202), sensors carried by (one or more) robots, equipment, or user devices, sensors located in the environment (e.g., environment 102, other environments), etc. When supervised training is used, the training data is labeled. In some examples, the training data is preprocessed. In some examples, retraining may be performed. Such retraining may be carried out, for example, in accordance with data collected by (one or more) autonomous robots 116, 118, 120, 200 while they are progressing and / or performing tasks.

[0047] Once training is complete, the model is deployed for use as an executable construct that processes inputs and provides outputs based on the network of nodes and connections defined in the model. The model can be stored locally in memory (e.g., temporarily in a cache and then moved to (e.g., main) memory after training) or in the cloud. The model can then be executed by the workload control circuit 122.

[0048] Once trained, the deployed model can operate in an inference phase to process data. In the inference phase, data to be analyzed (e.g., live data) is input to the model, and the model is executed to produce an output. This inference phase can be thought of as running the model to apply learned patterns and / or associations to live data. In some examples, the input data undergoes preprocessing before being used as input to the machine learning model. Furthermore, in some examples, the output data may undergo postprocessing after the output data is generated by the AI ​​model to transform the output into a useful result (e.g., a visualization of the data, instructions to be executed by the machine, etc.).

[0049] In some examples, the output of the unfolded model may be captured and provided as feedback. By analyzing the feedback, the accuracy of the unfolded model may be determined. If the feedback indicates that the accuracy of the unfolded model is lower than a threshold or other criterion, training of the updated model may be triggered to generate an updated unfolded model, using the feedback and updated training dataset, hyperparameters, etc.

[0050] In the examples disclosed herein, the neural network processor circuit 306 in Figure 3 implements one or more neural networks. The exemplary neural network training circuit 304 in Figure 3 performs training on the (one or more) neural networks implemented by the neural network processor circuit 306. In some examples disclosed herein, training is performed using a stochastic gradient descent algorithm. However, other methods for training the (one or more) neural networks may be used as additional or alternative methods.

[0051] The exemplary training control circuit 302 in Figure 3 instructs the neural network training circuit 304 to train one or more neural networks using the training data 308. In the example in Figure 3, the training data 308 is used by the neural network training circuit 304 to train one or more neural networks and is stored in the database 310.

[0052] In the example in Figure 3, the training data 308 may include data associated with the workload to be performed by the autonomous robot, the nature of the autonomous robot, the nature of the environment in which the autonomous robot can operate, the nature of other equipment and / or workers in the environment, and / or other types of reference data. For example, the training data 308 may include the nature of the order (e.g., due date, service level agreement), and / or the nature of the goods in the order (e.g., item location, weight, size, etc.).

[0053] Training data 308 may include properties of the autonomous robot, such as robot type, capacity, schedule and availability, path, position data, performance metrics (e.g., speed), and ability to perform a specific task. Training data 308 may include images of different types of robots (e.g., robots with arms, robots with forklifts, robots without arms, etc.). Training data 308 may include images of different types of robots performing different tasks.

[0054] The training data 308 may include the properties of equipment different from those of the autonomous robot, such as manual equipment (e.g., wheelbarrows, forklifts). In relation to manual equipment, the training data 308 may include data indicating capacity, availability, path, performance metrics, and the ability to perform different tasks.

[0055] Training data 308 may include images of manual equipment in relation to the performance of different tasks. Training data 308 may also include data associated with individual workers' task performance, such as performance metrics (e.g., the number of tasks performed, the rate at which tasks were performed, and a historical labor forecast).

[0056] The training data 308 may include data describing the properties of warehouses (for example, warehouse 102, another warehouse). For example, the training data 308 may include data such as aisle width and shelf height in different warehouses. The data may include image data labeled with measurements showing various aisle widths, shelf heights, etc.

[0057] The training data 308 may include other types of reference data, such as data showing previous instances of minimum and / or maximum levels of congestion in the warehouse. In such examples, the training data 308 may include associated job performance metrics by the autonomous robot between different levels of congestion.

[0058] The neural network training circuit 304 uses training data 308 to train (one or more) neural networks implemented by the neural network processor circuit 306. For example, the neural network training circuit 304 trains (one or more) neural networks to identify autonomous robots capable of performing a particular task, taking into account the nature of the task, as well as the current or expected availability of resources. The training data 308, including the nature of different autonomous robots, the nature of the task (e.g., goods, deadlines), and performance metrics of the robots when performing the task, may be used when training the neural network model to select an autonomous robot (e.g., a qualified autonomous robot) to perform the task. One or more local variable analysis models 312 are generated as a result of the neural network training. The (one or more) local variable analysis models 312 are stored in the database 314. Databases 310, 314 may be the same storage device or different storage devices.

[0059] In the example in Figure 3, the neural network training circuit 304 trains (one or more) neural networks to consider environmental conditions or variables, for example, at the current or future time when the task will be performed. Training data 308, including the nature of the environment, the nature of other types of equipment or workers in the environment, the nature of the task, and historical data showing the congestion level in the warehouse, can be used to train the neural network to consider global environmental conditions that may affect the performance of the task by the autonomous robot. One or more global variable analysis models 316 are generated as a result of the neural network training. The (one or more) global variable analysis models 316 are stored in the database 314.

[0060] In the example in Figure 3, the neural network training circuit 304 trains (one or more) neural networks to assign jobs to autonomous robots in the present and / or future to facilitate (e.g., optimize, maximize) execution efficiency. For example, the neural network training circuit 304 trains (one or more) neural networks to assign tasks in a way that minimizes interruptions to the progress of autonomous robots in the environment by avoiding congestion among robots, other equipment, and individuals throughout the warehouse, while optimizing job execution efficiency. The training data 308, the eligible autonomous robots identified as a result of running (one or more) local variable analysis models 312, and the environmental conditions identified as a result of running (one or more) global variable analysis models can be used to train the neural networks to consider both local variables (e.g., task type, robot type) and global variables (e.g., congestion in the warehouse) when assigning tasks or workloads to autonomous robots. One or more workload assignment models 318 are generated as a result of the neural network training. The (one or more) workload assignment models 318 are stored in the database 314.

[0061] Figure 3 shows an exemplary form of implementing the machine learning model training circuit 300, but one or more of the elements, processes, and / or devices shown in Figure 3 may be combined, divided, rearranged, omitted, removed, and / or implemented in any other way. Furthermore, the exemplary training control circuit 302, the exemplary neural network training circuit 304, the exemplary neural network processor circuit 306, and / or more generally, the exemplary machine learning model training circuit 300 may be implemented by hardware alone or by hardware combined with software and / or firmware. Therefore, for example, any of the exemplary training control circuit 302, exemplary neural network training circuit 304, exemplary neural network processor circuit 306, and / or more generally exemplary machine learning model training circuit 300 may be implemented by a processor circuit, (one or more) analog circuits, (one or more) digital circuits, (one or more) logic circuits, (one or more) programmable processors, (one or more) programmable microcontrollers, (one or more) graphics processing units (GPUs), (one or more) digital signal processors (DSPs), (one or more) application-specific integrated circuits (ASICs), (one or more) programmable logic devices (PLDs), and / or field-programmable gate arrays (FPGAs) or other field-programmable logic devices (FPLDs). Furthermore, the exemplary machine learning model training circuit 300 may include one or more elements, processes, and / or devices in addition to, or instead of, those shown in Figure 3, and / or two or more of any or all of the elements, processes, and devices shown.

[0062] Figure 4 is a block diagram of the exemplary workload control circuit 122 of Figures 1 and 2 for running (one or more) machine learning models to selectively assign tasks to autonomous robots (e.g., autonomous vehicles 116, 118, 120) taking into account task characteristics, robot characteristics, and conditions in the environment (e.g., warehouse 102), such as congestion and the availability of other robots and / or equipment to perform (one or more) tasks. Based on the execution of (one or more) machine learning models, the workload control circuit 122 assigns specific tasks to be performed by robots, prioritizing factors such as efficiency in performing the tasks, over other pending or incomplete tasks. The workload control circuit 122 of Figure 4 may be instantiated (e.g., create an instance of it, make it exist for a short time, materialize, implement, etc.) by processor circuitry, such as a central processing unit that executes instructions. Additionally or alternatively, the workload control circuit 122 of Figure 4 may be instantiated (e.g., create an instance of it, make it exist for a short time, materialize, implement, etc.) by an ASIC or FPGA structured to perform the actions corresponding to the instructions. Therefore, it should be understood that some or all of the circuit in Figure 4 may be instantiated at the same time or at different times. Some or all of the circuit may be instantiated, for example, in one or more threads running concurrently and / or sequentially on hardware. Furthermore, in some examples, some or all of the circuit in Figure 4 may be implemented by a microprocessor circuit that executes instructions for implementing one or more virtual machines and / or containers.

[0063] The exemplary workload control circuit 122 in Figure 4 includes a robot interface circuit 400, a local variable analysis circuit 402, a global variable analysis circuit 404, a scheduling circuit 406, a monitoring circuit 408, and a feedback circuit 410. In some examples, the robot interface circuit 400 is instantiated by a processor circuit that executes robot interface instructions and / or is configured to perform the operations shown in the flowchart of Figure 6. In some examples, the local variable analysis circuit 402 is instantiated by a processor circuit that executes local variable analysis instructions and / or is configured to perform the operations shown in the flowchart of Figure 6. In some examples, the global variable analysis circuit 404 is instantiated by a processor circuit that executes global variable analysis instructions and / or is configured to perform the operations shown in the flowchart of Figure 6. In some examples, the scheduling circuit 406 is instantiated by a processor circuit that executes scheduling instructions and / or is configured to perform the operations shown in the flowchart of Figure 6. In some examples, the monitoring circuit 408 is instantiated by a processor circuit that executes a monitoring instruction and / or is configured to perform the operation shown in the flowchart of Figure 6. In some examples, the feedback circuit 410 is instantiated by a processor circuit that executes a feedback instruction and / or is configured to perform the operation shown in the flowchart of Figure 6.

[0064] The robot interface circuit 400 of the exemplary workload control circuit 122 facilitates communication with the vehicle control circuits 210 of (one or more) autonomous vehicles 116, 118, 120, 200 in Figures 1 and 2 (for example, via (one or more) wired or wireless communication protocols). For example, the robot interface circuit 400 can receive data from the vehicle control circuits 210 of each autonomous vehicle 116, 118, 120, 200 indicating the current location of (one or more) autonomous vehicles 116, 118, 120, 200 in warehouse 102, whether autonomous vehicles 116, 118, 120, 200 are currently performing a task, whether autonomous vehicles 116, 118, 120, 200 are currently available to perform a new task, when autonomous vehicles 116, 118, 120, 200 are expected to be available to perform a new task, and so on. In some examples, the robot interface circuit 400 receives robot status data 412 (e.g., position data) directly from one or more sensors 121 of each vehicle 116, 118, 120, and 200.

[0065] Data from each of the autonomous vehicles 116, 118, 120, and 200 can be stored in the database 411 as robot status data 412. In some examples, the workload control circuit 122 includes the database 411. In some examples, the database 411 is located outside the workload control circuit 122 in a location accessible by the workload control circuit 122, as shown in Figure 4.

[0066] Furthermore, the robot interface circuit 400 in Figure 4 transmits commands to the vehicle control circuits 210 of each vehicle 116, 118, 120, and 200. For example, the robot interface circuit 400 transmits commands that cause vehicles 116, 118, 120, and 200 to move to a specific location in warehouse 102, for example, depending on the assigned task.

[0067] The local variable analysis circuit 402 accesses data from the management engine 220, for example, indicating that orders have been placed for one or more items stored in warehouse 102 in Figure 1. These orders may be placed by consumers, for example, via order sources 222 in Figure 2. Based on the data from the management engine 220, the local variable analysis circuit 402 extracts or identifies pending or incomplete tasks that need to be performed.

[0068] The local variable analysis circuit 402 identifies, for example, the nature of (one or more) tasks to be performed in connection with the fulfillment of an order. For example, the local variable analysis circuit 402 identifies the nature of the goods in the order, such as weight, size, and location in warehouse 102. The local variable analysis circuit 402 identifies the completion deadline associated with the order, the lifespan of (one or more) tasks, the priority of (one or more) tasks, etc. The local variable analysis circuit 402 generates pending task data 414 that identifies pending tasks and their corresponding task natures. The pending task data 414 can be stored in database 411. The local variable analysis circuit 402 can update the pending task data 414, for example, in response to a new instruction received from management engine 220.

[0069] The local variable analysis circuit 402 runs (one or more) local variable analysis models 312 to identify one or more autonomous vehicles 116, 118, 120, 200 that are available or expected to be available within a threshold time period to perform one or more of the pending tasks. For example, the local variable analysis circuit 402 runs (one or more) local variable analysis models 312 to identify eligible autonomous vehicles 116, 118, 120, 200 to perform (one or more) pending tasks based on (a) robot status data 412 that can identify the properties of the robots, such as the current and future availability, robot type, and capacity of (one or more) robots, and (b) pending task data 414 that includes the properties of the tasks to be performed. The eligible autonomous vehicles 116, 118, 120, 200 and (one or more) corresponding tasks may be stored in the database 411 as initial task assignment data 416. The local variable analysis circuit 402 can access (one or more) local variable analysis models 312 from the database 314. Databases 314 and 411 may be the same storage device or different storage devices.

[0070] The global variable analysis circuit 404 accesses the outputs of (one or more) sensors 121 carried by (one or more) autonomous vehicles 116, 118, 120, 200, (one or more) sensors 123 carried by other equipment in warehouse 102 (e.g., manual equipment), (one or more) sensors 125 carried by (one or more) user devices 130, and / or (one or more) environmental sensors 127. For example, the global variable analysis circuit 404 accesses data indicating the locations of (one or more) autonomous vehicles 116, 118, 120, 200, (one or more) users 130, and / or equipment 126, 128 in warehouse. The global variable analysis circuit 404 can access data indicating tasks previously assigned to (one or more) autonomous vehicles 116, 118, 120, 200, (one or more) users 130, and / or equipment 126, 128 that have not yet been completed (e.g., tasks in progress). Data associated with the outputs of (one or more) autonomous vehicles 116, 118, 120, 200, (one or more) user devices 132, equipment 126, 128, and / or (one or more) sensors 121, 123, 125, 127 may be stored in the database 411 as environmental status data 418.

[0071] The global variable analysis circuit 404 runs (one or more) global variable analysis models 316 to identify (e.g., determine, predict) current and / or expected conditions in warehouse 102 with respect to, for example, the locations of autonomous vehicles 116, 118, 120, and 200 in warehouse 102, and the locations of other types of equipment 126, 128, and / or (one or more) individuals 130 in warehouse 102. In some examples, the global variable analysis circuit 404 considers the nature of tasks currently being performed or expected to be performed within a threshold time period to identify current or expected conditions in warehouse 102, such as congestion. For example, the global variable analysis circuit 404 may consider, in order to estimate the likelihood of congestion, the location of one or more items associated with one or more tasks being performed or expected to be performed in warehouse 102 at a given time, the expected performance time, and the mode of performance (e.g., by one or more vehicles 118, 116, 120, 200, by individuals 130, using equipment 126, 128).

[0072] As a result of running (one or more) global variable analysis models 316, the global variable analysis circuit 404 determines or predicts the likelihood of the presence of conditions in the warehouse that may affect (e.g., adversely affect) the performance efficiency of (one or more) vehicles 116, 118, 120, 200 when performing pending tasks. For example, the global variable analysis circuit 404 can predict instances of congestion in (one or more) specific areas of warehouse 102 at a particular time, taking environmental status data 418 into consideration. The results of running (one or more) global variable analysis models 316 may be stored as global condition data 420. The global variable analysis circuit 404 may update the global condition data 420 (e.g., (one or more) predictions) in response to updated information received from (one or more) autonomous vehicles 116, 118, 120, 200, (one or more) user devices 132, equipment 126, 128, and / or (one or more) sensors 121, 123, 125, 127.

[0073] The exemplary scheduling circuit 406 in Figure 4 uses initial task assignment data 416 and global condition data 420 to assign pending tasks to specific autonomous vehicles 116, 118, 120, and 200 that are available or expected to be available to perform the tasks. The scheduling circuit 406 takes into account the current or expected conditions in warehouse 102 and runs (one or more) workload assignment models 318 to select pending tasks to be performed by specific autonomous vehicles 116, 118, 120, and 200 in order to minimize interruptions (e.g., navigation interruptions) to the vehicles 116, 118, 120, and 200 during task performance. In particular, as a result of the execution of (one or more) workload assignment models 318, the scheduling circuit 406 assigns tasks to autonomous vehicles 116, 118, 120, and 200 so that the tasks are to be completed by the autonomous vehicles 116, 118, 120, and 200 in such a way that the tasks optimize (e.g., increase, maximize, or minimize the negative impact on) the execution efficiency metrics associated with task completion. The execution efficiency metrics may include, for example, the duration for task completion, the amount of congestion in warehouse 102 experienced by the autonomous vehicles 116, 118, 120, and 200 when performing the task, the number of interruptions (e.g., unplanned stoppages) during the progress of the autonomous vehicles 116, 118, 120, and 200 while completing the task, the success rate in meeting delivery deadlines for orders associated with the task, and / or other conditions that may affect the efficiency of the autonomous vehicles 116, 118, 120, and 200 when performing the task. Task assignments resulting from the execution of (one or more) workload assignment models 318 may be stored in the database 411 as adjusted task assignment data 422.

[0074] For example, initial task assignment data 416 may indicate that the first autonomous vehicle 116 in Figure 1 is a candidate to perform a first incomplete task and a second incomplete task, and the first incomplete task is assigned a higher priority than the second incomplete task (as indicated, for example, by pending task data 414). The scheduling circuit 406 runs (one or more) workload assignment models 318 to choose between assigning the first incomplete task to the first autonomous vehicle 116 and assigning the second incomplete task. If, as a result of running (one or more) workload assignment models 318, the scheduling circuit 406 determines that the first autonomous vehicle 116 can complete the second pending task with fewer navigation interruptions than the first pending task, then the scheduling circuit 406 may assign the second incomplete pending task to the first autonomous vehicle 116. For example, congestion in the warehouse associated with the location of a first incomplete task (as indicated by global condition data 420) may be detrimental to assigning the first incomplete task to the first autonomous vehicle 116 because the first autonomous vehicle 116 may encounter interruptions (e.g., reduced speed, unplanned stops, increased time to complete the task) while proceeding to or being at the location of the first task. In other words, as a result of executing (one or more) workload assignment models 318, the scheduling circuit 406 selects the second pending task for the first autonomous vehicle 116 because the first autonomous vehicle 116 will achieve better (one or more) implementation conditions (e.g., task completion efficiency) for the second pending task than if the first autonomous vehicle 116 were assigned the first pending task.

[0075] Alternatively, the scheduling circuit 406 may execute one or more workload assignment models 318 to assign the second autonomous vehicle 118 to perform the first pending task at a later date. For example, initial task assignment data 416 may indicate that the second autonomous vehicle 118 is also a candidate to perform the first pending task. Global condition data 420 may also indicate that congestion at the location of the first task in warehouse 102 is expected to ease over time. As the congestion will ease when the second autonomous vehicle 118 performs the first pending task, the second autonomous vehicle will achieve one or more better performance conditions for the first task than if the first autonomous vehicle 116 had been assigned the first task and encountered congestion.

[0076] In some examples, the scheduling circuit 406 can assign a third pending task to a third autonomous vehicle 120, and the third pending task is associated with the same location in warehouse 102 as the second task assigned to the first autonomous vehicle 116. For example, the scheduling circuit 406 can assign a third task to a third autonomous vehicle 120 if the execution of the third task no longer interferes with the execution of the second task by the first autonomous vehicle 116 at that location. For example, the scheduling circuit 406 can cause the third autonomous vehicle 116 to proceed to the first location such that the arrival times of the first autonomous vehicle 116 and the third autonomous vehicle 120 at the first location are staggered (for example, to prevent congestion).

[0077] In some examples, the scheduling circuit 406 considers differences in robot types when assigning a first incomplete task or a second incomplete task to a first autonomous vehicle 116 or a second autonomous vehicle 118. In some examples, the suitability of the robot type for a particular task may outweigh other factors, such as congestion when assigning tasks. For example, continuing to refer to the above example involving the first and second incomplete tasks, the first incomplete task may involve retrieving an item stored on a shelf. The first autonomous vehicle 116 includes a robotic arm, while the second autonomous vehicle 118 does not. In this example, the scheduling circuit 406 may assign the first pending task to the first autonomous vehicle 116 if it determines that the first autonomous vehicle 116 can complete the first task more efficiently than the second autonomous vehicle due to its vehicle type (e.g., robotic arm). Therefore, even if the execution of the first task may be affected by congestion at the location of the first task, the scheduling circuit 406 determines that the efficiency of the first autonomous vehicle 116's execution of the first task outweighs any interruptions caused by congestion.

[0078] In some examples, to minimize interruptions to autonomous vehicles 116, 118, 120, and 200 when performing pending tasks, the scheduling circuit 406 can assign tasks and generate schedules for tasks to be performed by / or other equipment 126, 128 (e.g., manual equipment) and / or individuals 130. For example, a manual forklift may be assigned a first task to retrieve an object for an order, but while performing the first task, it may block or substantially block an aisle in the warehouse 102. A second autonomous vehicle 118 in Figure 2 may also be assigned a second task, which involves retrieving an item from the same aisle. In this example, the scheduling circuit 406 can schedule the forklift to perform the first task after the second autonomous vehicle 118 has moved through the aisle in connection with performing the second task.

[0079] The robot interface circuit 400 sends commands to the vehicle control circuits 210 of each (one or more) autonomous vehicles 116, 118, 120, and 200 that have been assigned tasks based on the coordinated task assignment data 422. The commands cause the (one or more) autonomous vehicles 116, 118, 120, and 200 to move and perform the tasks.

[0080] In some cases, the adjusted task assignment data 422 may be modified (e.g., overridden) by one or more user inputs. For example, based on user input, the adjusted task assignment data 422 may be modified so that autonomous vehicles 116, 118, 120, and 200 are assigned tasks based on task lifetime or priority, even if the efficiency of vehicles 116, 118, 120, and 200 may be affected.

[0081] While the examples disclosed herein describe assigning tasks to autonomous robots, the scheduling circuit 406 may assign tasks to other equipment 126, 128 (e.g., manual equipment) and / or individuals 130 (one or more) instead of or in addition to the vehicles 116, 118, 120, 200, based on the nature of the task, the availability of (one or more) autonomous vehicles 116, 118, 120, 200, etc. For example, the scheduling circuit 406 may consider variables such as the picking speed of individual workers when performing tasks, the walking rate of workers, the current location of workers in the warehouse, and the past efficiency performance metrics of workers, in order to identify potential users for performing pending tasks that have specific characteristics (e.g., product weight, deadline) in relation to global conditions in the warehouse 102 (e.g., congestion due to the presence of robots and other equipment that may hinder workers' ability to complete tasks). Similarly, the scheduling circuit 406 may take into account the properties of other types of equipment 126, 128, such as speed, payload size, accessible height, and navigable aisle width, in order to assign pending tasks to other equipment 126, 128, taking into account variables such as congestion in warehouse 102 and the efficiency of task completion using other equipment compared to autonomous vehicles 116, 118, 120, 200. Tasks assigned to other equipment 126, 128 and / or (one or more) individuals 130 may be transmitted via a user workload application 214 accessible via user devices 132, 202.

[0082] The monitoring circuit 408 of the exemplary workload control circuit 122 monitors activity related to the execution and / or completion of one or more tasks assigned to one or more autonomous vehicles 116, 118, 120, 200 by the scheduling circuit 406. For example, based on the outputs of the vehicle control circuit 210, other equipment 126, 128, one or more user devices 132, and / or one or more sensors 121, 123, 125, 127, the monitoring circuit 408 can track the execution of one or more tasks by one or more vehicles 116, 118, 120, 200, identify changes or unexpected conditions in warehouse 102 that may affect task execution, etc. The monitoring circuit 408 can communicate with the local variable analysis circuit 402, the global variable analysis circuit 404, and / or the scheduling circuit 406, taking monitoring into consideration. The local variable analysis circuit 402, the global variable analysis circuit 404, and / or the scheduling circuit 406 can modify task evaluation, warehouse condition evaluation, and / or task assignment based on monitoring. For example, if the monitoring circuit 408 determines that the duration of task completion by vehicles 116, 118, 120, and 200 exceeds a threshold due to unexpected congestion in warehouse 102, the scheduling circuit 406 will determine whether the tasks should be reassigned.

[0083] The feedback circuit 410 in Figure 4 communicates with the machine learning model training circuit 300 in Figure 3 to refine the machine learning models 312, 316, and 318 based on the performance of one or more autonomous vehicles 116, 118, 120, and 200 on tasks assigned by the scheduling circuit 406. For example, the feedback circuit 410 provides data (e.g., timing data, location data, task characteristics) associated with instances where one or more autonomous vehicles 116, 118, 120, and 200 experienced navigation interruptions due to congestion in warehouse 102. The feedback circuit 410 also provides data associated with instances where one or more autonomous vehicles 116, 118, 120, and 200 did not experience navigation interruptions when performing tasks, as an example of successful scheduling. The data from the feedback circuit 410 can be used by the machine learning model training circuit 300 in Figure 3 to tune or refine the models 312, 316, and 318.

[0084] In some examples, the workload control circuit 122 includes means for interfacing. For example, the means for interfacing may be implemented by a robot interface circuit 400. In some examples, the robot interface circuit 400 may be instantiated by a processor circuit, such as the exemplary processor circuit 812 in Figure 8. For example, the robot interface circuit 400 may be instantiated by an exemplary microprocessor 900 in Figure 9 that executes machine-executable instructions, such as those implemented by at least blocks 612, 618 in Figure 6. In some examples, the robot interface circuit 400 may be instantiated by a hardware logic circuit, which may be implemented by an ASIC, XPU, or FPGA circuit 1000 in Figure 10 that is structured to perform operations corresponding to machine-readable instructions. As an addition or alternative, the robot interface circuit 400 may be instantiated by any other combination of hardware, software, and / or firmware. For example, the robot interface circuit 400 may be implemented by at least one or more hardware circuits (e.g., processor circuits, discrete and / or integrated analog and / or digital circuits, FPGAs, ASICs, XPUs, comparators, operational amplifiers (op-amps), logic circuits, etc.) structured to perform some or all of machine-readable instructions and / or operations corresponding to machine-readable instructions without executing software or firmware, but other structures are equally suitable.

[0085] In some examples, the workload control circuit 122 includes means for local variable analysis. For example, means for local variable analysis may be implemented by a local variable analysis circuit 402. In some examples, the local variable analysis circuit 402 may be instantiated by a processor circuit, such as the exemplary processor circuit 812 in Figure 8. For example, the local variable analysis circuit 402 may be instantiated by an exemplary microprocessor 900 in Figure 9 that executes machine-executable instructions, such as those implemented by at least blocks 602, 604, 606, and 618 in Figure 6. In some examples, the local variable analysis circuit 402 may be instantiated by a hardware logic circuit, which may be implemented by an ASIC, XPU, or FPGA circuit 1000 in Figure 10 that is structured to perform operations corresponding to machine-readable instructions. As an addition or alternative, the local variable analysis circuit 402 may be instantiated by any other combination of hardware, software, and / or firmware. For example, the local variable analysis circuit 402 may be implemented by at least one or more hardware circuits (e.g., processor circuits, discrete and / or integrated analog and / or digital circuits, FPGAs, ASICs, XPUs, comparators, operational amplifiers (op-amps), logic circuits, etc.) structured to perform some or all of the machine-readable instructions and / or the operations corresponding to the machine-readable instructions without executing any software or firmware, but other structures are equally suitable.

[0086] In some examples, the workload control circuit 122 includes means for global variable analysis. For example, means for local variable analysis may be implemented by a global variable analysis circuit 404. In some examples, the global variable analysis circuit 404 may be instantiated by a processor circuit, such as the exemplary processor circuit 812 in Figure 8. For example, the global variable analysis circuit 404 may be instantiated by an exemplary microprocessor 900 in Figure 9 that executes machine-executable instructions, such as those implemented by at least blocks 608, 618 in Figure 6. In some examples, the global variable analysis circuit 404 may be instantiated by a hardware logic circuit, which may be implemented by an ASIC, XPU, or FPGA circuit 1000 in Figure 10 that is structured to perform operations corresponding to machine-readable instructions.

[0087] As an addition or alternative, the global variable analysis circuit 404 may be instantiated by any other combination of hardware, software, and / or firmware. For example, the global variable analysis circuit 404 may be implemented by at least one or more hardware circuits (e.g., processor circuits, discrete and / or integrated analog and / or digital circuits, FPGAs, ASICs, XPUs, comparators, operational amplifiers (op-amps), logic circuits, etc.) structured to perform some or all of the machine-readable instructions and / or the operations corresponding to the machine-readable instructions, without executing any software or firmware, but other structures are equally suitable.

[0088] In some examples, the workload control circuit 122 includes means for scheduling. For example, the means for scheduling may be implemented by a scheduling circuit 406. In some examples, the scheduling circuit 406 may be instantiated by a processor circuit, such as the exemplary processor circuit 812 in Figure 8. For example, the scheduling circuit 406 may be instantiated by an exemplary microprocessor 900 in Figure 9 that executes machine-executable instructions, such as those implemented by at least blocks 610, 618 in Figure 6. In some examples, the scheduling circuit 406 may be instantiated by a hardware logic circuit, which may be implemented by an ASIC, XPU, or FPGA circuit 1000 in Figure 10 that is structured to perform operations corresponding to machine-readable instructions. As an addition or alternative, the scheduling circuit 406 may be instantiated by any other combination of hardware, software, and / or firmware. For example, the scheduling circuit 406 may be implemented by at least one or more hardware circuits (e.g., processor circuits, discrete and / or integrated analog and / or digital circuits, FPGAs, ASICs, XPUs, comparators, operational amplifiers (op-amps), logic circuits, etc.) structured to perform some or all of the machine-readable instructions and / or the operations corresponding to the machine-readable instructions without executing any software or firmware, but other structures are equally suitable.

[0089] In some examples, the workload control circuit 122 includes means for monitoring. For example, means for monitoring may be implemented by a monitoring circuit 408. In some examples, the monitoring circuit 408 may be instantiated by a processor circuit, such as the exemplary processor circuit 812 in Figure 8. For example, the monitoring circuit 408 may be instantiated by an exemplary microprocessor 900 in Figure 9 that executes machine-executable instructions, such as those implemented by at least blocks 614, 616 in Figure 6. In some examples, the monitoring circuit 408 may be instantiated by a hardware logic circuit, which may be implemented by an ASIC, XPU, or FPGA circuit 1000 in Figure 10 that is structured to perform operations corresponding to machine-readable instructions. As an addition or alternative, the monitoring circuit 408 may be instantiated by any other combination of hardware, software, and / or firmware. For example, the monitoring circuit 408 may be implemented by at least one or more hardware circuits (e.g., processor circuits, discrete and / or integrated analog and / or digital circuits, FPGAs, ASICs, XPUs, comparators, operational amplifiers (op-amps), logic circuits, etc.) structured to perform some or all of the machine-readable instructions and / or the operations corresponding to the machine-readable instructions without executing any software or firmware, but other structures are equally suitable.

[0090] In some examples, the workload control circuit 122 includes means for providing feedback. For example, means for providing feedback may be implemented by a feedback circuit 410. In some examples, the feedback circuit 410 may be instantiated by a processor circuit, such as the exemplary processor circuit 812 in Figure 8. For example, the feedback circuit 410 may be instantiated by an exemplary microprocessor 900 in Figure 9 that executes machine-executable instructions, such as those implemented by at least block 620 in Figure 6. In some examples, the feedback circuit 410 may be instantiated by a hardware logic circuit, which may be implemented by an ASIC, XPU, or FPGA circuit 1000 in Figure 10 that is structured to perform operations corresponding to machine-readable instructions. As an addition or alternative, the feedback circuit 410 may be instantiated by any other combination of hardware, software, and / or firmware. For example, the feedback circuit 410 may be implemented by at least one or more hardware circuits (e.g., processor circuits, discrete and / or integrated analog and / or digital circuits, FPGAs, ASICs, XPUs, comparators, operational amplifiers (op-amps), logic circuits, etc.) structured to perform some or all of a machine-readable instruction and / or some or all of the operations corresponding to the machine-readable instruction without executing software or firmware, but other structures are equally suitable.

[0091] Figure 4 shows an exemplary form of implementing the workload control circuit 122 of Figure 1 and / or Figure 2, but one or more of the elements, processes, and / or devices shown in Figure 4 may be combined, divided, rearranged, omitted, removed, and / or implemented in any other way. Furthermore, the exemplary robot interface circuit 400, the exemplary local variable analysis circuit 402, the exemplary global variable analysis circuit 404, the exemplary scheduling circuit 406, the exemplary monitoring circuit 408, the exemplary feedback circuit 410, and / or, more generally, the exemplary workload control circuit 122 of Figure 1 and / or Figure 2 may be implemented by hardware alone or by hardware in combination with software and / or firmware. Therefore, for example, any of the exemplary robot interface circuit 400, exemplary local variable analysis circuit 402, exemplary global variable analysis circuit 404, exemplary scheduling circuit 406, exemplary monitoring circuit 408, exemplary feedback circuit 410, and / or more generally exemplary workload control circuit 122 may be implemented by a processor circuit, (one or more) analog circuits, (one or more) digital circuits, (one or more) logic circuits, (one or more) programmable processors, (one or more) programmable microcontrollers, (one or more) graphics processing units (GPUs), (one or more) digital signal processors (DSPs), (one or more) application-specific integrated circuits (ASICs), (one or more) programmable logic devices (PLDs), and / or (one or more) field-programmable logic devices (FPLDs) such as a field-programmable gate array (FPGA). Furthermore, the exemplary workload control circuit 122 in Figure 1 and / or Figure 2 may include, in addition to or instead of, those shown in Figure 4, one or more elements, processes, and / or devices, and / or two or more of any or all of the elements, processes, and devices shown.

[0092] Figure 5 shows a flowchart representing exemplary machine-readable instructions that may be executed to configure a processor circuit to implement the machine learning model training circuit 300 of Figure 3. Figure 6 shows a flowchart representing exemplary machine-readable instructions that may be executed to configure a processor circuit to implement the workload control circuit 122 of Figure 4. The machine-readable instructions may be one or more executable programs or (one or more) parts of executable programs for execution by the processor circuits, such as the processor circuits 712, 812 shown in the exemplary processor platforms 700, 800 described below with respect to Figures 7 and 8, and / or the exemplary processor circuits described below with respect to Figures 9 and / or 10. The program may be embodied as software stored on one or more non-temporary computer-readable storage media, such as a compact disc (CD), floppy disk, hard disk drive (HDD), solid-state drive (SSD), digital versatile disc (DVD), Blu-ray disc, volatile memory (e.g., any type of random-access memory (RAM)), or non-volatile memory associated with processor circuitry located in one or more hardware devices (e.g., electrically erasable programmable read-only memory (EEPROM), FLASH memory, HDD, SSD, etc.). However, the entire program and / or parts thereof may, alternatively, be executed by one or more hardware devices other than processor circuitry and / or embodied in firmware or dedicated hardware. Machine-readable instructions may be distributed across multiple hardware devices and / or executed by two or more hardware devices (e.g., server and client hardware devices).For example, a client hardware device may be implemented by an endpoint client hardware device (e.g., a hardware device associated with a user) or an intermediate client hardware device (e.g., a radio access network (RAN) gateway that facilitates communication between a server and an endpoint client hardware device). Similarly, a non-temporary computer-readable storage medium may include one or more media located within one or more hardware devices. Furthermore, while the exemplary program is described with reference to the flowcharts shown in Figures 5 and 6, many other methods of implementing the exemplary machine learning model training circuit 300 and / or workload control circuit 122 may be used as alternatives. For example, the execution order of blocks may be changed, and / or some of the described blocks may be changed, removed, or combined. Additionally or alternatively, any or all of the blocks may be implemented by one or more hardware circuits (e.g., processor circuits, discrete and / or integrated analog and / or digital circuits, FPGAs, ASICs, comparators, operational amplifiers (op-amps), logic circuits, etc.) structured to perform the corresponding operation without running software or firmware. Processor circuits may be distributed across different network locations and / or local to one or more hardware devices (e.g., a single-core processor (e.g., a single-core central processing unit (CPU)), a multi-core processor in a single machine (e.g., a multi-core CPU, XPU, etc.), multiple processors distributed across multiple servers in a server rack, multiple processors distributed across one or more server racks, or CPUs and / or FPGAs located in the same package (e.g., the same integrated circuit (IC) package or in two or more separate housings, etc.)).

[0093] The machine-readable instructions described herein may be stored in one or more of the following formats: compressed format, encrypted format, fragmented format, compiled format, executable format, packaged format, etc. The machine-readable instructions described herein may be stored as data or data structures (e.g., as parts of an instruction, code, a representation of a code, etc.) that can be used to create, manufacture, and / or produce machine-executable instructions. For example, machine-readable instructions may be stored on one or more storage devices and / or computing devices (e.g., servers) that are fragmented and located in the same or different locations on a network or set of networks (e.g., in the cloud, on edge devices, etc.). Machine-readable instructions may require one or more of the following to be installed, modified, adapted, updated, combined, supplemented, configured, decrypted, decompressed, unpacked, distributed, reassigned, compiled, etc. to make them directly readable, interpretable, and / or executable by computing devices and / or other machines. For example, machine-readable instructions may be stored in multiple parts, each individually compressed, encrypted, and / or stored on separate computing devices, and these parts, when decrypted, decompressed, and / or combined, form a set of machine-executable instructions that implement one or more operations, which together form a program such as those described herein.

[0094] In another example, machine-readable instructions may be stored in a state that can be read by processor circuitry, but additional libraries (e.g., dynamic link libraries (DLLs)), software development kits (SDKs), application programming interfaces (APIs), etc., may be required to execute machine-readable instructions on a particular computing device or other device. In yet another example, machine-readable instructions may need to be configured (e.g., settings are stored, data is entered, network addresses are recorded, etc.) before the machine-readable instructions and / or (one or more) corresponding programs can be executed in whole or in part. Thus, machine-readable media as used herein may include machine-readable instructions and / or (one or more) programs, regardless of the specific format or state of the machine-readable instructions and / or (one or more) programs when stored, or otherwise quiescent or in transition.

[0095] The machine-readable instructions described herein may be expressed in any past, present, or future instruction language, scripting language, programming language, etc. For example, machine-readable instructions may be expressed using any of the following languages: C, C++, Java®, C#, Perl, Python, JavaScript®, hypertext markup language (HTML), structured query language (SQL), Swift, etc.

[0096] As described above, the exemplary operations in Figures 5 and 6 may be implemented using executable instructions (e.g., computer and / or machine-readable instructions) stored on one or more non-temporary computer-readable and / or machine-readable media, such as optical memory devices, magnetic memory devices, HDDs, flash memory, read-only memory (ROM), CDs, DVDs, caches, any type of RAM, registers, and / or any other storage devices or storage disks where the information is stored for any duration (e.g., for long periods of time, permanently, for short instances, for temporary buffering, and / or during information caching). The terms non-temporary computer-readable media, non-temporary computer-readable storage media, non-temporary machine-readable media, and non as used herein are used herein. Figure 5 is a flowchart representing exemplary machine-readable instructions and / or exemplary actions 500 that can be executed and / or instantiated by a processor circuit to train one or more neural networks to assign tasks to one or more autonomous robots (e.g., one or more autonomous vehicles 116, 118, 120, 200 in Figures 1 and 2) in order to consider the execution efficiency of one or more robots in completing tasks. The machine-readable instructions and / or actions 500 in Figure 5 begin in block 502, where the training control circuit 302 accesses reference data. The reference data may include, for example, image data, location data, performance metric data generated in relation to the execution of tasks by automated or autonomous robots, manual equipment, or individuals. The reference data may include, for example, image data showing different conditions in an environment such as a warehouse, including various levels of congestion in the warehouse.

[0097] In block 504, the training control circuit 302 labels the reference data to identify, for example, high congestion levels in the warehouse that may adversely affect the progress of the autonomous vehicle, and low congestion or no congestion levels that are favorable for the progress of the autonomous vehicle. The training control circuit 302 also labels the reference data to identify, for example, specific robot types that are preferred to perform certain types of tasks over other types of robots. In block 506, the exemplary training control circuit 302 generates training data 308 based on the labeled content.

[0098] In block 508, the training control circuit 302 instructs the neural network training circuit 304 to train (one or more) neural networks implemented by the neural network processor circuit 306. As a result of the training, in block 510, (one or more) local variable analysis models 312, (one or more) global variable analysis models 316, and (one or more) workload assignment models 318 are generated. The exemplary instruction 500 in Figure 5 terminates (blocks 512, 514) when no further training (e.g., retraining) will be performed.

[0099] Figure 6 is a flowchart representing exemplary machine-readable instructions and / or exemplary actions 600 that can be executed and / or instantiated by a processor circuit to selectively assign tasks to autonomous robots (e.g., autonomous vehicles 116, 118, 120) taking into account task properties, robot properties, and conditions in the environment (e.g., warehouse 102) in order to optimize (e.g., improve, maximize, minimize interruptions) the efficiency of task execution. The machine-readable instructions and / or actions 600 in Figure 6 begin in block 602, where a local variable analysis circuit identifies (one or more) pending tasks to be performed and (one or more) properties associated with those tasks (e.g., pending task data 414). For example, the local variable analysis circuit 402 of the exemplary workload control circuit 122 in Figure 4 identifies (one or more) pending or incomplete tasks in relation to orders received via the management engine 220. Task properties may include, for example, (one or more) items to be retrieved for (one or more) orders, a due date, etc.

[0100] In block 604, the local variable analysis circuit 402 identifies the autonomous robots 116, 118, 120, and 200, and these autonomous robots 116, 118, 120, and 200 are expected to be available to perform a task or available within a threshold time period, for example, based on data provided by the vehicle control circuit 210 of each robot 116, 118, 120, and 200 (e.g., robot status data 412). The local variable analysis circuit 402 identifies properties associated with the robots 116, 118, 120, and 200, such as robot type.

[0101] In block 606, the local variable analysis circuit 402 runs (one or more) local variable analysis models 312 to generate initial task assignment data 416. Based on the pending task data 414 and robot status data 412, the local variable analysis circuit 402 runs (one or more) local variable analysis models 312 to identify which of the autonomous robots 116, 118, 120, and 200 are eligible to perform (one or more) pending tasks.

[0102] In block 608, the global variable analysis circuit 404 of the exemplary workload control circuit 122 runs a global variable analysis model 316 to determine or predict the likelihood of the presence of conditions in the environment (warehouse 102) that may affect (e.g., adversely affect) the performance efficiency of (one or more) robots 116, 118, 120, 200 when performing pending tasks. For example, based on environmental status data 418 (e.g., image data of the environment generated by sensors 121, 123, 125 associated with robots, other equipment, and / or user devices) and the global variable analysis model 316, the global variable analysis circuit 404 can predict instances of congestion in (one or more) specific areas of warehouse 102 at a given time.

[0103] In block 610, the scheduling circuit 406 of the exemplary workload control circuit 122 runs a workload assignment model 318 (one or more) to generate adjusted task assignment data 422. Specifically, the scheduling circuit 406 runs a workload assignment model 420 (one or more) taking into account the initial task assignment data 416 and global condition data 420 to select pending tasks to be performed by specific autonomous robots 116, 118, 120, 200, taking into account current or expected conditions in warehouse 102, in order to minimize interruptions (e.g., navigation interruptions) to the robots 116, 118, 120, 200 during task performance. In other words, as a result of running the workload assignment model 318 (one or more), the scheduling circuit 406 identifies tasks (one or more) to be completed by the autonomous robots 116, 118, 120, 200 in order to optimize (e.g., improve, increase, maximize, or minimize adverse effects on) the performance efficiency metrics associated with task completion. The scheduling circuit 406 can take into account factors such as robot type and warehouse conditions when assigning (one or more) tasks to optimize execution efficiency.

[0104] In block 612, the robot interface circuit 400 of the exemplary workload control circuit 122 in Figure 4 sends commands to (one or more) robots 116, 118, 120, 200 based on coordinated task assignment data 422, causing (one or more) robots 116, 118, 120, 200 to perform (one or more) tasks.

[0105] In block 614, the monitoring circuit 408 of the exemplary workload control circuit 122 in Figure 4 monitors the execution and / or completion of one or more tasks assigned to one or more autonomous robots 116, 118, 120, 200 by the scheduling circuit 406. For example, based on the outputs of the vehicle control circuit 210, other equipment 126, 128, one or more user devices 132, and / or one or more sensors 121, 123, 125, 127, the monitoring circuit 408 can track the execution of one or more tasks by one or more robots 116, 118, 120, 200, identify changes or unexpected conditions in warehouse 102 that may affect task execution, etc. For example, the monitoring circuit 408 can detect that unexpected congestion in warehouse 102 is increasing the duration for a particular robot 116, 118, 120, 200 to complete a task.

[0106] In block 616, the monitoring circuit 408 determines whether (one or more) task assignments should be modified in consideration of the monitoring. In block 618, the local variable analysis circuit 402, the global variable analysis circuit 404, and / or the scheduling circuit 406 may, in response to the monitoring, modify the task evaluation, warehouse condition evaluation, and / or task assignments in order to influence (e.g., adjust) the execution of (one or more) tasks by (one or more) robots 116, 118, 120, 200 (for example, via instructions output by the robot control circuit 400).

[0107] In block 620, the feedback circuit 410 of the exemplary workload control circuit 122 provides feedback to the machine learning model training circuit 300. The feedback can indicate instances where one or more autonomous robots 116, 118, 120, 200 experienced navigation interruptions due to congestion in warehouse 102 (e.g., an example of unsuccessful scheduling), instances where one or more robots 116, 118, 120, 200 were unable to efficiently complete a task due to their robot type, or instances where one or more robots 116, 118, 120, 200 did not experience navigation interruptions when performing a task (e.g., an example of successful scheduling). The exemplary instruction 600 in Figure 6 terminates (blocks 622, 624) when no further pending tasks are identified.

[0108] Figure 7 is a block diagram of an exemplary processor platform 700 structured to execute and / or instantiate the machine-readable instructions and / or actions of Figure 5 in order to implement the machine learning model training circuit 300 of Figure 3. The processor platform 700 could be, for example, a server, a personal computer, a workstation, a self-learning machine (e.g., a neural network), a mobile device (e.g., a cell phone, a smartphone, a tablet such as iPad®), a personal digital assistant (PDA), an internet appliance, or any other type of computing device.

[0109] The illustrated example processor platform 700 includes a processor circuit 712. The illustrated example processor circuit 712 is hardware. For example, the processor circuit 712 may be implemented by one or more integrated circuits, logic circuits, FPGAs, microprocessors, CPUs, GPUs, DSPs, and / or microcontrollers from any desired family or manufacturer. The processor circuit 712 may be implemented by one or more semiconductor-based (e.g., silicon-based) devices. In this example, the processor circuit 712 implements an exemplary training control circuit 302, an exemplary neural network training circuit 304, and an exemplary neural network processor circuit 306.

[0110] The illustrated example processor circuit 712 includes local memory 713 (e.g., cache, registers, etc.). The illustrated example processor circuit 712 communicates with main memory, which includes volatile memory 714 and non-volatile memory 716, via bus 718. The volatile memory 714 may be implemented by synchronous dynamic random access memory (SDRAM), dynamic random access memory (DRAM), RAMBUS® dynamic random access memory (RDRAM®), and / or any other type of RAM device. The non-volatile memory 716 may be implemented by flash memory and / or any other desired type of memory device. Access to the illustrated example main memory 714, 716 is controlled by a memory controller 717.

[0111] The illustrated example processor platform 700 also includes an interface circuit 720. The interface circuit 720 may be implemented in hardware according to any type of interface standard, such as an Ethernet® interface, a Universal Serial Bus (USB) interface, a Bluetooth® interface, a Near Field Communication (NFC) interface, a PCI interface, and / or a PCIe interface.

[0112] In the illustrated example, one or more input devices 722 are connected to the interface circuit 720. The input devices 722 allow the user to input data and / or commands to the processor circuit 712. The input devices 722 may be implemented, for example, by audio sensors, microphones, cameras (still or video), keyboards, buttons, mice, touchscreens, trackpads, trackballs, isopoint devices, and / or speech recognition systems.

[0113] One or more output devices 724 are also connected to the interface circuit 720 in the illustrated example. The (one or more) output devices 724 may be implemented by, for example, display devices (e.g., light-emitting diodes (LEDs), organic light-emitting diodes (OLEDs), liquid crystal displays (LCDs), cathode ray tube (CRT) displays, in-place switching (IPS) displays, touchscreens, etc.), haptic output devices, printers, and / or speakers. Thus, the interface circuit 720 in the illustrated example generally includes graphics driver cards, graphics driver chips, and / or graphics processor circuits such as GPUs.

[0114] The interface circuit 720 in the illustrated example also includes communication devices such as transmitters, receivers, transceivers, modems, residential gateways, wireless access points, and / or network interfaces to facilitate data exchange with external machines (e.g., any type of computing device) via the network 726. Communication may be via, for example, an Ethernet connection, a digital subscriber line (DSL) connection, a telephone line connection, a coaxial cable system, a satellite system, a line-of-site wireless system, a cellular telephone system, or an optical connection.

[0115] The illustrated example processor platform 700 also includes one or more mass storage devices 728 for storing software and / or data. Examples of such mass storage devices 728 include magnetic storage devices, optical storage devices, floppy disk drives, HDDs, CDs, Blu-ray disk drives, redundant array of independent disks (RAID) systems, solid-state storage devices such as flash memory devices and / or SSDs, and DVD drives.

[0116] The machine-readable instructions 732, which can be implemented by the machine-readable instructions in Figure 5, can be stored in the mass storage device 728, the volatile memory 714, the non-volatile memory 716, and / or on a removable non-temporary computer-readable storage medium such as a CD or DVD.

[0117] Figure 8 is a block diagram of an exemplary processor platform 800 structured to execute the exemplary machine-readable instructions and / or operations of Figure 6 in order to implement the workload control circuit 122 of Figure 4. The processor platform 800 could be, for example, a server, a personal computer, a workstation, a self-learning machine (e.g., a neural network), a mobile device (e.g., a cell phone, a smartphone, a tablet such as an iPad), a personal digital assistant (PDA), an internet appliance, or any other type of computing device.

[0118] The illustrated example processor platform 800 includes a processor circuit 812. The illustrated example processor circuit 812 is hardware. For example, the processor circuit 812 may be implemented by one or more integrated circuits, logic circuits, FPGAs, microprocessors, CPUs, GPUs, DSPs, and / or microcontrollers from any desired family or manufacturer. The processor circuit 912 may be implemented by one or more semiconductor-based (e.g., silicon-based) devices. In this example, the processor circuit 812 implements an exemplary robot interface circuit 400, an exemplary local variable analysis circuit 402, an exemplary global variable analysis circuit 404, an exemplary scheduling circuit 406, an exemplary monitoring circuit 408, and an exemplary feedback circuit 410.

[0119] The illustrated example processor circuit 812 includes local memory 813 (e.g., cache, registers, etc.). The illustrated example processor circuit 812 communicates with main memory, which includes volatile memory 814 and non-volatile memory 816, via bus 818. The volatile memory 814 may be implemented by synchronous dynamic random access memory (SDRAM), dynamic random access memory (DRAM), RAMBUS® dynamic random access memory (RDRAM®), and / or any other type of RAM device. The non-volatile memory 816 may be implemented by flash memory and / or any other desired type of memory device. Access to the illustrated example main memory 814, 816 is controlled by a memory controller 817.

[0120] The illustrated example processor platform 800 also includes an interface circuit 820. The interface circuit 820 can be implemented in hardware according to any type of interface standard, such as an Ethernet interface, a Universal Serial Bus (USB) interface, a Bluetooth interface, a Near Field Communication (NFC) interface, a Peripheral Component Interconnect (PCI) interface, and / or a Peripheral Component Interconnect Express (PCIe) interface.

[0121] In the illustrated example, one or more input devices 822 are connected to the interface circuit 820. The input devices 822 allow the user to input data and / or commands to the processor circuit 812. The input devices 822 may be implemented, for example, by audio sensors, microphones, cameras (still or video), keyboards, buttons, mice, touchscreens, trackpads, trackballs, IsoPoint devices, and / or speech recognition systems.

[0122] One or more output devices 824 are also connected to the interface circuit 820 in the illustrated example. The (one or more) output devices 824 may be implemented by, for example, display devices (e.g., light-emitting diodes (LEDs), organic light-emitting diodes (OLEDs), liquid crystal displays (LCDs), cathode ray tube (CRT) displays, in-place switching (IPS) displays, touchscreens, etc.), haptic output devices, printers, and / or speakers. Thus, the interface circuit 820 in the illustrated example generally includes graphics driver cards, graphics driver chips, and / or graphics processor circuits such as GPUs.

[0123] The illustrated example interface circuit 820 also includes communication devices such as transmitters, receivers, transceivers, modems, residential gateways, wireless access points, and / or network interfaces to facilitate data exchange with external machines (e.g., any type of computing device) via the network 826. Communication may be via, for example, an Ethernet connection, a digital subscriber line (DSL) connection, a telephone line connection, a coaxial cable system, a satellite system, a line-of-sight wireless system, a cellular telephone system, or an optical connection.

[0124] The illustrated example processor platform 800 also includes one or more mass storage devices 828 for storing software and / or data. Examples of such mass storage devices 828 include magnetic storage devices, optical storage devices, floppy disk drives, HDDs, CDs, Blu-ray disk drives, redundant array (RAID) systems of independent disks, solid-state storage devices such as flash memory devices and / or SSDs, and DVD drives.

[0125] The machine-readable instructions 832, which can be implemented by the machine-readable instructions in Figure 6, can be stored in the mass storage device 828, in the volatile memory 814, in the non-volatile memory 816, and / or on a removable non-temporary computer-readable storage medium such as a CD or DVD.

[0126] Figure 9 is a block diagram of an exemplary implementation of the processor circuit 712 of Figure 7 and / or the processor circuit 812 of Figure 8. In this example, the processor circuit 712 of Figure 7 and / or the processor circuit 812 of Figure 8 are implemented by a microprocessor 900. For example, the microprocessor 900 could be a general-purpose microprocessor (e.g., a general-purpose microprocessor circuit). The microprocessor 900 executes some or all of the machine-readable instructions in the flowcharts of Figure 5 and / or Figure 6 to effectively instantiate the circuits of Figure 3 and / or Figure 4 as logic circuits, and performs the operations corresponding to those machine-readable instructions. In some such examples, the circuits of Figure 3 and / or Figure 4 are instantiated by the hardware circuit of the microprocessor 900 in combination with instructions. For example, the microprocessor 900 could be implemented by a multicore hardware circuit such as a CPU, DSP, GPU, or XPU. It may contain any number of exemplary cores 902 (e.g., one core), but the microprocessor 900 in this example is a multicore semiconductor device containing N cores. The cores 902 of the microprocessor 900 can operate independently or cooperate to execute machine-readable instructions. For example, a firmware program, an embedded software program, or machine code corresponding to a software program may be executed by one of the cores 902, or by multiple cores 902 at the same time or at different times. In some examples, the firmware program, an embedded software program, or machine code corresponding to a software program may be isolated into threads and executed in parallel by two or more of the cores 902. The software program may correspond to some or all of the machine-readable instructions and / or operations represented by the flowcharts in Figure 5 and / or Figure 6.

[0127] The core 902 may communicate by a first exemplary bus 904. In some examples, the first bus 904 may be implemented by a communication bus to enable communication associated with one or more of the cores 902. For example, the first bus 904 may be implemented by at least one of the following: an inter-integrated circuit (I2C) bus, a serial peripheral interface (SPI) bus, a PCI bus, or a PCIe bus. Additionally or alternatively, the first bus 904 may be implemented by any other type of computing bus or electrical bus. The core 902 may receive data, instructions, and / or signals from one or more external devices by an exemplary interface circuit 906. The core 902 may output data, instructions, and / or signals to one or more external devices by the interface circuit 906. The core 902 in this example includes exemplary local memory 920 (e.g., a level 1 (L1) cache that can be separated into an L1 data cache and an L1 instruction cache), while the microprocessor 900 also includes exemplary shared memory 910 (e.g., a level 2 (L2 cache)) that can be shared by the core for high-speed access to data and / or instructions. Data and / or instructions can be transferred (e.g., shared) by writing to and / or reading from the shared memory 910. Each of the local memory 920 and shared memory 910 of the core 902 may be part of a hierarchy of storage devices that includes multiple levels of cache memory and main memory (e.g., main memories 714, 716 in Figure 7, and main memories 814, 816 in Figure 8). Generally, higher levels of memory in the hierarchy have lower access times and smaller storage capacities than lower levels of memory. Changes in the various levels of the cache hierarchy are managed (e.g., coordinated) by a cache coherency policy.

[0128] Each core 902 may be referred to as a CPU, DSP, GPU, or any other type of hardware circuit. Each core 902 includes a control unit circuit 914, an arithmetic and logic (AL) circuit 916 (sometimes called an ALU), several registers 918, local memory 920, and a second exemplary bus 922. Other structures may exist. For example, each core 902 may include a vector unit circuit, a single-instruction multiple data (SIMD) unit circuit, a load / store unit (LSU) circuit, a branch / jump unit circuit, a floating-point unit (FPU) circuit, etc. The control unit circuit 914 includes semiconductor-based circuitry structured to control (e.g., coordinate) data movement within the corresponding core 902. The AL circuit 916 includes semiconductor-based circuitry structured to perform one or more mathematical and / or logical operations on data within the corresponding core 902. In some examples, the AL circuit 916 performs integer-based arithmetic. In other examples, the AL circuit 916 also performs floating-point arithmetic. In yet another example, the AL circuit 916 may include a first AL circuit that performs integer-based arithmetic and a second AL circuit that performs floating-point arithmetic. In some examples, the AL circuit 916 is sometimes referred to as an arithmetic logic unit (ALU). Registers 918 are semiconductor-based structures for storing data and / or instructions, such as the results of one or more operations performed by the AL circuit 916 of the corresponding core 902. For example, registers 918 may include (one or more) vector registers, (one or more) SIMD registers, (one or more) general-purpose registers, (one or more) flag registers, (one or more) segment registers, (one or more) machine-specific registers, (one or more) instruction pointer registers, (one or more) control registers, (one or more) debug registers, (one or more) memory management registers, (one or more) machine check registers, and so on. Registers 918 may be arranged in banks, as shown in Figure 9.Alternatively, register 918 may be organized in any other array, format, or structure, including being distributed across core 902 to reduce access time. The second bus 922 may be implemented by at least one of the following: I2C bus, SPI bus, PCI bus, or PCIe bus.

[0129] Each core 902 and / or more generally, the microprocessor 900 may include additional and / or alternative structures to those illustrated and described above. For example, one or more clock circuits, one or more power supplies, one or more power gates, one or more cache home agents (CHAs), one or more converged / common mesh stops (CMS), one or more shifters (e.g., one or more barrel shifters), and / or other circuits may be present. The microprocessor 900 is a semiconductor device fabricated to include a number of transistors interconnected to implement the structures described above in one or more integrated circuits (ICs) contained in one or more packages. The processor circuit may include and / or cooperate with one or more accelerators. In some examples, accelerators are implemented by logic circuits to perform specific tasks faster and / or more efficiently than could be done by a general-purpose processor. Examples of accelerators include ASICs and FPGAs as described herein. GPUs or other programmable devices may also be accelerators. The accelerator is integrated into the processor circuitry, resides in the same chip package as the processor circuitry, and / or may reside in one or more separate packages from the processor circuitry.

[0130] Figure 10 is a block diagram of another exemplary implementation of the processor circuit 712 in Figure 7 and / or the processor circuit 812 in Figure 8. In this example, the processor circuits 712 and / or the processor circuit 812 are implemented by the FPGA circuit 1000. For example, the FPGA circuit 1000 may be implemented by an FPGA. The FPGA circuit 1000 may be used to perform operations that may, for example, be performed by the exemplary microprocessor 900 in Figure 9, which in some cases executes the corresponding machine-readable instructions. However, once configured, the FPGA circuit 1000 can perform operations faster than can be performed by a general-purpose microprocessor that instantiates machine-readable instructions in hardware and therefore often executes the corresponding software.

[0131] More specifically, in contrast to the microprocessor 900 in Figure 9 described above (a general-purpose device that can be programmed to execute some or all of the machine-readable instructions represented by the flowcharts in Figure 5 and / or Figure 6, but whose interconnects and logic circuits are fixed once fabricated), the FPGA circuit 1000 in the example of Figure 10 includes interconnects and logic circuits that can be configured and / or interconnected in different ways after fabrication to instantiate some or all of the machine-readable instructions represented by the flowcharts in Figure 5 and / or Figure 6, for example. In particular, the FPGA circuit 1000 can be thought of as an array of logic gates, interconnects, and switches. The switches can be programmed to change how the logic gates are interconnected by the interconnects, effectively forming one or more dedicated logic circuits (unless the FPGA circuit 1000 is reprogrammed, and until it is reprogrammed). The configured logic circuits allow the logic gates to cooperate in different ways to perform different actions on data received by the input circuits. These operations may correspond to some or all of the software represented by the flowcharts in Figure 5 and / or Figure 6. Therefore, the FPGA circuit 1000 can be structured to effectively instantiate some or all of the machine-readable instructions in the flowcharts of Figure 5 and / or Figure 6 as dedicated logic circuits to perform the operations corresponding to those software instructions in a dedicated format similar to that of an ASIC. Thus, the FPGA circuit 1000 may perform the operations corresponding to some or all of the machine-readable instructions in Figure 5 and / or Figure 6 faster than a general-purpose microprocessor can perform the same operations.

[0132] In the example in Figure 10, the FPGA circuit 1000 is structured to be programmed by an end user using a hardware description language (HDL) such as Verilog (and / or reprogrammed once or more times). The FPGA circuit 1000 in Figure 10 includes exemplary input / output (I / O) circuits 1002 for acquiring and / or outputting data to and from exemplary configuration circuits 1004 and / or external hardware 1006. For example, the configuration circuit 1004 may be implemented by an interface circuit that can acquire machine-readable instructions for configuring the FPGA circuit 1000 or (one or more) parts thereof. In some such examples, the configuration circuit 1004 may acquire machine-readable instructions from a user, a machine (e.g., hardware circuit that can implement an artificial intelligence / machine learning (AI / ML) model to generate instructions (e.g., programmed circuit or dedicated circuit)), etc. In some examples, the external hardware 1006 may be implemented by an external hardware circuit. For example, the external hardware 1006 may be implemented by the microprocessor 900 in Figure 9.

[0133] The FPGA circuit 1000 also includes an exemplary logic gate circuit 1008, a plurality of exemplary configurable interconnects 1010, and an array of exemplary memory circuits 1012. The logic gate circuit 1008 and the configurable interconnects 1010 are configurable to instantiate one or more operations that may correspond to at least some of the machine-readable instructions in Figure 5 and / or Figure 6, and / or other desired operations. The logic gate circuit 1008 shown in Figure 10 is fabricated in groups or blocks. Each block includes a semiconductor-based electrical structure that can be configured into a logic circuit. In some examples, the electrical structure includes logic gates (e.g., AND gates, OR gates, Nor gates, etc.) that provide basic building blocks for the logic circuit. Electrically controllable switches (e.g., transistors) are present within each of the logic gate circuit 1008 to enable the configuration of electrical structures and / or logic gates to form circuits for performing desired operations. The logic gate circuit 1008 may include other electrical structures such as lookup tables (LUTs), registers (e.g., flip-flops or latches), and multiplexers.

[0134] The configurable interconnect 1010 in the illustrated example may include conductive paths, traces, vias, etc., which may contain electrically controllable switches (e.g., transistors), the states of which can be changed by programming (e.g., using an HDL instruction language) to activate or deactivate one or more connections between one or more of the logic gate circuits 1008 in order to program a desired logic circuit.

[0135] The memory circuit 1012 in the illustrated example is structured to store one or more (one or more) results of operations performed by the corresponding logic gates. The memory circuit 1012 may be implemented by registers or the like. In the illustrated example, the memory circuit 1012 is distributed among the logic gate circuits 1008 to facilitate access and increase execution speed.

[0136] The exemplary FPGA circuit 1000 in Figure 10 also includes exemplary dedicated operation circuits 1014. In this example, the dedicated operation circuits 1014 include special-purpose circuits 1016 that can be called upon to implement commonly used functions, avoiding the need to program those functions in the field. Examples of such special-purpose circuits 1016 include memory (e.g., DRAM) controller circuits, PCIe controller circuits, clock circuits, transceiver circuits, memory, and multiplier-accumulator circuitry. Other types of special-purpose circuits may exist. In some examples, the FPGA circuit 1000 may also include exemplary general-purpose programmable circuits 1018, such as an exemplary CPU 1020 and / or an exemplary DSP 1022. Other general-purpose programmable circuits 1018, such as a GPU, XPU, etc., which can be programmed to perform other operations, may exist as additions or alternatives.

[0137] Figures 9 and 10 show two exemplary implementations of the processor circuit 712 of Figure 7 and / or the processor circuit 812 of Figure 8, but many other methods are conceivable. For example, as mentioned above, modern FPGA circuits may include an onboard CPU, such as one or more of the exemplary CPUs 1020 of Figure 10. Thus, the processor circuit 712 of Figure 7 and / or the processor circuit 812 of Figure 8 may further be implemented by combining the exemplary microprocessor 900 of Figure 9 and the exemplary FPGA circuit 1000 of Figure 10. In some such hybrid examples, a first portion of the machine-readable instructions represented by the flowcharts of Figure 5 and / or Figure 6 may be executed by one or more of the cores 902 of Figure 9, a second portion of the machine-readable instructions represented by the flowcharts of Figure 5 and / or Figure 6 may be executed by the FPGA circuit 1000 of Figure 10, and / or a third portion of the machine-readable instructions represented by the flowcharts of Figure 5 and / or Figure 6 may be executed by an ASIC. Therefore, it should be understood that some or all of the circuits in Figure 3 and / or Figure 4 may be instantiated at the same time or at different times. Some or all of the circuits may be instantiated, for example, in one or more threads running concurrently and / or sequentially. Furthermore, in some examples, some or all of the circuits in Figure 3 and / or Figure 4 may be implemented in one or more virtual machines and / or containers running on a microprocessor.

[0138] In some examples, the processor circuit 712 in Figure 7 and / or the processor circuit 812 in Figure 8 may be in one or more packages. For example, the microprocessor 900 in Figure 9 and / or the FPGA circuit 1000 in Figure 10 may be in one or more packages. In some examples, an XPU may be implemented by the processor circuit 712 in Figure 7 and / or the processor circuit 812 in Figure 8, and these may be in one or more packages. For example, an XPU may include a CPU in one package, a DSP in another package, a GPU in yet another package, and an FPGA in yet yet another package.

[0139] Figure 11 shows a block diagram illustrating an exemplary software distribution platform 1105 for distributing software, such as the exemplary machine-readable instruction 832 in Figure 8, to hardware devices owned and / or operated by a third party. The exemplary software distribution platform 1105 may be implemented by any computer server, data facility, cloud service, etc., that can store the software and transmit it to other computing devices. The third party may be a customer of the entity that owns and / or operates the software distribution platform 1105. For example, the entity that owns and / or operates the software distribution platform 1105 may be the developer, seller, and / or licensor of the software, such as the exemplary machine-readable instruction 832 in Figure 8. The third party may be a consumer, user, retailer, OEM, etc., who purchases and / or licenses the software for use and / or resale and / or sublicensing. In the illustrated example, the software distribution platform 1105 includes one or more servers and one or more storage devices. The storage devices store machine-readable instructions 832, which may correspond to the exemplary machine-readable instruction 600 in Figure 6, as described above. One or more servers of the exemplary software distribution platform 1105 communicate with an exemplary network 1110, which may correspond to the Internet and / or one or more of the exemplary networks 826 described above. In some examples, one or more servers transmit software to a requesting party as part of a commercial transaction in response to a request. The distribution, sale, and / or license payments for the software may be handled by one or more servers of the software distribution platform and / or by a third-party payment entity. The servers enable purchasers and / or licensors to download machine-readable instructions 832 from the software distribution platform 1105.For example, software that may correspond to the exemplary machine-readable instruction 832 in Figure 8 may be downloaded to an exemplary processor platform 800 which will execute the machine-readable instruction 832 to implement the workload control circuit 122. In some examples, one or more servers of the software distribution platform 1105 periodically provide, transmit, and / or enforce updates to the software (e.g., the exemplary machine-readable instruction 832 in Figure 8) to ensure that improvements, patches, updates, etc., are distributed to and applied to the software on end-user devices.

[0140] From the above, it will be understood that exemplary systems, methods, apparatus, and products are disclosed that provide task assignment to autonomous robots in order to optimize the execution efficiency of robots when completing tasks. The examples disclosed herein take into account local variables, such as the nature of the task to be completed and the nature of the autonomous robot, in order to identify a robot that is qualified to complete the task. The examples disclosed herein also take into account global variables, such as conditions in the environment in which the robot is working, which may affect the execution of the task, such as congestion in one or more areas of a warehouse. The examples disclosed herein assign tasks to robots in order to minimize interruptions to the robot's progress and thus facilitate the efficient completion of the task. The examples disclosed herein balance local variables (e.g., task deadline) and global variables (e.g., congestion) in order to intelligently assign tasks while taking into account execution efficiency. Modification and transformation Many modifications and variations can be made to the embodiments described above without departing from the scope of this disclosure. The above description of embodiments of this disclosure is provided for illustrative and explanatory purposes only. It is not exhaustive and does not limit this disclosure to the exact forms disclosed. Modifications and variations can be made without departing from the spirit and scope of this disclosure.

Claims

1. A device comprising memory, machine-readable instructions, and a processor circuit, wherein the processor circuit, when in use, Identifying a first task and a second task, and determining that the first task is associated with a first location, the second task is associated with a second location, and the second location is different from the first location. The detection of a first condition associated with the first location, wherein the first condition affects the first task execution conditions associated with the autonomous vehicle performing the first task, and the first condition includes congestion at the first location. The detection of a second condition associated with the second location, and the second condition influencing the second task execution conditions associated with the autonomous vehicle performing the second task. Based on the first and second conditions, select one of the first or second tasks to be performed by the autonomous vehicle, The autonomous vehicle causes to proceed to the first location or the second location in order to perform the selected one of the first task or the second task. A device configured to execute the machine-readable instructions in order to perform the above.

2. The apparatus according to claim 1, wherein the autonomous vehicle is a first autonomous vehicle, the first autonomous vehicle is associated with a first vehicle type, and the processor circuit is configured to select one of the first task or the second task to be performed by the first autonomous vehicle based on the first vehicle type relative to a second vehicle type associated with a second autonomous vehicle.

3. The apparatus according to claim 1, wherein the second condition includes the location of the product associated with the second task at the second location.

4. The apparatus according to claim 3, wherein the autonomous vehicle is a first autonomous vehicle, the processor circuit is configured to detect the first condition based on the location of one or more other autonomous vehicles relative to the first location, and the one or more other autonomous vehicles are different from the first autonomous vehicle.

5. The apparatus according to claim 3, wherein the processor circuit is configured to detect the first condition based on the location of the device relative to the first location, and the device is different from the first autonomous vehicle or one or more other autonomous vehicles.

6. The apparatus according to claim 1, wherein the first task execution conditions include one or more of the duration for the completion of the first task or the number of unplanned stops by the autonomous vehicle during its journey to the first location.

7. The autonomous vehicle is a first autonomous vehicle, and the processor circuit is configured to select the first task to be performed by the first autonomous vehicle. Identifying a second autonomous vehicle to perform a third task, and relating the third task to the first location. Determining the expected time at which the first autonomous vehicle will arrive at the first location, Based on the expected time for the first autonomous vehicle, the time for the second autonomous vehicle to proceed to the first location is identified. This causes the second autonomous vehicle to proceed to the first location in order to perform the third task at the identified time. The apparatus according to claim 1, configured to perform the following:

8. The apparatus according to claim 1, wherein the processor circuit is configured to select one of the first task or the second task based on the respective priority levels assigned to the first task and the second task.

9. Memory, machine-readable instructions, Processor circuit and A device comprising, the processor circuit, Identifying a first pending task having a first priority level and a second pending task having a second priority level, and determining that the first priority level is higher than the second priority level, the first pending task is associated with a first location in the environment, the second pending task is associated with a second location in the environment, and the first location is different from the second location. Identifying a first condition and a second condition associated with the environment, wherein the first condition affects the first autonomous robot's execution of the first pending task, and the second condition affects the first autonomous robot's execution of the second pending task. This causes the first autonomous robot to proceed to the second location in a first time to perform the second pending task, The first autonomous robot or the second autonomous robot causes the first pending task to be performed at a second time, and the second time is after the first time. A device configured to execute the machine-readable instructions in order to perform the above.

10. The apparatus according to claim 9, wherein the processor circuit is configured to select the first autonomous robot to perform the second pending task in a first time based on the first condition, the second condition, and the properties of the first autonomous robot.

11. The apparatus according to claim 10, wherein the property of the first autonomous robot includes a vehicle type.

12. The apparatus according to claim 9, wherein the first condition includes congestion resulting from the presence of one or more other autonomous robots or one or more equipment devices in the path of the first autonomous robot, and the equipment devices are different from the first autonomous robot and the one or more other autonomous robots.

13. The apparatus according to claim 12, wherein the processor circuit is configured to identify the first condition by predicting the possibility of congestion in the environment based on the presence of one or more other autonomous robots.

14. A non-temporary machine-readable storage medium comprising instructions, wherein the instructions are provided by a processor circuit at least, To detect a first condition associated with a first location, and to determine that the first condition will affect the performance of a first task by an autonomous robot at the first location. Detecting a second condition associated with a second location, wherein the second condition affects the performance of a second task by the autonomous robot at the second location, and at least one of the first or second condition includes congestion at the corresponding first or second location. Based on the first and second conditions, select one of the first or second tasks to be performed by the autonomous robot, The autonomous robot is caused to perform the selected one of the first task or the second task. A non-temporary, machine-readable storage medium that causes the following to occur.

15. The non-temporary machine-readable storage medium according to claim 14, wherein the autonomous robot is a first autonomous robot, the first autonomous robot is associated with a first robot type, and the instruction causes the processor circuit to select one of the first task or the second task to be performed by the first autonomous robot based on the first robot type relative to a second robot type associated with the second autonomous robot.

16. The non-temporary machine-readable storage medium according to claim 15, wherein the autonomous robot is a first autonomous robot, and the instruction causes the processor circuit to detect the first condition based on the location of one or more other autonomous robots relative to the first location, and the one or more other autonomous robots are different from the first autonomous robot.

17. The instruction causes the processor circuit to detect the first condition based on the location of the device relative to the first location, and the device is manual, the non-temporary machine-readable storage medium according to claim 15.

18. The non-temporary machine-readable storage medium according to claim 14, wherein the instruction causes the processor circuit to determine that the first condition will affect one or more of the duration for the completion of the first task or the number of unplanned stops by the autonomous robot during its progress to the first location.

19. The autonomous robot is a first autonomous robot, the processor circuit is for selecting the first task to be performed by the first autonomous robot, and the instruction is given by the processor circuit, Identifying a second autonomous robot to perform a third task, and associating the third task with the first location. Determining the expected time at which the first autonomous robot will arrive at the first location, Based on the expected time for the first autonomous robot, the time for the second autonomous robot to proceed to the first location is identified. This causes the second autonomous robot to proceed to the first location to perform the third task at the identified time. A non-temporary machine-readable storage medium according to claim 14, which causes the following to occur.

20. The non-temporary machine-readable storage medium according to claim 14, wherein the instruction causes the processor circuit to select the one of the first task or the second task based on the respective priority levels assigned to the first task and the second task.