Light-emitting diode package with real-time processing capabilities and related methods

Real-time digital communication and processing in LED packages address synchronization and complexity issues in high-resolution displays by enabling efficient data processing and synchronization within each LED package, reducing the need for additional electrical devices and improving display quality.

JP2026510665APending Publication Date: 2026-04-10WOLFSPEED INC
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
WOLFSPEED INC
Filing Date
2024-01-31
Publication Date
2026-04-10

AI Technical Summary

Technical Problem

Existing LED display technologies face challenges in achieving high-resolution displays with small pixel pitches due to increased complexity and cost from the high density of electrical devices, and synchronization issues in cascaded communication systems.

Method used

The implementation of real-time digital communication and processing in LED packages, allowing each package to individually receive and process data streams, perform operations like addition, subtraction, and synchronization, and transmit processed data to the next package, with varying bit delays.

Benefits of technology

This approach enhances synchronization and reduces the complexity and cost of high-resolution LED displays by allowing real-time processing and synchronization of LED pixels, improving display quality and reducing the need for separate electrical devices.

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Abstract

Disclosed are light-emitting diode (LED) packages, more specifically, real-time digital communication for LED packages, and related methods. Individual LED packages are arranged for cascaded communication. Each LED package can individually receive communications from a data stream, control the operation of one or more LED chips, and perform real-time processing on at least one modifiable data value of the data stream. The LED package may include a real-time processor that can process data from the data value of the data stream and return the processed or modified data to the data stream with the same data value. Disclosed are LED packages that can be assembled together into an array in which each LED package can individually process data and send the processed data to the next downstream LED package. Such real-time processing may be performed with varying bit delays within each LED package.
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Description

Technical Field

[0001]

[0001] This disclosure relates to a light-emitting diode (LED) package, and more particularly, to real-time processing functions for an LED package and related methods.

Background Art

[0002]

[0002] A light-emitting diode (LED) is a solid-state device that converts electrical energy into light and typically includes one or more active layers (or active regions) of semiconductor material disposed between oppositely doped n-type and p-type layers. When a bias is applied across the doped layers, holes and electrons are injected into one or more active layers where they recombine to generate light emission such as visible light or ultraviolet light.

[0003]

[0003] LEDs are widely adopted in various lighting scenarios, such as backlights for liquid crystal display (LCD) systems (e.g., as an alternative to cold cathode fluorescent lamps) and direct-view LED displays. Applications using LED arrays include vehicle headlamps, road lighting, light fixtures, and various indoor, outdoor, and special scenarios. Desirable characteristics of LED devices include high luminous efficiency and long lifespan.

[0004]

[0004] Large multi-color direct-view LED displays (including full-color LED video screens) generally include a number of individual LED panels, packages, and / or components that provide image resolution determined by the distance between adjacent pixels, i.e., the "pixel pitch". Direct-view LED displays generally include tricolor displays with arrangements of red, green, and blue (RGB) LEDs, and dyadic displays with arrangements of red and green (RG) LEDs. Other colors or color combinations may be used. For many LED display systems, it is desirable to form a group of LED colors per pixel, such as the primary colors red, green, and blue (RGB), which define the vertices of a triangle (or polygon) on a chromaticity diagram. This polygon defines the so-called color gamut of the display device, and its region describes all possible colors that the display device can produce. Driver printed circuit boards for controlling LED displays generally have a high density of electrical devices, including capacitors, field-effect transistors (FETs), decoders, microcontrollers, etc., for driving the pixels of the display. As the pixel pitch of high-resolution displays continues to decrease, the density of such electrical devices increases in proportion to the number of pixels per given panel area. This tends to increase the complexity and cost of LED panels for display applications.

[0005]

[0005] The technology continues to pursue improved LED array devices with smaller pixel pitches while overcoming the limitations associated with conventional devices and manufacturing methods. [Overview of the Initiative] [Means for solving the problem]

[0006]

[0006] The disclosure relates to a light-emitting diode (LED) package, and more specifically to real-time digital communication and related methods for an LED package. Individual LED packages are arranged for cascade communication. Each LED package includes one or more LED chips, and each LED package can individually receive communications from a data stream, control the operation of one or more LED chips, and perform real-time processing on at least one modifiable data value of the data stream. The LED package may include a real-time processor that can process data from the data value of the data stream and return the processed or modified data to the data stream with the same data value. An LED package is disclosed that can be assembled together in an array in which each LED package can individually process data and send the processed data to the next downstream LED package. Such real-time processing may be performed with varying bit delays within each LED package.

[0007]

[0007] In one embodiment, the digital communication method comprises transmitting a digital communication from at least one light-emitting diode (LED) package to at least one other element, comprising a bit pattern including at least one mutable data value, and performing real-time processing on at least one mutable data value in at least one LED package. In certain embodiments, the at least one mutable data value comprises at least 2 bits and up to 64 bits. In certain embodiments, the at least one mutable data value is a data position value in a data stream, the data position value is correlated to the position of the data value in a data stream segment of the data stream, and the data value is applied to at least one LED package. In certain embodiments, at least one LED package is a first LED package among a plurality of LED packages connected in series to receive digital communications from a data stream, the first LED package is arranged to receive digital communications before other LED packages among the plurality of LED packages, the data values ​​precede the first data segment among the plurality of data segments of the data stream segment, each data segment of the plurality of data segments targets a separate LED package among the plurality of LED packages, and the data stream segments are arranged in reverse order such that the first data segment targeting the first LED package is received after the other data segments of the plurality of data segments targeting the other LED packages are received by the first LED package. In certain embodiments, at least one modifiable data value is a delay value correlated with a delay time when at least one LED package performs one or more events. In certain embodiments, at least one LED package is a first LED package among a plurality of LED packages connected in series to receive digital communications, the delay value is modified so that events of two or more other LED packages among the plurality of LED packages are synchronized with one or more events of the first LED package.In certain embodiments, the real-time processing comprises at least one of the following operations: addition, subtraction, multiplication, division, increment, or decrement of an incoming value of at least one mutable data value.

[0008]

[0008] In another embodiment, a method for timing the operation of at least one light-emitting diode (LED) package arranged for cascaded serial communication comprises receiving one or more synchronization values ​​in at least one LED package, providing a delayed response correlated to one or more synchronization values, and operating at least one LED package according to the delayed response. In a particular embodiment, one or more synchronization values ​​are modified by real-time processing within at least one LED package for use in subsequent LED packages. In a particular embodiment, the delayed response is synchronized with another delayed response of at least one other LED package arranged to receive cascaded serial communication. In a particular embodiment, the start of the delayed response is controlled by an initial timing value of a counter which is the result of a calculation, and the counter rate of the counter is at least partially synchronized with the data rate of the cascaded serial communication. In a particular embodiment, one or more synchronization values ​​are part of a mutable data value, the calculation is processed in real time, one or more values ​​of the mutable data value are changed, and transmitted in the same time slot of the mutable data value. In certain embodiments, the calculation is at least partially based on other values ​​or states stored within at least one LED package. In certain embodiments, the delayed response comprises at least one event, the at least one event being controlled by at least one event value, the at least one event value being an event type, the event type comprising one or more of turning on, turning off, and setting to a predetermined value one or more LED chips present within at least one LED package. In certain embodiments, the at least one event is a sequence of synchronous events comprising a first event that turns off all of one or more LED chips for a specified time, followed by a second event that turns all of one or more LED chips to a desired brightness for the associated data frame.In certain embodiments, the sequence of synchronization events further comprises a third and a fourth event occurring between a first and a second event, the third event comprising turning on one or more LED chips, and the fourth event comprising turning off one or more LED chips.

[0009]

[0009] In another embodiment, the digital communication method comprises transmitting a digital communication sequentially along a plurality of light-emitting diode (LED) packages, the digital communication comprising data values ​​defined by a controller located outside the plurality of LED packages, the data values ​​being induced to the plurality of LED packages and corresponding to a variable length of data blocks of the digital communication. In a particular embodiment, the data values ​​are modifiable data values ​​of the digital communication that are transmitted to the plurality of LED packages, the modifiable data values ​​being part of a bit pattern of the digital communication, the bit pattern further comprising at least part of a preamble for each data block, the preamble comprising at least one of data values ​​initially defined by the controller and sequentially modified by each LED package of the plurality of LED packages. In a particular embodiment, at least one of the data values ​​corresponds to a data position in a variable-length data block, the data position represents a plurality of data segments in a variable-length data block, each data segment targeting a separate LED package among the plurality of LED packages. In a particular embodiment, a first LED package among a plurality of LED packages is arranged to receive digital communications before the other LED packages among the plurality of LED packages, and the last data segment of a plurality of data segments is intended for the first LED package, with the data segments arranged in reverse order, so that the last data segment is received by the first LED package after the other data segments intended for the other LED packages have been received by the first LED package.

[0010]

[0010] In another embodiment, the LED package comprises at least one LED chip, a digital communication receiving device configured to receive a communication signal from another LED package, and a real-time processor configured to modify a mutable data value of at least two consecutive bits of the communication signal received by the digital communication receiving device. In a particular embodiment, the mutable data value is transmitted to a counter to provide a delayed response, the delayed response is correlated to at least one of the data rate of the communication signal, an internal clock of the LED package, or an external clock. In a particular embodiment, the real-time processor processes and modifies the mutable data value, and the delayed response is configured to synchronize with other LED chips in the other LED package arranged to receive the communication signal. The LED package further comprises an event processor configured to activate a set of responses as delayed responses. In a particular embodiment, the real-time processor comprises a data selector and counter configured to correlate the location of target data to be tracked within the communication signal, the target data being selected for data input to control logic within the LED package.

[0011]

[0011] In another embodiment, further advantages can be obtained by combining any of the above embodiments individually or together, and / or by combining various distinct embodiments and features described herein. Any of the various features and elements disclosed herein may be combined with one or more other disclosed features and elements unless otherwise indicated herein.

[0012]

[0012] Those skilled in the art will recognize the scope of the present disclosure and realize additional embodiments after reading the following detailed description of preferred embodiments in conjunction with the accompanying drawings.

[0013] The accompanying drawings incorporated herein and forming part thereof illustrate several aspects of this disclosure and, together with the description, are useful in illustrating the principles of this disclosure. [Brief explanation of the drawing]

[0013] [Figure 1]

[0014] This block diagram illustrates a system-level control scheme for lighting devices using cascaded communication for series-connected light-emitting diode (LED) packages. [Figure 2]

[0015] Figure 1 is a block diagram of an LED package with specific details of an active electrical element conforming to the principles of this disclosure. [Figure 3]

[0016] This is a block diagram of a portion of the control logic in Figure 2, including the real-time logic. [Figure 4]

[0017] Figure 3 shows a block diagram of a portion of the control logic in an embodiment where real-time logic performs the operation of a down-counter or decrementer. [Figure 5]

[0018] Figure 5A is a block diagram illustrating cascaded communication and data bit processing of multiple LED packages according to the principles of this disclosure.

[0014]

[0019] Figure 5B is similar to Figure 5A and further illustrates the progression of data bits as they pass through the LED package. [Figure 6]

[0020] Figure 4 is a schematic diagram illustrating an embodiment that shows a bit pattern that may be received and processed by the control logic and real-time processor. [Figure 7]

[0021] This schematic diagram is the same as Figure 6, except that when each pixel receives its data along a common time axis, the data for each pixel is delayed by 2 bits. [Figure 8]

[0022] This schematic diagram is similar to Figure 7, except that when each pixel receives its data along a common time axis, the data for each pixel is delayed by 4 bits. [Modes for carrying out the invention]

[0015]

[0023] The embodiments described below provide the information necessary to enable those skilled in the art to realize the embodiments and illustrate the best mode for realizing the embodiments. By reading the following description with reference to the accompanying drawings, those skilled in the art will understand the concepts of this disclosure and recognize applications of these concepts not specifically addressed herein. It should be understood that these concepts and applications are included within the scope of this disclosure and the accompanying claims.

[0016]

[0024] In this specification, terms such as "first," "second," etc., may be used to describe various elements, but it will be understood that these elements should not be limited by these terms. These terms are used solely to distinguish one element from another. For example, without departing from the scope of this disclosure, a first element may be called a second element, and similarly, a second element may be called a first element. As used herein, the term "and / or" includes any and all combinations of one or more of the relevant list items.

[0017]

[0025] When an element such as a layer, region, or substrate is said to be "above" another element or to extend "over" another element, it will be understood that the element is either directly above the other element or directly extends over the other element, or there may be intervening elements. In contrast, when an element is said to be "directly above" another element or to extend "directly over" another element, there are no intervening elements. Similarly, when an element such as a layer, region, or substrate is said to be "above" another element or to extend "above", it will be understood that the element may be directly above the other element or directly extend above the other element, or there may be intervening elements. In contrast, when an element is said to be "right above" another element or to extend "right above" another element, there are no intervening elements. Also, when an element is said to be "connected" or "coupled" to another element, it will be understood that the element may be directly connected or coupled to the other element, or there may be intervening elements. In contrast, when an element is said to be "directly connected" or "directly coupled" to another element, there are no intervening elements.

[0018]

[0026] As used herein, relative terms such as "below", "above", "upper", "lower", "horizontal", or "vertical" may be used to describe the relationship of one element, layer, or region to another element, layer, or region, as illustrated in the figures. It is understood that these terms, as well as the terms discussed above, are intended to encompass various orientations of the device in addition to the orientation shown in the figures.

[0019]

[0027] The terms used in this specification are for the purpose of describing particular embodiments only and are not intended to limit the disclosure. As used in this specification, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Further, the terms "comprises", "comprising", "includes", and / or "including" as used herein specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0020]

[0028] Unless defined otherwise, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. Further, the terms used herein are to be interpreted as having a meaning that is consistent with the context of this specification and the relevant art and are not to be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0021]

[0029] In this specification, embodiments are described with reference to schematic drawings of embodiments of the present disclosure. Therefore, the actual dimensions of layers and elements may differ, and variations from the schematic shapes are expected, for example, as a result of manufacturing techniques and / or tolerances. For example, areas illustrated or described as squares or rectangles may have rounded or curved features, and areas illustrated as straight lines may have irregularities. Thus, areas illustrated in the drawings are schematic, and their shapes are not intended to illustrate the exact shapes of areas in the device, nor are they intended to limit the scope of the disclosure. In addition, the size of structures or areas may be exaggerated for illustrative purposes compared to other structures or areas, and are therefore provided to illustrate general structures of the subject matter, and may or may not be drawn to scale. Elements common to both drawings may be illustrated herein with common element numbers and may not be described again later.

[0022]

[0030] This disclosure relates to a light-emitting diode (LED) package, and more specifically, to real-time digital communication and related methods for an LED package. Individual LED packages are arranged for cascaded communication. Each LED package includes one or more LED chips, and each LED package can individually receive communications from a data stream, control the operation of one or more LED chips, and perform real-time processing on at least one modifiable data value of the data stream. An LED package may include a real-time processor that can process data from the data value of the data stream and return the processed or modified data to the data stream with the same data value. Disclosed are LED packages that can be assembled together in an array in which each LED package can individually process data and transmit the processed data to the next downstream LED package. Such real-time processing may also be performed within each LED package, providing varying bit delays.

[0023]

[0031] In cascaded digital communication, multiple electronic devices are arranged as repeaters to continuously receive serial communication for operation. In the case of fine-pitch video displays, multiple LED packages are arranged in series as LED pixels to receive cascaded communication. The arriving signal to each LED pixel is generated by another element, such as a master controller or a preceding LED pixel, and the bitstream of the arriving signal is derived from the clock domain of one or more preceding devices. Distributing the communication signal appropriately to thousands of LED pixels is difficult. Small size is required for LED packages to form pixels in high-resolution video displays, and this size constraint creates further challenges.

[0024]

[0032] All LED pixels in a video display need to be updated synchronously. One example is synchronizing screen updates with video recording or photography equipment to eliminate undesirable effects such as uneven exposure of the display during recording. Another example is the need to synchronize 3D shutter glasses with display frames targeting the left and right eyes. Common 3D display methods typically include a so-called "blanking period," during which all LED pixels on the screen are simultaneously turned off for a certain period, such as 2 milliseconds (ms), at the beginning and / or end of each video frame. Some 3D display methods also require short flashes of light within the blanking period. These flashes of light within the blanking period serve as a signal to equipment such as 3D shutter glasses to identify the left and right frames. Other 3D display methods use other communication media, such as wireless between the controller and headset, but still require synchronization and blanking between pixels when the shutter glasses switch from one side to the other. For the purposes of this discussion, synchronization means coordinating the operation of an LED package or LED pixels simultaneously or within one millisecond. Synchronization may further include the coordinated operation of individual LED pixels, so that individual LED pixels or groups of LED pixels respond to their respective data with varying delays. The above description includes numerous possibilities beyond all LED pixels operating simultaneously and identically. For example, instead of flashing the screen, the flashing could be a vertical line on the screen flashing rapidly from left to right, or in any other timing pattern involving a series of actions.

[0025]

[0033] As used herein, the terms “data stream” and “communication channel” may be used interchangeably. However, “data stream” typically refers to a non-physical representation of data over time, flowing through a series of communication channels, as well as through internal wiring and storage registers within various elements such as controllers and active electrical elements. A data stream may also be referred to as digital communication between two elements, such as a controller element transmitting digital communication and a receiving element receiving digital communication. “Communication channel” typically refers to the physical medium through which a data stream is transmitted. For example, a communication channel may be a wire with associated electrical elements, an optical fiber, or even air, as in the case of radio, light, or sound waves. A given physical channel may also be divided by time or frequency to allow multiple “communication channels” simultaneously within a single medium, such as changes to different frequency bands. In certain embodiments, a communication channel may embody a serial digital communication channel. Certain embodiments relate to a binary communication channel, which is a single wire referenced to a common conductor such as ground, and can typically hold only one value at a time, either high or low voltage (e.g., digital "0" or "1"), controlled by the output register of a preceding device. While two-wire differential signaling methods are also conceivable, the preferred embodiments illustrated here refer to the single-wire approach primarily because providing more traces would increase complexity in fine-pitch displays.

[0026]

[0034] In certain embodiments, this disclosure relates to light-emitting devices including LEDs, LED packages, and associated LED displays, and more specifically, to the active control of LEDs in an LED display. An LED display may include rows and columns of LEDs that form an array of LED pixels. A particular LED pixel may include a cluster of LED chips of the same or multiple colors, and an exemplary LED pixel includes a red LED chip, a green LED chip, and a blue LED chip. In certain embodiments, an LED package includes a plurality of LED chips that form at least one LED pixel, and a plurality of such LED packages may be arranged to form an array of LED pixels for an LED display. Each LED package may include its own active electrical element configured to receive control signals and actively maintain an operating state, such as a brightness or gray level or color selection signal, of the LED chips of the LED device while other LED devices are being addressed. In certain embodiments, the active electrical element may include an active circuit configuration that includes one or more of the following: a driver device, a signal conditioning or conversion device, a memory device, a decoder device, an electrostatic discharge (ESD) protection device, a thermal management device, and a sensing device. The active electrical element further includes a circuit configuration that facilitates communication with multiple uncorrelated clock regions, including the original clock region from the controller and a local clock region derived within the active electrical element. In this regard, each LED pixel of the LED display may be configured to operate with active matrix addressing via mixed clock region communication. The active electrical element may be configured to receive one or more of the following: analog control signals, encoded analog control signals, digital control signals, and encoded digital control signals.In such an arrangement, a string of LED packages, each with its own active electrical element, can be arranged for serial communication, with each active electrical element receiving data from a data stream and transmitting the data to the next active electrical element in the string of LED packages.

[0027]

[0035] In the case of active matrix addressing, each LED pixel is configured to actively maintain an operating state, such as brightness or gray level or color selection, or to control its drive state while other LED pixels are being addressed. This allows each LED pixel to maintain or independently control its drive state, thereby improving display and / or image recording by mitigating or eliminating the effects caused by lower-frequency pulsing beats from the aforementioned devices (e.g., lighting sources, other pulse displays, or image capture devices). Therefore, each LED pixel may be configured to maintain its operating state using a continuous drive signal, including pulse-width modulation (PWM), rather than the conventional method using a time-division multiplexed signal that scans between groups of pixels, often with a low-frequency component added to the drive signal associated with passive matrix addressing. In this regard, each LED pixel may include an active-electric chip or active-electric element that may include a memory device and a function to change the drive state of the LED pixel based on the state stored in the memory of the active-electric element. In certain embodiments, the continuous drive signal is a constant analog drive current, and the brightness level may be controlled by a pulse method such as PWM. In other embodiments, the continuous drive signal may refer to a PWM signal that is not interrupted by time-division multiplex scanning of other LED pixels in the array or sub-array. In certain embodiments, the active electrical element may include an active circuit configuration that includes one or more of the following: a driver device, a signal conditioning or conversion device, a memory device, a decoder device, an ESD protection device, a thermal management device, a sensing device, and a voltage and / or current sensing device, a command processing device, and a circuit configuration. In various embodiments, the active electrical element comprises an integrated circuit chip, an application-specific integrated circuit (ASIC), a microcontroller, or a field-programmable gate array (FPGA).In certain embodiments, the active electrical element may be configured to be programmable or reprogrammable after manufacturing through various memory elements and logic incorporated within the active electrical element.

[0028]

[0036] As used herein, the terms “active electrical chip,” “active electrical element,” or “active electrical component” include any chip or component that can change the driving state of an LED based on memory or other information which may be stored within the chip or component. As used herein, the terms “active LED pixel” and “smart LED pixel” may be used interchangeably and may refer to a device which includes one or more LED devices or chips forming a pixel and the active electrical element or chip described above. In certain embodiments, each LED pixel may comprise a single LED package configured as an active LED package which includes multiple LED chips and active electrical elements as described above. In this way, the number of separate electrical devices required for the LED display, such as separate electrical devices located on the back of the LED panel of the LED display as described above, may be reduced. In addition, the overall operating power required for the operation of the LED panel may also be reduced.

[0029]

[0037] As used herein, the term “real-time” in the context of real-time processing typically refers to processing within a time constraint that enables uninterrupted processing of a data stream flowing through an LED package. For cascaded serial communication of LED packages, a data stream flows continuously through a series of LED packages connected in series. As used herein, real-time processing may be defined as the data in a given block or time slot of the data stream being processed by the LED package, and new data being introduced into the same block by replacing or modifying the original data as the data stream flows through the LED package. By modifying the same data value in the data stream, real-time processing is performed within the LED package within a given time constraint without interruption of the data stream. Such real-time processing may typically be performed within a time constraint of less than 10 microseconds (μs). This provides real-time processing within the same time constraint for unprocessed data flowing through the LED package. In certain embodiments disclosed herein, the LED package may be configured to perform real-time processing with a specific bit delay, such as a 2-bit delay or a 4-bit delay, where a specific data value is processed within the same time delay as the unprocessed blocks flowing through the LED package.

[0030]

[0038] Figure 1 is a block diagram 10 illustrating a system-level control scheme for a lighting device using cascaded communication for series-connected LED packages 12. The lighting device may embody an LED display, and each LED package 12 may form an LED pixel of the display. For such applications, the terms LED package and LED pixel may be used interchangeably, although an LED package may be understood to consist of multiple LED pixels formed together in a single component. An exemplary LED string 14 arranged for serial communication is indicated by a dashed box in Figure 1. Only a single LED string 14 is provided in detail, but one or more other LED strings may be coupled to a controller 16. As illustrated, the controller 16 is arranged to control one or more LED strings 14. The controller 16 may comprise an integrated circuit such as one or more of the following: ASIC, microcontroller, programmable control element, and FPGA. In certain embodiments, the controller 16 may be referred to as the master controller for the LED strings 14. In other embodiments, the controller 16 may be a subcontroller to which a set of tasks relating to a larger system are delegated to another master controller (not shown). The data signal output (DOUT) of the controller 16 may be passed serially along the LED string 14, and the return data signal input (DIN) may be received again by the controller 16. This signal includes the original clock region provided by the controller 16 or another master controller as described above. In Figure 1, each LED package 12, i.e., LED pixel, is labeled such as "Px1,1", where the first number represents the row and the second number represents the column. Each LED package 12 contains its own active electrical element 18 registered and housed therein, and each LED package 12 has logic for responding to the received data signal.

[0031]

[0039] For cascaded serial communication of LED packages 12, key features include addressing data for specific LED packages 12, recognizing the position of a specific LED package 12 within an LED string 14, and synchronizing LED outputs in coordination with other LED packages 12 in the display. One previous technique for addressing data to specific LED packages 12 involves each LED package 12 deleting one data set and retransmitting the remaining data along the LED string 14. However, this does not allow for return data in the data stream. Another previous technique for addressing data to specific LED packages 12 involves the executed bits being flagged by the LED package 12 and providing a command protocol for signaling downstream LED packages 12 to ignore the corresponding data. As will be described in more detail below, this disclosure provides the aforementioned key features, which improve efficiency while effectively synchronizing the outputs of the series-connected LED packages 12. Intercommunication between LED packages 12 positioned as LED pixels is increased, including communication of position and delay factors for inducing specific data to each LED pixel, and synchronization.

[0032]

[0040] Figure 2 is a block diagram of the LED package 12 of Figure 1, with specific details of an active electrical element 18 in accordance with the principles of this disclosure. The active electrical element 18 may include a number of ports represented by a supply voltage (Vdd), ground (GND or Vss), and bidirectional communication ports or digital input / output ports (DIO1 and DIO2) in accordance with embodiments disclosed herein. By having DIO1 and DIO2 ports as bidirectional communication ports, the active electrical element 18 may have the advantage of being able to detect input signals from a communication channel and then assign one of the DIO1 and DIO2 ports as an input port and the other of the DIO1 and DIO2 ports as an output port. This provides flexibility in the layout of a display in which multiple LED packages 12 are connected for cascaded communication. For example, multiple LED packages 12 may be arranged in multiple rows, where data cascades in a serpentine manner from package to package and from row to row along each row, as illustrated in Figure 1. In such an arrangement, the bidirectional communication ports allow the LED packages 12 to be mounted in the same orientation, enabling digital communication to be received and transmitted from left to right or right to left, depending on the row position. In addition to the four ports Vdd, GND, DIO1, and DIO2 on the left side of the block diagram, the active electrical element 18 includes four ports on the right side, coupled to LEDs 20-1 to 20-3 of the LED package 12. In this regard, LEDs 20-1 to 20-3 are packaged together with the active electrical element 18 within a common LED package 12, forming individual pixels of a larger display. As used herein, LEDs 20-1 to 20-3 may also be referred to as LED chips.

[0033]

[0041] Specific elements of the active electrical element 18 will be described later. However, it is understood that the active electrical element 18 may include many other components, including memory elements, signal conditioning elements, thermal management elements, electrostatic discharge elements, clock elements, and oscillators. In Figure 2, the control logic 22 is arranged to receive input data, execute commands according to a command protocol, provide control signals for the operation of LEDs 20-1 to 20-3, report various voltage and / or temperature levels included with the output data, and transmit the output data to the next adjacent LED package via the DIO1 and DIO2 ports. The control logic 22 may operate in the digital domain and may include input / output buffers electrically coupled to the DIO1 and DIO2 ports, assigning input and output configurations to the bidirectional DIO1 and DIO2 ports.

[0034]

[0042] In certain embodiments, the active electrical element 18 may be configured to provide both forward-biased and reverse-biased states to LEDs 20-1 to 20-3. In this regard, the control logic 22 may include a reverse-biased control output signal configured to supply a voltage level of approximately Vdd or approximately GND to LEDs 20-1 to 20-3 using a suitable active element. The term "reverse bias" means that a reverse-biased state occurs when the output of the control logic 22 is at a high level, so the output signal can simply be coupled to an inverter 24 provided in the driver 26 of the active electrical element 18. Thus, LEDs 20-1 to 20-3 can be either forward-biased or reverse-biased depending on the specific operating state and / or command received by the control logic 22. The inverter 24, or inverter logic element, may have output characteristics sufficient to drive LEDs 20-1 to 20-3. The driver 26 may be a substantially analog interface of the active electrical element 18 that is electrically coupled to the control logic 22. The driver 26 may include controllable current sources 28-1 to 28-3, which can also be configured as LED sink drivers. By incorporating pull-up registers R1 to R3, a path to Vdd may be provided for each of the LEDs 20-1 to 20-3, which is useful for voltage measurement when configured in reverse bias. Each of the current sources 28-1 to 28-3 may be electrically coupled to digital output signals LED1 to LED3 of the control logic 22. The output signals LED1 to LED3 may be provided along multiple wires coupled to each of the current sources 28-1 to 28-3 for current selection purposes. The output signals LED1 to LED3 may embody PWM outputs of the control logic 22 for controlling the operation of LEDs 20-1 to 20-3. The driver 26 may also include a multiplexer 30 electrically coupled to the analog-to-digital (ADC) converter and ADC selector of the control logic 22. In addition, the driver 26 may include an on-chip temperature sensor provided through the multiplexer 30. In certain embodiments, the temperature sensor provides thermal compensation for LEDs 20-1 to 20-3 via a thermal compensation curve and / or thermal shutdown.

[0035]

[0043] The active electrical element 18 further includes a serial interface 32 that embodies a module having a circuit configuration configured to decode the incoming signals of a data stream and convert them into a bitstream in the local clock region, which can be further processed by control logic 22. Thus, the serial interface 32 may also be referred to as a digital communication receiving device. Digital communication can be received from a controller (e.g., 16 in Figure 1) and / or from another LED package in the serial string. The serial interface 32 is further configured to retransmit the decoded and converted bitstream, along with the corrected data, to a communication channel to which another LED package or another external element is connected in a manner compatible with the entire LED display system. In certain embodiments, the control logic 22 may include a circuit configuration in the form of real-time logic 34 that performs operations, such as mathematical operations, on the data values ​​received from the serial interface 32, if enabled by other logic within the active electrical element 18. The real-time logic 34 returns the processed results to the serial interface 32 for transmission as replacement data of the same data values, in real time and immediately, as described above. As used herein, the real-time logic 34 may also be referred to as a real-time processor. The control logic 22 may further include other circuit configurations, such as a finite state machine, which performs a series of required tasks through a series of states or steps. Thus, one or more parts of the control logic 22 may form an event processor configured to activate a series of responses, such as delayed responses, based on real-time processing.

[0036]

[0044] Figure 3 is a block diagram of part of the control logic 22 in Figure 2, including the real-time logic 34. In Figure 3, hash marks crossing various conductor lines indicate that multiple lines or signals may also be provided. The real-time logic 34 is configured to receive data from a data stream as input from the serial interface 32 in Figure 2 for real-time processing. The processed results, or processed data, may be enabled or disabled via a multiplexer 36, different from the multiplexer 30 in Figure 2. The multiplexer 36 is configured to select a desired signal and return it to the serial interface 32, outputting it to the data stream exiting the LED package 12 in Figure 2. The desired signal for output may be selected from several possible signals received by the multiplexer 36, including processed data from the real-time logic 34, other internal signals from the control logic 22, or raw input data to bypass the real-time logic 34 and retransmit without modification. Other internal signals from the control logic 22 may include cyclic redundancy check (CRC) codes or internal status values.

[0037]

[0045] The real-time logic 34 may be configured to perform any number of operations on the input data for processing. Such operations include calculations such as addition, subtraction, up-counting, down-counting, incrementing, decrementing, multiplication, and division, as well as simpler logical operations. As illustrated, the real-time logic 34 may be configured to receive one or more control signals. Such control signals may include a reset signal, a clock signal, and various function selection signals. The various function selection signals may include signals for switching the real-time logic 34 on or off, signals for performing calculations, or signals for performing other mathematical operations or processing. As further illustrated, the selection control signals may be provided to the multiplexer 36 along one or more selection lines.

[0038]

[0046] Figure 4 is a partial block diagram of the control logic 22, similar to that in Figure 3, for an embodiment in which the real-time logic 34 performs the operation of a counter, such as a down counter or subtractor. In such a configuration, the control signal lines in Figure 3 are exemplified in Figure 4 as the reset line and clock line. Counting down to zero generates an event that instructs the control logic 22 to copy the next data value, which is a data value targeting a particular LED package or pixel in the serial string, into memory. All other data values ​​may be ignored and repeated for subsequent LED packages. Thus, the real-time logic 34 may also include a data selector configured to correlate the position of the target data to be tracked within the communication signal, and the target data is selected for data input to the control logic 22 in the corresponding LED package.

[0039]

[0047] In Figure 4, the real-time logic 34 includes a register element 38, such as a flip-flop circuit, a data (D) flip-flop circuit, or a latch element, which may receive input from the serial interface 32 via an AND gate 40 and an inverter 42. By example, in the context of a D flip-flop circuit for register element 38, the following discussion of operation is provided. For proper operation, a reset signal is applied to register element 38 via a reset line before operation, setting register element 38 to logic level 1. This flip-flop maintains the borrow state of register element 38 while performing the function of a subtractor by subtracting the value 1 from the input value. The input data is introduced first from the least significant bit (LSB). The XOR gate 44 performs the operation between the input data value and the borrowed value. Once the first value 1 is introduced to the input, the borrow is no longer needed, and the borrow state becomes 0 until reset for another subtraction operation. In this case, the calculation performed, which is a down count, may be at least partially based on the data rate of the cascaded serial communication, and the counter may be synchronized with the data rate. The calculation may also be at least partially based on a clock inside or outside the LED package, and the counter may be synchronized with the clock. In certain embodiments, the start of the delayed response as described above may be controlled by an initial timing value of the counter which is the result of the calculation, and the counter rate of the counter may be at least partially synchronized with the data rate of the cascaded serial communication. Other values ​​or states stored within the LED package may also be decomposed in the calculation. For example, a received control signal may instruct the real-time logic 34 to select increment or decrement. In another example, separately stored values ​​may be used to subtract a value other than 1 from the incoming data. As shown in Figure 4, the real-time logic 34 configured as a decrementer may be used to correlate the position of the target data to be tracked in the communication signal, and as a result, the target data may be selected for data input to the control logic within the LED package (e.g., 22 in Figure 2).An example of this process is described below.

[0040]

[0048] Figure 5A is a block diagram 46 illustrating cascaded communication and data bit processing for a plurality of LED packages 12-1 to 12-3 according to the principles of this disclosure. The LED packages 12-1 to 12-3 may be arranged as part of the LED string 14 in Figure 1. Input communication from the data stream 48 of the communication channel is received by LED package 12-1 and transferred from input register 50, graphically illustrated as a box within LED package 12-1, to output register 52. Input register 50 and output register 52 represent memory locations within the active electrical elements 18. The data stream may include a bit pattern of data blocks of any length having bits illustrated by the numbers 1, 2, 3, 4, ..., n. The data blocks may include command codes that are processed by the active electrical elements 18 of each LED package 12-1 to 12-3, controlling the operation of the corresponding active electrical elements 18, and / or the operation of the corresponding LEDs within LED packages 12-1 to 12-3.

[0041]

[0049] During operation, each data bit of the data block is sequentially received and held by the input register 50 during one clock count, and then transferred to the output register 52 in the next clock count. Thus, the data stream 48 may experience a 2-bit delay during processing. In other cases, other delays, such as a 4-bit delay, are provided by other registers within the active electrical element 18. In some cases, the bit data transferred to the output register 52 is modified or corrected according to the real-time logic 34 in Figure 2.

[0042]

[0050] Figure 5B is a similar Figure 54 to Figure 46 in Figure 5A, further illustrating the progression of data bits through LED packages 12-1 to 12-3. As illustrated, the bit positions of a data block can shift sequentially from left to right through the input registers 50 and output registers 52 of multiple LED packages 12-1 to 12-3 according to the clock cycle. Thus, the first bit position of a data block (i.e., "1") may already be held in the input register 50 of the third LED package 12-3, bit positions "2" and "3" are in the second LED package 12-2, bit positions "4" and "5" are in the first LED package 12-1, and the remaining bit positions have not yet been received by LED packages 12-1 to 12-3. In Figure 5B, boxes superimposed on the input registers 50 and output registers 52 are illustrated, with each bit position representing a data block distributed across multiple LED packages 12-1 to 12-3. The internal logic of the active electrical element 18 may include the real-time logic 34 described above in Figure 2, which performs real-time processing while the data stream 48 is flowing. Thus, the following values ​​of each output register 52 may be based on the internal state of the logic and the values ​​of the input register 50. Such real-time processing involves processing bits or data values ​​of data blocks and modifying the data stream in the same time slot as the processed bits or processed data values.

[0043]

[0051] Figure 6 is a schematic diagram of an embodiment illustrating a bit pattern that may be received and processed by the control logic 22 and real-time logic 34 of Figure 4. For simplicity, the size of the data element or pixel data is illustrated as 8-bit bytes, although in a real system, more bits may be required for each element, such as the number of bytes or individual pixel data blocks. The input rows for Pixel1, Pixel2, and Pixel3 represent the inputs to each of the three LED packages 12-1 to 12-3 illustrated in Figures 5A and 5B. The alignment of the input rows for Pixel1, Pixel2, and Pixel3 is not intended to represent the simultaneity of each vertical column.

[0044]

[0052] While the data stream is flowing, Pixel1 receives input and generates output that becomes input to Pixel2 and others. The output row of Pixel3 represents output data from Pixel3, which may become input to another downstream pixel or become part of a data stream returning to a master controller such as controller 16 in Figure 1. For brevity, various "x" values ​​are exemplified to represent values ​​in the data stream that are not related to the real-time processing principles discussed herein. The bit pattern of the represented data or data block contains command bytes that instruct Pixel1-3, along with other information, which type of dataset to follow. Below is a 3-byte preamble labeled Number Byte-1, Sync Value, and Number Data Unit-1, which represents one or more data values ​​of the bit pattern.

[0045]

[0053] The Number Byte -1 provides Pixel1-3 with information about the number of bytes following the preamble, allowing Pixel1-3 to know when the bit pattern ends and, if applicable, when another command will arrive. In Figure 6, this value is set to "2" for a 3-byte zero-based count, and this value does not change per pixel. The Sync Value is a timing value used to provide Pixel1-3 with information about when to start an event or sequence of events. Pixel1 receives the command first, but its corresponding data segment (i.e., Pixel1 data) is received last, after the Pixel3 data and then the Pixel2 data segment have flowed by. The arrangement of this bit pattern may also be referred to as the reverse order of the data segments (i.e., Pixel3 data, Pixel2 data, then Pixel1 data) relative to the order of the pixels in the string (e.g., Pixel1, Pixel2, then Pixel3). Therefore, Pixel1 needs to delay its operation longer than the subsequent downstream Pixel2 and Pixel3 from receiving the command. Thus, Pixel1 receives a higher Sync Value, which is performed by Pixel1, to set a timer for generating the start event signal. In many cases, this delay can be calculated locally by Pixel1 from Number Byte -1 and Number Data Unit -1, or vice versa. Therefore, the Sync Value is considered redundant. However, such data redundancy can be advantageous because it requires fewer computational resources within Pixel1-3. While Pixel1 is processing, the Sync Value is decremented by one for input to Pixel2, and similarly for each additional pixel. In this example, Number Data Unit -1 is another zero-based number indicating the number of pixel data units to ignore before accepting the target data subblock of the pixel. That is, Number Data Unit -1 is implemented to inform each of Pixel1-3 of its intended data.In Figure 6, Pixel3 is the last pixel in the serial string, and therefore the Pixel3 output for Number Data Unit -1 is sent back to the master controller with a value of "1". This is because the Sync Value is processed during real-time processing, and the value of "Number Data Unit -1" is decremented each time the data stream passes through each pixel. When the value reaches zero, the counter rotates, and the next value (-1) is represented in binary as all 1s.

[0046]

[0054] The Sync Value portion and / or Number Data Unit-1 portion of the bit pattern may form a set of mutable data values ​​on which real-time processing is performed. The Sync Value portion and / or Number Data Unit-1 portion may also be referred to as two mutable data values ​​on which real-time processing is performed. In certain embodiments, the mutable data value may include at least two bits of data. In further embodiments, the mutable data value may include any number of bits up to about 64 bits, corresponding to, for example, the standard width of a double-precision floating-point number. Further embodiments may include a set of such numbers that are manipulated via real-time logic 34. The Number Data Unit-1, which is a mutable data value, refers to a data position value in the data stream, which is correlated to the position of the data value in the data stream segment of the data stream targeting a particular Pixel 1-3. The mutable data value may be processed and modified as it passes through each of Pixel 1-3. Depending on the application, the length of the mutable data value may be variable during cascaded communication. In other words, the length of the Sync Value portion and / or the Number Data Unit -1 portion can change during real-time processing based on a portion of the bit pattern preamble provided by an external controller (e.g., 16 in Figure 1).

[0047]

[0055] In such real-time processing, a mutable data value, the Sync Value, forms a delay value that synchronizes Pixels 1-3 and allows them to respond in a coordinated manner to data stream commands. Thus, the delay value provides a correlated delay time or delayed response for when each Pixel 1-3 performs one or more events, such as turning one or more LED chips within each Pixel 1-3 on, off, or setting them to a predetermined value. Because the delay value changes as it passes through each Pixel 1-3, each event is effectively synchronized at each downstream pixel.

[0048]

[0056] To further illustrate how the Sync Value is used, Figure 7 is the same schematic as Figure 6, but the data for each Pixel 1-3 is aligned with a 2-bit time delay, assuming each Pixel 1-3 receives its respective data along a common time axis. Thus, the alignment of the rows for Pixel 1 input, Pixel 2 input, and Pixel 3 input represents the same time position for each vertical column of all Pixels 1-3. In Figure 7, as the data shifts to the right, time increases to the left. As previously discussed, the Sync Value is introduced with an initial value and decremented by 1 for each Pixel 1-3. The decremented value is passed to the next Pixel 1-3, but the input value is shifted by 1 bit and loaded into an internal down counter, resulting in twice the value being loaded (i.e., 12 is loaded into Pixel 1's down counter to become 24). Each Pixel 1-3 begins counting down from its number for each clock cycle, following or correlated with the reception of each bit. When the counter reaches zero, a sync event trigger is activated, as illustrated in Figure 7. The internal logic within each Pixel1-3 active electrical element can use this event trigger to further delay and trigger a series of events, such as blanking, blinking, and starting a new brightness level of the corresponding LED chip. In one example, the sequence of synchronous events provides blanking, with a first event turning off all of Pixel1-3 for a specified time, followed by a second event turning all of Pixel1-3 on to the desired brightness of the associated data frame. In another example, the sequence of events may further comprise a third and fourth event occurring between the first and second events, the third event comprising turning on Pixel1-3, and the fourth event comprising turning off Pixel1-3 to provide a pulse of light that may be used for left-right synchronization of 3D glasses during the blanking period. The 2-bit shift represented by Figure 7 corresponds to the 2-bit delay described above.

[0049]

[0057] Each time sequence of Pixel1-3 has vertical tick marks representing the starting count positions 60-1-60-3, the 1x count 62-1-62-3, and the 2x count 64-1-64-3. As illustrated, the 2x count 64-1-64-3 occurs simultaneously in all three pixels. In particular, count positions 64-1-64-3 trigger a synchronous event. At that point, all three Pixels, Pixel1-3, have also received the data segment in question, as Pixel1 is the last to receive the data. The occurrence of the event at that point may cause internal processes in each of Pixel1-3 to run synchronously. This may include outputting a new LED brightness value along with other operations. Various event types are associated with one of several possible operations, such as turning one or more LED chips on, off, or setting them to a predetermined value.

[0050]

[0058] Figure 7 illustrates an exemplary embodiment for demonstrating aspects of the present disclosure. Actual implementations may require wider word widths for the pixel data and the three values ​​in the preamble. Typically, each preamble value requires 2 bytes. For 24-48 bit color depths, 3, 4, 5, or 6 bytes are required for each Pixel1-3. Many other embodiments are conceivable. If delays different from the 2-bit delay represented by Figure 7 occur between pixels, the calculations and / or values ​​will change. Instead of loading four times the data byte length into the initial Sync Value, eight times the data byte length can be loaded and counted down by 2 for each pixel, with the value available without shifting (e.g., multiplying by 2). As previously discussed, the Sync Value can be omitted from the preamble and calculated internally from the other two values. Numerous modifications to this method are conceivable within the scope of the present disclosure, as illustrated.

[0051]

[0059] Figure 8 is a schematic diagram similar to Figure 7, except that when each Pixel 1-3 receives its respective data along a common time axis, the data segments of each Pixel 1-3 are aligned with a 4-bit delay. Similar to Figure 7, the alignment of the input rows for Pixel 1, Pixel 2, and Pixel 3 represents the same time position for each vertical column of all Pixel 1-3. The 4-bit shift represented by Figure 8 corresponds to real-time processing with the aforementioned 4-bit delay. In Figure 8, the Sync Value is changed so that the sync event triggers at count positions 64-1 to 64-3 occur simultaneously for all Pixel 1-3. This sync event trigger corresponds to when Pixel 1 receives a data segment, similar to the 2-bit delay example in Figure 7. In this example, the value 6 (i.e., 00000110) of Pixel 1 is loaded into the counter with a 2-bit shift (multiplication by 4). Thus, Pixel 1 still counts down 24 clock cycles to generate the sync event, while Pixel 2 counts 20 cycles and Pixel 3 counts 16 cycles.

[0052]

[0060] In certain embodiments, the sequences illustrated in Figures 6-8 represent a synchronous configuration and method that combines the use of a real-time processor in each Pixel 1-3 (e.g., 34 in Figure 2) with a technique for counting from a given position, such as a command, to a synchronized trigger event. Thus, the real-time processor is configured to perform real-time processing on the same mutable data value during serial communication. In other embodiments, the sequences described above may be performed without necessarily having a real-time processor in each Pixel 1-3. Rather, values ​​can be loaded into Pixel 1-3 by various other methods, such as by a command in the same manner that the brightness value is loaded. Yet another embodiment allows values ​​to be loaded into Pixel 1-3 by a data stream command in combination with real-time processing by a real-time processor in each Pixel 1-3 (e.g., 34 in Figure 2).

[0053]

[0061] In certain embodiments, the sequences illustrated in Figures 6–8 may represent a data synchronization configuration and method without a preamble for Number Byte-1, Sync Value, and Number Data Unit-1. Alternatively, parameters such as data length and respective data offsets can be individually provided to Pixels 1–3 by separate commands and / or data. In other words, the synchronization and respective data offset methods presented herein may be applied without real-time processing by storing values ​​for each Pixel 1–3 for prior counting by other means. Alternatively, Pixels 1–3 may count the data using a preamble for Number Byte-1, Sync Value, and Number Data Unit-1, as described above. In certain embodiments, an external data source, such as controller 16 in Figure 1, may define variable-length data segments and the number of data segments provided to various Pixels 1–3. In certain embodiments, the variable-length and variable-number data segments may be implemented in combination with real-time processing by a real-time processor within each Pixel 1–3 (e.g., 34 in Figure 2).

[0054]

[0062] According to the embodiments described above, individual LED packages can be assembled together for cascaded communication within an LED array for various applications. In one such application, individual LED packages form LED pixels in an LED display. Each LED package may include one or more LED chips forming at least one individual pixel, along with an active electrical element capable of receiving serial communication from a data stream, controlling the operation of one or more LED chips based on commands received in the data stream, and performing real-time processing of various data values ​​in the data stream. The active electrical element within each LED package may include a circuit configuration in the form of a real-time processor that can process data from data values ​​or time slots in the data stream and reintroduce the processed or modified data into the data stream of the same data value or time slot. Thus, each LED package in an LED display may process data individually and transmit the processed data to the next downstream LED package. In certain embodiments, such real-time processing may be performed while providing various bit delays within each active electrical element, such as a 2-bit delay or a 4-bit delay. Performing real-time processing individually for each LED package, or for each LED pixel in the display, provides various advantages, including the ability to synchronize and / or coordinate the operation of the series-connected LED packages. Furthermore, according to the embodiments described above, a method for directing a specific segment of a larger data block to each pixel is disclosed. In addition, a method for synchronizing the behavior of multiple pixels is also disclosed.

[0055]

[0063] Any of the embodiments described herein, and / or any of the various distinct embodiments and features described herein, may be combined for further advantages. Any of the various embodiments disclosed herein may be combined with one or more other disclosed embodiments unless otherwise indicated herein.

[0056]

[0064] Those skilled in the art will recognize improvements and modifications to preferred embodiments of this disclosure. All such improvements and modifications are deemed to fall within the scope of the concepts disclosed herein and the following claims.

Claims

1. A method of digital communication, The steps include transmitting a digital communication from at least one light-emitting diode (LED) package to at least one other element, comprising a bit pattern containing at least one mutable data value, The steps include performing real-time processing on the at least one changeable data value within the at least one LED package, and A method that includes [a certain feature].

2. The method according to claim 1, wherein the at least one mutable data value comprises at least 2 bits and up to 64 bits.

3. The method according to claim 1, wherein the at least one modifiable data value is a data position value in a data stream, the data position value is correlated to the position of a data value in a data stream segment of the data stream, and the data value is targeted to the at least one LED package.

4. The at least one LED package is a first LED package among a plurality of LED packages connected in series to receive the digital communication from the data stream, and the first LED package is positioned in front of the other LED packages among the plurality of LED packages to receive the digital communication. The data value precedes the first data segment among the multiple data segments of the data stream segment, and each data segment of the multiple data segments targets a separate LED package among the multiple LED packages. The method according to claim 3, wherein the data stream segments are arranged in reverse order such that the first data segment for the first LED package is received after the other data segments of the plurality of data segments for the other LED packages are received by the first LED package.

5. The method according to claim 1, wherein the at least one changeable data value is a delay value correlated with a delay time when the at least one LED package performs one or more events.

6. The at least one LED package is a first LED package among a plurality of LED packages connected in series to receive the digital communication, The method according to claim 5, wherein the delay value is changed so that events of two or more other LED packages among the plurality of LED packages are synchronized with one or more events of the first LED package.

7. The method according to claim 1, wherein the real-time processing comprises at least one of adding, subtracting, multiplying, dividing, incrementing, or decrementing the received value of the at least one mutable data value.

8. A method for timing the operation of at least one light-emitting diode (LED) package arranged for cascaded serial communication, The steps include receiving one or more synchronization values ​​in at least one LED package, The steps include providing a delayed response correlated with one or more synchronization values, A step of operating the at least one LED package according to the aforementioned delay response. A method that includes [a certain feature].

9. The method according to claim 8, wherein real-time processing within at least one LED package changes one or more synchronization values ​​for use in subsequent LED packages.

10. The method according to claim 8, wherein the delay response is synchronized with another delay response of at least one other LED package arranged to receive the cascaded serial communication.

11. The method according to claim 8, wherein the start of the delayed response is controlled by an initial timing value of a counter which is the result of a calculation, and the counter rate of the counter is at least partially synchronized with the data rate of the cascaded serial communication.

12. The method according to claim 11, wherein the one or more synchronization values ​​are part of a mutable data value, the calculation is processed in real time, one or more values ​​of the mutable data value are changed, and the mutable data value is transmitted in the same time slot.

13. The method according to claim 11, wherein the calculation is at least partially based on other values ​​or states stored in the at least one LED package.

14. The aforementioned delayed response comprises at least one event, The aforementioned at least one event is controlled by at least one event value, The aforementioned at least one event value is an event type, The method according to claim 8, wherein the event type comprises one or more of turning on, turning off, and setting to a predetermined value one or more LED chips present in the at least one LED package.

15. The method according to claim 14, wherein the at least one event is a sequence of synchronization events comprising a first event that turns off all of the one or more LED chips for a specified time, and a second event that turns on all of the one or more LED chips to a desired brightness for the associated data frame.

16. The method according to claim 15, wherein the sequence of synchronization events further comprises a third event and a fourth event occurring between the first event and the second event, the third event comprising the step of turning on one or more LED chips, and the fourth event comprising the step of turning off one or more LED chips.

17. A method of digital communication, A method comprising the step of continuously transmitting digital communication along a plurality of light-emitting diode (LED) packages, wherein the digital communication comprises data values ​​defined by a controller located outside the plurality of LED packages, the data values ​​being induced in the plurality of LED packages and corresponding to a variable length of data blocks of the digital communication.

18. The method according to claim 17, wherein the data value is a changeable data value of the digital communication transmitted to the plurality of LED packages, the changeable data value is part of the bit pattern of the digital communication, the bit pattern further comprises at least part of the preamble of each data block, the preamble comprises at least one of the data values ​​initially defined by the controller and sequentially changed by each of the plurality of LED packages.

19. The method according to claim 17, wherein at least one of the data values ​​corresponds to a data position in the variable-length data block, the data position represents a plurality of data segments in the variable-length data block, and each data segment targets a separate LED package among the plurality of LED packages.

20. The first LED package among the plurality of LED packages is arranged to receive the digital communication before the other LED packages among the plurality of LED packages. The method according to claim 19, wherein the last data segment of the plurality of data segments is directed to the first LED package, the plurality of data segments are arranged in reverse order, and the last data segment is received by the first LED package after the other data segments of the plurality of data segments directed to the other LED packages have been received by the first LED package.

21. Light-emitting diode (LED) package, At least one LED chip, A digital communications receiving device configured to receive a communication signal from another LED package, A real-time processor configured to change the changeable data values ​​of at least two consecutive bits of the communication signal received by the digital communication receiving device, An LED package equipped with [specific features / features].

22. The LED package according to claim 21, wherein the changeable data value is transmitted to a counter to provide a delayed response, the delayed response being correlated to at least one of the data rate of the communication signal, the internal clock of the LED package, or an external clock.

23. The LED package according to claim 22, wherein the real-time processor processes and modifies the changeable data values, and the delayed response is configured to be synchronized with other LED chips in other LED packages arranged to receive the communication signals.

24. The LED package according to claim 22, further comprising an event processor configured to activate a series of responses as the delayed response.

25. The LED package according to claim 21, wherein the real-time processor comprises a data selector and a counter configured to correlate the position of target data to be tracked within the communication signal, and the target data is selected for data input to the control logic within the LED package.