System and method for controlling edge ring voltage using an external resonator and an optional DirectDrive™.

Abstract

This paper describes a system and method for controlling edge ring voltage using an external resonator circuit and an optional DirectDrive™. One system includes a resonator coupled to the edge ring of a plasma chamber. The edge ring surrounds the substrate support of the plasma chamber. The system further includes a controller coupled to the resonator. The controller receives a first measurement signal from a bias sensor and a second measurement signal from a ring sensor, and controls the parameters of the resonator based on the first and second measurement signals to achieve uniformity in processing across the entire substrate.

Description

Technical Field

[0001] This embodiment relates to a system and method for controlling an edge ring voltage using an external resonator and an optional DirectDrive™.

Background Art

[0002] The description of the background provided herein is for the purpose of generally presenting the content of the present disclosure. Within the scope described in this background art section, the research by the inventors named at the present time, as well as aspects of the description that cannot be separately regarded as prior art at the time of filing, are not recognized as prior art against the present disclosure, whether explicitly or implicitly.

[0003] A plasma tool is used to process a substrate. A radio frequency (RF) generator of the plasma tool is connected to a matching network of the plasma tool. The matching network is connected to a chuck of a plasma chamber. The matching network includes a network of capacitors and inductors. The substrate is placed on top of the chuck within the plasma chamber. One or more gases are supplied to the plasma chamber. Also, an RF signal is generated by the RF generator. The network of capacitors and inductors receives the RF signal, matches the impedance between the input and output of the matching network, outputs another RF signal, and sends this other RF signal to the plasma chamber to process the substrate. However, the substrate is not processed in a desired manner.

Summary of the Invention

[0004] Embodiments of the present disclosure provide a system, apparatus, method, and computer program for controlling an edge ring voltage using a resonator and an optional DirectDrive™. It should be understood that these embodiments can be implemented in various ways, such as a process, apparatus, system, device, or method on a computer-readable medium. Some embodiments are described below.

[0005] In one embodiment, the edge ring voltage is controlled by changing the amount of coupling between the edge ring and the substrate support. The amount of coupling is changed by physically moving parts of the edge ring. However, if the edge ring is in a plasma chamber (such as a vacuum chamber) and is being etched and gradually removed, it is difficult to move parts of the edge ring.

[0006] In one embodiment, an impedance matching network is used to correct the power sent from a 50-ohm radio frequency (RF) generator to the edge ring. The same impedance matching also affects the edge ring voltage, complicating the control loop for controlling the edge ring voltage. The edge ring voltage is also affected by altering the coupling between the edge ring and the substrate support.

[0007] In one embodiment, an external resonator circuit is provided for controlling the edge ring voltage (sometimes referred to herein as Vring). The main cathode (such as a substrate support) is powered by a bias RF source connected to it. As an example, the bias RF source is a combination of a 50-ohm RF generator, an impedance matching circuit, and an RF cable, or a DirectDrive® RF source (such as a matchless plasma source). The bias voltage (sometimes referred to herein as Vbias) is measured by a voltage sensor connected to the substrate support, which generates the measured voltage, and the measured voltage is fed back to the bias RF source to control the bias voltage. The edge ring is positioned close to the main cathode and is powered by the main cathode through capacitive coupling. The voltage of the edge ring is controlled via an external resonator circuit connected to the edge ring. When using an external resonator circuit, it is not necessary to physically move the edge ring to correct the amplitude of the edge ring voltage. Also, when using an external resonator circuit, the control loop for controlling the edge ring voltage is simplified because an impedance matching network is not used to correct the power sent to the edge ring.

[0008] In one embodiment, the ring plasma load is typically a capacitively coupled plasma (CCP), characterized as a series combination of the plasma capacitance at the edge ring and the plasma resistance at the edge ring. The ring plasma load includes additional parasitic capacitance along the RF transmission path. Therefore, overall, at the connection point of the external resonant circuit, the ring plasma load becomes a capacitive load. The function of the resonant circuit is to construct an inductive impedance that is approximately resonant with the capacitive impedance of the capacitive load or the plasma capacitance at the edge ring. Once resonance is achieved, the edge ring voltage becomes approximately equal to the bias voltage, achieving uniformity when processing the substrate.

[0009] In one embodiment, a DirectDrive® RF source is added to provide additional power to the resonator circuit and further control the edge ring voltage. The combination of the DirectDrive® RF source and the resonator circuit may be referred to herein as the drive-resonator circuit. In this embodiment, the variability of the capacitor in the resonator circuit is optional. The output RF frequency of the DirectDrive® RF source is set to be approximately the same as, or identical to, the frequency of the bias RF source, thereby controlling the relative RF phase between the RF signal output from the DirectDrive® RF and the RF signal output from the bias RF source.

[0010] In one embodiment, the resonator is configured such that the edge ring voltage is below a target level when there is no power output from the DirectDrive® RF source. Starting from this point, the RF power output from the DirectDrive® RF source is increased, and the edge ring voltage is increased by appropriately controlling the RF phase. The phase difference between Vring and Vbias is also changed by altering the phase delay between the RF signals output from the bias RF source and the DirectDrive® RF source.

[0011] In one embodiment, the DirectDrive® RF source draws power from the resonator circuit. If the voltage on the DC rail of the DirectDrive® RF source is lower than the voltage at the output of the DirectDrive® RF source, the resonator circuit is powered by the bias RF source, and the DC rail is charged through the top transistor when the top transistor of the half-bridge circuit of the DirectDrive® RF source is turned on. As a result, the output power from the DirectDrive® RF source becomes negative.

[0012] In one embodiment, a system for controlling the edge ring voltage using a resonator is described. This system includes a resonator coupled to the edge ring of a plasma chamber. The edge ring surrounds the substrate support of the plasma chamber. The system further includes a controller coupled to the resonator. The controller receives a first measurement signal from a bias sensor and a second measurement signal from a ring sensor, and controls the parameters of the resonator based on the first and second measurement signals to achieve uniformity in processing across the entire substrate.

[0013] In one embodiment, a method for controlling the edge ring voltage using a resonator is described. This method includes receiving a first measurement signal from a bias sensor, receiving a second measurement signal from a ring sensor, and achieving uniformity in processing across the entire substrate by controlling the parameters of the resonator based on the first and second measurement signals. The resonator is coupled to the edge ring of a plasma chamber, and the edge ring surrounds the substrate support of the plasma chamber.

[0014] In one embodiment, a system for controlling the edge ring voltage using a resonator circuit is described. This system includes a resonator circuit coupled to the edge ring of a plasma chamber. The edge ring surrounds the substrate support of the plasma chamber. The system further includes a controller coupled to the resonator circuit. The controller receives a first measurement signal from a bias sensor and a second measurement signal from a ring sensor, and controls the parameters of the resonator based on the first and second measurement signals to achieve uniformity in processing across the entire substrate.

[0015] Some of the advantages of the systems and methods described herein include achieving uniformity when processing substrates by providing a resonator or resonator circuit. Uniformity is achieved by controlling the voltage (voltage amplitude, etc.) output from the resonator or resonator circuit based on measurement signals associated with the edge ring and substrate support. In some cases, phase matching between measurement signals associated with the edge ring and substrate support is achieved by correcting the phase of the RF signal output from the DirectDrive® RF source. Uniformity is achieved by using a resonator circuit, or a combination of the DirectDrive® RF source and a resonator circuit.

[0016] Other embodiments will become apparent from the following detailed description, which should be interpreted in conjunction with the attached drawings. [Brief explanation of the drawing]

[0017] Each embodiment can be best understood by referring to the following description, which is to be interpreted in conjunction with the accompanying drawings.

[0018] [Figure 1] Figure 1 is a diagram illustrating one embodiment of the system to illustrate the use of a resonator circuit.

[0019] [Figure 2] Figure 2 is a diagram illustrating one embodiment of the system to illustrate the details of the resonator circuit in Figure 1.

[0020] [Figure 3A] Figure 3A is an embodiment of a graph for illustrating the control of the capacitance of the capacitor of the resonator circuit of FIG. 1 to achieve the percentage ratio between the voltage associated with the edge ring and the voltage associated with the substrate support.

[0021] [Figure 3B] Figure 3B is an embodiment of a graph for illustrating the control of the capacitance of the capacitor of FIG. 3A to achieve the percentage ratio between the voltage associated with the edge ring and the voltage associated with the substrate support.

[0022] [Figure 4] Figure 4 is a diagram of an embodiment of a system for illustrating a resonator having a DirectDrive™ (which may also be referred to herein as a matchless plasma source (MPS)) and a resonator circuit.

[0023] [Figure 5A] Figure 5A is a diagram of an embodiment of a system for illustrating the details of a resonator circuit that is an example of the resonator circuit of FIG. 4.

[0024] [Figure 5B] Figure 5B is a diagram of an embodiment of a system for illustrating the details of a resonator circuit that is another example of the resonator circuit of FIG. 4.

[0025] [Figure 6] Figure 6 is a diagram of an embodiment of a system for illustrating the details of an MPS that is an example of the MPS of FIG. 4.

[0026] [Figure 7A]Figure 7A is a graph illustrating one embodiment of how the ratio of the voltage amplitude associated with the edge ring to the voltage amplitude associated with the substrate support is controlled by modifying the amplitude of the radio frequency (RF) signal output from the MPS in Figure 4.

[0027] [Figure 7B] Figure 7B is a graph illustrating one embodiment of how the phase delay between the voltage phase associated with the edge ring and the voltage phase associated with the substrate support is controlled by correcting the phase delay between the phase of the RF signal generated by the bias source system and the phase of the RF signal output from the MPS in Figure 4.

[0028] [Figure 7C] Figure 7C is a graph illustrating one embodiment of how the RF power output from the MPS in Figure 6 is a function of the phase delay between the phase of the RF signal generated by the bias source system and the phase of the RF signal output from the MPS in Figure 4. [Modes for carrying out the invention]

[0029] The following embodiments describe systems and methods for controlling edge ring voltage using an external resonator and an optional DirectDrive®. It will be understood that these embodiments may be implemented even if some or all of these specific details are omitted. In other examples, well-known process operations are not described in detail so as not to unnecessarily obscure these embodiments.

[0030] Figure 1 is a diagram of one embodiment of system 100 illustrating the use of the resonator circuit 102. System 100 includes a controller 104, a driver 106, a motor 108, the resonator circuit 102, a plasma chamber 112, a bias source system 114, a ring sensor 116, and a bias sensor 118. As an example, the controller includes a processor 120 and a memory device 122, with the processor 120 coupled to the memory device 122. Other examples of controllers include application-specific integrated circuits (ASICs), programmable logic devices (PLDs), and field-programmable gate arrays (FPGAs).

[0031] Examples of drivers used herein include one or more transistors coupled together. Examples of sensors 116 and 118 include voltage sensors. For example, ring sensor 116 is a voltage sensor, and bias sensor 118 is another voltage sensor. An example of motor 108 is an electric motor.

[0032] An example of the bias source system 114 is a combination of a bias radio frequency (RF) generator and a bias impedance matching circuit, where the bias radio frequency generator is coupled to the bias impedance matching circuit, and the bias impedance matching circuit is coupled to the edge ring 126. Another example of the bias source system 114 is a bias matchless plasma source (MPS) (e.g., DirectDrive®) and a bias reactance circuit. The bias reactance circuit is coupled to the bias MPS and the substrate support 124. Examples of matchless plasma sources are given below.

[0033] The plasma chamber 112 includes a substrate support 124 (such as an electrostatic chuck (ESC)) and an edge ring 126. The edge ring 126 is an annular ring surrounding the substrate support 124. For example, the edge ring 126 is positioned adjacent to the outer circumference of the substrate support 124 and surrounds the edge of the substrate support 124. For example, there is no other ring between the edge ring 126 and the substrate support 124. Another example is that the inner diameter of the edge ring 126 is larger than the outer diameter of the substrate support 124. The plasma chamber 112 further includes a dielectric window 128, an RF coil 130, and another RF coil 132.

[0034] The processor 120 is coupled to the driver 106, which is coupled to the motor 108. The motor 108 is coupled to the resonator circuit 102, which is coupled to the edge electrode 126. For example, the resonator circuit 102 is coupled to the edge electrode 126 via the RF connector 101. Examples of RF connectors used herein include RF cables, RF straps, RF cylinders, RF transmission lines, and two or more combinations thereof. For example, an RF strap is elongated and flat. Further example, an RF strap is rectangular. For example, an RF cable has an RF sheath and an RF conductor, and an RF transmission line has an RF rod and an RF sheath surrounding the RF rod. An insulator is placed between the RF sheath and the RF rod of the RF transmission line.

[0035] The processor 120 is also coupled to a bias source system 114, which is coupled to the substrate support 124 via an RF communication medium 103. For example, if the bias source system 114 includes a bias RF generator and a bias impedance matching network, the RF communication medium 103 is an RF transmission line. As another example, if the bias source system 114 includes a bias MPS and a bias reactance circuit, the RF communication medium 103 is an RF connection. The bias sensor 118 is coupled to the substrate support 124 and associated with the substrate support 124, and the ring sensor 116 is coupled to the edge ring 126 and associated with the edge ring 126. The ring sensor 116 and the bias sensor 118 are coupled to the processor 120 and provide feedback to the processor 120.

[0036] One or more of the RF coils 130 and 132 are supplied with RF power from one or more source RF systems. For example, RF coil 130 is supplied with RF power from a first source RF system at one end, and the other end of RF coil 130 is coupled to ground potential. Similarly, RF coil 132 is supplied with RF power from a second source RF system at one end, and the other end of RF coil 132 is coupled to ground potential. As another example, a single source RF system supplies RF power to both RF coils 130 and 132. An example of a source RF system is a combination of a source RF generator and a source impedance matching circuit, where the source radio frequency generator is coupled to the source impedance matching circuit, and the source impedance matching circuit is coupled to RF coils 132 and 132, respectively. Another example of a source RF system is a matchless plasma source.

[0037] A substrate S is placed on the upper surface of a substrate support 124. The central portion of the substrate S extends across the entire upper surface of the substrate support 124, and the edge portion of the substrate S extends onto the edge ring 126. The edge portion of the substrate S is the periphery of the central portion. An example of a substrate S is a semiconductor substrate such as a semiconductor wafer. Another example of a substrate S is a dummy substrate. A processor 120 controls a bias source system 114 to generate an RF signal 134, which is supplied to the lower electrode of the substrate support 124 via an RF communication medium 103. An example of an RF signal 134 is a signal having a radio frequency such as 400 kilohertz (kHz), 1 megahertz (MHz), 2 MHz, or 13 MHz. One or more process gases, such as an oxygen-containing gas, a fluorine-containing gas, or a combination thereof, are supplied to the internal volume portion of the plasma chamber 112. The internal volume portion is located between the horizontal height at the positions of the substrate support 124 and the edge ring 126 and the horizontal height of the dielectric window 128.

[0038] When an RF signal 134 is supplied to the lower electrode of the substrate support 124 and one or more process gases are supplied to the internal volume portion of the plasma chamber 112, plasma is generated in the internal volume portion to process the substrate S. Examples of processing the substrate S include etching the substrate S, depositing a material on the substrate S, and cleaning the substrate S.

[0039] While the substrate S is being processed, the bias sensor 118 generates a measurement signal 136 and transmits it to the processor 120. An example of the measurement signal 136 is a voltage signal having the voltage amplitude at the substrate support 124. Also during the processing of the substrate S, the ring sensor 116 generates a measurement signal 138 and transmits it to the processor 120. An example of the measurement signal 138 is a voltage signal having the voltage amplitude at the edge ring 126. As an example, the amplitude used herein may be the maximum amplitude, or zero-to-peak amplitude, or peak-to-peak amplitude.

[0040] The processor 120 receives measurement signals 136 and 138, determines (identifies, for example) a first memory parameter (such as a stored capacitance) of the resonator circuit 102 based on the amplitudes of the voltages of measurement signals 136 and 138, and controls the resonator circuit 102 to achieve the first memory parameter. For example, the processor 120 receives the first amplitude of measurement signal 138 and the second amplitude of measurement signal 136, calculates the ratio of the first amplitude to the second amplitude to generate a measured ratio. In this example, the processor 120 accesses the memory device 122 to identify the correspondence (one-to-one relationship or connection, for example) between the stored ratio of the ring voltage and the bias voltage and the first memory parameter of the resonator circuit 102. Furthermore, in this example, the processor 120 compares the stored ratio with the measured ratio and determines that the measured ratio is not within a predetermined ratio range (e.g., equal to) the stored ratio, and decides to control the resonator circuit 102 to achieve the first memory parameter. In this example, the processor 120 decides to control the resonator circuit 102 to achieve a first stored parameter until the measured ratio falls within a predetermined ratio range from the stored ratio. For example, the stored ratio range is 95% to 105%, and the measured ratio is 120% or 90%. For example, the stored ratio is 100%. In this example, the predetermined range is stored in the memory device 122.

[0041] Furthermore, in this example, once it decides to control the resonator circuit 102 to achieve a first memory parameter, the processor 120 controls the resonator circuit 102 to achieve the stored capacitance, thereby further achieving the stored ratio. For example, the processor 120 sends a control signal 105 indicating the stored capacitance to the driver 106. In this example, upon receiving the control signal 105, the driver 106 generates a current signal based on the stored capacitance and sends the current signal to the motor 108. In addition, in this example, in response to receiving the current signal, the motor 108 operates to correct the capacitance of the resonator circuit 102 and achieve the stored capacitance. In this example, the motor 108 operates to rotate the first plate of the capacitor in the resonator circuit 102 relative to the second plate of the capacitor, thereby achieving the stored capacitance. Also in this example, once the stored capacitance is achieved, the resonator circuit 102 outputs an RF signal 140 with RF power to the edge ring 126. When the RF signal 140 is output to the edge ring 126, resonance is achieved between the inductive impedance of the resonant circuit 102 and the capacitive impedance of the capacitance of the edge ring 126. In this example, the RF signal 140 is not actively supplied to the edge ring 126. Rather, in this example, the RF signal 140 modifies the voltage at the edge ring 126 to modify the amount of RF power received at the edge ring 126 from the bias source system 114 via the substrate support 124 and the RF communication medium 103. Further exemplify the absence of an RF source system (such as an RF generator or a matchless plasma source) supplying RF power to the edge ring 126. Rather, in this example, the voltage at the edge ring 126 is regulated by the resonant circuit 102, and the voltage produces RF power represented as the RF signal 140. Further exemplify the absence of a ring RF system (such as a matchless plasma source or a combination of a ring RF generator and a ring impedance matching circuit) actively supplying RF signals to the edge ring 126.

[0042] In this example, the target ring voltage is achieved at the edge ring 126, uniformly processing the substrate S across its entire upper surface. Further example, a predetermined number of features (such as channels) formed within the substrate S are etched to a depth within a preset etching depth range, resulting in uniform processing of the substrate S. Another further example is the uniform processing of the substrate by depositing material across the entire upper surface of the substrate to a depth within a preset material depth range. Once the substrate S is uniformly processed, uniformity in the features is achieved across the entire upper surface of the substrate S.

[0043] In one embodiment, the capacitance of the resonator circuit 102 is not controlled by the controller 104 via the motor 108. For example, the resonator circuit 102 is not coupled to the motor 108. Before processing the substrate S, the resonator circuit 102 has a stored capacitance to achieve resonance between the inductive impedance of the resonator circuit 102 and the capacitive impedance of the capacitance of the edge ring 126. For example, before supplying the RF signal 134 to the substrate support 124 to process the substrate S, the capacitance of the resonator circuit 102 is manually adjusted to achieve the stored capacitance. In this example, after the stored capacitance is achieved, the processor 120 controls the bias source system 114 to generate the RF signal 134 and process the substrate S uniformly.

[0044] In one embodiment, RF power is supplied to RF coils 130 and 132 from a source RF system. For example, RF coil 130 is supplied with RF power from a first source RF system to one end, and the other end of RF coil 130 is coupled to ground potential. Similarly, RF coil 132 is supplied with RF power from a second source RF system to one end, and the other end of RF coil 132 is coupled to ground potential.

[0045] In one embodiment, the plasma chamber 112 includes any number of RF coils (one, three, or four, etc.), each of which includes any number of turns (two, four, or five, etc.).

[0046] In one embodiment, the ring sensor 116 is coupled to a point on the RF connection part 101, and the bias sensor 118 is coupled to a point on the RF communication medium 103.

[0047] Figure 2 is a diagram of one embodiment of the system 200 to illustrate the details of the resonator circuit 102. The system 200 includes the resonator circuit 102, a ring sensor 116, a bias sensor 118, a bias source system 114, a bias plasma load 202, a ring plasma load 204, a controller 104, a driver 106, and a motor 108. An example of the ring plasma load 204 is an edge ring 126 (Figure 1), and an example of the bias plasma load 202 is a substrate support 124 (Figure 1).

[0048] The resonator circuit 102 includes an inductor L1, a capacitor C1, and a capacitor C2. An example of capacitor C1 is a fixed capacitor, and an example of capacitor C2 is a variable capacitor. Capacitor C2 is coupled in parallel with inductor L1. For example, the first end of inductor L1 is coupled to the first end of capacitor C2 at node N1, and the second end of inductor L1 and the second end of capacitor C2 are coupled to each other at node N2, which is at ground potential.

[0049] Furthermore, the parallel circuit of inductor L1 and capacitor C2 is coupled in series with capacitor C1. For example, node N1 is coupled to the first end of capacitor C1, and the second end of capacitor C1 is coupled to the ring plasma load 204. The stray capacitance between the edge ring 126 and the ground potential is represented as Csh in Figure 2. For example, the ground potential is the potential of the side wall of the plasma chamber 112 (Figure 1). The total capacitance between the edge ring 126 and the stray capacitance is represented as Cring.

[0050] The term Vring represents the voltage (voltage amplitude, etc.) of the ring plasma load 204 associated with the ring plasma load 204. For example, voltage Vring is the voltage at point 206 on the RF connection 101. In this example, the ring sensor 116 is coupled to point 206. Similarly, the term Vbias represents the voltage (voltage amplitude, etc.) of the bias plasma load 202 associated with the bias plasma load 202. For example, voltage Vbias is the voltage at point 208 on the RF communication medium 103. The capacitance between the ring plasma load 204 and the bias plasma load 202 is represented as Cx. For example, the capacitance Cx between the edge ring 226 and the substrate support 224 is formed by the edge ring 226, the substrate support 224, and the gap between the edge ring 226 and the substrate support 224. In another example, the ring plasma load 204 receives a portion of the RF power supplied to the bias plasma load 202 based on the capacitance Cx.

[0051] Upon receiving measurement signals 138 and 136, the processor 120 controls capacitor C2 to achieve the stored capacitance. For example, the processor 120 sends a control signal 105 to the driver 106, and the driver 106 sends a current signal generated based on the control signal 105 to the motor 108. The motor 108 operates to correct the capacitance of capacitor C2 to the stored capacitance. Once the capacitance of capacitor C2 is corrected to the stored capacitance, the impedance of node N1 is corrected by the inductance of inductor L1 and the capacitance of capacitor C2, and RF signal 208 is output at node N1. The impedance of RF signal 208 is corrected by the capacitance of capacitor C1, and RF signal 140 is output. RF signal 140 generates a voltage at the output of the resonator circuit 102, and the RF power of this voltage is applied to the ring plasma load 204 via the RF connection 101 and point 206, uniformly processing the substrate S (Figure 1). Furthermore, since RF power is not actively supplied to the ring plasma load 204, frequency matching and phase matching are not necessary.

[0052] Figure 3A is an embodiment of graph 300 illustrating the control of the capacitance of capacitor C2 to achieve a percentage ratio between voltages Vring and Vbias (e.g., the amplitudes of voltages Vring and Vbias). Graph 300 plots the percentage ratio model data on the first y-axis, the phase difference Φz on the second y-axis, and the capacitance of capacitor C2 on the x-axis. Graph 300 includes plot 302 of the percentage ratio between voltages Vring and Vbias, and plot 304 of the phase difference Φz between the phases of voltages Vring and Vbias. By controlling the capacitance of capacitor C2, the percentage ratio between voltages Vring and Vbias can be varied from 50% to 200% while maintaining a zero phase difference between voltages Vring and Vbias. In this way, the capacitance of capacitor C2 is modified based on measurement signals 138 and 136 to control the amplitude ratio of voltages Vring and Vbias.

[0053] Figure 3B is an embodiment of Graph 320 illustrating the control of the capacitance of capacitor C2 to achieve a percentage ratio between voltages Vring and Vbias (e.g., the amplitudes of voltages Vring and Vbias). In Graph 320, experimental data of the percentage ratio are plotted on the y-axis, and the number of turns of capacitor C2 is plotted on the x-axis. The number of turns of capacitor C2 represents the capacitance of capacitor C2. Based on measurement signals 138 and 136 (Figure 1), the capacitance of capacitor C2 is corrected, and the percentage ratio of the amplitudes of voltages Vring and Vbias is changed.

[0054] Graph 320 includes plots 322 of the percentage ratio between voltages Vring and Vbias, and 324 of the phase difference Φz between the phases of voltages Vring and Vbias. By controlling the capacitance of capacitor C2, the percentage ratio between voltages Vring and Vbias can be varied from 100% to 200%, while the phase difference between voltages Vring and Vbias is kept within a predetermined range (effectively zero, etc.) from zero. An example of the zero to predetermined range is a phase difference in the range of -25 to -50.

[0055] Figure 4 is a diagram of one embodiment of system 400 illustrating the drive-resonator circuit 402. System 400 includes the drive-resonator circuit 402, a plasma chamber 112, a bias sensor 118, a bias source system 114, a controller 104, and a ring sensor 116.

[0056] The drive-resonator circuit 402 includes a matchless plasma source 404 (DirectDrive®, etc.) and a resonator circuit 406. The processor 120 is coupled to the matchless plasma source 404, which is coupled to the resonator circuit 406. The resonator circuit 406 is coupled to the edge electrode 126 via the RF connector 101.

[0057] The processor 120 generates a frequency control signal 408 indicating the operating frequency of the bias source system 114 and transmits the frequency control signal 408 to the bias source system 114. For example, the operating frequency is that of the bias RF generator or bias MPS. For example, the operating frequency may be 400 kHz, 1 MHz, 2 MHz, or 13 MHz.

[0058] Upon receiving the frequency control signal 408, the bias source system 114 generates an RF signal 134 having a frequency indicated by the operating frequency. For example, a bias RF generator generates an RF signal (not shown) having the same frequency as the operating frequency of the bias RF generator and transmits the RF signal to a bias impedance matching circuit. In this example, upon receiving the RF signal, the bias impedance matching circuit generates the RF signal 134 by matching the impedance of a load coupled to the output of the bias impedance matching circuit with the impedance of a source coupled to the input of the bias impedance matching circuit. In this example, the load includes an RF communication medium 103 and a substrate support 124, and the source includes a bias RF generator and an RF cable connecting the bias RF generator to the bias impedance matching circuit. In another example, a signal generator in a bias MPS generates an RF signal (such as a square wave signal or square waveform), which is processed by the remaining components of the bias MPS and a bias reactance circuit (such as a junction box with reactance elements) to generate an RF signal 134 having the same frequency as the operating frequency indicated in the frequency control signal 408.

[0059] Furthermore, the processor 120 generates a control signal 410A indicating that the operating frequency of the MPS 404 is the same as (e.g., equal to) the operating frequency of the bias source system 114. For example, the control signal 410A indicates the same operating frequency as the operating frequency of the bias source system 114. A predetermined frequency (such as the operating frequency of the bias source system 114) is stored in the memory device 122. The processor 120 transmits the control signal 410A to the MPS 404. Upon receiving the control signal 410A, the MPS 404 generates an RF signal 412A (such as a square wave signal or a square waveform) having the same frequency as the operating frequency received in the control signal 410A, and transmits the RF signal 412A to the resonator circuit 406.

[0060] The resonator circuit 406 filters the RF signal 412A to output an RF signal 414, which generates an RF voltage, and this RF voltage is applied to the edge ring 126 via the RF connector 101. For example, the RF signal 414 is not actively supplied to the edge ring 126. Rather, in this example, the RF signal 414 modifies the voltage at the edge ring 126 to correct the amount of RF power that the edge ring 126 receives from the bias source system 114 via the substrate support 124 and the RF communication medium 103.

[0061] When one or more process gases are supplied to the plasma chamber 112 in addition to the RF signals 134 and 414, plasma is generated or maintained within the internal volume portion of the plasma chamber 112. During the period in which the plasma is generated or maintained, the bias sensor 118 generates a measurement signal 136 and the ring sensor 116 generates a measurement signal 138.

[0062] The processor 120 receives the measurement signals 136 and 130 and determines whether there is a phase difference between the phases of the measurement signals 138 and 136. For example, the processor 120 determines a first time when the measurement signal 138 has a first voltage value and a positive slope, and a second time when the measurement signal 138 has a second voltage value and a negative slope after its DC component has been removed. In this example, the processor 120 also determines a primary time when the measurement signal 136 has a first voltage value and a positive slope, and a secondary time when the measurement signal 138 has a second voltage value and a negative slope after its DC component has been removed. Furthermore, in this example, the processor 120 determines that there is a phase difference between the phase of the measurement signal 138 and the phase of the measurement signal 136 by determining whether there is a first time difference between the first time and the primary time, or a second time difference between the second time and the secondary time, or a first time difference and a second time difference. In this example, the first time difference or the second time difference is an example of a phase difference. On the other hand, in this example, the processor 120 determines that there is no phase difference between the phase of the measurement signal 138 and the phase of the measurement signal 136 by determining that there is no time difference between the first time and the primary time, and there is no time difference between the second time and the secondary time.

[0063] If the processor 120 determines that a phase difference exists between the phases of measurement signals 138 and 136, it generates either a control signal 410B containing the phase value of the RF signal 140 generated by the drive-resonator circuit 402, or a phase control signal 401 containing the phase value of the RF signal 403 output from the bias source system 114, or a combination thereof. For example, the processor 120 controls the MPS 404 to correct the phase of the RF signal 140 so that the phase difference between the phases of measurement signals 138 and 136 falls within a predetermined phase range stored in the memory device 122. For example, the processor 120 determines the phase of the RF signal 140 so that the phase difference between the phases of measurement signals 130 and 136 is reduced to zero or to a predetermined value within a predetermined phase range, and embeds the phase value in the control signal 410B. In this example, instead of, or in addition to, controlling the MPS 404 to correct the phase of the RF signal 140, the processor 120 controls the bias source system 114 to correct the phase of the RF signal 134. When the phase of RF signal 134 is corrected, the phase difference between the phases of measurement signals 138 and 136 falls within a predetermined phase range. In this example, the processor 120 controls the phase of RF signal 140 or RF signal 134, or a combination thereof, until the phase difference between the phases of measurement signals 138 and 136 falls within a predetermined phase range.

[0064] Furthermore, upon receiving measurement signals 138 and 136, the processor 120 determines (identifies, for example) a second stored parameter (stored voltage, or the amplitude of the stored voltage, etc.) of the RF signal 412B (square waveform or square wave signal, etc.) output from the MPS 404 based on the voltage amplitudes of the measurement signals 136 and 138, and controls the MPS 404 to achieve the second stored parameter. For example, the processor 120 generates a measurement ratio by calculating the ratio of the first amplitude of measurement signal 138 to the second amplitude of measurement signal 136. In this example, the processor 120 accesses the memory device 122 to identify the correspondence (one-to-one relationship or connection, etc.) between the stored ratio of the ring voltage and the bias voltage and the second stored parameter of the RF signal 412B output from the MPS 404. Furthermore, in this example, the processor 120 compares the stored ratio with the measured ratio and determines that the measured ratio is not within a predetermined ratio range (e.g., equal to) the stored ratio, and decides to control the MPS 404 to achieve the second stored parameter. In this example, the processor 120 decides to control the MPS 404 until the measured ratio is within a predetermined ratio range from the stored ratio to achieve the second stored parameter. Furthermore, in this example, if the processor 120 determines that the measured ratio is within a predetermined ratio range from the stored ratio, it decides not to control the MPS 404 to achieve the second stored parameter. The processor 120 includes the second stored parameter of the RF signal 412B in the control signal 410B.

[0065] Upon receiving the control signal 410B, the MPS 404 corrects the phase and amplitude of the RF signal 412A and outputs an RF signal 412B having a second memory parameter, a phase value for the RF signal 140, and the same frequency as the RF signal 412A. The resonator circuit 406 receives the RF signal 412B, resonates, and outputs the RF signal 140. The voltage of the RF signal 140 is applied from the resonator circuit 406 through the RF connection 101 to the edge ring 126 to uniformly process the substrate S.

[0066] Figure 5A is a diagram of one embodiment of system 540 to illustrate the details of resonator circuit 541, which is an example of resonator circuit 406 (Figure 4). System 540 includes a drive-resonator circuit 543, a ring sensor 116, a bias sensor 118, a bias source system 114, a bias plasma load 202, a ring plasma load 204, and a controller 104. Drive-resonator circuit 543 is an example of drive-resonator circuit 402 (Figure 4). Drive-resonator circuit 543 includes resonator circuit 541 and MPS 404.

[0067] The resonator circuit 541 includes an inductor L1, a capacitor C1, and a fixed capacitor C3. For example, the capacitance of capacitor C3 is equal to the capacitance of capacitor C2 (Figure 2). For another example, the capacitance of capacitor C3 is different from the capacitance of capacitor C2. Capacitor C3 forms a parallel circuit with the series circuit of inductor L1 and MPS404. For example, the first end of inductor L1 is coupled to the first end of capacitor C3 at node Na, and the second end of inductor L1 is coupled to the output of MPS404. The second end of capacitor C3 is coupled to ground potential, and ground potential is coupled to MPS404. Also, node Na is coupled to capacitor C1, and capacitor C1 is coupled to the ring plasma load 204 via RF connection 101 and point 206.

[0068] Upon receiving RF signal 412A, inductor L1 and capacitor C3 filter RF signal 412A to output RF signal 542A. For example, inductor L1 reduces (removes, etc.) one or more harmonic frequencies from RF signal 412A to output RF signal 542A at node Na. Furthermore, upon receiving RF signal 542A from node Na, capacitor C1 changes the impedance of RF signal 542A to output RF signal 414. The RF voltage of RF signal 414 is applied to the ring plasma load 204 for processing the substrate S via RF connection 101 and point 206.

[0069] Similarly, upon receiving RF signal 412B, inductor L1 and capacitor C3 filter RF signal 412B to output RF signal 542B. For example, inductor L1 reduces (e.g., removes) one or more harmonic frequencies from RF signal 412B to output RF signal 542B at node Na. Furthermore, in response to the reception of RF signal 542B from node Na, capacitor C1 changes the impedance of RF signal 542B to output RF signal 140. The RF voltage of RF signal 140 is applied to the ring plasma load 204 via RF connection 101 and point 206 to uniformly process the substrate S.

[0070] Figure 5B is a diagram of one embodiment of system 570 illustrating the use of both capacitor C2 and MPS404 to generate an RF signal 140. System 570 includes a drive-resonator circuit 572, a ring sensor 116, a bias sensor 118, a bias source system 114, a bias plasma load 202, a ring plasma load 204, a controller 104, a driver 106, and a motor 108. Drive-resonator circuit 572 is an example of drive-resonator circuit 402 (Figure 4). Drive-resonator circuit 572 includes resonator circuit 574 and MPS404. Resonator circuit 574 is an example of resonator circuit 406 (Figure 4).

[0071] The resonator circuit 574 includes an inductor L1, a capacitor C1, and a capacitor 2. Capacitor C2 forms a parallel circuit with the series circuit of inductor L1 and MPS404. For example, the first end of inductor L1 is coupled to the first end of capacitor C2 at node Nb, and the second end of inductor L1 is coupled to the output of MPS404. The second end of capacitor C2 is coupled to ground potential, and ground potential is coupled to MPS404. Also, node Nb is coupled to capacitor C1.

[0072] Upon receiving RF signal 412A, inductor L1 modifies the impedance of RF signal 412A and outputs RF signal 576A. For example, inductor L1 reduces (e.g., removes) one or more harmonic frequencies from RF signal 412A and outputs RF signal 576A at node Nb. Furthermore, upon receiving measurement signals 138 and 136, processor 120 controls capacitor C2 to achieve the stored capacitance. For example, processor 120 sends control signal 105 to driver 106, and driver 106 sends a current signal generated based on control signal 105 to motor 108. Motor 108 operates to modify the capacitance of capacitor C2 to the stored capacitance. Once the capacitance of capacitor C2 is modified to the stored capacitance, the impedance of RF signal 576A output from inductor L1 is modified, and RF signal 578A is output from node Nb. The impedance of RF signal 578A is also modified by the capacitance of capacitor C1, and RF signal 140 is output. The RF voltage of the RF signal 414 is applied to the ring plasma load 204 via the RF connector 101 and point 206 from the capacitor C1 to uniformly process the substrate S.

[0073] Furthermore, upon receiving RF signal 412B, inductor L1 modifies the impedance of RF signal 412B and outputs RF signal 576B. For example, inductor L1 reduces (e.g., removes) one or more harmonic frequencies from RF signal 412B and outputs RF signal 576B at node Nb. In addition, capacitor C2 is controlled to achieve a stored capacitance. Once the capacitance of capacitor C2 is modified to the stored capacitance, the impedance of RF signal 576B output from inductor L1 is modified, and RF signal 578B is output from node Nb. The impedance of RF signal 578B is also modified by the capacitance of capacitor C1, and RF signal 580 is output. The RF voltage of RF signal 580 is applied to the ring plasma load 204 from capacitor C1 through RF connection 101 and point 206 to uniformly process the substrate S.

[0074] Furthermore, after the RF signal 580 is generated, during the period in which capacitor C2 is controlled to have the stored capacitance, the bias sensor 118 generates a measurement signal 582 and transmits the measurement signal 582 to the processor 120, and the ring sensor 116 generates a measurement signal 584 and transmits the measurement signal 584 to the processor 120. An example of measurement signal 582 is a voltage signal indicating the voltage at point 206, and an example of measurement signal 582 is a voltage signal indicating the voltage at point 208.

[0075] Furthermore, upon receiving measurement signals 582 and 584, the processor 120 determines (identifies, for example) a second stored parameter (voltage, etc.) of the RF signal 586 (rectangular waveform or square wave signal, etc.) output from the MPS 404 based on the voltage amplitudes of the measurement signals 584 and 582, and controls the MPS 404 to achieve the second stored parameter. For example, the processor 120 generates a measured ratio by calculating the ratio of the first amplitude of the measurement signal 584 to the second amplitude of the measurement signal 582. In this example, the processor 120 accesses the memory device 122 to identify the correspondence (one-to-one relationship or connection, etc.) between the stored ratio of the ring voltage and the bias voltage and the second stored parameter of the RF signal 586 output from the MPS 404. Furthermore, in this example, the processor 120 compares the stored ratio with the measured ratio and determines that the measured ratio is not within a predetermined ratio range (e.g., equal to) the stored ratio, and decides to control the MPS 404 to achieve the second stored parameter. In this example, the processor 120 decides to control the MPS 404 until the measured ratio falls within a predetermined ratio range from the stored ratio to achieve a second stored parameter. The processor 120 generates the second stored parameter of the RF signal 586 and includes it in the control signal 588.

[0076] The processor 120 receives the measurement signals 584 and 582 and determines whether there is a phase difference between the phases of the measurement signals 584 and 582 in the same way that the processor 120 determines whether there is a phase difference between the measurement signals 138 and 136. If it determines that there is a phase difference between the phases of the measurement signals 584 and 582, the processor 120 generates a control signal 588 that includes the phase value of the RF signal 590 output in the drive-resonator circuit 572. For example, the processor 120 determines the phase of the RF signal 590 so that the phase difference between the phases of the measurement signals 584 and 582 falls within a predetermined phase range. For example, the processor 120 determines the phase of the RF signal 590 so that the phase difference between the phases of the measurement signals 584 and 582 is reduced to zero or to a predetermined value within a predetermined phase range, and embeds the phase value in the control signal 588.

[0077] Upon receiving the control signal 588, the MPS 404 modifies the phase and amplitude of the RF signal 412B to output an RF signal 586 having a second stored parameter, a phase value for the RF signal 590, and the same frequency as the RF signal 412A. The resonator circuit 574 receives the RF signal 586, resonates, and outputs the RF signal 590. For example, upon receiving the RF signal 586, inductor L1 modifies the impedance of the RF signal 586 to output the RF signal 592. As an example, inductor L1 reduces (e.g., removes) one or more harmonic frequencies from the RF signal 586 to output the RF signal 592 at node Nb. Furthermore, capacitor C2 is controlled to achieve the stored capacitance. Once the capacitance of capacitor C2 is modified to the stored capacitance, the impedance of the RF signal 592 output from inductor L1 is modified, and the RF signal 578C is output from node Nb. Furthermore, the impedance of RF signal 578C is corrected by the capacitance of capacitor C1, and RF signal 590 is output.

[0078] The RF voltage of RF signal 590 is applied to the edge ring 126 via the RF connector 101 from the resonator circuit 574 to uniformly process the substrate S. In this way, the amplitude, phase, or combination thereof of RF signal 412B is modified to uniformly process the substrate S while maintaining the stored capacitance of capacitor C2.

[0079] Figure 6 is a diagram of one embodiment of system 600 illustrating the details of MPS602, an example of MPS404 (Figure 4). System 600 includes controller 104 and MPS602. MPS602 includes input section 604 and output section 606. Input section 604 includes MPS controller 608, signal generator 610, and gate driver system 612. Output section includes RF amplification circuit 614 and DC voltage source system 616. DC voltage source system 616 may be referred to as DC rail in this specification.

[0080] An example of a signal generator 610 is a square wave oscillator, which generates a square wave signal 618 (e.g., a square waveform), which is a digital waveform or pulse train. The square waveform periodically pulses and has square pulses. For example, the square waveform transitions between a first logic level (e.g., high or 1) and a second logic level (e.g., low or zero) between each cycle of the clock signal. The signal generator 306 generates the square wave signal 618 at the operating frequency of the MPS 602. An example of a gate driver system 612 is a combination of a pass-through gate and a NOT gate. An example of an RF amplifier circuit 614 is a half-bridge circuit. For example, the half-bridge circuit has a first transistor and a second transistor, both of which are coupled to each other at the output 620 of the MPS 602. To illustrate further, the drain terminal of the first transistor is coupled to the DC voltage source system 616, the source terminal of the first transistor is coupled to the drain terminal of the second transistor via output 620, and the source terminal of the second transistor is coupled to ground potential. Also, the through gate of the gate driver system 612 is coupled to the gate of the first transistor, and the NOT gate of the gate driver system 612 is coupled to the gate of the second transistor. Output 620, which is the output of the RF amplifier circuit 614, is located between the source terminal of the first transistor and the drain terminal of the second transistor.

[0081] The processor 120 is coupled to the MPS controller 608 via a transfer cable 622 (such as a serial transfer cable, parallel transfer cable, or Universal Serial Bus (USB) cable). The MPS controller 608 is coupled to the signal generator 610. The signal generator 610 is coupled to the inputs of the pass-through gate and NOT gate of the gate driver system 612. The outputs of the pass-through gate and NOT gate are coupled to the FET circuit 614. The FET circuit 614 is coupled to the DC voltage source system 616, and its output 620 is coupled to the resonator circuit 406.

[0082] The MPS controller 608 receives control signal 624 from the processor 120 via transfer cable 622. Control signal 624 is an example of control signal 410A, 410B, or 588 (Figures 4 and 5B). Upon receiving control signal 624, the MPS controller 608 identifies from the control signal 624 one or more of the frequency, amplitude, and phase of the RF signal 626 generated by the MPS 602. RF signal 626 is an example of RF signal 412A, 412B, or 586 (Figure 5B). The frequency of the generated RF signal 626 is the same as the operating frequency of the signal generator 610.

[0083] The MPS controller 608 provides the signal generator 610 with the frequency and phase of the generated RF signal 626. Based on the amplitude of the generated RF signal 626, the MPS controller 608 also generates a shaping control signal 601 indicating the amplitude and transmits the shaping control signal 601 to the DC voltage source system 616.

[0084] Upon receiving the frequency and phase of the generated RF signal 626, the signal generator 610 generates a square wave signal 618 having that frequency and phase, and provides the square wave signal 618 to the gate driver of the gate driver system 612. The pass-through gate of the gate driver system 612 passes the amplitude of the square wave signal 618 and outputs a square wave signal 628 having the frequency and phase indicated in the control signal 624. The NOT gate of the gate driver system 612 inverts the square wave signal 618 and outputs an inverted signal 630, which is also a square wave signal. The inverted signal 630 has the same frequency as indicated in the control signal 624 and a phase shifted by 180 degrees from the square wave signal 628. An additional dead time is provided between signals 628 and 630 to avoid a shoot-through fault.

[0085] Signals 628 and 630 are provided to the gate terminal of the RF amplifier circuit 614. The first transistor of the RF amplifier circuit 614 is turned on and off according to the square wave signal 628, and the second transistor of the RF amplifier circuit 614 is turned on and off according to the inverting signal 630, so that the amplified square wave signal is output at the output 620 of the RF amplifier 614. The amplified square wave signal is pulsed out to have the frequency and phase indicated in the control signal 624.

[0086] Upon receiving the shaping control signal 601, the DC voltage source system 616 provides the RF amplifier circuit 614 with a voltage signal 632 based on the amplitude indicated in the shaping control signal 601. The voltage signal 632 has the amplitude indicated in the shaping control signal 601. The power of the amplified square wave signal output from the RF amplifier circuit 614 is pulsed out so that it has the amplitude of the voltage signal 632, the frequency indicated in the control signal 624, and the phase indicated in the control signal 624.

[0087] Figure 7A is an embodiment of Graph 700 illustrating that the ratio of the Vring amplitude to the Vbias amplitude is controlled by modifying (increasing or decreasing, etc.) the amplitude of the RF signal 626 (Figure 6). Graph 700 includes a plot 702 of the ratio of the Vring amplitude to the Vbias amplitude on the y-axis and the amplitude of the power of the RF signal 626 output from MPS 602 (Figure 6) on the x-axis. By increasing the amplitude of the power of the RF signal 626 output from MPS 602, the ratio of the Vring amplitude to the Vbias amplitude increases, and by decreasing the amplitude of the power of the RF signal 626, the ratio of the Vring amplitude to the Vbias amplitude decreases.

[0088] Figure 7B is an embodiment of Graph 710 illustrating that the phase delay between the Vring phase and the Vbias phase is controlled by modifying (increasing or decreasing, etc.) the phase delay between the RF signal 134 and the RF signal 626 (Figure 6) generated by the bias source system 114 (Figure 1). Graph 710 includes a plot 712 of the phase delay on the y-axis between the Vring phase and the Vbias phase and the phase delay on the x-axis between the RF signal 134 and the RF signal 626 generated by the bias source system 114. As shown, increasing the phase delay between the Vring phase and the Vbias phase increases, and decreasing the phase delay between the Vring phase and the Vbias phase decreases.

[0089] Figure 7C is an embodiment of Graph 720 illustrating that the RF power output from MPS602 (Figure 6) is a function of the phase delay between the phase of RF signal 134 (Figure 1) generated by the bias source system 114 (Figure 1) and the phase of RF signal 626 (Figure 6). Graph 720 includes a plot 722 of RF power on the y-axis output from MPS602 and the phase delay on the x-axis between the phase of RF signal 134 and the phase of RF signal 626. As shown in plot 720, as the phase delay increases, the RF power output from MPS602 decreases, and as the phase delay decreases, the RF power output from MPS602 increases up to point 724 on plot 722. After point 724, as the phase delay decreases further, the RF power output from MPS602 decreases.

[0090] Furthermore, the MPS404 (Figure 4) can draw power from the resonator circuits 541 or 572 (Figures 5A and 5B). For example, if the voltage of the DC rail (Figure 6) is lower than the output voltage of the MPS404, the DC rail is charged through the first transistor, which is the top transistor in the RF amplifier circuit 614 (Figure 6), when the first transistor is turned on, since the resonator circuits 541 or 572 are powered by the bias source system 114. As a result, the output power from the MPS404 becomes negative. This effect can also be used to further control the ring voltage with additional circuitry on the DC rail that controls power dissipation and / or shunting.

[0091] The embodiments described herein may be implemented in a variety of computer system configurations, including handheld hardware units, microprocessor systems, microprocessor-based or programmable consumer electronics, minicomputers, mainframe computers, and the like. The embodiments can also be implemented in a distributed computing environment in which tasks are performed by remote processing hardware units linked over a network.

[0092] In some embodiments, the controller described herein is part of a system which may be part of the examples described above. Such a system includes semiconductor processing equipment such as one or more processing tools, one or more chambers, one or more processing platforms, and / or specific processing components (wafer pedestals, gas flow systems, etc.). These systems are integrated with electronic equipment for controlling the operation of the system before, during, and after processing semiconductor wafers or substrates. This electronic equipment is referred to as a “controller” capable of controlling various components or sub-components of one or more systems. Depending on the processing requirements and / or the type of system, the controller is programmed to control any of the processes disclosed herein, such as the delivery of process gases, temperature setting (e.g., heating and / or cooling), pressure setting, vacuum setting, power setting, RF generator setting, RF matching circuit setting, frequency setting, flow rate setting, fluid delivery setting, position and operation setting, loading and unloading of wafers to and from tools, and loading and unloading of wafers to and from other transport tools and / or load locks coupled to or interlocked with the system.

[0093] Broadly speaking, in various embodiments, a controller is defined as an electronic device having various integrated circuits, logic, memory, and / or software that, for example, receive and issue commands, control operations, enable cleaning operations, enable endpoint measurements, etc. Integrated circuits include chips in the form of firmware that store program instructions, chips defined as digital signal processors (DSPs), ASICs, PLDs, and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions are instructions communicated to the controller in the form of various individual settings (or program files) that define parameters, factors, variables, etc., for performing a specific process on or for a semiconductor wafer or for a system. In some embodiments, program instructions are part of a recipe determined by a process engineer to achieve one or more processing steps during the manufacture of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or wafer molds.

[0094] In some embodiments, the controller is part of a computer integrated with the system, coupled to the system, or otherwise networked to the system, or a combination thereof. For example, the controller is in the “cloud” or all or part of a host computer in a manufacturing plant that enables remote access to wafer processing. By enabling remote access to the system, the computer can monitor the current progress of manufacturing operations, review the history of past manufacturing operations, verify trends or performance criteria from multiple manufacturing operations, modify parameters of the current process, set processing steps following the current process, or start a new process.

[0095] In some embodiments, a remote computer (e.g., a server) provides process recipes to the system via a network including a local network or the Internet. The remote computer includes a user interface that allows input or programming of parameters and / or settings, which are then transmitted from the remote computer to the system. In some examples, the controller receives instructions in the form of data defining parameters, factors, and / or variables for each processing step performed during one or more operations. It should be understood that these parameters, factors, and / or variables are specific to the type of process being performed and the type of tool to which the controller is configured to interface or control. Thus, as described above, the controllers are distributed, for example, by including one or more separate controllers that are networked together and work toward a common purpose, such as the processes and controls described herein. An example of controllers distributed for such purposes is one or more integrated circuits on a chamber that are combined to control a process on the chamber and communicate with one or more integrated circuits that are remotely located (e.g., at the platform level or as part of a remote computer).

[0096] Exemplary systems to which the Method is applied in various embodiments include, but are not limited to, plasma etching chambers or modules, deposition chambers or modules, spin rinse chambers or modules, metal plating chambers or modules, clean chambers or modules, bevel edge etching chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, atomic layer deposition (ALD) chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, track chambers or modules, and any other semiconductor processing systems associated with or used in the manufacturing and / or production of semiconductor wafers.

[0097] It should be further noted that in some embodiments, the above operations are applicable to various types of plasma chambers (e.g., plasma chambers containing inductively coupled plasma (ICP) reactors, capacitively coupled plasma (CCP) chambers, transformer-coupled plasma chambers, conductive tools, dielectric tools, plasma chambers containing electron cyclotron resonance (ECR) reactors, etc.). For example, one or more RF generators are coupled to inductors within an ICP reactor. Examples of inductor shapes include solenoids, dome-shaped coils, flat coils, etc.

[0098] As described above, depending on one or more process steps performed by the tool, the host computer communicates with one or more other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools installed throughout the factory, the main computer, other controllers, or tools used for material handling to load and unload wafer containers to and from tool locations and / or load ports within the semiconductor production plant.

[0099] In consideration of the embodiments described above, it should be understood that some embodiments employ various operations of computer implementations, including data stored in a computer system. These operations physically manipulate physical quantities. Any operations that form part of the embodiments described herein are useful mechanical operations.

[0100] Some embodiments also relate to hardware units or devices for performing these operations. The devices are specifically configured for special-purpose computers. If defined as a special-purpose computer, this computer performs other processing, program execution, or routines that are not part of the special purpose, while remaining operational for that special purpose.

[0101] In some embodiments, the operations may be stored in computer memory or cache, or processed by a computer selectively launched or configured by one or more computer programs retrieved via a computer network. When data is retrieved via a computer network, this data may be processed by other computers on the computer network, for example, a cloud of computing resources.

[0102] In one or more embodiments, the code can also be created as computer-readable code on a non-temporary computer-readable medium. The non-temporary computer-readable medium is a data storage hardware unit (e.g., a memory device) that stores the data, which is then read by a computer system. Examples of non-temporary computer-readable mediums include hard drivers, network-attached storage (NAS), read-only memory (ROM), random access memory (RAM), compact disc-ROMs (CD-ROMs), writable CDs (CD-Rs), rewritable CDs (CD-RWs), magnetic tape, and other optical and non-optical data storage hardware units. In some embodiments, the non-temporary computer-readable medium includes computer-readable tangible media distributed via a network-connected computer system so that the computer-readable code is stored and executed in a distributed manner.

[0103] Although the above method operations were described in a specific order, it should be understood that in various embodiments, other housekeeping operations may be performed between the operations, the method operations may be timed to occur at slightly different times, they may be distributed in a system that allows the method operations to occur at various intervals, or they may be performed in a different order than described above.

[0104] It should be further noted that in certain embodiments, one or more features from any of the embodiments described above may be combined with one or more features from any of the other embodiments without departing from the scope of the various embodiments described herein.

[0105] While the embodiments described above have been explained in some detail for clarity, it will be apparent that certain changes and modifications can be made within the scope of the appended claims. Therefore, these embodiments are considered illustrative and not restrictive, and are not limited to the details shown herein.

Claims

1. A system, wherein the system A drive-resonator circuit configured to be coupled to the edge ring of a plasma chamber, wherein the edge ring is configured to surround the substrate support of the plasma chamber, A controller coupled to the aforementioned drive-resonator circuit, A first measurement signal is received from the bias sensor. A second measurement signal is received from the ring sensor. A system including a controller configured to control the parameters of the drive-resonator circuit based on the first measurement signal and the second measurement signal to achieve uniformity in processing across the entire substrate.

2. The system according to claim 1, The aforementioned drive-resonator circuit, Matchless plasma source, A system comprising a resonant circuit coupled to the aforementioned matchless plasma source.

3. The system according to claim 2, The aforementioned resonant circuit, An inductor coupled in series with the aforementioned matchless plasma source to form a series circuit, A first capacitor, which is a variable capacitor, is coupled in parallel to the series circuit of the inductor and the matchless plasma source, A system comprising the inductor and a second capacitor coupled to the first capacitor and the edge ring.

4. The system according to claim 3, The parameter is the capacitance of the first capacitor, A system in which, in order to control the parameters of the drive-resonator circuit and achieve the uniformity, the controller is configured to modify the capacitance of the first capacitor until resonance is achieved between the inductive impedance of the resonator circuit and the capacitive impedance of the capacitance of the edge ring.

5. The system according to claim 3, The parameter is the capacitance of the first capacitor, In order to control the parameters of the drive-resonator circuit and achieve the uniformity, the controller controls the following: A system configured to correct the capacitance of the first capacitor until the ratio of the amplitude of the second measurement signal to the amplitude of the first measurement signal falls within a predetermined range.

6. The system according to claim 1, In order to control the parameters of the drive-resonator circuit and achieve the uniformity, the controller controls the following: The matchless plasma source of the drive-resonator circuit is controlled to operate at the same operating frequency as the bias source. The phase of the second measurement signal and the phase of the first measurement signal are predetermined. A system configured to correct the phase of a radio frequency signal output from the matchless plasma source until it falls within a phase range.

7. The system according to claim 6, In order to control the parameters of the drive-resonator circuit and achieve the uniformity, the controller controls the following: A system configured to correct the amplitude of the radio frequency signal output from the matchless plasma source, wherein the frequency and phase are corrected first before the amplitude is corrected.

8. It is a method, Receiving a first measurement signal from the bias sensor, Receiving a second measurement signal from the ring sensor, This includes achieving uniformity during processing across the entire substrate by controlling the parameters of the drive-resonator circuit based on the first measurement signal and the second measurement signal, The aforementioned drive-resonator circuit is configured to be coupled to the edge ring of the plasma chamber, The method wherein the edge ring is configured to surround the substrate support of the plasma chamber.

9. The method according to claim 8, The aforementioned drive-resonator circuit, Matchless plasma source, A method comprising a resonator circuit coupled to the matchless plasma source.

10. The method according to claim 9, The aforementioned resonant circuit, An inductor coupled in series with the aforementioned matchless plasma source to form a series circuit, A first capacitor, which is a variable capacitor, is coupled in parallel to the series circuit of the inductor and the matchless plasma source, A method comprising: a second capacitor coupled to the inductor and the first capacitor, and coupled to the edge ring.

11. The method according to claim 10, The parameter is the capacitance of the first capacitor, The uniformity can be achieved by controlling the parameters of the drive-resonator circuit. The ratio of the amplitude of the second measurement signal to the amplitude of the first measurement signal is predetermined. A method comprising modifying the capacitance of the first capacitor until it falls within a specified range.

12. The method according to claim 10, The uniformity can be achieved by controlling the parameters of the drive-resonator circuit. By controlling the matchless plasma source of the aforementioned drive-resonator circuit, it is made to operate at the same operating frequency as the bias source. The phase of the second measurement signal and the phase of the first measurement signal are predetermined. A method comprising correcting the phase of a radio frequency signal output from the matchless plasma source until it falls within a phase range.

13. The method according to claim 12, The uniformity can be achieved by controlling the parameters of the drive-resonator circuit. A method comprising correcting the amplitude of the radio frequency signal output from the matchless plasma source, wherein the frequency correction and the phase correction are performed before the amplitude correction is performed.

14. A system, wherein the system A resonator circuit configured to be coupled to the edge ring of a plasma chamber, wherein the edge ring is configured to surround the substrate support of the plasma chamber, A controller coupled to the aforementioned resonant circuit, A first measurement signal is received from the bias sensor. A second measurement signal is received from the ring sensor. A system including a controller configured to control the parameters of the resonator circuit based on the first measurement signal and the second measurement signal to achieve uniformity during processing across the entire substrate.

15. The system according to claim 14, The aforementioned resonant circuit, Inductor and A first capacitor, which is a variable capacitor, is coupled in parallel to the inductor, A system comprising the inductor and a second capacitor coupled to the first capacitor and the edge ring.

16. The system according to claim 15, The parameter is the capacitance of the first capacitor, A system in which, in order to control the parameters of the resonator circuit and achieve the uniformity, the controller is configured to modify the capacitance of the first capacitor until resonance is achieved between the inductive impedance of the resonator circuit and the capacitive impedance of the capacitance of the edge ring.

17. The system according to claim 15, The parameter is the capacitance of the first capacitor, In order to control the parameters of the resonator circuit and achieve the uniformity, the controller controls the following: The ratio of the amplitude of the second measurement signal to the amplitude of the first measurement signal is predetermined. A system configured to correct the capacitance of the first capacitor until it falls within a specified range.

18. The system according to claim 14, A system in which the first measurement signal is a voltage signal and the second measurement signal is a voltage signal.

19. The system according to claim 14, The system is characterized in that the edge ring is not supplied with radio frequency power from a radio frequency generator, while the substrate support is supplied with radio frequency power from a bias source system.

20. The system according to claim 14, The edge ring is configured to be coupled to the ring sensor, A system configured such that the substrate support is coupled to the bias sensor.

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