Common-mode voltage controller for self-boosted push-pull amplifiers.

Abstract

Various implementations include a system for amplifying an input signal. In a particular implementation, the system includes a common-mode voltage controller configured to receive the input signal and output a pair of conditioned signals, a modulator configured to generate a pair of pulse-width modulation (PWM) signals in response to the conditioned signals, and a self-boosting push-pull amplifier configured to receive the PWM signals and generate an amplified output, the self-boosting push-pull amplifier configured to generate a differential-mode voltage representing an amplified version of the input signal, wherein the conditioned audio signal generated by the common-mode voltage controller includes a dynamically adjusted gain and duty cycle offset that causes the self-boosting push-pull amplifier to operate at a reduced common-mode voltage.

Description

[Technical field]

[0001] The present disclosure relates generally to techniques for reducing power dissipation in self-boosted amplifiers, and more particularly to a common-mode voltage controller for a fourth-order self-boosted push-pull amplifier. [Background technology]

[0002] Switching audio amplifiers can be used to drive speakers for audio reproduction. For example, a Class D amplifier is an amplifier in which amplifying components (e.g., transistors) act as electronic switches that rapidly switch forward and backward between various power rails to encode the audio signal into a pulse train. Once the audio signal has been processed to remove high frequency components, it can be output to a loudspeaker for audio sound reproduction.

[0003] There are various types of class D amplifiers, all derived from a basic switching converter topology, typically of various orders. The order indicates the number of passive components with energy storage capabilities inside the basic converter circuit. Examples of second-order topologies are buck, boost, and buck-boost converters. Examples of fourth-order topologies include Cuk, SEPIC, and Zeta converters. Class D amplifiers are created by using such converters and regulating it by manipulating the duty cycle of the voltage train. Class D amplifiers offer high conversion efficiency if the transistors never conduct current and at the same time have a voltage across them. The only losses that occur are the result of non-ideal transistor switching behavior and non-idealities of the components in the form of parasitic resistances. Summary of the Invention

[0004] All examples and features mentioned below can be combined in any technically possible manner.

[0005] A system is provided that includes a self-boosting push-pull amplifier, and a particular implementation includes a common-mode voltage controller configured to receive an input signal, such as an audio signal, and output a pair of conditioned signals; a modulator that generates a pair of pulse width modulation (PWM) signals in response to the conditioned signals; and a self-boosting push-pull amplifier configured to receive the PWM signals and generate an amplified output, the self-boosting push-pull amplifier configured to generate a differential mode voltage that represents an amplified version of the input signal, where the conditioned signal generated by the common-mode voltage controller includes a dynamically adjusted gain and duty cycle offset that causes the self-boosting push-pull amplifier to operate at a reduced common-mode voltage.

[0006] In an additional implementation, a common-mode voltage controller for a self-boosted push-pull amplifier is provided that processes an input signal, such as an audio signal, according to a method that includes receiving an input signal, calculating a maximum duty cycle of the input signal, calculating a maximum adjusted duty cycle and a duty cycle offset of the input signal, dynamically adjusting a gain of the input signal in response to the maximum duty cycle and the maximum adjusted duty cycle to generate a gain adjusted signal, and applying a duty cycle offset to the gain adjusted signal to generate a pair of regulated signals, the regulated signals configured to reduce the common-mode voltage of the self-boosted push-pull amplifier while keeping the differential mode voltage substantially unchanged.

[0007] In some implementations, the input signal comprises a pulse code modulation (PCM) signal and the conditioned signal comprises a modified PCM signal, hi further implementations, the input signal comprises an analog signal.

[0008] In some aspects, the common-mode voltage controller includes a system that evaluates an input signal to determine a detected level; a standard duty cycle calculator that determines a maximum duty cycle associated with the input signal in response to the detected level, a defined supply voltage, and a defined maximum output power; and an adjusted duty cycle calculator that determines a maximum adjusted duty cycle and a duty cycle offset in response to the detected level, the defined supply voltage, the defined maximum output power, and the defined minimum phase voltage value.

[0009] In an additional aspect, the common-mode voltage controller includes a gain adjustment system for dynamically adjusting the gain of the input signal in response to the maximum duty cycle and the maximum adjusted duty cycle to ensure that the differential mode voltage continues to represent the input signal.

[0010] In a particular implementation, a duty cycle offset is applied to the gain adjusted signal output from the gain adjustment system to generate a pair of adjusted signals.

[0011] In some aspects, the gain adjusted signal is calculated according to the formula: Gain Adjusted Signal=(Adjusted Maximum Duty Cycle)-0.5 / (Maximum Duty Cycle)-0.5.

[0012] In some implementations, the self-boosting push-pull amplifier includes halves of two fourth-order zeta converters creating an eighth-order differential amplifier.

[0013] In other implementations, the regulated signal generated by the common-mode voltage controller further includes a dynamically adjusted duty cycle.

[0014] Two or more of the features described in this disclosure, including the features described in this Summary section, may be combined to form implementations not specifically described herein.

[0015] The details of one or more implementations are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will become apparent from the description and drawings, and from the claims. [Brief description of the drawings]

[0016] [Figure 1] 1A-1D depict block diagrams of amplifier systems in accordance with various implementations. [Diagram 2] 1A-1D depict block diagrams of amplifier systems including zeta amplifiers according to various implementations. [Diagram 3] 1 illustrates a common-mode voltage controller according to various implementations. [Figure 4] 13 depicts equations for calculating maximum and minimum duty cycles without minimizing phase voltages according to various implementations. [Diagram 5] 13 depicts equations for calculating maximum and minimum duty cycles with minimization of phase voltages and common-mode duty cycle offsets according to various implementations. [Figure 6] 13A-13D depict graphs of uncompensated and compensated responses according to various implementations. [Figure 7] 13 illustrates a graph showing the effect of Av responses of different level detectors according to various implementations. [Figure 8] 13A-13D depict graphs illustrating peak detector waveforms and associated single-ended and differential signal outputs with and without common mode conditioning according to various implementations.

[0017] It should be noted that the drawings of the various implementations are not necessarily to scale. The drawings are intended to depict only typical aspects of the disclosure and therefore should not be considered as limiting the scope of the implementations. In the drawings, like numbering represents like elements between the drawings. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] Various implementations describe an amplifier system that includes a self-boosting push-pull amplifier and a common-mode voltage controller that operates the self-boosting push-pull amplifier at a reduced common-mode voltage. It should be noted that while the various implementations described herein are directed to amplifying audio signals, the solution may be applied to other types of signals as well, such as motor control signals, power inverter signals, other control signals, and the like.

[0019] A switching amplifier can be formed by taking a basic converter and placing it between a power source and a load. Amplification is the action of modulating the duty cycle, such as to vary the output voltage over time in a suitable manner, but with a higher voltage and / or current to the load. The duty cycle, and therefore the time variation of the output signal, is determined by the input signal. In the case of an audio amplifier, this input signal is an audio waveform. Typically, the purpose of an amplifier is to increase the voltage and / or current amplitude of the input signal to an output voltage and / or current amplitude, which is ideally higher by a fixed factor, also called the gain.

[0020] Since the power supply voltage level limits the available output power, and necessarily the component operating voltages and currents for component reliability purposes, circuit combination techniques are used to increase the gain beyond the levels achievable by just one basic converter topology circuit. When a higher output voltage is required, one common approach is to use two basic converters and place the load between the outputs of these two blocks. The input signals for each circuit are the same, even considering the duty cycle in opposite phases. This is often referred to as a push-pull or two-phase configuration. More than two blocks can be used as well, leading to three-phase, four-phase and higher-phase converters, with appropriately phase-shifted input signals. The output voltage capability is increased without increasing the stress on the components of the basic circuit.

[0021] If current amplification is required, a parallel configuration of the basic converter blocks is used and the input signals are kept in phase. Thereby, the output current capability is increased without changing the internal stress of the basic circuits. For higher voltage and / or current drive capabilities of the amplifiers, combination techniques can be used. If the converter is used with energy storage capabilities, e.g., secondary boost converters or higher order converters with associated boost capabilities, such as quartic Cuk or Zeta converters, these combination techniques are still insufficient to prevent overstressing of the internal components of the converter. Adding more basic circuits and / or using higher capacity components may not be economically feasible.

[0022] The failure rate of electronic components is usually strongly related to the thermal stress on the components, as well as the peak voltage stress across and current stress through those components. The exposure time of the components to these stresses is also a strong factor on the failure rate of the components. In the case of an audio amplifier, the signal being amplified is an audio signal, which may vary significantly in signal amplitude over time. Audio signals have low average levels over long periods of time when normalized to a certain maximum level, e.g., 1, and compared to each other, e.g., an entire audio track several minutes long typically contains repeated episodic, temporary high peaks ranging from 1 millisecond (ms) to 100 ms. The ratio of the audio average voltage level to the peak voltage level is called the crest factor, and is typically expressed in decibels (dB). Large samples of audio signals show that the crest factor typically varies from 10 to 20 dB. When the crest factors of these audio files are compared over short time windows ranging from 1 to 100 ms within the audio files themselves, a much larger range of crest factors is observed, typically from 3 to 24 dB. The observed median crest factor lies in the middle, e.g., around 15 dB, while higher and lower crest factors outside the range are statistically rarely encountered.

[0023] Thus, the amplifier statistically spends very little time at its output peak voltage. The components are stressed very rarely over the duration of a typical audio file at maximum playback volume. Furthermore, it can be concluded that in a boost amplifier circuit topology, boost or high supply voltage is only needed very rarely. During the time when a low output voltage is needed, the supply voltage can be momentarily reduced, thereby further reducing the stress on the amplifier components. Solutions have been provided in the past that take advantage of this feature. Examples that can vary their output level based on the need to be driven by the audio signal are combinations of power supplies, boost or not. The supply can be adjusted in a stepped manner, typically referred to as a class G amplifier, or in a continuously variable manner, typically referred to as a class H amplifier. Many variations of such topologies have been shown over time. They are typically all accompanied by the need for some time offset to increase or decrease the supply in preparation for the signal peaks that need to be generated at the load.

[0024] In a self-boosting push-pull amplifier, as described, for example, in U.S. Patent Application Publication No. 2020 / 0021256 by Terwal et al., “Self-Boosting Amplifier,” and U.S. Patent No. 4,186,437 by Cuk, “Push Pull Switching Power Amplifier,” both of which are incorporated herein by reference, the voltage and current boosting functions are an integrated function of the amplifier circuit topology and cannot be isolated, as compared to the cascaded arrangement of power amplifiers. This type of amplifier can readily generate very high output voltages. In fact, the output voltage of a basic zeta converter can be higher and lower than the power supply voltage. The same is true for buck-boost, Cuk, or SEPIC converters, although the output polarity is opposite to the power supply with respect to ground.

[0025] At the same time, the internal voltages across the components as well as the currents through the components can become very high at very high duty cycle levels, e.g., high peak output voltages and currents to the load. As a result, the components are stressed at these peak outputs of the amplifier signal. In Zeta amplifiers, for example, it is observed that the idle common-mode output voltages on the positive and negative outputs are near voltage levels, on the order of a few millivolts or even 0 volts, even when the differential voltage output is very low.

[0026] The implementations provided herein reduce this common-mode voltage in a dynamic manner, thereby reducing stress and losses on the internal components of the power stage of an autoboosting push-pull amplifier (such as Zeta). Depending on the audio input signal, the internal switch duty cycles of the positive and negative sides of the Zeta push-pull amplifier are manipulated so that the required differential output is generated while at the same time the common-mode level of the amplifier is just high enough to support the required differential output. If more differential output is required, the common-mode voltages of the positive and negative sides are dynamically increased at the same time to support the required differential signal. As a result, the internal stress and heat losses of the amplifier power stage can be minimized.

[0027] Because audio signals are statistically likely to be at low power levels and only occasionally spike to high peak levels, amplifier size can be reduced based on average power dissipation and thermal considerations, while reducing the internal voltage and current stresses within the amplifier power stage results in a more reliable design.

[0028] Various implementations include reducing MOSFET conduction and MOSFET switching losses by lowering the MOSFET drain-source peak voltage and drain-source current through lowering the output common-mode voltage. The common-mode voltage is lowered by adjusting the duty cycle control law in such a way that it does not affect the target differential output voltage while at the same time lowering the common-mode output voltage as much as possible. This adjustment is a real-time adjustment based on the instantaneous audio input voltage and instantaneous battery voltage present. Readjustment can be done every switching cycle to take full advantage of the potential power loss reduction for the entire amplifier. The adjustment is done in such a way that no input audio delay is needed to allow the power amplifier to stabilize itself in preparation for outputting high peak voltages, as is typically required for Class G and Class H type designs.

[0029] 1 illustrates an exemplary amplifier system including a common-mode voltage controller 100, a modulator (Mod) 106, and a self-boosting push-pull amplifier 108. The implementation of the common-mode voltage controller 100 includes a gain adjustment system 102 and a standard and adjusted duty cycle calculator 104 configured to process an input audio signal 112 and output a pair of adjusted audio signals 114. The adjusted audio signal 114 may include, for example, a pulse-width modulated audio signal, a pulse code modulation (PCM) signal, a pulse density modulated (PDM) signal, or an analog signal. The pair of adjusted audio signals 114 are fed to a modulator 106, such as an AD modulator, a BD modulator, or any other similar type of modulator. The modulator 106 generates a pair of pulse-width modulated (PWM) signals 116 in response to the adjusted audio signal 114. The PWM signal 116 is fed to a self-boosting push-pull amplifier 108, which includes a set of converters 110 configured to generate an amplified audio output to an acoustic transducer 118, such as a speaker. The self-boosting push-pull amplifier 108 generates a differential mode voltage that represents an amplified version of the audio signal 112. The conditioned audio signal 114 generated by the common-mode voltage controller 100 includes a dynamically adjusted gain and duty cycle offset that causes the self-boosting push-pull amplifier 108 to operate at a reduced common-mode voltage.

[0030] A standard duty cycle calculator (in 104) determines a maximum duty cycle associated with the audio signal 112 in response to the detected audio level Av, the defined supply voltage, and the defined maximum power. An adjusted duty cycle calculator (in 104) determines a maximum adjusted duty cycle and a duty cycle offset in response to the detected audio level Av, the defined supply voltage, the defined maximum power, and the defined minimum phase voltage value. The gain adjustment system 102 then dynamically adjusts the gain of the audio signal 112 in response to the calculated maximum duty cycle and the calculated maximum adjusted duty cycle to ensure that the differential mode voltage continues to represent the audio signal 112. The calculated duty cycle offset is applied to the gain adjusted signal output from the gain adjustment system 102 to generate a pair of adjusted audio signals 114.

[0031] 2 depicts an exemplary implementation in which a zeta amplifier 200 is utilized as a self-boosting push-pull amplifier and includes two stages 202, 204. Similar to the embodiment of FIG. 1, an input audio signal 212 is fed to a common mode voltage (CMV) controller / modulator 214, which outputs a pair of conditioned signals to the zeta amplifier 200, which then outputs an amplified signal to an acoustic transducer 230. Each stage 202, 204 includes a pair of MOSFETs and power storage components (e.g., 220, 222) labeled in stage 202. By forming a push-pull arrangement, a combination of differential and common mode voltages on the output node voltages A and B is essentially created. The differential voltage V(A)-V(B), if present, is the amplified audio signal applied to the acoustic transducer 230. The common mode voltage (V(A)+V(B)) / 2 is the result of the output seen as a voltage level relative to the battery input controlled by the switch duty cycle of the Zeta converter.

[0032] 3 shows a detailed block diagram of a common-mode voltage controller 300 and a modulator 320 configured to adjust the individual MOSFET control duty cycles generated within a Zeta (or other auto-boosting push-pull) amplifier control block. In this embodiment, an audio signal 312 is input to the common-mode voltage controller 300 in the form of digital pulse code modulation (PCM). However, it is understood that an analog implementation may be implemented as well. Furthermore, it is understood that the embodiment shown in FIG. 3 represents one possible implementation for dynamically adjusting gain to operate a self-boosting push-pull amplifier with reduced common-mode voltage.

[0033] As shown, the input audio 312 is processed by an envelope detector 302 to generate an audio level (Av) that is fed to two different parameter calculators: a standard duty cycle calculator 304 and an adjusted duty cycle calculator 306. It should be noted that the envelope detector 302 is one example of detecting the audio level, and other techniques (e.g., circuits implementing polynomial transfer functions) can be used. In addition, the PCM signal is passed through an optional delay buffer 308 and then through a gain adjustment system 310 that generates a signal representing a duty cycle based on the calculator output. The standard duty cycle calculator 304 calculates the maximum duty cycle (Dmax) required and enabling to achieve the maximum required differential output voltage without common mode considerations that shift the amplifier output phase. It also generates a symmetrical minimum output duty cycle Dmin. These duty cycles, Dmin, Dmax also serve as the maximum possible duty cycle of the power converter.

[0034] The standard duty cycle calculator 304 considers the battery voltage Vbatt as well as the maximum target differential output voltage Voutmax in combination with the instantaneous peak input audio level Av detected. When the battery drops for the same output level, more boost is needed to generate the same output level. Since a constant average energy is delivered to the load for a given output level, the input takes the same amount of energy into the power converter, ignoring the inefficiencies of the conversion process. When the battery voltage drops, the current must be increased to maintain a constant energy flow. The common-mode voltage controller 300 is required to protect against excessive shunt currents, especially the MOSFET. Unlike conventional buck-derived class D amplifiers, high duty cycles can generate high MOSFET drain-source voltages as well as drain-source currents that can be damaging to the MOSFET. A control law can be included to reduce the maximum duty cycle if such a condition occurs. When the battery voltage increases, the shunt current decreases. However, at the same time, the peak voltage across the MOSFET also increases. A control law can be included to reduce the maximum duty cycle if such a condition occurs. Dmax and Dmin are calculated as shown in FIG.

[0035] The adjusted duty cycle calculator 306 calculates the control parameter corrections required to adjust the parameters Dmax and Dmin to adjust the common mode voltage of the output. D'max is the maximum adjusted duty cycle required after the common mode adjustment correction. D'min is the minimum adjusted duty cycle. Dmin and Dmax are typically symmetric around D=0.50, but D'min and D'max are not. FIG. 5 shows the calculations that are made. The adjusted duty cycle calculator 306 ultimately produces two variables: the duty cycle offset D'cm that needs to be subtracted from D, and D'max and D'min (D'max and D'min are related to each other through the relationship D'min=1-D'max) to calculate the gain correction to the audio signal 312 to be applied with the common mode offset. The inverter 316 implements the subtraction operation in combination with the summing elements 314 and 318. The gain correction is applied by the gain adjustment system 310.

[0036] This gain correction is necessary when changing the gain, which moves the average operating point along the gain-duty cycle curve. In other words, the gain must be adjusted to ensure that the differential output of the amplifier does not change if the common mode is shifted to a new operating point. The resulting adjusted signal (in this example, a PCM signal) is output to a modulator 320, in this case an AD digital modulator. One PCM signal with the corrected gain is applied to a first modulator 322 to be compared to a digitally generated triangle wave. This comparison dials in what duty cycle is needed for each applied audio sample, and can therefore be considered a duty cycle command. The other half of the modulator 324 takes the second adjusted PCM audio signal. A duty cycle offset is added to the audio duty cycle command, effectively reducing the duty cycle given the way the comparators are configured, as shown by the uncorrected signal 326 and the corrected signal 328, respectively.

[0037] The differential gain results in the following corrected transfer function (neglecting parasitic losses):

[0038]

number

[0039] This can be compared to the uncorrected transfer function:

[0040]

number

[0041] FIG. 6 shows a graphical plot illustrating an example of uncorrected 602 (Vodm) and corrected 604 (Vodmadj) large signal response versus duty cycle in a single graph. The gain of the power stage is reduced at lower common mode as shown by the reduced slope of curve 604 compared to curve 602. However, the output is maintained at curve 604 by the increased duty cycle range through input signal gain adjustment. The bold sections V'odm and V'odmadj of curves 602, 604 indicate the range set by Dmax and Dmin of curve 602 and D'max and D'min of curve 604, i.e., after common mode adjustment and input signal gain adjustment are applied.

[0042] FIG. 7 shows a graphical plot illustrating the effect of the response over time of different level detectors Av. The common mode level of the audio amplifier is controlled primarily by Av and the battery voltage, dynamically changing the input parameters to the common mode voltage controller. In FIG. 7, fast and slow versions of the envelope detector are shown. Waveform 702 is the fast detector, representing an almost full wave rectification of the input audio 703, and 701 represents a slow detector that simply communicates the audio peak level. When the full wave rectified version of the audio 702 is used as Av, the output phase waveforms are represented by waveforms 707 and 709. Compare these waveforms to the non-common mode regulated output phase voltages shown by waveforms 704 and 705. The output voltage is mostly driven by one phase or the other, depending on the differential output polarity of the amplifier. This is not a symmetrical push-pull, but a single ended like amplifier output behavior. The absolute voltage of each phase is at a minimum. When the deceleration detector 701 is used, the output phase behaves in a more symmetric push-pull fashion while simultaneously reducing the absolute phase voltage. Curves 706 and 708 show the slow response output form. However, especially near zero tone, the voltage is not optimally minimized as in the case of the fast detector. Of course, any speed between these two extremes can be chosen to provide the results shown between the two.

[0043] Note that a faster Av maximizes power savings, but supporting the full audio bandwidth of Av translates into a rate of change of common-mode level, which may pose some practical challenges. One example is the introduction of potentially high currents to ground in the zeta amplifier output capacitors. Another example is the concern of RF radiation from the output wires if the common-mode voltage components are modulated very quickly. Thus, in some implementations, one may wish to limit the bandwidth of Av to meet the needs and capabilities of the system. For example, one solution is to vary Av slowly and smoothly to achieve better EMC performance.

[0044] 8 shows a graphical plot illustrating an example of a peak detector waveform 801 that does not vary smoothly with respect to an input signal 802. The common mode shifted phase voltage 804 exhibits discontinuities that lead to higher harmonic content in the signal, whereas the unshifted version 803 does not. Despite these common mode discontinuities, the differential outputs 805 and 806, in the ideal case, do not exhibit any discontinuities.

[0045] In these examples, a peak detector is used to set the audio level Av that is input to the calculators 304, 306 (FIG. 3). In some implementations, approaches other than a peak detector can be utilized to provide different transfer functions. For example, the audio level input can be manipulated by a transfer function made from a polynomial that relates a particular audio input to a particular Av output. In such an approach, the phase voltage response can then be shaped as desired. A potential advantage of using such an approach can be reduced computational overhead compared to using a peak detector. Similarly, other transfer functions are possible with the same objective of minimizing the phase voltage and therefore the MOSFET losses.

[0046] One advantage of the system approach illustrated in the plot of FIG. 8 is that it does not add any excessive latency, thus allowing the Zeta amplifier to be used in low latency audio systems. Amplifiers designed with an external boost supply combined with a Buck derived Class D amplifier typically require an audio look-ahead delay to allow the power supply to ramp up to the required level. This delay can be on the order of several milliseconds, resulting in significant latency. In audio systems that require noise cancellation or include video systems, this delay can be problematic.

[0047] As is evident, implementations of the common-mode voltage controller can substantially reduce phase voltages, resulting in less loss. For example, certain implementations can easily reduce the average phase voltage from 12V to 5V or even more, resulting in significant savings. Furthermore, lowering the output phase common-mode voltage increases efficiency at lower output levels where statistically audio files spend most of their time. Thus, implementations of the common-mode adjustment technique provide significant advantages for battery-powered applications by significantly extending play time as well as running the amplifier at a relatively lower operating temperature.

[0048] It will be understood that one or more of the functions of the amplifier system may be implemented as hardware and / or software, and that the various components may include communication paths connecting the components by any conventional means (e.g., wired and / or wireless connections). For example, one or more non-volatile devices (e.g., centralized or distributed devices such as flash memory devices) may store and / or execute programs, algorithms, and / or parameters of one or more of the described systems of devices. Also, the functionality described herein or portions thereof, and various modifications thereof (hereinafter "functionality") may be implemented at least in part via a computer program product (e.g., a computer program tangibly embodied in an information carrier, such as one or more non-transitory machine-readable media, for execution by or for controlling the operation of one or more data processing devices (e.g., programmable processors, computers, multiple computers, and / or programmable logic components, etc.).

[0049] The computer program can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program can be deployed to be executed on one computer, or on multiple computers at one site, or distributed across multiple sites and interconnected by a network.

[0050] Actions associated with carrying out all or a portion of the functions may be performed by one or more programmable processors executing one or more computer programs to carry out the functions. All or a portion of the functions may be implemented as special purpose logic circuitry, such as field programmable gate arrays (FPGAs) and / or application-specific integrated circuits (ASICs). Processors suitable for executing computer programs also include, by way of example, both general and special purpose microprocessors, as well as any one or more processors of any kind of digital computer. In general, a processor may receive instructions and data from a read-only memory, a random access memory, or both. The components of a computer include a processor for executing instructions and one or more memory devices for storing instructions and data.

[0051] In various implementations, electronic components described as "coupled" may be linked via conventional wired and / or wireless means such that the electronic components can communicate data with one another. Furthermore, subcomponents within a given component may be considered to be linked via conventional paths, although not necessarily illustrated.

[0052] Although multiple implementations have been described, it is understood that additional modifications may be made without departing from the scope of the inventive concepts described herein, and thus, other implementations are within the scope of the following claims. [Explanation of symbols]

[0053] 100 Common-mode voltage controller 102 Gain Adjustment System 104 Standard and Adjusted Duty Cycle Calculator 106 Modulator 108 Self-Boosting Push-Pull Amplifier 110 Converter 112 Audio Signal 114 Audio Signals 116 Signal 118 Speakers and other acoustic transducers 200 Zeta Amplifier 202 steps 204 steps 212 Input Audio Signal 214 Modulator 230 Acoustic Transducer 230 Acoustic Transducer 300 Common-mode voltage controller 302 Envelope detector (with delay) 304 Standard Duty Cycle Calculator 306 Adjusted Duty Cycle Calculator 308 Optional Delay Buffer 310 Gain Adjustment System 310 Audio Signals 314 Additive Elements 316 Inverter 318 Additive Elements 320 Modulator 322 First Modulator 324 Modulator 326 Unmodified Signal 328 Modified Signals 602 curve 604 Curve 701 Deceleration detector 702 Waveform 703 Input Audio 704 Waveform 705 Waveform 706 Curve 707 Waveform 708 curve 709 waveform 801 Peak detector waveform 802 Input Signal 803 No shift version 804 Phase voltage 805 Differential Output 806 Differential Output

Claims

1. 1. An amplifier system comprising: a common-mode voltage controller configured to receive an input signal and output a pair of regulated signals; a modulator responsive to the conditioned signal to generate a pair of pulse width modulated (PWM) signals; a self-boosting push-pull amplifier configured to receive the PWM signal and generate an amplified output, the self-boosting push-pull amplifier configured to generate a differential mode voltage representative of an amplified version of the input signal; An amplifier system, wherein the regulated signal generated by the common-mode voltage controller includes a dynamically adjusted gain and duty cycle offset that causes the self-boosted push-pull amplifier to operate at a reduced common-mode voltage.

2. The amplifier system of claim 1 , wherein the input signal comprises a pulse code modulated (PCM) signal.

3. The amplifier system of claim 1 , wherein the input signal comprises an analog signal.

4. the common mode voltage controller: a system for evaluating the input signal to determine a detected level; a standard duty cycle calculator responsive to the detected level, a defined supply voltage, and a defined maximum output power to determine a maximum duty cycle associated with the input signal; and an adjusted duty cycle calculator that determines a maximum adjusted duty cycle and a duty cycle offset in response to the detected level, the defined supply voltage, the defined maximum output, and the defined minimum phase voltage value.

5. 5. The amplifier system of claim 4, wherein the common-mode voltage controller further comprises a gain adjustment system for dynamically adjusting a gain of the input signal in response to the maximum duty cycle and a maximum adjusted duty cycle to ensure that the differential mode voltage continues to represent the input signal.

6. 6. The amplifier system of claim 5, wherein the duty cycle offset is applied to a gain adjusted signal output from the gain adjustment system to generate a pair of adjusted audio signals.

7. The gain adjusted signal is expressed by the formula:

7. The amplifier system of claim 6, wherein the gain adjusted signal is calculated according to: Gain Adjusted Signal=(Adjusted Maximum Duty Cycle)-0.5 / (Maximum Duty Cycle)-0.

5.

8. 2. The amplifier system of claim 1, wherein the self-boosting push-pull amplifier comprises a two-stage fourth-order zeta converter creating an eighth-order differential amplifier.

9. 2. The amplifier system of claim 1, wherein the regulated audio signal generated by the common-mode voltage controller further comprises a dynamically adjusted duty cycle.

10. The amplifier system of claim 1 , wherein the input signal comprises one of an audio signal, a motor control signal, or a power inverter signal.

11. 1. A common-mode voltage controller for a self-boosting push-pull amplifier, the common-mode voltage controller comprising: Receiving an input signal; Calculating a maximum duty cycle based on the input signal; Calculating a maximum adjusted duty cycle and a duty cycle offset based on the input signal; dynamically adjusting a gain provided to the input signal in response to the maximum duty cycle and the maximum adjusted duty cycle to generate a gain adjusted signal; and applying the duty cycle offset to the gain adjusted signals to generate a pair of regulated signals, the regulated signals configured to reduce the common-mode voltage of a self-boosted push-pull amplifier while maintaining a differential mode voltage constant.

12. 12. The common-mode voltage controller of claim 11, wherein the input signal comprises one of an analog signal or a pulse code modulated (PCM) signal.

13. 12. The common-mode voltage controller of claim 11, wherein the common-mode voltage controller is further configured to process the input signal to determine a detected level.

14. 14. The common-mode voltage controller of claim 13, wherein the common-mode voltage controller is further configured to process the detected level, a defined supply voltage, and a defined maximum output power to calculate the maximum duty cycle.

15. 14. The common-mode voltage controller of claim 13, wherein the common-mode voltage controller is further configured to process the detected level, a defined supply voltage, a defined maximum output, and a defined minimum phase voltage value to calculate the maximum adjusted duty cycle and a duty cycle offset.

16. 14. The common-mode voltage controller of claim 13, wherein the detected level is detected with one of an envelope detector and a circuit implementing a transfer function created from a polynomial that defines an audio input / output relationship.

17. 12. The common-mode voltage controller of claim 11, wherein the common-mode voltage controller is further configured to generate, using a modulator, a pair of pulse-width modulated signals in response to the conditioned signal.

18. 20. The common-mode voltage controller of claim 17, wherein the common-mode voltage controller is further configured to input the pair of pulse-width modulated signals to a power conversion stage of the self-boosting push-pull amplifier.

19. The gain adjusted signal is expressed by the formula:

12. The common-mode voltage controller of claim 11, wherein the gain adjusted signal is calculated according to: (adjusted maximum duty cycle)-0.5 / (maximum duty cycle)-0.

5.

20. 12. The common-mode voltage controller of claim 11, wherein the pair of conditioned signals is used as inputs to generate a pair of pulse-width modulated signals by a modulator.

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