Optical modulator, optical transmitter and optical communication device

Abstract

To provide an optical modulator and the like that can suppress modulation loss and consumption power.SOLUTION: An optical modulator includes an encoder that encodes a data signal, a first phase shifter group that is disposed on a first arm passing a first optical signal that is branched and adjusts a phase shift quantity of the first optical signal passing according to a bit value for each bit digit in a bit string of the data signal, and a second phase shifter group that is disposed on a second arm passing a second optical signal that is branched and adjusts the phase shift quantity of the second optical signal passing according to the bit value for each bit digit, and outputs an optical modulation signal by combining the first optical signal after the phase shift adjustment and the second optical signal after the phase shift adjustment. In a state where an electrode length of the first phase shifter group and the second phase shifter group is set to a predetermined length that is determined based on the interval of the intensity at the symbol point of the optical modulation signal, the encoder encodes the input data signal to the bit string where the number of bits that become 1 increases or decreases in accordance with intensity at the symbol point of the optical modulation signal.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to an optical modulator, an optical transmitter, and an optical communication device. [Background technology]

[0002] There is an optical modulator equipped with a MZ (Mach-Zehnder) interferometer as an optical element. FIG. 38 is a schematic plan view showing an example of the configuration of a conventional optical modulator 100. The optical modulator 100 shown in FIG. 38 is an MZ modulator that modulates an optical signal (CW light) with an electrical data signal. The optical modulator 100 has a data modulation unit 101, a DAC (Digital Analogue Converter) 102, an optical waveguide 103, and two arms 104 arranged on the optical waveguide 103. The data modulation unit 101 modulates the bit string data signal. The DAC 102 converts the bit string data signal modulated by the data modulation unit 101 into an analog signal.

[0003] The optical waveguide 103 has an input section 111, a branching section 112, a multiplexing section 113, and an output section 114. The input section 111 inputs an optical signal from a light source. The branching section 112 branches the optical signal from the input section 111 to each arm 104. The two arms 104 are, for example, MZ interferometers having an upper arm 104A and a lower arm 104B.

[0004] The upper arm 104A converts the Gray code of the data signal into a binary number, and converts the Gray code after the binary conversion into an analog number. The upper arm 104A intensity-modulates the optical signal from the light source with the Gray code data signal after the analog conversion, and outputs a horizontally polarized optical modulation signal after the intensity modulation. The lower arm 104B converts the Gray code of the data signal into a binary number, and converts the Gray code after the binary conversion into an analog number. The lower arm 104B intensity-modulates the optical signal from the light source with the Gray code data signal after the analog conversion, and outputs a vertically polarized optical modulation signal after the intensity modulation. Note that since the data signal is, for example, a 3-bit digital signal, the arm 104 outputs an 8-value optical modulation signal from signal level 1 to signal level 8.

[0005] The multiplexer 113 multiplexes the horizontally polarized optical modulated signal from the upper arm 104A and the vertically polarized optical modulated signal from the lower arm 104B. The output unit 114 outputs the optical modulated signal multiplexed by the multiplexer 113.

[0006] The upper arm 104A has a plurality of phase shifters 105 connected in series, for example, an eleventh phase shifter 105A, a twelfth phase shifter 105B, and a thirteenth phase shifter 105C. The lower arm 104B also has a plurality of phase shifters 105 connected in series, for example, an eleventh phase shifter 105A, a twelfth phase shifter 105B, and a thirteenth phase shifter 105C. The eleventh phase shifter 105A of the upper arm 104A and the eleventh phase shifter 105A of the lower arm 104B have the same electrode length L 11 The twelfth phase shifter 105B of the upper arm 104A and the twelfth phase shifter 105B of the lower arm 104B have the same electrode length L 12 The thirteenth phase shifter 105C of the upper arm 104A and the thirteenth phase shifter 105C of the lower arm 104B have the same electrode length L 13 In addition, the electrode length L 11 :L 12 :L 13 The ratio is, for example, 20:21:22.

[0007] The eleventh phase shifter 105A of the upper arm 104A shifts the first bit value b 11 The eleventh phase shifter 105A of the lower arm 104B modulates the optical signal intensity by the inverted first bit value b 11 The twelfth phase shifter 105B in the upper arm 104A intensity-modulates the optical signal with a second bit value b 12 whereas the twelfth phase shifter 105B of the lower arm 104B intensity-modulates the optical signal with the inverted second bit value b 12 The thirteenth phase shifter 105C in the upper arm 104A intensity-modulates the optical signal by the third bit value b 13 The thirteenth phase shifter 105C in the lower arm 104B intensity-modulates the optical signal with the inverted third bit value b 13 The optical signal is intensity modulated with

[0008] The phase shift of the upper arm 104A is φ U =φ U0 +φ, and the phase shift of the lower arm 104B is φ L =φ L0 Since −φ, the phase shifts of the two arms 104 are as shown in (Equation 18).

[0009]

number

[0010] The output of the optical modulator 100 is given by (Equation 19).

[0011]

number

[0012] If the output of the optical modulator 100 is the electric field intensity, the electric field intensity is as shown in (Equation 20).

[0013]

number

[0014] Furthermore, when the output of the optical modulator 100 is taken as the optical intensity, the optical intensity is as shown in (Equation 21).

[0015]

number

[0016] FIG. 39 is an explanatory diagram showing an example of the correspondence (symbol mapping) between the optical modulated signal and the signal level (Gray code after binary conversion) of the conventional optical modulator 100. Note that, although the description here assumes the case of Gray code symbol mapping, symbol mapping other than Gray code may also be used. Ideally, the signal levels of the optical modulated signal are at equal intervals for each Gray code after binary conversion of the data signal. In order to make the signal levels at equal intervals, it is required to adjust the phase shift amount of each phase shifter 105 on each arm 104.

[0017] However, it is difficult to make the signal levels of the optically modulated signal equally spaced for each Gray code after binary conversion of the data signal. Fig. 40 is an explanatory diagram showing an example of a problem with the conventional optical modulator 100. The relationship between the phase shift amount (input voltage) of the optical modulator 100 and the electric field intensity or light intensity (modulation output) of the optically modulated signal is a sine curve. Since the sine curve has a long nonlinear portion, the signal levels 1 to 8 of the optically modulated signal output are not equally spaced. As a result, the level interval between the signal levels at both ends, for example, the signal levels 1 and 8, becomes narrow, resulting in a power penalty.

[0018] Therefore, it is conceivable to use only the linear portion of the sine curve in order to suppress the occurrence of the power penalty. Fig. 41 is an explanatory diagram showing an example of a problem with the conventional optical modulator 100. Of the sine curve of the relationship between the phase shift amount (input voltage) of the optical modulator and the electric field intensity or light intensity (modulation output) of the optical modulated signal, only the linear portion is used. As a result, the occurrence of the power penalty can be suppressed. However, since the linear portion of the sine curve is short, the level interval of the signal level of the optical modulated signal becomes short, resulting in large modulation loss.

[0019] Also, in order to suppress the occurrence of a power penalty, the number of phase shifters 105 connected in series on the two arms 104 in the optical modulator 100 is increased. Increasing the number of phase shifters 105 can be considered to lengthen the linear portion of the sine curve showing the relationship between the phase shift amount (input voltage) of the optical modulator and the electric field intensity or light intensity of the optical modulated signal.

[0020] 42 is a schematic plan view showing an example of the configuration of a conventional optical modulator 100A. The optical modulator 100A has a nonlinear compensation section 121. An upper arm 104A in the optical modulator 100A has six phase shifters 105 connected in series, and a lower arm 104B in the optical modulator 100A has six phase shifters 105 connected in series. The eleventh phase shifter 105A in the upper arm 104A and the lower arm 104B have the same electrode length L 11 The twelfth phase shifter 105B of the upper arm 104A and the lower arm 104B have the same electrode length L 12 The thirteenth phase shifter 105C in the upper arm 104A and the lower arm 104B has the same electrode length L 13 The fourteenth phase shifter 105D in the upper arm 104A and the lower arm 104B has the same electrode length L 14 The fifteenth phase shifter 105E in the upper arm 104A and the lower arm 104B have the same electrode length L 15 The sixteenth phase shifter 105F in the upper arm 104A and the lower arm 104B has the same electrode length L 16 The nonlinear compensation unit 121 converts the Gray code of the 3-bit data signal into a binary number, and converts the binary converted Gray code into a Gray code of a 6-bit data signal. The nonlinear compensation unit 121 applies an input voltage corresponding to each bit of the data signal to each phase shifter 105.

[0021] Fig. 43 is an explanatory diagram showing an example of a problem with the conventional optical modulator 100A. By increasing the number of phase shifters from three in Fig. 38 to six in Fig. 42, it becomes possible to finer the setting resolution of the amount of phase shift of the optical modulator, and the signal levels 1 to 8 of the optical modulated signal output can be set at equal intervals. As a result, the modulation loss can be reduced. [Prior art documents] [Patent documents]

[0022] [Patent Document 1] Special Publication No. 2013-502613 [Patent Document 2] JP 2015-184506 A Summary of the Invention [Problem to be solved by the invention]

[0023] However, the optical modulator 100 shown in Fig. 41 has a large modulation loss, and the optical modulator 100A shown in Fig. 42 has an increased number of phase shifters 105 connected in series, which increases power consumption and the number of components. As a result, there is a demand for an optical modulator that has small modulation loss and can reduce power consumption and the number of components while maintaining equal signal level intervals.

[0024] The disclosed technology has been made in view of the above points, and has an object to provide an optical modulator etc. that can suppress modulation loss and power consumption while maintaining equal intervals between signal levels. [Means for solving the problem]

[0025] In one embodiment, the optical modulator disclosed in the present application includes an encoder, a branching unit, a first arm, a first phase shifter group, a second arm, a second phase shifter group, and a multiplexing unit. The encoder encodes an input data signal. The branching unit branches an optical signal into a first optical signal and a second optical signal. The first optical signal branched by the branching unit passes through the first arm. The first phase shifter group is arranged on the first arm for each bit digit of a bit string of a data signal output from the encoder, and adjusts a phase shift amount of the first optical signal passing through the first arm according to a bit value of each bit digit. The second arm passes through the second optical signal branched by the branching unit. The second phase shifter group is arranged on the second arm for each bit digit, and adjusts a phase shift amount of the second optical signal passing through the second arm to a phase amount of an opposite sign to that of the first optical signal according to a bit value of each bit digit. The multiplexing unit multiplexes a first optical signal after phase adjustment using the first phase shifter group and a second optical signal after phase adjustment using the second phase shifter group to output an optical modulated signal. The encoder encodes an input data signal into a bit string in which the number of bits set to 1 increases or decreases according to the intensity of the symbol points of the optical modulated signal, with the electrode lengths of the first phase shifter group and the second phase shifter group set to a predetermined length that is determined in advance by the interval between the intensities of the symbol points of the optical modulated signal. Effect of the Invention

[0026] According to one aspect of the optical modulator etc. disclosed in the present application, it is possible to suppress modulation loss and power consumption while maintaining equal intervals between signal levels. [Brief description of the drawings]

[0027] [Figure 1] FIG. 1 is a block diagram showing an example of the configuration of an optical transmitter according to this embodiment. [Diagram 2] FIG. 2 is a schematic plan view illustrating an example of the configuration of the optical modulator according to the first embodiment. [Diagram 3] FIG. 3 is an explanatory diagram showing an example of the corresponding relationship between the input and output of a 3-bit encoder. [Figure 4A]FIG. 4A is an explanatory diagram showing an example of a correspondence relationship (symbol mapping) between a signal level of a 3-bit encoder and a code for modulation input. [Figure 4B] FIG. 4B is an explanatory diagram showing an example of a creation rule for the symbol mapping shown in FIG. 4A. [Diagram 5] FIG. 5 is an explanatory diagram illustrating an example of the configuration of a logic circuit of an encoder. [Figure 6] FIG. 6 is an explanatory diagram showing the correspondence relationship between the electric field intensity of an optically modulated signal of an optical modulator and the amount of phase shift. [Figure 7] FIG. 7 is an explanatory diagram showing an example of the setting operation of the optical modulator. [Figure 8] FIG. 8 is a schematic plan view illustrating an example of the configuration of the optical modulator according to the second embodiment. [Figure 9] FIG. 9 is an explanatory diagram showing an example of the correspondence relationship between the optical intensity of an optically modulated signal of an optical modulator and the amount of phase shift. [Figure 10] FIG. 10 is a schematic plan view illustrating an example of the configuration of an optical modulator according to the third embodiment. [Figure 11A] FIG. 11A is an explanatory diagram showing an example of a correspondence relationship (symbol mapping) between a signal level of a 4-bit encoder and a code for modulation input. [Figure 11B] FIG. 11B is an explanatory diagram showing an example of a creation rule for the symbol mapping shown in FIG. 11A. [Figure 12] FIG. 12 is an explanatory diagram showing an example of the correspondence relationship between the electric field intensity of an optically modulated signal of an optical modulator and the amount of phase shift. [Figure 13] FIG. 13 is a schematic plan view showing an example of the configuration of an optical modulator according to a fourth embodiment. [Figure 14] FIG. 14 is an explanatory diagram showing an example of the correspondence relationship between the optical intensity of an optically modulated signal of an optical modulator and the amount of phase shift. [Figure 15] FIG. 15 is a schematic plan view illustrating an example of the configuration of an optical modulator according to a fifth embodiment. [Figure 16] FIG. 16 is an explanatory diagram showing an example of the corresponding relationship between the input and output of a 3-bit encoder. [Figure 17]FIG. 17 is an explanatory diagram showing an example of a symbol of an optical modulator. [Figure 18] FIG. 18 is a schematic plan view showing an example of the configuration of an optical modulator according to the sixth embodiment. [Figure 19] FIG. 19 is an explanatory diagram showing an example of the corresponding relationship between the input and output of a 4-bit encoder. [Figure 20] FIG. 20 is an explanatory diagram showing an example of a symbol of an optical modulator. [Figure 21] FIG. 21 is a schematic plan view showing an example of the configuration of the optical modulator according to the seventh embodiment. [Figure 22] FIG. 22 is an explanatory diagram showing an example of the corresponding relationship between the input and output of a 5-bit encoder. [Figure 23A] FIG. 23A is an explanatory diagram showing an example of a correspondence relationship (symbol mapping) between a signal level of a 5-bit encoder and a code for modulation input. [Figure 23B] FIG. 23B is an explanatory diagram showing an example of a creation rule for the symbol mapping shown in FIG. 23A. [Figure 24] FIG. 24 is an explanatory diagram showing an example of a symbol of an optical modulator. [Figure 25A] FIG. 25A is an explanatory diagram showing an example of a correspondence relationship (symbol mapping) between a signal level of an N-bit compatible encoder and a code for modulation input. [Figure 25B] FIG. 25B is an explanatory diagram showing an example of a creation rule for the symbol mapping shown in FIG. 25A. [Figure 26] FIG. 26 is a schematic plan view showing an example of the configuration of the optical modulator according to the eighth embodiment. [Figure 27] FIG. 27 is an explanatory diagram showing an example of the corresponding relationship between the inputs and outputs of a first encoder and a second encoder compatible with 3 bits. [Figure 28] FIG. 28 is an explanatory diagram showing an example of a symbol of an optical modulator. [Figure 29] FIG. 29 is a schematic plan view showing an example of the configuration of an optical modulator according to a ninth embodiment. [Diagram 30]FIG. 30 is an explanatory diagram showing an example of the corresponding relationship between the inputs and outputs of a first encoder and a second encoder compatible with 4 bits. [Diagram 31] FIG. 31 is an explanatory diagram showing an example of a symbol of an optical modulator. [Diagram 32] FIG. 32 is a schematic plan view showing an example of the configuration of the optical modulator according to the tenth embodiment. [Diagram 33] FIG. 33 is an explanatory diagram showing an example of the corresponding relationship between the inputs and outputs of a first encoder and a second encoder compatible with 5 bits. [Diagram 34] FIG. 34 is an explanatory diagram showing an example of a symbol of an optical modulator. [Diagram 35] FIG. 35 is a schematic plan view showing an example of the configuration of the optical modulator according to the eleventh embodiment. [Diagram 36] FIG. 36 is an explanatory diagram showing an example of the corresponding relationship between the inputs and outputs of the first and third encoders compatible with 3 bits. [Figure 37] FIG. 37 is an explanatory diagram showing an example of a symbol of an optical modulator. [Figure 38] FIG. 38 is a schematic plan view showing an example of the configuration of a conventional optical modulator. [Figure 39] FIG. 39 is an explanatory diagram showing an example of a correspondence relationship (symbol mapping) between an optically modulated signal of a conventional optical modulator and a signal level (gray code after binary conversion). [Diagram 40] FIG. 40 is an explanatory diagram showing an example of a problem with a conventional optical modulator. [Diagram 41] FIG. 41 is an explanatory diagram showing an example of a problem with a conventional optical modulator. [Diagram 42] FIG. 42 is a schematic plan view showing an example of the configuration of a conventional optical modulator. [Diagram 43] FIG. 43 is an explanatory diagram showing an example of a problem with a conventional optical modulator. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] Hereinafter, an embodiment of an optical modulator and the like disclosed in the present application will be described in detail with reference to the drawings. Note that the present invention is not limited to the embodiment. EXAMPLES

[0029] FIG. 1 is a block diagram showing an example of the configuration of an optical transmitter 1 according to the present embodiment. The optical transmitter 1 shown in FIG. 1 includes N light sources 2, N optical modulators 3, and a WDM (Wavelength Division Multiplexing) multiplexer 4. The N light sources 2 are, for example, a first light source 2, a second light source 2, a third light source 2, and an Nth light source 2. The first light source 2 emits, for example, an optical signal of λ1. The second light source 2 emits, for example, an optical signal of λ2. The third light source 2 emits, for example, an optical signal of λ3. The Nth light source 2 emits, for example, an optical signal of λN. The optical signals of λ1 to λN are optical signals of different wavelengths. The N optical modulators 3 are, for example, a first optical modulator 3, a second optical modulator 3, a third optical modulator 3, and an Nth optical modulator 3. The first optical modulator 3 modulates the optical signal of λ1 from the first light source 2 with a data signal. The second optical modulator 3 modulates the λ2 optical signal from the second light source 2 with the data signal. The third optical modulator 3 modulates the λ3 optical signal from the third light source 2 with the data signal. The Nth optical modulator 3 modulates the λN optical signal from the Nth light source 2 with the data signal.

[0030] 2 is a schematic plan view showing an example of the configuration of the optical modulator 3 of the first embodiment. Each optical modulator 3 has a data modulation unit 11, an encoder 12, a DAC (Digital Analogue Converter) 13, an optical waveguide 14, and two arms 15 arranged on the optical waveguide 14. The data modulation unit 11 modulates the input signal into a bit string data signal, which is, for example, a 3-bit digital electrical input signal.

[0031] The encoder 12 converts the bit string data signal into a modulation input code. The encoder 12 converts a first bit value b1 of the bit string data signal into a first bit value B1 in the modulation input code. The encoder 12 converts a second bit value b2 in the bit string data signal into a second bit value B2 in the modulation input code. The encoder 12 converts a third bit value b3 in the bit string data signal into a third bit value B3 in the modulation input code.

[0032] FIG. 3 is an explanatory diagram showing an example of the correspondence between the input and output of the 3-bit encoder 12. As shown in FIG. 3, the encoder 12 converts the Gray code "b3b2b1" of the data signal into the modulation input code "B3B2B1". The Gray code is a code used when adjusting the phase shift amount of each phase shifter. When the Gray code is "100", the encoder 12 converts the Gray code "100" into the modulation input code "111". When the Gray code is "001", the encoder 12 converts the Gray code "001" into the modulation input code "001". When the Gray code is "011", the encoder 12 converts the Gray code "011" into the modulation input code "010". When the Gray code is "010", the encoder 12 converts the Gray code "010" into the modulation input code "100". When the Gray code is "110", the encoder 12 converts the Gray code "110" to the modulation input code "011". When the Gray code is "111", the encoder 12 converts the Gray code "111" to the modulation input code "101". When the Gray code is "101", the encoder 12 converts the Gray code "101" to the modulation input code "110". When the Gray code is "100", the encoder 12 converts the Gray code "100" to the modulation input code "111".

[0033] Fig. 4A is an explanatory diagram showing an example of the correspondence between the signal level of the 3-bit compatible encoder 12 and the modulation input code. In Fig. 4A, when the modulation input code "B3B2B1" is "000", the signal level is "1", when the modulation input code is "001", the signal level is "2", and when the modulation input code is "010", the signal level is "3". When the modulation input code is "100", the signal level is "4", when the modulation input code is "011", the signal level is "5", and when the modulation input code is "101", the signal level is "6". When the modulation input code is "110", the signal level is "7", and when the modulation input code is "111", the signal level is "8".

[0034] Focus on the number of "1"s in the modulation input code "B3B2B1". When there are zero bit values ​​of "1", the signal level is "1", when there is one bit value of "1", the signal levels are "2", "3", and "4". When there are two bit values ​​of "1", the signal levels are "5", "6", and "7", and when there are three bit values ​​of "1", the signal level is "8". A bit string with two bit values ​​of "1" is arranged from the smallest to the largest N-digit binary number, with "1" and "0" inverted and left-right reversed. A bit string with one bit value of "1" is arranged from the smallest to the largest N-digit binary number, with "1" and "0" inverted and left-right reversed.

[0035] The bit configurations in the modulation input code "B3B2B1" for signal levels "1" and "8" are symmetrical with "0" and "1" inverted, and the bit configurations in the modulation input code "B3B2B1" for signal levels "2" and "7" are also symmetrical. The bit configurations in the modulation input code "B3B2B1" for signal levels "3" and "6" are also symmetrical, and the bit configurations in the modulation input code "B3B2B1" for signal levels "4" and "5" are also symmetrical.

[0036] In order to establish the correspondence between the signal level increase and the phase shift amount increase, as a prerequisite for the lengths of B1, B2, and B3, it is ensured that the length of B1 < the length of B2 < the length of B3 < the length of B1 + B2. Note that the length of B1 is the electrode length of the first phase shifter 16A, the length of B2 is the electrode length of the second phase shifter 16B, and the length of B3 is the electrode length of the third phase shifter 16C. As a result, directly from signal level "1" to signal level "4", the correspondence between the signal level increase and the phase shift amount increase can be established. Also, for the levels from signal level "5" to signal level "8", since the levels from signal level "1" to signal level "4" are folded back and sign-reversed, the correspondence between the signal level increase and the phase shift amount increase can be established.

[0037] FIG. 4B is an explanatory diagram showing an example of the creation rule of the symbol mapping shown in FIG. 4A. For the sake of convenience in explanation, the number of bits N of the modulation input code in the symbol mapping is set to N = 3 bits. As the creation rule, arrange the N-bit binary numbers with the number of bit values "1" being N - 1 (e.g., "2") in ascending order, and arrange the N-bit binary numbers with the number of bit values "1" being N - 2 (e.g., "1") in ascending order.

[0038] Furthermore, as the creation rule, invert the "1"s and "0"s in the N-bit binary number with the number of bit values "1" being N - 1 (e.g., "2") after rearrangement, and invert the "1"s and "0"s in the N-bit binary number with the number of bit values "1" being N - 2 (e.g., "1") after rearrangement.

[0039] Furthermore, as the creation rule, reverse the N-bit binary number with the number of bit values "1" being N - 1 (e.g., "2") after inversion from left to right, and reverse the N-bit binary number with the number of bit values "1" being N - 2 (e.g., "1") after inversion from left to right. Then, the symbol mapping shown in FIG. 4A can be created according to these creation rules.

[0040] Fig. 5 is an explanatory diagram showing an example of the configuration of a logic circuit of the encoder 12. The encoder 12 shown in Fig. 5 has two AND circuits and five XOR circuits, and when a data signal (Gray code) "b3b2b1" is input, it converts it into a modulation input code "B3B2B1" according to the correspondence shown in Fig. 3.

[0041] The DAC 13 performs analog conversion, i.e., voltage conversion, of the modulation input code of the data signal from the encoder 12. The DAC 13 is 3-bit, and therefore has three voltage conversion units, for example, a first voltage conversion unit 17A, a second voltage conversion unit 17B, and a third voltage conversion unit 17C. The first voltage conversion unit 17A performs voltage conversion of the data signal of the first bit value B1 of the modulation input code from the encoder 12. The second voltage conversion unit 17B performs voltage conversion of the data signal of the second bit value B2 of the modulation input code from the encoder 12. The third voltage conversion unit 17C performs voltage conversion of the data signal of the third bit value B3 of the modulation input code from the encoder 12.

[0042] The optical waveguide 14 has an input section 21, a branching section 22, a multiplexing section 23, and an output section 24. The input section 21 inputs an optical signal (CW light) from the light source 2. The branching section 22 branches the optical signal from the input section 21 to each arm 15. The two arms 15 are, for example, Mach-Zehnder (MZ) interferometers having an upper arm 15A1 and a lower arm 15B1.

[0043] Upper arm 15A1 intensity-modulates the optical signal from light source 2 with the analog-converted data signal, and outputs an intensity-modulated horizontally polarized optically modulated signal. Lower arm 15B1 intensity-modulates the optical signal from light source 2 with the analog-converted data signal, and outputs an intensity-modulated vertically polarized optically modulated signal. Since the data signal is a 3-bit digital signal, arm 15 outputs an 8-level optically modulated signal from signal level 1 to signal level 8.

[0044] The upper arm 15A1 has a first phase shifter group, which is a plurality of phase shifters connected in series, for example, a first phase shifter 16A, a second phase shifter 16B, and a third phase shifter 16C. The lower arm 15B1 also has a second phase shifter group, which is a plurality of phase shifters connected in series, for example, a first phase shifter 16A, a second phase shifter 16B, and a third phase shifter 16C. The first phase shifters 16A of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L1, and the second phase shifters 16B of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L2. Furthermore, the third phase shifters 16C of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L3.

[0045] The first voltage conversion unit 17A applies the data signal of the first bit value B1 after the voltage conversion to the electrode of the first phase shifter 16A of the upper arm 15A1. The first voltage conversion unit 17A inverts the data signal of the first bit value B1 after the voltage conversion, and applies the data signal of the first bit value B1 after the inversion to the electrode of the first phase shifter 16A of the lower arm 15B1. The second voltage conversion unit 17B applies the data signal of the second bit value B2 after the voltage conversion to the electrode of the second phase shifter 16B of the upper arm 15A1. The second voltage conversion unit 17B inverts the data signal of the second bit B2 after the voltage conversion, and applies the data signal of the second bit B2 after the inversion to the electrode of the second phase shifter 16B of the lower arm 15B1. The third voltage conversion unit 17C applies the voltage-converted data signal of the third bit value B3 to an electrode of the third phase shifter 16C in the upper arm 15A1. The third voltage conversion unit 17C inverts the voltage-converted data signal of the third bit value B3, and applies the inverted data signal of the third bit value B3 to an electrode of the third phase shifter 16C in the lower arm 15B1.

[0046] 6 is an explanatory diagram showing an example of the correspondence relationship between the electric field intensity of the optical modulated signal of the optical modulator 3 and the phase shift amount. When the first bit value "B1" of the modulation input code is "1", a data signal is applied to the first phase shifter 16A to add the phase shift amount φ1 to the phase shift amount φ0. When the second bit value "B2" of the modulation input code is "1", a data signal is applied to the second phase shifter 16B to add the phase shift amount φ2 to the phase shift amount φ0. When the third bit value "B3" of the modulation input code is "1", a data signal is applied to the third phase shifter 16C to add the phase shift amount φ3 to the phase shift amount φ0.

[0047] The amount of phase shift φ of the optical modulator 3 is given by (Equation 1).

[0048]

number

[0049] The phase shifts φ1, φ2, φ3, and φ0 of the optical modulator 3 are as shown in Equation 2. The phase shift φ1 is about 0.57 rad, the phase shift φ2 is about 0.91 rad, the phase shift φ3 is about 1.2 rad, and the phase shift φ0 is about 0.23 rad.

[0050]

number

[0051] When the modulation input code "B3B2B1" is "000", the phase shift amount is φ0, resulting in an electric field strength equivalent to a signal level of "1". When the modulation input code "B3B2B1" is "001", the phase shift amount is φ0 + φ1, resulting in an electric field strength equivalent to a signal level of "2". When the modulation input code "B3B2B1" is "010", the phase shift amount is φ0 + φ2, resulting in an electric field strength equivalent to a signal level of "3". When the modulation input code "B3B2B1" is "100", the phase shift amount is φ0 + φ3, resulting in an electric field strength equivalent to a signal level of "4".

[0052] When the modulation input code "B3B2B1" is "011", the phase shift amount is φ0+φ1+φ2, resulting in a field strength equivalent to a signal level of "5". When the modulation input code "B3B2B1" is "101", the phase shift amount is φ0+φ1+φ3, resulting in a field strength equivalent to a signal level of "6". When the modulation input code "B3B2B1" is "110", the phase shift amount is φ0+φ2+φ3, resulting in a field strength equivalent to a signal level of "7". When the modulation input code "B3B2B1" is "111", the phase shift amount is φ0+φ1+φ2+φ3, resulting in a field strength equivalent to a signal level of "8".

[0053] The electric field intensity of the optical modulator 3 is given by (Equation 3).

[0054]

number

[0055] 7 is an explanatory diagram showing an example of the setting operation of the optical modulator 3. The data modulation unit 11 of the optical modulator 3 changes the gray code (step S11). When the encoder 12 of the optical modulator 3 receives the gray code, it converts the gray code into a modulation input code according to the correspondence shown in FIG. 3 (step S12). The DAC 13 of the optical modulator 3 adjusts the phase shift amount of each arm 15 according to the modulation input code (step S13). Then, the optical modulator 3 changes the electric field intensity of the optical modulated signal according to the adjustment of the phase shift amount of each arm 15 (step S14).

[0056] In the optical modulator 3, the ratio of the electrode length L1 of the first phase shifter 16A, the electrode length L2 of the second phase shifter 16B, and the electrode length L3 of the third phase shifter 16C is set to, for example, L1:L2:L3=21:34:45 so that the electric field strength for each signal level (1 to 8) is at equal intervals. As a result, since the electric field strength for each signal level (1 to 8) is at equal intervals, it is possible to sufficiently secure the linear portion of the sine curve that represents the corresponding relationship between the electric field strength and the amount of phase shift of the optically modulated signal.

[0057] The first phase shifter 16A of the upper arm 15A1 intensity-modulates the optical signal with a data signal of a first bit value B1 from the first voltage conversion unit 17A. The first phase shifter 16A of the lower arm 15B1 intensity-modulates the optical signal with a data signal of the first bit value B1 after inversion from the first voltage conversion unit 17A. The second phase shifter 16B of the upper arm 15A1 intensity-modulates the optical signal with a data signal of a second bit value B2 from the second voltage conversion unit 17B. The second phase shifter 16B of the lower arm 15B1 intensity-modulates the optical signal with a data signal of the second bit value B2 after inversion from the second voltage conversion unit 17B. The third phase shifter 16C of the upper arm 15A1 intensity-modulates the optical signal with a data signal of a third bit value B3 from the third voltage conversion unit 17C. Moreover, the third phase shifter 16C in the lower arm 15B1 intensity-modulates the optical signal with the data signal after inversion of the third bit value B3 from the third voltage conversion unit 17C.

[0058] The first phase shifter group is arranged on an upper arm (first arm) 15A1 for each bit digit of the bit string of the data signal output from the encoder 12, and adjusts the phase shift amount of an optical signal (first optical signal) passing through the upper arm 15A1 according to the bit value of each bit digit. The second phase shifter group is arranged on a lower arm (second arm) 15B1 for each bit digit, and adjusts the phase shift amount of an optical signal (second optical signal) passing through the lower arm 15B1 according to the bit value of each bit digit so that the phase shift amount has an opposite sign to that of the first optical signal.

[0059] That is, the upper arm 15A1 intensity-modulates the optical signal with the data signal using the first phase shifter 16A, the second phase shifter 16B, and the third phase shifter 16C, and outputs the intensity-modulated optical modulated signal to the multiplexing unit 23. The lower arm 15B1 intensity-modulates the optical signal with the data signal using the first phase shifter 16A, the second phase shifter 16B, and the third phase shifter 16C, and outputs the intensity-modulated optical modulated signal to the multiplexing unit 23. Then, the multiplexing unit 23 multiplexes the optical modulated signal from the upper arm 15A1 and the optical modulated signal from the lower arm 15B1, and outputs the multiplexed optical modulated signal to the output unit 24.

[0060] The encoder 12 of the first embodiment encodes an input data signal into a bit string in which the number of bits set to 1 increases or decreases according to the intensity of the symbol point of the optical modulated signal, while setting the electrode lengths of the first phase shifter group and the second phase shifter group to lengths that make the intervals between the intensities of the symbol points of the optical modulated signal equal. As a result, modulation loss and power consumption can be suppressed while keeping the signal level intervals (intensity intervals) equal.

[0061] The encoder 12 encodes the input data signal into a bit string of N-digit binary number (N=3) based on a predetermined rule. As a result, the electrode length of the first phase shifter group is determined by adding up the electrode lengths of the phase shifters whose bit in the bit string of the N-digit binary number corresponding to the N phase shifters in the first phase shifter group is 1. Furthermore, the electrode length of the second phase shifter group is determined by adding up the electrode lengths of the phase shifters whose bit in the bit string of the N-digit binary number corresponding to the N phase shifters in the second phase shifter group is 1.

[0062] The encoder 12 encodes the bit string of the input data signal according to a predetermined rule in which, when the bit strings have the same number of "1", the bit strings are rearranged from smallest to largest, the sign of the rearranged bit strings is inverted, and the bit strings after the sign inversion are inverted left to right. As a result, a symbol mapping can be generated according to the predetermined rule.

[0063] In the optical modulator 3 of the first embodiment, the gray code of the data signal is converted into a modulation input code so that the electric field strength of each signal level (1 to 8) is spaced at equal intervals, and the electrode lengths of the phase shifters of the upper arm 15A1 and the lower arm 15B1 that apply a data signal corresponding to the converted modulation input code are adjusted. As a result, the linear portion of the sine curve that represents the correspondence between the electric field strength and the amount of phase shift is sufficiently secured, so that the signal level intervals are spaced at equal intervals, and modulation loss and power consumption can be suppressed.

[0064] The optical modulator 3 rearranges the bit string of the Gray code into a bit string of the modulation input code in which the number of "1"s in the bit string increases in order so that the amount of change in the signal level in the sine curve is at equal intervals, and adjusts and sets the electrode length of each phase shifter for each bit digit. As a result, the linear portion of the sine curve, which is the corresponding relationship between the electric field strength and the amount of phase shift, is sufficiently secured, so that the modulation loss and power consumption can be suppressed while the signal level intervals are kept at equal intervals.

[0065] The optical modulator 3 sequentially rearranges the bit strings of the Gray code into a bit string of the modulation input code in which the number of bit digits is in ascending order when the number of "1"s in the bit strings is the same. As a result, the bit strings of the Gray code can be rearranged into a bit string of an appropriate modulation input code so that the amount of change in the signal level is at equal intervals.

[0066] The optical modulator 3 sequentially rearranges the bit string of the Gray code into a bit string of an input code that conforms to a predetermined creation rule, where the N-digit binary number is the same number of "1"s in the N-bit bit string. As a result, the bit string of the Gray code can be rearranged into a bit string of an appropriate modulation input code so that the amount of change in the signal level is at equal intervals.

[0067] In the optical modulator 3, in order to make the signal level change amount for each bit value change of the input code bit string in the sine curve equal intervals, the bit string of the Gray code is rearranged into a bit string of the modulation input code in which the number of "1"s in the bit string follows a predetermined creation rule, and the electrode length of each phase shifter is adjusted for each bit digit. As a result, the linear portion of the sine curve, which is the corresponding relationship between the electric field strength and the amount of phase shift, is sufficiently secured, so that the modulation loss and power consumption can be suppressed while making the signal level intervals equal.

[0068] For ease of explanation, the encoder 12 of the first embodiment is exemplified as encoding an input data signal into a bit string in which the number of bits set to 1 increases or decreases according to the intensity of the symbol points of an optical modulated signal, in a state in which the electrode lengths of the first phase shifter group and the second phase shifter group are set to lengths that make the intervals between the intensities of the symbol points of an optical modulated signal equal. However, the present embodiment is not limited to a state in which the electrode lengths of the first phase shifter group and the second phase shifter group are set to lengths that make the intervals between the intensities of the symbol points of an optical modulated signal equal, and is also applicable to a case in which, for example, a slight error occurs in the intervals between the intensities of the symbol points due to manufacturing variations or the like.

[0069] That is, the encoder 12 encodes the input data signal into a bit string in which the number of bits set to 1 increases or decreases according to the intensity of the symbol points of the optical modulated signal, while setting the electrode lengths of the first and second phase shifter groups to a predetermined length determined in advance by the interval between the intensities of the symbol points of the optical modulated signal. Even in this case, modulation loss and power consumption can be suppressed.

[0070] The error range of the intensity intervals of the symbol points is equal in length within a range of ±20% or less. The reason for this is that if the level interval becomes 60% or less, a penalty occurs in the power and OSNR, which reduces the overall advantage. For example, if the level interval becomes ±20% or more, level 0 will increase by +20% and level 1 will decrease by -20% or more. As a result, the level interval becomes 100%-20%-20%=60% or less.

[0071] In the optical modulator 3 of the first embodiment, the electric field intensity is adjusted by adjusting the amount of phase shift in response to a data signal. However, the optical modulator 3 may adjust the light intensity instead of the electric field intensity, and such an embodiment will be described below as the second embodiment. The same components as those of the optical modulator 3 of the first embodiment are given the same reference numerals, and the description of the overlapping components and operations will be omitted. In the first embodiment, phase modulation is used, whereas in the second embodiment, intensity modulation is used. EXAMPLES

[0072] 8 is a schematic plan view showing an example of the configuration of the optical modulator 3A of the second embodiment. The first phase shifter 16A of the upper arm 15A1 intensity-modulates the optical signal with the data signal of the first bit value B1 from the first voltage conversion unit 17A. The first phase shifter 16A of the lower arm 15B1 intensity-modulates the optical signal with the data signal after the inversion of the first bit value B1 from the first voltage conversion unit 17A. The second phase shifter 16B of the upper arm 15A1 intensity-modulates the optical signal with the data signal of the second bit value B2 from the second voltage conversion unit 17B. The second phase shifter 16B of the lower arm 15B1 intensity-modulates the optical signal with the data signal after the inversion of the second bit value B2 from the second voltage conversion unit 17B. The third phase shifter 16C in the upper arm 15A1 intensity-modulates the optical signal with the data signal of the third bit value B3 from the third voltage conversion unit 17C, while the third phase shifter 16C in the lower arm 15B1 intensity-modulates the optical signal with the inverted data signal of the third bit value B3 from the third voltage conversion unit 17C.

[0073] 9 is an explanatory diagram showing an example of the correspondence relationship between the optical intensity and the phase shift of the optical modulation signal of the optical modulator 3A. When the first bit value "B1" of the modulation input code is "1", a data signal is applied to the first phase shifter 16A to add the phase shift amount φ1 to the phase shift amount φ0. When the second bit value "B2" of the modulation input code is "1", a data signal is applied to the second phase shifter 16B to add the phase shift amount φ2 to the phase shift amount φ0. When the third bit "B3" of the modulation input code is "1", a data signal is applied to the third phase shifter 16C to add the phase shift amount φ3 to the phase shift amount φ0.

[0074] The amount of phase shift φ of the optical modulator 3A is given by Equation 4.

[0075]

number

[0076] The phase shifts φ1, φ2, φ3, and φ0 of the optical modulator 3A are as shown in Equation 5. The phase shift φ1 is about 0.28 rad, the phase shift φ2 is about 0.45 rad, the phase shift φ3 is about 0.60 rad, and the phase shift φ0 is about 0.12 rad.

[0077]

number

[0078] When the modulation input code "B3B2B1" is "000", the phase shift amount is φ0, resulting in an optical intensity equivalent to a signal level of "1". When the modulation input code "B3B2B1" is "001", the phase shift amount is φ0 + φ1, resulting in an optical intensity equivalent to a signal level of "2". When the modulation input code "B3B2B1" is "010", the phase shift amount is φ0 + φ2, resulting in an optical intensity equivalent to a signal level of "modulation input code 3". When the modulation input code "B3B2B1" is "100", the phase shift amount is φ0 + φ3, resulting in an optical intensity equivalent to a signal level of "4".

[0079] When the modulation input code "B3B2B1" is "011", the phase shift amount is φ0+φ1+φ2, resulting in an optical intensity equivalent to a signal level of "5". When the modulation input code "B3B2B1" is "101", the phase shift amount is φ0+φ1+φ3, resulting in an optical intensity equivalent to a signal level of "6". When the modulation input code "B3B2B1" is "110", the phase shift amount is φ0+φ2+φ3, resulting in an optical intensity equivalent to a signal level of "7". When the modulation input code "B3B2B1" is "111", the phase shift amount is φ0+φ1+φ2+φ3, resulting in an optical intensity equivalent to a signal level of "8".

[0080] The optical intensity of the optical modulator 3A is given by (Equation 6).

[0081]

number

[0082] In the optical modulator 3A, the ratio of the electrode length L1 of the first phase shifter 16A, the electrode length L2 of the second phase shifter 16B, and the electrode length L3 of the third phase shifter 16C is set to, for example, L1:L2:L3=21:34:45 so that the optical intensity for each signal level (1 to 8) is at equal intervals. As a result, since the optical intensity for each signal level (1 to 8) is at equal intervals, the linear portion of the sine curve representing the corresponding relationship between the optical intensity of the optical modulated signal and the amount of phase shift can be sufficiently secured.

[0083] That is, the upper arm 15A1 intensity-modulates the optical signal with the data signal using the first phase shifter 16A, the second phase shifter 16B, and the third phase shifter 16C, and outputs the intensity-modulated optical modulated signal to the multiplexing unit 23. The lower arm 15B1 intensity-modulates the optical signal with the data signal using the first phase shifter 16A, the second phase shifter 16B, and the third phase shifter 16C, and outputs the intensity-modulated optical modulated signal to the multiplexing unit 23. Then, the multiplexing unit 23 multiplexes the optical modulated signal from the upper arm 15A1 and the optical modulated signal from the lower arm 15B1, and outputs the multiplexed optical modulated signal to the output unit 24.

[0084] In the optical modulator 3A of the second embodiment, the gray code of the data signal is converted into a modulation input code so that the optical intensity for each signal level (1 to 8) is spaced at equal intervals, and the electrode lengths of the phase shifters of the upper arm 15A1 and the lower arm 15B1 that apply a data signal corresponding to the converted modulation input code are adjusted. As a result, the linear portion of the sine curve that represents the correspondence between the optical intensity and the amount of phase shift is sufficiently secured, so that the modulation loss and power consumption can be suppressed while the signal level intervals are spaced at equal intervals.

[0085] For convenience of explanation, the encoder 12 of the second embodiment is exemplified as encoding an input data signal into a bit string in which the number of bits set to 1 increases or decreases according to the intensity of the symbol points of the optical modulated signal, with the electrode lengths of the first phase shifter group and the second phase shifter group set to lengths that make the intervals between the intensities of the symbol points of the optical modulated signal equal. However, the present embodiment is not limited to a state in which the electrode lengths of the first phase shifter group and the second phase shifter group are set to lengths that make the intervals between the intensities of the symbol points of the optical modulated signal equal, and is also applicable to a case in which, for example, a slight error occurs in the intervals between the intensities of the symbol points due to manufacturing variations or the like. The error range of the intervals between the intensities of the symbol points is equal to the length within a range of ±20% or less.

[0086] That is, the encoder 12 encodes the input data signal into a bit string in which the number of bits set to 1 increases or decreases according to the intensity of the symbol points of the optical modulated signal, while setting the electrode lengths of the first and second phase shifter groups to a predetermined length determined in advance by the interval between the intensities of the symbol points of the optical modulated signal. Even in this case, modulation loss and power consumption can be suppressed.

[0087] Although the optical modulator 3 in the embodiment 1 is a 3-bit compatible optical modulator, it may be an N-bit compatible optical modulator, and an embodiment of the same will be described below as embodiment 3. The same components as those in the optical modulator 3 in the embodiment 1 are denoted by the same reference numerals, and descriptions of the overlapping components and operations will be omitted. EXAMPLES

[0088] Fig. 10 is a schematic plan view showing an example of the configuration of an optical modulator 3B of the third embodiment. The optical modulator 3B shown in Fig. 10 includes a data modulation unit 11, an encoder 12, an upper arm 15A1, a lower arm 15B1, and N DACs 13. The data modulation unit 11 modulates an N-bit digital electrical input signal into a bit string data signal.

[0089] The encoder 12 converts the bit string data signal into a modulation input code. The encoder 12 converts a first bit value b1 in the bit string data signal into a first bit value B1 in the modulation input code. The encoder 12 converts a second bit value b2 in the bit string data signal into a second bit value B2 in the modulation input code. The encoder 12 converts an Nth bit value b N The Nth bit value B in the modulation input code N Convert to.

[0090] The upper arm 15A1 has N phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, and an Nth phase shifter 16N. The lower arm 15B1 also has N phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, and an Nth phase shifter 16N. The first phase shifters 16A of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L1, and the second phase shifters 16B of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L2. The Nth phase shifter 16N of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L3. N It is.

[0091] Since the DAC 13 has N bits, it has N voltage conversion units, for example, a first voltage conversion unit 17A, a second voltage conversion unit 17B, and an Nth voltage conversion unit 17N. The first voltage conversion unit 17A applies a data signal of a first bit value B1 after voltage conversion to an electrode of a first phase shifter 16A of the upper arm 15A1. The first voltage conversion unit 17A also inverts the data signal of the first bit value B1 after voltage conversion, and applies the inverted data signal of the first bit value B1 to an electrode of a first phase shifter 16A of the lower arm 15B1. The second voltage conversion unit 17B applies a data signal of a second bit value B2 after voltage conversion to an electrode of a second phase shifter 16B of the upper arm 15A1. The second voltage conversion unit 17B inverts the data signal of the second bit value B2 after the voltage conversion, and applies the inverted data signal of the second bit value B2 to the electrode of the second phase shifter 16B of the lower arm 15B1. NThe data signal is applied to the electrode of the Nth phase shifter 16N of the upper arm 15A1. The Nth voltage conversion unit 17N applies the voltage-converted Nth bit value B N The data signal is inverted and the inverted Nth bit value B N The data signal is applied to the electrode of the Nth phase shifter 16N in the lower arm 15B1.

[0092] The first phase shifter 16A in the upper arm 15A1 intensity-modulates the optical signal with a data signal of a first bit value B1 from the first voltage conversion unit 17A. The first phase shifter 16A in the lower arm 15B1 intensity-modulates the optical signal with a data signal after inversion of the first bit value B1 from the first voltage conversion unit 17A. The second phase shifter 16B in the upper arm 15A1 intensity-modulates the optical signal with a data signal of a second bit value B2 from the second voltage conversion unit 17B. The second phase shifter 16B in the lower arm 15B1 intensity-modulates the optical signal with a data signal after inversion of the second bit value B2 from the second voltage conversion unit 17B. The Nth phase shifter 16N in the upper arm 15A1 intensity-modulates the optical signal with a data signal of the Nth bit value B1 from the Nth voltage conversion unit 17N. N The Nth phase shifter 16N of the lower arm 15B1 modulates the intensity of the optical signal with the Nth data signal. N The optical signal is intensity-modulated by the inverted data signal. For convenience of explanation, the case where N bits is 4 bits will be explained.

[0093] Fig. 11A is an explanatory diagram showing an example of the correspondence between the signal level of the 4-bit compatible encoder 12 and the modulation input code. In Fig. 11A, when the modulation input code "B4B3B2B1" is "0000", the signal level is "1", and when the modulation input code "B4B3B2B1" is "0001", the signal level is "2". When the modulation input code "B4B3B2B1" is "0010", the signal level is "3", when the modulation input code "B4B3B2B1" is "0100", the signal level is "4", and when the modulation input code "B4B3B2B1" is "1000", the signal level is "5". When the modulation input code "B4B3B2B1" is "0011", the signal level is "6", when the modulation input code "B4B3B2B1" is "0101", the signal level is "7", and when the modulation input code "B4B3B2B1" is "1001", the signal level is "8".

[0094] When the modulation input code "B4B3B2B1" is "0110", the signal level is "9", when the modulation input code "B4B3B2B1" is "1010", the signal level is "10", when the modulation input code "B4B3B2B1" is "1100", the signal level is "11". When the modulation input code "B4B3B2B1" is "0111", the signal level is "12", when the modulation input code "B4B3B2B1" is "1011", the signal level is "13". When the modulation input code "B4B3B2B1" is "1101", the signal level is "14", when the modulation input code "B4B3B2B1" is "1110", the signal level is "15", and when the modulation input code "B4B3B2B1" is "1111", the signal level is "16".

[0095] Focus on the number of "1"s in the modulation input code "B4B3B2B1". When there are 0 bit values ​​of "1", the signal level is "1", when there is 1 bit value of "1", the signal level is "2" to "5", when there are 2 bit values ​​of "1", the signal level is "6" to "11". When there are 3 bit values ​​of "1", the signal level is "12" to "15", when there are 4 bit values ​​of "1", the signal level is "16". A bit string with 3 bit values ​​of "1" is arranged from the smallest of the N-digit binary numbers, with "1" and "0" inverted and left-right inverted. A bit string with 2 bit values ​​of "1" is arranged from the smallest of the N-digit binary numbers, with "1" and "0" inverted and left-right inverted. A bit string with one bit value of "1" has an N-digit binary number arranged in ascending order, with "1" and "0" inverted and left-right inverted.

[0096] The bit configurations in the modulation input code "B4B3B2B1" for signal levels "1" and "16" are symmetrical with "0" and "1" inverted, and the bit configurations in the modulation input code "B4B3B2B1" for signal levels "2" and "15" are symmetrical. The bit configurations in the modulation input code "B4B3B2B1" for signal levels "3" and "14" are symmetrical, and the bit configurations in the modulation input code "B4B3B2B1" for signal levels "4" and "13" are symmetrical. The bit configurations in the modulation input code "B4B3B2B1" for signal levels "5" and "12" are symmetrical, and the bit configurations in the modulation input code "B4B3B2B1" for signal levels "6" and "11" are symmetrical. The bit configurations in the modulation input code "B4B3B2B1" for signal levels "7" and "10" are symmetrical, and the bit configurations in the modulation input code "B4B3B2B1" for signal levels "8" and "9" are symmetrical.

[0097] In order to establish the correspondence between the signal level increase and the increase in the phase shift amount, on the premise of the lengths of B1, B2, B3, and B4, it is ensured that the length of B1 < the length of B2 < the length of B3 < the length of B4 < the length of B1 + B2, and the length of B1 + B4 < the length of B2 + B3. Here, the length of B1 is the electrode length of the first phase shifter 16A, the length of B2 is the electrode length of the second phase shifter 16B, the length of B3 is the electrode length of the third phase shifter 16C, and the length of B4 is the electrode length of the fourth phase shifter 16D. As a result, from signal level "1" to signal level "8", the correspondence between the signal level increase and the increase in the phase shift amount can be directly established. Also, for the levels from signal level "9" to signal level "16", since the levels of signal level "1" to signal level "8" are folded back and sign-inverted, the correspondence between the signal level increase and the increase in the phase shift amount can be established.

[0098] FIG. 11B is an explanatory diagram showing an example of the creation rule of the symbol mapping shown in FIG. 11A. For the sake of convenience in explanation, the number of bits N of the modulation input code in the symbol mapping is set to N = 4 bits. As the creation rule, N-bit binary numbers with the number of bit values "1" being N - 1 (for example, "3") are arranged in ascending order, N-bit binary numbers with the number of bit values "1" being N - 2 (for example, "2") are arranged in ascending order, and N-bit binary numbers with the number of bit values "1" being N - 3 (for example, "1") are arranged in ascending order.

[0099] Furthermore, as the creation rule, the "1" and "0" within the N-bit binary number with the number of bit values "1" being N - 1 (for example, "3") after rearrangement are inverted, the "1" and "0" within the N-bit binary number with the number of bit values "1" being N - 2 (for example, "2") after rearrangement are inverted, and the "1" and "0" within the N-bit binary number with the number of bit values "1" being N - 3 (for example, "1") after rearrangement are inverted.

[0100] Further, as a creation rule, an N-digit binary number with N-1 bit values ​​of "1" (e.g., "3") after inversion is left-right inverted, an N-digit binary number with N-2 bit values ​​of "1" (e.g., "2") after inversion is left-right inverted, and an N-digit binary number with N-3 bit values ​​of "1" (e.g., "1") after inversion is left-right inverted. Then, the symbol mapping shown in Fig. 11A can be created according to these creation rules.

[0101] 12 is an explanatory diagram showing an example of the correspondence relationship between the electric field intensity of the optical modulation signal of the optical modulator 3B and the phase shift amount. When the first bit "B1" of the modulation input code is "1", a data signal is applied to the first phase shifter 16A to add the phase shift amount φ1 to the phase shift amount φ0. When the second bit "B2" of the modulation input code is "1", a data signal is applied to the second phase shifter 16B to add the phase shift amount φ2 to the phase shift amount φ0. When the third bit "B3" of the modulation input code is "1", a data signal is applied to the third phase shifter 16C to add the phase shift amount φ3 to the phase shift amount φ0. When the fourth bit "B4" of the modulation input code is "1", a data signal is applied to the fourth phase shifter 16D to add the phase shift amount φ4 to the phase shift amount φ0.

[0102] When the modulation input code "B4B3B2B1" is "0000", the phase shift amount is φ0, resulting in an electric field strength equivalent to a signal level of "1". When the modulation input code "B4B3B2B1" is "0001", the phase shift amount is φ0 + φ1, resulting in an electric field strength equivalent to a signal level of "2". When the modulation input code "B4B3B2B1" is "0010", the phase shift amount is φ0 + φ2, resulting in an electric field strength equivalent to a signal level of "3". When the modulation input code "B4B3B2B1" is "0100", the phase shift amount is φ0 + φ3, resulting in an electric field strength equivalent to a signal level of "4". When the modulation input code "B4B3B2B1" is "1000", the phase shift amount is φ0 + φ4, resulting in an electric field strength equivalent to a signal level of "5".

[0103] When the modulation input code "B4B3B2B1" is "0011", the phase shift amount is φ0+φ1+φ2, resulting in a field strength equivalent to a signal level of "6". When the modulation input code "B4B3B2B1" is "0101", the phase shift amount is φ0+φ1+φ3, resulting in a field strength equivalent to a signal level of "7". When the modulation input code "B4B3B2B1" is "1001", the phase shift amount is φ0+φ1+φ4, resulting in a field strength equivalent to a signal level of "8". When the modulation input code "B4B3B2B1" is "0110", the phase shift amount is φ0+φ2+φ3, resulting in a field strength equivalent to a signal level of "9". When the modulation input code "B4B3B2B1" is "1010", the phase shift amount is φ0+φ2+φ4, resulting in a field strength equivalent to a signal level of "10". When the modulation input code "B4B3B2B1" is "1100", the amount of phase shift is φ0+φ3+φ4, resulting in a field strength equivalent to a signal level of "11".

[0104] When the modulation input code "B4B3B2B1" is "0111", the phase shift amount is φ0+φ1+φ2+φ3, resulting in a field strength equivalent to a signal level of "12". When the modulation input code "B4B3B2B1" is "1011", the phase shift amount is φ0+φ1+φ2+φ4, resulting in a field strength equivalent to a signal level of "13". When the modulation input code "B4B3B2B1" is "1101", the phase shift amount is φ0+φ1+φ3+φ4, resulting in a field strength equivalent to a signal level of "14". When the modulation input code "B4B3B2B1" is "1110", the phase shift amount is φ0+φ2+φ3+φ4, resulting in a field strength equivalent to a signal level of "15". When the modulation input code "B4B3B2B1" is "1111", the amount of phase shift is φ0+φ1+φ2+φ3+φ4, resulting in a field strength equivalent to a signal level of "16".

[0105] The amount of phase shift φ of the optical modulator 3B is given by (Equation 7).

[0106]

number

[0107] The optical modulator 3B adjusts the ratio of the electrode lengths of the phase shifters so that the electric field strengths for each signal level (1 to 16) are equally spaced. For example, in the case of 4-bit support, the electrode length L1 of the first phase shifter 16A, the electrode length L2 of the second phase shifter 16B, and the electrode length L of the third phase shifter 16C are 3、 The ratio of the electrode lengths L4 of the fourth phase shifter 16D is, for example, L1:L2:L 3: Let L4 = 153:234:284:328. As a result, the electric field strength for each signal level (1 to 16) is equally spaced, so that the linear portion of the sine curve representing the corresponding relationship between the electric field strength of the optical modulated signal and the amount of phase shift can be sufficiently secured.

[0108] That is, upper arm 15A1 uses each phase shifter to intensity-modulate the optical signal with the data signal, and outputs the intensity-modulated optically modulated signal to multiplexer 23. Lower arm 15B1 uses each phase shifter C to intensity-modulate the optical signal with the data signal, and outputs the intensity-modulated optically modulated signal to multiplexer 23. Then, multiplexer 23 multiplexes the optically modulated signal from upper arm 15A1 and the optically modulated signal from lower arm 15B1, and outputs the multiplexed optically modulated signal to output unit 24.

[0109] In the optical modulator 3B of the third embodiment, the gray code of the data signal is converted into a modulation input code so that the electric field strength of each signal level (1 to 16) is spaced at equal intervals, and the electrode lengths of the phase shifters of the upper arm 15A1 and the lower arm 15B1 that apply a data signal corresponding to the converted modulation input code are adjusted. As a result, the linear portion of the sine curve that represents the correspondence between the electric field strength and the amount of phase shift is sufficiently secured, so that the modulation loss and power consumption can be suppressed while the signal level intervals are spaced at equal intervals.

[0110] In the optical modulator 3B of the third embodiment, the electric field intensity is adjusted by adjusting the amount of phase shift according to the modulation input code. However, the optical modulator 3B may adjust the light intensity instead of the electric field intensity, and such an embodiment will be described below as the fourth embodiment. The same components as those of the optical modulator 3B of the third embodiment are given the same reference numerals, and the description of the overlapping components and operations will be omitted. The third embodiment is a phase modulation, but the fourth embodiment will describe the case of intensity modulation. FIG. 13 is a schematic plan view showing an example of the configuration of the optical modulator 3C of the fourth embodiment. EXAMPLES

[0111] 13 includes a data modulation unit 11, an encoder 12, an upper arm 15A1, a lower arm 15B1, and N DACs 13. The data modulation unit 11 modulates an N-bit digital electrical input signal into a bit string data signal.

[0112] The encoder 12 converts the bit string data signal into a modulation input code. The encoder 12 converts a first bit value b1 in the bit string data signal into a first bit value B1 in the modulation input code. The encoder 12 converts a second bit value b2 in the bit string data signal into a second bit value B2 in the modulation input code. The encoder 12 converts an Nth bit value b N The Nth bit value B in the modulation input code N Convert to.

[0113] The upper arm 15A1 has N phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, and an Nth phase shifter 16N. The lower arm 15B1 also has N phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, and an Nth phase shifter 16N. The first phase shifters 16A of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L1, and the second phase shifters 16B of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L2. The Nth phase shifter 16N of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L3. N It is.

[0114] Since the DAC 13 has N bits, it has N voltage conversion units, for example, a first voltage conversion unit 17A, a second voltage conversion unit 17B, and an Nth voltage conversion unit 17N. The first voltage conversion unit 17A applies a data signal of a first bit value B1 after voltage conversion to an electrode of a first phase shifter 16A of the upper arm 15A1. The first voltage conversion unit 17A inverts the data signal of the first bit value B1 after voltage conversion, and applies the inverted data signal of the first bit value B1 to an electrode of a first phase shifter 16A of the lower arm 15B1. The second voltage conversion unit 17B applies a data signal of a second bit value B2 after voltage conversion to an electrode of a second phase shifter 16B of the upper arm 15A1. The second voltage conversion unit 17B inverts the data signal of the second bit value B2 after the voltage conversion, and applies the inverted data signal of the second bit value B2 to the electrode of the second phase shifter 16B of the lower arm 15B1. N The data signal is applied to the electrode of the Nth phase shifter 16N of the upper arm 15A1. The Nth voltage conversion unit 17N outputs the Nth bit value B N The data signal is inverted and the inverted Nth bit value B N The data signal is applied to the electrode of the Nth phase shifter 16N in the lower arm 15B1.

[0115] The first phase shifter 16A of the upper arm 15A1 intensity-modulates the optical signal with a data signal of a first bit value B1 from the first voltage conversion unit 17A. The first phase shifter 16A of the lower arm 15B1 intensity-modulates the optical signal with a data signal after inversion of the first bit value B1 from the first voltage conversion unit 17A. The second phase shifter 16B of the upper arm 15A1 intensity-modulates the optical signal with a data signal of a second bit value B2 from the second voltage conversion unit 17B. The second phase shifter 16B of the lower arm 15B1 intensity-modulates the optical signal with a data signal after inversion of the second bit value B2 from the second voltage conversion unit 17B. The Nth phase shifter 16N of the upper arm 15A1 intensity-modulates the optical signal with a data signal of the Nth bit value B1 from the Nth voltage conversion unit 17N. NThe Nth phase shifter 16N of the lower arm 15B1 modulates the intensity of the optical signal with the Nth data signal. N The optical signal is intensity-modulated by the inverted data signal.

[0116] FIG. 14 is an explanatory diagram showing an example of the correspondence relationship between the optical intensity and the phase shift of the optical modulation signal of the optical modulator 3C. For convenience of explanation, a case where N bits are 4 bits will be described. When the first bit "B1" of the modulation input code is "1", a data signal is applied to the first phase shifter 16A to add the phase shift amount φ1 from the phase shift amount φ0. When the second bit "B2" of the modulation input code is "1", a data signal is applied to the second phase shifter 16B to add the phase shift amount φ2 from the phase shift amount φ0. When the third bit "B3" of the modulation input code is "1", a data signal is applied to the third phase shifter 16C to add the phase shift amount φ3 from the phase shift amount φ0. When the fourth bit "B4" of the modulation input code is "1", a data signal is applied to the fourth phase shifter 16D to add the phase shift amount φ4 from the phase shift amount φ0.

[0117] When the modulation input code "B4B3B2B1" is "0000", the phase shift amount is φ0, resulting in a light intensity equivalent to a signal level of "1". When the modulation input code "B4B3B2B1" is "0001", the phase shift amount is φ0 + φ1, resulting in a light intensity equivalent to a signal level of "2". When the modulation input code "B4B3B2B1" is "0010", the phase shift amount is φ0 + φ2, resulting in a light intensity equivalent to a signal level of "3". When the modulation input code "B4B3B2B1" is "0100", the phase shift amount is φ0 + φ3, resulting in a light intensity equivalent to a signal level of "4". When the modulation input code "B4B3B2B1" is "1000", the phase shift amount is φ0 + φ4, resulting in a light intensity equivalent to a signal level of "5".

[0118] When the modulation input code "B4B3B2B1" is "0011", the phase shift amount is φ0+φ1+φ2, resulting in an optical intensity equivalent to a signal level of "6". When the modulation input code "B4B3B2B1" is "0101", the phase shift amount is φ0+φ1+φ3, resulting in an optical intensity equivalent to a signal level of "7". When the modulation input code "B4B3B2B1" is "1001", the phase shift amount is φ0+φ1+φ4, resulting in an optical intensity equivalent to a signal level of "8". When the modulation input code "B4B3B2B1" is "0110", the phase shift amount is φ0+φ2+φ3, resulting in an optical intensity equivalent to a signal level of "9". When the modulation input code "B4B3B2B1" is "1010", the phase shift amount is φ0+φ2+φ4, resulting in an optical intensity equivalent to a signal level of "10". When the modulation input code "B4B3B2B1" is "1100", the amount of phase shift is φ0+φ3+φ4, resulting in an optical intensity equivalent to a signal level of "11".

[0119] When the modulation input code "B4B3B2B1" is "0111", the phase shift amount is φ0+φ1+φ2+φ3, resulting in an optical intensity equivalent to a signal level of "12". When the modulation input code "B4B3B2B1" is "1011", the phase shift amount is φ0+φ1+φ2+φ4, resulting in an optical intensity equivalent to a signal level of "13". When the modulation input code "B4B3B2B1" is "1101", the phase shift amount is φ0+φ1+φ3+φ4, resulting in an optical intensity equivalent to a signal level of "14". When the modulation input code "B4B3B2B1" is "1110", the phase shift amount is φ0+φ2+φ3+φ4, resulting in an optical intensity equivalent to a signal level of "15". When the modulation input code "B4B3B2B1" is "1111", the amount of phase shift is φ0+φ1+φ2+φ3+φ4, resulting in an optical intensity equivalent to a signal level of "16".

[0120] The optical intensity of the optical modulator 3C is given by (Equation 8).

[0121]

number

[0122] The optical modulator 3C adjusts the ratio of the electrode length L3 of each phase shifter so that the optical intensity for each signal level (1 to 16) is equally spaced. As a result, the optical intensity for each signal level (1 to 16) is equally spaced, so that the linear portion of the sine curve that represents the corresponding relationship between the optical intensity of the optical modulated signal and the amount of phase shift can be sufficiently secured.

[0123] That is, upper arm 15A1 uses each phase shifter to intensity-modulate the optical signal with the data signal, and outputs the intensity-modulated optically modulated signal to multiplexer 23. Lower arm 15B1 uses each phase shifter C to intensity-modulate the optical signal with the data signal, and outputs the intensity-modulated optically modulated signal to multiplexer 23. Then, multiplexer 23 multiplexes the optically modulated signal from upper arm 15A1 and the optically modulated signal from lower arm 15B1, and outputs the multiplexed optically modulated signal to output unit 24.

[0124] In the optical modulator 3C of the fourth embodiment, the gray code of the data signal is converted into a modulation input code so that the optical intensity for each signal level (1 to 16) is spaced at equal intervals, and the electrode lengths of the phase shifters of the upper arm 15A1 and the lower arm 15B1 that apply a data signal corresponding to the converted modulation input code are adjusted. As a result, the linear portion of the sine curve that represents the correspondence between the optical intensity and the amount of phase shift is sufficiently secured, so that the modulation loss and power consumption can be suppressed while the signal level intervals are spaced at equal intervals. EXAMPLES

[0125] FIG. 15 is a schematic plan view showing an example of the configuration of an optical modulator 3D of the fifth embodiment. The optical modulator 3D shown in FIG. 15 includes a data modulation unit 11, an encoder 12, a DAC 13, an optical waveguide 14, two arms 15 arranged on the optical waveguide 14, and two heaters 18. The data modulation unit 11 modulates a 3-bit digital electrical input signal into a bit-string data signal. The encoder 12 converts the bit-string data signal into a modulation input code. The encoder 12 converts a first bit value b1 in the bit-string data signal into a first bit value B1 in the modulation input code. The encoder 12 converts a second bit value b2 in the bit-string data signal into a second bit value B2 in the modulation input code. The encoder 12 converts a third bit value b3 in the bit-string data signal into a third bit value B3 in the modulation input code.

[0126] FIG. 16 is an explanatory diagram showing an example of the correspondence between the input and output of the 3-bit encoder 12. As shown in FIG. 16, the encoder 12 converts the Gray code "b3b2b1" of the data signal into the modulation input code "B3B2B1". When the Gray code is "100", the encoder 12 converts the Gray code "100" into the modulation input code "111". When the Gray code is "001", the encoder 12 converts the Gray code "001" into the modulation input code "001". When the Gray code is "011", the encoder 12 converts the Gray code "011" into the modulation input code "010". When the Gray code is "010", the encoder 12 converts the Gray code "010" into the modulation input code "100". When the Gray code is "110", the encoder 12 converts the Gray code "110" into the modulation input code "011". When the Gray code is "111", the encoder 12 converts the Gray code "111" to the modulation input code "101". When the Gray code is "101", the encoder 12 converts the Gray code "101" to the modulation input code "110". When the Gray code is "100", the encoder 12 converts the Gray code "100" to the modulation input code "111".

[0127] The DAC 13 performs analog conversion, i.e., voltage conversion, of the modulation input code of the data signal from the encoder 12. The DAC 13 is 3-bit, and therefore has three voltage conversion units, for example, a first voltage conversion unit 17A, a second voltage conversion unit 17B, and a third voltage conversion unit 17C. The first voltage conversion unit 17A performs voltage conversion of the data signal of the first bit value B1 of the modulation input code from the encoder 12. The second voltage conversion unit 17B performs voltage conversion of the data signal of the second bit value B2 of the modulation input code from the encoder 12. The third voltage conversion unit 17C performs voltage conversion of the data signal of the third bit value B3 of the modulation input code from the encoder 12.

[0128] The optical waveguide 14 has a waveguide core of Si or the like, and a waveguide clad of SiO2 or the like. The optical waveguide 14 has an input section 21, a branching section 22, a multiplexing section 23, and an output section 24. The input section 21 inputs an optical signal (CW light) from the light source 2. The branching section 22 branches the optical signal from the input section 21 to each arm 15. The two arms 15 are, for example, MZ (Mach-Zehnder) interferometers having an upper arm 15A1 and a lower arm 15B1.

[0129] Upper arm 15A1 intensity-modulates the optical signal from light source 2 with the analog-converted data signal, and outputs an intensity-modulated horizontally polarized optically modulated signal. Lower arm 15B1 intensity-modulates the optical signal from light source 2 with the analog-converted data signal, and outputs an intensity-modulated vertically polarized optically modulated signal. Since the data signal is a 3-bit digital signal, arm 15 outputs an 8-level optically modulated signal from signal level 1 to signal level 8.

[0130] The upper arm 15A1 has a first phase shifter group, which is a plurality of phase shifters connected in series, for example, a first phase shifter 16A, a second phase shifter 16B, and a third phase shifter 16C. The phase shifters are configured of N-type and P-type. The lower arm 15B1 also has a second phase shifter group, which is a plurality of phase shifters connected in series, for example, a first phase shifter 16A, a second phase shifter 16B, and a third phase shifter 16C. The first phase shifters 16A of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L1, and the second phase shifters 16B of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L2. Furthermore, the third phase shifters 16C of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L3.

[0131] The first voltage conversion unit 17A applies the data signal of the first bit value B1 after the voltage conversion to the electrode of the first phase shifter 16A of the upper arm 15A1. The first voltage conversion unit 17A inverts the data signal of the first bit value B1 after the voltage conversion, and applies the data signal of the first bit value B1 after the inversion to the electrode of the first phase shifter 16A of the lower arm 15B1. The second voltage conversion unit 17B applies the data signal of the second bit value B2 after the voltage conversion to the electrode of the second phase shifter 16B of the upper arm 15A1. The second voltage conversion unit 17B inverts the data signal of the second bit value B2 after the voltage conversion, and applies the data signal of the second bit value B2 after the inversion to the electrode of the second phase shifter 16B of the lower arm 15B1. The third voltage conversion unit 17C applies the voltage-converted data signal of the third bit value B3 to an electrode of the third phase shifter 16C in the upper arm 15A1. The third voltage conversion unit 17C inverts the voltage-converted data signal of the third bit value B3, and applies the inverted data signal of the third bit value B3 to an electrode of the third phase shifter 16C in the lower arm 15B1.

[0132] The phase shift amounts φ1, φ2, φ3, and φ0 of the optical modulator 3D are as shown in (Equation 9). The phase shift amount φ1 is about 0.57 rad, the phase shift amount φ2 is about 0.91 rad, the phase shift amount φ3 is about 1.2 rad, and the phase shift amount φ0 is about 3.37 rad.

[0133]

number

[0134] In the optical modulator 3D, the ratio of the electrode length L1 of the first phase shifter 16A, the electrode length L2 of the second phase shifter 16B, and the electrode length L3 of the third phase shifter 16C is set to, for example, L1:L2:L3=21:34:45 so that the electric field strength for each signal level (1 to 8) is at equal intervals. As a result, since the electric field strength for each signal level (1 to 8) is at equal intervals, it is possible to sufficiently secure the linear portion of the sine curve that represents the corresponding relationship between the electric field strength and the amount of phase shift of the ASK8 modulated signal.

[0135] The heater 18 includes an upper heater 18A1 and a lower heater 18B1. The upper heater 18A1 adjusts the amount of phase shift of the upper arm 15A1 in response to temperature adjustment. The lower heater 18B1 adjusts the amount of phase shift of the lower arm 15B1 in response to temperature adjustment.

[0136] The first phase shifter 16A of the upper arm 15A1 intensity-modulates the optical signal with a data signal of a first bit value B1 from the first voltage conversion unit 17A. The first phase shifter 16A of the lower arm 15B1 intensity-modulates the optical signal with a data signal of the first bit value B1 after inversion from the first voltage conversion unit 17A. The second phase shifter 16B of the upper arm 15A1 intensity-modulates the optical signal with a data signal of a second bit value B2 from the second voltage conversion unit 17B. The second phase shifter 16B of the lower arm 15B1 intensity-modulates the optical signal with a data signal of the second bit value B2 after inversion from the second voltage conversion unit 17B. The third phase shifter 16C of the upper arm 15A1 intensity-modulates the optical signal with a data signal of a third bit value B3 from the third voltage conversion unit 17C. Moreover, the third phase shifter 16C in the lower arm 15B1 intensity-modulates the optical signal with the data signal after inversion of the third bit value B3 from the third voltage conversion unit 17C.

[0137] The upper arm 15A1 outputs the optically modulated signal intensity-modulated with the data signal to the multiplexing unit 23. Furthermore, the lower arm 15B1 outputs the optically modulated signal intensity-modulated with the data signal to the multiplexing unit 23. The multiplexing unit 23 multiplexes the optically modulated signal intensity-modulated by the upper arm 15A1 and the optically modulated signal intensity-modulated by the lower arm 15B1, and outputs an ASK8 modulated signal. Figure 17 is an explanatory diagram showing an example of the symbol of the optical modulator 3D. The symbol shown in Figure 17 is the symbol of the ASK8 modulated signal output by the optical modulator 3D.

[0138] In the optical modulator 3D of the fifth embodiment, the gray code of the data signal is converted into a modulation input code so that the electric field strength of each signal level (1 to 8) is spaced at equal intervals, and the electrode lengths of the phase shifters of the upper arm 15A1 and the lower arm 15B1 that apply a data signal corresponding to the converted modulation input code are adjusted. As a result, the linear portion of the sine curve that represents the correspondence between the electric field strength and the amount of phase shift is sufficiently secured, so that the modulation loss and power consumption can be suppressed while the signal level intervals are spaced at equal intervals. EXAMPLES

[0139] FIG. 18 is a schematic plan view showing an example of the configuration of an optical modulator 3G according to a sixth embodiment. The same components as those of the optical modulator 3D according to the fifth embodiment are given the same reference numerals, and the description of the overlapping components and operations is omitted. The data modulation unit 11 in the optical modulator 3G shown in FIG. 18 modulates the data signal, which is a 4-bit digital electrical input signal. The encoder 12 converts the bit string data signal into a modulation input code. The encoder 12 converts a first bit value b1 in the bit string data signal into a first bit value B1 in the modulation input code. The encoder 12 converts a second bit value b2 in the bit string data signal into a second bit value B2 in the modulation input code. The encoder 12 converts a third bit value b3 in the bit string data signal into a third bit value B3 in the modulation input code. The encoder 12 converts a fourth bit value b4 in the bit string data signal into a fourth bit value B4 in the modulation input code.

[0140] Fig. 19 is an explanatory diagram showing an example of the correspondence between the input and output of the 4-bit encoder 12. As shown in Fig. 19, the encoder 12 converts the Gray code "b4b3b2b1" of the data signal into the modulation input code "B4B3B2B1". For example, when the Gray code is "1000", the encoder 12 converts the Gray code "1000" into the modulation input code "1111". For example, when the Gray code is "1001", the encoder 12 converts the Gray code "1001" into the modulation input code "1110". For example, when the Gray code is "1011", the encoder 12 converts the Gray code "1011" into the modulation input code "1101".

[0141] Since the DAC 13 is 4-bit, it has four voltage conversion units, for example, a first voltage conversion unit 17A, a second voltage conversion unit 17B, a third voltage conversion unit 17C, and a fourth voltage conversion unit 17D. The first voltage conversion unit 17A performs voltage conversion on a data signal of a first bit value B1 of the modulation input code from the encoder 12. The second voltage conversion unit 17B performs voltage conversion on a data signal of a second bit value B2 of the modulation input code from the encoder 12. The third voltage conversion unit 17C performs voltage conversion on a data signal of a third bit value B3 of the modulation input code from the encoder 12. The fourth voltage conversion unit 17D performs voltage conversion on a data signal of a fourth bit value B4 of the modulation input code from the encoder 12.

[0142] Upper arm 15A1 intensity-modulates the optical signal from light source 2 with the analog-converted data signal, and outputs an intensity-modulated horizontally polarized optical modulated signal. Lower arm 15B1 intensity-modulates the optical signal from light source 2 with the analog-converted data signal, and outputs an intensity-modulated vertically polarized optical modulated signal. Since the data signal is a 4-bit digital signal, arm 15 outputs an optical modulated signal with 16 levels, from signal level 1 to signal level 16.

[0143] The upper arm 15A1 has a first phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, a third phase shifter 16C, and a fourth phase shifter 16D. The lower arm 15B1 also has a second phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, a third phase shifter 16C, and a fourth phase shifter 16D. The first phase shifters 16A of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L1, and the second phase shifters 16B of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L2. Furthermore, the third phase shifters 16C in the upper arm 15A1 and the lower arm 15B1 have the same electrode length L3, and the fourth phase shifters 16D in the upper arm 15A1 and the lower arm 15B1 have the same electrode length L4.

[0144] The first voltage conversion unit 17A applies the data signal of the first bit value B1 after the voltage conversion to the electrode of the first phase shifter 16A of the upper arm 15A1. The first voltage conversion unit 17A inverts the data signal of the first bit value B1 after the voltage conversion, and applies the data signal of the first bit value B1 after the inversion to the electrode of the first phase shifter 16A of the lower arm 15B1. The second voltage conversion unit 17B applies the data signal of the second bit value B2 after the voltage conversion to the electrode of the second phase shifter 16B of the upper arm 15A1. The second voltage conversion unit 17B inverts the data signal of the second bit value B2 after the voltage conversion, and applies the data signal of the second bit value B2 after the inversion to the electrode of the second phase shifter 16B of the lower arm 15B1.

[0145] The third voltage conversion unit 17C applies the data signal of the third bit value B3 after the voltage conversion to the electrode of the third phase shifter 16C of the upper arm 15A1. The third voltage conversion unit 17C inverts the data signal of the third bit value B3 after the voltage conversion, and applies the data signal of the third bit value B3 after the inversion to the electrode of the third phase shifter 16C of the lower arm 15B1. The fourth voltage conversion unit 17D applies the data signal of the fourth bit value B4 after the voltage conversion to the electrode of the fourth phase shifter 16D of the upper arm 15A1. The fourth voltage conversion unit 17D inverts the data signal of the fourth bit value B4 after the voltage conversion, and applies the data signal of the fourth bit value B4 after the inversion to the electrode of the fourth phase shifter 16D of the lower arm 15B1.

[0146] In the optical modulator 3G, the ratio of the first phase shifter 16A, the second phase shifter 16B, the third phase shifter 16C and the fourth phase shifter 16D is set to, for example, L1:L2:L3:L4=153:234:284:328 so that the electric field strength for each signal level (1 to 16) is at equal intervals. As a result, since the electric field strength for each signal level (1 to 16) is at equal intervals, it is possible to sufficiently secure the linear portion of the sine curve that represents the corresponding relationship between the electric field strength and the amount of phase shift of the ASK16 modulated signal.

[0147] The first phase shifter 16A of the upper arm 15A1 intensity-modulates the optical signal with a data signal of a first bit value B1 from the first voltage conversion unit 17A. The first phase shifter 16A of the lower arm 15B1 intensity-modulates the optical signal with a data signal of the first bit value B1 after inversion from the first voltage conversion unit 17A. The second phase shifter 16B of the upper arm 15A1 intensity-modulates the optical signal with a data signal of a second bit value B2 from the second voltage conversion unit 17B. The second phase shifter 16B of the lower arm 15B1 intensity-modulates the optical signal with a data signal of the second bit value B2 after inversion from the second voltage conversion unit 17B. The third phase shifter 16C of the upper arm 15A1 intensity-modulates the optical signal with a data signal of a third bit value B3 from the third voltage conversion unit 17C. The third phase shifter 16C of the lower arm 15B1 intensity-modulates the optical signal with the data signal with the inverted third bit value B3 from the third voltage conversion unit 17C. The fourth phase shifter 16D of the upper arm 15A1 intensity-modulates the optical signal with the data signal with the fourth bit value B4 from the fourth voltage conversion unit 17D. The fourth phase shifter 16D of the lower arm 15B1 intensity-modulates the optical signal with the data signal with the inverted fourth bit value B4 from the fourth voltage conversion unit 17D.

[0148] The upper arm 15A1 outputs the optically modulated signal intensity-modulated with the data signal to the multiplexing unit 23. Furthermore, the lower arm 15B1 outputs the optically modulated signal intensity-modulated with the data signal to the multiplexing unit 23. The multiplexing unit 23 multiplexes the optically modulated signal intensity-modulated by the upper arm 15A1 and the optically modulated signal intensity-modulated by the lower arm 15B1, and outputs an ASK16 modulated signal. Figure 20 is an explanatory diagram showing an example of the symbols of the optical modulator 3G. The symbols shown in Figure 20 are symbols of the ASK16 modulated signal output by the optical modulator 3G.

[0149] The optical modulator 3G of the sixth embodiment converts the gray code of the data signal into a modulation input code so that the electric field strength for each signal level (1 to 16) is at equal intervals, and adjusts the electrode length of each phase shifter that applies a data signal corresponding to the converted modulation input code. As a result, the linear portion of the sine curve that represents the corresponding relationship between the electric field strength and the amount of phase shift is sufficiently secured, so that the modulation loss and power consumption can be suppressed while the signal level intervals are kept at equal intervals. EXAMPLES

[0150] FIG. 21 is a schematic plan view showing an example of the configuration of an optical modulator 3J according to a seventh embodiment. The same components as those of the optical modulator 3D according to the fifth embodiment are given the same reference numerals, and the description of the overlapping components and operations is omitted. The data modulation unit 11 in the optical modulator 3J shown in FIG. 21 modulates the data signal, which is a 5-bit digital electrical input signal. The encoder 12 converts the bit string data signal into a modulation input code. The encoder 12 converts a first bit value b1 in the bit string data signal into a first bit value B1 in the modulation input code. The encoder 12 converts a second bit value b2 in the bit string data signal into a second bit value B2 in the modulation input code. The encoder 12 converts a third bit value b3 in the bit string data signal into a third bit value B3 in the modulation input code. The encoder 12 converts a fourth bit value b4 in the bit string data signal into a fourth bit value B4 in the modulation input code. The encoder 12 converts the fifth bit value b5 in the bit string data signal to the fifth bit value B5 in the modulation input code.

[0151] Fig. 22 is an explanatory diagram showing an example of the correspondence between the input and output of the 5-bit encoder 12. As shown in Fig. 22, the encoder 12 converts the Gray code "b5b4b3b2b1" of the data signal into the modulation input code "B5B4B3B2B1". For example, when the Gray code is "10000", the encoder 12 converts the Gray code "10000" into the modulation input code "11111". For example, when the Gray code is "10001", the encoder 12 converts the Gray code "10001" into the modulation input code "11110". For example, when the Gray code is "10011", the encoder 12 converts the Gray code "10011" into the modulation input code "11101".

[0152] Fig. 23A is an explanatory diagram showing an example of the correspondence between the signal level of the 5-bit compatible encoder 12 and the modulation input code. In Fig. 23A, when the modulation input code "B5B4B3B2B1" is "00000", the signal level is "1", and when the modulation input code "B5B4B3B2B1" is "00001", the signal level is "2". When the modulation input code "B5B4B3B2B1" is "00010", the signal level is "3", and when the modulation input code "B5B4B3B2B1" is "00100", the signal level is "4". When the modulation input code "B5B4B3B2B1" is "01000", the signal level is "5", and when the modulation input code "B5B4B3B2B1" is "10000", the signal level is "6".

[0153] When the modulation input code "B5B4B3B2B1" is "01111", the signal level is "27", and when the modulation input code "B5B4B3B2B1" is "10111", the signal level is "28". When the modulation input code "B5B4B3B2B1" is "11011", the signal level is "29", and when the modulation input code "B5B4B3B2B1" is "11101", the signal level is "30". When the modulation input code "B5B4B3B2B1" is "11110", the signal level is "31", and when the modulation input code "B5B4B3B2B1" is "11111", the signal level is "23".

[0154] Focus on the number of "1"s in the modulation input code "B5B4B3B2B1". When there are 0 bit values ​​of "1", the signal level is "1", when there is 1 bit value of "1", the signal level is "2" to "6", when there are 2 bit values ​​of "1", the signal level is "7" to "16". When there are 3 bit values ​​of "1", the signal level is "17" to "26", when there are 4 bit values ​​of "1", the signal level is "27" to "31", when there are 5 bit values ​​of "1", the signal level is "32". A bit string with 4 bit values ​​of "1" is arranged from the smallest of the N-digit binary numbers, and the "1" and "0" are inverted and the left and right are reversed. A bit string with 3 bit values ​​of "1" is arranged from the smallest of the N-digit binary numbers, and the "1" and "0" are inverted and the left and right are reversed. A bit string with two bit values ​​of "1" is arranged in ascending order of an N-digit binary number with "1" and "0" inverted and left-right reversed. A bit string with one bit value of "1" is arranged in ascending order of an N-digit binary number with "1" and "0" inverted and left-right reversed.

[0155] The bit configurations in the modulation input code "B5B4B3B2B1" for signal levels "1" and "32" are symmetrical with "0" and "1" bit inversion, and the bit configurations in the modulation input code "B5B4B3B2B1" for signal levels "2" and "31" are symmetrical. The bit configurations in the modulation input code "B5B4B3B2B1" for signal levels "3" and "30" are symmetrical, and the bit configurations in the modulation input code "B5B4B3B2B1" for signal levels "4" and "29" are symmetrical. The bit configurations in the modulation input code "B5B4B3B2B1" for signal levels "5" and "28" are symmetrical, and the bit configurations in the modulation input code "B5B4B3B2B1" for signal levels "6" and "27" are symmetrical. The bit configurations in the modulation input code "B5B4B3B2B1" for signal levels "7" and "26" are symmetrical, and the bit configurations in the modulation input code "B5B4B3B2B1" for signal levels "8" and "25" are symmetrical.

[0156] In order to establish the correspondence between the increase in signal level and the increase in phase shift amount, on the premise of the lengths of B1, B2, B3, B4, and B5, it is ensured that the length of B1 < the length of B2 < the length of B3 < the length of B4 < the length of B5 < the length of B1 + B2, the length of B1 + B5 < the length of B2 + B3, the length of B2 + B5 < the length of B3 + B4, and the length of B4 + B5 < the length of B1 + B2 + B3. Note that the length of B1 is the electrode length of the first phase shifter 16A, the length of B2 is the electrode length of the second phase shifter 16B, the length of B3 is the electrode length of the third phase shifter 16C, the length of B4 is the electrode length of the fourth phase shifter 16D, and the length of B5 is the electrode length of the fifth phase shifter 16E. As a result, directly from signal level "1" to signal level "16", the correspondence between the increase in signal level and the increase in phase shift amount can be established. Also, for the levels from signal level "17" to signal level "32", since the levels from signal level "1" to signal level "16" are folded back and sign-inverted, the correspondence between the increase in signal level and the increase in phase shift amount can be established.

[0157] Figure 23B is an explanatory diagram showing an example of the creation rule of the symbol mapping shown in Figure 23A. For the sake of convenience in explanation, the number of bits N of the modulation input code in the symbol mapping is set to N = 5 bits. As the creation rule, N-digit binary numbers with N - 1 (e.g., "4") "1" bits are arranged in ascending order, N-digit binary numbers with N - 2 (e.g., "3") "1" bits are arranged in ascending order, N-digit binary numbers with N - 3 (e.g., "2") "1" bits are arranged in ascending order, and N-digit binary numbers with N - 4 (e.g., "1") "1" bits are arranged in ascending order.

[0158] Furthermore, as the creation rule, the "1"s and "0"s in the N-digit binary number with N - 1 (e.g., "4") "1" bits after rearrangement are inverted, the "1"s and "0"s in the N-digit binary number with N - 2 (e.g., "3") "1" bits after rearrangement are inverted, the "1"s and "0"s in the N-digit binary number with N - 3 (e.g., "2") "1" bits after rearrangement are inverted, and the "1"s and "0"s in the N-digit binary number with N - 4 (e.g., "1") "1" bits after rearrangement are inverted.

[0159] Further, the creation rules are to left-right invert an N-digit binary number with N-1 bit values ​​of "1" (e.g., "4") after inversion, to left-right invert an N-digit binary number with N-2 bit values ​​of "1" (e.g., "3") after inversion, to left-right invert an N-digit binary number with N-3 bit values ​​of "1" (e.g., "2") after inversion, and to left-right invert an N-digit binary number with N-4 bit values ​​of "1" (e.g., "1") after inversion. Then, the symbol mapping shown in FIG. 23A can be created according to these creation rules.

[0160] Since the DAC 13 is 5-bit, it has five voltage conversion units, for example, a first voltage conversion unit 17A, a second voltage conversion unit 17B, a third voltage conversion unit 17C, a fourth voltage conversion unit 17D, and a fifth voltage conversion unit 17E. The first voltage conversion unit 17A performs voltage conversion on a data signal of a first bit value B1 of the modulation input code from the encoder 12. The second voltage conversion unit 17B performs voltage conversion on a data signal of a second bit value B2 of the modulation input code from the encoder 12. The third voltage conversion unit 17C performs voltage conversion on a data signal of a third bit value B3 of the modulation input code from the encoder 12. The fourth voltage conversion unit 17D performs voltage conversion on a data signal of a fourth bit value B4 of the modulation input code from the encoder 12. The fifth voltage conversion unit 17E performs voltage conversion on a data signal of a fifth bit value B5 of the modulation input code from the encoder 12.

[0161] The upper arm 15A1 intensity-modulates the optical signal from the light source 2 with the data signal after analog conversion, and outputs an intensity-modulated horizontally polarized optically modulated signal. The lower arm 15B1 intensity-modulates the optical signal from the light source 2 with the data signal after analog conversion, and outputs an intensity-modulated vertically polarized optically modulated signal. Since the data signal is a 5-bit digital signal, the arm 15 outputs an optically modulated signal with 32 values ​​from signal level 1 to signal level 32.

[0162] The upper arm 15A1 has a first phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, a third phase shifter 16C, a fourth phase shifter 16D, and a fifth phase shifter 16E. The lower arm 15B1 also has a second phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, a third phase shifter 16C, a fourth phase shifter 16D, and a fifth phase shifter 16E. The first phase shifters 16A of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L1, and the second phase shifters 16B of the upper arm 15A1 and the lower arm 15B1 have the same electrode length L2. The third phase shifters 16C in the upper arm 15A1 and the lower arm 15B1 have the same electrode length L3, the fourth phase shifters 16D in the upper arm 15A1 and the lower arm 15B1 have the same electrode length L4, and the fifth phase shifters 16E in the upper arm 15A1 and the lower arm 15B1 have the same electrode length L5.

[0163] The first voltage conversion unit 17A applies the data signal of the first bit value B1 after the voltage conversion to the electrode of the first phase shifter 16A of the upper arm 15A1. The first voltage conversion unit 17A inverts the data signal of the first bit value B1 after the voltage conversion, and applies the data signal of the first bit value B1 after the inversion to the electrode of the first phase shifter 16A of the lower arm 15B1. The second voltage conversion unit 17B applies the data signal of the second bit value B2 after the voltage conversion to the electrode of the second phase shifter 16B of the upper arm 15A1. The second voltage conversion unit 17B inverts the data signal of the second bit value B2 after the voltage conversion, and applies the data signal of the second bit value B2 after the inversion to the electrode of the second phase shifter 16B of the lower arm 15B1. The third voltage conversion unit 17C applies the voltage-converted data signal of the third bit value B3 to an electrode of the third phase shifter 16C in the upper arm 15A1. The third voltage conversion unit 17C inverts the voltage-converted data signal of the third bit value B3, and applies the inverted data signal of the third bit value B3 to an electrode of the third phase shifter 16C in the lower arm 15B1.

[0164] The fourth voltage conversion unit 17D applies the data signal of the fourth bit value B4 after the voltage conversion to the electrode of the fourth phase shifter 16D of the upper arm 15A1. The fourth voltage conversion unit 17D inverts the data signal of the fourth bit value B4 after the voltage conversion, and applies the data signal of the fourth bit value B4 after the inversion to the electrode of the fourth phase shifter 16D of the lower arm 15B1. The fifth voltage conversion unit 17E applies the data signal of the fifth bit value B5 after the voltage conversion to the electrode of the fifth phase shifter 16E of the upper arm 15A1. The fifth voltage conversion unit 17E inverts the data signal of the fifth bit value B5 after the voltage conversion, and applies the data signal of the fifth bit value B5 after the inversion to the electrode of the fifth phase shifter 16E of the lower arm 15B1.

[0165] The optical modulator 3J adjusts the ratio of the phase shift amount (electrode length) of the first to fifth phase shifters 16A to 16E so that the electric field strength for each signal level (1 to 32) is at equal intervals. For example, the ratio of the electrode lengths of the first phase shifter 16A, the second phase shifter 16B, the third phase shifter 16C, the fourth phase shifter 16D, and the fifth phase shifter 16E is set to, for example, L1:L2:L3:L4:L5=117:177:213:236:257. As a result, the electric field strength for each signal level (1 to 32) is at equal intervals, so that the linear portion of the sine curve that is the corresponding relationship between the electric field strength and the phase shift amount of the ASK32 modulated signal can be sufficiently secured.

[0166] The first phase shifter 16A of the upper arm 15A1 intensity-modulates the optical signal with a data signal of a first bit value B1 from the first voltage conversion unit 17A. The first phase shifter 16A of the lower arm 15B1 intensity-modulates the optical signal with a data signal of the first bit value B1 after inversion from the first voltage conversion unit 17A. The second phase shifter 16B of the upper arm 15A1 intensity-modulates the optical signal with a data signal of a second bit value B2 from the second voltage conversion unit 17B. The second phase shifter 16B of the lower arm 15B1 intensity-modulates the optical signal with a data signal of the second bit value B2 after inversion from the second voltage conversion unit 17B. The third phase shifter 16C of the upper arm 15A1 intensity-modulates the optical signal with a data signal of a third bit value B3 from the third voltage conversion unit 17C. Also, the third phase shifter 16C of the lower arm 15B1 intensity-modulates the optical signal with the data signal after the inversion of the third bit value B3 from the third voltage conversion unit 17C. The fourth phase shifter 16D of the upper arm 15A1 intensity-modulates the optical signal with the data signal after the inversion of the fourth bit value B4 from the fourth voltage conversion unit 17D. Also, the fourth phase shifter 16D of the lower arm 15B1 intensity-modulates the optical signal with the data signal after the inversion of the fourth bit value B4 from the fourth voltage conversion unit 17D. The fifth phase shifter 16E of the upper arm 15A1 intensity-modulates the optical signal with the data signal after the inversion of the fifth bit value B5 from the fifth voltage conversion unit 17E. Also, the fifth phase shifter 16E of the lower arm 15B1 intensity-modulates the optical signal with the data signal after the inversion of the fifth bit value B5 from the fifth voltage conversion unit 17E.

[0167] The upper arm 15A1 outputs the optically modulated signal intensity-modulated with the data signal to the multiplexing unit 23. Furthermore, the lower arm 15B1 outputs the optically modulated signal intensity-modulated with the data signal to the multiplexing unit 23. The multiplexing unit 23 multiplexes the optically modulated signal intensity-modulated by the upper arm 15A1 and the optically modulated signal intensity-modulated by the lower arm 15B1, and outputs an ASK32 modulated signal. Figure 24 is an explanatory diagram showing an example of the symbols of the optical modulator 3J. The symbols shown in Figure 24 are symbols of the ASK32 modulated signal output by the optical modulator 3J.

[0168] The optical modulator 3J of the seventh embodiment converts the Gray code of the data signal into a modulation input code so that the electric field strength for each signal level (1 to 32) is at equal intervals, and adjusts the electrode length of each phase shifter that applies a data signal corresponding to the converted modulation input code. As a result, the linear portion of the sine curve that represents the corresponding relationship between the electric field strength and the amount of phase shift is sufficiently secured, so that the modulation loss and power consumption can be suppressed while the signal level intervals are kept at equal intervals.

[0169] For convenience of explanation, a 5-bit compatible encoder 12 is illustrated, but the present invention is not limited to 5-bit compatible encoder 12, and an N-bit compatible encoder 12 may be used. Fig. 25A is an explanatory diagram showing an example of the correspondence between the signal level and the modulation input code of the N-bit compatible encoder 12. As shown in Fig. 25A, the signal level and the bit configuration in the modulation input code are in a symmetrical relationship in which "0" and "1" are reversed.

[0170] Fig. 25B is an explanatory diagram showing an example of a creation rule for the symbol mapping shown in Fig. 25A. For ease of explanation, the number of bits N of the modulation input code in the symbol mapping is assumed to be N bits. The creation rule is to arrange N-digit binary numbers with N-1 bit values ​​of "1" from the smallest to the largest, arrange N-digit binary numbers with N-2 bit values ​​of "1" from the smallest to the largest, and arrange N-digit binary numbers from the smallest to the largest until there is only one bit value of "1".

[0171] Furthermore, the creation rules are to invert the "1"s and "0"s in the N-digit binary number where the number of bit values ​​of "1" after rearrangement is N-1, to invert the "1"s and "0"s in the N-digit binary number where the number of bit values ​​of "1" after rearrangement is N-2, and to sequentially invert the "1"s and "0"s in the N-digit binary number until the number of bit values ​​of "1" is 1.

[0172] Further, as a creation rule, an N-digit binary number with N-1 bit values ​​of "1" after inversion is left-right inverted, an N-digit binary number with N-2 bit values ​​of "1" after inversion is left-right inverted, and so on until the number of bit values ​​of "1" is 1. Then, the symbol mapping shown in FIG. 25A can be created according to these creation rules. Note that the correspondence relationship between the increase in signal level and the increase in the amount of phase shift satisfies the creation rule of the symbol mapping in FIG. 25B. As a result, when the signal level goes from "1" to "2", N Up to the signal level “(2 / 2”, a direct correspondence can be established between an increase in the signal level and an increase in the amount of phase shift. N / 2)+1” to signal level “2 N The signal level of "1" to "2" N Since the sign of ".gtoreq.2" is inverted by folding back ".gtoreq.2", it is possible to ensure a correspondence between an increase in signal level and an increase in the amount of phase shift. EXAMPLES

[0173] FIG. 26 is a schematic plan view showing an example of the configuration of an optical modulator 3E of Example 8. The optical modulator 3E shown in FIG. 26 has an input-side branching section 41, a first optical modulation section 31A, a second optical modulation section 31B, an output-side multiplexing section 42, and an output-side branching section 43. The input-side branching section 41 branches an optical signal from the light source 2 into an I-side optical signal and a Q-side optical signal, outputs the I-side optical signal to the first optical modulation section 31A, and outputs the Q-side optical signal to the second optical modulation section 31B. The first optical modulation section 31A is a modulation section that intensity-modulates the I-side optical signal and outputs the intensity-modulated I-side ASK8 modulated signal. The second optical modulation section 31B is a modulation section that intensity-modulates the Q-side optical signal and outputs the intensity-modulated Q-side ASK8 modulated signal.

[0174] The first optical modulation unit 31A includes a first data modulation unit 11A, a first encoder 12A, a first DAC 13A, a first optical waveguide 14A, and a first upper arm 15A1 and a first lower arm 15B1 arranged on the first optical waveguide 14A. The first optical modulation unit 31A includes a first upper heater 18A1 and a first lower heater 18B1. The first data modulation unit 11A modulates the data signal of the bit string on the I side. The first encoder 12A converts the data signal of the bit string on the I side into a code for modulation input. The first encoder 12A converts a first bit value b1 in the data signal of the bit string on the I side into a first bit value B1 in the code for modulation input. The first encoder 12A converts a second bit value b2 in the data signal of the bit string on the I side into a second bit value B2 in the code for modulation input. The first encoder 12A converts the third bit value b3 in the data signal of the bit string on the I side into the third bit value B3 in the modulation input code.

[0175] FIG. 27 is an explanatory diagram showing an example of the correspondence between the input and output of the first encoder 12A and the second encoder 12B corresponding to 3 bits. As shown in FIG. 27, the first encoder 12A converts the Gray code "b3b2b1" of the data signal on the I side into the modulation input code "B3B2B1". When the Gray code is "100", the first encoder 12A converts the Gray code "100" into the modulation input code "111". When the Gray code is "001", the first encoder 12A converts the Gray code "001" into the modulation input code "001". When the Gray code is "011", the first encoder 12A converts the Gray code "011" into the modulation input code "010". When the Gray code is "010", the first encoder 12A converts the Gray code "010" into the modulation input code "100". When the Gray code is "110", the first encoder 12A converts the Gray code "110" to the modulation input code "011". When the Gray code is "111", the first encoder 12A converts the Gray code "111" to the modulation input code "101". When the Gray code is "101", the first encoder 12A converts the Gray code "101" to the modulation input code "110". When the Gray code is "100", the first encoder 12A converts the Gray code "100" to the modulation input code "111".

[0176] The first DAC 13A performs analog conversion, i.e., voltage conversion, of the modulation input code of the I-side data signal from the first encoder 12A. The first DAC 13A is 3-bit, and therefore has three voltage conversion units, for example, a first voltage conversion unit 17A, a second voltage conversion unit 17B, and a third voltage conversion unit 17C. The first voltage conversion unit 17A performs voltage conversion of the I-side data signal of the first bit value B1 of the modulation input code from the first encoder 12A. The second voltage conversion unit 17B performs voltage conversion of the I-side data signal of the second bit value B2 of the modulation input code from the first encoder 12A. The third voltage conversion unit 17C performs voltage conversion of the I-side data signal of the third bit value B3 of the modulation input code from the first encoder 12A.

[0177] The first optical waveguide 14A has a waveguide core such as Si and a waveguide clad such as SiO2. The first optical waveguide 14A has a first input section 21A, a first branching section 22A, a first multiplexing section 23A, and a first output section 24A. The first input section 21A inputs an I-side optical signal (CW light) from the input side branching section 41. The first branching section 22A branches the I-side optical signal from the first input section 21A to a first upper arm 15A1 and a first lower arm 15B1. For example, the first upper arm 15A1 and the first lower arm 15B1 are, for example, MZ interferometers.

[0178] The first upper arm 15A1 intensity-modulates the I-side optical signal with the I-side data signal after analog conversion, and outputs an intensity-modulated horizontally polarized optical modulated signal. The first lower arm 15B1 intensity-modulates the I-side optical signal with the I-side data signal after analog conversion, and outputs an intensity-modulated vertically polarized optical modulated signal. Since the I-side data signal is a 3-bit digital signal, the first upper arm 15A1 and the first lower arm 15B1 output the I-side ASK8 modulated signal, which is an 8-value optical modulated signal with signal levels 1 to 8.

[0179] The first upper arm 15A1 has a first phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, and a third phase shifter 16C. The first lower arm 15B1 also has a second phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, and a third phase shifter 16C. The first phase shifters 16A of the first upper arm 15A1 and the first lower arm 15B1 have the same electrode length L1, and the second phase shifters 16B of the first upper arm 15A1 and the first lower arm 15B1 have the same electrode length L2. Furthermore, the third phase shifter 16C of the first upper arm 15A1 and the first lower arm 15B1 have the same electrode length L3.

[0180] The first voltage conversion unit 17A applies the I-side data signal of the first bit value B1 after the voltage conversion to the electrode of the first phase shifter 16A of the first upper arm 15A1. The first voltage conversion unit 17A inverts the I-side data signal of the first bit value B1 after the voltage conversion, and applies the I-side data signal of the first bit value B1 after the inversion to the electrode of the first phase shifter 16A of the first lower arm 15B1. The second voltage conversion unit 17B applies the I-side data signal of the second bit value B2 after the voltage conversion to the electrode of the second phase shifter 16B of the first upper arm 15A1. The second voltage conversion unit 17B inverts the I-side data signal of the second bit value B2 after the voltage conversion, and applies the I-side data signal of the second bit value B2 after the inversion to the electrode of the second phase shifter 16B of the first lower arm 15B1. The third voltage conversion unit 17C applies the voltage-converted data signal on the I side of the third bit value B3 to an electrode of the third phase shifter 16C of the first upper arm 15A1. The third voltage conversion unit 17C inverts the voltage-converted data signal on the I side of the third bit value B3, and applies the inverted data signal on the I side of the third bit value B3 to an electrode of the third phase shifter 16C of the first lower arm 15B1.

[0181] The first upper heater 18A1 adjusts the amount of phase shift of the first upper arm 15A1 in response to temperature adjustment, and the first lower heater 18B1 adjusts the amount of phase shift of the first lower arm 15B1 in response to temperature adjustment.

[0182] The first phase shifter 16A of the first upper arm 15A1 intensity-modulates the I-side optical signal with the I-side data signal of the first bit value B1 from the first voltage conversion unit 17A. The first phase shifter 16A of the first lower arm 15B1 intensity-modulates the I-side optical signal with the I-side data signal after inversion of the first bit value B1 from the first voltage conversion unit 17A. The second phase shifter 16B of the first upper arm 15A1 intensity-modulates the I-side optical signal with the I-side data signal of the second bit value B2 from the second voltage conversion unit 17B. The second phase shifter 16B of the first lower arm 15B1 intensity-modulates the I-side optical signal with the I-side data signal after inversion of the second bit value B2 from the second voltage conversion unit 17B. The third phase shifter 16C of the first upper arm 15A1 intensity-modulates the I-side optical signal with the I-side data signal of the third bit value B3 from the third voltage conversion unit 17C. Also, the third phase shifter 16C of the first lower arm 15B1 intensity-modulates the I-side optical signal with the I-side data signal after inversion of the third bit value B3 from the third voltage conversion unit 17C.

[0183] The first upper arm 15A1 outputs the I-side optical modulated signal intensity-modulated by the I-side data signal to the first multiplexing unit 23A. Furthermore, the first lower arm 15B1 outputs the I-side optical modulated signal intensity-modulated by the I-side data signal to the first multiplexing unit 23A. The first multiplexing unit 23A multiplexes the I-side optical modulated signal intensity-modulated by the first upper arm 15A1 and the I-side optical modulated signal intensity-modulated by the first lower arm 15B1. Then, the first multiplexing unit 23A outputs the multiplexed I-side ASK8 modulated signal from the first output unit 24A as the output of the first optical modulation unit 31A. The first output unit 24A adjusts the phase of the I-side ASK8 modulated signal by a heater, and outputs the I-side ASK8 modulated signal after the phase adjustment to the output side multiplexing unit 42.

[0184] In the first optical modulation section 31A, the ratio of the first phase shifter 16A, the second phase shifter 16B, and the third phase shifter 16C is set to, for example, L1:L2:L3=21:34:45 so that the optical intensity for each signal level (1 to 8) is at equal intervals. As a result, since the optical intensity for each signal level (1 to 8) is at equal intervals, it is possible to sufficiently secure the linear portion of the sine curve that is the corresponding relationship between the optical intensity of the ASK8 modulated signal and the amount of phase shift.

[0185] The second optical modulation unit 31B has a second data modulation unit 11B, a second encoder 12B, a second DAC 13B, a second optical waveguide 14B, and a second upper arm 15A2 and a second lower arm 15B2 arranged on the second optical waveguide 14B. The second optical modulation unit 31B has a second upper heater 18A2 and a second lower heater 18B2. The second data modulation unit 11B modulates the data signal of the Q-side bit string. The second encoder 12B converts the data signal of the Q-side bit string into a modulation input code. The second encoder 12B converts a first bit value b1 in the data signal of the Q-side bit string into a first bit value B1 in the modulation input code. The second encoder 12B converts a second bit value b2 in the data signal of the Q-side bit string into a second bit value B2 in the modulation input code. The second encoder 12B converts the third bit value b3 in the data signal of the Q-side bit string into the third bit value B3 in the modulation input code.

[0186] As shown in FIG. 27, the second encoder 12B converts the Gray code "b3b2b1" of the Q-side data signal into the modulation input code "B3B2B1". When the Gray code is "100", the second encoder 12B converts the Gray code "100" into the modulation input code "111". When the Gray code is "001", the second encoder 12B converts the Gray code "001" into the modulation input code "001". When the Gray code is "011", the second encoder 12B converts the Gray code "011" into the modulation input code "010". When the Gray code is "010", the second encoder 12B converts the Gray code "010" into the modulation input code "100". When the Gray code is "110", the second encoder 12B converts the Gray code "110" into the modulation input code "011". When the Gray code is "111", the second encoder 12B converts the Gray code "111" to the modulation input code "101". When the Gray code is "101", the second encoder 12B converts the Gray code "101" to the modulation input code "110". When the Gray code is "100", the second encoder 12B converts the Gray code "100" to the modulation input code "111".

[0187] The second DAC 13B performs analog conversion, i.e., voltage conversion, of the modulation input code of the Q-side data signal from the second encoder 12B. The second DAC 13B is 3-bit, and therefore has three voltage conversion units, for example, a first voltage conversion unit 17A, a second voltage conversion unit 17B, and a third voltage conversion unit 17C. The first voltage conversion unit 17A performs voltage conversion of the Q-side data signal of the first bit value B1 of the modulation input code from the second encoder 12B. The second voltage conversion unit 17B performs voltage conversion of the Q-side data signal of the second bit value B2 of the modulation input code from the second encoder 12B. The third voltage conversion unit 17C performs voltage conversion of the Q-side data signal of the third bit value B3 of the modulation input code from the second encoder 12B.

[0188] The second optical waveguide 14B has a waveguide core such as Si and a waveguide clad such as SiO2. The second optical waveguide 14B has a second input section 21B, a second branching section 22B, a second multiplexing section 23B, and a second output section 24B. The second input section 21B inputs a Q-side optical signal (CW light) from the input side branching section 41. The second branching section 22B branches the Q-side optical signal from the second input section 21B to a second upper arm 15A2 and a second lower arm 15B2. The second upper arm 15A2 and the second lower arm 15B2 are, for example, MZ interferometers.

[0189] The second upper arm 15A2 intensity-modulates the Q-side optical signal with the Q-side data signal after analog conversion, and outputs a horizontally polarized optical modulated signal after intensity modulation. The second lower arm 15B2 intensity-modulates the Q-side optical signal with the Q-side data signal after analog conversion, and outputs a vertically polarized optical modulated signal after intensity modulation. Since the Q-side data signal is a 3-bit digital signal, the second upper arm 15A2 and the second lower arm 15B2 output a Q-side ASK8 modulated signal which is an 8-value optical modulated signal from signal level 1 to signal level 8.

[0190] The second upper arm 15A2 has a first phase shifter group, which is a plurality of phase shifters connected in series, for example, a first phase shifter 16A, a second phase shifter 16B, and a third phase shifter 16C. The second lower arm 15B2 also has a second phase shifter group, which is a plurality of phase shifters connected in series, for example, a first phase shifter 16A, a second phase shifter 16B, and a third phase shifter 16C. The first phase shifters 16A of the second upper arm 15A2 and the second lower arm 15B2 have the same electrode length L1, and the second phase shifters 16B of the second upper arm 15A2 and the second lower arm 15B2 have the same electrode length L2. Furthermore, the third phase shifter 16C of the second upper arm 15A2 and the second lower arm 15B2 have the same electrode length L3.

[0191] The first voltage conversion unit 17A applies the voltage-converted Q-side data signal of the first bit value B1 to the electrode of the first phase shifter 16A of the second upper arm 15A2. The first voltage conversion unit 17A inverts the voltage-converted Q-side data signal of the first bit value B1, and applies the inverted Q-side data signal of the first bit value B1 to the electrode of the first phase shifter 16A of the second lower arm 15B2. The second voltage conversion unit 17B applies the voltage-converted Q-side data signal of the second bit value B2 to the electrode of the second phase shifter 16B of the second upper arm 15A2. The second voltage conversion unit 17B inverts the voltage-converted Q-side data signal of the second bit value B2, and applies the inverted Q-side data signal of the second bit value B2 to the electrode of the second phase shifter 16B of the second lower arm 15B2. The third voltage conversion unit 17C applies the voltage-converted Q-side data signal of the third bit value B3 to an electrode of the third phase shifter 16C of the second upper arm 15A2. The third voltage conversion unit 17C inverts the voltage-converted Q-side data signal of the third bit value B3, and applies the inverted Q-side data signal of the third bit value B3 to an electrode of the third phase shifter 16C of the second lower arm 15B2.

[0192] In the second optical modulation section 31B, the ratio of the first phase shifter 16A, the second phase shifter 16B, and the third phase shifter 16C is set to, for example, L1:L2:L3=21:34:45 so that the optical intensity for each signal level (1 to 8) is at equal intervals. As a result, since the optical intensity for each signal level (1 to 8) is at equal intervals, it is possible to sufficiently secure the linear portion of the sine curve that is the corresponding relationship between the optical intensity of the ASK8 modulated signal and the amount of phase shift.

[0193] The second upper heater 18A2 adjusts the amount of phase shift of the second upper arm 15A2 in response to temperature adjustment, and the second lower heater 18B2 adjusts the amount of phase shift of the second lower arm 15B2 in response to temperature adjustment.

[0194] The first phase shifter 16A of the second upper arm 15A2 intensity-modulates the Q-side optical signal with the Q-side data signal of the first bit value B1 from the first voltage conversion unit 17A. The first phase shifter 16A of the second lower arm 15B2 intensity-modulates the Q-side optical signal with the Q-side data signal after inversion of the first bit value B1 from the first voltage conversion unit 17A. The second phase shifter 16B of the second upper arm 15A2 intensity-modulates the Q-side optical signal with the Q-side data signal of the second bit value B2 from the second voltage conversion unit 17B. The second phase shifter 16B of the second lower arm 15B2 intensity-modulates the Q-side optical signal with the Q-side data signal after inversion of the second bit value B2 from the second voltage conversion unit 17B. The third phase shifter 16C of the second upper arm 15A2 intensity-modulates the Q-side optical signal with the Q-side data signal of the third bit value B3 from the third voltage conversion unit 17C. Also, the third phase shifter 16C of the second lower arm 15B2 intensity-modulates the Q-side optical signal with the Q-side data signal after inversion of the third bit value B3 from the third voltage conversion unit 17C.

[0195] The second upper arm 15A2 outputs the Q-side optical modulated signal intensity-modulated by the Q-side data signal to the second multiplexing unit 23B. Furthermore, the second lower arm 15B2 outputs the Q-side optical modulated signal intensity-modulated by the Q-side data signal to the second multiplexing unit 23B. The second multiplexing unit 23B multiplexes the Q-side optical modulated signal intensity-modulated by the second upper arm 15A2 and the Q-side optical modulated signal intensity-modulated by the second lower arm 15B2. The second multiplexing unit 23B outputs the multiplexed Q-side ASK8 modulated signal from the second output unit 24B as the output of the second optical modulation unit 31B. The second output unit 24B adjusts the phase of the Q-side ASK8 modulated signal by a heater, and then outputs the phase-adjusted Q-side ASK8 modulated signal to the output-side multiplexing unit 42. The output-side multiplexing unit 42 multiplexes the I-side ASK8 modulated signal and the Q-side ASK8 modulated signal, and outputs the multiplexed QAM64 modulated signal to the output-side branching unit 43 .

[0196] The amount of phase shift φ of the optical modulator 3E is given by (Equation 10).

[0197]

number

[0198] The phase shift amounts φ1, φ2, φ3, and φ0 of the optical modulator 3E are as shown in Equation 11. The phase shift amount φ1 is about 0.57 rad, the phase shift amount φ2 is about 0.91 rad, the phase shift amount φ3 is about 1.2 rad, and the phase shift amount φ0 is about 3.37 rad.

[0199]

number

[0200] The light intensity of the first light modulation section 31A or the second light modulation section 31B is as shown in (Equation 12).

[0201]

number

[0202] The optical intensity of the optical modulator 3E is given by (Equation 13).

[0203]

number

[0204] Then, the optical modulator 3E combines the intensity-modulated I-side ASK8 modulated signal from the first optical modulator 31A with the intensity-modulated Q-side ASK8 modulated signal from the second optical modulator 31B, and outputs a QAM64 modulated signal as a combined optical signal. Figure 28 is an explanatory diagram showing an example of a symbol of the optical modulator 3E. The symbol shown in Figure 28 is a symbol of a QAM64 modulated signal output by the optical modulator 3E.

[0205] In the optical modulator 3E of the eighth embodiment, the gray code of the data signal is converted into a modulation input code so that the optical intensity for each signal level (1 to 8) is spaced at equal intervals, and the electrode lengths of the phase shifters in the first optical modulation section 31A and the second optical modulation section 31B that apply a data signal corresponding to the converted modulation input code are adjusted. As a result, the linear portion of the sine curve that represents the correspondence between the optical intensity and the amount of phase shift is sufficiently secured, so that the modulation loss and power consumption can be suppressed while the signal level intervals are spaced at equal intervals.

[0206] For convenience of explanation, the first encoder 12A of the eighth embodiment is exemplified as encoding the input first data signal into a bit string in which the number of bits set to 1 increases or decreases according to the intensity of the symbol points of the first optical modulated signal, with the electrode lengths of the first phase shifter group and the second phase shifter group set to lengths that make the intervals between the intensities of the symbol points of the first optical modulated signal equal. However, the present embodiment is not limited to a state in which the electrode lengths of the first phase shifter group and the second phase shifter group are set to lengths that make the intervals between the intensities of the symbol points of the first optical modulated signal equal, and is also applicable, for example, to a case in which a slight error occurs in the intervals between the intensities of the symbol points due to manufacturing variations or the like. The error range of the intervals between the intensities of the symbol points is equal to the length within a range of ±20% or less.

[0207] That is, the first encoder 12A encodes the input first data signal into a bit string in which the number of bits set to 1 increases or decreases according to the intensity of the symbol points of the first optical modulated signal, with the electrode lengths of the first phase shifter group and the second phase shifter group set to a predetermined length determined in advance by the interval between the intensities of the symbol points of the first optical modulated signal. Even in this case, modulation loss and power consumption can be suppressed.

[0208] The second encoder 12B is exemplified as encoding the input second data signal into a bit string in which the number of bits set to 1 increases or decreases according to the intensity of the symbol points of the second optical modulated signal, with the electrode lengths of the third phase shifter group and the fourth phase shifter group set to lengths that make the intervals between the intensities of the symbol points of the second optical modulated signal equal. However, the present embodiment is not limited to a state in which the electrode lengths of the third phase shifter group and the fourth phase shifter group are set to lengths that make the intervals between the intensities of the symbol points of the second optical modulated signal equal, and is also applicable, for example, to a case in which the intervals between the intensities of the symbol points have a slight error due to manufacturing variations or the like. The error range of the intervals between the intensities of the symbol points is equal to the length within a range of ±20% or less.

[0209] That is, the second encoder 12B encodes the input second data signal into a bit string in which the number of bits set to 1 increases or decreases according to the intensity of the symbol points of the second optical modulated signal, with the electrode lengths of the third and fourth phase shifter groups set to a predetermined length determined in advance by the interval between the intensities of the symbol points of the second optical modulated signal. Even in this case, modulation loss and power consumption can be suppressed. EXAMPLES

[0210] FIG. 29 is a schematic plan view showing an example of the configuration of an optical modulator 3H of Example 9. The same components as those of the optical modulator 3E of Example 8 are given the same reference numerals, and the description of the overlapping components and operations is omitted. The optical modulator 3H shown in FIG. 29 has an input side branching section 41, a first optical modulation section 31A, a second optical modulation section 31B, an output side multiplexing section 42, and an output side branching section 43. The first optical modulation section 31A is a modulation section that intensity-modulates an optical signal on the I side and outputs an ASK16 modulated signal on the I side after the intensity modulation. The second optical modulation section 31B is a modulation section that intensity-modulates an optical signal on the Q side and outputs an ASK16 modulated signal on the Q side after the intensity modulation.

[0211] The first optical modulation unit 31A modulates the data signal of the bit string on the I side. The first encoder 12A converts the first bit value b1 in the data signal of the bit string on the I side to the first bit value B1 in the modulation input code. The first encoder 12A converts the second bit value b2 in the data signal of the bit string on the I side to the second bit value B2 in the modulation input code. The first encoder 12A converts the third bit value b3 in the data signal of the bit string on the I side to the third bit value B3 in the modulation input code. The first encoder 12A converts the fourth bit value b4 in the data signal of the bit string on the I side to the fourth bit value B4 in the modulation input code.

[0212] FIG. 30 is an explanatory diagram showing an example of the correspondence between the input and output of the first encoder 12A and the second encoder 12B corresponding to 4 bits. As shown in FIG. 30, the first encoder 12A converts the Gray code "b4b3b2b1" of the data signal on the I side into the modulation input code "B4B3B2B1". For example, when the Gray code is "1000", the first encoder 12A converts the Gray code "1000" into the modulation input code "1111". For example, when the Gray code is "1001", the first encoder 12A converts the Gray code "1001" into the modulation input code "1110". For example, when the Gray code is "1011", the first encoder 12A converts the Gray code "1011" into the modulation input code "1101".

[0213] Since the first DAC 13A is 4 bits, it has four voltage conversion units, for example, a first voltage conversion unit 17A, a second voltage conversion unit 17B, a third voltage conversion unit 17C, and a fourth voltage conversion unit 17D. The first voltage conversion unit 17A performs voltage conversion on the data signal on the I side of the first bit value B1 of the modulation input code from the first encoder 12A. The second voltage conversion unit 17B performs voltage conversion on the data signal on the I side of the second bit value B2 of the modulation input code from the first encoder 12A. The third voltage conversion unit 17C performs voltage conversion on the data signal on the I side of the third bit value B3 of the modulation input code from the first encoder 12A. The fourth voltage conversion unit 17D performs voltage conversion on the data signal on the I side of the fourth bit value B4 of the modulation input code from the first encoder 12A.

[0214] The first upper arm 15A1 intensity-modulates the I-side optical signal with the I-side data signal after analog conversion, and outputs an intensity-modulated horizontally polarized optical modulated signal. The first lower arm 15B1 intensity-modulates the I-side optical signal with the I-side data signal after analog conversion, and outputs an intensity-modulated vertically polarized optical modulated signal. Since the I-side data signal is a 4-bit digital signal, the first upper arm 15A1 and the first lower arm 15B1 output an ASK16 modulated signal, which is an optical modulated signal with 16 values ​​from signal level 1 to signal level 16.

[0215] The first upper arm 15A1 has a first phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, a third phase shifter 16C, and a fourth phase shifter 16D. The first lower arm 15B1 also has a second phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, a third phase shifter 16C, and a fourth phase shifter 16D. The first phase shifters 16A of the first upper arm 15A1 and the first lower arm 15B1 have the same electrode length L1, and the second phase shifters 16B of the first upper arm 15A1 and the first lower arm 15B1 have the same electrode length L2. Furthermore, the third phase shifters 16C of the first upper arm 15A1 and the first lower arm 15B1 have the same electrode length L3, and the fourth phase shifters 16D of the first upper arm 15A1 and the first lower arm 15B1 have the same electrode length L4.

[0216] The first voltage conversion unit 17A applies the I-side data signal of the first bit value B1 after the voltage conversion to the electrode of the first phase shifter 16A of the first upper arm 15A1. The first voltage conversion unit 17A inverts the I-side data signal of the first bit value B1 after the voltage conversion, and applies the I-side data signal of the first bit value B1 after the inversion to the electrode of the first phase shifter 16A of the first lower arm 15B1. The second voltage conversion unit 17B applies the I-side data signal of the second bit value B2 after the voltage conversion to the electrode of the second phase shifter 16B of the first upper arm 15A1. The second voltage conversion unit 17B inverts the I-side data signal of the second bit value B2 after the voltage conversion, and applies the I-side data signal of the second bit value B2 after the inversion to the electrode of the second phase shifter 16B of the first lower arm 15B1.

[0217] The third voltage conversion unit 17C applies the I-side data signal of the third bit value B3 after the voltage conversion to the electrode of the third phase shifter 16C of the first upper arm 15A1. The third voltage conversion unit 17C inverts the I-side data signal of the third bit value B3 after the voltage conversion, and applies the I-side data signal of the third bit value B3 after the inversion to the electrode of the third phase shifter 16C of the first lower arm 15B1. The fourth voltage conversion unit 17D applies the I-side data signal of the fourth bit value B4 after the voltage conversion to the electrode of the fourth phase shifter 16D of the first upper arm 15A1. The fourth voltage conversion unit 17D inverts the I-side data signal of the fourth bit value B4 after the voltage conversion, and applies the I-side data signal of the fourth bit value B4 after the inversion to the electrode of the fourth phase shifter 16D of the first lower arm 15B1.

[0218] The first phase shifter 16A of the first upper arm 15A1 intensity-modulates the I-side optical signal with the I-side data signal of the first bit value B1 from the first voltage conversion unit 17A. The first phase shifter 16A of the first lower arm 15B1 intensity-modulates the I-side optical signal with the I-side data signal after inversion of the first bit value B1 from the first voltage conversion unit 17A. The second phase shifter 16B of the first upper arm 15A1 intensity-modulates the I-side optical signal with the I-side data signal of the second bit value B2 from the second voltage conversion unit 17B. The second phase shifter 16B of the first lower arm 15B1 intensity-modulates the I-side optical signal with the I-side data signal after inversion of the second bit value B2 from the second voltage conversion unit 17B. The third phase shifter 16C of the first upper arm 15A1 intensity-modulates the I-side optical signal with the I-side data signal of the third bit value B3 from the third voltage conversion unit 17C. The third phase shifter 16C of the first lower arm 15B1 intensity-modulates the I-side optical signal with the I-side data signal after inversion of the third bit value B3 from the third voltage conversion unit 17C. The fourth phase shifter 16D of the first upper arm 15A1 intensity-modulates the I-side optical signal with the I-side data signal of the fourth bit value B4 from the fourth voltage conversion unit 17D. The fourth phase shifter 16D of the first lower arm 15B1 intensity-modulates the I-side optical signal with the I-side data signal after inversion of the fourth bit value B4 from the fourth voltage conversion unit 17D.

[0219] The first upper arm 15A1 outputs the I-side optical modulated signal intensity-modulated by the I-side data signal to the first multiplexing unit 23A. Furthermore, the first lower arm 15B1 outputs the I-side optical modulated signal intensity-modulated by the I-side data signal to the first multiplexing unit 23A. The first multiplexing unit 23A multiplexes the I-side optical modulated signal intensity-modulated by the first upper arm 15A1 and the I-side optical modulated signal intensity-modulated by the first lower arm 15B1. The first multiplexing unit 23A outputs the multiplexed I-side ASK16 modulated signal from the first output unit 24A as the output of the first optical modulation unit 31A. The first output unit 24A adjusts the phase of the I-side ASK16 modulated signal by a heater, and then outputs the I-side ASK16 modulated signal after the phase adjustment to the output side multiplexing unit 42.

[0220] In the first optical modulation section 31A, the ratio of the first phase shifter 16A, the second phase shifter 16B, the third phase shifter 16C and the fourth phase shifter 16D is set to, for example, L1:L2:L3:L4=153:234:284:328 so that the optical intensity for each signal level (1 to 16) is at equal intervals. As a result, since the optical intensity for each signal level (1 to 16) is at equal intervals, it is possible to sufficiently secure the linear portion of the sine curve that represents the corresponding relationship between the optical intensity of the ASK16 modulated signal and the amount of phase shift.

[0221] The second data modulation unit 11B modulates the data signal into a Q-side bit string. The second encoder 12B converts a first bit value b1 in the Q-side bit string data signal into a first bit value B1 in the modulation input code. The second encoder 12B converts a second bit value b2 in the Q-side bit string data signal into a second bit value B2 in the modulation input code. The second encoder 12B converts a third bit value b3 in the Q-side bit string data signal into a third bit value B3 in the modulation input code. The second encoder 12B converts a fourth bit value b4 in the Q-side bit string data signal into a fourth bit value B4 in the modulation input code.

[0222] As shown in FIG. 30, the second encoder 12B converts the Gray code "b4b3b2b1" of the Q-side data signal into the modulation input code "B4B3B2B1". For example, when the Gray code is "1000", the second encoder 12B converts the Gray code "1000" into the modulation input code "1111". For example, when the Gray code is "1001", the second encoder 12B converts the Gray code "1001" into the modulation input code "1110". For example, when the Gray code is "1011", the second encoder 12B converts the Gray code "1011" into the modulation input code "1101".

[0223] The second DAC 13B is 4-bit, and therefore has four voltage conversion units, for example, a first voltage conversion unit 17A, a second voltage conversion unit 17B, a third voltage conversion unit 17C, and a fourth voltage conversion unit 17D. The first voltage conversion unit 17A performs voltage conversion on the Q-side data signal of the first bit value B1 of the modulation input code from the second encoder 12B. The second voltage conversion unit 17B performs voltage conversion on the Q-side data signal of the second bit value B2 of the modulation input code from the second encoder 12B. The third voltage conversion unit 17C performs voltage conversion on the Q-side data signal of the third bit value B3 of the modulation input code from the second encoder 12B. The fourth voltage conversion unit 17D performs voltage conversion on the Q-side data signal of the fourth bit value B4 of the modulation input code from the second encoder 12B.

[0224] The second upper arm 15A2 intensity-modulates the Q-side optical signal with the Q-side data signal after analog conversion, and outputs a horizontally polarized optical modulated signal after intensity modulation. The second lower arm 15B2 intensity-modulates the Q-side optical signal with the Q-side data signal after analog conversion, and outputs a vertically polarized optical modulated signal after intensity modulation. Since the Q-side data signal is a 4-bit digital signal, the second upper arm 15A2 and the second lower arm 15B2 output the Q-side ASK16 modulated signal, which is a 16-value optical modulated signal from signal level 1 to signal level 16.

[0225] The second upper arm 15A2 has a first phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, a third phase shifter 16C, and a fourth phase shifter 16D. The second lower arm 15B2 also has a second phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, a third phase shifter 16C, and a fourth phase shifter 16D. The first phase shifters 16A of the second upper arm 15A2 and the second lower arm 15B2 have the same electrode length L1, and the second phase shifters 16B of the second upper arm 15A2 and the second lower arm 15B2 have the same electrode length L2. The third phase shifters 16C of the second upper arm 15A2 and the second lower arm 15B2 have the same electrode length L3, and the fourth phase shifters 16D of the second upper arm 15A2 and the second lower arm 15B2 have the same electrode length L4.

[0226] The first voltage conversion unit 17A applies the voltage-converted Q-side data signal of the first bit value B1 to the electrode of the first phase shifter 16A of the second upper arm 15A2. The first voltage conversion unit 17A inverts the voltage-converted Q-side data signal of the first bit value B1, and applies the inverted Q-side data signal of the first bit value B1 to the electrode of the first phase shifter 16A of the second lower arm 15B2. The second voltage conversion unit 17B applies the voltage-converted Q-side data signal of the second bit value B2 to the electrode of the second phase shifter 16B of the second upper arm 15A2. The second voltage conversion unit 17B inverts the voltage-converted Q-side data signal of the second bit value B2, and applies the inverted Q-side data signal of the second bit value B2 to the electrode of the second phase shifter 16B of the second lower arm 15B2.

[0227] The third voltage conversion unit 17C applies the voltage-converted Q-side data signal of the third bit value B3 to the electrode of the third phase shifter 16C of the second upper arm 15A2. The third voltage conversion unit 17C inverts the voltage-converted Q-side data signal of the third bit value B3, and applies the inverted Q-side data signal of the third bit value B3 to the electrode of the third phase shifter 16C of the second lower arm 15B2. The fourth voltage conversion unit 17D applies the voltage-converted Q-side data signal of the fourth bit value B4 to the electrode of the fourth phase shifter 16D of the second upper arm 15A2. The fourth voltage conversion unit 17D inverts the voltage-converted Q-side data signal of the fourth bit value B4, and applies the inverted Q-side data signal of the fourth bit value B4 to the electrode of the fourth phase shifter 16D of the second lower arm 15B2.

[0228] In the second optical modulation section 31B, the ratio of the first phase shifter 16A, the second phase shifter 16B, the third phase shifter 16C and the fourth phase shifter 16D is set to, for example, L1:L2:L3:L4=153:234:284:328 so that the optical intensity for each signal level (1 to 16) is at equal intervals. As a result, since the optical intensity for each signal level (1 to 16) is at equal intervals, it is possible to sufficiently secure the linear portion of the sine curve that represents the corresponding relationship between the optical intensity of the ASK16 modulated signal and the amount of phase shift.

[0229] The first phase shifter 16A of the second upper arm 15A2 intensity-modulates the Q-side optical signal with the Q-side data signal of the first bit value B1 from the first voltage conversion unit 17A. The first phase shifter 16A of the second lower arm 15B2 intensity-modulates the Q-side optical signal with the Q-side data signal after inversion of the first bit value B1 from the first voltage conversion unit 17A. The second phase shifter 16B of the second upper arm 15A2 intensity-modulates the Q-side optical signal with the Q-side data signal of the second bit value B2 from the second voltage conversion unit 17B. The second phase shifter 16B of the second lower arm 15B2 intensity-modulates the Q-side optical signal with the Q-side data signal after inversion of the second bit value B2 from the second voltage conversion unit 17B. The third phase shifter 16C of the second upper arm 15A2 intensity-modulates the Q-side optical signal with the Q-side data signal of the third bit value B3 from the third voltage conversion unit 17C. The third phase shifter 16C of the second lower arm 15B2 intensity-modulates the Q-side optical signal with the Q-side data signal after inversion of the third bit value B3 from the third voltage conversion unit 17C. The fourth phase shifter 16D of the second upper arm 15A2 intensity-modulates the Q-side optical signal with the Q-side data signal of the fourth bit value B4 from the fourth voltage conversion unit 17D. The fourth phase shifter 16D of the second lower arm 15B2 intensity-modulates the Q-side optical signal with the Q-side data signal after inversion of the fourth bit value B4 from the fourth voltage conversion unit 17D.

[0230] The second upper arm 15A2 outputs the Q-side optical modulated signal intensity-modulated by the Q-side data signal to the second multiplexing unit 23B. Furthermore, the second lower arm 15B2 outputs the Q-side optical modulated signal intensity-modulated by the Q-side data signal to the second multiplexing unit 23B. The second multiplexing unit 23B multiplexes the Q-side optical modulated signal intensity-modulated by the second upper arm 15A2 and the Q-side optical modulated signal intensity-modulated by the second lower arm 15B2. The second multiplexing unit 23B outputs the multiplexed Q-side ASK16 modulated signal from the second output unit 24B as the output of the second optical modulation unit 31B. The second output unit 24B adjusts the phase of the Q-side ASK16 modulated signal by a heater, and then outputs the phase-adjusted Q-side ASK16 modulated signal to the output-side multiplexing unit 42. The output-side multiplexing section 42 multiplexes the I-side ASK16 modulated signal and the Q-side ASK16 modulated signal, and outputs the multiplexed QAM256 modulated signal to the output-side branching section 43 .

[0231] Then, the optical modulator 3H multiplexes the I-side ASK16 modulated signal from the first optical modulation unit 31A and the Q-side ASK16 modulated signal from the second optical modulation unit 31B, and outputs a QAM256 modulated signal as a multiplexed optical signal. Figure 31 is an explanatory diagram showing an example of a symbol of the optical modulator 3H. The symbol shown in Figure 31 is a symbol of the QAM256 modulated signal output by the optical modulator 3H.

[0232] In the optical modulator 3H of the ninth embodiment, the gray code of the data signal is converted into a modulation input code so that the optical intensity for each signal level (1 to 16) is spaced at equal intervals, and the electrode lengths of the phase shifters in the first optical modulation section 31A and the second optical modulation section 31B that apply a data signal corresponding to the converted modulation input code are adjusted. As a result, the linear portion of the sine curve that represents the correspondence between the optical intensity and the amount of phase shift is sufficiently secured, so that the modulation loss and power consumption can be suppressed while the signal level intervals are spaced at equal intervals. EXAMPLES

[0233] FIG. 32 is a schematic plan view showing an example of the configuration of an optical modulator 3K of the tenth embodiment. The same components as those of the optical modulator 3E of the eighth embodiment are given the same reference numerals, and the description of the overlapping components and operations is omitted. The optical modulator 3K shown in FIG. 32 has an input-side branching section 41, a first optical modulation section 31A, a second optical modulation section 31B, an output-side multiplexing section 42, and an output-side branching section 43. The first optical modulation section 31A is a modulation section that intensity-modulates an optical signal on the I side and outputs an ASK32 modulated signal on the I side after the intensity modulation. The second optical modulation section 31B is a modulation section that intensity-modulates an optical signal on the Q side and outputs an ASK32 modulated signal on the Q side after the intensity modulation.

[0234] The first data modulation unit 11A modulates the data signal of the bit string on the I side. The first encoder 12A converts the first bit value b1 in the data signal of the bit string on the I side to the first bit value B1 in the modulation input code. The first encoder 12A converts the second bit value b2 in the data signal of the bit string on the I side to the second bit value B2 in the modulation input code. The first encoder 12A converts the third bit value b3 in the data signal of the bit string on the I side to the third bit value B3 in the modulation input code. The first encoder 12A converts the fourth bit value b4 in the data signal of the bit string on the I side to the fourth bit value B4 in the modulation input code. The first encoder 12A converts the fifth bit value b5 in the data signal of the bit string on the I side to the fifth bit value B5 in the modulation input code.

[0235] FIG. 33 is an explanatory diagram showing an example of the correspondence between the input and output of the first encoder 12A and the second encoder 12B corresponding to 5 bits. As shown in FIG. 33, the first encoder 12A converts the Gray code "b5b4b3b2b1" of the data signal on the I side into the modulation input code "B5B4B3B2B1". For example, when the Gray code is "10000", the first encoder 12A converts the Gray code "10000" into the modulation input code "11111". For example, when the Gray code is "10001", the first encoder 12A converts the Gray code "10001" into the modulation input code "11110". For example, when the Gray code is "10011", the first encoder 12A converts the Gray code "10011" into the modulation input code "11101".

[0236] Since the first DAC 13A is 5 bits, it has five voltage conversion units, for example, a first voltage conversion unit 17A, a second voltage conversion unit 17B, a third voltage conversion unit 17C, a fourth voltage conversion unit 17D, and a fifth voltage conversion unit 17E. The first voltage conversion unit 17A performs voltage conversion on the data signal on the I side of the first bit value B1 of the modulation input code from the first encoder 12A. The second voltage conversion unit 17B performs voltage conversion on the data signal on the I side of the second bit value B2 of the modulation input code from the first encoder 12A. The third voltage conversion unit 17C performs voltage conversion on the data signal on the I side of the third bit value B3 of the modulation input code from the first encoder 12A. The fourth voltage conversion unit 17D performs voltage conversion on the data signal on the I side of the fourth bit value B4 of the modulation input code from the first encoder 12A. The fifth voltage conversion unit 17E performs voltage conversion on the data signal on the I side of the fifth bit value B5 of the modulation input code from the first encoder 12A.

[0237] The first upper arm 15A1 intensity-modulates the I-side optical signal with the I-side data signal after analog conversion, and outputs an intensity-modulated horizontally polarized optical modulated signal. The first lower arm 15B1 intensity-modulates the I-side optical signal with the I-side data signal after analog conversion, and outputs an intensity-modulated vertically polarized optical modulated signal. Since the I-side data signal is a 5-bit digital signal, the first upper arm 15A1 and the first lower arm 15B1 output an ASK32 modulated signal, which is an optical modulated signal with 32 values ​​from signal level 1 to signal level 32.

[0238] The first upper arm 15A1 has a first phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, a third phase shifter 16C, a fourth phase shifter 16D, and a fifth phase shifter 16E. The first lower arm 15B1 also has a second phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, a third phase shifter 16C, a fourth phase shifter 16D, and a fifth phase shifter 16E. The first phase shifters 16A of the first upper arm 15A1 and the first lower arm 15B1 have the same electrode length L1, and the second phase shifters 16B of the first upper arm 15A1 and the first lower arm 15B1 have the same electrode length L2. The third phase shifters 16C of the first upper arm 15A1 and the first lower arm 15B1 have the same electrode length L3, the fourth phase shifters 16D of the first upper arm 15A1 and the first lower arm 15B1 have the same electrode length L4, and the fifth phase shifters 16E of the first upper arm 15A1 and the first lower arm 15B1 have the same electrode length L5.

[0239] The first voltage conversion unit 17A applies the I-side data signal of the first bit value B1 after the voltage conversion to the electrode of the first phase shifter 16A of the first upper arm 15A1. The first voltage conversion unit 17A inverts the I-side data signal of the first bit value B1 after the voltage conversion, and applies the I-side data signal of the first bit value B1 after the inversion to the electrode of the first phase shifter 16A of the first lower arm 15B1. The second voltage conversion unit 17B applies the I-side data signal of the second bit value B2 after the voltage conversion to the electrode of the second phase shifter 16B of the first upper arm 15A1. The second voltage conversion unit 17B inverts the I-side data signal of the second bit value B2 after the voltage conversion, and applies the I-side data signal of the second bit value B2 after the inversion to the electrode of the second phase shifter 16B of the first lower arm 15B1. The third voltage conversion unit 17C applies the voltage-converted data signal on the I side of the third bit value B3 to an electrode of the third phase shifter 16C of the first upper arm 15A1. The third voltage conversion unit 17C inverts the voltage-converted data signal on the I side of the third bit value B3, and applies the inverted data signal on the I side of the third bit value B3 to an electrode of the third phase shifter 16C of the first lower arm 15B1.

[0240] The fourth voltage conversion unit 17D applies the I-side data signal of the fourth bit value B4 after the voltage conversion to the electrode of the fourth phase shifter 16D of the first upper arm 15A1. The fourth voltage conversion unit 17D inverts the I-side data signal of the fourth bit value B4 after the voltage conversion, and applies the I-side data signal of the fourth bit value B4 after the inversion to the electrode of the fourth phase shifter 16D of the first lower arm 15B1. The fifth voltage conversion unit 17E applies the I-side data signal of the fifth bit value B5 after the voltage conversion to the electrode of the fifth phase shifter 16E of the first upper arm 15A1. The fifth voltage conversion unit 17E inverts the I-side data signal of the fifth bit value B5 after the voltage conversion, and applies the I-side data signal of the fifth bit value B5 after the inversion to the electrode of the fifth phase shifter 16E of the first lower arm 15B1.

[0241] The first phase shifter 16A of the first upper arm 15A1 intensity-modulates the I-side optical signal with the I-side data signal of the first bit value B1 from the first voltage conversion unit 17A. The first phase shifter 16A of the first lower arm 15B1 intensity-modulates the I-side optical signal with the I-side data signal after inversion of the first bit value B1 from the first voltage conversion unit 17A. The second phase shifter 16B of the first upper arm 15A1 intensity-modulates the I-side optical signal with the I-side data signal of the second bit value B2 from the second voltage conversion unit 17B. The second phase shifter 16B of the first lower arm 15B1 intensity-modulates the I-side optical signal with the I-side data signal after inversion of the second bit value B2 from the second voltage conversion unit 17B. The third phase shifter 16C of the first upper arm 15A1 intensity-modulates the I-side optical signal with the I-side data signal of the third bit value B3 from the third voltage conversion unit 17C. The third phase shifter 16C of the first lower arm 15B1 intensity-modulates the I-side optical signal with the I-side data signal after inversion of the third bit value B3 from the third voltage conversion unit 17C. The fourth phase shifter 16D of the first upper arm 15A1 intensity-modulates the I-side optical signal with the I-side data signal of the fourth bit value B4 from the fourth voltage conversion unit 17D. The fourth phase shifter 16D of the first lower arm 15B1 intensity-modulates the I-side optical signal with the I-side data signal after inversion of the fourth bit value B4 from the fourth voltage conversion unit 17D. The fifth phase shifter 16E of the first upper arm 15A1 intensity-modulates the I-side optical signal with the I-side data signal of the fifth bit value B5 from the fifth voltage conversion unit 17E. Also, the fifth phase shifter 16E of the first lower arm 15B1 intensity-modulates the I-side optical signal with the I-side data signal after inversion of the fifth bit value B5 from the fifth voltage conversion unit 17E.

[0242] The first upper arm 15A1 outputs the I-side optical modulated signal intensity-modulated by the I-side data signal to the first multiplexing unit 23A. Furthermore, the first lower arm 15B1 outputs the I-side optical modulated signal intensity-modulated by the I-side data signal to the first multiplexing unit 23A. The first multiplexing unit 23A multiplexes the I-side optical modulated signal intensity-modulated by the first upper arm 15A1 and the I-side optical modulated signal intensity-modulated by the first lower arm 15B1. The first multiplexing unit 23A outputs the multiplexed I-side ASK32 modulated signal from the first output unit 24A as the output of the first optical modulation unit 31A. The first output unit 24A adjusts the phase of the I-side ASK32 modulated signal by a heater, and then outputs the I-side ASK32 modulated signal after the phase adjustment to the output side multiplexing unit 42.

[0243] The first optical modulation unit 31A adjusts the ratio of the electrode lengths (phase shift amounts) of the first to fifth phase shifters 16A to 16E so that the optical intensities of the signal levels (1 to 32) are at equal intervals. For example, the ratio of the electrode lengths of the first phase shifter 16A, the second phase shifter 16B, the third phase shifter 16C, the fourth phase shifter 16D, and the fifth phase shifter 16E is set to, for example, L1:L2:L3:L4:L5=117:177:213:236:257. As a result, the optical intensities of the signal levels (1 to 32) are at equal intervals, so that the linear portion of the sine curve that is the corresponding relationship between the optical intensity and the phase shift amount of the ASK32 modulated signal can be sufficiently secured.

[0244] The second data modulation unit 11B modulates the data signal into a Q-side bit string. The second encoder 12B converts a first bit value b1 in the data signal of the Q-side bit string into a first bit value B1 in the modulation input code. The second encoder 12B converts a second bit value b2 in the data signal of the Q-side bit string into a second bit value B2 in the modulation input code. The second encoder 12B converts a third bit value b3 in the data signal of the Q-side bit string into a third bit value B3 in the modulation input code. The second encoder 12B converts a fourth bit value b4 in the data signal of the Q-side bit string into a fourth bit value B4 in the modulation input code. The second encoder 12B converts a fifth bit value b5 in the data signal of the Q-side bit string into a fifth bit value B5 in the modulation input code.

[0245] As shown in FIG. 33, the second encoder 12B converts the Gray code "b5b4b3b2b1" of the Q-side data signal into the modulation input code "B5B4B3B2B1". For example, when the Gray code is "10000", the second encoder 12B converts the Gray code "10000" into the modulation input code "11111". For example, when the Gray code is "10001", the second encoder 12B converts the Gray code "10001" into the modulation input code "11110". For example, when the Gray code is "10011", the second encoder 12B converts the Gray code "10011" into the modulation input code "11101".

[0246] The second DAC 13B is 5-bit, and therefore has five voltage conversion units, for example, a first voltage conversion unit 17A, a second voltage conversion unit 17B, a third voltage conversion unit 17C, a fourth voltage conversion unit 17D, and a fifth voltage conversion unit 17E. The first voltage conversion unit 17A performs voltage conversion on the Q-side data signal of the first bit value B1 of the modulation input code from the second encoder 12B. The second voltage conversion unit 17B performs voltage conversion on the Q-side data signal of the second bit value B2 of the modulation input code from the second encoder 12B. The third voltage conversion unit 17C performs voltage conversion on the Q-side data signal of the third bit value B3 of the modulation input code from the second encoder 12B. The fourth voltage conversion unit 17D performs voltage conversion on the Q-side data signal of the fourth bit value B4 of the modulation input code from the second encoder 12B. The fifth voltage conversion unit 17E performs voltage conversion on the data signal on the Q side of the fifth bit value B5 of the modulation input code from the second encoder 12B.

[0247] The second upper arm 15A2 intensity-modulates the Q-side optical signal with the Q-side data signal after analog conversion, and outputs a horizontally polarized optical modulated signal after intensity modulation. The second lower arm 15B2 intensity-modulates the Q-side optical signal with the Q-side data signal after analog conversion, and outputs a vertically polarized optical modulated signal after intensity modulation. Since the Q-side data signal is a 5-bit digital signal, the second upper arm 15A2 and the second lower arm 15B2 output a Q-side ASK32 modulated signal which is an optical modulated signal with 32 values ​​from signal level 1 to signal level 32.

[0248] The second upper arm 15A2 has a first phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, a third phase shifter 16C, a fourth phase shifter 16D, and a fifth phase shifter 16E. The second lower arm 15B2 also has a second phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, a third phase shifter 16C, a fourth phase shifter 16D, and a fifth phase shifter 16E. The first phase shifters 16A of the second upper arm 15A2 and the second lower arm 15B2 have the same electrode length L1, and the second phase shifters 16B of the second upper arm 15A2 and the second lower arm 15B2 have the same electrode length L2. The third phase shifters 16C of the second upper arm 15A2 and the second lower arm 15B2 have the same electrode length L3, the fourth phase shifters 16D of the second upper arm 15A2 and the second lower arm 15B2 have the same electrode length L4, and the fifth phase shifters 16E of the second upper arm 15A2 and the second lower arm 15B2 have the same electrode length L5.

[0249] The first voltage conversion unit 17A applies the voltage-converted Q-side data signal of the first bit value B1 to the electrode of the first phase shifter 16A of the second upper arm 15A2. The first voltage conversion unit 17A inverts the voltage-converted Q-side data signal of the first bit value B1, and applies the inverted Q-side data signal of the first bit value B1 to the electrode of the first phase shifter 16A of the second lower arm 15B2. The second voltage conversion unit 17B applies the voltage-converted Q-side data signal of the second bit value B2 to the electrode of the second phase shifter 16B of the second upper arm 15A2. The second voltage conversion unit 17B inverts the voltage-converted Q-side data signal of the second bit value B2, and applies the inverted Q-side data signal of the second bit value B2 to the electrode of the second phase shifter 16B of the second lower arm 15B2. The third voltage conversion section 17C applies the voltage-converted data signal on the Q side of the third bit value B3 to the electrode of the third phase shifter 16C of the second upper arm 15A2. The third voltage conversion unit 17C inverts the Q-side data signal of the third bit value B3 after voltage conversion, and applies the inverted Q-side data signal of the third bit value B3 to the electrode of the third phase shifter 16C of the second lower arm 15B2.

[0250] The fourth voltage conversion unit 17D applies the voltage-converted Q-side data signal of the fourth bit value B4 to the electrode of the fourth phase shifter 16D of the second upper arm 15A2. The fourth voltage conversion unit 17D inverts the voltage-converted Q-side data signal of the fourth bit value B4, and applies the inverted Q-side data signal of the fourth bit value B4 to the electrode of the fourth phase shifter 16D of the second lower arm 15B2. The fifth voltage conversion unit 17E applies the voltage-converted Q-side data signal of the fifth bit value B5 to the electrode of the fifth phase shifter 16E of the second upper arm 15A2. The fifth voltage conversion unit 17E inverts the voltage-converted Q-side data signal of the fifth bit value B5, and applies the inverted Q-side data signal of the fifth bit value B5 to the electrode of the fifth phase shifter 16E of the second lower arm 15B2.

[0251] The second optical modulation unit 31B adjusts the ratio of the electrode lengths (phase shift amounts) of the first to fifth phase shifters 16A to 16E so that the optical intensities of the signal levels (1 to 32) are at equal intervals. For example, the ratio of the electrode lengths of the first phase shifter 16A, the second phase shifter 16B, the third phase shifter 16C, the fourth phase shifter 16D, and the fifth phase shifter 16E is set to, for example, L1:L2:L3:L4:L5=117:177:213:236:257. As a result, the optical intensities of the signal levels (1 to 32) are at equal intervals, so that the linear portion of the sine curve that is the corresponding relationship between the optical intensity and the phase shift amount of the ASK32 modulated signal can be sufficiently secured.

[0252] The first phase shifter 16A of the second upper arm 15A2 intensity-modulates the Q-side optical signal with the Q-side data signal of the first bit value B1 from the first voltage conversion unit 17A. The first phase shifter 16A of the second lower arm 15B2 intensity-modulates the Q-side optical signal with the Q-side data signal after inversion of the first bit value B1 from the first voltage conversion unit 17A. The second phase shifter 16B of the second upper arm 15A2 intensity-modulates the Q-side optical signal with the Q-side data signal of the second bit value B2 from the second voltage conversion unit 17B. The second phase shifter 16B of the second lower arm 15B2 intensity-modulates the Q-side optical signal with the Q-side data signal after inversion of the second bit value B2 from the second voltage conversion unit 17B. The third phase shifter 16C of the second upper arm 15A2 intensity-modulates the Q-side optical signal with the Q-side data signal of the third bit value B3 from the third voltage conversion unit 17C. The third phase shifter 16C of the second lower arm 15B2 intensity-modulates the Q-side optical signal with the Q-side data signal after inversion of the third bit value B3 from the third voltage conversion unit 17C. The fourth phase shifter 16D of the second upper arm 15A2 intensity-modulates the Q-side optical signal with the Q-side data signal of the fourth bit value B4 from the fourth voltage conversion unit 17D. The fourth phase shifter 16D of the second lower arm 15B2 intensity-modulates the Q-side optical signal with the Q-side data signal after inversion of the fourth bit value B4 from the fourth voltage conversion unit 17D. The fifth phase shifter 16E of the second upper arm 15A2 intensity-modulates the Q-side optical signal with the Q-side data signal of the fifth bit value B5 from the fifth voltage conversion unit 17E. Also, the fifth phase shifter 16E of the second lower arm 15B2 intensity-modulates the Q-side optical signal with the Q-side data signal after inversion of the fifth bit value B5 from the fifth voltage conversion unit 17E.

[0253] The second upper arm 15A2 outputs the Q-side optical modulated signal intensity-modulated by the Q-side data signal to the second multiplexing unit 23B. Furthermore, the second lower arm 15B2 outputs the Q-side optical modulated signal intensity-modulated by the Q-side data signal to the second multiplexing unit 23B. The second multiplexing unit 23B multiplexes the Q-side optical modulated signal intensity-modulated by the second upper arm 15A2 and the Q-side optical modulated signal intensity-modulated by the second lower arm 15B2. The second multiplexing unit 23B outputs the multiplexed Q-side ASK32 modulated signal from the second output unit 24B as the output of the second optical modulation unit 31B. The second output unit 24B adjusts the phase of the Q-side ASK32 modulated signal by a heater, and then outputs the phase-adjusted Q-side ASK32 modulated signal to the output-side multiplexing unit 42. The output-side multiplexing section 42 multiplexes the I-side ASK32 modulated signal and the Q-side ASK32 modulated signal, and outputs the multiplexed QAM1024 modulated signal to the output-side branching section 43 . Output.

[0254] Then, the optical modulator 3K multiplexes the I-side ASK32 modulated signal from the first optical modulation unit 31A and the Q-side ASK32 modulated signal from the second optical modulation unit 31B, and outputs a QAM1024 modulated signal as the multiplexed optical signal. Figure 34 is an explanatory diagram showing an example of a symbol of the optical modulator 3K. The symbol shown in Figure 34 is a symbol of the QAM1024 modulated signal output by the optical modulator 3K.

[0255] In the optical modulator 3K of the tenth embodiment, the gray code of the data signal is converted into a modulation input code so that the optical intensity for each signal level (1 to 32) is spaced at equal intervals, and the electrode lengths of the phase shifters in the first optical modulation section 31A and the second optical modulation section 31B that apply a data signal corresponding to the converted modulation input code are adjusted. As a result, the linear portion of the sine curve that represents the correspondence between the optical intensity and the amount of phase shift is sufficiently secured, so that the signal level intervals are spaced at equal intervals, and modulation loss and power consumption can be suppressed. EXAMPLES

[0256] Fig. 35 is a schematic plan view showing an example of the configuration of an optical modulator 3F of Example 11. The optical modulator 3F shown in Fig. 35 has a first optical modulation unit 31A and a third optical modulation unit 31C. The first optical modulation unit 31A is a modulation unit that intensity-modulates an optical signal and outputs an intensity-modulated ASK8 modulated signal. The third optical modulation unit 31C is a modulation unit that intensity-modulates the ASK8 modulated signal intensity-modulated by the first optical modulation unit 31A and outputs an intensity-modulated GS64APASK modulated signal.

[0257] The first optical modulation unit 31A includes a first data modulation unit 11A, a first encoder 12A, a first DAC 13A, a first optical waveguide 14A, and a first upper arm 15A1 and a first lower arm 15B1 arranged on the first optical waveguide 14A. Furthermore, the first optical modulation unit 31A includes a first upper heater 18A1 and a first lower heater 18B1. The first data modulation unit 11A modulates the data signal into a bit string. The first encoder 12A converts the data signal into a modulation input code. The first encoder 12A converts a first bit value b1 in the data signal into a first bit value B1 in the modulation input code. The first encoder 12A converts a second bit value b2 in the data signal into a second bit value B2 in the modulation input code. The first encoder 12A converts a third bit value b3 in the bit string data signal to a third bit value B3 in the modulated input code.

[0258] FIG. 36 is an explanatory diagram showing an example of the correspondence between the input and output of the first encoder 12A and the third encoder 12C corresponding to 3 bits. As shown in FIG. 36, the first encoder 12A converts the Gray code "b3b2b1" of the data signal into the modulation input code "B3B2B1". When the Gray code is "100", the first encoder 12A converts the Gray code "100" into the modulation input code "111". When the Gray code is "001", the first encoder 12A converts the Gray code "001" into the modulation input code "001". When the Gray code is "011", the first encoder 12A converts the Gray code "011" into the modulation input code "010". When the Gray code is "010", the first encoder 12A converts the Gray code "010" into the modulation input code "100". When the Gray code is "110", the first encoder 12A converts the Gray code "110" to the modulation input code "011". When the Gray code is "111", the first encoder 12A converts the Gray code "111" to the modulation input code "101". When the Gray code is "101", the first encoder 12A converts the Gray code "101" to the modulation input code "110". When the Gray code is "100", the first encoder 12A converts the Gray code "100" to the modulation input code "111".

[0259] The first DAC 13A performs analog conversion, i.e., voltage conversion, of the modulation input code of the data signal from the first encoder 12A. The first DAC 13A is 3-bit, and therefore has three voltage conversion units, for example, a first voltage conversion unit 17A, a second voltage conversion unit 17B, and a third voltage conversion unit 17C. The first voltage conversion unit 17A performs voltage conversion of the data signal of the first bit value B1 of the modulation input code from the first encoder 12A. The second voltage conversion unit 17B performs voltage conversion of the data signal of the second bit value B2 of the modulation input code from the first encoder 12A. The third voltage conversion unit 17C performs voltage conversion of the data signal of the third bit value B3 of the modulation input code from the first encoder 12A.

[0260] The first optical waveguide 14A has a waveguide core such as Si and a waveguide clad such as SiO2. The first optical waveguide 14A has a first input section 21A, a first branching section 22A, a first multiplexing section 23A, and a first output section 24A. The first input section 21A inputs an optical signal (CW light) from the light source 2. The first branching section 22A branches the optical signal from the first input section 21A into a first upper arm 15A1 and a first lower arm 15B1. The first upper arm 15A1 and the first lower arm 15B1 are, for example, MZ interferometers.

[0261] The first upper arm 15A1 intensity-modulates the optical signal from the light source 2 with the analog-converted data signal, and outputs an intensity-modulated horizontally polarized optical modulated signal. The first lower arm 15B1 intensity-modulates the optical signal from the light source 2 with the analog-converted data signal, and outputs an intensity-modulated vertically polarized optical signal. Since the data signal is a 3-bit digital signal, the first upper arm 15A1 and the first lower arm 15B1 output an ASK8 modulated signal, which is an 8-level optical modulated signal having signal levels 1 to 8.

[0262] The first upper arm 15A1 has a first phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, and a third phase shifter 16C. The first lower arm 15B1 also has a second phase shifter group, which is a plurality of phase shifters connected in series, such as a first phase shifter 16A, a second phase shifter 16B, and a third phase shifter 16C. The first phase shifters 16A of the first upper arm 15A1 and the first lower arm 15B1 have the same electrode length L1, and the second phase shifters 16B of the first upper arm 15A1 and the first lower arm 15B1 have the same electrode length L2. Furthermore, the third phase shifter 16C of the first upper arm 15A1 and the first lower arm 15B1 have the same electrode length L3.

[0263] The first voltage conversion unit 17A applies the data signal of the first bit value B1 after the voltage conversion to the electrode of the first phase shifter 16A of the first upper arm 15A1. The first voltage conversion unit 17A inverts the data signal of the first bit value B1 after the voltage conversion, and applies the data signal of the first bit value B1 after the inversion to the electrode of the first phase shifter 16A of the first lower arm 15B1. The second voltage conversion unit 17B applies the data signal of the second bit value B2 after the voltage conversion to the electrode of the second phase shifter 16B of the first upper arm 15A1. The second voltage conversion unit 17B inverts the data signal of the second bit value B2 after the voltage conversion, and applies the data signal of the second bit value B2 after the inversion to the electrode of the second phase shifter 16B of the first lower arm 15B1. The third voltage conversion unit 17C applies the voltage-converted data signal of the third bit value B3 to an electrode of the third phase shifter 16C of the first upper arm 15A1. The third voltage conversion unit 17C inverts the voltage-converted data signal of the third bit value B3, and applies the inverted data signal of the third bit value B3 to an electrode of the third phase shifter 16C of the first lower arm 15B1.

[0264] The first upper heater 18A1 adjusts the amount of phase shift of the first upper arm 15A1 in response to temperature adjustment, and the first lower heater 18B1 adjusts the amount of phase shift of the first lower arm 15B1 in response to temperature adjustment.

[0265] The first phase shifter 16A of the first upper arm 15A1 intensity-modulates the optical signal with a data signal of a first bit value B1 from the first voltage conversion unit 17A. The first phase shifter 16A of the first lower arm 15B1 intensity-modulates the optical signal with a data signal after inversion of the first bit value B1 from the first voltage conversion unit 17A. The second phase shifter 16B of the first upper arm 15A1 intensity-modulates the optical signal with a data signal of a second bit value B2 from the second voltage conversion unit 17B. The second phase shifter 16B of the first lower arm 15B1 intensity-modulates the optical signal with a data signal after inversion of the second bit value B2 from the second voltage conversion unit 17B. The third phase shifter 16C of the first upper arm 15A1 intensity-modulates the optical signal with a data signal of a third bit value B3 from the third voltage conversion unit 17C. Moreover, the third phase shifter 16C of the first lower arm 15B1 intensity-modulates the I-side optical signal with the data signal after inversion of the third bit value B3 from the third voltage conversion unit 17C.

[0266] The first upper arm 15A1 outputs the optically modulated signal intensity-modulated with the data signal to the first multiplexing unit 23A. Furthermore, the first lower arm 15B1 outputs the optically modulated signal intensity-modulated with the data signal to the first multiplexing unit 23A. The first multiplexing unit 23A multiplexes the optically modulated signal intensity-modulated by the first upper arm 15A1 and the optically modulated signal intensity-modulated by the first lower arm 15B1, and outputs the multiplexed ASK8 modulated signal to the third optical modulation unit 31C as the output of the first optical modulation unit 31A.

[0267] The phase shift amounts φ1, φ2, φ3, and φ0 of the first optical modulation section 31A are as shown in Equation 14. The phase shift amount φ1 is about 0.57 rad, the phase shift amount φ2 is about 0.91 rad, the phase shift amount φ3 is about 1.2 rad, and the phase shift amount φ0 is about 3.37 rad.

[0268]

number

[0269] The light intensity of the first optical modulation section 31A is as shown in (Equation 15).

[0270]

number

[0271] In the first optical modulation section 31A, the ratio of the first phase shifter 16A, the second phase shifter 16B, and the third phase shifter 16C is set to, for example, L1:L2:L3=21:34:45 so that the optical intensity for each signal level (1 to 8) is at equal intervals. As a result, since the optical intensity for each signal level (1 to 8) is at equal intervals, it is possible to sufficiently secure the linear portion of the sine curve that is the corresponding relationship between the optical intensity of the ASK8 modulated signal and the amount of phase shift.

[0272] The third optical modulation unit 31C includes a third data modulation unit 11C, a third encoder 12C, a third DAC 13C, a third optical waveguide 14C, and a third arm 15C disposed on the third optical waveguide 14C. The third data modulation unit 11C modulates the data signal into a bit string. The third encoder 12C converts the bit string data signal into a modulation input code. The third encoder 12C converts a first bit value b1 in the bit string data signal into a first bit value B1 in the modulation input code. The third encoder 12C converts a second bit value b2 in the bit string data signal into a second bit value B2 in the modulation input code. The third encoder 12C converts a third bit value b3 in the bit string data signal into a third bit value B3 in the modulation input code.

[0273] As shown in FIG. 36, the third encoder 12C converts the Gray code "b3b2b1" of the data signal into the modulation input code "B3B2B1". When the Gray code is "100", the third encoder 12C converts the Gray code "100" into the modulation input code "111". When the Gray code is "001", the third encoder 12C converts the Gray code "001" into the modulation input code "001". When the Gray code is "011", the third encoder 12C converts the Gray code "011" into the modulation input code "010". When the Gray code is "010", the third encoder 12C converts the Gray code "010" into the modulation input code "100". When the Gray code is "110", the third encoder 12C converts the Gray code "110" into the modulation input code "011". When the Gray code is "111", the third encoder 12C converts the Gray code "111" to the modulation input code "101". When the Gray code is "101", the third encoder 12C converts the Gray code "101" to the modulation input code "110". When the Gray code is "100", the third encoder 12C converts the Gray code "100" to the modulation input code "111".

[0274] The third DAC 13C performs analog conversion, i.e., voltage conversion, of the modulation input code of the data signal from the third encoder 12C. The third DAC 13C is 3-bit, and therefore has three voltage conversion units, for example, a seventh voltage conversion unit 27A, an eighth voltage conversion unit 27B, and a ninth voltage conversion unit 27C. The seventh voltage conversion unit 27A performs voltage conversion of the data signal of the first bit value B1 of the modulation input code from the third encoder 12C. The eighth voltage conversion unit 27B performs voltage conversion of the data signal of the second bit value B2 of the modulation input code from the third encoder 12C. The ninth voltage conversion unit 27C performs voltage conversion of the data signal of the third bit value B3 of the modulation input code from the third encoder 12C.

[0275] The third optical waveguide 14C has a waveguide core such as Si and a waveguide clad such as SiO2. The third optical waveguide 14C has a third branching section 22C and a third output section 24C. The third branching section 22C branches and outputs the intensity-modulated ASK8 modulated signal from the first optical modulation section 31 to a third arm 15C. The third arm 15C is, for example, an MZ interferometer.

[0276] The third arm 15C intensity-modulates the intensity-modulated ASK8 modulated signal from the first optical modulation unit 31A with the analog-converted data signal, and outputs the intensity-modulated GS64APSK modulated signal. Note that since the data signal is a 3-bit digital signal, the third arm 15C outputs the GS64APSK modulated signal, which is an optically modulated signal with 64 levels from signal level 1 to signal level 64.

[0277] The third arm 15C has a third phase shifter group, which is a plurality of phase shifters connected in series, for example, a first phase shifter 26A, a second phase shifter 26B, and a third phase shifter 26C. 11 : Electrode length L of the second phase shifter 26B of the third arm 15C 12 : Electrode length L of the third phase shifter 26C of the third arm 15C 13 In this case, L 11 :L 12 :L 13 The ratio is, for example, 1:2:4.

[0278] The seventh voltage converter 27A applies the voltage-converted data signal of the first bit value B1 to an electrode of the first phase shifter 26A of the third arm 15C. The eighth voltage converter 27B applies the voltage-converted data signal of the second bit value B2 to an electrode of the second phase shifter 26B of the third arm 15C. The ninth voltage converter 27C applies the voltage-converted data signal of the third bit value B3 to an electrode of the third phase shifter 26C of the third arm 15C.

[0279] The first phase shifter 26A of the third arm 15C intensity-modulates the intensity-modulated optical signal from the first optical modulation unit 31A with the data signal of the first bit value B1 from the seventh voltage conversion unit 27A. The second phase shifter 26B of the third arm 15C intensity-modulates the intensity-modulated optical signal from the first optical modulation unit 31A with the data signal of the second bit value B2 from the eighth voltage conversion unit 27B. The third phase shifter 26C of the third arm 15C intensity-modulates the intensity-modulated optical signal from the first optical modulation unit 31A with the data signal of the third bit value B3 from the ninth voltage conversion unit 27C.

[0280] The phase shift amount of the third optical modulation section 31C is as shown in (Equation 16).

[0281]

number

[0282] The phase shift amounts φ1, φ2, and φ3 of the third optical modulation section 31C are as shown in Equation 17. The phase shift amount φ1 of the third optical modulation section 31C is π / 8, the phase shift amount φ2 is π / 4, and the phase shift amount φ3 is π / 2.

[0283]

number

[0284] The third optical modulation section 31C adjusts the ratio of the first phase shifter 26A, the second phase shifter 26B, and the third phase shifter 26C to, for example, L 11 :L 12 :L 13 =1:2:4. As a result, the optical intensity for each signal level (1 to 64) is spaced equally, so that the linear portion of the sine curve representing the corresponding relationship between the optical intensity and the amount of phase shift of the GS64APSK modulated signal can be sufficiently secured.

[0285] The third optical modulation unit 31C intensity-modulates the intensity-modulated ASK8 modulated signal from the first optical modulation unit 31A with a data signal, and outputs the intensity-modulated optical modulated signal as a GS64APSK modulated signal, which is the output of the optical modulator 3F. Figure 37 is an explanatory diagram showing an example of a symbol of the optical modulator 3F. The symbol shown in Figure 37 is a symbol of the GS64APSK modulated signal output by the optical modulator 3F.

[0286] In the optical modulator 3F of the eleventh embodiment, the gray code of the data signal is converted into a modulation input code so that the optical intensity for each signal level is spaced at equal intervals, and the electrode lengths of the phase shifters in the first optical modulation section 31A and the third optical modulation section 31C that apply a data signal corresponding to the converted modulation input code are adjusted. As a result, the linear portion of the sine curve that represents the corresponding relationship between the electric field intensity and the amount of phase shift is sufficiently secured, so that the modulation loss and power consumption can be suppressed while the signal level intervals are spaced at equal intervals.

[0287] For convenience of explanation, the first encoder 12A of the eleventh embodiment is exemplified as encoding the input first data signal into a bit string in which the number of bits set to 1 increases or decreases according to the intensity of the symbol points of the first optical modulated signal, in a state in which the electrode lengths of the first phase shifter group and the second phase shifter group are set to lengths that make the intervals between the intensities of the symbol points of the first optical modulated signal equal. However, the present embodiment is not limited to a state in which the electrode lengths of the first phase shifter group and the second phase shifter group are set to lengths that make the intervals between the intensities of the symbol points of the first optical modulated signal equal, and is also applicable, for example, to a case in which the intervals between the intensities of the symbol points have a slight error due to manufacturing variations or the like. The error range of the intervals between the intensities of the symbol points is equal to the length within a range of ±20% or less.

[0288] That is, the first encoder 12A encodes the input first data signal into a bit string in which the number of bits set to 1 increases or decreases according to the intensity of the symbol points of the first optical modulated signal, with the electrode lengths of the first phase shifter group and the second phase shifter group set to a predetermined length determined in advance by the interval between the intensities of the symbol points of the first optical modulated signal. Even in this case, modulation loss and power consumption can be suppressed.

[0289] The third encoder 12C is exemplified as encoding the input third data signal into a bit string in which the number of bits set to 1 increases or decreases according to the intensity of the symbol points of the third optical modulated signal, with the electrode length of the third phase shifter group set to a length that makes the intervals between the intensities of the symbol points of the third optical modulated signal equal. However, the present embodiment is not limited to a state in which the electrode length of the third phase shifter group is set to a length that makes the intervals between the intensities of the symbol points of the third optical modulated signal equal, and is also applicable, for example, to a case in which the intervals between the intensities of the symbol points have a slight error due to manufacturing variations or the like. The error range of the intervals between the intensities of the symbol points is equal to the length within a range of ±20% or less.

[0290] That is, the third encoder 12C encodes the input third data signal into a bit string in which the number of bits set to 1 increases or decreases according to the intensity of the symbol points of the third optical modulated signal, with the electrode length of the third phase shifter group set to a predetermined length determined in advance by the interval between the intensities of the symbol points of the third optical modulated signal. Even in this case, modulation loss and power consumption can be suppressed.

[0291] For convenience of explanation, the optical transmitter 1 incorporating the optical modulator 3 of this embodiment has been exemplified, but the present invention may be applied to an optical communication device having an optical transmitter 1 incorporating the optical modulator 3 of this embodiment and an optical receiver. Also, the explanation has been given assuming the case of Gray code symbol mapping, but any symbol mapping other than Gray code may be used as long as it is a bit string of information to be transmitted. [Explanation of symbols]

[0292] 1 Optical transmitter 3 Optical Modulator 15A1 First upper arm 15A2 Second upper arm 15B1 First lower arm 15B2 Second Lower Arm 16 1st to Nth phase shifters 22 Branch 23 Multiplexing section 26A~26C 1st~3rd phase shifter 31A First optical modulation section 31B Second optical modulation section 31C Third optical modulation section 41 Input side branch 42 Output side multiplexing section

Claims

1. An encoder for encoding an input data signal; a branching unit that branches an optical signal into a first optical signal and a second optical signal; a first arm through which the first optical signal branched at the branching portion passes; a first phase shifter group including N phase shifters arranged on the first arm for each bit digit of a bit string of two or more N-digit binary numbers of the data signal output from the encoder, and configured to adjust an amount of phase shift of the first optical signal passing through the first arm in accordance with a bit value of each bit digit; a second arm through which the second optical signal branched at the branching portion passes; a second phase shifter group including N phase shifters arranged on the second arm for each bit digit, and adjusting a phase shift amount of the second optical signal passing through the second arm in accordance with a bit value of each bit digit so that the phase shift amount has an opposite sign to that of the first optical signal; a multiplexing section that multiplexes the first optical signal after phase adjustment using the first phase shifter group and the second optical signal after phase adjustment using the second phase shifter group to output an optical modulated signal, The encoder comprises: an optical modulator characterized in that, in a state in which the electrode lengths of the first phase shifter group and the second phase shifter group are set to a predetermined length determined in advance by the interval between the intensities of the symbol points of the optical modulated signal, and in which, with respect to the bit configurations of the bit strings for each intensity of the symbol point, a bit configuration of a bit string having an intensity corresponding to a minimum intensity +X (X is an integer equal to or greater than 0) is symmetrical to a bit configuration of a bit string having an intensity corresponding to a maximum intensity -X, and in which the bit configuration of the bit string having an intensity corresponding to the minimum intensity +X is equal to the bit configuration of the bit string having an intensity corresponding to the maximum intensity -X, the optical modulator encodes the input data signal into a bit string in which the number of bits that are 1 monotonically increases or decreases according to the intensity of the symbol point of the optical modulated signal.

2. The encoder comprises: Encoding the input data signal into an N-digit binary bit string based on a predetermined rule; The first group of phase shifters includes: the electrode lengths of the phase shifters in the first phase shifter group, which correspond to N phase shifters in the first phase shifter group and have a bit string of the N-digit binary number that is 1, are added together to determine the electrode length of the first phase shifter group; The second group of phase shifters includes:

2. The optical modulator according to claim 1, wherein the electrode length of the second phase shifter group is determined by adding up the electrode lengths of the phase shifters whose corresponding bits in the bit string of the N-digit binary number corresponding to the N phase shifters in the second phase shifter group are 1.

3. The encoder comprises: The optical modulator according to claim 2, characterized in that, when the number of "1"s in the bit string is the same, the bit digits are rearranged from smallest to largest, the sign of the bit digits after the rearrangement is inverted, and the bit digits after the sign inversion are reversed left to right, and the bit string of the input data signal is encoded based on the predetermined rule.

4. An encoder for encoding an input data signal; a branching unit that branches an optical signal into a first optical signal and a second optical signal; a first arm through which the first optical signal branched at the branching portion passes; a first phase shifter group including N phase shifters arranged on the first arm for each bit digit of a bit string of two or more N-digit binary numbers of the data signal output from the encoder, and configured to adjust an amount of phase shift of the first optical signal passing through the first arm in accordance with a bit value of each bit digit; a second arm through which the second optical signal branched at the branching portion passes; a second phase shifter group including N phase shifters arranged on the second arm for each bit digit, and adjusting an amount of phase shift of the second optical signal passing through the second arm in accordance with a bit value of each bit digit so that the amount of phase shift has an opposite sign to that of the first optical signal; a multiplexing section that multiplexes the first optical signal after phase adjustment using the first phase shifter group and the second optical signal after phase adjustment using the second phase shifter group to output an optical modulated signal, The encoder comprises: an optical transmitter that encodes an input data signal into a bit string in which the number of bits that are 1 monotonically increases or decreases according to the intensity of a symbol point of the optical modulated signal, in a state in which electrode lengths of the first phase shifter group and the second phase shifter group are set to a predetermined length that is determined in advance by an interval between intensities of symbol points of the optical modulated signal, and in which, with respect to the bit configurations of bit strings for each intensity of the symbol point, a bit configuration of a bit string having an intensity corresponding to a minimum intensity +X (X is an integer equal to or greater than 0) is symmetrical to a bit configuration of a bit string having an intensity corresponding to a maximum intensity -X, and in which the bit configuration of the bit string having an intensity corresponding to the minimum intensity +X is equal to the bit configuration of the bit string having an intensity corresponding to the maximum intensity -X, except for a case in which the bit configuration of the bit string having an intensity corresponding to the minimum intensity +X is equal to the bit configuration of the bit string having an intensity corresponding to the maximum intensity -X.

5. the first encoder encoding a first data signal, a second encoder encoding a second data signal, a branching unit branching an optical signal into a first optical signal of a first polarization, a second optical signal of the first polarization, a third optical signal of a second polarization, and a fourth optical signal of the second polarization, a first optical modulation unit intensity-modulating the first optical signal and the second optical signal of the first polarization from the branching unit with the first data signal, a second optical modulation unit intensity-modulating the third optical signal and the fourth optical signal of the second polarization from the branching unit with the second data signal, and a combining unit combining the first optical modulation signal intensity-modulated by the first optical modulation unit and the second optical modulation signal intensity-modulated by the second optical modulation unit and outputting the combined signal, The first optical modulation unit is a first upper arm through which the first optical signal of the first polarization passes; a first phase shifter group including N phase shifters arranged on the first upper arm for each bit digit of a bit string of two or more N-digit binary numbers of the first data signal output from the first encoder, and configured to adjust an amount of phase shift of the first optical signal passing through the first upper arm in accordance with a bit value of each bit digit; a first lower arm through which the second optical signal of the first polarization passes; a second phase shifter group including N phase shifters arranged on the first lower arm for each bit digit of the first data signal, and adjusting an amount of phase shift of the second optical signal passing through the first lower arm in accordance with a bit value of each bit digit so that the amount of phase shift has an opposite sign to that of the first optical signal; a first multiplexing section that multiplexes the first optical signal after phase adjustment using the first phase shifter group arranged in the first upper arm and the second optical signal after phase adjustment using the second phase shifter group arranged in the first lower arm, and outputs the first optical modulated signal; The second optical modulation unit is a second upper arm through which the third optical signal of the second polarization passes; a third phase shifter group including N phase shifters arranged on the second upper arm for each bit digit of an N-digit binary bit string of the second data signal output from the second encoder, and configured to adjust an amount of phase shift of the third optical signal passing through the second upper arm in accordance with a bit value of each bit digit; a second lower arm through which the branched fourth optical signal of the second polarization passes; a fourth phase shifter group including N phase shifters arranged on the second lower arm for each bit digit of the second data signal, and adjusting an amount of phase shift of the fourth optical signal passing through the second lower arm in accordance with a bit value of each bit digit so that the amount of phase shift has an opposite sign to that of the third optical signal; a second multiplexing section that multiplexes the third optical signal after phase adjustment using the third phase shifter group arranged in the second upper arm and the fourth optical signal after phase adjustment using the fourth phase shifter group arranged in the second lower arm, and outputs the second optical modulated signal; The first encoder comprises: encoding an input first data signal into a bit string in which the number of bits set to 1 monotonically increases or decreases according to the intensity of the symbol point of the first optical modulated signal, in a state in which the electrode lengths of the first phase shifter group and the second phase shifter group are set to a predetermined length that is determined in advance by the interval between the intensities of the symbol points of the first optical modulated signal, and in which, with respect to the bit configurations of bit strings for each intensity of the symbol point of the first optical modulated signal, a bit configuration of a bit string having an intensity corresponding to a minimum intensity +X (X is an integer equal to or greater than 0) and a bit configuration of a bit string having an intensity corresponding to a maximum intensity -X are in a symmetrical relationship, and in which the bit configuration of the bit string having an intensity corresponding to the minimum intensity +X and the bit configuration of the bit string having an intensity corresponding to the maximum intensity -X are equal, The second encoder comprises: an optical transmitter that encodes an input second data signal into a bit string in which the number of bits set to 1 monotonically increases or decreases according to the intensity of the symbol point of the second optical modulated signal, in a state in which electrode lengths of the third phase shifter group and the fourth phase shifter group are set to a predetermined length that is determined in advance by the interval between the intensities of the symbol points of the second optical modulated signal, and in which, with respect to the bit configurations of bit strings for each intensity of the symbol point of the second optical modulated signal, a bit configuration of a bit string with an intensity corresponding to a minimum intensity +X and a bit configuration of a bit string with an intensity corresponding to a maximum intensity -X are in a symmetrical relationship, and a case in which the bit configuration of the bit string with an intensity corresponding to the minimum intensity +X and the bit configuration of the bit string with an intensity corresponding to the maximum intensity -X are equal is excluded from the symmetrical relationship.

6. a first encoder that encodes a first data signal, a first optical modulation unit that intensity-modulates an optical signal with the first data signal output from the first encoder and outputs a first optical modulated signal, a third encoder that encodes a third data signal, and a third optical modulation unit that intensity-modulates the first optical modulated signal from the first optical modulation unit with the third data signal output from the third encoder and outputs a third optical modulated signal, The first optical modulation unit is a first branching unit that branches the optical signal into a first optical signal and a second optical signal; an upper arm through which the first optical signal branched at the first branching portion passes; a first phase shifter group including N phase shifters arranged on the upper arm for each bit digit of a bit string of two or more N-digit binary numbers of the first data signal, and configured to adjust an amount of phase shift of the first optical signal passing through the upper arm in accordance with a bit value of each bit digit; a lower arm through which the second optical signal branched at the first branching portion passes; a second phase shifter group including N phase shifters arranged on the lower arm for each bit digit of the first data signal, and adjusting an amount of phase shift of the second optical signal passing through the lower arm in accordance with a bit value of each bit digit so that the amount of phase shift has an opposite sign to that of the first optical signal; a first multiplexing section that multiplexes the first optical signal after phase adjustment using the first phase shifter group and the second optical signal after phase adjustment using the second phase shifter group to output the first optical modulated signal; The third optical modulation unit is a second branching unit that branches the first optical modulated signal; an arm through which the first modulated optical signal branched at the second branching section passes; a third phase shifter group including N phase shifters arranged on the arm for each bit digit of an N-digit binary bit string of the third data signal, and configured to adjust an amount of phase shift of the first optical modulated signal passing through the arm in accordance with a bit value of each bit digit to output a third optical modulated signal; The first encoder comprises: encoding an input first data signal into a bit string in which the number of bits set to 1 monotonically increases or decreases according to the intensity of the symbol point of the first optical modulated signal, in a state in which the electrode lengths of the first phase shifter group and the second phase shifter group are set to a predetermined length that is determined in advance by the interval between the intensities of the symbol points of the first optical modulated signal, and in which, with respect to the bit configurations of bit strings for each intensity of the symbol point of the first optical modulated signal, a bit configuration of a bit string having an intensity corresponding to a minimum intensity +X (X is an integer equal to or greater than 0) and a bit configuration of a bit string having an intensity corresponding to a maximum intensity -X are in a symmetrical relationship, and in which the bit configuration of the bit string having an intensity corresponding to the minimum intensity +X and the bit configuration of the bit string having an intensity corresponding to the maximum intensity -X are equal, The third encoder comprises: an optical transmitter which encodes an input third data signal into a bit string in which the number of bits set to 1 monotonically increases or decreases according to the intensity of the symbol point of the third optical modulated signal, in a state in which an electrode length of the third phase shifter group is set to a predetermined length that is determined in advance by an interval between intensities of symbol points of the third optical modulated signal, and in which, with respect to a bit string for each intensity of a symbol point of the third optical modulated signal, a bit string having an intensity corresponding to a minimum intensity +X and a bit string having an intensity corresponding to a maximum intensity -X are in a symmetrical relationship, and a case in which the bit string having an intensity corresponding to the minimum intensity +X and the bit string having an intensity corresponding to the maximum intensity -X are equal is excluded from the symmetrical relationship.

7. An optical communication device having an optical transmitter that transmits an optical modulated signal to a counterpart device, and an optical receiver that receives the optical modulated signal from the counterpart device, The optical communication device includes: An encoder for encoding an input data signal; a branching unit that branches an optical signal into a first optical signal and a second optical signal; a first arm through which the first optical signal branched at the branching portion passes; a first phase shifter group including N phase shifters arranged on the first arm for each bit digit of a bit string of two or more N-digit binary numbers of the data signal output from the encoder, and configured to adjust an amount of phase shift of the first optical signal passing through the first arm in accordance with a bit value of each bit digit; a second arm through which the second optical signal branched at the branching portion passes; a second phase shifter group including N phase shifters arranged on the second arm for each bit digit, and adjusting an amount of phase shift of the second optical signal passing through the second arm in accordance with a bit value of each bit digit so that the amount of phase shift has an opposite sign to that of the first optical signal; a multiplexing section that multiplexes the first optical signal after phase adjustment using the first phase shifter group and the second optical signal after phase adjustment using the second phase shifter group to output an optical modulated signal, The encoder comprises: an optical communication device that encodes an input data signal into a bit string in which the number of bits that are 1 monotonically increases or decreases according to the intensity of a symbol point of the optical modulated signal, in a state in which electrode lengths of the first phase shifter group and the second phase shifter group are set to a predetermined length that is determined in advance by an interval between the intensities of symbol points of the optical modulated signal, and in which, with respect to the bit configurations of the bit strings for each intensity of the symbol point, a bit configuration of a bit string having an intensity corresponding to a minimum intensity +X (X is an integer equal to or greater than 0) and a bit configuration of a bit string having an intensity corresponding to a maximum intensity -X are in a symmetrical relationship, and in which a case in which the bit configuration of the bit string having an intensity corresponding to the minimum intensity +X and the bit configuration of the bit string having an intensity corresponding to the maximum intensity -X are equal is excluded from the symmetrical relationship.

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