Sampling Assembly and Sampling Method

The sampling assembly and method address signal deviations in sampling circuits by using a self-calibration unit and switches to improve accuracy, compensating for errors in amplification and digital-to-analog conversion.

JP7609508B2Active Publication Date: 2025-01-07HUAWEI TECH CO LTD
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Patent Information

Application Number
JP2023537478
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2020-12-29
Publication Date
2025-01-07
Estimated Expiration
2040-12-29

AI Technical Summary

Technical Problem

The deviation between input and output signals in sampling circuits, influenced by factors like individual differences in the circuit, temperature, and operating voltage, affects sampling accuracy and stable operation.

Method used

A sampling assembly and method that includes a self-calibration unit, a sampling unit, and switches to compensate for signal deviations by determining an error signal, thereby improving sampling accuracy.

Benefits of technology

The solution effectively compensates for errors introduced by amplification and analog-to-digital conversion units, enhancing signal sampling accuracy.

✦ Generated by Eureka AI based on patent content.

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Abstract

A sampling assembly and a sampling method are provided. The self-calibration unit (230) controls the first switch (210) to be turned on to allow a first sampling signal to be input to the sampling unit (220). The sampling unit (220) processes the first sampling signal to obtain a second sampling signal and outputs the second sampling signal to the self-calibration unit (230). The self-calibration unit (230) controls the first switch (210) to be turned off and the second switch (240) to be turned on to output the first calibration signal to the sampling unit (220). The sampling unit (220) processes the first calibration signal to obtain a second calibration signal and outputs the second calibration signal to the self-calibration unit (230). The self-calibration unit (230) determines an error signal based on the first calibration signal and the second calibration signal. The self-calibration unit (230) obtains a calibrated third sampling signal based on the second sampling signal and the error signal. The method allows for compensation of deviations between the input and output signals of the sampling assembly, thereby improving sampling accuracy.
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Description

[Technical field]

[0001] The present application relates to the field of communications, and more particularly to a sampling assembly and method. [Background technology]

[0002] Generally, there is a deviation between the input signal and the output signal of a sampling circuit, which may vary due to individual differences of the sampling circuit, temperature, operating voltage, etc. This deviation seriously affects the sampling accuracy of the sampling circuit, and affects the stable and accurate operation of the system. Summary of the Invention

[0003] The present application provides a sampling assembly and a sampling method for compensating for the misalignment between the input signal and the output signal of a sampling circuit to improve sampling accuracy.

[0004] According to a first aspect, the present application provides a sampling assembly, the sampling assembly including a self-calibration unit, a sampling unit, a first switch, and a second switch.

[0005] The self-calibration unit is configured to control the first switch to be on to allow a first sampling signal to be input to the sampling unit, and the sampling unit is configured to process the first sampling signal to obtain a second sampling signal and output the second sampling signal to the self-calibration unit.

[0006] The self-calibration unit is further configured to control the first switch to be off, control the second switch to be on, and output a first calibration signal to the sampling unit. The sampling unit is further configured to process the first calibration signal to obtain a second calibration signal, and output the second calibration signal to the self-calibration unit. The self-calibration unit is further configured to determine an error signal based on the first calibration signal and the second calibration signal.

[0007] The self-calibration unit is further configured to obtain a calibrated third sampling signal based on the second sampling signal and the error signal.

[0008] In this way, according to the sampling assembly of the present application, an error signal can be obtained by the mutual cooperation of the self-calibration unit, the first switch, and the second switch, thereby making it possible to compensate for the deviation between the input signal and the output signal of the sampling assembly, thereby improving the sampling accuracy.

[0009] In some possible implementations, the sampling unit includes an amplification unit and / or an analog-to-digital conversion unit.

[0010] For example, if the first sampling signal is strong enough, analog-to-digital conversion can be performed directly without processing such as signal amplification. In other words, the technical solution of the present application can compensate for the error brought about by the digital-to-analog conversion unit, which helps to improve the signal sampling accuracy.

[0011] In another example, when the first sampling signal is not very strong, the first sampling signal can be subjected to signal amplification processing. In other words, the technical solution of the present application can compensate for the error caused by the amplification unit. Generally, the signal amplification part is the main part that causes the error. Therefore, the technical solution of the present application can effectively improve the signal sampling accuracy.

[0012] In another example, the sampling unit includes an amplification unit and an analog-to-digital conversion unit. In this way, the technical solution of the present application can compensate for the error caused by the amplification unit and the error caused by the analog-to-digital conversion unit, thereby effectively improving the signal sampling accuracy.

[0013] In some possible implementations, when the sampling unit includes an amplification unit and an analog-to-digital conversion unit, the sampling unit further includes a third switch. The self-calibration unit is further configured to control the third switch to be on when controlling the second switch to be on to allow input of the third calibration signal output by the amplification unit to the self-calibration unit. The self-calibration unit is specifically configured to determine an error signal based on the first calibration signal, the second calibration signal, and the third calibration signal.

[0014] In some possible implementations, the self-calibration unit includes a calibration unit and a control unit, where the calibration unit is configured to obtain an error signal, and the control unit is configured to receive the second sampling signal and obtain a third sampling signal based on the error signal and the second sampling signal, or the calibration unit is configured to obtain the third sampling signal and output the third sampling signal to the control unit.

[0015] The control unit may include at least one of a state machine, a digital signal processor (DSP), an advanced reduced instruction set computing machine (ARM), a linear power controller (LPC), and an MC51 single chip microcomputer, etc.

[0016] According to a second aspect, the present application provides a sampling method, the method being applied to a sampling assembly including a self-calibration unit, a sampling unit, a first switch, and a second switch. The method includes:

[0017] The self-calibration unit controls the first switch to be turned on to allow a first sampling signal to be input to the sampling unit, The sampling unit processes the first sampling signal to obtain a second sampling signal, and outputs the second sampling signal to the self-calibration unit.

[0018] The self-calibration unit controls the first switch to be off and the second switch to be on, and outputs a first calibration signal to the sampling unit. The sampling unit processes the first calibration signal to obtain a second calibration signal and outputs the second calibration signal to the self-calibration unit. The self-calibration unit determines an error signal based on the first calibration signal and the second calibration signal.

[0019] The self-calibration unit obtains a calibrated third sampling signal based on the second sampling signal and the error signal.

[0020] In this way, according to the sampling method of the present application, an error signal can be obtained by the mutual cooperation of the self-calibration unit, the first switch, and the second switch, thereby making it possible to compensate for the deviation between the input signal and the output signal of the sampling assembly, thereby improving the sampling accuracy.

[0021] In some possible implementations, the sampling unit includes an amplification unit and / or an analog-to-digital conversion unit.

[0022] For example, if the first sampling signal is strong enough, analog-to-digital conversion can be performed directly without processing such as signal amplification. In other words, the technical solution of the present application can compensate for the error brought about by the digital-to-analog conversion unit, which helps to improve the signal sampling accuracy.

[0023] In another example, when the first sampling signal is not very strong, the first sampling signal can be subjected to signal amplification processing. In other words, the technical solution of the present application can compensate for the error caused by the amplification unit. Generally, the signal amplification part is the main part that causes the error. Therefore, the technical solution of the present application can effectively improve the signal sampling accuracy.

[0024] In another example, the sampling unit includes an amplification unit and an analog-to-digital conversion unit. In this way, the technical solution of the present application can compensate for the error caused by the amplification unit and the error caused by the analog-to-digital conversion unit, thereby effectively improving the signal sampling accuracy.

[0025] In some possible implementations, when the sampling unit includes an amplification unit and an analog-to-digital conversion unit, the sampling unit further includes a third switch. The method further includes, when the self-calibration unit controls the second switch to be on, controlling the third switch to be on to enable input of the third calibration signal output by the amplification unit to the self-calibration unit. Determining the error signal based on the first calibration signal and the second calibration signal includes determining the error signal based on the first calibration signal, the second calibration signal, and the third calibration signal.

[0026] In some possible implementations, the self-calibration unit includes a calibration unit and a control unit. The self-calibration unit obtaining the calibrated third sampling signal based on the second sampling signal and the error signal includes the calibration unit obtaining the error signal. The control unit receives the second sampling signal and obtains the third sampling signal based on the error signal and the second sampling signal. Alternatively, the calibration unit obtains the third sampling signal and outputs the third sampling signal to the control unit.

[0027] According to a third aspect, the present application provides a chip, the chip comprising a processor and a sampling assembly according to the first aspect or any one of the possible implementations of the first aspect.

[0028] According to a fourth aspect, the present application provides an integrated circuit, the integrated circuit comprising a sampling assembly according to the first aspect or any one of the possible implementations of the first aspect.

[0029] According to a fifth aspect, the present application provides power sourcing equipment (PSE) including a sampling assembly according to the first aspect or any one of the possible implementations of the first aspect.

[0030] According to a sixth aspect, the present application provides an electronic device, the electronic device including a processor, a memory, and a sampling assembly according to the first aspect or any one of the possible implementations of the first aspect.

[0031] According to a seventh aspect, the present application provides a Power over Ethernet (POE) system, the system including a sampling assembly according to the first aspect or any one of the possible implementations of the first aspect.

[0032] According to an eighth aspect, the present application provides a computer-readable storage medium comprising instructions which, when executed on a computer, perform the method of the second aspect or any one of the possible implementations of the second aspect. [Brief description of the drawings]

[0033] [Figure 1] FIG. 1 is a schematic diagram of the working procedure of a POE system.

[0034] [Diagram 2] 1 is a schematic diagram of a structure of a sampling assembly according to the present application.

[0035] [Diagram 3] FIG. 2 is another schematic diagram of the structure of a sampling assembly according to the present application.

[0036] [Figure 4] FIG. 2 is another schematic diagram of the structure of a sampling assembly according to the present application.

[0037] [Diagram 5] FIG. 2 is a schematic diagram of the structure of a self-calibration unit according to the present application;

[0038] [Figure 6] 1 is a schematic diagram of possible locations of a sampling resistor according to the present application;

[0039] [Figure 7] 1 is a schematic flow chart of a sampling method according to the present application. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0040] The technical solutions of the present application are described below with reference to the accompanying drawings.

[0041] The technical solutions in the embodiments of the present application may be applied to various sampling scenarios, such as a POE scenario, a power amplifier current detection scenario, a module power consumption detection scenario, a voltage detection scenario, a current detection scenario, a power detection scenario, a pressure detection scenario, a blood pressure detection scenario, a field strength detection scenario, and a gravity detection scenario.

[0042] In the following, the POE scenario is used as an example to illustrate the technical solution of the present application.

[0043] POE can provide DC power supply technology for some internet protocol (IP)-based terminals (e.g. IP telephones, wireless local area network access points (APs), and network cameras) in addition to transmitting data signals without making any changes to the existing Ethernet cable infrastructure. POE can ensure the standard operation of the existing network and also ensure the safety of the existing structured cabling, thus minimizing the cost.

[0044] A complete POE system includes two elements: PSE and powered device (PD). PSE is the device that supplies power to Ethernet client devices and is also the manager of the whole POE power supply process. PD is the PSE load that receives power, i.e. the client device of the POE system, such as an Ethernet device, such as an IP phone, a network security camera, an AP, a palmtop computer, or a mobile phone charger (actually, any device that does not exceed 13W of power can obtain the corresponding power from the twisted pair socket). According to the IEEE (Institute of Electrical and Electronics Engineers) standards 802.3af, 802.3AT, and 802.3BT, the PSE and PD establish a linkage of information related to the connection status, device type, and power consumption level of the PD, and the PSE provides power to the PD through Ethernet based on this linkage of information.

[0045] FIG. 1 is a schematic diagram of the working procedure of the POE system.

[0046] As shown in FIG. 1, the operation procedures of the POE system include detection, classification, power up, operation, and disconnection, etc.

[0047] (1) Detection

[0048] At this stage, the PSE detects whether a PD is present. Only if a PD is detected, the PSE performs the following operations:

[0049] In one implementation, the PSE measures the resistance-capacitance between the output power wire pair to determine if a PD is present.

[0050] For example, during the detection phase, the output voltage of the PSE ranges from 2.8V to 10V, and the voltage polarity is the same as that of the -48V output voltage. The PSE measures the resistance-capacitance between the output power wire pair to determine whether a PD is present. A PD has the following characteristics: (a) DC impedance ranges from 19kΩ to 26.5kΩ; (b) capacitance is less than or equal to 150nF.

[0051] (2) Classification

[0052] This step is an optional process.

[0053] At this stage, the PSE determines the power consumption of the PD.

[0054] In one implementation, the PSE determines the power level of the PD by measuring the output power current.

[0055] For example, in the classification stage, the output voltage of the PSE ranges from 15.5V to 20.5V, and the voltage polarity is the same as that of the -48V output voltage.

[0056] (3) Start

[0057] At this stage, the PSE powers up the PD.

[0058] For example, if the PSE detects that the device connected to the PSE port is a valid PD and the PSE has completed classification of the PD (optional), the PSE will initiate power-up of the PD and output a voltage of -48V.

[0059] (4) Operation

[0060] At this stage, the PSE performs real time protection (RTP) and power management (PM).

[0061] (5) Disconnection

[0062] At this stage, the PSE detects whether the PD is disconnected or not. This stage is a key part of local detection.

[0063] From the above, we can see that accurate signal detection by the PSE is essential for the operation of a POE system.

[0064] Generally, there is a deviation between the input signal and the output signal of the sampling circuit in the POE system, which may vary due to individual differences of the sampling circuit, temperature, operating voltage, batch, etc. This deviation will seriously affect the sampling accuracy of the sampling circuit, and affect the stable and accurate operation of the POE system.

[0065] The present application provides a sampling assembly and a sampling method for compensating for the misalignment between the input signal and the output signal of a sampling circuit to improve sampling accuracy.

[0066] FIG. 2 is a schematic diagram of the structure of a sampling assembly according to the present application.

[0067] The sampling assembly herein may be used in a POE system or in another system or scenario where sampling needs to be performed.

[0068] The sampling assembly shown in FIG. 2 may include a first switch 210, a sampling unit 220, a self-calibration unit 230, and a second switch 240. As shown in FIG. 2, the first switch 210 is connected to the sampling unit 220. The sampling unit 220 is separately connected to the first switch 210, the second switch 240, and the self-calibration unit 230. The self-calibration unit 230 is connected to the sampling unit 220 and the second switch 240. The self-calibration unit 230 is configured to control the first switch 210 and the second switch 240 to be turned on or off to compensate the sampling signal. The sampling unit 220 is configured to process the received signal, for example, to perform amplification or analog-to-digital conversion on the received signal.

[0069] The specific functions of each unit of the sampling assembly are described below.

[0070] The self-calibration unit 230 is configured to control a first switch to be turned on to allow a first sampling signal to be input to the sampling unit 220. The sampling unit 220 is configured to process the first sampling signal to obtain a second sampling signal, and output the second sampling signal to the self-calibration unit 230.

[0071] The self-calibration unit 230 is further configured to control the first switch 210 to be off, control the second switch 240 to be on, and output a first calibration signal to the sampling unit 220. The sampling unit 220 is further configured to process the first calibration signal to obtain a second calibration signal, and output the second calibration signal to the self-calibration unit 230. The self-calibration unit 230 is further configured to determine an error signal based on the first calibration signal and the second calibration signal.

[0072] The self-calibration unit 230 is further configured to obtain a calibrated third sampling signal based on the second sampling signal and the error signal.

[0073] Thus, according to the sampling assembly in this embodiment of the present application, an error signal can be obtained through the mutual cooperation of the self-calibration unit 230, the first switch 210, and the second switch 240, thereby making it possible to compensate for the deviation between the input signal and the output signal of the sampling assembly, thereby improving the sampling accuracy.

[0074] In some implementation examples, the self-calibration unit 230 can periodically control the first switch 210 to be turned on or off to perform periodic sampling. The periodicity of turning on or off the first switch 210 is not particularly limited in this application, in other words, the sampling period is not particularly limited. In this application, the error signal may be determined in each sampling period, and the second sampling signal is compensated based on the error signal determined in real time. Alternatively, the error signal may be determined once every N sampling periods, where N is an integer greater than 1. The second sampling signal is compensated using the same error signal in N sampling periods.

[0075] It should be noted that the present application is not particularly limited to determining the error signal first or obtaining the second sampling signal first.

[0076] The processing that may be performed by the sampling unit 220 is not particularly limited in this embodiment of the present application.

[0077] FIG. 3 is another schematic diagram of the structure of a sampling assembly according to the present application.

[0078] In some implementations, as shown in Fig. 3, the sampling unit 220 includes a digital-to-analog conversion unit 221. The digital-to-analog conversion unit 221 is configured to perform digital-to-analog conversion on the first sampling signal. The digital-to-analog conversion unit 221 may include at least one digital-to-analog converter. In other words, the technical solution of the present application can compensate for the error caused by the digital-to-analog conversion unit 221, which helps to improve the signal sampling accuracy.

[0079] For example, if the first sampling signal is strong enough, analog-to-digital conversion can be performed directly without processing such as signal amplification.

[0080] In some other implementations, as shown in FIG. 3, the sampling unit 220 includes an amplifying unit 222. The amplifying unit 222 is configured to amplify the first sampling signal. The digital-to-analog converting unit 222 may include at least one operational amplifier. In other words, the technical solution of the present application can compensate for the error caused by the amplifying unit 222. Generally, the signal amplifying part is the main part that causes the error. Therefore, the technical solution of the present application can effectively improve the signal sampling accuracy.

[0081] For example, if the first sampled signal is not very strong, a signal amplification process can be performed on the first sampled signal.

[0082] Further, in some implementations, as shown in Fig. 3, the sampling unit 220 includes an amplification unit 222 and a digital-to-analog conversion unit 221. For the description of the amplification unit 222 and the digital-to-analog conversion unit 221, please refer to the above description. In other words, the technical solution of the present application can compensate for the error caused by the amplification unit 222 and the error caused by the analog-to-digital conversion unit 221, thereby effectively improving the signal sampling accuracy.

[0083] FIG. 4 is another schematic diagram of the structure of a sampling assembly according to the present application.

[0084] As shown in FIG. 4, when the sampling unit 220 includes the amplification unit 222 and the digital-to-analog conversion unit 221, the sampling assembly may further include a third switch 250. The third switch 250 is connected to the output end of the amplification unit 222 and the self-calibration unit 230. In this case, the self-calibration unit 230 is further configured to control the third switch 250 to be turned on when controlling the second switch 240 to be turned on, to allow the third calibration signal output by the amplification unit 222 to be input to the self-calibration unit 230. The self-calibration unit 230 is specifically configured to determine an error signal based on the first calibration signal, the second calibration signal, and the third calibration signal, and compensate the second sampling signal based on the obtained error signal to obtain the third sampling signal. In other words, the error signals are determined separately for the amplification unit 222 and the analog-to-digital conversion unit 221, so as to improve the calibration success rate and reduce the calibration time.

[0085] FIG. 5 is a schematic diagram of the structure of a self-calibration unit 230 according to the present application.

[0086] 5, the self-calibration unit 230 may include a calibration unit 231 and a control unit 232. The functional division of the calibration unit 231 and the control unit 232 is not particularly limited in this embodiment of the present application.

[0087] In some implementations, the calibration unit 231 obtains an error signal based on the first calibration signal, the second calibration signal, and a third calibration signal (optional), and outputs the obtained error signal to the control unit 232. The control unit 232 receives the second sampling signal, and obtains a compensated third sampling signal based on the error signal output by the calibration unit 231 and the second sampling signal.

[0088] In some other implementation examples, the calibration unit 231 obtains an error signal based on the first calibration signal, the second calibration signal, and the third calibration signal (optional), obtains a compensated third sampling signal based on the obtained error signal and the second sampling signal, and outputs the third sampling signal to the control unit 232.

[0089] In the present application, the input signal of the sampling assembly may be a current signal or a voltage signal. In some implementations, when the input signal of the sampling assembly is a current signal, the sampling assembly needs to further include a sampling resistor 250.

[0090] FIG. 6 is a schematic diagram of possible setting positions of the sampling resistor according to the present application. As shown in FIG. 6(a), one end of the sampling resistor 250 is connected to the output end of the first switch 210, and the other end is grounded (GND). As shown in FIG. 6(b), one end of the sampling resistor 250 is connected to the input end of the first switch 210, and the other end is grounded. As shown in FIG. 6(c), the first sampling signal may alternatively be in a differential form. In this case, one end of the sampling resistor 250 is connected to the output end of the first switch 210, and the other end is not limited. The first sampling signal is a voltage signal at the two ends of the sampling resistor 250. Optionally, when the sampling assembly includes a differential operational amplifier, the two ends of the sampling resistor 250 may be inputted separately to the differential signal input ends of the differential operational amplifier.

[0091] It should be noted that the sampling resistor 250 may be a solid resistor or may be a resistor made using a metal-oxide semiconductor field effect transistor (MOS-FET) or a transistor, without any limitation thereto. The sampling resistor 250 may be integrated on chip or may be an external solid resistor, without any limitation thereto.

[0092] It should be noted that when the sampling assembly in the present application is used for sampling a chip, the sampling assembly may function as a part of the chip and may be disposed inside the chip, or a part of the sampling assembly may be disposed inside the chip and a part of the sampling assembly may be disposed outside the chip, or the entire sampling assembly may be disposed outside the chip, without any limitation thereto.

[0093] The sampling assembly provided herein has been described in detail above. The sampling method provided herein will now be described.

[0094] 7 is a schematic flow chart of a sampling method according to the present application. The method is applied to a sampling assembly including a self-calibration unit, a sampling unit, a first switch, and a second switch. The method includes the following steps:

[0095] Step 710: The self-calibration unit controls the first switch to be turned on, to enable the input of the first sampling signal to the sampling unit.

[0096] Step 720: The sampling unit processes the first sampling signal to obtain a second sampling signal, and outputs the second sampling signal to the self-calibration unit.

[0097] Step 730: The self-calibration unit controls the first switch to be turned off, controls the second switch to be turned on, and outputs a first calibration signal to the sampling unit.

[0098] Step 740: The sampling unit processes the first calibration signal to obtain a second calibration signal, and outputs the second calibration signal to the self-calibration unit.

[0099] Step 750: The self-calibration unit determines an error signal based on the first calibration signal and the second calibration signal.

[0100] Step 760: The self-calibration unit obtains a calibrated third sampling signal based on the second sampling signal and the error signal.

[0101] Optionally, the sampling unit includes an amplification unit and / or an analog-to-digital conversion unit.

[0102] Optionally, when the sampling unit includes an amplification unit and an analog-to-digital conversion unit, the sampling unit further includes a third switch. The method further includes, when the self-calibration unit controls the second switch to be on, controlling the third switch to be on to enable input of a third calibration signal output by the amplification unit to the self-calibration unit. Determining an error signal based on the first calibration signal and the second calibration signal includes determining an error signal based on the first calibration signal, the second calibration signal, and the third calibration signal.

[0103] Optionally, the self-calibration unit includes a calibration unit and a control unit. The self-calibration unit obtaining a calibrated third sampling signal based on the second sampling signal and the error signal includes the calibration unit obtaining the error signal. The control unit receives the second sampling signal and obtains the third sampling signal based on the error signal and the second sampling signal. Alternatively, the calibration unit obtains the third sampling signal and outputs the third sampling signal to the control unit.

[0104] For a more detailed description of the sampling method herein, please refer to the description of the sampling assembly, and the details will not be repeated here.

[0105] The present application further provides a chip, the chip including the sampling assembly according to any one of the above-mentioned embodiments.

[0106] The present application further provides an integrated circuit, the integrated circuit comprising the sampling assembly according to any one of the preceding embodiments.

[0107] The present application further provides a PSE, the PSE including a sampling assembly according to any one of the preceding embodiments.

[0108] The present application further provides a POE system, the system including a sampling assembly according to any one of the above-mentioned embodiments.

[0109] The present application further provides a computer readable storage medium containing instructions that, when executed on a computer, perform the method shown in FIG.

[0110] Terms such as "component", "module" and "system" as used herein refer to computer-related entities, hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable file, a thread of execution, a program, or a computer. As illustrated with the figures, both computing devices and applications running on computing devices may be components. One or more components may reside within a process or thread of execution, and the components may be located on one computer or distributed among two or more computers. Furthermore, these components may execute from various computer-readable media that store various data structures. For example, the components may communicate using local or remote processes based on signals having one or more data packets (e.g., data from two components communicating with another component in a local system, in a distributed system, or across a network such as the Internet communicating with another system using signals).

[0111] References throughout this specification to an "embodiment" should be understood to mean that the particular feature, structure, or characteristic associated with the embodiment is included in at least one embodiment of the present application. Thus, each embodiment throughout the specification does not necessarily refer to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner into one or more embodiments.

[0112] It should be understood that in the embodiments of the present application, the numbers such as "first" and "second" are merely for distinguishing different objects, for example, for distinguishing different switches, and do not constitute limitations on the scope of the embodiments of the present application. The embodiments of the present application are not limited thereto.

[0113] It should be further understood that in this application, both "when" and "if" mean that the network element performs corresponding processing in an objective situation, but do not constitute any limitation on time, and do not require that the network element have a decision-making action during implementation, nor do they imply any other limitation.

[0114] It should be further understood that, as used herein, "at least one" means one or more, and "multiple" means two or more.

[0115] In the embodiments of the present application, it is further understood that "B corresponding to A" indicates that B is related to A, and B can be determined based on A. However, it is further understood that determining B based on A does not mean that B is determined based only on A. B may alternatively be determined based on A and / or other information.

[0116] It should also be understood that the term "and / or" in this specification describes only a correspondence relationship to describe related objects, and indicates that three relationships may exist. For example, A and / or B may represent the following three cases: only A exists, both A and B exist, and only B exists. Furthermore, the symbol " / " in this specification generally indicates an "or" relationship between related objects.

[0117] Unless otherwise specified, expressions similar to "an item includes one or more of A, B, and C" used in this application usually mean that the item can be any one of A; B; C; A and B; A and C; B and C; A, B, and C; A and A; A, A, and A; A, A, and B; A, A, and C; A, B, and B; A, C, and C; B and B; B, B, and B; B, B, and C; C and C; C, C, and C; and A, B, and C. In the above description, three elements A, B, and C are used as an example to explain the optional case of this item. When an expression is "this item includes at least one of A, B, ..., and X", in other words, when more elements are included in this expression, the applicable case of this item can also be obtained according to the above-mentioned rules.

[0118] It will be understood that the PSE may perform some or all of the steps in the embodiments of the present application. These steps or operations are merely examples. The embodiments of the present application may further include performing other operations or variations of various operations. Furthermore, the steps may be performed in a different order than presented in the embodiments of the present application, and not all of the operations in the embodiments of the present application may be performed.

[0119] In combination with the examples described in the embodiments disclosed herein, those skilled in the art will recognize that the units and algorithm steps can be realized by electronic hardware or a combination of computer software and electronic hardware. Whether these functions are performed by hardware or software depends on the specific application and the design constraints of the technical solution. Those skilled in the art may use different methods to implement the described functions for each specific application, but such implementation should not be considered as going beyond the scope of this application.

[0120] For the sake of convenience and conciseness, the detailed work processes of the above-mentioned systems, devices and units may be referred to the corresponding processes in the above-mentioned method embodiments, which will be clearly understood by those skilled in the art, and the details will not be described again here.

[0121] In the embodiments provided in the present application, it should be understood that the disclosed system, device, and method may be implemented in other ways. For example, the described device embodiment is merely an example. For example, the division into multiple units is merely a logical division of functions, and may be other divisions in actual implementation. For example, multiple units or components may be combined or integrated into another system, or some functions may be ignored or not performed. Furthermore, the shown or described mutual coupling or direct coupling or communication connection may be realized using some interfaces. The indirect coupling or communication connection between devices or units may be realized in electronic, mechanical, or other forms.

[0122] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, and may be located in one location or distributed over multiple network units. To achieve the objectives of the solutions of the embodiments, some or all of the units may be selected based on actual requirements.

[0123] Furthermore, each functional unit in the embodiments of the present application may be integrated into one processing unit, each of these units may exist physically alone, or two or more units may be integrated into one unit.

[0124] When each function is implemented in the form of a software functional unit and sold or used as an independent product, these functions may be stored in a computer-readable storage medium. Based on such understanding, the technical solutions of the present application may be essentially implemented in the form of a software product, or a part that contributes to the prior art, or a part of these technical solutions. The computer software product is stored in a storage medium and includes a plurality of instructions for instructing a computer device (which may be a personal computer, a server, or a network device) to perform all or part of the steps of the method described in the embodiments of the present application. The aforementioned storage medium includes any medium that can store program code, such as a USB flash drive, a removable hard disk, a read-only memory ROM, a random access memory RAM, a magnetic disk, or an optical disk.

[0125] The above description is merely a specific implementation example of the present application, and is not intended to limit the protection scope of the present application. Any variations or replacements that a person skilled in the art can easily think of within the technical scope disclosed in the present application shall be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A sampling assembly, the sampling assembly comprising a self-calibration unit, a sampling unit, a first switch, and a second switch; The self-calibration unit is configured to control the first switch to be on to enable input of a first sampling signal to the sampling unit; the sampling unit is configured to process the first sampling signal to obtain a second sampling signal, and output the second sampling signal to the self-calibration unit; the self-calibration unit is further configured to control the first switch to be off, control the second switch to be on, and output a first calibration signal to the sampling unit; the sampling unit is further configured to process the first calibration signal to obtain a second calibration signal and output the second calibration signal to the self-calibration unit; the self-calibration unit is further configured to determine an error signal based on the first calibration signal and the second calibration signal; the self-calibration unit is further configured to obtain a calibrated third sampling signal based on the second sampling signal and the error signal; the sampling unit comprises an amplification unit and / or an analog-to-digital conversion unit; When the sampling unit includes the amplification unit and the analog-to-digital conversion unit, the sampling unit further includes a third switch; the self-calibration unit is further configured to, when controlling the second switch to be turned on, control the third switch to be turned on to allow input of a third calibration signal output by the amplification unit to the self-calibration unit; The self-calibration unit is particularly configured to determine the error signal based on the first calibration signal, the second calibration signal, and the third calibration signal.

2. the self-calibration unit comprises a calibration unit and a control unit; the calibration unit is configured to obtain the error signal, and the control unit is configured to receive the second sampling signal and obtain the third sampling signal based on the error signal and the second sampling signal; or The sampling assembly of claim 1 , wherein the calibration unit is configured to obtain the third sampling signal and output the third sampling signal to the control unit.

3. A sampling method, the sampling method being applied to a sampling assembly including a self-calibration unit, a sampling unit, a first switch, and a second switch, the sampling method comprising: controlling the self-calibration unit to turn on the first switch to enable input of a first sampling signal to the sampling unit; the sampling unit processes the first sampling signal to obtain a second sampling signal, and outputs the second sampling signal to the self-calibration unit; the self-calibration unit controls the first switch to be turned off, controls the second switch to be turned on, and outputs a first calibration signal to the sampling unit; the sampling unit processing the first calibration signal to obtain a second calibration signal, and outputting the second calibration signal to the self-calibration unit; the self-calibration unit determining an error signal based on the first calibration signal and the second calibration signal; and The self-calibration unit obtains a calibrated third sampling signal based on the second sampling signal and the error signal. Equipped with the sampling unit comprises an amplification unit and / or an analog-to-digital conversion unit; When the sampling unit includes an amplification unit and an analog-to-digital conversion unit, the sampling unit further includes a third switch; The sampling method further comprises: a step of controlling the self-calibration unit to turn on the third switch when the second switch is controlled to be turned on, thereby enabling an input of a third calibration signal output by the amplification unit to the self-calibration unit; determining an error signal based on the first calibration signal and the second calibration signal; A method of sampling comprising determining the error signal based on the first calibration signal, the second calibration signal, and the third calibration signal.

4. the self-calibration unit having a calibration unit and a control unit; the step of the self-calibration unit obtaining a calibrated third sampling signal based on the second sampling signal and the error signal, the calibration unit acquiring the error signal; the control unit receiving the second sampling signal and acquiring the third sampling signal based on the error signal and the second sampling signal; or The calibration unit obtains the third sampling signal and outputs the third sampling signal to the control unit. The method of claim 3, comprising:

5. A chip comprising a sampling assembly according to claim 1 or 2.

6. An integrated circuit comprising a sampling assembly according to claim 1 or 2.

7. A computer readable storage medium comprising instructions which, when executed by a computer, perform the sampling method according to claim 3 or 4.

8. A program for causing a computer to execute the sampling method according to claim 3 or 4.

Citation Information

Patent Citations

  • Digital output device

    JP2007267126A

  • Data processing device and data processing system

    JP2010259035A