POWER CONVERSION DEVICE, CONTROL METHOD FOR POWER CONVERSION DEVICE, AND PROGRAM

Abstract

To provide a power conversion device, a control method for the same, and a program capable of suppressing disturbance components including those contained in circulating currents flowing in a modular multi-level converter of a delta-connection type.SOLUTION: The power conversion device has a power converter and a control device. The power converter includes a delta-connection circuit in which three phase circuits corresponding to the portions between each of the three phases of a power system that is interconnected with each other are delta-connected. The control device controls the power converter. In the phase circuits, an arm with a plurality of cells including a plurality of self-extinguishing semiconductor switching elements and a DC capacitor connected in series, and an impedance component are connected in series. The phase circuits each include a current detector for detecting an arm current flowing in the arm at an arbitrary position in a circuit connected in series. The control device detects a circulating current flowing in the delta-connection circuit on the basis of the arm current and controls the power converter to suppress a predetermined disturbance component included in the detected circulating current.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] An embodiment of the present invention relates to a power conversion device, a control method for the power conversion device, and a program. [Background technology]

[0002] In recent years, the introduction of renewable energy sources such as solar power generation and wind power generation has been expanding. There is concern that the supply of power from renewable energy sources may cause the voltage of the power grid to become unstable. For this reason, there is an increasing demand for static synchronous compensators (STATCOMs) to ensure stable operation of the power grid. STATCOMs compensate for reactive power using a self-commutated converter. STATCOMs are introduced, for example, in power transmission and distribution systems installed in substations and are operated continuously. During normal operation, STATCOMs contribute to stabilizing the system voltage by controlling the reactive power at the interconnection point.

[0003] In recent years, there has been an increase in the use of modular multilevel converters (MMCs) as a circuit topology for STATCOMs. MMCs are power converters that have arms that are made up of multiple stages of small-capacity converters called cells, and can multi-level the voltage level of the output voltage that is output to the AC side according to the number of cell stages. By using MMCs in STATCOMs, there is an advantage in that it is no longer necessary to have an AC filter, which was previously necessary.

[0004] For example, a delta-connected MMC in which both ends of an arm corresponding to each of the three phases are connected to different phases is used in a STATCOM. In a delta-connected MMC, a circulating current flows in the delta connection according to the zero-sequence component of the output voltage of the arm between each phase and the impedance component in the delta-connected configuration. In general, in a delta-connected MMC, the circulating current is controlled to balance the voltage (charge amount) of the capacitors constituting the cells so that they are relatively uniform. However, if a control error occurs due to the influence of delay time caused by calculations and communications for controlling the operation of the delta-connected MMC, the circulating current may become a circulating current that is not necessary for controlling the voltage of the capacitors due to a disturbance component being superimposed on the zero-sequence component. The circulating current with the disturbance component superimposed may increase the power loss during operation (driving) of the delta-connected MMC by flowing through the semiconductor elements constituting the cells. As a countermeasure against this, an impedance component may be added to the delta connection. In this case, however, it becomes necessary to use large components (especially passive elements) with high rated values ​​that make up the delta-connected MMC, which increases the cost of the components. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] International Publication No. 2016 / 017517 Summary of the Invention [Problem to be solved by the invention]

[0006] The problem to be solved by the present invention is to provide a power conversion device, a control method for the power conversion device, and a program capable of suppressing disturbance components contained in a circulating current flowing through a delta-connected modular multilevel converter. [Means for solving the problem]

[0007] A power conversion device according to an embodiment is a power conversion device connected to a three-phase power system, and includes a power converter and a control device. The power converter includes a delta connection circuit in which three phase circuits corresponding to the respective phases of the power system are delta-connected. The control device controls the power converter. The phase circuit includes an arm in which a plurality of cells, each of which includes a plurality of self-extinguishing semiconductor switching elements and a DC capacitor, are connected in series, and an impedance component is connected in series, and includes a current detector at an arbitrary position of the series-connected circuit for detecting an arm current flowing in the arm. The control device detects a circulating current flowing in the delta connection circuit based on the arm current, and controls the power converter so as to suppress a predetermined disturbance component included in the detected circulating current. [Brief description of the drawings]

[0008] [Figure 1] 1 is a diagram showing an example of the configuration of a power conversion device according to a first embodiment. [Diagram 2] FIG. 2 is a diagram showing an example of a configuration of a cell included in an MMC. [Diagram 3] FIG. 4 is a schematic waveform diagram showing an example of a waveform of a delta connection circuit in the MMC. [Figure 4] 5 is a flowchart showing an example of a circulating current suppression control process in the control device. [Diagram 5] FIG. 2 is a diagram showing an example of a functional configuration for realizing a first zero-phase disturbance voltage compensation function in the control device. [Figure 6] FIG. 4 is a schematic waveform diagram showing an example of a waveform of a delta connection circuit in the MMC when the control device executes a first zero-phase disturbance voltage compensation function. [Figure 7] FIG. 4 is a diagram showing an example of a functional configuration for realizing a second zero-phase disturbance voltage compensation function in the control device. [Figure 8] FIG. 11 is a schematic waveform diagram showing an example of a waveform of a delta connection circuit in the MMC when the control device executes a second zero-phase disturbance voltage compensation function. [Figure 9] FIG. 13 is a diagram showing an example of a functional configuration for realizing a third zero-phase disturbance voltage compensation function in the control device. [Figure 10]FIG. 13 is a diagram showing an example of the configuration of a power conversion device according to a second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, a power conversion device, a control method for the power conversion device, and a program according to an embodiment will be described with reference to the drawings.

[0010] (First embodiment) [Power conversion device configuration] FIG. 1 is a diagram showing an example of the configuration of a power conversion device according to a first embodiment. FIG. 1 shows an example of a power conversion device 1 that is installed (connected) in parallel with a power system and stabilizes AC power of the power system by compensating (adjusting) reactive power output (supplied) to the power system. The power system is, for example, an AC power source or an AC load. The power system is, for example, a three-phase AC system having a first phase (A phase), a second phase (B phase), and a third phase (C phase). The power conversion device 1 is, for example, a static synchronous compensator (STATCOM). In the following description, a connection point between the power conversion device 1 and the power system is referred to as an interconnection point. Furthermore, in the following description, unless otherwise specified, no distinction is made between the three phases.

[0011] The power conversion device 1 includes, for example, a power converter 10 and a control device 50. The power converter 10 stabilizes the system voltage in the power system by supplying AC power (reactive power) to the interconnection point or consuming the reactive power at the interconnection point in response to control from the control device 50. The reactive power supplied to or consumed by the power converter 10 is positive-phase reactive power (positive-phase reactive power) or negative-phase reactive power (negative-phase reactive power). Here, the negative phase means that, for example, in a case where the power system has three phases of A, B, and C, when the phase order of the AC current in the AC power supplied to the interconnection point is A, B, and C, with the phases shifted by 120° from each other, the phase order of the AC voltage is A, C, and B, etc., which is different from the positive phase.

[0012] The power converter 10 includes, for example, a transformer 11 and a modular multilevel converter (hereinafter referred to as "MMC") 12. The transformer 11 may be, for example, a three-phase transformer, or may be configured with three single-phase transformers connected to each of the three phases. There are also cases where the power converter 10 is directly connected to the power system without a transformer. The power converter 10 outputs an AC voltage from the MMC 12 in response to control from the control device 50, thereby causing an AC current to flow in response to control from the control device 50.

[0013] The MMC 12 is a delta-connected MMC. The MMC 12 includes, for example, three phase circuits 121 (phase circuits 121_a, 121_b, and 121_c) corresponding to the three phases. In the MMC 12, both ends of each phase circuit 121 are connected to different phases in the transformer 11, thereby forming a delta-connected circuit in which the three phase circuits 121 are delta-connected.

[0014] Each phase circuit 121 includes, for example, a current detector (CT in the figure) 122, a buffer reactor (BR in the figure) 123, and an arm 124. In the phase circuit 121, the current detector 122, the buffer reactor 123, and the arm 124 are connected in series. In FIG. 1, the letters following the "_ (underscore)" after the reference numerals of the phase circuit 121, the current detector 122, the buffer reactor 123, and the arm 124 indicate the phases to which each component corresponds. More specifically, "_a" after the reference numerals indicates that the component corresponds to phase A, "_b" indicates that the component corresponds to phase B, and "_c" indicates that the component corresponds to phase C.

[0015] The current detector 122 detects a current flowing in the phase circuit 121. The current detector 122 is arranged on the side of the phase circuit 121 to which the buffer reactor 123 is connected (in other words, on the interconnection point side (AC side) of the power converter 10), and detects a current (AC current) at the arranged position. The current detected by the current detector 122 is a current flowing in the arm 124. In the following description, the current detected by the current detector 122 is referred to as the "arm current Iarm." The current detector 122 outputs a detection value of the detected arm current Iarm (hereinafter simply referred to as the "arm current Iarm") to the control device 50. The current detector 122 can be connected to any position in the phase circuit 121 as long as the arm current Iarm can be detected.

[0016] The buffer reactor 123 is an impedance element having an impedance component for suppressing a change in the current flowing through the arm 124. The buffer reactor 123 is an example of an "impedance component" in the claims.

[0017] The arm 124 has, for example, a configuration in which a plurality of cells 125 (cell 125-1 to cell 125-n (n is a natural number)) are connected in series. That is, the arm 124 is configured with a plurality of stages (n stages) of cells 125. Each of the cells 125 is a small-capacity converter. The cell 125 includes a plurality of self-extinguishing semiconductor switching elements and a DC capacitor. The semiconductor switching elements are, for example, insulated gate bipolar transistors (IGBTs). The semiconductor switching elements operate (switching operation) in response to control (switching control) from the control device 50.

[0018] FIG. 2 is a diagram showing an example of the configuration of the cell 125 included in the MMC 12. The cell 125a shown in FIG. 2(a) has a configuration to which a half bridge is applied. The cell 125a includes, for example, two semiconductor switch units 126 (semiconductor switch unit 126-1 and semiconductor switch unit 126-2) and one DC capacitor 127. The semiconductor switch unit 126 may be, for example, a semiconductor switching element, or may be configured such that a semiconductor switching element and a diode are connected in parallel to each other. In the cell 125a, the semiconductor switch unit 126-1 and the semiconductor switch unit 126-2 are connected in series, and the DC capacitor 127 is connected to both ends of the series. In the cell 125a, the connection point between the semiconductor switch unit 126-1 and the semiconductor switch unit 126-2 and one end of the semiconductor switch unit 126-2 are output terminals. That is, in the cell 125a, the midpoint and one end of the series circuit to which the two semiconductor switch units 126 are connected are output terminals. With this configuration, in the cell 125a, an output voltage with two voltage levels and a single polarity, either a positive voltage or a negative voltage, is output from the output terminal.

[0019] The cell 125b shown in FIG. 2B has a full-bridge configuration. The cell 125b includes, for example, four semiconductor switch units 126 (semiconductor switch units 126-1 to 126-4) and one DC capacitor 127. In the cell 125b, a series circuit in which the semiconductor switch unit 126-1 and the semiconductor switch unit 126-2 are connected in series and a series circuit in which the semiconductor switch unit 126-3 and the semiconductor switch unit 126-4 are connected in series are connected in parallel, and the DC capacitor 127 is connected to both ends of each series circuit. In the cell 125b, the midpoint of the series circuit in which the semiconductor switch unit 126-1 and the semiconductor switch unit 126-2 are connected and the midpoint of the series circuit in which the semiconductor switch unit 126-3 and the semiconductor switch unit 126-4 are connected are each an output terminal. With this configuration, in the cell 125b, output voltages with three voltage levels of both polarities, positive and negative, are output from the output terminal.

[0020] The cell 125a is an example of a "half-bridge circuit" in the claims. The cell 125b is an example of a "full-bridge circuit" in the claims. The semiconductor switch unit 126-1 is an example of a "semiconductor switching element" and a "first semiconductor switching element" in the claims, and the semiconductor switch unit 126-2 is an example of a "semiconductor switching element" and a "second semiconductor switching element" in the claims. The semiconductor switch unit 126-3 is an example of a "semiconductor switching element" and a "third semiconductor switching element" in the claims, and the semiconductor switch unit 126-4 is an example of a "semiconductor switching element" and a "fourth semiconductor switching element" in the claims. The series circuit of the semiconductor switch unit 126-1 and the semiconductor switch unit 126-2 is an example of a "first series circuit" in the claims, and the series circuit of the semiconductor switch unit 126-3 and the semiconductor switch unit 126-4 is an example of a "second series circuit" in the claims.

[0021] Returning to FIG. 1, the control device 50 controls the operation of the power converter 10 to cause the power converter 10 to output (supply) reactive power to a connection point with the power grid. That is, the control device 50 controls the switching of each semiconductor switch unit 126 included in the cell 125 in each arm 124 of the MMC 12. The control device 50 controls the operation of the power converter 10 by, for example, executing a program (software) with a hardware processor such as a CPU (Central Processing Unit). The control device 50 may be realized by hardware (including a circuit unit; circuitry) such as an LSI (Large Scale Integration), an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array), or a GPU (Graphics Processing Unit), or may be realized by cooperation between software and hardware. The control device 50 may be realized by a dedicated LSI. The program may be stored in advance in a storage device (storage device with a non-transient storage medium) such as an HDD (Hard Disk Drive) or flash memory provided in the control device 50 or the power conversion device 1, or may be stored in a removable storage medium (non-transient storage medium) such as a DVD or CD-ROM, and installed in the HDD or flash memory provided in the control device 50 or the power conversion device 1 by attaching the storage medium to a drive device provided in the control device 50 or the power conversion device 1.

[0022] The control device 50 generates a control signal (gate signal Gate) for controlling the switching of the semiconductor switch unit 126 included in the cell 125 in each delta-connected arm 124 in the MMC 12 in the power converter 10, and outputs it to each cell 125. More specifically, the control device 50 generates a gate signal Gate_a for controlling the switching of the semiconductor switch unit 126 included in the cell 125 in the A-phase arm 124_a, a gate signal Gate_b for controlling the switching of the semiconductor switch unit 126 included in the cell 125 in the B-phase arm 124_b, and a gate signal Gate_c for controlling the switching of the semiconductor switch unit 126 included in the cell 125 in the C-phase arm 124_c, and outputs them to the corresponding cells 125. As a result, in the power conversion device 1, by outputting an AC voltage from the MMC 12 in response to the control from the control device 50 to the interconnection point side (AC side) in the power converter 10, it is possible to output (supply) reactive power in response to the control from the control device 50 to the interconnection point.

[0023] By the way, in the MMC 12, a circulating current (hereinafter referred to as "circulating current Iz") flows in the delta connection circuit according to the zero-sequence component of the output voltage of the arm 124 of each phase (hereinafter referred to as "arm zero-sequence voltage Vz") and the impedance component of the buffer reactor 123, due to the switching control of the semiconductor switch unit 126 by the control device 50. This circulating current Iz is a current that flows (circulates) sequentially through all the cells 125 that configure the delta connection circuit in the MMC 12. More specifically, the circulating current Iz flows, for example, from the A-phase side of the transformer 11 through the buffer reactor 123_a and each cell 125 in the arm 124_a provided in the phase circuit 121_a to the C-phase side of the transformer 11, then flows through the buffer reactor 123_c and each cell 125 in the arm 124_c provided in the phase circuit 121_c to the B-phase side of the transformer 11, and further flows (returns) through the buffer reactor 123_b and each cell 125 in the arm 124_b provided in the phase circuit 121_b to the A-phase side of the transformer 11. This circulating current Iz balances the voltages (charge amounts) of the DC capacitors 127 provided in the respective cells 125 in the MMC 12 so that they are relatively uniform.

[0024] When the control device 50 controls the operation of the power converter 10 in this way, it is considered that an error occurs in the control. Various factors are considered as causes of an error in the control of the power converter 10 by the control device 50 (hereinafter referred to as "control error"), such as a delay time in calculations and communications in the control device 50, and a delay time from when the control device 50 performs control until the power converter 10 actually operates. For example, the influence of a delay time from when the control device 50 outputs a gate signal Gate until when the corresponding semiconductor switch unit 126 operates according to the input gate signal Gate, etc., is considered to be a cause of the control error. If a control error occurs in the control of the power converter 10 by the control device 50, an unintended circulating current Iz may flow through the delta connection circuit in the MMC 12, causing a power loss in the operation (driving) of the MMC 12. This is because a control error occurs in the control of the power converter 10 by the control device 50, causing voltage components unnecessary for controlling the voltage of the DC capacitor 127 provided in each cell 125 to be superimposed on the arm zero-sequence voltage Vz as disturbance components (hereinafter referred to as "zero-sequence disturbance voltage Vz_dis").

[0025] Here, an example of the relationship between the arm zero-phase voltage Vz in the delta connection circuit and the circulating current Iz and the arm current Iarm of each phase will be described. FIG. 3 is a schematic waveform diagram showing an example of the waveform of the delta connection circuit in the MMC 12. FIG. 3 shows an example of the waveform of the arm zero-phase voltage Vz, the circulating current Iz, and the arm current Iarm of each phase (A phase, B phase, C phase) in the delta connection circuit when a control error occurs in the control of the power converter 10 by the control device 50 and a measure described later is not taken (a zero-phase disturbance voltage compensation function described later is not executed). In FIG. 3, an example of the waveform of the arm zero-phase voltage Vz is shown in the upper part, and an example of each waveform of the circulating current Iz, the arm current Iarm of the A phase (A phase arm current Iarm_a), the arm current Iarm of the B phase (B phase arm current Iarm_b), and the arm current Iarm of the C phase (C phase arm current Iarm_c) is shown in correspondence with the waveform of the arm zero-phase voltage Vz shown in the upper part. In FIG. 3, the horizontal axis represents time t.

[0026] In an example of a case where a control error occurs in the control of the power converter 10 shown in FIG. 3, a voltage component pulsating at three times the frequency fs of the power grid is superimposed on the arm zero-phase voltage Vz due to the control error, as shown in the upper part of FIG. 3. This pulsating voltage component is a zero-phase disturbance voltage Vz_dis. Due to this zero-phase disturbance voltage Vz_dis, the circulating current Iz also pulsates at three times the frequency fs of the power grid, as shown in the lower part of FIG. 3. As a result, although each of the A-phase arm current Iarm_a, the B-phase arm current Iarm_b, and the C-phase arm current Iarm_c is a sinusoidal AC waveform with a frequency fs that is not pulsating, distortion occurs due to the pulsation of the circulating current Iz, and the difference between the maximum current value and the minimum current value of the AC waveform may become large. In other words, the peak value of the arm current Iarm of each phase may increase. For this reason, the buffer reactor 123 constituting the MMC 12, and the semiconductor switch unit 126 and DC capacitor 127 (particularly, passive elements) provided in the cell 125 must have high rated values ​​so that they do not break down or become unstable even if the peak value of the arm current Iarm increases. This can also be a factor in increasing the cost of the MMC 12.

[0027] For this reason, the control device 50 detects the circulating current Iz in the MMC 12 by calculating it based on the arm current Iarm of each phase detected by each current detector 122 included in the MMC 12. The control device 50 calculates the circulating current Iz by the following equation (1) from the A-phase arm current Iarm_a detected by the current detector 122_a, the B-phase arm current Iarm_b detected by the current detector 122_b, and the C-phase arm current Iarm_c detected by the current detector 122_c.

[0028] Iz=(Iarm_a+Iarm_b+Iarm_c) / 3 ···(1)

[0029] The control device 50 generates a gate signal Gate for controlling each semiconductor switch unit 126 so as to suppress the zero-phase disturbance voltage Vz_dis included in the arm zero-phase voltage Vz based on the calculated (detected) circulating current Iz. That is, the control device 50 controls each semiconductor switch unit 126 so that the circulating current Iz with less pulsation due to the zero-phase disturbance voltage Vz_dis flows through the delta connection circuit based on the calculated circulating current Iz. For example, if there is a delay time from when the control device 50 outputs the gate signal Gate to when each semiconductor switch unit 126 operates according to the input gate signal Gate, the control device 50 outputs the gate signal Gate at a timing that takes the delay time into consideration (for example, an earlier timing). To achieve this, future control information is required, but in reality, it is difficult to completely predict the future, so control is performed to reduce the influence of the delay time equivalently. In this way, the control device 50 suppresses the circulating current Iz that flows due to the zero-phase disturbance voltage Vz_dis. In the following description, the control performed by the control device 50 to suppress the circulating current Iz that flows due to the zero-phase disturbance voltage Vz_dis is referred to as "circulating current suppression control."

[0030] In the circulating current suppression control, the control device 50 calculates a control voltage value (hereinafter referred to as "circulating current control output Vz_ref") for suppressing the circulating current Iz flowing due to the zero-phase disturbance voltage Vz_dis, based on the calculated current value of the circulating current Iz (hereinafter referred to as "circulating current detection value Iz_det") and a current command value (hereinafter referred to as "circulating current command value Iz_ref") for causing the circulating current Iz to flow through the MMC 12. The circulating current control output Vz_ref is used for control to adjust the circulating current Iz and balance the voltage (charge amount) of the DC capacitor 127 provided in each cell 125 so that it is relatively uniform. In the following description, the function of the control device 50 to calculate the circulating current control output Vz_ref based on the circulating current detection value Iz_det and the circulating current command value Iz_ref is referred to as a "zero-phase disturbance voltage compensation function." The control device 50 generates a control signal (gate signal Gate) that causes the circulating current Iz based on the circulating current control output Vz_ref calculated by the zero-phase disturbance voltage compensation function to flow through the delta connection circuit in the MMC 12, and outputs the signal to the corresponding cell 125 (corresponding semiconductor switch unit 126). This prevents the circulating current Iz (a component unnecessary for control to balance the voltage (charge amount) of the DC capacitor 127 to be relatively uniform) due to the zero-phase disturbance voltage Vz_dis from flowing through the delta connection circuit in the power conversion device 1. The circulating current control output Vz_ref is an example of the "control output amount of the circulating current" in the claims.

[0031] [Circulating current suppression control processing] FIG. 4 is a flowchart showing an example of the process of the circulating current suppression control in the control device 50. FIG. 4 shows an example of the flow of the process executed by the control device 50 when outputting the gate signal Gate in the circulating current suppression control. The process of this flowchart may be repeatedly executed while the power conversion device 1 is operating. In the following description, it is assumed that a circulating current command value Iz_ref for causing the circulating current Iz to flow through the MMC 12 in the power converter 10 is determined in advance and input (set) to the control device 50, or calculated by a control for balancing the voltage (charge amount) of the DC capacitor 127 of the control device 50 so as to be relatively uniform. Furthermore, in the following description, it is assumed that the valve branch current Iarm is output from each current detector 122, that is, the detection of the valve branch current Iarm in each current detector 122 is completed.

[0032] When starting circulating current suppression control, the control device 50 first acquires the arm current Iarm output by each current detector 122 (step S1). The control device 50 calculates (detects) a circulating current detection value Iz_det by the above formula (1) based on the acquired arm current Iarm (step S2). The control device 50 calculates a circulating current control output Vz_ref based on the calculated circulating current detection value Iz_det and the circulating current command value Iz_ref (step S3). The control device 50 generates a gate signal Gate for switching control of each semiconductor switch unit 126 based on the calculated circulating current control output Vz_ref, and outputs the generated gate signal Gate to each semiconductor switch unit 126 (step S4).

[0033] In this way, the control device 50 calculates the circulating current control output Vz_ref based on the calculated circulating current detection value Iz_det and the set circulating current command value Iz_ref, generates a gate signal Gate to be output to the power converter 10, and controls the operation of the power converter 10 to cause the power converter 10 to balance the voltage (charge amount) of the DC capacitor 127 so that it is relatively uniform, and outputs (supplies) the compensated reactive power to the power system.

[0034] [First zero-phase disturbance voltage compensation function] Here, an example of a configuration for realizing the zero-phase disturbance voltage compensation function in the control device 50 will be described. Fig. 5 is a diagram showing an example of a functional configuration for realizing the first zero-phase disturbance voltage compensation function in the control device 50. In the first zero-phase disturbance voltage compensation function in the control device 50, specific order component suppression control is performed to suppress (bring close to zero) a component of a zero-phase disturbance voltage Vz_dis of a specific order, and a circulating current control output Vz_ref is calculated. The control device 50 includes an adder 500, a compensator (Gz in the figure) 510, an adder 520, an adder 530, and a specific order component suppression control unit 540 as components for realizing the first zero-phase disturbance voltage compensation function.

[0035] The adder 500 subtracts the circulating current detection value Iz_det from the circulating current command value Iz_ref. In other words, the adder 500 obtains the deviation between the circulating current command value Iz_ref and the circulating current detection value Iz_det. The adder 500 outputs a circulating current difference value ΔIz as a result of the subtraction. The adder 500 may be configured as, for example, a subtractor.

[0036] The compensator 510 performs feedback control on the circulating current difference value ΔIz output by the adder 500. The feedback control in the compensator 510 may be, for example, any one of P (Proportional) control, I (Integral) control, and D (Differential) control, or a combination of these controls (e.g., PID control).

[0037] The adder 520 adds a predetermined feedforward voltage value Vff to the result of the feedback control by the compensator 510. In other words, the adder 520 performs feedforward control based on the feedforward voltage value Vff on the result of the feedback control by the compensator 510. That is, in the first zero-phase disturbance voltage compensation function, a two-degree-of-freedom control system is configured that combines the feedback control by the compensator 510 and the feedforward control by the adder 520. The adder 520 outputs the result of the feedforward control as a two-degree-of-freedom control output Vz' for controlling the arm zero-phase voltage Vz with two degrees of freedom.

[0038] The above configuration, that is, the configuration of the adder 500, the compensator 510, and the adder 520 for outputting the two-degree-of-freedom control output Vz', is the same as the configuration when the zero-sequence disturbance voltage compensation function is not executed, that is, the zero-sequence disturbance voltage Vz_dis included in the arm zero-sequence voltage Vz is not suppressed. That is, it is a configuration for performing circulating current control that does not include control to suppress the circulating current Iz flowing due to the zero-sequence disturbance voltage Vz_dis, which is also performed in a general control device provided for controlling the MMC in a conventional STATCOM. In contrast, the adder 530 and the specific order component suppression control unit 540 are provided as components for realizing the first zero-sequence disturbance voltage compensation function.

[0039] The specific order component suppression control unit 540 calculates a compensation voltage Vcmp1 based on the circulating current detection value Iz_det. The compensation voltage Vcmp1 represents a disturbance component included in the arm zero-phase voltage Vz based on a two-degree-of-freedom control output Vz' described later. The specific order component suppression control unit 540 includes an n-th order harmonic component amplitude / phase extraction unit 541, a proportional-integral (PI in the figure) controller 542, and a sine wave (sin in the figure) generation unit 543.

[0040] The n-th harmonic component amplitude / phase extraction unit 541 extracts the amplitude Izn and phase Φn of the n-th harmonic component included in the circulating current detection value Iz_det. For example, as shown in FIG. 3, when a voltage component pulsating at three times the frequency fs of the power system is superimposed on the arm zero-phase voltage Vz, the third harmonic component of the circulating current Iz becomes a target to be suppressed, so n=3. The method of extracting the amplitude Izn in the n-th harmonic component amplitude / phase extraction unit 541 may be, for example, a method of processing the circulating current detection value Iz_det with a bandpass filter that passes the n-th harmonic component to obtain a circulating current n-th bandpass filter value Iz_bpfn, and then multiplying the result of an effective value calculation of the circulating current n-th bandpass filter value Iz_bpfn by √2 to use the result obtained. The method of extracting the amplitude Izn in the nth harmonic component amplitude / phase extraction unit 541 may be, for example, a method using a result obtained by performing dq transformation on the circulating current detection value Iz_det in an nth-order rotating coordinate system. The method of extracting the phase Φn in the nth harmonic component amplitude / phase extraction unit 541 may be, for example, a method applying a single-phase PLL (Phase Locked Loop) method using a Hilbert transform or the like to the circulating current detection value Iz_det (or the circulating current nth-order band-pass filter value Iz_bpfn). The method of extracting the phase Φn in the nth harmonic component amplitude / phase extraction unit 541 may be, for example, a method of generating a pseudo three-phase signal from the circulating current detection value Iz_det (or the circulating current nth-order band-pass filter value Iz_bpfn), which is a single-phase signal, using delay processing, and applying the three-phase PLL method to this three-phase signal.

[0041] The proportional-integral controller 542 performs proportional-integral processing on the amplitude Izn of the nth-order harmonic component extracted by the nth-order harmonic component amplitude / phase extraction unit 541 using a transfer function Fs expressed by the following equation (2) to calculate an nth-order harmonic component voltage Vzn.

[0042] Fs = Kp + Ki / s (2)

[0043] In the above equation (2), Kp represents a proportional gain, Ki represents an integral gain, and s represents a complex variable in Laplace space.

[0044] The sine wave generating unit 543 multiplies the nth-order harmonic component voltage Vzn calculated by the proportional-integral controller 542 by a sine wave sinΦn whose phase is the phase Φn of the nth-order harmonic component extracted by the nth-order harmonic component amplitude / phase extracting unit 541, thereby calculating a compensation voltage Vcmp1 expressed by the following equation (3).

[0045] Vcmp1 = Vzn × sinΦn (3)

[0046] The sine wave generating unit 543 outputs the calculated compensation voltage Vcmp1 as the calculation result of the specific order component suppression control unit 540.

[0047] The adder 530 subtracts the compensation voltage Vcmp1 output by the specific order component suppression control unit 540 from the two degree of freedom control output Vz' output by the adder 520. The adder 530 may be configured by, for example, a subtractor. The adder 530 outputs the subtraction result as a circulating current control output Vz_ref.

[0048] With such a functional configuration and processing, the control device 50 performs feedback control in the first zero-phase disturbance voltage compensation function so as to bring the current component of the circulating current Iz of the order to be suppressed (here, the third harmonic component) close to zero, calculates the circulating current control output Vz_ref, and outputs a gate signal Gate to the corresponding semiconductor switch unit 126 based on the calculated circulating current control output Vz_ref to control the operation of the power converter 10. As a result, in the power conversion device 1, the circulating current Iz caused by the zero-phase disturbance voltage Vz_dis is prevented from flowing through the delta connection circuit. More specifically, for example, when the compensation voltage Vcmp1 coincides with the zero-phase disturbance voltage Vz_dis to be compensated, the influence of the zero-phase disturbance voltage Vz_dis is cancelled out from the circulating current control output Vz_ref.

[0049] Here, an example of the relationship between the arm zero-phase voltage Vz in the delta connection circuit and the circulating current Iz and the arm current Iarm of each phase when the control device 50 controls the power converter 10 by the first zero-phase disturbance voltage compensation function will be described. FIG. 6 is a schematic waveform diagram showing an example of the waveform of the delta connection circuit in the MMC 12 when the control device 50 executes the first zero-phase disturbance voltage compensation function. In FIG. 6, as in FIG. 3, an example of the waveform of the arm zero-phase voltage Vz is shown in the upper part, and examples of the waveforms of the circulating current Iz, the A-phase arm current Iarm_a, the B-phase arm current Iarm_b, and the C-phase arm current Iarm_c are shown in the lower part in correspondence with the waveform of the arm zero-phase voltage Vz shown in the upper part. In FIG. 6, the horizontal axis is also time t.

[0050] As shown in the upper part of FIG. 6, when a control error occurs in the control of the power converter 10, when the control device 50 executes the first zero-phase disturbance voltage compensation function, it is found that the voltage component (zero-phase disturbance voltage Vz_dis) pulsating at three times the frequency fs of the power system, which is superimposed on the arm zero-phase voltage Vz due to the control error, is suppressed compared to the case where the zero-phase disturbance voltage compensation function shown in FIG. 3 is not executed. As a result, as shown in the lower part of FIG. 6, the pulsation of the circulating current Iz at three times the frequency fs of the power system due to the zero-phase disturbance voltage Vz_dis is suppressed. As a result, the increase in the peak value of each of the A-phase arm current Iarm_a, the B-phase arm current Iarm_b, and the C-phase arm current Iarm_c is suppressed. That is, the AC waveforms of each of the A-phase arm current Iarm_a, the B-phase arm current Iarm_b, and the C-phase arm current Iarm_c become waveforms close to the original sine waves. As a result, in the power conversion device 1, the power loss during the operation (operation) of the MMC 12 can be suppressed. As a result, in the power conversion device 1, there is no need to use components with high rated values ​​for the buffer reactor 123 that constitutes the MMC 12, or for the semiconductor switch section 126 and DC capacitor 127 that the cell 125 has, thereby preventing an increase in the cost of the MMC 12.

[0051] In the above-mentioned first zero-phase disturbance voltage compensation function, the n-th harmonic component amplitude / phase extraction unit 541 has been described as a case where the third harmonic component of the circulating current Iz is to be suppressed. However, the n-th harmonic component amplitude / phase extraction unit 541 may be configured to suppress the fifth harmonic component or higher frequency components. That is, in addition to or instead of n=3, the n-th harmonic component amplitude / phase extraction unit 541 may extract the amplitude Izn and phase Φn of the frequency component where n=5 or n>5. In this case, the process of the n-th harmonic component amplitude / phase extraction unit 541, that is, the method of extracting the amplitude Izn and phase Φn, may be equivalent to the process of the n-th harmonic component amplitude / phase extraction unit 541 described above. The processes of the proportional integral controller 542, the sine wave generator 543, and the adder 530 included in the specific order component suppression control unit 540 may also be equivalent according to the order that the n-th harmonic component amplitude / phase extraction unit 541 is configured to suppress.

[0052] [Second zero-phase disturbance voltage compensation function] FIG. 7 is a diagram showing an example of a functional configuration for realizing a second zero-phase disturbance voltage compensation function in the control device 50. In the second zero-phase disturbance voltage compensation function in the control device 50, an estimation process using a disturbance observer is performed to estimate an error amount contained in the circulating current control output Vz_ref, and the circulating current control output Vz_ref obtained by subtracting the estimated error amount is calculated. The control device 50 in this case (hereinafter referred to as "control device 50a") includes an adder 500, a compensator (Gz in the figure) 510, an adder 520, an adder 530, and a disturbance observer unit 550 as a configuration for realizing the second zero-phase disturbance voltage compensation function. The adder 500, the compensator 510, the adder 520, and the adder 530 included in the control device 50a are similar to the respective components included in the control device 50 that realizes the first zero-phase disturbance voltage compensation function. That is, in the control device 50a as well, a two-degree-of-freedom control system is configured that combines feedback control by the compensator 510 and feedforward control by the adder 520 to output a two-degree-of-freedom control output Vz'. Then, in the control device 50a as well, a circulating current control output Vz_ref is calculated by subtracting a compensation voltage (called "compensation voltage Vcmp2" because it is output by the disturbance observer unit 550 in the second zero-phase disturbance voltage compensation function) from the two-degree-of-freedom control output Vz' by the adder 530. The compensation voltage Vcmp2, ​​like the compensation voltage Vcmp1, also represents a disturbance component included in the arm zero-phase voltage Vz based on the two-degree-of-freedom control output Vz'.

[0053] The disturbance observer unit 550 calculates an error amount included in the arm zero-phase voltage Vz as a compensation voltage Vcmp2 based on the circulating current detection value Iz_det and the circulating current control output Vz_ref. The disturbance observer unit 550 includes a compensator (Gdob in the figure) 551, an adder 552, and a low-pass filter (LPF in the figure) 553.

[0054] The compensator 551 performs compensation (estimation) on the circulating current detection value Iz_det with a transfer function of 1 / Gp, where Gp represents the transfer characteristic from the arm zero-phase voltage Vz to the circulating current Iz.

[0055] The adder 552 subtracts the circulating current control output Vz_ref, which is the subtraction result of the adder 530, from the compensation result of the compensator 551. In other words, the adder 552 calculates the amount of error contained in the arm zero-phase voltage Vz by taking the deviation between the compensation result of the compensator 551 and the previous circulating current control output Vz_ref. The adder 552 may be configured by, for example, a subtractor.

[0056] The low-pass filter 553 performs a filtering process on the result of subtraction by the adder 552 to suppress voltage values ​​of frequencies higher than a predetermined frequency (cut-off frequency). The cut-off frequency in the low-pass filter 553 is set to a value higher than the zero-phase disturbance voltage Vz_dis. The filter characteristics of the low-pass filter 553 may be a first-order system, a second-order system, or a higher order system. The low-pass filter 553 outputs the result of the filtering process as the compensation voltage Vcmp2 calculated by the disturbance observer unit 550.

[0057] The adder 530 subtracts the compensation voltage Vcmp2 output by the disturbance observer unit 550 from the two-degree-of-freedom control output Vz' output by the adder 520, and outputs the result as a circulating current control output Vz_ref.

[0058] With such a functional configuration and processing, the control device 50a, in the second zero-phase disturbance voltage compensation function, calculates a circulating current control output Vz_ref by subtracting an error amount estimated by an estimation process by the disturbance observer unit 550, and outputs a gate signal Gate generated based on the calculated circulating current control output Vz_ref to the corresponding semiconductor switch unit 126 to control the operation of the power converter 10. As a result, in the power conversion device 1, the circulating current Iz due to the zero-phase disturbance voltage Vz_dis is suppressed from flowing through the delta connection circuit, similar to the case where the control device 50 executes the first zero-phase disturbance voltage compensation function.

[0059] Here, an example of the relationship between the arm zero-phase voltage Vz in the delta connection circuit and the circulating current Iz and the arm current Iarm of each phase when the control device 50a controls the power converter 10 by the second zero-phase disturbance voltage compensation function will be described. FIG. 8 is a schematic waveform diagram showing an example of the waveform of the delta connection circuit in the MMC 12 when the control device 50a executes the second zero-phase disturbance voltage compensation function. In FIG. 8, as in FIG. 3 and FIG. 6, an example of the waveform of the arm zero-phase voltage Vz is shown in the upper part, and examples of the waveforms of the circulating current Iz, the A-phase arm current Iarm_a, the B-phase arm current Iarm_b, and the C-phase arm current Iarm_c are shown in the lower part in correspondence with the waveform of the arm zero-phase voltage Vz shown in the upper part. In FIG. 8, the horizontal axis is also time t.

[0060] As shown in the upper part of Fig. 8, even when the control device 50a executes the second zero-phase disturbance voltage compensation function in the case where a control error occurs in the control of the power converter 10, similar to the case where the control device 50 executes the first zero-phase disturbance voltage compensation function (see Fig. 6), it is understood that the voltage component (zero-phase disturbance voltage Vz_dis) pulsating at three times the frequency fs of the power system superimposed on the arm zero-phase voltage Vz due to the control error is suppressed compared to the case where the zero-phase disturbance voltage compensation function shown in Fig. 3 is not executed. As a result, as shown in the lower part of Fig. 8, even when the control device 50a executes the second zero-phase disturbance voltage compensation function, similar to the case where the control device 50 executes the first zero-phase disturbance voltage compensation function (see Fig. 6), the pulsation of the circulating current Iz at three times the frequency fs of the power system due to the zero-phase disturbance voltage Vz_dis is suppressed. As a result, even when the control device 50a executes the second zero-phase disturbance voltage compensation function, as in the case where the control device 50 executes the first zero-phase disturbance voltage compensation function (see FIG. 6), the A-phase arm current Iarm_a, the B-phase arm current Iarm_b, and the C-phase arm current Iarm_c are each prevented from increasing in peak value, and the AC waveforms become waveforms close to original sine waves. As a result, in the power conversion device 1, the second zero-phase disturbance voltage compensation function can also suppress power loss in the operation (driving) of the MMC 12, as in the first zero-phase disturbance voltage compensation function, and it is no longer necessary to use components of the MMC 12 with high rated values, thereby suppressing an increase in the cost of the MMC 12.

[0061] In the above-mentioned second zero-phase disturbance voltage compensation function, the configuration in which the compensation voltage Vcmp2 is calculated by the disturbance observer unit 550 has been shown, but the control device 50 may combine the first zero-phase disturbance voltage compensation function and the second zero-phase disturbance voltage compensation function to execute the zero-phase disturbance voltage compensation function. That is, the control device 50 may include a specific order component suppression control unit 540 and a disturbance observer unit 550 as a configuration for realizing the zero-phase disturbance voltage compensation function. In addition, the respective zero-phase disturbance voltage compensation functions executed by the control device 50 and the control device 50 may share common components (i.e., the adder 500, the compensator 510, the adder 520, and the adder 530). In this case, the adder 530 subtracts the compensation voltage Vcmp1 output by the specific order component suppression control unit 540 and the compensation voltage Vcmp2 output by the disturbance observer unit 550 from the two-degree-of-freedom control output Vz' output by the adder 520, and outputs the subtraction result as the circulating current control output Vz_ref.

[0062] [Third zero-phase disturbance voltage compensation function] FIG. 9 is a diagram showing an example of a functional configuration for realizing a third zero-phase disturbance voltage compensation function in the control device 50. In the third zero-phase disturbance voltage compensation function in the control device 50, a repetitive control is performed to calculate a circulating current control output Vz_ref for bringing the circulating current detection value Iz_det, that is, the difference between the circulating current Iz and the circulating current command value Iz_ref, closer to zero. The control device 50 in this case (hereinafter referred to as "control device 50b") includes an adder 500, a repetitive control unit 560, an adder 570, a compensator (Gz in the figure) 510, and an adder 520 as a configuration for realizing the third zero-phase disturbance voltage compensation function. The adder 500, the compensator 510, the adder 520, and the adder 530 included in the control device 50b are similar to the respective components included in the control device 50 realizing the first zero-phase disturbance voltage compensation function and the control device 50a realizing the second zero-phase disturbance voltage compensation function.

[0063] An adder 500 outputs a circulating current difference value ΔIz obtained by subtracting the circulating current detection value Iz_det from the circulating current command value Iz_ref.

[0064] The repetitive control unit 560 calculates a compensation current Icmp by performing a delay operation on the circulating current difference value ΔIz output by the adder 500. The compensation current Icmp represents a disturbance component included in the circulating current difference value ΔIz. The repetitive control unit 560 includes an adder 561, a delay unit (Delay in the figure) 562, a low-pass filter (LPF in the figure) 563, and a compensator (Grp in the figure) 564.

[0065] The adder 561 adds the filter output value ΔIz′ output by the low-pass filter 563 to the circulating current difference value ΔIz output by the adder 500 .

[0066] The delay unit 562 performs a delay calculation on the addition result (the following equation (4)) of the adder 561 using a delay transfer function Fd expressed by the following equation (5).

[0067] ΔIz+ΔIz' (4)

[0068] Fd = exp(-s × Ts) (5)

[0069] In the above formula (5), Ts is set by selecting the fundamental wave period of the circulating current command value Iz_ref. Therefore, the repetitive control is based on the repetitive waveform information of the fundamental wave period.

[0070] The low-pass filter 563 performs filtering at a predetermined frequency (cut-off frequency) on the delay calculation result of the delay unit 562. The cut-off frequency in the low-pass filter 563 is set to a value sufficiently larger than the frequency at which the tracking effect by the repetitive control is expected. For example, 1 [kHz] is set as the cut-off frequency in the low-pass filter 563. The low-pass filter 563 outputs the result of the filtering as a filter output value ΔIz'. As described above, the filter output value ΔIz' output by the low-pass filter 563 is added to the circulating current difference value ΔIz in the adder 561.

[0071] The compensator 564 performs compensation with a transfer function of 1 / Gp on the filter output value ΔIz' output by the low-pass filter 563. The transfer function in the adder 561 is similar to the transfer function in the compensator 551 in the disturbance observer unit 550 provided in the control device 50a. Therefore, Gp indicates the transfer characteristic from the arm zero-phase voltage Vz to the circulating current Iz. The compensator 564 outputs the result of compensation for the filter output value ΔIz' as the compensation current Icmp calculated by the repetitive control unit 560.

[0072] The adder 570 subtracts the compensation current Icmp output by the repetitive control unit 560 from the circulating current difference value ΔIz output by the adder 500. The adder 570 outputs the subtraction result (the following equation (6)).

[0073] ΔIz-Icmp (6)

[0074] In the third zero-phase disturbance voltage compensation function, the control device 50b treats the subtraction result of the above equation (6) output by the adder 570 as the same subtraction result as that calculated in a general control device provided for controlling MMC in a conventional STATCOM. More specifically, the control device 50b treats the subtraction result of the above equation (6) as the subtraction result of the adder 500 also provided in the conventional control device. Therefore, the compensator 510 performs feedback control using the subtraction result of the above equation (6) output by the adder 570 as the circulating current difference value ΔIz output by the adder 500. Furthermore, the adder 520 performs feedforward control by adding a predetermined feedforward voltage value Vff to the result of the feedback control by the compensator 510. The adder 520 outputs the two-degree-of-freedom control output Vz', which is the result of the feedforward control, as the circulating current control output Vz_ref.

[0075] With such a functional configuration and processing, in the third zero-phase disturbance voltage compensation function, the control device 50b performs repetitive control by the repetitive control unit 560 to obtain the subtraction result of the above formula (6), calculates a circulating current control output Vz_ref controlled with two degrees of freedom by combining the compensator 510 and the adder 520, and outputs a gate signal Gate generated based on the calculated circulating current control output Vz_ref to the corresponding semiconductor switch unit 126 to control the operation of the power converter 10. As a result, in the power conversion device 1, the circulating current Iz due to the zero-phase disturbance voltage Vz_dis is suppressed from flowing through the delta connection circuit, similar to the case where the control device 50 executes the first zero-phase disturbance voltage compensation function or the control device 50a executes the second zero-phase disturbance voltage compensation function.

[0076] When the control device 50b controls the power converter 10 using the third zero-phase disturbance voltage compensation function, the relationship between the arm zero-phase voltage Vz in the delta connection circuit and the circulating current Iz and the arm current Iarm of each phase is similar to that of the first zero-phase disturbance voltage compensation function (see FIG. 6) and the second zero-phase disturbance voltage compensation function (see FIG. 8), and therefore a detailed description thereof will be omitted.

[0077] As described above, in the power conversion device 1 of the first embodiment, the control device 50 calculates the circulating current Iz flowing in the delta connection circuit of the MMC 12 based on the arm current Iarm of the phase circuit 121 corresponding to each phase of the MMC 12 in the power converter 10. Then, in the power conversion device 1 of the first embodiment, the control device 50 controls each semiconductor switch unit 126 based on the calculated circulating current Iz so as to suppress the zero-phase disturbance voltage Vz_dis included in the arm zero-phase voltage Vz. As a result, in the power conversion device 1 of the first embodiment, the circulating current Iz due to the zero-phase disturbance voltage Vz_dis, which is unnecessary for balancing the voltage (charge amount) of the DC capacitor 127 in each cell 125 included in the MMC 12, is suppressed from flowing in the delta connection circuit, and the reactive power output (supplied) by the power converter 10 to the interconnection point with the power system is compensated. As a result, in the power conversion device 1 of the first embodiment, it is possible to suppress the power loss during the operation (driving) of the MMC 12. As a result, in the power conversion device 1 of the first embodiment, it is no longer necessary to use components with high rated values ​​that will not break down or become unstable, such as the buffer reactor 123 that constitutes the MMC 12, or the semiconductor switch section 126 and DC capacitor 127 (particularly, passive elements) that the cell 125 has, thereby making it possible to suppress increases in the cost of the MMC 12.

[0078] Second embodiment [Power conversion device configuration] The second embodiment will be described below. FIG. 10 is a diagram showing an example of the configuration of a power conversion device according to the second embodiment. FIG. 10 also shows an example of a power conversion device 2 that is installed (connected) in parallel to a power system, similar to the power conversion device 1 of the first embodiment, and stabilizes the AC power of the power system by compensating (adjusting) reactive power output (supplied) to the power system. The power conversion device 2 is also, for example, a static var compensator (STATCOM). In the following description, a connection point between the power conversion device 2 and the power system is called an interconnection point. Furthermore, in the following description, unless otherwise specified, each of the three phases will not be distinguished. In FIG. 10, components having the same functions as those of the power conversion device 1 of the first embodiment are given the same reference numerals, and detailed description thereof will be omitted.

[0079] The power conversion device 2 includes, for example, a power converter 20 and a control device 50. Like the power converter 10 of the first embodiment, the power converter 20 also stabilizes the system voltage in the power system by supplying AC power (reactive power) to the interconnection point or consuming the reactive power at the interconnection point in response to control from the control device 50. The reactive power supplied to or consumed by the power converter 20 to the interconnection point is also positive-phase reactive power or negative-phase reactive power.

[0080] The power converter 20 includes, for example, a transformer 21 and a modular multilevel converter (MMC) 22. The transformer 21 has, for example, a delta-shaped connection on the MMC 22 side, and arms (described later) of the MMC 22 are directly connected between the wires of the windings. Like the power converter 10 of the first embodiment, the power converter 20 also outputs an AC voltage from the MMC 22 in response to control from the control device 50, thereby causing an AC current to flow in response to control from the control device 50.

[0081] The MMC 22 includes, for example, three phase circuits 221 (phase circuits 221_a, 221_b, and 221_c) corresponding to the three phases. In the MMC 22, both ends of each phase circuit 221 are connected to converter-side terminals of the corresponding phase in the transformer 21. In the MMC 22, the three phase circuits 221 are connected to different phases in the transformer 21 to form a delta connection circuit (hereinafter, referred to as "delta connection circuit A") in which the three phase circuits 221 are delta-connected. FIG. 10 shows an example in which the phase circuits 221 are connected in the transformer 21.

[0082] Each phase circuit 221 includes, for example, a current detector (CT in the figure) 122 and an arm 124. In Fig. 10, similarly to the first embodiment, the phase to which each component corresponds is indicated by the letter following "_ (underscore)" after each reference number of the phase circuit 221, the current detector 122, and the arm 124.

[0083] In the phase circuit 221, the buffer reactor 123 is omitted from the phase circuit 121 of the first embodiment. Therefore, in the phase circuit 221, the current detector 122 and the arm 124 are connected in series. However, in the power converter 20, the leakage impedance component included in the transformer 21 functions in place of the buffer reactor 123. Therefore, in the power converter 20, the control device 50 controls the switching of the semiconductor switch unit 126, and in the MMC 22, a circulating current Iz flows in the delta connection circuit A according to the arm zero-phase voltage Vz of the arm 124 of each phase and the leakage impedance component in the transformer 21 in place of the buffer reactor 123. That is, in the power converter 20, the leakage impedance component in the transformer 21 contributes to the circulating current Iz flowing in the delta connection circuit A in place of the buffer reactor 123. The leakage impedance component is an example of the "impedance component" in the claims.

[0084] For this reason, also in the power conversion device 2, the control device 50 controls the operation of the power converter 20 (i.e., performs switching control of each semiconductor switch unit 126 provided in the cells 125 in each arm 124 of the MMC 22), thereby causing the power converter 20 to output (supply) reactive power to the interconnection point with the power grid. The configuration, operation, and processing of the control device 50 in this case should be equivalent to those of the control device 50 of the first embodiment.

[0085] As described above, in the power conversion device 2 of the second embodiment, similar to the power conversion device 1 of the first embodiment, the control device 50 calculates the circulating current Iz flowing in the delta connection circuit A of the MMC 22 based on the arm current Iarm of the phase circuit 221 corresponding to each phase of the MMC 22 in the power converter 20. Then, in the power conversion device 2 of the second embodiment, similar to the power conversion device 1 of the first embodiment, the control device 50 controls each semiconductor switch unit 126 based on the calculated circulating current Iz so as to suppress the zero-phase disturbance voltage Vz_dis included in the arm zero-phase voltage Vz. As a result, in the power conversion device 2 of the second embodiment, similar to the power conversion device 1 of the first embodiment, the circulating current Iz due to the zero-phase disturbance voltage Vz_dis that is unnecessary for balancing the voltage (charge amount) of the DC capacitor 127 in each cell 125 of the MMC 22 is suppressed from flowing in the delta connection circuit A, and the reactive power output (supplied) by the power converter 20 to the interconnection point with the power grid is compensated. As a result, in the power conversion device 2 of the second embodiment, similar to the power conversion device 1 of the first embodiment, it is possible to suppress power loss during operation (driving) of the MMC 22. As a result, in the power conversion device 2 of the second embodiment, similar to the power conversion device 1 of the first embodiment, it is not necessary to use semiconductor switch units 126 and DC capacitors 127 (particularly passive elements) provided in the cells 125 constituting the MMC 22 that have high rated values ​​that do not break down or become unstable in operation, and an increase in the cost of the MMC 22 can be suppressed.

[0086] In the power conversion device 2, the arm 124 of the MMC 22 is connected on the secondary side of the transformer 21, so that the circulating current Iz flows through the delta connection circuit A through each cell 125 in the arm 124 and the leakage impedance component in the transformer 21. However, in the power conversion device 2, if the circulating current Iz flows through the delta connection circuit A in the MMC 22 due to a delta connection at any point, the control device 50 can similarly control the switching of each semiconductor switch unit 126 to obtain the same effect.

[0087] Furthermore, in the power conversion device 2, a case where a delta-type connection is made in the transformer 21 has been described, but the connection in the transformer 21 is not limited to a delta-type connection. For example, even if an open delta-type connection or other connection is made in the transformer 21, as long as a circulating current Iz flows to balance the voltage (charge amount) of the DC capacitor 127 in each cell 125 provided in the arm 124 so that it is relatively uniform, the control device 50 can similarly control the switching of each semiconductor switch unit 126 to obtain the same effect regardless of the type of connection made in the transformer 21.

[0088] As described above, in the power conversion device of each embodiment, the control device controls the semiconductor switch unit of each cell so as to suppress the zero-phase disturbance voltage included in the arm zero-phase voltage. More specifically, in the power conversion device of each embodiment, the control device calculates the circulating current flowing in the delta connection circuit of the MMC based on the arm current of the phase circuit corresponding to each phase of the MMC in the power converter. Then, in the power conversion device of each embodiment, the control device executes a zero-phase disturbance voltage compensation function based on the calculated circulating current, calculates a circulating current control output for suppressing the zero-phase disturbance voltage superimposed on the arm zero-phase voltage, and generates and outputs a gate signal for controlling each semiconductor switch unit. As a result, in the power conversion device of each embodiment, the circulating current due to the zero-phase disturbance voltage that is unnecessary for balancing the voltage (charge amount) of the DC capacitor in each cell of the MMC is suppressed from flowing in the delta connection circuit, and the reactive power output (supplied) by the power converter to the interconnection point with the power system is compensated. As a result, in the power conversion device of each embodiment, the power loss during the operation (operation) of the MMC can be suppressed. As a result, in the power conversion device of each embodiment, there is no need to use passive elements that have high rated values ​​that will not break down or become unstable as components that make up the MMC, thereby preventing increases in the cost of the MMC.

[0089] According to at least one of the embodiments described above, a power conversion device (1) connected to a three-phase power system includes a power converter (10) having a delta connection circuit in which three phase circuits (121) corresponding to each of the phases of the power system are delta-connected, and a control device (50) that controls the power converter, in which the phase circuit includes an arm (124) having a plurality of cells (125) connected in series, each of which includes a plurality of self-extinguishing semiconductor switching elements (126) and a DC capacitor (127), and an impedance component (123) connected in series, and a current detector (122) that detects an arm current (Iarm) flowing in the arm at an arbitrary position of the series-connected circuit, and the control device detects a circulating current (Iz) flowing in the delta connection circuit based on the arm current, and controls the power converter to suppress a predetermined disturbance component (Vz_dis) included in the detected circulating current, thereby realizing a power conversion device that can suppress a disturbance component included in the circulating current flowing in a delta-connected modular multilevel converter.

[0090] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope of the invention and its equivalents described in the claims, as well as in the scope and spirit of the invention. [Explanation of symbols]

[0091] 1,2···Power conversion device, 10,20···Power converter, 11,21···Transformer, 12,22···MMC, 121,121_a,121_b,121_c,221,221_a,221_b,221_c···Phase circuit, 122,122_a,122_b,122_c···Current detector, 123,123_a,123_b,123_c···Buffer reactor, 124,124_a,124_b,124_c···Arm, 125,125-1,125-n,125a,125b···Cell, 126,126-1,126-2,126-3,126-4···Semiconductor switch switch section, 127...DC capacitor, 50,50a,50b...control device, 500...adder, 510...compensator, 520...adder, 530...adder, 540...specific order component suppression control section, 541...nth order harmonic component amplitude / phase extraction section, 542...proportional integral controller, 543...sine wave generation section, 550...disturbance observer section, 551...compensator, 552...adder, 553...low-pass filter, 560...repetitive control section, 561...adder, 562...delay section, 563...low-pass filter, 564...compensator, 570...adder

Claims

1. A power conversion device connected to a three-phase power system, a power converter including a delta connection circuit in which three phase circuits corresponding to each of the phases of the power system are delta connected; A control device that controls the power converter; Equipped with The phase circuit includes: An arm in which a plurality of cells, each including a plurality of self-extinguishing semiconductor switching elements and a DC capacitor, are connected in series with an impedance component; a current detector for detecting a branch current flowing through the branch at an arbitrary position of the series-connected circuit, The control device includes: detecting a circulating current flowing in the delta connection circuit based on the arm current, and controlling the power converter so as to suppress a predetermined disturbance component contained in the detected circulating current. Power conversion equipment.

2. The control device feedback controls the power converter so as to bring a current component of the circulating current of an order to be suppressed closer to zero. The power conversion device according to claim 1 .

3. the control device controls the power converter based on an error amount included in a voltage of the delta connection circuit estimated based on the circulating current and a control output amount of the circulating current. The power conversion device according to claim 1 or 2.

4. the control device repeatedly controls the power converter based on repetitive waveform information of a fundamental wave period so as to bring a difference between the circulating current and a circulating current command value closer to zero. The power conversion device according to any one of claims 1 to 3.

5. The control device controls the power converter so that the circulating current flows to balance the voltages of the DC capacitors included in the cells in the phase circuits corresponding to the respective phases. The power conversion device according to any one of claims 1 to 4.

6. The control device controls the power converter to supply negative-sequence reactive power to the power grid or to consume the negative-sequence reactive power. The power conversion device according to any one of claims 1 to 5.

7. The cell is a half-bridge circuit in which a series circuit in which two semiconductor switching elements, a first semiconductor switching element and a second semiconductor switching element, are connected in series, and the DC capacitor are connected in parallel. The power conversion device according to any one of claims 1 to 6.

8. The cell is a full bridge circuit in which a first series circuit in which two semiconductor switching elements, a first semiconductor switching element and a second semiconductor switching element, are connected in series, a second series circuit in which two semiconductor switching elements, a third semiconductor switching element and a fourth semiconductor switching element, are connected in series, and the DC capacitor are connected in parallel. The power conversion device according to any one of claims 1 to 6.

9. The impedance component contributing to the circulating current is a leakage impedance component included in a transformer connected between the three-phase power system and the delta connection circuit. The power conversion device according to any one of claims 1 to 8.

10. A power conversion device connected to a three-phase power system, a power converter including a delta connection circuit in which three phase circuits corresponding to each of the phases of the power system are delta connected; A control device that controls the power converter; Equipped with The phase circuit includes: An arm in which a plurality of cells, each including a plurality of self-extinguishing semiconductor switching elements and a DC capacitor, are connected in series with an impedance component; A control method for the power conversion device, comprising: a current detector for detecting a valve branch current flowing through the valve branch at an arbitrary position of the series-connected circuit, The computer of the control device Detecting a circulating current flowing in the delta connection circuit based on the arm current; controlling the power converter so as to suppress a predetermined disturbance component contained in the detected circulating current; A method for controlling a power conversion device.

11. A power conversion device connected to a three-phase power system, a power converter including a delta connection circuit in which three phase circuits corresponding to each of the phases of the power system are delta connected; A control device that controls the power converter; Equipped with The phase circuit includes: An arm in which a plurality of cells, each including a plurality of self-extinguishing semiconductor switching elements and a DC capacitor, are connected in series with an impedance component; A program for controlling the power conversion device, comprising a current detector for detecting a valve branch current flowing through the valve branch at an arbitrary position of the series-connected circuit, The computer of the control device detecting a circulating current flowing in the delta connection circuit based on the arm current; controlling the power converter so as to suppress a predetermined disturbance component contained in the detected circulating current; program.

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