Semiconductor device and driving method thereof

Abstract

In the present invention, a semiconductor device comprises a plurality of resistive switching elements (19) on a semiconductor substrate (10), each resistive switching element (19) having a first electrode (11), a second electrode (13), and a resistive switching layer (12) sandwiched between the first electrode (11) and the second electrode (13) and storing a continuously variable resistance value, and each variable resistance element (19) also having a filament (14) that has a different shape corresponding to the weight of the resistive switching layer (12) and a neural network, and storing the variable resistance value as an analog continuous value.

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device and a method for driving the same. [Background technology]

[0002] With the advancement of information and communication technology, the arrival of IoT (Internet of Things) technology, in which everything will be connected to the Internet, is attracting attention. In particular, in the era of big data, in which data is collected from IoT devices, there is an explosive increase in data processing at data centers, protection of personal data information, and real-time feedback. From this perspective, there are growing expectations for edge information processing, i.e. edge AI (Artificial Intelligence) that makes user interfaces intelligent.

[0003] This will be made possible by memory computing technology that utilizes resistive random access memory (ReRAM) and its application to neuromorphic devices that model the operation of neural network neurons.

[0004] Non-Patent Document 1 discloses an example of a neural network arithmetic circuit using a variable resistance nonvolatile memory. The neural network arithmetic circuit is configured using a variable resistance nonvolatile memory in which an analog resistance value can be set, and an analog resistance value corresponding to a coupling weight coefficient is stored in the nonvolatile memory element. [Prior art documents] [Non-patent literature]

[0005] [Non-Patent Document 1] M. Prezioso, et al., “Training and operation of an integrated neuromorphic network based on metal-oxide memristors”, Nature, no. 521, pp. 61-64, 2015. Summary of the Invention [Problem to be solved by the invention]

[0006] However, in a variable resistance element that stores weights that take analog continuous values ​​as resistance values, there is a problem in that reliability is reduced due to "variation" in the analog resistance values.

[0007] Therefore, the present disclosure addresses the above-mentioned problem, and provides a semiconductor device and a driving method thereof that reduce the variation in resistance value of a resistance change element that stores weight and has higher reliability. [Means for solving the problem]

[0008] In order to solve the above problems, a semiconductor device according to one embodiment of the present disclosure includes a plurality of variable resistance elements on a semiconductor substrate, each of the variable resistance elements having a first electrode, a second electrode, and a variable resistance layer sandwiched between the first electrode and the second electrode and storing a continuously variable resistance value, and the variable resistance layer has filaments with different shapes corresponding to the weights of a neural network and stores the variable resistance value as an analog continuous value.

[0009] Furthermore, a manufacturing method for a semiconductor device according to one embodiment of the present disclosure is a method for driving a semiconductor device having a plurality of resistance change elements on a semiconductor substrate, the resistance change elements having a first electrode, a second electrode, and a resistance change layer sandwiched between the first electrode and the second electrode and storing a continuously changing resistance value, and the method for driving the semiconductor device includes determining a stress of an electrical pulse corresponding to a weight of a neural network, and applying the determined electrical pulse as a stress to the resistance change layer in a forming process for forming a filament in the resistance change layer, thereby forming a filament of a different shape corresponding to the weight. Effect of the Invention

[0010] Advantageous Effects of Invention According to one aspect of the present disclosure, it is possible to reduce the variation in the resistance value that a variable resistance element can have, thereby improving reliability.

[0011] Further benefits and advantages of the disclosed embodiments will become apparent from the specification and drawings, in which the benefits and / or advantages may be provided individually by the various embodiments and features disclosed in the specification and drawings, and not all need to be present in order to obtain one or more benefits and / or advantages. [Brief description of the drawings]

[0012] [Figure 1A] FIG. 1A is a diagram showing a configuration example of a semiconductor device that performs memory computing by utilizing a resistance change element according to an embodiment. [Figure 1B] FIG. 1B is a diagram showing the resistance-voltage characteristics of the resistance change element. [Diagram 2] FIG. 2 is a cross-sectional view of a variable resistance element in which the resistance value changes due to oxidation / reduction caused by the movement of oxygen. [Diagram 3] FIG. 3 is a diagram showing a distribution of read currents obtained by reading, as a current, the analog resistance value of a variable resistance element of a semiconductor device. [Figure 4]FIG. 4 is a correlation diagram showing the relationship between the filament characteristics and the data retention characteristics of a resistance change element. [Diagram 5] FIG. 5 is a cross-sectional view showing a first configuration example of a semiconductor device according to an embodiment. [Figure 6] FIG. 6 is a cross-sectional view showing a second configuration example of the semiconductor device according to the embodiment. [Figure 7A] FIG. 7A is a cross-sectional view showing an example of a resistance change layer of a semiconductor device according to a first configuration example. [Figure 7B] FIG. 7B is a cross-sectional view showing another example of the resistance change layer of the semiconductor device according to the second configuration example. [Figure 8] FIG. 8 is an explanatory diagram showing a network path due to oxygen defects formed in a filament of a semiconductor device according to an embodiment. [Figure 9] FIG. 9 is a distribution diagram of weights (analog resistance values) of a neural network set in the semiconductor device according to the embodiment. [Figure 10A] FIG. 10A is a cross-sectional view showing an example of a first driving method of the semiconductor device according to the first configuration example. [Figure 10B] FIG. 10B is a flowchart showing a specific example of the first driving method shown in FIG. 10A. [Figure 10C] FIG. 10C is a diagram showing an example of a look-up table that associates neural network weights with electrical pulses. [Figure 11] FIG. 11 is a diagram showing the relationship between the size of the filament and the density of oxygen defects in the semiconductor device according to the first configuration example. [Figure 12] FIG. 12 is a graph showing (a) the size of the filament versus the forming current and (b) the density of oxygen defects versus the forming current in a first driving method of the semiconductor device according to the first configuration example. [Figure 13A] FIG. 13A is a cross-sectional view showing an example of a second driving method of the semiconductor device according to the first configuration example. [Figure 13B] FIG. 13B is a flowchart showing a specific example of the second driving method shown in FIG. 13A. [Figure 14] FIG. 14 is a diagram showing a state in which an analog resistance value for an additional forming current is observed using a read current in the second driving method of the semiconductor device according to the first configuration example. [Figure 15] FIG. 15 is a diagram showing the relationship between the read current corresponding to the analog resistance value with respect to the additional current and the variation thereof in the second driving method of the semiconductor device according to the first configuration example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] (Findings on which this disclosure is based) The present inventors have found that the following problems occur with respect to the semiconductor device having a neural network arithmetic circuit using a resistive nonvolatile memory, which is described in the "Background Art" section.

[0014] In the background art, a neural network is disclosed that uses resistance change elements that store weights that take analog continuous values ​​as resistance values.

[0015] However, there are issues to be addressed, such as how to control the resistance value having a continuous value that is held as a weight, in particular how to suppress variation in the resistance value, and the reliability of holding the weight when used over a long period of time.

[0016] A resistive change element as a digital memory stores two values ​​corresponding to high and low resistance, so if the worst bit exceeds a set threshold due to element variation, the element becomes defective. Therefore, the "error rate" relative to the threshold determines the performance of the element.

[0017] On the other hand, in the case of a resistance change element that stores analog weights, the resistance value is used directly for the calculation of the neural network. In this case, it is assumed that the "variation" of the resistance value for one weight value, rather than the "error rate," is an issue for the reliability of the resistance value and therefore the reliability of the memory computing of the semiconductor device. In other words, if the "variation" is large, it will deteriorate the reliability of the resistance value and even the reliability of the neural network.

[0018] Therefore, the present disclosure addresses the above-mentioned problem, and provides a semiconductor device and a driving method thereof that reduce the variation in resistance value of a resistance change element that stores weight and has higher reliability.

[0019] To this end, a semiconductor device in one embodiment of the present disclosure includes a plurality of variable resistance elements on a semiconductor substrate, each of the variable resistance elements having a first electrode, a second electrode, and a variable resistance layer sandwiched between the first electrode and the second electrode and storing a continuously variable resistance value, and the variable resistance layer has filaments with different shapes corresponding to the weights of the neural network and stores the variable resistance value as an analog continuous value.

[0020] In this way, by associating the neural network weights with the filament shapes, it is possible to suppress the variation in the resistance value of the resistance change element that can correspond to a single weight value, improve the data retention characteristics, and increase the reliability of the semiconductor device.

[0021] Here, the area of ​​the filament in a plan view of the semiconductor substrate may vary depending on the weight of the neural network.

[0022] According to this, in addition to the above-mentioned effects, it is easy to control the area of ​​the filament as the shape of the filament of the resistance change layer by applying an electric pulse.

[0023] Here, the length of the filament in the direction in which the first electrode and the second electrode face each other may vary depending on the weight of the neural network.

[0024] In addition to the above-mentioned effects, this allows the weight to correspond to the length of the filament shape regardless of the area of ​​the resistance change element, making it possible to form a resistance change element that is more suitable for miniaturization.

[0025] Here, the resistance change layer may include a first resistance layer and a second resistance layer having a resistance value higher than that of the first resistance layer and including the filament.

[0026] According to this, in the forming process, the length of the filament is set to approximately L, making it easy to set various analog resistance values ​​in correspondence with the area of ​​the filament and the weight of the neural network.

[0027] Here, the first electrode may be formed on the semiconductor substrate, and the resistance change layer may have a resistance value that increases continuously or stepwise from the second electrode to the first electrode. For example, the resistance value per unit volume of the resistance change layer may increase continuously or stepwise from the second electrode to the first electrode.

[0028] This makes it easy to set various analog resistance values ​​in the forming process by roughly setting the area of ​​the filament to S and corresponding the length L of the filament to the weight of the neural network.

[0029] Here, the resistance change layer changes due to the movement of oxygen caused by the application of an electric pulse. By increasing or decreasing oxygen vacancies , the resistance value may change.

[0030] In addition to the above effects, by controlling the amount of stress applied by the electrical pulse, it is possible to set a resistance value corresponding to a desired weight, thereby enabling neural network calculations to be performed more accurately.

[0031] Here, the resistance change layer may contain a transition metal oxide.

[0032] For example, transition metal oxides include tantalum oxide, hafnium oxide, etc. In transition metal oxides, oxygen moves due to oxidation-reduction reactions, and the density of oxygen defects in the filament changes, making it possible to design the desired resistance value corresponding to the weight.

[0033] Here, the filament may have a current path through which current flows via a plurality of oxygen defects, and may have a plurality of redundant current paths connecting the end of the filament on the first electrode side and the end of the filament on the second electrode side.

[0034] This makes it possible to reduce the possibility of current paths being cut off due to oxygen diffusion, which is one of the causes of deterioration of data retention characteristics, and to provide a semiconductor device with higher reliability.

[0035] Here, the oxygen defect density of the filament may be independent of the weights of the neural network.

[0036] According to this, if the oxygen defect density is set to a constant value that allows for redundant current paths and is independent of the weight, the variation in the resistance value can be more easily suppressed.

[0037] Here, the resistance change layer may change in resistance value in accordance with the migration of metal ions caused by application of an electric pulse.

[0038] In addition to the above effects, by controlling the amount of stress applied by the electrical pulse, it is possible to set a resistance value corresponding to a desired weight, thereby enabling neural network calculations to be performed more accurately.

[0039] Here, the resistance values ​​of at least half of the plurality of variable resistance elements may be greater than a median of analog-like continuous values ​​that the resistance values ​​can take.

[0040] According to this, by suppressing the product-sum current flowing through the output layer, it is possible to provide a semiconductor device with excellent low power consumption suitable for mobile devices.

[0041] Here, the resistance values ​​of half or more of the plurality of variable resistance elements may be smaller than a median of analog-like continuous values ​​that the resistance value can take.

[0042] According to this, by utilizing small weights of resistance values ​​with relatively little variation, the variation in the product-sum current flowing through the output layer can be suppressed, thereby providing a semiconductor device with excellent accuracy for final applications.

[0043] A method for driving a semiconductor device in one embodiment of the present disclosure is a method for driving a semiconductor device having a plurality of resistance change elements on a semiconductor substrate, the resistance change elements having a first electrode, a second electrode, and a resistance change layer sandwiched between the first electrode and the second electrode and storing a continuously changing resistance value, and in the method for driving the semiconductor device, a stress of an electrical pulse corresponding to a weight of a neural network is determined, and in a forming process for forming a filament in the resistance change layer, the determined electrical pulse is applied as stress to the resistance change layer to form a filament of a different shape corresponding to the weight.

[0044] This makes it possible to provide a semiconductor device capable of suppressing variations in the resistance value of the resistance change element that can correspond to the weight and improving the data retention characteristics.

[0045] Here, at least one of a voltage value, a current value, and an application time of the electrical pulse may differ according to the weight of the neural network.

[0046] According to this, by moving oxygen ions, metal ions, etc. by an electric pulse, a desired resistance value corresponding to the weight can be set.

[0047] Here, the stress of the electrical pulse may include a first electrical pulse common to the multiple resistance change elements and a second electrical pulse corresponding to the weight that is not common to the multiple resistance change elements, and in the forming process, the first electrical pulse may be applied to the resistance change layer, and further, the second electrical pulse may be applied to the resistance change layer.

[0048] This allows the weights to be set and modified at the customer site after chip shipment, and allows updates to the network weights for various applications.

[0049] Here, the second electric pulse may have at least one of a voltage value, a current value, and an application time that differs depending on the weight.

[0050] According to this, by moving oxygen ions, metal ions, etc. by the second electric pulse, a desired resistance value corresponding to the weight can be set.

[0051] (Embodiment) [1. Schematic configuration of semiconductor device] FIG. 1A is a diagram showing a schematic configuration example of a semiconductor device that performs in-memory computing by utilizing a resistance change element according to an embodiment. The semiconductor device in the figure shows a circuit example of a neural network using a resistance change element that stores the weight of the neural network as a resistance value that takes an analog continuous value, as an example of in-memory computing. Here, the resistance change element is a memory element that stores an analog value, not a digital value. The semiconductor device in the figure includes an input layer 21, an arithmetic processing layer 22, and an output layer 23. Note that an analog continuous value refers to a physical quantity whose value changes continuously and can be set arbitrarily within a desired range.

[0052] The configuration of the neural network including the input layer 21, the arithmetic processing layer 22, and the output layer 23 has a very high affinity with the configuration of a memory array of a ReRAM, which is a resistance change memory. In this semiconductor device, the neural network arithmetic circuit is configured using resistance change elements whose analog resistance values ​​can be set.

[0053] The input layer 21 has a plurality of input nodes 24. In the example shown in the figure, voltages V1 to V5 are input to five input nodes 24. Each input node is connected to a word line 17 serving as an input line of the arithmetic processing layer 22.

[0054] The output layer 23 has a plurality of output nodes 25. Each output node 25 is connected to a bit line 18 serving as an output line of the arithmetic processing layer 22.

[0055] The arithmetic processing layer 22 is configured as, for example, one or more hidden layers, and includes a plurality of word lines 17, a plurality of bit lines 18, and a resistance change element 19 formed at each intersection of the plurality of word lines 17 and the plurality of bit lines 18. The plurality of word lines 17 and the plurality of bit lines 18 are arranged in a lattice pattern. That is, a resistance change element 19 is arranged at each intersection of the lattice. A diode D for preventing reverse current is connected in series to the resistance change element 19. In this cross-point structure, a diode is used as a selection element for the resistance change element 19, but it may be electrically replaced by a commonly used three-terminal transistor.

[0056] The resistance change element 19 has a continuously variable resistance value corresponding to the neural network weight W. Figure 1B shows the resistance-voltage characteristics of the resistance change element 19 that can store the neural network weight W as the reciprocal of the continuous resistance value R.

[0057] When voltages V1 to V5 are applied as data to five input nodes 24 of the input layer 21, a current (i=V / R=W×V) flows through the corresponding resistance change element 19 based on Ohm's law. For example, a current of i=V1 / R1=W11×V1 flows through the resistance change element 19 with weight W11. The currents from the resistance change elements 19 connected to each bit line 18 are added up in the bit line 18. The five output nodes 25 output the results of the product-sum operations (Σi1 to Σi5). By hierarchizing the resistance change elements 19 or increasing their capacity, it is possible to fully handle large-scale calculations.

[0058] As a result, by simultaneously performing multiply-and-accumulate operations on multiple pieces of data, it is possible to achieve an overwhelming amount of information aggregation and a significant reduction in circuitry, enabling the realization of ultra-compact edge AI with ultra-low power consumption.

[0059] The output node 25 may output the current value as the product-sum operation result as is, or may convert the current value into a voltage value and output it.

[0060] FIG. 2 is a cross-sectional view of a variable resistance element 19 whose resistance value changes due to oxidation and reduction caused by the movement of oxygen. (a) of the figure shows a low resistance state (LRS). (b) of the figure shows a high resistance state (HRS). The variable resistance element 19 has a first electrode 11, a second electrode 13, and a variable resistance layer 12 sandwiched between the first electrode 11 and the second electrode 13. In the variable resistance layer 12, a part of the variable resistance layer 12 changes (e.g., dielectric breakdown) by an electrical process called forming, and a filament 14 through which a current mainly flows is formed. In the filament 14, a large number of oxygen defects 15 formed by forming and a large number of oxygen ions 16 exist. The oxygen ions 16 move due to a voltage applied between the first electrode 11 and the second electrode 13, and the resistance value changes due to an increase or decrease in the density of the oxygen defects 15 in the filament, and a current flows by hopping conduction via the oxygen defects.

[0061] 2(a), when a positive voltage is applied to the first electrode 11 and a negative voltage is applied to the second electrode 13, negatively charged oxygen ions 16 are attracted to the first electrode 11, and some of the oxygen ions 16 captured in the oxygen defects 15 are released from the oxygen defects 15 and move to a region of the resistance change layer 12 outside the filament 14. At this time, the density of the oxygen defects 15 in the filament 14 increases, making it easier for current to flow. In other words, the resistance change element 19 is in an LRS (low resistance state).

[0062] 2(b), when a negative voltage is applied to the first electrode 11 and a positive voltage is applied to the second electrode 13, negatively charged oxygen ions 16 are attracted to the second electrode 13 and enter the filament 14, and some of them are captured by oxygen defects 15. The density of oxygen defects 15 in the filament 14 decreases, and the path (i.e., the current path) of the filament 14 is cut off, increasing the insulation and causing little current to flow. In other words, the resistance change element 19 is in the HRS (high resistance state).

[0063] In this way, in the resistance change element 19, whose resistance value changes due to oxidation / reduction caused by the movement of oxygen, the amount of movement of oxygen ions 16 can be controlled by adjusting the applied electric energy such as the magnitude of the voltage of the applied electric stress, the application time, and the magnitude of the current that flows at that time. In other words, it is possible to set the desired resistance value and store the weights of the neural network as analog continuous values.

[0064] The resistance of the region of the resistance change layer on the side where the filament 14 is formed may be higher than that of the filament 14. This is because current flows through the filament 14. The resistance of the region of the resistance change layer formed below the filament 14 is assumed to be configured such that a current basically flows through it, similar to within the filament.

[0065] 3 is a diagram showing the distribution of read currents obtained by reading the analog resistance value of the variable resistance element 19 of the semiconductor device as a current. The horizontal axis shows the read currents of the analog resistance values ​​corresponding to the weights of the neural network for all ranges from high resistance state to low resistance state that the variable resistance element 19 can take. The vertical axis shows the standard deviation showing the distribution.

[0066] When the resistance change element 19 is used as a digital memory that stores the binary values ​​of 0 and 1, the leftmost high resistance state and the rightmost low resistance state are used, and the memory window, which is the difference between them, can be sufficiently maintained.

[0067] On the other hand, when the weights of the neural network are assigned to the analog resistance value of the resistance change element 19 and the resistance change element 19 is used for memory computing, the resistance values ​​of all the ranges that the resistance change element 19 can take are basically used. As can be seen from FIG. 3, in the intermediate range of the read current, a large variation is observed compared to the low resistance state and the high resistance state. This suggests that in the low resistance state on the far right, the density of oxygen defects 15 in the filament 14 is high and a robust filament path, i.e., a current path, is formed, whereas in the intermediate range, the density of oxygen defects 15 is low and the characteristics of the filament path are changed (disconnected in places). These characteristics are strongly dependent on the characteristics of the filament 14 described below, and are also closely related to the data retention characteristics.

[0068] 4 is a correlation diagram showing the relationship between the filament characteristics and the data retention characteristics of the resistance change element 19. The characteristics of the filament have been quantitatively modeled using parameters such as the area S of the filament 14 and the density N(Vo) of oxygen vacancies 15 in the filament 14, and have been found to be closely correlated with the data retention characteristics.

[0069] Therefore, the inventors of the present invention have considered filament characteristics suitable for analog resistance values ​​based on experimental results of the filament characteristics and data retention characteristics of the resistance change element 19 constituting a memory called ReRAM. FIG. 4 is a correlation diagram showing the relationship between the filament characteristics and data retention characteristics of the resistance change element. FIG. 4 shows the correlation between the area of ​​the filament and the density of oxygen defects 15 as the degradation rate of the data retention characteristics equivalent to 10 years at 85° C. after 10,000 rewrites. In the figure, it is shown that the data retention characteristics improve as the gradation of the dots becomes lighter. Here, attention is paid to the low resistance state in which degradation of the data retention characteristics is likely to occur. This is because oxygen ions are diffused by heat during data retention and captured by oxygen defects, which breaks a part of the filament path, reduces the read current, and makes the memory window smaller. This phenomenon does not become a problem in the high resistance state. From this result, it can be seen that in order to suppress this degradation and miniaturize the resistance change element 19, i.e., to miniaturize the filament, the density N(Vo) of oxygen defects in the filament must basically be increased. In other words, it is important to increase the oxygen defect density N(Vo) to form a collection of numerous filament paths made up of oxygen defects V0 spread out like a web, and to form robust filament paths even if diffused oxygen ions are captured by some of the oxygen defects V0.

[0070] On the other hand, if the completed filament for memory applications is used as is for memory computing, the driving voltage is adjusted to reduce the oxygen defect density in the filament, and the neural network weights are set to correspond to the analog resistance values. In Figure 4, the filament characteristics change in the direction of (1). A large weight value that can maintain a high oxygen defect density indicates good data retention characteristics, but conversely, a small weight corresponding to a low oxygen defect density uses oxygen defects with poor data retention characteristics. This is the reason why the read current in Figure 3 varies more around the center of the possible resistance values.

[0071] Therefore, the inventors have adjusted the resistance value not by adjusting the oxygen defect density but mainly by adjusting the shape of the filament, such as the area and length of the filament, to provide a filament with excellent data retention characteristics (direction (2) in Figure 4), and provide the semiconductor device and driving method thereof of the present disclosure.

[0072] [1.1 First configuration example of semiconductor device] 5 is a cross-sectional view showing a first configuration example of a semiconductor device according to an embodiment of the present invention. Hereinafter, the semiconductor device of the first configuration example will be described with reference to FIG.

[0073] Although the semiconductor device includes a large number of variable resistance elements 19 arranged in a matrix as shown in FIG. 1A, only three variable resistance elements 19 are shown as representative examples to simplify the drawing. The three variable resistance elements 19 are referred to as a first variable resistance element 101, a second variable resistance element 102, and a third variable resistance element 103. The semiconductor device also includes wiring connected to the electrodes of the variable resistance elements 19 for extracting electrical signals from the variable resistance elements 19, transistors for a circuit that applies electrical signals to the variable resistance elements 19, and the like, but these are omitted because they are not directly related to the present disclosure. The same applies to the subsequent drawings.

[0074] 5, the semiconductor device of the first configuration example includes a plurality of resistance change elements 19 formed on a semiconductor substrate 10. In the figure, a first resistance change element 101, a second resistance change element 102, and a third resistance change element 103 are representatively illustrated as the plurality of resistance change elements 19. Each of the first resistance change element 101, the second resistance change element 102, and the third resistance change element 103 has a first electrode 11, a resistance change layer 12, and a second electrode 13. The resistance change layer 12 is sandwiched between the first electrode 11 and the second electrode 13 and stores a continuously variable resistance value.

[0075] In the resistance change layer 12, a part of the resistance change layer 12 is changed (e.g., dielectric breakdown) by an electrical process called forming, and filaments 14a, 14b, and 14c through which a current mainly flows and determines the resistance change characteristics are formed. The area of ​​the filament 14a of the first resistance change element 101 is S1, the area of ​​the filament 14b of the second resistance change element 102 is S2, and the area of ​​the filament 14c of the third resistance change element 103 is S3. The area S of the filament 14 varies depending on the weight W of the neural network. Here, the shape of the filament 14 formed by forming is not actually a perfect cylinder, but can be considered to be a cylinder in schematic form. The area S of the filament 14 may be defined as, for example, the average cross-sectional area of ​​the filament 14 cut on a plane parallel to the semiconductor substrate 10, or the area of ​​the contact portion between the second electrode 13 and the filament 14. The areas S1, S2, and S3 in the figure vary depending on the weight of the neural network.

[0076] The length of the filament is L in each of the first variable resistance element 101, the second variable resistance element 102, and the third variable resistance element 103.

[0077] As a result, the analog resistance value R of the filament 14 increases as the area S decreases. Since the current flowing through the resistance change element 19 can be changed depending on the area S of the filament 14, that is, without significantly changing the oxygen defect density that significantly affects the data retention characteristics, the shape of the filament 14 that maintains a strong network path can be maintained, and various analog resistance values ​​R corresponding to the weight of the neural network can be set. In other words, by maintaining the oxygen defect density constant or within a certain range without depending on the weight W of the neural network, it is possible to set the analog resistance value R that depends on the area S in a state in which a large number of current paths are redundantly formed in the filament 14. Therefore, it is possible to provide a semiconductor device for memory computing applications that has little variation in the weight of the analog resistance value R and is highly reliable.

[0078] As the semiconductor device described above, as the resistance change element 19, any non-volatile memory element whose resistance value changes reversibly by applying an electrical pulse can be utilized. In addition to the ReRAM described above, a CBRAM (Conductive Brige Random Access Memory) or the like that utilizes the change in resistance value accompanying the movement of metal ions by applying an electrical pulse may also be used.

[0079] The first electrode 11 and the second electrode 13 may be made of, for example, tantalum nitride with a thickness of 5 to 30 nm. Alternatively, they may be made of platinum, iridium, ruthenium, tungsten, nickel, tantalum, titanium, aluminum, titanium nitride, or the like. The first electrode 11 and the second electrode 13 may use different electrode materials according to their applications.

[0080] A transition metal oxide may be used as the metal oxide of the resistance change layer 12. In this case, when tantalum or hafnium is employed as the transition metal contained in the transition metal oxide, for one of the electrodes, a material (e.g., a noble metal-based material) that exhibits a standard electrode potential equal to or higher than that of tantalum or hafnium using a material in which resistance change is likely to occur may be selected. Also, for one of the electrodes, a material that exhibits a standard electrode potential equal to or lower than that of tantalum or hafnium using a material in which resistance change is unlikely to occur may be selected. Specifically, at least one material selected from the group consisting of tantalum, tantalum nitride, titanium, titanium nitride, and titanium-aluminum nitride can be used. With such a configuration, stable resistance change characteristics can be realized.

[0081] The area S of the filament 14 can be adjusted, for example, in the range of 5 nm to 30 nm while maintaining the relationship of S1 < S2 < S3, although the size of one side of the resistance change element 19 is about 100 nm. Also, the size of the filament 14 is in a relative relationship with the resistance change element 19, and can be adjusted to about several nm to 100 nm with respect to one side of the size of the resistance change element 19 being 50 nm to 500 nm.

[0082] [1.2 Second Configuration Example of Semiconductor Device] 6 is a cross-sectional view showing a second configuration example of the semiconductor device according to the embodiment. Hereinafter, the semiconductor device of the second configuration example will be described with reference to FIG.

[0083] 6, the semiconductor device according to the second configuration example is different from that in Fig. 5 mainly in that the length L of the filament 14, rather than the area S, corresponds to the weight W of the neural network. The following mainly describes the differences.

[0084] The semiconductor device in the figure illustrates a fourth variable resistance element 104, a fifth variable resistance element 105, and a sixth variable resistance element 106 instead of the first variable resistance element 101, the second variable resistance element 102, and the third variable resistance element 103 in FIG.

[0085] In the resistance change layer 12 of the fourth resistance change element 104, the fifth resistance change element 105, and the sixth resistance change element 106, a part of the resistance change layer 12 changes (e.g., dielectric breakdown) by an electrical process called forming, and filaments 14d, 14e, and 14f, through which mainly current flows and which determines the resistance change characteristics, are formed.

[0086] The length 14d of the filament of the fourth variable resistance element 104 is L1, the length of the filament 14e of the fifth variable resistance element 105 is L2, and the length of the filament 14f of the sixth variable resistance element 106 is L3. The lengths L1, L2, and L3 differ depending on the weights of the neural network.

[0087] The area of the filament 14 formed in any of the fourth resistance change element 104, fifth resistance change element 105, and sixth resistance change element 106 is S. As a result, the analog resistance value R of the filament 14 increases as the length L increases. Since the current flowing through the resistance change element can be changed depending on the length of the filament 14, that is, without significantly changing the oxygen defect density that greatly affects the data retention characteristics, the filament shape with a strong network path is maintained, and various analog resistance values R corresponding to the weights of the neural network can be set. In other words, by maintaining the oxygen defect density constant or within a certain range without depending on the weights of the neural network, the analog resistance value R depending on the length L can be set in a state where a large number of current paths are redundantly formed in the filament 14. Therefore, it is possible to provide a semiconductor device for memory computing applications with less variation in the weights of the analog resistance value R and excellent reliability.

[0088] The length L of the filament 14 can be adjusted in the range of 5 nm to 20 nm while maintaining the relationship of L1 < L2 < L3, for example, when the film thickness of the resistance change layer is about 20 nm. Also, the length L of the filament is in a relative relationship with the film thickness of the resistance change layer 12, and can be adjusted to about several nm to 100 nm when the resistance change film thickness is 10 nm to 100 nm.

[0089] Note that also in the second configuration example, the type of memory that can be used for memory computing, the materials of the first electrode 11, the second electrode 13, and the resistance change layer 12 may be the same as those in the first configuration example.

[0090] [1.3 Configuration of the resistance change layer 12] Next, a more specific configuration example of the resistance change layer 12 will be described.

[0091] Fig. 7A is a cross-sectional view showing an example of the resistance change layer 12 of the semiconductor device according to the first configuration example, and Fig. 7B is a cross-sectional view showing another example of the resistance change layer 12 of the semiconductor device according to the second configuration example. Hereinafter, the configuration examples of the resistance change layer 12 will be described with reference to the drawings.

[0092] In the example shown in FIG. 7A, the resistance change layer 12 has a first resistance change layer 12a having a lower resistance value and a second resistance change layer 12b having a higher resistance value. There is a clear boundary between the first resistance change layer 12a and the second resistance change layer 12b. When such a resistance change layer 12 has a boundary between resistance values ​​(when a transition metal oxide has two layers with different oxygen concentrations), a filament 14 that mainly flows a current that determines the resistance change characteristics is formed in the second resistance change layer 12b by an electrical process called forming. This is because the electrical stress is distributed and the electrical stress is preferentially applied to the second resistance change layer 12b having a higher resistance value. As a result, the length of the filament is determined to be approximately L, which is approximately the same as the vertical height of the second resistance change layer 12b. The area S of the filament 14 can be adjusted to S1, S2, S3, etc. to set various analog resistance values ​​corresponding to the weights of the neural network. The up-down direction refers to the direction in which first electrode 11 and second electrode 13 face each other.

[0093] 7B, the resistance change layer 12 is composed of a third resistance change layer 12c whose resistance value changes continuously or stepwise from the second electrode 13 to the first electrode 11. Specifically, the region of the third resistance change layer 12c close to the second electrode 13 has a high resistance value, for example, made of a transition metal oxide with a high oxygen concentration, and the region of the third resistance change layer 12c close to the first electrode 11 has a low resistance value, for example, made of a transition metal oxide with a low oxygen concentration, so that the resistance value changes continuously or stepwise.

[0094] In the case where the resistance value of such a variable resistance layer changes continuously (transition metal oxides have a continuously changing oxygen concentration profile), a filament is formed in the third variable resistance layer 12c by an electrical process called forming, but the length of the filament formed varies depending on the magnitude of the electrical stress during forming. This is because the electrical stress is distributed, and the length of the filament and the optimal point of the load resistance at which the third variable resistance layer 12c in the region below the filament are formed change. As a result, the resistance value fluctuation range determined by the length of the filament becomes significantly larger than the resistance value fluctuation range due to the change in the area of ​​the filament, and the area of ​​the filament 14 is generally determined to be S. The length L of the filament 14 can be set to various analog resistance values ​​corresponding to the weights of the neural network by adjusting L1, L2, L3, etc.

[0095] [1.4 Composition of highly reliable filament] FIG. 8 is an explanatory diagram showing a network path, that is, a current path, due to oxygen defects 15 formed in the filament 14 of the semiconductor device according to the first and second configuration examples.

[0096] Network paths through which current flows from top to bottom in the vertical cross section of the filament 14, or in the opposite direction, are shown diagrammatically as oxygen defects 15. Current paths between oxygen defects that are close enough for electrons to hop, i.e., close enough for current to flow, are shown diagrammatically with thick lines. Current paths between oxygen defects that are not close enough for current to flow are shown diagrammatically with thin lines.

[0097] 8(a), the network path of the current path due to oxygen defects 15 has at least multiple current paths that can be made redundant in all regions of the current path connecting the top and bottom of the filament 14. In other words, even if oxygen diffuses and is captured by oxygen defects during the data retention period and the network path in that portion is blocked, the presence of multiple current paths allows current to flow and makes it possible to minimize changes in resistance value.

[0098] On the other hand, in FIG. 8(b), there is a non-redundant bottleneck portion (marked with an "x" in the figure) in the network path within the filament 14. When oxygen diffuses into the oxygen defect related to this network path, there is no alternative current path, the current stops flowing, and the resistance value changes significantly.

[0099] The semiconductor devices in the first configuration example shown in FIG. 5 and the second configuration example shown in FIG. 6 have a plurality of redundant current paths that can be redundant over the entire region of the filament 14 as shown in FIG. 8(a). That is, the filament 14 has a current path through which current flows via a plurality of oxygen defects, and has a plurality of redundant current paths connecting the end portion on the first electrode 11 side and the end portion on the second electrode 13 side of the filament 14. Thereby, the possibility of interruption of the current path due to diffusion of oxygen, which is one of the causes of deterioration of data retention characteristics, can be reduced, and a more reliable semiconductor device can be provided.

[0100] [1.5 Setting of Weights of Neural Network] Next, a setting example for associating the analog resistance value R of the resistive change element 19 with the weight W of the neural network will be described.

[0101] FIG. 9 is a distribution diagram of the weights (analog resistance values) of the neural network set in the semiconductor device according to the first and second configuration examples. The vertical axis of the figure shows the distribution of the analog resistance value. The horizontal axis of the figure shows the analog resistance value R of the resistive change element 19 and the weight W of the neural network. The horizontal axis corresponds to the range from W1 to W2 (W1>W2) of the weight W of the neural network, and it is assumed that the analog resistance value R stored as the reciprocal of the weight can be set in the range from R1 to R2 (R1<R2). The median value WM of the weight corresponds to the analog resistance value RM.

[0102] 9(a) shows an example in which the resistance values ​​R of more than half of the multiple variable resistance elements 19 in the semiconductor device according to the first or second configuration example are set to a value larger than the median value RM of the analog continuous values ​​that the resistance value R can take. By training the neural network to assign the weight W to a relatively high resistance value R, the current flowing through the output layer 23 during product-sum calculations can be suppressed, and a semiconductor device with excellent low power consumption can be provided.

[0103] 9(b) shows an example in which the resistance values ​​R of more than half of the multiple variable resistance elements in the semiconductor device according to the first or second configuration example are set to a value smaller than the median value RM of the analog continuous values ​​that the resistance value R can take. By training the neural network to assign weights to low resistance values ​​with relatively small variations, the variation in the product-sum current flowing in the output layer 23 can be suppressed, thereby providing a semiconductor device with excellent accuracy for final applications.

[0104] [2.1 First driving method for forming a semiconductor device according to the first configuration example] Next, a first driving method for forming the semiconductor device according to the first configuration example will be described.

[0105] FIG. 10A is a cross-sectional view showing an example of a first driving method for forming a semiconductor device according to the first configuration example.

[0106] In (a) of Figure 10A, a semiconductor device according to a first configuration example has a resistance change layer 12 sandwiched between a first electrode 11 and a second electrode 13 on a semiconductor substrate 10, and has a first resistance change element 101, a second resistance change element 102, and a third resistance change element 103 formed thereon.

[0107] In FIG. 10A (b), filaments 14a, 14b, and 14c are formed in the resistance change layer 12 by an electrical process called forming. An electrical stress (for example, voltage V1) is applied to the first resistance change element 101, and a filament 14a having a filament area S1 and a length L is formed. An electrical stress (for example, voltage V2, V2>V1) is applied to the second resistance change element 102, and a filament 14b having a filament area S2 and a length L is formed. An electrical stress (for example, voltage V3, V3>V2) is applied to the third resistance change element 103, and a filament 14c having a filament area S3 and a length L is formed. This makes it possible to change the current flowing through the resistance change element depending on the area of ​​the filament. That is, it is possible to maintain a filament shape that maintains a strong network path without significantly changing the oxygen defect density that greatly affects the data retention characteristics, and to set various analog resistance values ​​corresponding to the weight of the neural network. Therefore, it is possible to provide a semiconductor device for memory computing applications that has little variation in the weight of the analog resistance value and is highly reliable.

[0108] Next, a specific example of the first driving method will be described.

[0109] Fig. 10B is a flowchart showing a specific example of the first driving method shown in Fig. 10A. In this figure, N represents the number of resistance change elements 19. i represents a control variable for counting from 1 to N. Wi represents a weight corresponding to the i-th resistance change element 19. Vi represents the stress of an electric pulse corresponding to the i-th resistance change element 19.

[0110] In loop 1 (S61 to S64), N resistance change elements 19 are sequentially subjected to forming.

[0111] In loop 1, first, an electrical pulse Vi corresponding to the weight Wi is determined as stress (S62). The electrical pulse Vi is determined, for example, by reading a reference table as shown in FIG. 10C. FIG. 10C is a diagram showing an example of a reference table that correlates the weight W of a neural network, the filament shape (here, the area), and the stress of an electrical pulse.

[0112] Next, the determined electrical pulse Vi is applied as stress to the i-th resistive change element 19 (S63).

[0113] In this way, according to FIG. 10B, an analog resistance value R corresponding to the weight W is set for the N resistive change elements 19.

[0114] In FIG. 10A, the electrical stress uses the magnitude relationship of voltages (V1 < V2 < V3), but a method of changing the pulse width applied at a constant voltage or a mode of changing the electrical energy applied by controlling the current flowing during voltage application may also be used.

[0115] As an example thereof, an example of the filament characteristics of the resistive change element 19 formed by controlling the current instead of the voltage is shown below.

[0116] FIG. 11 is a diagram showing the relationship between the size of the filament 14 and the density of oxygen vacancies 15 in the semiconductor device according to the first configuration example. The horizontal axis represents the relative area of the filament 14, and the vertical axis represents the relative density of oxygen vacancies 15. FIG. 12 is a diagram showing (a) the size of the filament 14 with respect to the forming current and (b) the density of oxygen vacancies 15 with respect to the forming current in the first driving method of the semiconductor device according to the first configuration example.

[0117] It can be seen from Fig. 11 that the filament characteristics can be changed mainly by changing the direction of the area of ​​the filament 14 (direction (2) shown in Fig. 4) without significantly changing the density of oxygen defects 15. It can be seen from (a) of Fig. 12 that the area of ​​the filament increases monotonically with an increase in the forming current, and from (b) of Fig. 12 that the oxygen defect density decreases slightly monotonically, indicating that it is possible to control it with the forming current.

[0118] [2.2 Second driving method for forming the semiconductor device according to the first configuration example] FIG. 13A is a cross-sectional view showing an example of a second driving method for forming the semiconductor device according to the first configuration example.

[0119] 13A(a), the semiconductor device according to the first configuration example has a resistance change layer 12 sandwiched between a first electrode 11 and a second electrode 13 on a semiconductor substrate 10, and has a first resistance change element 101, a second resistance change element 102, and a third resistance change element 103 formed thereon. The filament 14 has not yet been formed in the first resistance change element 101, the second resistance change element 102, and the third resistance change element 103.

[0120] 13A(b), a part of the variable resistance layer 12 changes (e.g., dielectric breakdown) by an electrical process called forming, forming a filament through which a current mainly flows and determines the resistance change characteristics. At this time, the same electrical stress (e.g., a pulse of voltage V0) is applied to the first variable resistance element 101, the second variable resistance element 102, and the third variable resistance element 103, forming the same filament 14s having a filament area S0 and length L.

[0121] In (c) of FIG. 13A, additional electrical processing is applied to the filament 14s in the resistance change layer 12 to form filaments 14a, 14b, and 14c through which a current mainly determines the resistance change characteristics flows. An electrical stress (for example, voltage V01) is applied to the first resistance change element 101 to form the filament 14a having an area of ​​S1 and a length L. An electrical stress (for example, voltage V02, V02>V01) is applied to the second resistance change element 102 to form the filament 14b having an area of ​​S2 and a length L. An electrical stress (for example, voltage V03, V03>V02) is applied to the third resistance change element 103 to form the filament 14c having an area of ​​S3 and a length L. This makes it possible to change the current flowing through the resistance change element depending on the area of ​​the filament. That is, it is possible to maintain a filament shape that maintains a strong network path without significantly changing the oxygen defect density that greatly affects the data retention characteristics, and to set various analog resistance values ​​corresponding to the weight of the neural network. Therefore, it is possible to provide a semiconductor device for memory computing applications with little variation in the weights of analog resistance values ​​and excellent reliability. In addition, the second driving method allows the weights to be set and modified by the customer as shown in (c) of Fig. 13A after the chip is shipped in the state shown in (b) of Fig. 13A, and the weights of the network for various applications can be updated.

[0122] Next, a specific example of the second driving method will be described.

[0123] Fig. 13B is a flowchart showing a specific example of the second driving method shown in Fig. 13A. In the figure, N, i, and Wi are the same as in Fig. 10B. V0i indicates the stress of the electric pulse corresponding to the i-th resistance change element 19.

[0124] In the figure, first, the first stage of forming is executed. That is, an electrical pulse V0 common to all the resistance change elements 19 is applied as stress (S91). As a result, filament 14s shown in Fig. 13A(b) is formed in all the resistance change elements 19 as a seed or an initial form of the filament 14.

[0125] Next, in loop 1 (S92 to S95), the second stage of forming is executed. That is, N resistance change elements 19 are sequentially formed. In loop 1, first, an electrical pulse V0i corresponding to the weight Wi is determined as stress (S93). The electrical pulse V0i may be determined, for example, by reading a reference table as shown in Fig. 10C.

[0126] Furthermore, the determined electrical pulse V0i is applied as stress to the i-th resistance change element 19 (S94).

[0127] The stress in the forming process of Fig. 13B includes an electrical pulse V0 common to a plurality of resistance change elements 19 and an electrical pulse V0i not common to the plurality of resistance change elements 19. The electrical pulse V0i depends on the weight W of the neural network. Thus, in the second driving method, in the forming process, an electrical pulse V0 common to a plurality of resistance change elements 19 is applied, and further, an electrical pulse V0i is sequentially applied to the resistance change elements 19.

[0128] In Fig. 13A, the electrical stress uses the magnitude relationship of voltages (V01 < V02 < V03), but it may also be a method of changing the pulse width applied at a constant voltage or a mode of changing the electrical energy applied by limiting the current flowing when applying the voltage.

[0129] FIG. 14 is a diagram showing the analog resistance value for the additional forming current observed by the read current in the second driving method of the semiconductor device according to the first configuration example. Specifically, FIG. 14 shows the result of forming by controlling the current value instead of controlling the voltage value as the stress of the electric pulse. In FIG. 14, a uniform filament 14s is formed with a common forming current of 100 μA in the first stage (see FIG. 13A (b)). Furthermore, thereafter, in the second stage, filaments are formed by applying additional forming currents I of (a) 150 μA, (b) 180 μA, (c) 210 μA, and (d) 240 μA to the four resistance change elements 19 (see FIG. 13A (c)).

[0130] As can be seen from FIG. 14, the read current corresponding to the analog resistance value increases monotonically with respect to the additional forming current, and it is therefore possible to control the filament characteristics by the additional forming current.

[0131] FIG. 15 is a diagram showing the relationship between (a) the read current corresponding to the analog resistance value for the additional forming current and (b) its variation in the second driving method of the semiconductor device according to the first configuration example. In addition, there is no significant difference between the variation of the read current corresponding to the analog resistance value corresponding to the low resistance state created by passing 240 μA and the variation of the read current corresponding to the analog resistance value corresponding to the intermediate region created by passing 180 μA, and it can be seen that this is significantly improved compared to FIG. 3. Note that this characteristic does not change its tendency even if the forming current applied at the stage of FIG. 13A (b) is increased from 100 μA to 250 μA. Since the amount of change changes while maintaining the tendency, it can be seen that the forming current applied at the beginning can also be used as an adjustment parameter. [Industrial Applicability]

[0132] One aspect of the present disclosure is useful for a semiconductor device that utilizes a resistance change element for memory computing. [Explanation of symbols]

[0133] 10. Semiconductor Substrate 11 First electrode 12 Resistive layer 12a First variable resistance layer (first resistance layer) 12b Second variable resistance layer (second resistance layer) 12c Third variable resistance layer 13 Second electrode 14, 14a, 14b, 14c, 14d, 14e, 14f, 14s filaments 15 Oxygen vacancies 16 Oxygen ion 17 Word Line 18 bit lines 19 Resistive change element 21 Input Layer 22 Computational Processing Layer 23 Output layer 24 Input Nodes 25 Output Nodes 101 First resistance change element 102 Second resistance change element 103 Third Resistance Change Element 104 Fourth Resistance Change Element 105 Fifth Resistance Change Element 106 The sixth resistive change element

Claims

1. A plurality of variable resistance elements are provided on a semiconductor substrate; The resistance change element has a first electrode, a second electrode, and a resistance change layer sandwiched between the first electrode and the second electrode and storing a continuously variable resistance value; the resistance change layer has filaments with different shapes corresponding to the weights of the neural network, and stores a variable resistance value as an analog continuous value; The area of ​​the filament in a plan view of the semiconductor substrate varies depending on the weight of the neural network. Semiconductor device.

2. The length of the filament in the direction in which the first electrode and the second electrode face each other varies depending on the weight of the neural network. The semiconductor device according to claim 1 .

3. The resistance change layer is A first resistive layer; a second resistive layer having a higher resistance than the first resistive layer and including the filament; The semiconductor device according to claim 1 .

4. the first electrode is formed on the semiconductor substrate; The resistance change layer has a resistance value that increases continuously or stepwise from the second electrode to the first electrode. The semiconductor device according to claim 2 .

5. The resistance change layer changes its resistance value by increasing or decreasing oxygen defects due to the movement of oxygen caused by the application of an electric pulse.

5. The semiconductor device according to claim 1.

6. The resistance change layer includes a transition metal oxide. The semiconductor device according to claim 5 .

7. A semiconductor device comprising: a plurality of resistance change elements on a semiconductor substrate; The resistance change element has a first electrode, a second electrode, and a resistance change layer sandwiched between the first electrode and the second electrode and storing a continuously variable resistance value; the resistance change layer has filaments with different shapes corresponding to the weights of the neural network, and stores a variable resistance value as an analog continuous value; The resistance change layer changes its resistance value by increasing or decreasing oxygen defects due to the movement of oxygen caused by the application of an electric pulse, the filament has a current path through which a current flows via a plurality of oxygen defects, The filament has a plurality of redundant current paths connecting the end of the filament on the first electrode side and the end of the filament on the second electrode side. Semiconductor device.

8. The oxygen defect density of the filament does not depend on the weights of the neural network. The semiconductor device according to claim 7.

9. The resistance change layer changes in resistance as metal ions move due to application of an electric pulse.

6. The semiconductor device according to claim 1,

10. The resistance value of at least half of the plurality of variable resistance elements is greater than a median of analog-like continuous values ​​that the resistance value can take.

10. The semiconductor device according to claim 1.

11. The resistance values ​​of at least half of the plurality of variable resistance elements are smaller than the median of analog-like continuous values ​​that the resistance value can take.

10. The semiconductor device according to claim 1.

12. A method for driving a semiconductor device including a plurality of variable resistance elements on a semiconductor substrate, comprising the steps of: The resistance change element includes a plurality of resistance change elements including a first electrode, a second electrode, and a resistance change layer sandwiched between the first electrode and the second electrode and storing a resistance value that changes continuously; In the method for driving a semiconductor device, determining electrical pulse stresses corresponding to the weights of the neural network; In a forming step of forming a filament in the resistance change layer, a determined electric pulse is applied as a stress to the resistance change layer, thereby forming a filament of a different shape corresponding to the weight. A method for driving a semiconductor device.

13. At least one of a voltage value, a current value, and an application time of the electrical pulse varies depending on the weight of the neural network. A method for driving a semiconductor device according to claim 12.

14. the stress of the electric pulse includes a first electric pulse common to the plurality of resistance change elements and a second electric pulse corresponding to the weight that is not common to the plurality of resistance change elements; In the forming step, the first electric pulse is applied to the resistance change layer, and the second electric pulse is further applied to the resistance change layer. A method for driving a semiconductor device according to claim 12.

15. The second electric pulse has at least one of a voltage value, a current value, and an application time that differs depending on the weight. A method for driving a semiconductor device according to claim 14.

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