Wireless communication device, data reception method and program
The wireless communication device employs symbol combining and multiple error detection codes to maintain communication quality and speed by adaptively selecting modulation methods, addressing the limitations of conventional adaptive modulation.
Patent Information
- Application Number
- JP2023111113
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2018-03-27
- Filing Date
- 2023-07-06
- Publication Date
- 2025-01-22
- Estimated Expiration
- 2039-03-26
AI Technical Summary
Existing wireless communication technologies face challenges in maintaining communication when line quality significantly deteriorates, as conventional adaptive modulation methods either fail to adapt effectively or result in decreased transmission speed when line quality is good.
A wireless communication device and method that combines received symbols, performs error correction, and uses multiple error detection codes to determine the appropriate modulation method, allowing for high-gain communication even in deteriorated conditions without affecting transmission speed when line quality is good.
Enables reliable communication even in severely degraded line quality conditions by symbol combining and error detection, ensuring consistent transmission speed across varying line qualities.
Smart Images

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Abstract
Description
[Technical field]
[0001] (Description of Related Applications) The present invention is based on the priority claim of Japanese Patent Application No. 2018-060462 (filed March 27, 2018), the entire contents of which are incorporated herein by reference. The present invention relates to a wireless communication device, a data receiving method, and a program. [Background technology]
[0002] In wireless communication, the likelihood of bit errors occurring varies greatly depending on the quality of the wireless propagation path. The quality of the wireless propagation path changes dynamically not only due to changes in the propagation path itself caused by changes in weather and surrounding structures, but also due to changes in the relative positions of the transmitting and receiving devices in mobile wireless communication.
[0003] Generally, there is a trade-off between transmission capacity and the likelihood of bit errors occurring. Using a modulation method that increases transmission capacity makes bit errors more likely to occur, and conversely, using a modulation method that makes bit errors less likely reduces transmission capacity.
[0004] Therefore, if the modulation method is fixed so that bit errors fall within a certain range when the line quality of the wireless propagation path deteriorates, the transmission capacity will be fixed low even when the line quality of the wireless propagation path is good, and the utilization efficiency of radio wave resources will decrease.
[0005] Therefore, in recent wireless communication devices, adaptive modulation has come to be used in which the line quality of the wireless propagation path is grasped, and when the line quality of the wireless propagation path is good, a modulation method with a large transmission capacity is used, and when the line quality of the wireless propagation path deteriorates, a modulation method with a small transmission capacity is used to reduce the bit error rate.
[0006] As an example of modulation scheme switching by adaptive modulation, a technique of switching between primary modulation schemes such as BPSK, QPSK, 16QAM, 64QAM, etc. Here, BPSK, QPSK, and QAM are abbreviations for Binary Phase Shift Keying, Quadrature Phase Shift Keying, and Quadrature Amplitude Modulation, respectively.
[0007] For example, in Fig. 5 of Patent Document 1, four primary modulation methods, BPSK, QPSK, 16QAM, and 64QAM, are switched depending on the line quality. When the line quality is poor, a primary modulation method with a low modulation degree, such as BPSK, is used to reduce bit errors.
[0008] Another commonly used method for switching modulation schemes using adaptive modulation is to change the coding rate in error correction. For example, in Patent Document 2, adaptive modulation is used to change not only the primary modulation scheme but also the coding rate in error correction.
[0009] Another high-gain modulation method is a method that uses direct spreading in combination. For example, the background art section of Patent Document 3 describes that a processing gain can be obtained in a code division multiplexing transmission method that includes direct spreading. However, by performing direct spreading, the number of symbols to be transmitted increases. For example, to obtain a gain of 3 dB, the number of symbols needs to be doubled, and to obtain a gain of 6 dB, the number of symbols needs to be four times, resulting in a decrease in transmission speed.
[0010] Another high-gain modulation method is a method of repeatedly transmitting the same data and averaging it to obtain a high gain. For example, Patent Document 10 describes a method of repeatedly transmitting the same data and averaging it in an averaging processing circuit to obtain a high gain. In this case, too, the transmission speed decreases as the number of averaging times increases, as in the case above.
[0011] Incidentally, in adaptive modulation, the modulation method of radio waves changes dynamically, so that the radio communication device on the receiving side needs to know the modulation method of the radio waves transmitted by the radio communication device on the transmitting side.
[0012] A common method for a receiving wireless communication device to know the modulation method is to communicate using a format that contains a control signal with a fixed modulation method and a main signal with a variable modulation method. In this method, a control signal with a fixed modulation method is used to notify the receiving wireless device of the modulation method of the main signal with a variable modulation method.
[0013] Normally, in a method in which the modulation method is notified using a control signal, if there is a bit error in the control signal, the main signal will also all be in error, so the control signal is modulated using a modulation method and coding rate with a low error rate.
[0014] For example, Patent Document 4 describes a method in which a transmitting and receiving wireless communication device holds what is called an MCS table, which contains information on the modulation method and the like, and notifies the receiving wireless communication device of the modulation method used by the transmitting wireless communication device and the index number of the MCS table using PDCCH, which is a control signal with a fixed modulation method.
[0015] Another method for identifying modulation methods is to use blind modulation. Blind modulation tries possible modulation methods in order, and uses error detection means such as CRC to detect whether demodulation was successful, and determines that the modulation method for which no errors are detected is the correct one. Here, CRC stands for Cyclic Redundancy Check.
[0016] For example, Fig. 7 of Patent Document 5 shows a method of demodulating using a possible modulation method in an interpretation device 22, correcting errors using an FEC decoder 23, detecting errors using a CRC detector 24, and repeating these processes until no errors are detected. Patent Document 9 also shows a method of switching between either 64QAM or 16QAM as a primary modulation method according to the line quality, and selecting the correct primary modulation method according to the CRC detection result. [Prior art documents] [Patent documents]
[0017] [Patent Document 1] JP 2002-199033 A [Patent Document 2] Patent No. 5704160 [Patent Document 3] Patent No. 4783217 [Patent Document 4] International Publication No. 2014 / 119413 [Patent Document 5] Patent No. 3665315 [Patent Document 6] Patent No. 3883562 [Patent Document 7] JP 2002-27537 A [Patent Document 8] International Publication No. 2015 / 145592 [Patent Document 9] JP 2009-33315 A [Patent Document 10] Japanese Patent Application Publication No. 1-181250 Summary of the Invention [Problem to be solved by the invention]
[0018] The following analysis is given by the present invention. The above adaptive modulation method has a problem that communication becomes impossible when the line quality is significantly deteriorated. For example, in a method of notifying a modulation method using a control signal with a fixed modulation method as shown in Patent Document 4, a primary modulation method with a low modulation degree such as BPSK or QPSK, or an error correction method with a low coding rate such as a coding rate of 1 / 3 is used as the modulation method of the control signal. However, when the line quality deteriorates to the extent that bit errors do not fall within a specified range even when such a modulation method is used, communication becomes impossible.
[0019] In this case, it is possible to keep the bit error of the control signal within a specified range by constantly increasing the gain of the control signal using a modulation method such as direct sequence as described in Patent Document 3, or a modulation method that repeatedly transmits the control signal as described in Patent Document 10. However, constantly increasing the gain of the control signal significantly increases the number of symbols required for the control signal, resulting in a problem of a decrease in the transmission speed even when the line quality is good.
[0020] In addition, in the method using blind modulation as described in Patent Document 5, the main signal is demodulated in sequence while switching between modulation methods, and an error detection means such as CRC is used to detect errors for each modulation method, which causes a problem of a large amount of processing.In addition, when demodulation is performed using a modulation method other than the one used, there is a problem that an appropriate modulation method cannot be selected unless the modulation method reliably detects errors using an error detection means.
[0021] Furthermore, the method of performing thinning processing as described in Patent Document 9 is effective only between modulation methods with a high modulation depth using Gray code, such as 64QAM and 16QAM, and cannot be used in applications where the line quality deteriorates to the extent that bit errors do not fall within a specified range even when modulation methods such as BPSK and QPSK are used, as described above.
[0022] An object of the present invention is to provide a technology that contributes to enriching the methods of switching to a high-gain modulation method for a control signal, which enables communication even when line quality has significantly deteriorated, and does not affect the transmission speed when the line quality is good. [Means for solving the problem]
[0023] According to a first aspect, there is provided a wireless communication device including a symbol combining circuit that combines received symbols, a demodulation circuit that demodulates the received symbols before and after the combining, respectively, an error correction circuit that performs error correction on the demodulated received data, a detection circuit that detects a first error detection code from the error-corrected received data, a second detection circuit that detects a second error detection code obtained by inverting an arbitrary number of bits from the error-corrected received data, and a received data selection circuit that selects the received data, wherein the received data selection circuit determines the modulation scheme used at the time of transmission using detection results of the first and second error detection codes, and selects received data corresponding to the determined modulation scheme.
[0024] According to a second aspect, there is provided a data receiving method in a wireless communication device including a symbol combining circuit for combining received symbols, a demodulation circuit for demodulating the received symbols before and after the combining, an error correction circuit for performing error correction on the demodulated received data, a detection circuit for detecting a first error detection code from the error-corrected received data, a second detection circuit for detecting a second error detection code obtained by inverting any number of bits from the error-corrected received data, and a received data selection circuit for selecting the received data, the data receiving method determining a modulation scheme used at the time of transmission using detection results of the first and second error detection codes, and selecting received data corresponding to the determined modulation scheme. This method is associated with a specific wireless communication device including the above-mentioned circuits.
[0025] According to a third aspect, in a wireless communication device including a symbol combining circuit for combining received symbols, a demodulation circuit for demodulating the received symbols before and after the combining, an error correction circuit for performing error correction on the demodulated received data, a detection circuit for detecting a first error detection code from the error-corrected received data, a second detection circuit for detecting a second error detection code obtained by inverting any number of bits from the error-corrected received data, and a received data selection circuit for selecting the received data, there is provided a program for causing a computer mounted on the wireless communication device to execute a process of determining a modulation scheme used at the time of transmission using detection results of the first and second error detection codes, and a process of selecting received data corresponding to the determined modulation scheme. Note that this program can be recorded on a computer-readable (non-transitive) storage medium. That is, the present invention can also be embodied as a computer program product. Also, this program can be input to the computer device via an input device or an external communication interface, stored in a storage device, and can drive a processor according to a predetermined step or process. Furthermore, this program can display the processing results, including intermediate states, at each stage as necessary via a display device, or can communicate with the outside via a communication interface. A computer device for this purpose typically includes a processor, a storage device, an input device, a communication interface, and a display device as necessary, which are connectable to each other via a bus, as an example. Effect of the Invention
[0026] According to the present invention, it is possible to provide a method for switching to a high gain modulation method for a control signal, which enables communication even when the line quality is significantly deteriorated, and does not affect the transmission speed when the line quality is good. That is, the present invention converts the wireless communication device described in the Background Art into one that can select received data according to the line quality. [Brief description of the drawings]
[0027] [Figure 1]2 is a block diagram showing a flow of signals between wireless devices according to the first embodiment of the present invention. FIG. [Diagram 2] FIG. 2 is a diagram showing a slot configuration of received data in the first embodiment of the present invention. [Diagram 3] FIG. 1 is a diagram showing the relationship between the required SNR and the transmission rate to achieve a bit error rate of 10-4 or less in a typical modulation method. [Figure 4] FIG. 2 is a diagram showing a flow of coding and modulation processing of a control signal and a main signal under normal circumstances in the first embodiment of the present invention. [Diagram 5] FIG. 2 is a diagram showing a flow of coding and modulation processing of a control signal and a main signal when the line quality of a wireless line is significantly deteriorated in the first embodiment of the present invention. [Figure 6] FIG. 11 is a process flow diagram of demodulation and decoding of control signals and main signals when switching in two stages between normal times and when line quality is deteriorated in the first embodiment of the present invention. [Figure 7] FIG. 11 is a process flow diagram of demodulation and decoding of control signals and main signals when switching between three stages: normal, line quality degradation, and further line quality degradation, in the first embodiment of the present invention. [Figure 8] FIG. 13 is a diagram showing the reception gain when two symbol strings that are repeatedly transmitted are symbol-combined, and when four symbol strings that are repeatedly transmitted are symbol-combined. [Figure 9] FIG. 4 is a diagram illustrating a method for generating a bit-inversion error detection code (inverted CRC) for a control signal bit string in the first embodiment of the present invention. [Figure 10] FIG. 2 is a diagram illustrating an example of the configuration of a modulation circuit according to a first embodiment of the present invention. [Figure 11] 1 is a diagram illustrating an example of the configuration of a demodulation circuit according to a first embodiment of the present invention. [Figure 12] FIG. 2 is a diagram illustrating an example of the configuration of a control signal modulation unit according to the first embodiment of the present invention. [Figure 13] FIG. 2 is a diagram illustrating an example of the configuration of a main signal modulation unit according to the first embodiment of the present invention. [Figure 14] FIG. 2 is a diagram illustrating an example of the configuration of a control signal demodulation unit according to the first embodiment of the present invention. [Figure 15] FIG. 4 is a diagram illustrating a modified configuration example of a control signal demodulation unit of the first embodiment of the present invention. [Figure 16] FIG. 2 is a diagram illustrating an example of the configuration of a main signal demodulation unit according to the first embodiment of the present invention. [Figure 17] 1 is a diagram illustrating an example of the configuration of a bit-inversion CRC check circuit according to a first embodiment of the present invention; [Figure 18] FIG. 4 is a diagram illustrating another example of the configuration of the bit inversion CRC check circuit according to the first embodiment of the present invention. [Figure 19] FIG. 11 is a diagram illustrating an example of mapping of a symbol sequence to an OFDM symbol, as an explanation of a second embodiment of the present invention. [Figure 20] FIG. 11 is a diagram illustrating an example of a symbol synthesis process on a subcarrier basis. [Figure 21] FIG. 11 is a diagram illustrating an example of a symbol synthesis process for each OFDM symbol. [Figure 22] FIG. 13 is a diagram illustrating an example of repeated transmission in units of OFDM symbols. [Figure 23] FIG. 11 is a diagram illustrating an example of repeated transmission of a reference signal repetition unit. [Figure 24] FIG. 1 is a diagram showing a configuration of an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0028] First, an overview of one embodiment of the present invention will be described with reference to the drawings. Note that the reference numerals in the drawings are added to each element for convenience as an example to aid in understanding, and are not intended to limit the present invention to the illustrated embodiment. Also, the connection lines between blocks in the drawings and the like referred to in the following description include both bidirectional and unidirectional. The unidirectional arrows are intended to show the flow of the main signal (data) and do not exclude bidirectionality. Also, although there are ports or interfaces at the connection points of the input and output of each block in the drawings, they are not shown. Also, the program is executed via a computer device, and the computer device includes, for example, a processor, a storage device, an input device, a communication interface, and a display device as necessary. Also, the computer device is configured to be able to communicate with devices (including computers) inside or outside the device via the communication interface, regardless of whether it is wired or wireless.
[0029] In one embodiment, the present invention can be realized in a configuration including a symbol combining circuit 1404, demodulation circuits 1401 and 1405, error correction circuits 1402 and 1406, a detection circuit 1403a, a second detection circuit 1407a, and a received data selection circuit 1408, as shown in FIG. 24.
[0030] Specifically, the symbol combining circuit 1404 combines the received symbols. The demodulation circuits 1401 and 1405 demodulate the received symbols before and after the combination, respectively. The error correction circuits 1402 and 1406 perform error correction on the demodulated received data output from the demodulation circuits 1401 and 1405, respectively. The detection circuit 1403a detects a first error detection code from the error-corrected received data. The second detection circuit 1407a detects a second error detection code obtained by inverting any number of bits from the error-corrected received data. Then, the received data selection circuit 1408 uses the detection results of the first and second error detection codes to determine the modulation method used at the time of transmission, and selects the received data corresponding to the determined modulation method.
[0031] The above configuration enables communication even when the line quality is significantly deteriorated, and enables switching to a high-gain modulation method for the control signal without affecting the transmission speed when the line quality is good. This is because the received data selection circuit 1408 is configured to determine whether the line quality has deteriorated and select the received data according to the detection results of the first and second error detection codes.
[0032] [First embodiment] Next, a first embodiment of the present invention will be described in detail with reference to the drawings. Fig. 1 shows a signal flow between wireless communication devices when adaptive modulation is used in the first embodiment of the present invention.
[0033] First, in the transmitting wireless device, the channel quality estimation circuit 101 estimates the channel quality of the wireless channel and determines a modulation method according to the estimation result. Next, the modulation circuit 102 encodes and modulates the transmission data using the modulation method determined by the channel quality estimation circuit 101 to generate a transmission symbol.
[0034] The generated transmission symbols are converted into RF signals by frequency conversion circuit 103 and transmitted through a transmission antenna.
[0035] The transmitted RF signal travels through a radio propagation path to reach the receiving radio device, passes through the receiving antenna, and is frequency-converted by frequency conversion circuit 104 to become a received symbol.
[0036] A modulation scheme decision circuit 105 decides the modulation scheme using the received symbols, and a demodulation circuit 106 demodulates and decodes the received symbols using that modulation scheme to generate received data.
[0037] 2 shows the slot structure of received data in this embodiment. The control signal stores data indicating the modulation method of the main signal. The receiving wireless communication device first demodulates the received symbol of the control signal to obtain the modulation method of the main signal, thereby making it possible to demodulate the main signal, which follows the control signal and has a variable modulation method.
[0038] Figure 3 shows the bit error rate (BER) of 10 for a typical modulation method. -4 This shows the relationship between the required SNR and transmission speed to achieve the following. Generally, the higher the transmission speed of a modulation method, the higher the required SNR. Bit error rate 10 -4 That is, 1 × 10 -4 , that is, it indicates a state in which there is one bit error for every 10,000 bits.
[0039] For example, in a line where the SNR of the radio line is higher than the required SNR of BPSK and lower than the required SNR of QPSK, the bit error rate can be reduced by using BPSK as the modulation method for the main signal. -4 Similarly, in a line where the SNR of the radio line is higher than the required SNR of QPSK and lower than the required SNR of 16QAM, a bit error rate of 10 can be achieved by using QPSK as the modulation method for the main signal. -4 The following is achieved: In this way, the modulation method of the main signal is switched according to the signal-to-noise ratio of the wireless line.
[0040] Since the control signal contains data indicating the modulation method of the main signal, a primary modulation method with a low required signal-to-noise ratio, such as BPSK, is usually used.
[0041] However, when the line quality of the wireless line deteriorates significantly and the signal-to-noise ratio of the wireless line falls below the required signal-to-noise ratio for BPSK, bit errors in the control signal occur frequently, making it difficult to demodulate the received symbols.
[0042] In this embodiment, when the line quality of the wireless line is significantly deteriorated, the control signal and the main signal are repeatedly transmitted, and the symbols of the repeatedly transmitted control signal and main signal are averaged (symbol combined) on the receiving side to improve the gain and enable demodulation.
[0043] The flow of normal control signal and main signal coding and modulation processing is shown in Fig. 4. First, the modulation circuit 102 on the transmitting side adds an error detection code (CRC) to the control signal bit string and multiple main signal bit strings (CRC addition in Fig. 4).
[0044] Next, the modulation circuit 102 on the transmitting side encodes the control signal bit string and the main signal bit string to which the error detection code has been added with an error correction code (error correction coding in FIG. 4).
[0045] Finally, the modulation circuit 102 on the transmitting side modulates the coded control signal bit string and main signal bit string to generate a control signal symbol string and a main signal symbol string (modulation in FIG. 4).
[0046] Parameters such as the modulation method of the main signal and the coding rate of the error correction code are stored in the control signal. The parameters such as the modulation method of the control signal and the coding rate of the error correction code are fixed (see Figure 2).
[0047] Figure 5 shows the flow of coding and modulation of control signals and main signals when the line quality of the wireless line is significantly deteriorated. In this example, the number of repetitions is two.
[0048] First, in the modulation circuit 102 on the transmitting side, an error detection code (CRC) is added to a plurality of main signal bit strings, and a code obtained by bit-inverting the error detection code (inverted CRC) is added to the control signal bit string (CRC addition in FIG. 5).
[0049] Next, the modulation circuit 102 on the transmitting side encodes the control signal bit string and main signal bit string to which the error detection code or the code obtained by bit-inverting the error detection code has been added, with an error correction code (error correction coding in FIG. 5).
[0050] Next, the encoded control signal and main signal are modulated by modulation circuit 102 on the transmitting side to generate a control signal symbol sequence and a main signal symbol sequence (modulation in FIG. 5).
[0051] Finally, the control signal symbol sequence and the main signal symbol sequence are copied and duplicated in the modulation circuit 102 on the transmitting side (copy of FIG. 5). Even in the case of FIG. 5, parameters such as the modulation method of the main signal and the coding rate of the error correction code are stored in the control signal. Similarly, parameters such as the modulation method of the control signal and the coding rate of the error correction code are fixed to the same values as those stored in the control signal under normal conditions.
[0052] The control signal and main signal can be repeated any number of times. The more the number of repetitions, the higher the gain.
[0053] 6 shows a process flow diagram of the demodulation and decoding process of the control signal and main signal in the modulation scheme decision circuit 105 and demodulation circuit 106 of the receiving wireless communication device. First, the receiving wireless communication device demodulates the first control signal symbol and generates a control signal bit string (step 1 in FIG. 6).
[0054] Next, the receiving wireless communication device performs error correction on the control signal bit string obtained by demodulation (step 2 in FIG. 6).
[0055] Next, the receiving wireless communication device checks the error detection code (CRC) of the control signal bit string after error correction (step 3 in FIG. 6). If the error detection codes match as a result of the check (OK in step 3 in FIG. 6), the receiving wireless communication device performs normal demodulation processing of the main signal. On the other hand, if the error detection codes do not match (NG in step 3 in FIG. 6), the receiving wireless communication device performs demodulation processing of the control signal when line quality is degraded (to the flow when line quality is degraded in FIG. 6).
[0056] In normal demodulation processing of a main signal, first, the receiving wireless communication device derives the modulation scheme of the main signal stored in the control signal bit string (step 4 in FIG. 6).
[0057] Next, the receiving wireless communication device demodulates the symbol sequence of the main signal using the derived modulation scheme (step 5 in FIG. 6).
[0058] Finally, the receiving wireless communication device performs error correction and error detection on the bit string of the demodulated main signal (step 6 in FIG. 6).
[0059] In demodulation processing of a control signal when line quality is degraded, first, the receiving wireless communication device combines symbols by averaging the symbol string of the repeatedly transmitted control signal (step 7 in FIG. 6).
[0060] Next, the receiving wireless communication device demodulates the symbol string of the symbol-combined control signal to generate a control signal bit string (step 8 in FIG. 6).
[0061] Next, the receiving wireless communication device performs error correction on the control signal bit string obtained by demodulation (step 9 in FIG. 6).
[0062] Next, the receiving wireless communication device checks the error detection code (CRC) of the control signal bit string after error correction (step 10 in FIG. 6). If the result of the check shows that the error detection code matches the bit-inverted code (OK in step 10 in FIG. 6), the receiving wireless communication device performs demodulation processing of the main signal when line quality is degraded. On the other hand, if the error detection codes do not match (NG in step 10 in FIG. 6), the receiving wireless communication device performs reception error processing.
[0063] In demodulation processing of the main signal when line quality is degraded, first, the receiving wireless communication device derives the modulation method of the main signal stored in the control signal bit string (step 11 in FIG. 6).
[0064] Next, the receiving wireless communication device combines symbols of the repeatedly transmitted symbol sequence of the main signal (step 12 in FIG. 6).
[0065] Next, the receiving wireless communication device demodulates the symbol sequence of the symbol-combined main signal using the derived modulation scheme (step 13 in FIG. 6).
[0066] Finally, the receiving wireless communication device performs error correction and error detection on the bit string of the demodulated main signal (step 14 in FIG. 6).
[0067] It should be noted that the switching of the symbol combining method for the control signal symbol string can be done not only in two stages, normal and line quality degradation, but also in more stages. As an example, Fig. 7 shows a process flow diagram of the demodulation and decoding process of the control signal and main signal when switching in three stages, normal, line quality degradation, and further line quality degradation. The main difference from the flow shown in Fig. 6 is that when the error detection codes do not match in step 10, instead of immediately determining that there is a reception error, the flow transitions to step 15, where symbol combining 2 is performed again with an increased number of symbols to be combined, to attempt to check the control signal bit string.
[0068] In this way, in the example of Figure 7, in addition to the two-stage switching described above, the number of repetitions of the control signal symbol sequence to be symbol-combined is increased, making it possible to obtain a high receiving gain even when the line quality deteriorates further.
[0069] In the example of FIG. 7, it is preferable to set the bit inversion positions of the bit-inversion error detection code to different positions in order to distinguish between a case where the line quality has deteriorated and a case where the line quality has further deteriorated.
[0070] FIG. 8 shows the reception gain when two repeatedly transmitted symbol sequences are symbol combined (2x combining) and when four repeatedly transmitted symbol sequences are symbol combined (4x combining).
[0071] In this graph, the horizontal axis shows the signal-to-noise ratio, and the vertical axis shows the bit error rate. When two symbol strings are symbol-combined, a gain of approximately 3 dB is obtained, and when four symbol strings are symbol-combined, a gain of approximately 6 dB is obtained. Therefore, even in cases where a reception error occurs due to line quality degradation in the flow of Figure 6, correct reception may be possible with the flow of Figure 7.
[0072] 9 shows a method for generating a bit inversion error detection code (inversion CRC) for the control signal bit string in the above description. First, the modulation circuit 102 on the transmitting side calculates an error detection code (CRC) for the control signal bit string.
[0073] Next, the modulation circuit 102 inverts all or some of the bits of the error detection code (CRC) to generate a bit-inverted error detection code (inverted CRC).
[0074] In order to prevent erroneous judgment of the demodulation method during demodulation between normal and degraded line quality, it is better to invert as many bits as possible. For example, when the number of bits of the error detection code is 24 bits and you want to distinguish between normal and degraded line quality, if you invert all 24 bits, the Hamming distance during error detection code inspection will be the largest, and the probability of misjudgment will be the smallest.
[0075] In general, if the number of bits in the error detection code is C and the type of modulation method to be judged is K, then by inverting 2C / K bits, it is possible to maximize the Hamming distance between each stage and minimize the probability of misjudgment.
[0076] For example, when the number of bits of the error detection code is 24 bits and three stages of normal, line quality degradation, and further line quality degradation are to be distinguished, it is as follows. First, 16 bits are inverted when line quality is degraded, and when line quality is further degraded, a total of 16 bits are inverted: 8 bits that are inverted when line quality is degraded and 8 bits that are not inverted. In this way, the Hamming distances between the three stages of normal and line quality degraded, line quality degraded and further line quality degraded, and line quality degraded and further line quality degraded are all 16 bits, and the probability of erroneous judgment is minimized.
[0077] Next, a configuration example of the modulation circuit 102 and demodulation circuit 106 of the wireless communication device will be described. Fig. 10 shows a configuration example of the modulation circuit 102. The modulation circuit 102 shown in Fig. 10 includes a control signal generation circuit 1001, a control signal modulation unit 1002, a main signal modulation unit 1003, and a transmission symbol sequence combination circuit 1004. A modulation method (information) generated by an external line quality estimation circuit (reference numeral 101 in Fig. 1) is input to the control signal generation circuit 1001. The control signal generation circuit 1001 stores the modulation method information in a control signal and generates a control signal bit sequence. The control signal bit sequence generated by the control signal generation circuit 1001 is modulated by the control signal modulation unit 1002 to generate a control signal symbol sequence. At the same time, the main signal bit sequence is modulated by the main signal modulation unit 1003 to generate a main signal symbol sequence.
[0078] The control signal symbol sequence and the main signal symbol sequence are combined in a transmission symbol sequence combining circuit 1004 to generate a transmission symbol sequence.
[0079] Fig. 11 shows an example of the configuration of a circuit functioning as the modulation scheme decision circuit 105 and the demodulation circuit 106. The circuit shown in Fig. 11 includes a received symbol sequence selection circuit 1101, a control signal demodulation unit 1102, a main signal modulation scheme decision circuit 1103, and a main signal demodulation unit 1104. A control signal symbol sequence is selected from a received symbol sequence by the received symbol sequence selection circuit 1101. The control signal symbol sequence is demodulated and decoded by the control signal demodulation unit 1102 to generate a control signal bit sequence.
[0080] Next, the main signal modulation method decision circuit 1103 extracts the main signal modulation method information stored in the control signal bit string.
[0081] The primary signal modulation method information obtained by the primary signal modulation method decision circuit 1103 is transferred to a received symbol sequence selection circuit 1101. The received symbol sequence selection circuit 1101 selects a primary signal symbol sequence from the received symbol sequence based on the primary signal modulation method information.
[0082] Finally, the primary signal demodulation section 1104 demodulates and decodes the primary signal using the selected primary signal symbol sequence and the extracted primary signal modulation method information, generating a primary signal bit sequence.
[0083] Next, a detailed configuration of the main elements shown in Figures 10 and 11 will be described. Figure 12 shows a configuration example of the control signal modulation unit 1002. The control signal modulation unit 1002 includes a bit inversion CRC generation circuit 1201, an error correction code generation circuit 1202, a modulation circuit 1203, and a symbol copy circuit 1204.
[0084] The bit-inverted CRC generating circuit 1201 adds a CRC or a bit-inverted CRC to the control signal bit string based on the modulation method information. When the control signal modulation method is a modulation method for normal operation, a CRC is added, and when the control signal modulation method is a modulation method for line quality degradation, a bit-inverted CRC is added.
[0085] Next, the control signal bit string with the CRC or bit-inverted CRC added is error-correcting coded by error-correcting code generation circuit 1202 and modulated by modulation circuit 1203 to generate a control signal symbol string.
[0086] When the control signal modulation method is a modulation method for normal times, the signal is output as is. When the control signal modulation method is a modulation method for when line quality is deteriorated, the control signal symbol sequence is copied by the symbol copy circuit 1204, and multiple control signal symbol sequences are output.
[0087] 13 shows an example of the configuration of the main signal modulation unit 1003. The main signal modulation unit 1003 includes a CRC generation circuit 1301, an error correction code generation circuit 1302, a modulation circuit 1303, and a symbol copy circuit 1304.
[0088] A CRC generation circuit 1301 adds a CRC to the main signal bit string. The main signal bit string with the CRC added is error-correction coded by an error-correction code generation circuit 1302 and modulated by a modulation circuit 1303. Here, when a modulation method for when line quality is deteriorated is used, the main signal symbol string is copied by a symbol copy circuit 1304.
[0089] The error correction coding rate and modulation method in the error correction code generation circuit 1302 and modulation circuit 1303 are switched according to main signal modulation method information given to the main signal modulation section 1003 .
[0090] 14 shows an example of the configuration of the control signal demodulation unit 1102. The control signal demodulation unit 1102 includes demodulation circuits 1401 and 1405, error correction circuits 1402 and 1406, a CRC check circuit 1403, a symbol combining circuit 1404, a bit inversion CRC check circuit 1407, and a received data selection circuit 1408.
[0091] The control signal symbol string input to the control signal demodulation section 1102 is demodulated by the demodulation circuit 1401. Next, error correction is performed by the error correction circuit 1402, and bit errors are detected by the CRC check circuit 1403. If no bit errors are detected by the CRC check circuit 1403, the error-corrected control signal bit string is output as the control signal bit string from the received data selection circuit 1408. The above flow corresponds to steps 1 to 3 in FIG. 6.
[0092] If a bit error is detected by CRC check circuit 1403, a symbol combining circuit 1404 combines a plurality of transmitted control signal symbol strings. The combined control signal symbol string is demodulated by demodulation circuit 1405, and error correction is performed by error correction circuit 1406. Next, an error detection code (CRC) is checked by bit inversion CRC check circuit 1407, and if the error detection code matches the bit-inverted code, the control signal bit string after symbol combining, demodulation, and error correction is output from received data selection circuit 1408 as a control signal bit string. The above flow corresponds to steps 7 to 10 in FIG. 6.
[0093] Fig. 15 shows another example of the configuration of the control signal demodulation unit 1102. In this example, it is possible to implement the flow described in Fig. 7, which switches between three modulation modes in total, two for normal operation and two for line quality degradation.
[0094] First, the input control signal symbol string is demodulated by demodulation circuit 1501, error correction is performed by error correction circuit 1502, and bit errors are detected by CRC check circuit 1503. If no bit errors are detected by CRC check circuit 1503, the error-corrected control signal bit string is output as a control signal bit string from received data selection circuit 1512. The above flow corresponds to steps 1 to 3 in FIG.
[0095] If a bit error is detected by CRC check circuit 1503, double symbol combining circuit 1504 performs symbol combining of the control signal symbol string transmitted twice. The control signal symbol string combined by double symbol combining circuit 1504 is demodulated by demodulation circuit 1505, error correction is performed by error correction circuit 1506, and an error detection code (CRC) is checked by bit inversion CRC check circuit 1507 for double symbol combining. If no error is detected as a result of the check, the control signal bit string after double symbol combining, demodulation, and error correction is output from received data selection circuit 1512 as a control signal bit string. The above flow corresponds to steps 7 to 10 in FIG. 7.
[0096] When an error is detected by bit inversion CRC check circuit 1507 for double symbol combination, quadruple symbol combination circuit 1508 performs symbol combination of the control signal symbol string transmitted four times. The control signal symbol string combined by quadruple symbol combination circuit 1508 is demodulated by demodulation circuit 1509, error correction is performed by error correction circuit 1510, and error detection code (CRC) check is performed by bit inversion CRC check circuit 1511 for quadruple symbol combination. When no error is detected as a result of the check, the control signal bit string after quadruple symbol combination, demodulation, and error correction is output from received data selection circuit 1512 as a control signal bit string. The above flow corresponds to steps 15 to 18 in FIG. 7.
[0097] 16 shows an example of the configuration of the main signal demodulation unit 1104. The main signal demodulation unit 1104 includes a symbol combining circuit 1601, a demodulation circuit 1602, an error correction circuit 1603, and a CRC check circuit 1604. First, the main signal symbol string is subjected to symbol combining processing in the symbol combining circuit 1601.
[0098] Here, in the symbol combining circuit 1601, when it is instructed that a plurality of primary signal symbol sequences are transmitted as the primary signal modulation method, the primary signal symbol sequence is symbol-combined, and otherwise the primary signal symbol sequence is output as is.
[0099] Next, demodulation processing is performed in demodulation circuit 1602, and error correction is performed in error correction circuit 1603. Finally, error checking is performed in CRC check circuit 1604, and if no error is detected, it is output as a main signal bit string. The above flow corresponds to steps 4 to 6 or steps 11 to 14 in Fig. 6. In the case of Fig. 7, the above flow is performed in steps 4 to 6, steps 11 to 14, or steps 19 to 22.
[0100] 17 shows an example of the configuration of a bit-inversion CRC check circuit (reference numeral 1407 in FIG. 14). The bit-inversion CRC check circuit in FIG.
[0101] First, an error detection code (CRC) of the control signal bit string is generated by a CRC generation circuit 1701. Next, the error detection code is bit-inverted by a bit inverter circuit 1702. When the control signal modulation method is normal, the error detection code is output as is by a CRC selection circuit 1703. On the other hand, when the control signal modulation method is in the state of line degradation, a bit-inverted error detection code is output.
[0102] Finally, the control signal bit string and the error detection code output from the CRC selection circuit 1703 are combined by the bit combining circuit 1704, and the control signal bit string with the CRC added is output.
[0103] Fig. 18 shows another example of the configuration of a bit-inversion CRC check circuit. The bit-inversion CRC check circuit in Fig. 18 includes a CRC generation circuit 1801, a bit-inversion value selection circuit 1802, an XOR circuit 1803, and a bit combining circuit 1804. In this example configuration, a control signal bit string with a total of three stages of CRC added is generated, two stages for normal operation and two stages for line quality degradation. Therefore, the bit-inversion CRC check circuit in Fig. 18 shows a configuration corresponding to the bit-inversion CRC check circuit 1507 for double symbol combining and the bit-inversion CRC check circuit 1511 for quadruple symbol combining in Fig. 15.
[0104] First, a 24-bit error detection code (CRC) of the control signal bit string is generated by a CRC generation circuit 1801. Next, according to the control signal modulation method, a bit inversion value selection circuit 1802 selects one of three types of bit inversion values: a bit inversion value 0x000000 (hexadecimal) for normal use, a bit inversion value 0x00FFFF for when line quality is degraded, and a bit inversion value 0xFFFF00 for when line quality is further degraded.
[0105] Next, an XOR circuit 1803 performs an XOR operation on the 24-bit CRC generated by the CRC generation circuit 1801 and the bit-inverted value selected by the bit-inverted value selection circuit 1802 to generate a bit-inverted CRC. Finally, a bit combining circuit 1804 combines the control signal bit string with the bit-inverted CRC to generate a control signal bit string after the CRC is added.
[0106] Here, three types of bit-inversion values are used: a bit-inversion value of 0x000000 (hexadecimal) for normal use, a bit-inversion value of 0x00FFFF for when line quality deteriorates, and a bit-inversion value of 0xFFFF00 for when line quality deteriorates further. This is because the Hamming distance between the bit-inversion values at each stage is maximized, thereby minimizing the probability of erroneous determination.
[0107] As described above, according to the first embodiment of the present invention, communication is possible even when the line quality is significantly deteriorated. This is because a configuration is adopted in which the transmitting side repeatedly transmits a control signal and a main signal, and the receiving side combines the control signal symbols to improve the gain. Also, according to the first embodiment of the present invention, there is no effect on the transmission speed when the line quality is good. This is because a configuration is adopted in which demodulation processing of the main signal under normal conditions is performed when the line quality is determined to be good by a CRC check of the bit string of the control signal.
[0108] In other words, the present invention can also be understood as a wireless communication device including a modulation scheme determination circuit 105 that combines a symbol sequence of a control signal included in received data and determines that the symbol sequence has been transmitted multiple times by detecting that an error detection code included in the symbol sequence has been bit-inverted, and a demodulation circuit 106 that demodulates the received data based on the determination result.
[0109] [Second embodiment] Next, a second embodiment of the present invention will be described, in which the OFDM (Orthogonal Frequency Division Multiplexing) method is applied to the secondary modulation. The OFDM method is a method for improving frequency utilization efficiency and reducing inter-symbol interference by mapping a symbol string to be transmitted onto subcarriers arranged in the frequency domain and generating and transmitting OFDM symbols by inverse Fourier transform.
[0110] FIG. 19 shows an example of a symbol string mapping method in the OFDM system. The vertical axis indicates the subcarrier number of the OFDM symbol, and the horizontal axis indicates the OFDM symbol number. Normally, in the OFDM system, a reference signal (Ref in the figure) is mapped in a pattern that combines a certain subcarrier number and an OFDM symbol number. The reference signal is used for demodulation and the like on the receiving side. Normally, the reference signal is mapped repeatedly at a certain cycle. In the example of FIG. 19, mapping is repeated in units of 6 OFDM symbols.
[0111] The symbol string is mapped to subcarriers other than the reference signal. In the example of Fig. 19, the symbol string is first mapped to the subcarrier with OFDM symbol number 0 and subcarrier number 1, then to the subcarrier with OFDM symbol number 1 and subcarrier number 1, then to the subcarrier with OFDM symbol number 0 and subcarrier number 2, and so on.
[0112] In the OFDM system, the signal is converted to a subcarrier signal by performing a Fourier transform on the receiving side, and then demodulated. Normally, symbol synthesis is performed by adding repeatedly transmitted subcarrier signals, but by repeatedly transmitting OFDM symbols, it becomes possible to perform symbol synthesis by synthesizing OFDM symbols before Fourier transform processing.
[0113] FIG. 20 shows the process flow when symbol combining is performed with subcarrier signals, and FIG. 21 shows the process flow when symbol combining is performed with OFDM signals.
[0114] 20, when symbol combining is performed using the subcarrier signals, each OFDM signal is converted into a subcarrier signal by Fourier transform circuits 2001 to 2004, and the subcarrier signals are symbol combined by symbol combining circuit 2005. The combined symbols are demodulated by demodulation circuit 2006, error correction is performed by error correction circuit 2007, and finally error detection is performed by CRC check circuit 2008.
[0115] 21, symbol combining is performed on the OFDM signal as is in a symbol combining circuit 2101. The OFDM signal is then converted to a subcarrier signal in a Fourier transform circuit 2102, demodulated in a demodulation circuit 2103, error correction is performed in an error correction circuit 2104, and finally error detection is performed in a CRC check circuit 2105.
[0116] When symbol combining is performed in this manner using OFDM signals, the amount of Fourier transform processing can be reduced, and therefore the amount of processing can be reduced.
[0117] FIG. 22 shows an example of continuous repeated transmission of a single OFDM symbol, and FIG. 23 shows an example of repeated transmission of an OFDM symbol in reference signal repetition units.
[0118] In both the example of FIG. 22 and the example of FIG. 23, repeated transmission is performed in units of OFDM symbols, so that it is possible to perform symbol combination in units of OFDM symbols.
[0119] As explained above, in the present invention, the receiving side performs demodulation, performs error correction, and judges whether the symbol is repeated by CRC check. For example, in the example of Fig. 22, the position of the reference signal changes when the OFDM symbol is not repeated and when it is repeated. Therefore, when the OFDM symbol is repeatedly transmitted, if the receiving side performs demodulation processing assuming that the OFDM symbol is not repeatedly transmitted, the demodulation cannot be performed correctly, and the probability of erroneous judgment increases in judging whether the symbol is repeatedly transmitted when the line quality is deteriorated.
[0120] In the example of FIG. 23, the position of the reference signal is the same whether the symbol is repeated or not, which has the advantage that the probability of erroneous determination when determining whether the symbol is being repeatedly transmitted does not increase.
[0121] As described above, the present invention can be applied to cases where the OFDM method is used for secondary modulation, and can achieve the same effects as those of the first embodiment.
[0122] It should be noted that each section (each circuit) of the wireless communication device shown in Figures 10 to 18, 20, 21, etc. does not necessarily need to be configured from hardware, and can also be realized by a computer program that causes a processor mounted on the wireless communication device to execute each of the above-mentioned processes using the hardware.
[0123] Although each embodiment of the present invention has been described above, the present invention is not limited to the above-mentioned embodiments, and further modifications, substitutions, and adjustments can be made without departing from the basic technical idea of the present invention. For example, the network configurations, element configurations, and message expression forms shown in the drawings are examples to help understand the present invention, and the present invention is not limited to the configurations shown in these drawings. In the following description, "A and / or B" is used to mean at least one of A and B.
[0124] The disclosures of the above patent documents are incorporated herein by reference. Within the framework of the entire disclosure of the present invention (including the scope of claims), modifications and adjustments of the embodiments and examples are possible based on the basic technical ideas. Furthermore, within the framework of the disclosure of the present invention, various combinations and selections of the various disclosed elements (including each element of each claim, each element of each embodiment or example, each element of each drawing, etc.) are possible. In other words, the present invention naturally includes various modifications and corrections that a person skilled in the art would be able to make in accordance with the entire disclosure including the scope of claims and the technical ideas. In particular, with regard to the numerical ranges described in this specification, any numerical value or subrange included in the range should be interpreted as being specifically described even if not otherwise specified. [Explanation of symbols]
[0125] 101 Line quality estimation circuit 102 Modulation circuit 103, 104 Frequency conversion circuit 105 Modulation method determination circuit 106 Demodulation Circuit 1001 Control signal generating circuit 1002 Control signal modulation section 1003 Main signal modulation section 1004 Transmission symbol sequence combining circuit 1101 Received symbol sequence selection circuit 1102 Control signal demodulation unit 1103 Main signal modulation method decision circuit 1104 Main signal demodulation section 1201 Bit inversion CRC generator 1202 Error Correcting Code Generation Circuit 1203 Modulation circuit 1204 Symbol Copy Circuit 1301 CRC generation circuit 1302 Error Correcting Code Generation Circuit 1303 Modulation circuit 1304 Symbol Copy Circuit 1401 Demodulation Circuit 1402 Error correction circuit 1403 CRC Check Circuit 1403a Detection circuit 1404 Symbol Combining Circuit 1405 Demodulation Circuit 1406 Error correction circuit 1407 Bit inversion CRC check circuit 1407a Second detection circuit 1408 Received data selection circuit 1501 Demodulation circuit 1502 Error correction circuit 1503 CRC Check Circuit 1504 2x symbol combiner circuit 1505 Demodulation Circuit 1506 Error correction circuit 1507 Bit-reversal CRC check circuit for double symbol synthesis 1508 4x symbol combiner circuit 1509 Demodulation Circuit 1510 Error correction circuit 1511 Bit-reversal CRC check circuit for 4x symbol synthesis 1512 Receive data selection circuit 1601 Symbol Combining Circuit 1602 Demodulation circuit 1603 Error correction circuit 1604 CRC Check Circuit 1701 CRC generation circuit 1702 Bit Inversion Circuit 1703 CRC selection circuit 1704 Bit Combining Circuit 1801 CRC generation circuit 1802 Bit inversion value selection circuit 1803 XOR circuit 1804 Bit Combining Circuit 2001~2004 Fourier transform circuit 2005 Symbol Combining Circuit 2006 Demodulation Circuit 2007 Error correction circuit 2008 CRC inspection circuit 2101 Symbol Combining Circuit 2102 Fourier transform circuit 2103 Demodulation Circuit 2104 Error correction circuit 2105 CRC Check Circuit
Claims
1. a line quality estimation circuit for estimating line quality of a wireless line and determining a modulation method in accordance with the estimation result; a modulation circuit that uses the modulation method to encode transmission data to generate a bit string and modulates the bit string to generate a transmission symbol; a frequency conversion circuit for converting the transmission symbols into an RF signal; Equipped with The modulation circuit includes: When the line quality of the wireless line deteriorates, a bit-inverted error detection code is added to the bit string of the control signal to indicate to the receiving side that the transmission symbol is transmitted multiple times, and an error detection code is added to the bit string of the main signal; encoding the added bit string with an error correcting code; generating a plurality of copies of the bit string encoded with the error correcting code; Wireless communication system.
2. a line quality estimation circuit for estimating line quality of a wireless line and determining a modulation method in accordance with the estimation result; a modulation circuit that uses the modulation method to encode transmission data to generate a bit string and modulates the bit string to generate a transmission symbol; Equipped with When the line quality of the wireless line deteriorates, the modulation circuit a bit-inverted error detection code is added to the bit string of the control signal to indicate to the receiving side that the transmission symbol is transmitted multiple times, and an error detection code is added to the bit string of the main signal; encoding the added bit string with an error correcting code; generating a plurality of copies of the bit string encoded with the error correcting code; Wireless communication device.
3. A frequency conversion circuit for frequency-converting the RF signal to a received symbol; a modulation scheme determination circuit for determining a modulation scheme using the received symbol; a demodulation circuit that demodulates the received symbols using the determined modulation scheme to generate received data; Equipped with 2. The wireless communication system according to claim 1, further comprising a wireless communication device in which the modulation scheme determination circuit combines the symbols of the control signal included in the received symbols and determines that the symbol has been transmitted multiple times by detecting that the error detection code included in the symbols has been bit-inverted.
4. A line quality estimation process for estimating line quality of a wireless line and determining a modulation method in accordance with the estimation result; a modulation process for encoding transmission data using the modulation method to generate a bit string, and modulating the bit string to generate a transmission symbol; a frequency conversion process for converting the transmission symbols into an RF signal; Including, When the line quality of the wireless line deteriorates, the modulation process a bit-inverted error detection code is added to the bit string of the control signal to indicate to the receiving side that the transmission symbol is transmitted multiple times, and an error detection code is added to the bit string of the main signal; encoding the added bit string with an error correcting code; generating a plurality of copies of the bit string encoded with the error correcting code; A wireless communication method.
5. A frequency conversion process for converting the RF signal into a received symbol; A modulation scheme determination process for determining a modulation scheme using the received symbol; a demodulation process for demodulating the received symbols using the determined modulation scheme to generate received data; Further comprising:
5. The wireless communication method according to claim 4, wherein the modulation scheme determination process determines that the symbol sequence has been transmitted multiple times by combining symbols of the control signal included in the received symbols and detecting that the error detection code included in the symbols has been bit-inverted.
6. A line quality estimation process for estimating line quality of a wireless line and determining a modulation method in accordance with the estimation result; a modulation process for encoding transmission data using the modulation method to generate a bit string, and modulating the bit string to generate a transmission symbol; A program for causing a computer to execute the following: When the line quality of the wireless line deteriorates, the modulation process a bit-inverted error detection code is added to the bit string of the control signal to indicate to the receiving side that the transmission symbol is transmitted multiple times, and an error detection code is added to the bit string of the main signal; encoding the added bit string with an error correcting code; generating a plurality of copies of the bit string encoded with the error correcting code; program.
7. A line quality estimation process for estimating line quality of a wireless line and determining a modulation method in accordance with the estimation result; a modulation process of encoding transmission data to generate a bit string using the modulation scheme determined in the channel quality estimation process, and modulating the bit string to generate a transmission symbol; A program for causing a computer to execute the following: The modulation process includes: when the modulation scheme determined in the line quality estimation process is a modulation scheme for normal operation, an error detection code is added to each of a bit string of a main signal and a bit string of a control signal, and the bit strings of the main signal and the control signal to which the error detection code has been added are encoded and modulated with an error correction code to generate transmission symbols of the control signal and the main signal; when the modulation scheme determined in the line quality estimation process is a modulation scheme for line quality degradation, a code obtained by bit-inverting the error detection code is added to the bit string of the control signal to indicate to a receiving side that a transmission symbol generated from the bit string of the main signal and the bit string of the control signal is transmitted a plurality of times, and the error detection code is added to the bit string of the main signal; a bit string of the control signal to which a code obtained by bit-inverting the error detection code has been added and a bit string of the main signal to which the error detection code has been added are encoded with an error correction code, and modulated to generate a transmission symbol of the control signal and a transmission symbol of the main signal, respectively, by copying the transmission symbol of the control signal and a transmission symbol of the main signal to generate a plurality of transmission symbols; program.
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