Chip-type electronic components

Abstract

To reduce a chip size of a chip type electronic component including a capacitor and an inductor.SOLUTION: A chip type electronic component 1 comprises: a capacitor C2 made up of a lower electrode pattern 36, an upper electrode pattern 52, and an insulating layer 22; an insulating layer 24 covering the capacitor C2; and an inductor pattern 96 provided on the insulating layer 24. The inductor pattern 96 has a section overlapping the capacitor C2 so that an auxiliary capacitor C4 may be added. As mentioned above, because the inductor pattern 96 is provided in a manner partially overlapping the capacitor C2, greater inductance can be obtained with a smaller chip size. Moreover, it also becomes possible to improve characteristics by the auxiliary inductance.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a chip-type electronic component, and more particularly to a chip-type electronic component including a capacitor and an inductor. [Background technology]

[0002] Patent Document 1 discloses a chip-type electronic component including a capacitor and an inductor. The chip-type electronic component described in Patent Document 1 adds auxiliary capacitance to the inductor pattern while suppressing the chip size by providing a capacitive electrode pattern with a narrow pattern width so as to overlap with the inductor pattern. The main capacitor is arranged between the terminal electrodes in a plan view. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2016-201517 A Summary of the Invention [Problem to be solved by the invention]

[0004] However, in the chip-type electronic component described in Patent Document 1, the upper part of the main capacitor is not effectively utilized, so in order to obtain sufficient inductance, it may be necessary to increase the chip size.

[0005] SUMMARY OF THE PRESENT EMBODIMENTS Accordingly, an object of the present invention is to reduce the chip size of chip-type electronic components including capacitors and inductors. [Means for solving the problem]

[0006] A chip-type electronic component according to the present invention comprises first and second terminal electrodes and first, second and third conductor layers, the first conductor layer including first and second connection patterns arranged at positions overlapping the first and second terminal electrodes, respectively, and a first lower electrode pattern located between the first connection pattern and the second connection pattern and connected to one of the first and second terminal electrodes, the second conductor layer including a first upper electrode pattern arranged at a position overlapping the first lower electrode pattern and connected to the other of the first and second terminal electrodes, the first lower electrode pattern and the first upper electrode pattern constituting a first capacitor, the third conductor layer including a first inductor pattern having one end connected to the first terminal electrode, the first inductor pattern including a first section overlapping with the first capacitor and a second section not overlapping with the first capacitor.

[0007] According to the present invention, since a part of the first inductor pattern overlaps with the first capacitor, a larger inductance can be obtained with a small chip size. Moreover, since an auxiliary capacitance is generated in the part of the first inductor pattern that overlaps with the first capacitor, it is possible to improve the characteristics.

[0008] The chip-type electronic component according to the present invention may further include third and fourth terminal electrodes, the first conductor layer further includes third and fourth connection patterns provided at positions overlapping the third and fourth terminal electrodes, respectively, and a second lower electrode pattern located between the third connection pattern and the fourth connection pattern and connected to one of the third and fourth terminal electrodes, the second conductor layer further includes a second upper electrode pattern provided at a position overlapping the second lower electrode pattern and connected to the other of the third and fourth terminal electrodes, the second lower electrode pattern and the second upper electrode pattern may form a second capacitor, the third conductor layer further includes a second inductor pattern having one end connected to the first terminal electrode, the other end of the first inductor pattern being connected to the third terminal electrode, and the other end of the second inductor pattern being connected to the fourth terminal electrode. This makes it possible to configure a splitter circuit in which one of the first and second terminal electrodes is an input terminal and the third and fourth terminal electrodes are a pair of output terminals.

[0009] In the present invention, a part of the second section of the first inductor pattern may be located between the first and third connection patterns or between the second and fourth connection patterns, which allows the third conductor layer to be used more effectively, thereby making it possible to further reduce the chip size.

[0010] In the present invention, the second inductor pattern may include a third section that overlaps with the second capacitor and a fourth section that does not overlap with the second capacitor. This allows the third conductor layer to be used more effectively, making it possible to further reduce the chip size. Moreover, the second inductor pattern generates an auxiliary capacitance in the portion that overlaps with the second capacitor, making it possible to improve the characteristics.

[0011] In the present invention, a part of the fourth section of the second inductor pattern may be located between the first and third connection patterns or between the second and fourth connection patterns, which allows the third conductor layer to be used more effectively, thereby making it possible to further reduce the chip size. Effect of the Invention

[0012] In this way, according to the present invention, it is possible to reduce the chip size of a chip-type electronic component including a capacitor and an inductor. [Brief description of the drawings]

[0013] [Figure 1] FIG. 1 is a schematic perspective view showing the appearance of a chip-type electronic component 1 according to one embodiment of the present invention. [Diagram 2] FIG. 2 is a schematic partial cross-sectional view of the chip-type electronic component 1. [Diagram 3] FIG. 3 is a plan view for explaining the pattern shape of the conductor layer M1. [Figure 4] FIG. 4 is a plan view for explaining the pattern shape of the resistor pattern R. As shown in FIG. [Diagram 5] FIG. 5 is a plan view for explaining the pattern shape of the insulating layer 22. As shown in FIG. [Figure 6] FIG. 6 is a plan view for explaining the pattern shape of the conductor layer MM. [Figure 7] FIG. 7 is a plan view illustrating the pattern shape of the insulating layer 23. As shown in FIG. [Figure 8] FIG. 8 is a plan view for explaining the pattern shape of the conductor layer M2. [Figure 9] FIG. 9 is a plan view illustrating the pattern shape of the insulating layer 24. As shown in FIG. [Figure 10] FIG. 10 is a plan view for explaining the pattern shape of the conductor layer M3. [Figure 11] FIG. 11 is a plan view for explaining the pattern shape of the insulating layer 25. As shown in FIG. [Figure 12]FIG. 12 is a plan view for explaining the pattern shape of the conductor layer M4. [Figure 13] FIG. 13 is a plan view illustrating the pattern shape of the insulating layer 26. As shown in FIG. [Figure 14] FIG. 14 is a plan view for explaining the pattern shape of the conductor layer M5. [Figure 15] FIG. 15 is an equivalent circuit diagram of the chip-type electronic component 1. [Figure 16] FIG. 16 is a graph showing the insertion loss of the chip-type electronic component 1. As shown in FIG. [Figure 17] FIG. 17 is a graph showing the return loss of the chip-type electronic component 1. As shown in FIG. [Figure 18] FIG. 18 is a graph showing the isolation of the chip-type electronic component 1. As shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0015] Fig. 1 is a schematic perspective view showing the appearance of a chip-type electronic component 1 according to one embodiment of the present invention, and Fig. 2 is a schematic partial cross-sectional view of the chip-type electronic component 1.

[0016] The chip-type electronic component 1 according to the present embodiment is a splitter that splits a high-frequency signal into two, and includes a main body 10 and terminal electrodes 11-14 formed on the surface of the main body 10, as shown in FIG. 1. The terminal electrodes 11-14 are arranged at the four corners of the surface of the main body 10. As shown in FIG. 2, the main body 10 includes a substrate 20, a planarization layer 21 that covers the surface of the substrate 20, and conductor layers M1, MM, M2, M3, M4, M5 made of Cu or the like provided on the planarization layer 21, insulating layers 22-26, and a resistor pattern R. The material of the substrate 20 may be any material that is chemically and thermally stable, generates little stress, and can maintain the smoothness of the surface. The material is not particularly limited, and may be silicon single crystal, alumina, sapphire, aluminum nitride, MgO single crystal, SrTiO3 single crystal, surface silicon oxide, glass, quartz, ferrite, or the like. The planarization layer 21 may be made of alumina, silicon oxide, or the like.

[0017] The conductor layer M1 is the conductor layer located at the bottom layer, and includes connection patterns 31 to 34, lower electrode patterns 35 and 36, and inductor patterns 37 and 38, as shown in FIG. 3. The connection patterns 31 to 34 are provided at positions overlapping the terminal electrodes 11 to 14, respectively. The lower electrode pattern 35 is disposed between the connection patterns 31 and 32, and is connected to the connection pattern 32. The lower electrode pattern 36 is disposed between the connection patterns 33 and 34, and is connected to the connection pattern 34. The inductor patterns 37 and 38 are both patterns wound about one turn, and one end of each is connected to the connection pattern 32. A part of the inductor pattern 37 meanders along the connection patterns 31 and 32 and the lower electrode pattern 35, and a part of the inductor pattern 38 meanders along the connection patterns 33 and 34 and the lower electrode pattern 36. The inductor pattern 37 includes a section located between the connection patterns 31 and 32, a section located between the connection patterns 31 and 33, and a section located between the connection patterns 32 and 34. Similarly, the inductor pattern 38 includes a section located between the connection patterns 33 and 34, a section located between the connection patterns 31 and 33, and a section located between the connection patterns 32 and 34.

[0018] A resistor pattern R is provided on the same layer as the conductor layer M1. As shown in FIG.

[0019] The conductor layer M1 is covered with an insulating layer 22. The insulating layer 22 is a thin film made of an inorganic insulating material such as silicon nitride, and constitutes a capacitive insulating film of the capacitor. As shown in Fig. 5, openings 41-48 are provided in the insulating layer 22. Of these, the openings 41-44 are provided at positions that expose the connection patterns 31-34, respectively, the openings 45 and 46 are provided at positions that expose the other ends of the inductor patterns 37 and 38, respectively, and the openings 47 and 48 are provided at positions that expose both ends of the resistor pattern R.

[0020] A conductor layer MM is provided on the insulating layer 22. As shown in Fig. 6, the conductor layer MM includes upper electrode patterns 51 and 52. The upper electrode patterns 51 and 52 are provided at positions overlapping with the lower electrode patterns 35 and 36, respectively. As a result, the lower electrode pattern 35, the upper electrode pattern 51, and the insulating layer 22 form a first capacitor, and the lower electrode pattern 36, the upper electrode pattern 52, and the insulating layer 22 form a second capacitor.

[0021] The conductor layer MM is covered with an insulating layer 23 made of a resin material such as polyimide. As shown in Fig. 7, openings 60-69 are provided in the insulating layer 23. Among these, the openings 61-64 are provided at positions where the connection patterns 31-34 are exposed through the openings 41-44, respectively, the openings 65 and 66 are provided at positions where the other ends of the inductor patterns 37 and 38 are exposed through the openings 45 and 46, respectively, the openings 60 and 67 are provided at positions where the upper electrode patterns 51 and 52 are exposed, respectively, and the openings 68 and 69 are provided at positions where both ends of the resistor pattern R are exposed through the openings 47 and 48, respectively.

[0022] A conductor layer M2 is provided on the insulating layer 23. As shown in FIG. 8, the conductor layer M2 includes connection patterns 70-76, 79 and inductor patterns 77, 78. The connection patterns 71-74 are provided at positions overlapping the terminal electrodes 11-14, respectively, and are connected to the connection patterns 31-34 through the openings 61-64 and the openings 41-44, respectively. The connection patterns 75, 76 are connected to the upper electrode patterns 51, 52 through the openings 60, 67, respectively. The connection patterns 70, 79 are connected to both ends of the resistor pattern R through the openings 68, 69 and the openings 47, 48, respectively. One end of the inductor patterns 77, 78 is connected to the other end of the inductor patterns 37, 38 through the openings 65, 66 and the openings 45, 46, respectively. Each of the inductor patterns 77, 78 is a pattern wound about one turn. A portion of inductor pattern 77 meanders along connection patterns 71, 72, and 75, and a portion of inductor pattern 78 meanders along connection patterns 70, 73, 74, and 79. Inductor pattern 77 includes a section located between connection patterns 71 and 72, a section located between connection patterns 71 and 73, and a section located between connection patterns 72 and 74. Similarly, inductor pattern 78 includes a section located between connection patterns 73 and 74, a section located between connection patterns 71 and 73, and a section located between connection patterns 72 and 74.

[0023] The conductor layer M2 is covered with an insulating layer 24 made of a resin material such as polyimide. As shown in Fig. 9, openings 81-86 are provided in the insulating layer 24. Of these, the openings 81-84 are provided at positions that expose the connection patterns 71-74, respectively, and the openings 85 and 86 are provided at positions that expose the other ends of the inductor patterns 77 and 78, respectively.

[0024] A conductor layer M3 is provided on the insulating layer 24. As shown in FIG. 10, the conductor layer M3 includes connection patterns 91-94 and inductor patterns 95, 96. The connection patterns 91-94 are provided at positions overlapping the terminal electrodes 11-14, respectively, and are connected to the connection patterns 71-74 through the openings 81-84, respectively. One end of the inductor patterns 95, 96 is connected to the other end of the inductor patterns 77, 78 through the openings 85, 86, respectively. Each of the inductor patterns 95, 96 is a pattern wound about 1.5 turns. A part of the inductor pattern 95 meanders along the connection patterns 91, 92, and a part of the inductor pattern 96 meanders along the connection patterns 93, 94. The inductor pattern 95 includes a section located between the connection patterns 91, 92, a section located between the connection patterns 91, 93, and a section located between the connection patterns 92, 94. Similarly, the inductor pattern 96 includes a section located between the connection patterns 93 and 94 , a section located between the connection patterns 91 and 93 , and a section located between the connection patterns 92 and 94 .

[0025] Furthermore, a portion of the section of inductor pattern 95 located between connection patterns 91, 92 is provided at a position overlapping with the first capacitor and connection pattern 75. The other sections are provided at positions not overlapping with the first capacitor and connection pattern 75. Similarly, a portion of the section of inductor pattern 96 located between connection patterns 93, 94 is provided at a position overlapping with the second capacitor and connection pattern 76. The other sections are provided at positions not overlapping with the second capacitor and connection pattern 76.

[0026] The conductor layer M3 is covered with an insulating layer 25 made of a resin material such as polyimide. As shown in Fig. 11, openings 101-106 are provided in the insulating layer 25. Of these, the openings 101-104 are provided at positions that expose the connection patterns 91-94, respectively, and the openings 105 and 106 are provided at positions that expose the other ends of the inductor patterns 95 and 96, respectively.

[0027] A conductor layer M4 is provided on the insulating layer 25. As shown in FIG. 12, the conductor layer M4 includes connection patterns 111-114 and inductor patterns 115 and 116. The connection patterns 111-114 are provided at positions overlapping the terminal electrodes 11-14, respectively, and are connected to the connection patterns 91-94 through the openings 101-104, respectively. One end of the inductor patterns 115 and 116 is connected to the other end of the inductor patterns 95 and 96 through the openings 105 and 106, respectively. The other ends of the inductor patterns 115 and 116 are connected to the connection patterns 113 and 114, respectively. The inductor patterns 115 and 116 are both patterns wound about one turn. A part of the inductor pattern 115 meanders along the connection patterns 111 and 112. The inductor pattern 115 includes a section located between the connection patterns 111 and 112, a section located between the connection patterns 111 and 113, and a section located between the connection patterns 112 and 114. Similarly, the inductor pattern 116 includes a section located between the connection patterns 113 and 114 , a section located between the connection patterns 111 and 113 , and a section located between the connection patterns 112 and 114 .

[0028] The conductor layer M4 is covered with an insulating layer 26 made of a resin material such as polyimide. As shown in Fig. 13, openings 121-124 are provided in the insulating layer 26. The openings 121-124 are provided at positions that expose the connection patterns 111-114, respectively.

[0029] A conductor layer M5 is provided on the insulating layer 26. As shown in Fig. 14, the conductor layer M5 includes terminal electrodes 11-14. The terminal electrodes 11-14 are connected to the connection patterns 111-114 through the openings 121-124, respectively. The surfaces of the terminal electrodes 11-14 may be covered with a plating film P made of Ni and Au, as shown in Fig. 2.

[0030] With this configuration, the chip-type electronic component 1 according to this embodiment forms a splitter circuit shown in FIG. 15. In actual use, the terminal electrode 11 is grounded to the ground GND, an input signal is supplied to the terminal electrode 12, and an output signal is output from the terminal electrodes 13 and 14. Here, the first capacitor C1 connected between the terminal electrodes 11 and 12 is composed of the lower electrode pattern 35, the upper electrode pattern 51, and the insulating layer 22. The second capacitor C2 connected between the terminal electrodes 13 and 14 is composed of the lower electrode pattern 36, the upper electrode pattern 52, and the insulating layer 22. A resistor pattern R is also connected between the terminal electrodes 13 and 14. The first inductor L1 connected between the terminal electrodes 12 and 13 is composed of the inductor patterns 37, 77, 95, and 115. The second inductor L2 connected between the terminal electrodes 12 and 14 is composed of the inductor patterns 38, 78, 96, and 116.

[0031] Furthermore, in the chip-type electronic component 1 according to the present embodiment, a portion of the inductor pattern 95 located on the conductor layer M3 overlaps with the connection pattern 75 located on the conductor layer M2. Therefore, a capacitance occurs between the inductor pattern 95 and the connection pattern 75. That is, as shown in FIG. 15, a supplementary third capacitor C3 is added between the terminal electrode 11 and the first inductor L1. Similarly, a portion of the inductor pattern 96 located on the conductor layer M3 overlaps with the connection pattern 76 located on the conductor layer M2, so a capacitance occurs between the inductor pattern 96 and the connection pattern 76. That is, as shown in FIG. 15, a supplementary fourth capacitor C4 is added between the terminal electrode 13 and the second inductor L2. Here, since the insulating layer 24 separating the conductor layers M2 and M3 is much thicker than the insulating layer 22, which is a capacitive insulating film, the capacitance of the third and fourth capacitors C3 and C4 is small, but the addition of such capacitors C3 and C4 improves various characteristics, which will be described later.

[0032] 16 to 18 are graphs showing insertion loss, reflection loss, and isolation, respectively, where the solid line shows the characteristics of the chip-type electronic component 1 according to this embodiment, and the dashed line shows the characteristics when the third and fourth capacitors C3, C4 are not present. Insertion loss is the loss that occurs when a signal input to the terminal electrode 12 is output from the terminal electrodes 13 and 14, reflection loss is the component of the signal input to the terminal electrode 12 that is reflected back to the terminal electrode 12, and isolation is the isolation between the terminal electrodes 13 and 14. As shown in Figs. 16 to 18, it can be seen that the insertion loss, reflection loss, and isolation are all improved by adding the third and fourth capacitors C3, C4.

[0033] As described above, in the chip-type electronic component 1 according to this embodiment, the inductor patterns 95 and 96 overlap with the capacitors C1 and C2, respectively, and thus the auxiliary third and fourth capacitors C3 and C4 are added, so that it is possible to improve various characteristics required for the splitter. Moreover, the section of the inductor pattern 95 located between the adjacent connection patterns 91 and 92 meanders along the connection patterns 91 and 92 and overlaps with the capacitor C1, and the section of the inductor pattern 96 located between the adjacent connection patterns 93 and 94 meanders along the connection patterns 93 and 94 and overlaps with the capacitor C2, so that the wiring length of the inductor patterns 95 and 96 can be increased. This makes it possible to reduce the chip size while ensuring the required inductance.

[0034] Although a preferred embodiment of the present invention has been described above, the present invention is not limited to the above embodiment, and various modifications are possible without departing from the spirit of the present invention, and it goes without saying that these modifications are also included within the scope of the present invention.

[0035] For example, in the above embodiment, both the third and fourth capacitors C3 and C4 are added, but this is not essential to the present invention, and only the third capacitor C3 may be added. [Explanation of symbols]

[0036] 1. Chip-type electronic components 10 Main body 11~14 Terminal electrode 20 Substrate 21 Planarization layer 22~26 Insulating layer 23 Insulating layer 24 Insulating layer 25 Insulating layer 26 Insulating layer 31 Connection Patterns 31~34 Connection Pattern 35,36 Bottom electrode pattern 36 Bottom electrode pattern 37,38 Inductor pattern 41~48 Opening 51,52 Top electrode pattern 60~69 Opening 70~76,79 Connection pattern 77,78 Inductor pattern 81~86 Opening 91~94 Connection Pattern 95,96 Inductor pattern 101~106 Opening 111~114 Connection Pattern 115,116 Inductor Pattern 121~124 Opening C1 First capacitor C2 Second capacitor C3 Third capacitor C4 Fourth capacitor L1 First inductor L2 Second inductor M1,MM,M2,M3,M4,M5 Conductor layer P plating film R Resistor Pattern

Claims

1. First and second terminal electrodes; A first conductor layer; a first insulating layer covering the first conductor layer; a second conductor layer provided on the first insulating layer; a second insulating layer covering the second conductor layer; a third conductor layer provided on the second insulating layer; a third insulating layer covering the third conductor layer; a fourth conductor layer provided on the third insulating layer; the first conductor layer includes first and second connection patterns provided at positions overlapping the first and second terminal electrodes, respectively, and a first lower electrode pattern located between the first connection pattern and the second connection pattern so as to be sandwiched therebetween and connected to one of the first and second terminal electrodes; the second conductor layer includes a first upper electrode pattern provided at a position overlapping the first lower electrode pattern via the first insulating layer and connected to the other of the first and second terminal electrodes; the first lower electrode pattern and the first upper electrode pattern form a first capacitor; the third conductor layer includes third and fourth connection patterns provided at positions overlapping the first and second terminal electrodes, respectively, and a fifth connection pattern located between the third connection pattern and the fourth connection pattern so as to be sandwiched between them and connected to one of the third and fourth terminal electrodes, the fourth conductor layer includes a first inductor pattern having one end connected to the first terminal electrode, the first inductor pattern includes a first section overlapping the first capacitor and a second section not overlapping the first capacitor; A chip-type electronic component, characterized in that the first section of the first inductor pattern overlaps with the fifth connection pattern via the third insulating film, thereby the first section of the first inductor pattern and the fifth connection pattern form a third capacitor.

2. Further comprising third and fourth terminal electrodes; the first conductor layer further includes sixth and seventh connection patterns provided at positions overlapping the third and fourth terminal electrodes, respectively, and a second lower electrode pattern located between the sixth connection pattern and the seventh connection pattern so as to be sandwiched between them and connected to one of the third and fourth terminal electrodes; the second conductor layer further includes a second upper electrode pattern provided at a position overlapping the second lower electrode pattern via the first insulating layer and connected to the other of the third and fourth terminal electrodes; the second lower electrode pattern and the second upper electrode pattern form a second capacitor; the third conductor layer includes eighth and ninth connection patterns provided at positions overlapping the third and fourth terminal electrodes, respectively, and a tenth connection pattern located between the eighth connection pattern and the ninth connection pattern so as to be sandwiched between them and connected to one of the eighth and ninth terminal electrodes, the fourth conductor layer further includes a second inductor pattern having one end connected to the first terminal electrode, an eleventh connection pattern provided at a position overlapping with the first terminal electrode and the first and third connection patterns and connected to the first terminal electrode and the first and third connection patterns, and a twelfth connection pattern provided at a position overlapping with the second terminal electrode and the second and fourth connection patterns and connected to the second terminal electrode and the second and fourth connection patterns, the first section of the first inductor pattern is located between the eleventh connection pattern and the twelfth connection pattern so as to be sandwiched between them; 2. The chip-type electronic component according to claim 1, wherein the other end of the first inductor pattern is connected to the third terminal electrode, and the other end of the second inductor pattern is connected to the fourth terminal electrode.

3. the fourth conductor layer further includes a thirteenth connection pattern provided at a position overlapping with the third terminal electrode and the sixth and eighth connection patterns, and connected to the third terminal electrode and the sixth and eighth connection patterns, and a fourteenth connection pattern provided at a position overlapping with the fourth terminal electrode and the seventh and ninth connection patterns, and connected to the fourth terminal electrode and the seventh and ninth connection patterns, The chip-type electronic component according to claim 2, characterized in that a portion of the second section of the first inductor pattern is located between the 11th connection pattern and the 13th connection pattern so as to be sandwiched therebetween, or is located between the 12th connection pattern and the 14th connection pattern so as to be sandwiched therebetween.

4. the second inductor pattern is located between the thirteenth connection pattern and the fourteenth connection pattern so as to be sandwiched between them, and includes a third section overlapping with the second capacitor and a fourth section not overlapping with the second capacitor; The chip-type electronic component according to claim 3, characterized in that the third section of the second inductor pattern overlaps with the tenth connection pattern via the third insulating film, whereby the third section of the second inductor pattern and the tenth connection pattern form a fourth capacitor.

5. A chip-type electronic component as described in claim 4, characterized in that a portion of the fourth section of the second inductor pattern is located between the 11th connection pattern and the 13th connection pattern so as to be sandwiched between them, or is located between the 12th connection pattern and the 14th connection pattern.

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