Stabilization circuit

Abstract

To provide a stabilization circuit for stabilizing a semiconductor device using a semiconductor element.SOLUTION: A stabilization circuit 12 is configured by connecting, in parallel, a first series circuit 8 of a first inductor 6 and a first capacitor 7 and a second series circuit 11 of a first resistor 10 and a second inductor 9. By connection of the second inductor 9 to the first resistor 10 in this way, the placement position of the first resistor 10 is significantly relaxed, and the degree of freedom in design for realizing the stabilization circuit 12 is greatly increased.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] This disclosure relates to a stabilization circuit for a semiconductor device using semiconductor elements such as a field effect transistor (FET) and a high electron mobility transistor (HEMT). [Background technology]

[0002] Semiconductor devices such as amplifiers and oscillators are widely used in radar equipment, communication equipment, and observation equipment. In general, the lower the frequency, the more unstable the operation of semiconductor elements such as FETs and HEMTs. For this reason, semiconductor devices use stabilization circuits to ensure stable operation, especially at low frequencies. One such stabilization circuit is composed of a series resonant circuit of a capacitor and an inductor and a resistor connected in parallel to this series resonant circuit, and is connected in series to the input terminal of a semiconductor element (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2005-217753 A Summary of the Invention [Problem to be solved by the invention]

[0004] However, when implementing a stabilization circuit using a microwave integrated circuit, there is a problem in that the layout position of the resistors is restricted in the conventional stabilization circuit, restricting the freedom of design. [Means for solving the problem]

[0005] The stabilization circuit disclosed herein is composed of a first series circuit of a first inductor and a first capacitor, and a second series circuit of a first resistor and a second inductor connected in parallel to the first series circuit, and the stabilization circuit is loaded in series with at least one of the input terminal or output terminal of a semiconductor element. Effect of the Invention

[0006] According to the stabilization circuit disclosed in this disclosure, by loading the second inductor in series with the first resistor, it is not necessary to load the first resistor between the main lines, and the first resistor can be formed in a location away from the main lines, greatly relaxing the location of the first resistor. Therefore, the constraints imposed by the power handling capability and the center frequency of the semiconductor device are significantly relaxed in realization, and there is an effect of increasing the degree of freedom in design. [Brief description of the drawings]

[0007] [Figure 1] 1 is a diagram showing a configuration of a semiconductor device using a stabilization circuit according to a first embodiment of the present disclosure. [Diagram 2] 1 shows an example of the stabilization circuit according to the first embodiment of this disclosure implemented using a microwave integrated circuit. [Diagram 3] 1 shows an example of an equivalent circuit of a stabilization circuit of a comparative example and a configuration example in which the stabilization circuit of the comparative example is realized using a microwave integrated circuit. [Figure 4] FIG. 4 is a diagram showing a configuration illustrating another example of the stabilization circuit according to the first embodiment of the present disclosure. [Diagram 5] 13 is a simplified equivalent circuit of a stabilization circuit according to a second embodiment of the present disclosure. [Figure 6] 13 is an example of a pass characteristic of a stabilization circuit according to the second embodiment of the present disclosure. [Figure 7] 13 is an example of gain and stability factor characteristics of an amplifier to which a stabilization circuit according to a second embodiment of the present disclosure is applied. [Figure 8] FIG. 13 is a diagram showing a configuration of a semiconductor device using a stabilization circuit according to a third embodiment of the present disclosure. [Figure 9]FIG. 11 is a diagram showing a simplified equivalent circuit of a stabilization circuit according to a third embodiment of the present disclosure. [Figure 10] FIG. 11 is a diagram showing the pass characteristic of a stabilization circuit according to a third embodiment of the present disclosure. [Figure 11] FIG. 13 is a diagram showing the configuration of another embodiment of a stabilization circuit according to the third embodiment of the present disclosure. [Figure 12] FIG. 13 is a diagram showing the configuration of a stabilization circuit according to still another embodiment of the present disclosure, according to the third embodiment. [Figure 13] FIG. 11 is a diagram showing a configuration of another example of a semiconductor device using the stabilization circuit according to the first to third embodiments of this disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] Embodiment 1 Hereinafter, a first embodiment of the present disclosure will be described with reference to the drawings. 1 is a diagram showing the configuration of a semiconductor device using a stabilization circuit according to embodiment 1. Here, the semiconductor device is shown as an amplifier. This amplifier has a configuration in which an input matching circuit 4, a semiconductor element 3 such as a FET (Field effect transistor) or a HEMT (High Electron Mobility Transistor), a stabilization circuit 12 according to embodiment 1, and an output matching circuit 5 are sequentially arranged between an input terminal 1 and an output terminal 2. The stabilization circuit 12 is configured by connecting a first series circuit 8, which is made up of a first inductor 6 and a first capacitor 7, in parallel with a second series circuit 11, which is made up of a second inductor 9 and a first resistor 10, and is installed between the output terminal 3b of the semiconductor element and the output matching circuit 5. The stabilization circuit 12 shown in FIG. 1 is composed of only four elements: a first inductor 6, a first capacitor 7, a second inductor 9, and a first resistor 10.

[0009] An input terminal 3 a of the semiconductor element 3 is a gate terminal and is connected to an input matching circuit 4 . An output terminal 3 b of the semiconductor element 3 is a drain terminal and is connected to a stabilization circuit 12 . The source terminal of the semiconductor element 3 is grounded. The input matching circuit 4 is provided to match the power supply impedance connected to the input terminal 1 with the input impedance of the semiconductor element 3. The output matching circuit 5 is provided to match the load impedance connected to the output terminal 2 with the output impedance of the semiconductor element 3. The stabilization circuit 12 minimizes the effect on the characteristics of the amplifier in the required band, and absorbs unwanted waves in the low frequency band from the semiconductor element 3 that cause unstable operation, thereby stabilizing the amplifier. With this configuration, an amplifier is obtained in which a microwave band signal from input terminal 1 is amplified to a desired level by semiconductor element 3 and then supplied to a load via output terminal 2.

[0010] FIG. 2 shows an example of a stabilization circuit 12 according to the present disclosure implemented using a microwave integrated circuit. FIG. 2(a) shows two main lines S1, S2 formed of a thin film on a ceramic substrate, arranged in a straight line so that they face each other with a gap G between them, with one end of a first resistor 10 formed of a thin film connected to the side of one of the main lines S1 and the other end connected to the side of the end of the other main line S2 via a second inductor 9 formed in an L-shape by a microstrip line, a chip-shaped first capacitor 7 attached to the end of the other main line S2, and the first capacitor 7 and the end of one of the main lines S1 connected by a first inductor 6 made of gold wire. By connecting the second inductor 9 to the first resistor 10 in this way, there is more room for the position of the first resistor 10. This has the advantage of increasing the degree of freedom in designing to realize the stabilization circuit 12 without being restricted by the band center frequency of the semiconductor device and the area of ​​the first resistor 10.

[0011] 2(b) is formed of a thin film on a ceramic substrate, two main lines S1 and S2 are arranged in a straight line so as to face each other with a gap G between them, a first resistor 10 of the same length as the gap G between the two main lines S1 and S2 is formed on the side of the gap G between the two main lines S1 and S2, second inductors 9a and 9b are formed in a straight line from the end side of the two main lines S1 and S2 in a direction perpendicular to the direction of the main lines and in the direction in which the first resistor 10 is formed, and the first resistor 10 is loaded between these inductors 9a and 9b. By dividing the second inductor 9 into 9a and 9b, the resonance frequency between the first inductor 6 and the first capacitor 7 is maintained, and there is an advantage that the position where the first resistor 10 is formed is more flexible without being influenced by the area of ​​the resistor, and the degree of freedom in design is further increased.

[0012] 2(c) has the same basic configuration as FIG. 2(b), but the gap G between the two main lines S1 and S2 arranged opposite to each other is narrowed. In FIG. 2(c), a first resistor 10 longer than the gap G between the two main lines S1 and S2 is formed on the side of the gap G between the two main lines S1 and S2, a second inductor 9a is formed linearly from the side of the end of one main line S1 in the direction perpendicular to the direction of the main line where the first resistor 10 is formed, and a hook-shaped, crank-shaped or Z-shaped second inductor 9b is formed from the side of the end of the other main line S2 in the direction perpendicular to the direction of the main line where the first resistor 10 is formed, and the first resistor 10 is loaded between these inductors 9a and 9b. With this configuration, the gold wire length forming the first inductor 6 can be shortened. This makes it possible to increase the resonance frequency between the first inductor 6 and the first capacitor 7 while maintaining the area of ​​the first resistor 10. In other words, this has the advantage of providing greater freedom in design since it is possible to accommodate amplifiers in a higher frequency band while maintaining the power handling capability. As shown in FIG. 2, the stabilization circuit 12 has two main lines S1, S2 arranged with their ends facing each other across a distance G (gap or space), a first resistor 10 arranged at a position other than the distance G, and at least one or both of the two main lines S1, S2 and the first resistor 10 are connected by a second inductor 9. In order to actually realize the stabilization circuit 12, main lines through which the microwave signal propagates are required between the output terminal 3b of the semiconductor element and the stabilization circuit 12, and between the stabilization circuit 12 and the output matching circuit 5, as shown in FIG. 2. However, these main lines are omitted in FIG. 1.

[0013] For reference, Fig. 3 shows an equivalent circuit of the stabilization circuit of the comparative example and an example of the configuration when the stabilization circuit of the comparative example is realized using a microwave integrated circuit. The stabilization circuit of the comparative example is a series resonant circuit of an inductor and a capacitor with a resistor connected in parallel as shown in Fig. 3(a). To realize such a stabilization circuit, as shown in Fig. 3(b), a thin-film resistor is loaded between the ends of two main lines S1 and S2, a chip-shaped capacitor is attached to the end of one of the main lines S1, and an inductor made of gold wire is used to connect the capacitor and the end of the other main line S2 across the resistor.

[0014] In general, the power handling capacity of a resistor depends on its area, and a large area is required to obtain high power handling capacity. On the other hand, the resonant frequency of a series resonant circuit is determined by the capacitor and inductor, and in order to fix the capacitor, it is necessary to shorten the gold wire length when the amplifier's band center frequency is high, and to lengthen the gold wire length when the band center frequency is low. When a resistor with a large area is used to improve the power durability and the center frequency of the amplifier is high, the gold wire length across the resistor may become shorter than the resistor length, making this impossible to achieve. In addition, to use a gold wire of the desired length across the resistor, it is necessary to select a capacitor that corresponds to the series resonance frequency. In this way, in the stabilization circuit of the comparative example, the circuit constants that can be realized are determined by the power handling capability and the resonant frequency of the series resonant circuit, restricting the freedom of design.

[0015] Fig. 4 is a configuration diagram showing another example of the stabilization circuit according to embodiment 1. The stabilization circuit 12 in Fig. 1 is configured by connecting in parallel a first series circuit 8 including a first inductor 6 and a first capacitor 7, and a second series circuit 11 including a first resistor 10 and a second inductor 9. 4(a) shows a case where two second series circuits 11 are connected in parallel to one first series circuit 8. With this configuration, the power resistance of the stabilization circuit can be improved without increasing the area of ​​one first resistor 10 more than necessary. 4(b) shows that the first inductor 6 is divided into two inductors 6a and 6b, and these inductors 6a and 6b are connected to both sides of the first capacitor 7. This allows more room for the arrangement of the first capacitor 7, further increasing the degree of freedom in design.

[0016] ***Advantages of the First Embodiment*** The stabilization circuit 12 of the first embodiment is a stabilization circuit for stabilizing a semiconductor device such as an amplifier or an oscillator, and is characterized in that it is connected in series to at least one or both of the input terminal 3a or the output terminal 3b of a semiconductor element 3 used in the semiconductor device, and comprises a first series circuit 8 of a first inductor 6 and a first capacitor 7, and a second series circuit 11 connected in parallel to the first series circuit 8, and comprises a first resistor 10 and a second inductor 9. In the stabilization circuit 12 disclosed herein, a first series circuit 8 consisting of a first inductor 6 and a first capacitor 7 is connected in parallel to a second series circuit 11 consisting of a first resistor 10 and a second inductor 9, and by loading the second inductor 9 onto the first resistor 10, there is more space in the position where the first resistor 10 is formed. Therefore, it becomes possible to design the area of ​​the resistor that determines the power handling capability and the first series circuit 8 that determines the band of the amplifier independently, which has the advantage of significantly increasing the degree of freedom in design.

[0017] Embodiment 2 The following mainly describes the differences from the first embodiment. Fig. 5 is a simplified equivalent circuit diagram of a stabilization circuit according to a second embodiment of this disclosure. The configuration of the stabilization circuit according to the second embodiment is the same as that of Fig. 1, but the circuit constants are limited in order to minimize the effect on the band of the semiconductor device and to obtain a large amount of attenuation at a specific frequency in the low frequency band. In this equivalent circuit, the values ​​of the first inductor 6, the first capacitor 7, the second inductor 9 and the first resistor 10 are L1, C1, L0 and R, respectively, and the series resonance frequency of L1 and C1 is set to the band center frequency f0 of the semiconductor device. A simplified equivalent circuit of the stabilization circuit of the comparative example is also shown in Fig. 5. The stabilization circuit 12 of this disclosure is represented as through at the band center frequency f0, as a parallel circuit of the equivalent capacitor C' of the first series circuit 8 and the second series circuit 11 at the band low end fl, and as a parallel circuit of the equivalent inductor L' of the first series circuit 8 and the second series circuit 11 at the band high end fh. In addition, in the low frequency band outside the band, it is represented as a parallel circuit of the equivalent capacitor C0 of the first series circuit 8 and the second series circuit 11, and in the vicinity of DC (Direct Current), it is represented as only R which is the first resistor 10. In contrast, the stabilization circuit of the comparative example is represented as through at the band center frequency f0, as a parallel circuit of C' and resistor R at fl, and as a parallel circuit of L' and R at fh. Also, in the low frequency band outside the band, it is represented as a parallel circuit of C0 and R, and only R is present near DC.

[0018] That is, the simplified equivalent circuit near f0 and DC is the same for the stabilization circuit 12 of the second embodiment and that of the comparative example. However, at frequencies fl and fh at both ends of the band, the effect of the second inductor 9 connected to the first resistor 10 makes the impedance higher than that of only the resistor of the comparative example. For this reason, the attenuation of the first resistor 10 at fl and fh is lower than that of the stabilization circuit of the comparative example. That is, by applying the stabilization circuit 12 with such circuit constants to an amplifier, it is possible to widen the bandwidth of the amplifier while maintaining the attenuation of unwanted waves near DC. In addition, since the simplified equivalent circuit of the stabilization circuit 12 in the low frequency band of this disclosure is a parallel circuit of C0 and the second series circuit 11, by selecting a second inductor 9 that resonates in parallel with C0, it is possible to attenuate more spurious waves at a specific frequency fr in the low frequency band. The constant L0 of such a second inductor 9 can be calculated as follows.

[0019] Here, L1 and C1 are set to have series resonance at the center frequency ωo of the semiconductor device, so that C1=1 / (ωo 2 L1), the impedance Z of the stabilization circuit 12 is expressed by Equation 1, where ωo=2πf0.

[0020] formula 1 Z={jL1(ω 2 -ωo 2 )(R+jωL0)} / {(jL1(ω 2 -ωo 2 )+ω(R+jωL0)}

[0021] Furthermore, if R<ωL0, then equation 2 can be obtained approximately from equation 1.

[0022] formula 2 Z = {-ωL1L0(ω 2 -ωo 2 )} / {(jL1(ω 2 -ωo 2 )+jω 2 L0)}

[0023] From this equation, the relationship between L0 and L1 for the stabilization circuit to resonate in parallel at a certain frequency ωr in the low frequency band can be calculated using equation 3, where ωr = 2πfr.

[0024] formula 3 L0 = L1(ωo 2 / ωr 2 -1)

[0025] In this way, when the band center frequency ω0 of the semiconductor device, the specific frequency ωr in the low frequency band at which the attenuation is maximum, and the first inductor 6 are given, L0 of the second inductor 9 can be found from Equation 3. For example, if f0 = 1.6 GHz, fr = 0.8 GHz, and L1 = 8 nH, then L0 = 24 nH is obtained from equation 3. In addition, for C1, the condition for series resonance with L1 at f0 determines C1 = 1.25 pF. L0 = L1(ωo 2 / ωr 2 -1) =L1((2πf0) 2 / (2πfr)2 -1) =L1((2π 1.6) 2 / (2π 0.8) 2 -1) =8((2π 1.6) 2 / (2π 0.8) 2 -1) ≒8(100 / 25-1) =8(100 / 25-1) =24nH C1=1 / (ωo 2 L1) =1 / ((2πf0) 2 L1) =1 / ((2π 1.6) 2 8) ≒1 / (100 8) =0.00125nF =1.25pF

[0026] Figure 6 is an example of the pass characteristic of the stabilization circuit according to embodiment 2. In Figure 6(c), the solid line is the pass characteristic of stabilization circuit 12 of this disclosure shown in Figure 6(a), and the dotted line is the pass characteristic of a stabilization circuit of a comparative example for comparison shown in Figure 6(b). The element values ​​shown here use the values ​​obtained above, and the element values ​​of the stabilization circuit of the comparative example, except for L0, are the same as those of stabilization circuit 12 of this disclosure. The stabilization circuit 12 of this disclosure is compared to the comparative example in that the loss at f0 of 1.6 GHz is the same for both, but the loss at the low end 1.5 GHz and the high end 1.7 GHz is lower for this disclosure. On the other hand, the frequency of the low frequency band where the loss is maximum is 0.79 GHz, and a loss of 13 dB is obtained, which is about 9 dB larger than that of the comparative example. In the vicinity of DC, the two circuits are the same. The frequency at which the loss is maximum is 0.79GHz, which is slightly different from the 0.8GHz calculated by Equation 3, but Equation 3 assumes that the effect of resistance R is very small. 2 / ωr 2 -1) makes it easy to tune to 0.8GHz.

[0027] FIG. 7 shows an example of characteristics of the gain and stability factor of an amplifier to which the stabilization circuit according to the second embodiment is applied. In the figure, the solid line indicates the case where the stabilization circuit 12 of this disclosure is applied, and the dotted line indicates the case where the stabilization circuit of the comparative example is applied for comparison. The characteristic example in FIG. 7 is an example of characteristics in the case where the element values ​​of the stabilization circuit 12 of this disclosure and the stabilization circuit of the comparative example are those in FIG. 6 and the stabilization circuit 12 is loaded between the semiconductor element 3 and the output matching circuit 5 as shown in FIG. 7(a). As shown in (b) of Fig. 7, the stabilization circuit of this disclosure has a higher gain over the 1.5 GHz to 1.7 GHz band compared to the stabilization circuit of the comparative example, and can achieve a gain reduction of about 9 dB at a specific frequency of 0.8 GHz in the low frequency band. Also, as shown in (c) of Fig. 7, the stability factor in the vicinity of 0.8 GHz can be improved.

[0028] In the stabilization circuit of the comparative example, as the frequency decreases, the impedance of the series resonant circuit increases, and therefore the spurious waves absorbed by the resistor also gradually increase, reaching a maximum near DC (Direct Current). However, the frequency band where semiconductor elements become unstable is not limited to near DC, and there are cases where semiconductor elements become unstable in the low frequency band near f0 / 2, such as half-wave oscillation. In such cases, it is necessary to absorb more unwanted waves near f0 / 2 with resistors than unwanted waves near DC. In the stabilization circuit of the comparative example, there are cases where it is not possible to sufficiently absorb unwanted waves in a specific frequency band fr in the low frequency band, and the semiconductor element may operate unstably or oscillate in this frequency band.

[0029] In the second embodiment, the series resonant frequency of the first series circuit 8 consisting of the first inductor 6 and the first capacitor 7 of the stabilization circuit disclosed herein is set to the band center frequency f0 of the semiconductor device, and a second inductor 9 is selected that resonates in parallel with the equivalent capacitor of the first series circuit 8 at a specific frequency fr in the low frequency band of the first series circuit 8, thereby achieving a wider bandwidth of the semiconductor device than the stabilization circuit of the comparative example. For example, by selecting fr as f0 / 2, it is possible to attenuate more of the unwanted waves in the low frequency band that cause half-harmonic oscillation, and to achieve higher stability of the amplifier. In the above embodiment, the case of absorbing unwanted waves in the frequency band f0 / 2 of the band has been described, but the stabilization circuit 12 disclosed here can also accommodate unwanted oscillations in other low frequency bands by arbitrarily selecting the second inductor 9.

[0030] ***Effects of the second embodiment*** As described above, according to the stabilization circuit 12 of the second embodiment, it is possible to absorb more unwanted waves in a specific frequency fr band in the low frequency band while maintaining the amount of unwanted waves absorbed by the resistor near DC in the stabilization circuit of the comparative example, and for example, it is possible to significantly suppress f0 / 2 oscillation. In addition, it is possible to reduce the loss of the stabilization circuit at both ends of the band, and it is also possible to widen the band of the semiconductor device.

[0031] Embodiment 3 The following mainly describes the differences from the first and second embodiments. In the embodiment described above, the stabilization circuit 12 configured by connecting the first series circuit 8 and the second series circuit 11 in parallel is loaded in series between the output terminal 3a of the semiconductor element and the output matching circuit 5 as shown in FIG. 1. The stabilization circuit 12 thus loaded is significantly affected by the source impedance Zg seen from the semiconductor element 3 side or the load impedance Zl seen from the output matching circuit 5 side. In general, the output matching circuit 5 is designed so that the output impedance of the semiconductor element 3 matches the load impedance connected to the output terminal 2 within the band of the amplifier. However, in many cases, no consideration is given to matching in the low frequency band where unstable operation is likely to occur. For this reason, the amount of attenuation of the spurious waves absorbed by the first resistor 10 depends heavily on Zg and Zl, and depending on the impedances of Zg and Zl, the spurious waves that should be attenuated may not be attenuated at all. The configuration of a stabilization circuit that solves this problem is described below.

[0032] 8 is a diagram showing the configuration of a semiconductor device using a stabilization circuit according to embodiment 3 of this disclosure. This diagram also shows an amplifier as the semiconductor device. The stabilization circuit 12 shown here is configured by loading a parallel circuit 20 consisting of a second capacitor 13 and a third inductor 14 between one end of the stabilization circuit 12 shown in embodiments 1 and 2 and the ground.

[0033] The stabilization circuit 12 in FIG. 8 is configured by loading a parallel circuit 20 consisting of only two elements, a second capacitor 13 and a third inductor 14, between the terminal on the output matching circuit 5 side of a parallel connection circuit (the stabilization circuit 12 shown in the first and second embodiments) formed by connecting a first series circuit 8 and a second series circuit 11 in parallel and ground, and by setting the parallel resonant frequency of the parallel circuit 20 to the band center frequency f0 of the semiconductor device. Here, the element values ​​of the second capacitor 13 and the third inductor 14 are C2 and L2, respectively, and these element values ​​are set to C2=1 / (ωo 2 Selected as L2. Moreover, the impedance seen from the parallel circuit 20 towards the output matching circuit 5 is designated as Zl'.

[0034] 9 is a diagram showing a simplified equivalent circuit of a stabilization circuit according to a third embodiment of the present disclosure, in which the same reference numerals are used to refer to the same or corresponding parts as in FIG. The parallel circuit 20 of the second capacitor 13 and the third inductor 14 constituting the stabilization circuit 12 of this disclosure is open near the band, and is expressed as an equivalent inductor La at fl and an equivalent capacitor Ca at fh. On the other hand, it becomes an equivalent inductor La' in the low frequency band and is short-circuited near DC. Generally, the equivalent inductor La' in the low frequency band is very small, so the impedance Zl' including the parallel circuit 20 is not easily affected by Zl and is a substantially constant low impedance. Therefore, the first resistor 10 can sufficiently absorb the unwanted waves in the low frequency band without being affected by Zl.

[0035] Although not shown, a parallel circuit 20 consisting of a second capacitor 13 and a third inductor 14 may be loaded between the terminal on the semiconductor element 3 side of a parallel connection circuit (the stabilization circuit 12 shown in embodiments 1 and 2) formed by connecting the first series circuit 8 and the second series circuit 11 in parallel and ground. The parallel circuit 20 of the second capacitor 13 and the third inductor 14 may be loaded between at least one or both terminals of the parallel connection circuit (the stabilization circuit 12 shown in embodiments 1 and 2) and ground.

[0036] 10 is a diagram showing the pass characteristic of the stabilization circuit according to the third embodiment of this disclosure. Here, L2=4nH, C2=2.5pF, and Zl and Zg are respectively selected as 25Ω, 50Ω, and 100Ω. Even if the impedance before and after the stabilization circuit 12 changes, the loss is almost 0dB over the range from fl to fh in the band, and the loss at fr in the low frequency band is about 17dB, which is hardly affected by the impedance. Therefore, even if the impedance before and after the stabilization circuit 12 changes, the loss of the stabilization circuit 12 is almost constant in the band and at low frequencies. By applying the stabilization circuit disclosed herein to a semiconductor device, the influence of the impedance before and after the stabilization circuit 12 is small, and a wide-band, highly stable amplifier can be obtained.

[0037] Fig. 11 is a diagram showing the configuration of another example of a stabilization circuit according to embodiment 3 of this disclosure. This stabilization circuit 12 is obtained by loading a second resistor 15 in series to a parallel circuit 20 of the second capacitor 13 and the third inductor 14 shown in Fig. 8. Fig. 11(a) shows a case where a series circuit of a parallel circuit 20 and a second resistor 15 is loaded between one end of a stabilizing circuit 12 made up of a first series circuit 8 and a second series circuit 11 connected in parallel and the ground, and Fig. 11(b) shows a case where a series circuit of a parallel circuit 20 and a second resistor 15 is loaded between both ends of a stabilizing circuit made up of a first series circuit 8 and a second series circuit 11 connected in parallel and the ground, respectively. The series circuit of the parallel circuit 20 and the second resistor 15 may be loaded between at least one or both terminals of a parallel connection circuit formed by connecting the first series circuit 8 and the second series circuit 11 in parallel and the ground.

[0038] In the stabilization circuit 12 shown in Fig. 8, one end on the output matching circuit 5 side is short-circuited near DC, and has very low impedance even in the low frequency band. Therefore, the impedance seen from the output matching circuit 5 to the stabilization circuit 12 side is also very low near DC and in the low frequency band. Therefore, the impedance seen from the output terminal 2 to the stabilization circuit 12 side including the output matching circuit 5 is also low near DC and in the low frequency band. Therefore, for example, when a subsequent amplifier is connected to the output terminal 2 of a multi-stage amplifier, the input impedance of the subsequent amplifier may become short-circuited or low impedance, causing the subsequent amplifier to operate unstably.

[0039] 11, by adding the second resistor 15 to the parallel circuit 20, the series circuit of the parallel circuit 20 and the second resistor 15 in the DC vicinity and low frequency bands can be regarded as being connected with substantially only the second resistor 15. Therefore, the impedance seen from the output terminal 2 toward the output matching circuit 5 does not become a low impedance, and unstable operation of the rear-stage amplifier connected to the output terminal 2 can be avoided. In addition, when a series circuit consisting of a parallel circuit 20 and a second resistor 15 is loaded between both ends of the stabilization circuit consisting of the first series circuit 8 and the second series circuit 11 connected in parallel as shown in Figure 11 (b) and ground, there is an advantage that it can be applied as is between the input terminal 1 and the semiconductor element 3 without any design changes. However, in the stabilization circuit 12 of FIG. 11, the pass characteristics near the band are the same regardless of the presence or absence of the second resistor 15, so that the post-stage amplifier can be stabilized while maintaining the in-band characteristics of the semiconductor device.

[0040] 12 is a diagram showing the configuration of still another example of the stabilization circuit according to the third embodiment of this disclosure. In this example, a transmission line 16 with one end short-circuited is used instead of the parallel circuit 20 of the second capacitor 13 and the third inductor 14. FIG. 12(a) shows the case where only a transmission line 16 is connected between one end of the stabilization circuit 12, which is made up of the first series circuit 8 and the second series circuit 11, and ground, and FIG. 12(b) shows the case where a series circuit consisting of only two elements, a second resistor 15 and a transmission line 16, is loaded. Here, when the length of the transmission line 16 is set to 1 / 4 wavelength at the band center frequency of the semiconductor device, the equivalent circuit from near DC to near the band of the amplifier is approximately the same as that in FIG. 8 in (a) of FIG. 12, and approximately the same as that in FIG. 11 in (a) of FIG. 12.

[0041] Therefore, even if the transmission line 16 is used instead of the parallel circuit 20 of the second capacitor 13 and the third inductor 14, it is possible to obtain a highly stable amplifier that is less susceptible to the effects of load impedance while maintaining good characteristics. A stabilization circuit of this configuration can be easily realized by using microwave integrated circuit technology, and is particularly advantageous in realizing the stabilization circuit 12 used in a high-frequency amplifier.

[0042] In the third embodiment, a parallel circuit 20 made of a second capacitor 13 and a third inductor 14 or a series circuit made of the parallel circuit 20 made of the second capacitor 13 and the third inductor 14 and a second resistor 15 is loaded between at least one or both terminals of the parallel circuit formed by connecting a first series circuit 8 and a second series circuit 11 in parallel and ground, and the parallel resonant frequency of the parallel circuit 20 is set to the band center frequency f0 of the semiconductor device.

[0043] ***Effects of the Third Embodiment*** The stabilization circuit 12 of the third embodiment has the advantage of being less susceptible to the effects of the load impedance or power supply impedance seen from the stabilization circuit, while maintaining the degree of design freedom, the broadband of the semiconductor device, and stabilization at a specific frequency fr in the low-frequency band.

[0044] In the above first to third embodiments, the stabilization circuit 12 is applied between the semiconductor element 3 of the amplifier and the output matching circuit 5. The stabilization circuit 12 of this disclosure is not limited to this. Fig. 13 is a diagram showing the configuration of another embodiment of an amplifier to which a stabilization circuit 12 is applied. The effect is the same even if the stabilization circuit 12 is connected between the input matching circuit 4 and the semiconductor device 3 as shown in Fig. 13(a), or even if the stabilization circuit 12 is connected between the input matching circuit 4 and the semiconductor device 3 and between the output matching circuit 5 and the semiconductor device 3 as shown in Fig. 13(b). The stabilization circuit 12 may be connected to at least one or both of the input terminal 3a and the output terminal 3b of the semiconductor element.

[0045] Although the above description has been given of an amplifier as an example of a semiconductor device to which a stabilization circuit is applied, the same applies when this stabilization circuit is applied to semiconductor devices such as oscillators and multipliers. [Explanation of symbols]

[0046] 1 input terminal, 2 output terminal, 3 semiconductor element, 4 input matching circuit, 5 output matching circuit, 6 first inductor, 7 first capacitor, 8 first series circuit, 9 second inductor, 10 first resistor, 11 second series circuit, 12 stabilization circuit, 13 second capacitor, 14 third inductor, 15 second resistor, 16 transmission line, 20 parallel circuit, S1 main line, S2 main line, G spacing.

Claims

1. A first series circuit including a first inductor and a first capacitor; a second series circuit including a first resistor and a second inductor, the second series circuit being connected in parallel with the first series circuit; A stabilization circuit connected in series to at least one of an input terminal and an output terminal of a semiconductor element, If the frequency at the center of the band of a semiconductor device in which the semiconductor element is used is taken as a band center frequency f0, the frequency at the low end of the band is taken as a band low end fl, and the frequency at the high end of the band is taken as a band high end fh, then: The series resonant frequency of the first series circuit is set to the band center frequency f0 so that a signal passes through at the band center frequency f0; at the band low end f1 and the band high end fh, the impedance of the second series circuit is made higher by the second inductor connected to the first resistor than the impedance in the case where the second series circuit includes only the first resistor, An equivalent circuit at the band lower end f1 is expressed by a parallel circuit of an equivalent capacitor C′ of the first series circuit and the second series circuit, An equivalent circuit at the high frequency band end fh is expressed by a parallel circuit of an equivalent inductor L′ of the first series circuit and the second series circuit, an equivalent circuit in a low frequency band outside the band is represented by a parallel circuit of an equivalent capacitor C0 of the first series circuit and the second series circuit, A stabilization circuit in which an equivalent circuit in the vicinity of DC (Direct Current) is the same as that including only the first resistor.

2. Semiconductor device band center frequency = f0 A frequency in a low frequency band that is lower than the band of the semiconductor device and higher than the vicinity of DC=fr Value of first inductor=L1 Value of first capacitor=C1 Value of second inductor=L0 ωo=2πf0 ωr=2πfr In this case, the value of the first inductor and the value of the first capacitor are C1=1 / (ωo ２ L1) The relationship is as follows: The value of the first inductor and the value of the second inductor are L0≒L1(ωo ２ / ωr ２ -1) The relationship is as follows:

2. The stabilization circuit according to claim 1, wherein, at the frequency fr in the low frequency band, the equivalent capacitor of the first series circuit is defined as capacitor C0, and the value L0 of the second inductor is set so as to resonate in parallel with capacitor C0.

3. 3. The stabilization circuit according to claim 1, further comprising: a parallel circuit comprising a third inductor and a second capacitor, which is connected between at least one terminal of a parallel connection circuit formed by connecting the first series circuit and the second series circuit in parallel and ground; and a parallel resonant frequency of the parallel circuit is set to a band center frequency f0 of the semiconductor device.

4. 3. The stabilization circuit according to claim 1 or 2, further comprising a series circuit of a parallel circuit consisting of a third inductor and a second capacitor and a second resistor, which is connected between at least one terminal of the parallel connection circuit formed by connecting the first series circuit and the second series circuit in parallel and ground.

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