Phase change memory with gradual reset - Patents.com
The PCM structure with a gradual reset function addresses inefficiencies in conventional PCM cells by using a new device geometry and bias signal for controlled heating, enhancing memory array density and reducing power consumption in AI chips.
Patent Information
- Application Number
- JP2022549384
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-03-13
- Filing Date
- 2021-02-03
- Publication Date
- 2025-02-04
- Estimated Expiration
- 2041-02-03
AI Technical Summary
Conventional Phase Change Memory (PCM) cells have sudden reset operations that can lead to inefficiencies in memory array density, power consumption, and speed, particularly in AI chips, due to rapid phase transitions without controlled heating.
A PCM structure with a gradual reset function is achieved through a new device geometry and bias signal, utilizing a phase-changing material sandwiched between electrodes with a thermal insulation layer to enable uneven heating, allowing for controlled phase transitions.
The PCM structure enables increased memory array density, reduced power consumption, and enhanced speed in AI chips by facilitating gradual reset operations, improving the efficiency and performance of PCM cells.
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Abstract
Description
[Technical field]
[0001] The present invention relates generally to electrical, electronic and computer technologies, and more particularly to phase change memory. [Background technology]
[0002] Phase change memory (PCM) is a form of random access memory (RAM) that stores data by changing the state of the material from which the device is fabricated. At the center of a PCM cell is a small region of a semiconductor alloy (e.g. a chalcogenide) that can rapidly change between an ordered crystalline phase, which has a lower electrical resistance, and a disordered amorphous phase, which has a much higher electrical resistance. This change in resistance between the crystalline and amorphous phases, and therefore the change in the logic state of the PCM cell, is easily identifiable. Phase change memory is non-volatile because neither phase of the material requires power to maintain it.
[0003] The state (or phase) of the phase-change material that forms the PCM cell is set (or written) as a function of the amplitude and duration of an applied electrical pulse that heats the material. When heated to just above the material's melting point (e.g., above about 600 degrees Celsius), the atoms of the energized semiconductor alloy move around and assume a random arrangement. By gradually turning off the applied electrical pulse (e.g., over about 10 nanoseconds (ns)), the atoms are given enough time to reorganize and return to their preferred ordered crystalline phase; this is often referred to as the set state. Instead, the applied electrical pulse must be abruptly stopped to quench the atoms into the disordered amorphous phase; this is often referred to as the reset state. Summary of the Invention
[0004] Beneficially, the present invention provides a phase change memory (PCM) structure and a method of fabricating a PCM structure that provides a gradual reset function, as specified in one or more embodiments of the present invention. In one or more embodiments, the gradual reset function is achieved using a novel device geometry and applied bias signal. Specifically, as specified in one or more embodiments, aspects of the present invention are directed to a PCM structure that includes a phase change material sandwiched between two electrodes having a disk form factor, with a gap configured to allow for non-uniform heating of the phase change material. Advantageously, the novel PCM geometry, coupled with an applied bias signal having predetermined amplitude and duration characteristics, enables the PCM structure to achieve the gradual reset function.
[0005] According to one embodiment of the present invention, a PCM structure configured to perform a gradual reset operation includes first and second electrodes and a phase change material layer disposed between the first and second electrodes. The PCM structure further includes a thermal insulation layer disposed on the first and second electrodes and at least sidewalls of the phase change material layer. The thermal insulation layer is configured to provide non-uniform heating of the phase change material layer. Optionally, the thermal insulation layer may be formed as an air gap. The PCM structure may be configured with the first and second electrodes aligned in a vertical or horizontal configuration.
[0006] According to one embodiment of the present invention, there is provided a method of forming a PCM structure configured to perform a gradual reset operation, the method including forming first and second electrodes, forming a phase change material layer between the first and second electrodes, and forming a thermal insulation layer on the first and second electrodes and at least sidewalls of the phase change material layer, the thermal insulation layer being configured to provide non-uniform heating of the phase change material layer.
[0007] According to another embodiment of the invention, there is provided a method of performing a gradual reset operation in a PCM structure including first and second electrodes, a phase change material layer disposed between the first and second electrodes, and a thermal barrier disposed on at least sidewalls of the first and second electrodes and the phase change material layer, the method including applying a first reset pulse having an amplitude greater than a crystalline phase change material switching threshold voltage and less than an amorphous phase change material switching threshold voltage between the first and second electrodes for a predetermined duration to raise a temperature of the phase change material layer until a temperature of a central portion of the phase change material layer exceeds a melting temperature of the phase change material, such that the central portion of the phase change material layer switches to a high resistance amorphous state. The method further includes applying at least one subsequent reset pulse between the first and second electrodes, having the same amplitude and duration as the first reset pulse, to raise a temperature of the phase change material layer until a temperature of a portion of the phase change material layer adjacent to the central portion exceeds a melting temperature of the phase change material, such that the portion of the phase change material layer adjacent to the central portion switches to a high resistance amorphous state, while the central portion of the phase change material layer remains in the high resistance amorphous state.
[0008] As used herein, "facilitating" an action includes performing the action, making the action easier, helping to perform the action, or causing the action to be performed. Thus, by way of example only and not by way of limitation, in the context of a semiconductor manufacturing process, steps performed by one entity would facilitate an action to be performed by another entity to cause a desired action to be performed or to help a desired action to be performed. For the avoidance of doubt, an action is performed by an entity or combination of entities even if an actor facilitates the action by other than performing the action.
[0009] The techniques of the present invention can provide significant beneficial technical effects. By way of example only and not by way of limitation, PCM structures and / or methods of manufacturing PCM structures according to embodiments of the present invention can provide one or more of the following advantages: - Gradual reset function Allows a single PCM cell to be used for both set and reset operations In the context of memory array applications, achieving increased density across the memory array Increasing the speed of artificial intelligence (AI) chips using PCM cells - Reducing the power consumption of AI chips that use PCM cells
[0010] These and other features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments of the invention, which is to be read in conjunction with the accompanying drawings.
[0011] The following drawings are presented by way of example only and not by way of limitation, and the same reference symbols (when used) denote similar elements throughout the several views. [Brief description of the drawings]
[0012] [Figure 1] 1 is a phase diagram for the germanium-antimony-tellurium (Ge-Sb-Te) ternary alloy system, showing some known phase change alloys. [Diagram 2] 1 is a graph illustrating an exemplary temperature profile that can be used to switch the state of a phase change material in a standard PCM cell. [Figure 3-1] 1A and 1B are cross-sectional and top views, respectively, of an exemplary vertical PCM cell, according to one embodiment of the present invention. [Figure 3-2] FIG. 1C is a cross-sectional view illustrating at least a portion of an exemplary vertical PCM cell having an air gap as an insulating layer, according to another embodiment of the present invention. [Figure 4-1] 1A and 1B are cross-sectional and top views, respectively, of an exemplary lateral PCM cell, according to one embodiment of the present invention. [Figure 4-2] FIG. 1C is a cross-sectional view illustrating at least a portion of an exemplary lateral PCM cell having an air gap as an insulating layer, according to another embodiment of the present invention. [Diagram 5] 5 is a graph illustrating exemplary reset signals that may be applied to the PCM cells shown in FIGS. 3(A)-3(C) and 4(A)-4(C) to perform a gradual reset operation, according to one embodiment of the present invention. [Figure 6] 3A-3C conceptually illustrate an exemplary amorphization of the phase change material of the exemplary vertical PCM cell of FIG. 3A due to a first reset pulse applied during a gradual reset operation, in accordance with one embodiment of the present invention. [Figure 7] 6A-6C conceptually illustrate an exemplary amorphization of the phase change material of the exemplary vertical PCM cell of FIG. 6C due to a second reset pulse applied during a gradual reset operation, in accordance with one embodiment of the present invention. [Figure 8] 1 is a graph illustrating a plot of PCM cell conductance as a function of the number of applied reset pulses, in accordance with one embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0013] It should be appreciated that elements in the figures have been illustrated for simplicity and clarity, and in order to make it easier to view the illustrated embodiments with less distraction, common and well-understood elements that may be useful or necessary in a commercially viable embodiment may not be shown.
[0014] As set forth in one or more embodiments of the present invention, the principles of the present invention are described herein in the context of an exemplary phase change memory (PCM) structure having a gradual reset function and a method of fabricating such a PCM structure. In one or more embodiments, this gradual reset function is achieved using novel device geometries and applied bias signal profiles. However, it is not intended that the present invention be limited to the particular structures and / or methods shown and described herein. Rather, it will be apparent to one of ordinary skill in the art given the teachings herein that numerous modifications can be made to the illustrated embodiments within the scope of the claims. That is, no limitations to the embodiments shown and described herein are intended or should be inferred.
[0015] As mentioned above, phase change materials exist as an ordered crystalline phase (or phases) having a lower electrical resistance and a disordered amorphous phase having a higher electrical resistance. These phase change materials can be rapidly and repeatedly switched between their crystalline and amorphous phases, and such switching is typically induced by heating with applied electrical and / or optical pulses.
[0016] Many suitable phase change materials include a family of compounds called chalcogenides. Chalcogenides generally exhibit strong optical and electrical contrast, rapid crystallization, and high crystallization temperatures (e.g., several hundred degrees Celsius). One such chalcogenide that is commonly used as a phase change material is germanium-antimony-tellurium (Ge x Sb y Te z FIG. 1 is a phase diagram 100 of the Ge-Sb-Te ternary alloy system, which shows some known phase change alloys. Referring to FIG. 1, in modern PCM devices, the composition (GeTe) m (Sb2Te3) nFor faster switching applications, PCM devices using undoped Sb phase change material and alloys with the composition Ge 15 Sb 85 PCM devices have also been fabricated using lightly Ge-doped Sb phase change materials having a quasi-binary line 104 between GeTe and Sb. Another set of phase change materials along the quasi-binary line 104 between GeTe and Sb has also been investigated for use in PCM devices. Starting with the alloy Ge2Sb1Te2 on line 104 and increasing the percentage of Ge in the alloy (as indicated by the arrows along line 106) results in phase change materials with higher thermal stability of the amorphous phase, well suited for high temperature PCM applications.
[0017] As previously explained, the state of the phase change material forming a PCM cell is conventionally set (i.e., written) as a function of the amplitude and duration of an applied electrical pulse that heats the material. Referring to FIG. 2, a graph is shown illustrating an exemplary temperature profile that may be used to switch the state of the phase change material in a standard PCM cell. In particular, at a certain threshold voltage of the PCM cell, the resistance of the cell drops suddenly and a large current flows through the cell, which current rises above the crystallization temperature (T C ) by gradually turning off the applied current pulse, allowing the atoms in the phase change material enough time to reorganize back into an ordered crystalline phase. This set operation is illustrated by temperature profile 202. In the crystalline state, the resistance of the PCM cell is low. When a current pulse with a larger amplitude and shorter duration is applied to the PCM cell, the phase change material heats up to the melting temperature T M The current pulse is then suddenly removed, causing the phase change material to melt-quench and return to a highly resistive amorphous state. This reset operation is illustrated by temperature profile 204. Thus, a conventional PCM cell may have a gradual set and an abrupt reset.
[0018] Advantageously, aspects of the present invention provide PCM structures that, in addition to having a gradual set characteristic, also provide a gradual reset function, as manifested in one or more embodiments of the present invention, which gradual reset function is achieved using novel device geometries and applied bias signal profiles.
[0019] Although the entire fabrication method described herein and the structures formed thereby are entirely novel, some individual processing steps required to carry out the method may include conventional semiconductor manufacturing techniques and conventional semiconductor manufacturing tools. Those skilled in the art given the teachings of this specification will already be familiar with these techniques and tools. Furthermore, many of the processing steps and tools used to fabricate semiconductor devices are also described in several readily available publications, including, for example, PH Holloway et al., Handbook of Compound Semiconductors: Growth, Processing, Characterization, and Devices, Cambridge University Press, 2008 and RK Willardson et al., Processing and Properties of Compound Semiconductors, Academic Press, 2001. Both of these two publications are incorporated herein by reference in their entirety for all purposes. Although some individual processing steps are described herein, it is emphasized that these steps are merely examples and that those skilled in the art may be familiar with several equally suitable alternative processing steps that would also fall within the scope of the present invention.
[0020] It should be appreciated that the various layers and / or regions illustrated in the accompanying figures may not be drawn to scale. Additionally, to facilitate a clearer illustration, a given figure may not explicitly show one or more semiconductor layers of a type commonly used in such integrated circuit devices. This is not intended to imply that the not explicitly shown semiconductor layers are omitted in the actual integrated circuit device.
[0021] By way of example only and not by way of limitation, FIGS. 3A and 3B are cross-sectional and top views, respectively, of an exemplary vertical PCM cell 300, according to one embodiment of the present invention. In this exemplary embodiment, the PCM cell 300 is configured to have a flat circular (i.e., disk-like or disc-shaped) form factor. More specifically, the PCM cell 300 includes a first electrode 302, which may be a bottom electrode, and a second electrode 304, which may be a top electrode. The PCM cell 300 further includes a phase change (PC) material layer 306 sandwiched between the top and bottom electrodes. That is, the PC material layer 306 is disposed on top of the bottom electrode 302, which essentially serves as a substrate for the PC material layer, and the top electrode 304 is disposed on top of the PC material layer 306. In one or more embodiments, the first and second electrodes 302, 304 and the PC material layer 306 may be formed using standard deposition processes that would be known to one of ordinary skill in the art.
[0022] In one or more embodiments, when a bias signal (e.g., a bias voltage) is applied between the top electrode 304 and the bottom electrode 302, a current flows through the PC material layer 306 from the electrode having a higher potential to the electrode having a lower potential relative to each other. This current flowing through the PC material layer 306 locally heats a portion of the PC material layer. When the temperature of the phase change material reaches a predetermined threshold level, a state change of the phase change material occurs, as previously described. Because the electrodes 302, 304 are disposed in a vertical relationship with respect to each other, this induced current flows vertically through the PC material layer. Thus, the PCM cell 300 may be referred to herein as a vertical PCM device.
[0023] Beneficially, in this exemplary embodiment, the bottom and top electrodes 302, 304 and the PC material layer 306 are concentrically surrounded by an insulating layer 308. The insulating layer 308 functions to thermally isolate the PCM cell 300 from adjacent structures, such as other PCM cells in a memory device. Advantageously, by preventing heat loss to surrounding structures, the insulating layer 308 allows for non-uniform heating of the phase change material. The insulating layer 308 can further help reduce the amount of heat, and therefore the applied bias signal, required to switch the crystalline state of the PCM cell 300.
[0024] As shown in FIG. 3-1(A), the width W of the exemplary PCM cell 300 is preferably much greater than the height H of the PCM cell. In one or more embodiments, the PCM cell 300 is configured to have a height in the range of about 5 nanometers (nm) to about 50 nm and a width in the range of about 100 nm to about 1 micron (μm), such that the width to height ratio of the PCM cell 300 is about 20:1. Referring to FIG. 3(B), in one or more embodiments, the thickness D of the thermal insulation layer 308 is in the range of about 10 nm to about 300 nm. Although it is generally desirable to minimize the thickness of the thermal insulation layer 308 to increase packing density, it should be appreciated that embodiments of the present invention are not limited to the particular dimensions of the PCM cell 300.
[0025] Although embodiments of the present invention are not limited to a particular material for forming the bottom and top electrodes, in one or more embodiments, materials used to form the bottom and top electrodes 302, 304 include materials having high thermal resistance, such as, but not limited to, silicon, germanium, carbon, tungsten, manganin (an alloy containing copper, manganese, and nickel). Furthermore, the bottom electrode 302 and the top electrode 304 need not be formed of the same material. In one or more embodiments, the thermal conductance of the first and second electrodes 302, 304 is preferably less than about 100 Watts per meter-Kelvin (W / m·K). The thermal insulation layer 308 preferably includes a material having sufficient thermal insulation properties, such as a material having a thermal conductivity that is less than about 0.1 W / m·K. Suitable materials for forming the thermal insulation layer 308 include, but are not limited to, porous oxides (e.g., silicon dioxide) or air.
[0026] Alternatively, FIG. 3-2C is a cross-sectional view illustrating at least a portion of an exemplary vertical PCM cell 350 having voids as an insulating layer according to another embodiment of the present invention. Referring to FIG. 3-2C, the insulating layer is formed as voids in the exemplary PCM structure 350 because the properties of air are suitable for use as a thermal insulator. In one or more embodiments, when forming the insulating layer as voids, a dielectric cap layer 352 is formed on the top surface of the PCM cell and on the sidewalls of the insulating layer (308 in FIG. 3A). In this embodiment, the insulating layer merely serves as a dummy layer. A selective etch is then performed to remove the dummy layer, leaving voids 354 that serve as an insulating layer. FIG. 3-2C shows the resulting PCM structure 350 after removing the dummy layer (308 in FIG. 3-1A).
[0027] By way of example only and not by way of limitation, FIGS. 4-1(A) and 4-1(B) are cross-sectional and top views, respectively, of an exemplary lateral PCM structure or cell 400 according to another embodiment of the present invention. In this exemplary embodiment, the PCM cell 400 is configured to have a flat rectangular form factor. More specifically, the PCM cell 400 includes a first electrode 402 and a second electrode 404 disposed on a top surface of a dielectric substrate 406. Unlike the first and second electrodes 302, 304 of the exemplary PCM cell 300 shown in FIGS. 3-1(A) and 3-1(B), the first electrode 402 and the second electrode 404 are laterally separated and are substantially in the same plane with respect to each other.
[0028] The PCM cell 400 further includes a PC material layer 408 disposed on a portion of the substrate 406 between the first electrode 402 and the second electrode 404 and on at least a portion of the top surfaces of the first and second electrodes. In one or more embodiments, the first and second electrodes 402, 404 and the PC material layer 408 can be formed using standard deposition processes that would be known to one of ordinary skill in the art.
[0029] In one or more embodiments, a portion of the top surface of the PC material layer 408 includes a trench or channel 410 formed therein such that the top surface of the PC material layer has a stepped cross-section rather than a flat cross-section. An insulating layer 412 is then formed over the surface of the PCM cell 400, including the top surface of the PC material layer 408, the first and second electrodes 402, 404 and the sidewalls of the PCM layer, and a portion of the substrate 406. In this manner, in one or more embodiments, the insulating layer 412 substantially encapsulates the PC material layer 408. The PCM cell 400, or at least a portion thereof, may be formed during back-end-of-line (BEOL) processing.
[0030] As shown in FIG. 4-1(B), the width W of the exemplary PCM cell 400 is preferably much greater than the length L of the PCM cell. In one or more embodiments, the PCM cell 400 is configured to have a length in the range of about 5 nm to about 50 nm and a width in the range of about 100 nm to about 1 μm, such that the width to length ratio of the PCM cell 400 is about 20:1. With reference to FIG. 4-1(A), in one or more embodiments, the combined thickness D of the thermal insulating layer 412 and the substrate 406 is in the range of about 30 nm to about 300 nm, with the thickness D being a non-critical dimension. In one or more embodiments, the cross-sectional thickness of the PC material layer 408 is in the range of about 20 nm to about 200 nm, with the thickness of the PC material layer 408 being selected based at least in part on the resistive and / or power switching requirements of the PCM cell 400. However, it should be appreciated that embodiments of the present invention are generally not limited to any particular dimensions of the PCM cell 400.
[0031] As with the PCM cell 300 shown in FIGS. 3-1(A) and 3-1(B), embodiments of the present invention are not limited to a particular material for forming the bottom and top electrodes, but in one or more embodiments, the materials used to form the first and second electrodes 402, 404 include materials having high thermal resistance, such as, but not limited to, silicon, germanium, carbon, tungsten, manganin (an alloy containing copper, manganese, and nickel). In one or more embodiments, the thermal conductance of the first and second electrodes 402, 404 is preferably less than about 100 W / m·K. Furthermore, it is not necessary that the first electrode 402 and the second electrode 404 are formed of the same material. Each of the substrate 406 and the thermal insulation layer 412 preferably comprises a material having sufficient thermal insulation properties. In one or more embodiments, each of the substrate 406 and the thermal insulation layer 412 comprises a material having a thermal conductivity of less than about 0.1 W / m·K, such as, for example, a porous oxide (e.g., silicon dioxide). In one or more embodiments, the substrate 406 and the insulating layer 412 are formed from the same material, while in other embodiments the substrate and the insulating layer are formed from different materials.
[0032] Alternatively, the insulating layer 412 can be formed as an air gap, consistent with the exemplary vertical PCM cell 350 shown in FIG. 3-2(C). This is because the properties of air are favorable for use as an insulating material. Referring to FIG. 4-2(C), an exemplary horizontal PCM cell 450 utilizing an air gap for the insulating layer is shown according to another embodiment of the present invention. In this embodiment, the insulating layer (412 in FIG. 4-1(A)) merely serves as a dummy layer. A dielectric cap layer 452 is formed on the top surface and sidewalls of the insulating layer (412 in FIG. 4-1(A)) to encapsulate the insulating layer. A selective undercut etch is then performed to remove the insulating layer, leaving an air gap 454 that serves as the insulating layer. FIG. 4-2(C) shows the resulting PCM structure 450 after removing the dummy layer (412 in FIG. 4-1(A)).
[0033] 4-1(A), in one or more embodiments, when a bias signal (e.g., a bias voltage) is applied between the first electrode 402 and the second electrode 404, a current flows through the PC material layer 408 from the electrode having a higher potential to the electrode having a lower potential with respect to each other. This current flow through the PC material layer 408 locally heats a portion of the PC material layer. When the temperature of the phase change material reaches a predetermined threshold level (melting temperature T M ), a change of state of the phase change material occurs, as previously described. Because the electrodes 402, 404 are disposed in the same plane (i.e., side-by-side) with respect to one another, this induced current flows laterally (i.e., horizontally) through the PC material layer 408. Thus, the PCM cell 400 may be referred to herein as a lateral PCM device.
[0034] 5 is a graph illustrating an exemplary reset signal 500 that may be applied to the PCM cells 300 and 400 shown in FIGS. 3-1(A) and 3-1(B) and 4-1(A) and 4-1(B), respectively, to perform a gradual reset operation, in accordance with one embodiment of the present invention. As can be seen from FIG. 5, the reset signal 500 includes a series of pulses, each of which is configured to increase the threshold switching voltage V of the amorphous phase change material so that less current flows through the already amorphized phase change material. th(a) Recall that the amorphous phase of a phase change material has a much higher electrical resistance than the resistance of the crystalline phase of the phase change material, and thus current will tend to flow along the path of least resistance through the crystalline phase change material. Each pulse has a duration (i.e., pulse width) t configured to be long enough to raise the temperature of the crystalline phase change material and melt the material. PCM That is, in one or more embodiments, the crystalline phase change material preferably has a switching threshold voltage V th(c) is larger than the amorphous phase change material switching threshold voltage V th(a) The applied reset signal 500 is configured to have a voltage amplitude smaller than
[0035] By way of example only, in one or more embodiments, the pulses of reset signal 500 each have an amplitude of about 1.5 volts (V) to about 3.5 V and each pulse has a pulse width or duration of about 10 ns to about 50 ns. However, it should be recognized that embodiments of the present invention are not limited to any particular pulse amplitude or duration.
[0036] During the gradual reset operation of the PCM cell according to one or more embodiments of the present invention, only the central portion of the phase change material is amorphized by a first reset pulse. To ensure that the current in this amorphized central region is small, the second reset pulse is configured so that the temperature of the phase change material does not exceed the switching threshold voltage of the amorphized region. As a result, the central region of the PC material layer is not significantly heated and therefore remains in its amorphous state. Instead, most of the reset current flows around the periphery of the amorphized central region, heating the regions of phase change material immediately adjacent to the amorphized central region and the regions of phase change material around the amorphized central region. The same is true for subsequent reset pulses. In this way, the phase change material around the central region is amorphized layer by layer with each successive reset pulse.
[0037] More specifically, FIGS. 6A-6C conceptually illustrate an exemplary amorphization of a phase change material of a PCM cell (e.g., 300 of FIG. 3-1(A) or 400 of FIG. 4-1(A), respectively) due to a first reset pulse applied during a gradual reset operation, in accordance with one embodiment of the present invention. Referring to FIG. 6A, the exemplary vertical PCM cell 300 of FIG. 3 is shown in a crystalline phase. The amorphous phase change material switching threshold voltage V is greater than the crystalline phase change material switching threshold voltage, but is still within the range of the amorphous phase change material switching threshold voltage V. th(a) The amplitude V is smaller than V th(c) <V<V th(a) ) is applied between top electrode 304 and bottom electrode 302, current (indicated by arrows in FIG. 6A) flows substantially uniformly throughout PC material layer 306. FIG. 6B illustrates an exemplary temperature profile 620 of the phase change material as a function of distance within PC material layer 306. As can be seen from FIG. 6B, the current flowing through PC material layer 306 increases the temperature of the phase change material such that the temperature of the central portion of the phase change material rises above the phase change material melting temperature T M6B and 6C, the central portion 630 of the layer of PC material 306 switches to a highly resistive amorphous state, as shown in Figure 6C. The width of this amorphous portion of the layer of PC material 306 is designated W1.
[0038] Similarly, Figures 7(A)-7(C) conceptually illustrate an exemplary amorphization of the phase change material of a PCM cell (e.g., 300 of Figure 3-1(A) or 400 of Figure 4-1(A), respectively) due to a second reset pulse applied during a gradual reset operation, in accordance with one embodiment of the present invention. Referring to Figure 7(A), the exemplary vertical PCM cell of Figure 6(C) is shown, in which the PC material layer 306 includes an amorphized central portion 630 of width W1 after a first reset pulse of at least amplitude V(V th(c) <V<V th(a) ) is applied between top electrode 304 and bottom electrode 302, current (indicated by the arrows shown in FIG. 7(A)) flows primarily through the low resistance crystalline portions of PC material layer 306, with substantially no current flowing through the high resistance amorphous portions 630. FIG. 7(B) illustrates an exemplary temperature profile 720 of the phase change material as a function of distance within PC material layer 306. As can be seen from FIG. 7(B), this current flow through PC material layer 306 causes the temperature of the phase change material adjacent to the amorphized central portion 630 (portions 722 and 724 of temperature profile 720) to rise above the phase change material melting temperature T M 7C , the phase change material in layer 306 is amorphized to above W1. Furthermore, the temperature of amorphized central portion 630 remains below the critical melting temperature, and therefore the amorphized central portion does not revert to a crystalline state. As a result, the portions of phase change material (722 and 724) adjacent central portion 630 are amorphized in a manner such that the width of amorphized portion 630 of layer 306 of PC material increases to W2 (W2>W1) as shown in FIG. 7C . This process can be repeated until substantially all of the phase change material in layer 306 of PC material is amorphized.
[0039] 8 is a graph illustrating a plot of PCM cell conductance as a function of the number of applied reset pulses in accordance with one embodiment of the present invention. As can be seen from FIG. 8, the electrical conductance, expressed in units of Siemens (S), of a PCM cell in accordance with one or more embodiments of the present invention decreases substantially linearly with the number of successive reset pulses, thereby providing a gradual reset action within the PCM cell. Each successive reset pulse has a corresponding distinguishable resistance value that can be measured (e.g., by a sense amplifier, etc.). In this manner, a PCM cell in accordance with an embodiment of the present invention functions as an analog memory device.
[0040] At least a portion of the structures and methods of manufacture of the present invention may be implemented in an integrated circuit. In forming integrated circuits, identical dies are typically manufactured in a repeating pattern on the surface of a semiconductor wafer. Each die includes the devices described herein and may also include other structures and / or circuits. The individual dies are cut or diced from the wafer and then packaged as integrated circuits. Those skilled in the art will know how to dice a wafer and package the dies to manufacture integrated circuits. Any of the exemplary structures shown in the accompanying figures, or portions thereof, may be part of an integrated circuit. Integrated circuits so manufactured are considered part of the present invention.
[0041] As will be appreciated by those skilled in the art, the exemplary structures described above may be distributed in raw form (i.e., a single wafer having multiple unpackaged chips), as bare die, or in packaged form, or may be incorporated as part of an intermediate or final product that would benefit from having a PCM device formed in accordance with one or more embodiments of the present invention.
[0042] Integrated circuits according to aspects of the present disclosure may be used in virtually any application, including PCM, such as, but not limited to, memory arrays, neural networks, and / or electronic systems. Systems suitable for implementing embodiments of the present invention may include, but are not limited to, computing systems. Systems including such integrated circuits are considered part of the present invention. Those skilled in the art given the teachings of the present disclosure set forth herein will be able to contemplate other implementations and applications of embodiments of the present invention.
[0043] The figures of the embodiments of the invention described herein are intended to provide a general understanding of the various embodiments, and are not intended to serve as a complete description of all elements and features of apparatus and systems that may utilize the structures and semiconductor manufacturing methods described herein. Many other embodiments will be apparent to those skilled in the art given the teachings of the present specification. Other embodiments may be utilized and derived from the embodiments, such that structural and logical substitutions and modifications may be made without departing from the scope of the present disclosure. The figures are also for representational purposes only and are not drawn to scale. The specification and figures are therefore to be regarded as illustrative rather than restrictive.
[0044] In this specification, the embodiments of the present invention are referred to by the term "embodiment" either individually or collectively, or both, for convenience only and without any intention to limit the scope of the present application to a single embodiment or inventive idea when more than one embodiment is actually shown. Thus, although specific embodiments are shown and described herein, it should be understood that arrangements that achieve the same purpose can be used in place of the specific embodiment shown. That is, the present disclosure is intended to cover any adaptation or modification of the various embodiments. Combinations of the above embodiments and other embodiments not specifically described herein will be apparent to those skilled in the art given the teachings of this specification.
[0045] The terms used herein are for the purpose of describing particular embodiments only and are not intended to limit the present invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural unless otherwise clear from the context. Furthermore, as used herein, the terms "comprises" and / or "comprising" specify the presence of the described features, steps, operations, elements or components or combinations thereof, but are understood not to preclude the presence or addition of one or more other features, steps, operations, elements, components or groups thereof or combinations thereof. Terms such as "above", "below", "upper", "lower", "top" and "bottom" that may be used throughout this disclosure are intended to indicate the location of elements or structures relative to each other, but not the absolute location of the elements or structures.
[0046] The corresponding structures, materials, acts, and equivalents of all means or steps and functional elements in the following claims are intended to include any structures, materials, or acts for performing that function in conjunction with other claim elements as set forth in the claims. While the description of the various embodiments has been presented for purposes of illustration and description, it is not intended that the description be exhaustive or that the description be limited to the disclosed form. Many modifications and variations that do not depart from the scope and spirit of the invention will be apparent to those skilled in the art. These embodiments have been selected and described in order to best explain the principles and practical application of the invention and to enable those skilled in the art to understand these various embodiments with various modifications suitable for the particular use contemplated.
[0047] The following claims are incorporated into the Detailed Description section, with each claim standing on its own as a separately claimed subject matter. Those skilled in the art, given the teachings of the embodiments of the present invention described herein, will be able to contemplate other implementations and applications of the techniques of the embodiments of the present invention. Although exemplary embodiments of the present invention have been described herein with reference to the accompanying drawings, it should be understood that the embodiments of the present invention are not limited to the precise embodiments, and that various other changes and modifications may be made by those skilled in the art without departing from the scope of the appended claims.
Claims
1. 1. A phase change memory (PCM) structure configured to perform a gradual reset operation, comprising: First and second electrodes; a phase change material layer disposed between the first electrode and the second electrode; a thermal insulation layer disposed on at least sidewalls of the first and second electrodes and the phase change material layer, the thermal insulation layer configured to provide non-uniform heating of the phase change material layer; Equipped with a dielectric cap layer formed over a top surface and sidewalls of the PCM structure; A phase change memory (PCM) structure, wherein the thermal insulation layer is formed as an air gap between the dielectric cap layer and the phase change material layer.
2. 2. The PCM structure of claim 1, wherein the phase change material layer and the first and second electrodes each have a disk-like form factor, the phase change material layer is disposed on top of the first electrode, the second electrode is disposed on top of the phase change material layer, and the thermal insulation layer is disposed concentrically surrounding the first and second electrodes and the phase change material layer.
3. The PCM structure of claim 2 , wherein the thermal barrier layer is substantially planar with outer surfaces of the first and second electrodes.
4. 2. The PCM structure of claim 1, wherein the PCM structure has a disk-like form factor and a ratio of the width of the PCM structure along a long axis of the first electrode to the height of the PCM structure along an axis perpendicular to the long axis of the first electrode is at least 20:
1.
5. 2. The PCM structure of claim 1, further comprising a substrate, the first and second electrodes being laterally spaced from one another on a top surface of the substrate, the phase change material layer being disposed on the top surface of the substrate between the first and second electrodes and on the top surfaces of the first and second electrodes, and the thermal insulation layer being disposed on a portion of the top surface of the substrate and on the top surface of the phase change material layer, thereby encapsulating the first and second electrodes and the phase change material layer.
6. 6. The PCM structure of claim 5, wherein the PCM structure has a substantially rectangular form factor.
7. 7. A PCM structure as claimed in claim 5 or 6, further comprising a channel formed in the top surface of the phase change material layer between the first electrode and the second electrode.
8. 2. The PCM structure of claim 1, wherein the width of the PCM structure along a major axis is from about 100 nanometers (nm) to about 1 micron (μm) and the height of the PCM structure along an axis perpendicular to the major axis is from about 5 nm to about 50 nm.
9. 9. The PCM structure of claim 1, wherein at least one of the first and second electrodes comprises a material having a thermal conductance of less than about 100 Watts per meter-Kelvin (W / m·K).
10. A PCM structure according to any preceding claim, wherein the thermal insulation layer comprises a material having a thermal conductivity of less than about 0.1 watts per meter-Kelvin.
11. 1. A method of forming a phase change memory (PCM) structure configured to perform a gradual reset operation, comprising: forming first and second electrodes; forming a phase change material layer between the first electrode and the second electrode; forming a thermal insulation layer on the first and second electrodes and at least sidewalls of the phase change material layer configured to provide non-uniform heating of the phase change material layer; forming a dielectric cap layer on at least a top surface and sidewalls of the thermal insulation layer; and performing a selective etch to remove the thermal insulating layer, thereby forming an air gap that provides thermal insulation and allows for non-uniform heating of the phase change material layer; The method includes:
12. forming the first and second electrodes and the phase change material layer; forming a dielectric substrate; depositing the first and second electrodes on an upper surface of the dielectric substrate, the first and second electrodes being laterally spaced from one another and the first and second electrodes being substantially planar with one another; and depositing the phase change material layer on top surfaces of the first and second electrodes and on the top surface of the dielectric substrate between the first and second electrodes; The method of claim 11 , comprising:
13. The method of claim 12 , further comprising forming a channel in a top surface of the phase change material layer between the first electrode and the second electrode.
14. forming the first and second electrodes and the phase change material layer; depositing the phase change material layer on top of the first electrode; and depositing the second electrode on top of the phase change material layer; wherein the first and second electrodes and the phase change material layer are aligned with one another in a substantially vertical arrangement. The method of claim 11.
15. The method of any of claims 11 to 14, wherein at least one of the first and second electrodes comprises a material having a thermal conductance of less than about 100 watts per meter-Kelvin.
16. The method of any of claims 11 to 15, wherein the thermal insulation layer comprises a material having a thermal conductivity of less than about 0.1 watts per meter-Kelvin.
17. 12. The method of claim 11, further comprising forming the PCM structure to have a disk-like form factor, the phase change material layer disposed on top of the first electrode, the second electrode disposed on top of the phase change material layer, and the thermal insulation layer disposed concentrically surrounding the first and second electrodes and the phase change material layer.
18. 1. A method of performing a gradual reset operation in a phase change memory (PCM) structure, the PCM structure including first and second electrodes, a phase change material layer disposed between the first and second electrodes, and a thermal insulating layer disposed on at least sidewalls of the first and second electrodes and the phase change material layer, the method comprising: applying a first reset pulse between the first and second electrodes for a predetermined duration, the first reset pulse having an amplitude greater than a crystalline phase change material switching threshold voltage and less than an amorphous phase change material switching threshold voltage, the first reset pulse increasing a temperature of the phase change material layer until a temperature of a central portion of the phase change material layer exceeds a melting temperature of the phase change material, such that the central portion of the phase change material layer switches to a high resistance amorphous state; At least one subsequent reset pulse having the same amplitude and duration as the first reset pulse. applying a reset pulse between the first and second electrodes, the subsequent reset pulse increasing a temperature of the phase change material layer until a temperature of a portion of the phase change material layer adjacent the central portion exceeds a melting temperature of the phase change material, such that the portion of the phase change material layer adjacent the central portion switches to a high resistance amorphous state, while the central portion of the phase change material layer remains in the high resistance amorphous state. The method includes:
19. A phase change memory (PCM) structure configured to perform a gradual reset operation, comprising: First and second electrodes; a phase change material layer disposed between the first electrode and the second electrode; a thermal insulation layer disposed on at least sidewalls of the first and second electrodes and the phase change material layer, the thermal insulation layer configured to provide non-uniform heating of the phase change material layer; Equipped with the first and subsequent reset pulses are configured to apply a first reset pulse having an amplitude greater than a crystalline phase change material switching threshold voltage of the phase change material layer and less than an amorphous phase change material switching threshold voltage between the first and second electrodes for a predetermined duration to raise the temperature of the phase change material layer until a temperature of a central portion of the phase change material layer exceeds a melting temperature of the phase change material, such that the central portion of the phase change material layer switches to a high resistance amorphous state, and to apply at least one subsequent reset pulse having the same amplitude and duration as the first reset pulse between the first and second electrodes to raise the temperature of the phase change material layer until a temperature of an adjacent portion adjacent the central portion switched to the high resistance amorphous state exceeds a melting temperature of the phase change material, such that the adjacent portion of the phase change material layer switches to the high resistance amorphous state, while the central portion of the phase change material layer remains in the high resistance amorphous state; Phase change memory (PCM) structures.
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