Method for manufacturing a semiconductor device

Abstract

To provide a method for manufacturing a semiconductor device including an oxide semiconductor film with conductivity, and also to provide a method for manufacturing a semiconductor device including an oxide semiconductor film with translucency and conductivity.SOLUTION: A method for manufacturing a semiconductor device includes forming an oxide semiconductor film on a first insulation film, and forming an oxide semiconductor film having conductivity by performing second heat treatment in an atmosphere containing hydrogen after performing first heat treatment in an atmosphere in which oxygen contained in the oxide semiconductor film is desorbed.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a semiconductor device including an oxide semiconductor and a manufacturing method thereof.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect of the present invention relates to an object, a method, or a manufacturing method. One aspect of the present invention is a process, machine, manufacture, or composition of matter. Therefore, the present invention disclosed in this specification more specifically relates to the The technical field of one embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, and a , their driving methods, or their manufacturing methods can be cited as examples. [Background technology]

[0003] It is used in many flat panel displays, such as liquid crystal displays and light-emitting displays. The transistors used are made of amorphous silicon and single crystal silicon formed on a glass substrate. The silicon semiconductor is made of silicon semiconductor such as polycrystalline silicon or polysilicon. Transistors using semiconductors are also used in integrated circuits (ICs).

[0004] In recent years, metal oxides that exhibit semiconducting properties have been used in transistors instead of silicon semiconductors. In this specification, the term "oxide" refers to a metal oxide that exhibits semiconductor properties. Let us call them semiconductors.

[0005] For example, a transistor using zinc oxide or an In-Ga-Zn oxide as an oxide semiconductor may be used. A transistor is manufactured and used as a switching element for pixels of a display device. Techniques have been disclosed (see Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A Summary of the Invention [Problem to be solved by the invention]

[0007] One embodiment of the present invention provides a method for manufacturing a semiconductor device including a conductive oxide semiconductor film. Alternatively, one embodiment of the present invention provides a light-transmitting and conductive oxide semiconductor. To provide a method for manufacturing a semiconductor device including a conductor film, the method comprising the steps of: To provide a method for manufacturing a semiconductor device having a transistor and a capacitor in a few steps. One embodiment of the present invention provides a method for manufacturing a novel semiconductor device.

[0008] In addition, the capacitance element has a dielectric film provided between a pair of electrodes, and the at least one of the pair of electrodes At least one of the electrodes is a gate electrode, a source electrode, or a drain electrode constituting a transistor. In many cases, the electrodes are made of conductive films with light-shielding properties.

[0009] In addition, in a liquid crystal display device, the larger the capacitance value of the capacitance element, the more In the liquid crystal display device, the period during which the alignment of the liquid crystal molecules in the liquid crystal element can be kept constant can be extended. When displaying a still image, the fact that the period can be extended is a This reduces the number of times that image data is rewritten, which reduces power consumption. A driving method that reduces the number of driving circuits is also called a low-frequency driving method.

[0010] In order to increase the capacitance of a capacitive element, the area occupied by the capacitive element is increased. However, there is a way to increase the area where the pair of electrodes overlap. In a display device, a conductive film having a light-shielding property is provided to increase the area where a pair of electrodes overlap. If the area of ​​the film is increased, the aperture ratio of the pixel is reduced, and the display quality of the image is degraded. This problem is particularly noticeable in high-resolution liquid crystal display devices.

[0011] In view of the above, one embodiment of the present invention is a capacitor having a high aperture ratio and capable of increasing a capacitance value. Another embodiment of the present invention is a method for manufacturing a display device having a low power consumption element. Alternatively, one embodiment of the present invention provides a method for manufacturing a display device with a reduced number of steps. A method for manufacturing a display device that has a high aperture ratio and a wide viewing angle is provided.

[0012] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. Other issues can be extracted from the drawings, claims, etc. [Means for solving the problem]

[0013] In one embodiment of the present invention, an oxide semiconductor film is formed over a first insulating film. The first heat treatment is performed in an atmosphere in which oxygen is released, and then the second heat treatment is performed in an atmosphere containing hydrogen. The present invention relates to a method for manufacturing a semiconductor device, in which a conductive oxide semiconductor film is formed by performing a treatment.

[0014] The first heat treatment is performed at a temperature of 350° C. to 800° C., preferably 450° C. to 800° C. By performing heat treatment at 350° C. or higher, On the other hand, when heat treatment is performed at a temperature of 800° C. or lower, oxygen is released from the oxide semiconductor film. It is possible to release oxygen from the oxide semiconductor film while maintaining the crystal structure. , vacuum atmosphere, typically 1×10 -7 Pa or more and 10 Pa or less, preferably 1×10 -7 Pa or more and 1 Pa or less, preferably 1×10 -7 Pa or more 1×10 -1 Pressure atmosphere below Pa It is preferable to heat the mixture by air.

[0015] In one embodiment of the present invention, an oxide semiconductor film is formed over a first insulating film. After adding a rare gas to the material, heat treatment is performed in an atmosphere containing hydrogen to produce a conductive oxide semiconductor. This is a method for manufacturing a semiconductor device in which a conductor film is formed.

[0016] The rare gas is helium, neon, argon, krypton, or xenon.

[0017] One embodiment of the present invention is a method for forming an oxide semiconductor film over a first insulating film, A second insulating film is formed by sputtering or plasma CVD, so that a conductive The present invention relates to a method for manufacturing a semiconductor device in which an oxide semiconductor film having a structure including the above-mentioned structure is formed.

[0018] The first insulating film or the second insulating film is preferably an insulating film containing hydrogen. Typically, it is preferable to have a silicon nitride film containing hydrogen.

[0019] The hydrogen concentration in the conductive oxide semiconductor film is 8×10 19 atoms / cm 3 That's it It is preferable that there is.

[0020] The resistivity of a conductive oxide semiconductor film is 1×10 -3 Ωcm or more 1×10 4 Ωcm It is preferable that it is less than this.

[0021] The oxide semiconductor film having conductivity includes a crystal part, and the c-axis of the crystal part is aligned along the direction of the oxide semiconductor film. It may be parallel to the normal vector of the forming surface.

[0022] The conductive oxide semiconductor film includes In-Ga oxide, In-Zn oxide, and In- M-Zn oxide (M is Al, Ga, Y, Zr, Sn, La, Ce, or Nd) It is preferred that the compound contains Effect of the Invention

[0023] According to one embodiment of the present invention, a semiconductor device including a conductive oxide semiconductor film is manufactured. Alternatively, according to one embodiment of the present invention, a light-transmitting and conductive film can be provided. According to one embodiment of the present invention, a semiconductor device including an oxide semiconductor film can be manufactured. A semiconductor device having a transistor and a capacitor can be manufactured with a small number of steps. According to one embodiment of the present invention, a novel semiconductor device can be manufactured.

[0024] In addition, according to one embodiment of the present invention, a capacitance value can be increased while the aperture ratio is high. A display device having a light emitting element can be manufactured. A display device with reduced power consumption can be manufactured. It is possible to manufacture a display device having a high aperture ratio and a wide viewing angle with a small number of steps. .

[0025] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. The above will become apparent from the description in the specification, drawings, claims, etc. It is possible to extract other effects from the descriptions in the claims, etc. [Brief description of the drawings]

[0026] [Figure 1] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device of the present invention. [Diagram 2] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device of the present invention. [Diagram 3] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device of the present invention. [Figure 4] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a semiconductor device of the present invention. [Diagram 5] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device of the present invention. [Figure 6] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device of the present invention. [Figure 7] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device of the present invention. [Figure 8] FIG. 1 is a circuit diagram illustrating one embodiment of a semiconductor device of the present invention. [Figure 9] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device of the present invention. [Figure 10] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device of the present invention. [Figure 11] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device of the present invention. [Figure 12] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device of the present invention. [Figure 13] FIG. 1 is a diagram for explaining a computational model. [Figure 14] FIG. 1 is a diagram illustrating the initial configuration structure of an H2O-added model and the structure after optimization. [Figure 15] Schematic diagram explaining the division of regions in a c-IGZO crystal. [Figure 16] A diagram illustrating the hydrogen migration pathway in the region between the InO2 surface and the (Ga,Zn)O surface, and the activation barrier along that pathway. [Figure 17] A diagram illustrating the hydrogen migration pathway in the (Ga,Zn)O region and the activation barriers along that pathway. [Figure 18] A diagram explaining the hydrogen migration pathway in the InO2 region and the activation barrier along that pathway. [Figure 19] A diagram illustrating the hydrogen migration path along the c-axis direction and the activation barriers along that path. [Figure 20] FIG. 1 is a diagram for explaining a computational model. [Figure 21] FIG. 2 is a diagram for explaining the relative values ​​of the total energy of an oxygen vacancy model. [Figure 22] FIG. 1 is a diagram for explaining a computational model. [Diagram 23] FIG. 1 is a diagram for explaining a model of an initial state and a model of a final state. [Figure 24] FIG. 1 is a diagram illustrating the activation barrier. [Diagram 25] FIG. 1 is a diagram for explaining a model of an initial state and a model of a final state. [Figure 26] FIG. 1 is a diagram illustrating the activation barrier. [Figure 27] FIG. 1 is a diagram illustrating HO transition levels. [Figure 28] FIG. 1 is a diagram for explaining a computational model. [Figure 29] FIG. 2 is a diagram illustrating the structure of a model in a reaction process. [Diagram 30] 1 is a diagram explaining energy changes during a reaction process. [Diagram 31] 1A and 1B are a block diagram and a circuit diagram illustrating one embodiment of a display device. [Diagram 32] FIG. 1 is a top view illustrating one embodiment of a display device. [Diagram 33] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Diagram 34] 1A to 1C are cross-sectional views illustrating one embodiment of a manufacturing method of a display device. [Diagram 35] 1A to 1C are cross-sectional views illustrating one embodiment of a manufacturing method of a display device. [Diagram 36] 1A to 1C are cross-sectional views illustrating one embodiment of a manufacturing method of a display device. [Figure 37] 1A to 1C are cross-sectional views illustrating one embodiment of a manufacturing method of a display device. [Figure 38] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 39] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Diagram 40] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Diagram 41] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Diagram 42] 1 is a cross-sectional view illustrating one embodiment of a transistor. [Diagram 43] FIG. 1 is a top view illustrating one embodiment of a display device. [Diagram 44] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Diagram 45] 1A to 1C are cross-sectional views illustrating one embodiment of a manufacturing method of a display device. [Figure 46] 1A to 1C are cross-sectional views illustrating one embodiment of a manufacturing method of a display device. [Figure 47] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 48] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 49] 1A to 1C are cross-sectional views illustrating one embodiment of a manufacturing method of a display device. [Figure 50] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 51] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 52] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Diagram 53] FIG. 2 is a diagram illustrating a display module. [Figure 54] 1A to 1C are diagrams illustrating external views of electronic devices according to an embodiment. [Figure 55]FIG. 4 is a diagram for explaining hydrogen concentration and resistivity of a sample. [Figure 56] FIG. 4 is a diagram illustrating the transmittance of a sample. [Figure 57] FIG. 13 shows the results of CPM measurement of a sample. [Figure 58] FIG. 1 is a diagram illustrating the results of HX-PES analysis of a sample. [Figure 59] 1A to 1C are diagrams for explaining the results of SIMS measurement of a sample. [Figure 60] FIG. 1 is a diagram illustrating the ESR signal near a g value of 2.0 for a sample that has not been heat-treated. [Figure 61] FIG. 1 is a diagram illustrating the ESR signal at a g value of approximately 1.9 for a sample that was heat-treated in a nitrogen atmosphere. [Figure 62] FIG. 1 is a graph showing the film thickness dependence of the ESR signal at g value of 1.93 in an IGZO film. [Figure 63] A diagram illustrating the intensity and line width of the ESR signal in an IGZO film with a g value of 1.93. [Figure 64] FIG. 1 is a diagram illustrating the resistivity and ESR spin density of a sample. [Figure 65] FIG. 1 shows the relationship between the ESR spin density of a sample and the hydrogen concentration. [Figure 66] FIG. 4 is a diagram for explaining hydrogen concentration and electrical conductivity of a sample. [Figure 67] A diagram illustrating the relationship between the ESR spin density of a sample and 1 / ρ. [Figure 68] FIG. 1 is a diagram illustrating the results of TDS analysis of a sample. [Figure 69] FIG. 1 is a diagram illustrating the results of HX-PES analysis of a sample. [Figure 70] FIG. 4 is a diagram illustrating the temperature dependence of resistivity. [Figure 71] 1A and 1B are diagrams illustrating a display image of a liquid crystal display device. [Figure 72] Cs-corrected high-resolution TEM image of a cross section of CAAC-OS, and a schematic cross-sectional diagram of CAAC-OS. [Figure 73] Cs-corrected high-resolution TEM image of the CAAC-OS in the plane. [Figure 74]13A to 13C show structural analyses of a CAAC-OS and a single-crystal oxide semiconductor by XRD. [Figure 75] Electron diffraction pattern of CAAC-OS. [Figure 76] FIG. 1 shows the change in the crystal part of an In-Ga-Zn oxide due to electron irradiation. [Figure 77] Schematic diagram explaining the film formation model of CAAC-OS and nc-OS. [Figure 78] A diagram explaining InGaZnO4 crystals and pellets. [Figure 79] Schematic diagram explaining a film formation model of CAAC-OS. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] Hereinafter, the embodiments will be described with reference to the drawings. It is possible to carry out the present invention in various forms without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications may be made to the details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0028] Also, in the drawings, the size, layer thickness, or area are exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown in the drawings. The drawings are merely schematic illustrations and are not limited to the shapes or values ​​shown in the drawings.

[0029] In addition, the ordinal numbers "first," "second," and "third" used in this specification refer to the components of the It should be noted that this is added to avoid confusion and is not intended to limit the numbers.

[0030] In addition, in this specification, the words "above" and "below" indicating the position of the components are used. The positional relationship is used for convenience in describing the drawings. The relationship changes depending on the direction in which each component is depicted. The above words and phrases are not limited to those used above, and can be rephrased appropriately depending on the situation.

[0031] In this specification, a transistor includes a gate, a drain, and a source. The drain terminal is a diode that has at least three terminals. drain region or drain electrode layer) and source (source terminal, source region or source electrode layer) A channel region is provided between the drain and the source, and a current flows through the drain, the channel region, and the source. In this specification and the like, the channel region is a region through which a current mainly flows. This refers to the area in which the fluid flows.

[0032] In addition, the functions of the source and drain may differ depending on whether transistors of different polarities are used or the circuit In operation, when the direction of the current changes, the positions may be reversed. In the specification, the terms source and drain may be used interchangeably. do.

[0033] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a "device having some electrical function." "of" is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. For example, "something that has an electrical effect" includes electrodes, wiring, and transistors. These devices have various functions such as switching elements, resistor elements, inductors, capacitors, etc. This includes elements such as:

[0034] In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Parallel" refers to two lines that are arranged at an angle between -30° and 30°. Also, "perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes the case where the angle is between 85° and 95°. This refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0035] In this specification, when the crystal is a trigonal or rhombohedral crystal, it is represented as a hexagonal crystal system. vinegar.

[0036] (Embodiment 1) In this embodiment, a semiconductor device of one embodiment of the present invention will be described with reference to FIGS. In this embodiment, a conductive oxide semiconductor film and a conductive oxide semiconductor film are The structure of the conductive film in contact with the conductor film and the method for manufacturing the same will be described. The oxide semiconductor film having such a property functions as an electrode or a wiring.

[0037] FIG. 1 is a cross-sectional view of a conductive oxide semiconductor film included in a semiconductor device.

[0038] In FIG. 1A, an insulating film 153 and a conductive oxide semiconductor over the insulating film 153 A film 155b is formed on the substrate 151.

[0039] As shown in FIG. 1B, the insulating film 153 and the conductive oxide semiconductor film 15 An insulating film 157 may be formed on 5b.

[0040] As shown in FIG. 1C, a conductive oxide semiconductor film 1 In this case, an insulating film 55b may be formed on the conductive oxide semiconductor film 155b. An edge membrane 153a may be provided.

[0041] The oxide semiconductor film 155b having conductivity is typically made of In-Ga oxide or In-Z n oxide, In-M-Zn oxide (M is Al, Ga, Y, Zr, Sn, La, Ce, or The conductive oxide film is made of metal oxide such as Nd. The semiconductor film 155b has light-transmitting properties.

[0042] When the conductive oxide semiconductor film 155b is an In-M-Zn oxide, I The atomic ratio of n to M is 25% In when the sum of In and M is 100 atomic %. atomic %, M is less than 75 atomic %, and more preferably In is 34 atomic %. tomic%, and M is less than 66 atomic%.

[0043] The conductive oxide semiconductor film 155b preferably has an energy gap of 2 eV or more. The energy is preferably 2.5 eV or more, and more preferably 3 eV or more.

[0044] The thickness of the conductive oxide semiconductor film 155b is preferably greater than or equal to 3 nm and less than or equal to 200 nm. The thickness is preferably 3 nm or more and 100 nm or less, and more preferably 3 nm or more and 50 nm or less.

[0045] The conductive oxide semiconductor film 155b is an In-M-Zn oxide film (wherein M is Al, Ga, In the case of Y, Zr, Sn, La, Ce, or Nd), an In-M-Zn oxide film is formed. The atomic ratio of the metal elements in the sputtering target used for this purpose is In≧M, Zn≧M. It is preferable that the atomic ratio of the metal elements in such a sputtering target is In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn= 2:1:1.5, In:M:Zn=2:1:2.3, In:M:Zn=2:1:3, In The oxide semiconductor film 155b having a conductive property is preferably formed of M and Zn in a ratio of 3:1:2. The atomic ratios are calculated by taking into account the error of the metal elements contained in the sputtering target. The atomic ratio can vary by ±40%.

[0046] The conductive oxide semiconductor film 155b may have, for example, a non-single crystal structure. The crystal structure is, for example, CAAC-OS (C Axis Aligned Crystal-Semiconductor) stalline oxide semiconductor), polycrystalline structure, described later In non-single crystal structures, the amorphous structure is the most defect-free. The CAAC-OS has the lowest defect state density.

[0047] Note that the conductive oxide semiconductor film 155b has an amorphous structure and a microcrystalline structure. A mixture of two or more regions of the following structures: a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. The mixed film may be, for example, a region having an amorphous structure, a region having a microcrystalline structure, a region having a polycrystalline structure, or the like. The structure has two or more regions, either a region of CAAC-OS structure or a region of single crystal structure. In addition, the mixed film may have a single layer structure, for example, an amorphous structure region, a microcrystalline structure region, and Two or more of the following regions are included: a region of a polycrystalline structure, a region of a CAAC-OS structure, and a region of a single crystal structure It may have a stacked structure of regions.

[0048] The insulating film 157 and the insulating film 157a are preferably formed using a film containing hydrogen. In practice, the oxide semiconductor film is preferably formed using a silicon nitride film containing hydrogen. When hydrogen is contained in the insulating film 157 and the insulating film 157a, the hydrogen is transferred to the oxide semiconductor film. In this way, a conductive oxide semiconductor film 155b can be formed.

[0049] The conductive oxide semiconductor film 155b contains impurities. Impurities contained in the film 155b include hydrogen. , boron, phosphorus, nitrogen, tin, antimony, rare gas elements, alkali metals, alkaline earth metals Genera etc. may also be included.

[0050] The hydrogen concentration in the conductive oxide semiconductor film 155b is 8×10 19 atoms / cm 3 More than 1×10 20 atoms / cm 3 More than 5×10 20 at oms / cm 3 That's all.

[0051] The conductive oxide semiconductor film 155b has defects and contains impurities, and thus is conductive. The conductive oxide semiconductor film 155b has a resistivity of 1×10 -3 Ωcm More than 1×10 4 Ωcm, and more preferably a resistivity of 1×10 -3 Ωcm or more 1×1 0 -1 It is preferably less than Ωcm.

[0052] The conductivity of the conductive oxide semiconductor film 155b is typically 1×10 -2 S / m or more 1×10 5 S / m or less, or 1×10 3 S / m or more 1×10 5 S / m or less It would be good to do so.

[0053] The conductive oxide semiconductor film 155b contains defects as well as impurities. In the conductive oxide semiconductor film 155b, oxygen is removed by heat treatment in a vacuum atmosphere. The film has defects caused by the desorption of rare gases. Alternatively, in the process of forming the insulating film 153a or the insulating film 157, This is a film in which defects are generated by exposure to plasma.

[0054] In an oxide semiconductor, when hydrogen enters an oxygen vacancy site, a donor level is formed near the conduction band. As a result, the oxide semiconductor becomes conductive and has high electrical conductivity. An oxide semiconductor can be called an oxide conductor. In general, an oxide semiconductor has a wide gap. The oxide semiconductor has a wide band gap. Since the oxide conductor is made conductive while maintaining its conductivity, the oxide conductor has light-transmitting properties.

[0055] Various substrates can be used as the substrate 151, and it is not limited to a specific one. Examples of the substrate include a semiconductor substrate (e.g., a single crystal substrate or a silicon substrate), an SOI Substrate, glass substrate, quartz substrate, plastic substrate, metal substrate, stainless steel substrate, Substrate with stainless steel foil, tungsten substrate, tungsten foil A substrate having a fibrous material, a flexible substrate, a laminated film, a paper containing a fibrous material, or a base film Examples of glass substrates include barium borosilicate glass and aluminoborose glass. The materials used are fluoride glass, soda lime glass, etc. Flexible substrates, lamination films, substrates Examples of material films include the following: Polyethylene naphthalate (PET), Polyethylene naphthalate (PEN), Polyethersulfone ( One example is a plastic such as acrylic. Examples include polypropylene, polyester, and polyvinyl fluoride. Polyvinyl chloride, etc., or polyester, polyamide, etc. , polyimide, aramid, epoxy, inorganic vapor deposition film, paper, etc. By manufacturing transistors using a conductor substrate, a single crystal substrate, or an SOI substrate, It has little variation in characteristics, size, or shape, high current capacity, and small size. It is possible to manufacture transistors. Circuits are constructed using such transistors. As a result, it is possible to reduce the power consumption of the circuit or to increase the degree of integration of the circuit.

[0056] In addition, a flexible substrate is used as the substrate 151, and a transistor is formed directly on the flexible substrate. Alternatively, a separation layer may be provided between the substrate 151 and the transistor. After a semiconductor device is partially or entirely completed on the substrate, the semiconductor device is separated from the substrate 151 and another In this case, the transistors are transferred to a substrate with poor heat resistance or a flexible substrate. The transfer can also be performed on a flexible substrate. The above-mentioned release layer may be, for example, a tungsten film and a silicon oxide film. The laminated structure of the inorganic film with the silicon film, or the organic resin film such as polyimide is formed on the substrate. The above configuration can be used.

[0057] An example of a substrate on which a transistor is transferred is a substrate on which the above-mentioned transistor is formed. In addition to the substrates that can be used, paper substrates, cellophane substrates, aramid film substrates, polyimide film substrates, Rubber substrate, stone substrate, wood substrate, fabric substrate (natural fibers (silk, cotton, hemp), synthetic fibers (nylon) , polyurethane, polyester) or regenerated fibers (acetate, cupra, rayon, (including recycled polyester), leather substrates, or rubber substrates. By using this, it is possible to form transistors with good characteristics and transistors with low power consumption. It is possible to manufacture devices that are less likely to break, have heat resistance, and are lighter or thinner.

[0058] The insulating films 153 and 153a may be made of, for example, silicon oxide, silicon oxynitride, or aluminum oxide. oxide, hafnium oxide, gallium oxide, or Ga-Zn-based metal oxides. An oxide insulating film may be used, and may be formed as a laminate or a single layer. A silicon nitride film is a film whose composition contains more oxygen than nitrogen. The silicon nitride film refers to a film whose composition contains more nitrogen than oxygen.

[0059] The insulating films 157 and 157a may be made of silicon nitride, silicon oxynitride, or aluminum nitride. The insulating film can be formed using a nitride insulating film using aluminum nitride oxide, aluminum oxide nitride, or the like.

[0060] <Method 1 for forming conductive oxide semiconductor film 155b> First, a method for manufacturing the conductive oxide semiconductor film 155b shown in FIG. This will be explained with reference to FIG.

[0061] First, prepare a substrate 151. Here, a glass substrate is used as the substrate 151.

[0062] As shown in FIG. 2A, an insulating film 153 is formed on a substrate 151, and an oxide film is formed on the insulating film 153. Next, the oxide semiconductor film 155 is doped with helium, neon, or arsenic. Add rare gas 154 such as argon, krypton, or xenon.

[0063] The insulating film 153 is formed by sputtering, CVD, vacuum deposition, pulsed laser deposition (P The layer can be formed by a laser diode (LD) method, a thermal CVD method, or the like.

[0064] A method for forming the oxide semiconductor film 155 is described below.

[0065] Sputtering method, coating method, pulsed laser deposition method, laser ablation method, thermal C An oxide semiconductor film is formed by a VD method or the like. Next, a photoresist is formed on the oxide semiconductor film. After a mask is formed by a lithography process, the oxide semiconductor film is etched using the mask. By this, the oxide semiconductor film 155 can be formed.

[0066] The sputtering gas is a rare gas (typically argon), oxygen, or a mixture of a rare gas and oxygen. When using a mixture of rare gas and oxygen, the ratio of oxygen to rare gas is It is preferable to increase the gas ratio.

[0067] The target may be appropriately selected depending on the composition of the oxide semiconductor film to be formed. .

[0068] Note that when the oxide semiconductor film is formed by, for example, a sputtering method, The temperature is set to 150° C. or higher and 750° C. or lower, preferably 150° C. or higher and 450° C. or lower, and more preferably The oxide semiconductor film is formed at a temperature of 200° C. or higher and 350° C. or lower. S film can be formed.

[0069] In addition, in order to deposit a CAAC-OS film as an oxide semiconductor film, the following conditions were applied. It is preferable that

[0070] By suppressing the inclusion of impurities during film formation, it is possible to prevent the crystal state from being destroyed by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the deposition chamber can be In addition, the impurity concentration in the deposition gas may be reduced. A deposition gas having a temperature of −80° C. or lower, preferably −100° C. or lower is used.

[0071] Using an atomic layer deposition (ALD) system, oxide semiconductor films, such as In-Ga- When forming a Zn-O film, In(CH3)3 gas and O3 gas are introduced in sequence. Then, Ga(CH3)3 gas and O3 gas are introduced simultaneously to form an In-O layer. An O layer is formed, and then Zn(CH3)2 and O3 gas are introduced simultaneously to form a ZnO layer. The order of these layers is not limited to this example. A mixed compound layer such as a Ga-O layer, an In-Zn-O layer, or a Ga-Zn-O layer may be formed. In addition, instead of O3 gas, H2O gas obtained by bubbling with an inert gas such as Ar was used. However, it is preferable to use O3 gas that does not contain H. In(CH3)3 gas is also used. Instead of gas, In(C2H5)3 gas may be used. In addition, Ga(C2H5)3 gas may be used. Zn(CH3)2 gas may also be used. good.

[0072] After that, heat treatment is performed to release hydrogen, water, and the like from the oxide semiconductor film 155. In addition, the hydrogen concentration and the water concentration in the oxide semiconductor film 155 may be reduced by the heat treatment. As a result, oxygen is released from the oxide semiconductor film 155, and defects can be formed. Therefore, variation in the hydrogen concentration in the oxide semiconductor film 155b to be formed later can be reduced. The temperature of the heat treatment is typically 250° C. or higher and 650° C. or lower, preferably 300° C. The temperature of the heat treatment is typically 300° C. or higher and 400° C. or lower. ℃ or less, preferably 320℃ to 370℃, This makes it possible to reduce warping and shrinkage, thereby improving yields.

[0073] The heat treatment can be performed using an electric furnace, an RTA device, or the like. This allows heat treatment at a temperature above the distortion point of the substrate for a short period of time. It is possible to shorten the heat treatment time and reduce the warping of the substrate during heat treatment. This is particularly preferable for large area substrates.

[0074] The heat treatment is carried out in an atmosphere of nitrogen, oxygen, or ultra-dry air (water content of 20 ppm or less, preferably air at less than 1 ppm, preferably less than 10 ppb), or rare gases (argon, helium The above-mentioned nitrogen, oxygen, ultra-dry air, or rare gas may be added to the water atmosphere. It is preferable that the solvent does not contain any nitrogen, water, etc.

[0075] As rare gas 154, helium, neon, argon, xenon, krypton, etc. are appropriately used. In addition, the rare gas 154 can be added to the oxide semiconductor film 155 by The methods include doping and ion implantation. Alternatively, the method uses a plasma containing rare gas 154 to oxidize the By exposing the oxide semiconductor film 155 to the gas, the rare gas 154 can be added to the oxide semiconductor film 155. can.

[0076] As a result, an oxide semiconductor film 155a including defects is formed as shown in FIG. This can be done.

[0077] Next, the oxide semiconductor film 155a including defects is heated in an atmosphere containing impurities. The atmosphere containing hydrogen includes at least one of hydrogen, nitrogen, water vapor, and the like.

[0078] Alternatively, the surface of the oxide semiconductor film 155a including defects is doped with boron, phosphorus, an alkali metal, or After exposure to the solution containing an alkaline earth metal, a heat treatment is performed.

[0079] The heat treatment is preferably performed under conditions that allow impurities to be supplied to the oxide semiconductor film. In general, the heating temperature is preferably 250°C or higher and 350°C or lower. By performing the heat treatment, it is possible to minimize the desorption of impurities from the oxide semiconductor film and to form the oxide semiconductor film. In this heat treatment, the pressure is preferably 0.1 Pa or more. Preferably, the pressure is 0.1 Pa or more and 101325 Pa or less, more preferably 1 Pa or more and 133 Pa or less. It is preferable to heat in a pressure atmosphere.

[0080] As a result, as shown in FIG. 2C, a conductive oxide semiconductor film 155b is formed. The conductive oxide semiconductor film 155b contains defects and impurities. The oxide semiconductor film 155b having the above-mentioned property is a thin oxide semiconductor film 155b having the above-mentioned property due to the action of defects and impurities. The electrical conductivity is increased compared to 55. One example of the effect of defects and impurities is the hydrogen vacancy in oxygen vacancies. When hydrogen enters the metal atom, electrons are generated as carriers. Or, some of the hydrogen bonds with the metal atom. By combining with oxygen, electrons are generated as carriers. As a result, the oxide semiconductor film 155b having conductivity is The conductive oxide semiconductor film 155b functions as an electrode or a wiring. Therefore, a light-transmitting electrode or wiring can be formed.

[0081] Through the above steps, a conductive oxide semiconductor film can be formed.

[0082] <Method 2 for forming conductive oxide semiconductor film 155b> Method for forming the conductive oxide semiconductor film 155b by a method different from that shown in FIG. This will be explained using Figure 3.

[0083] As shown in FIG. 3A, an insulating film 153 is formed on a substrate 151. An oxide semiconductor film 155 is formed on the insulating film 151. Next, heat treatment is performed in a vacuum atmosphere. By the heat treatment, oxygen is released from the oxide semiconductor film 155; In this manner, the oxide semiconductor film 155a having defects can be formed. A typical example of defects in the oxide semiconductor film 155a shown in FIG.

[0084] The heat treatment is preferably performed under conditions in which oxygen is released from the oxide semiconductor film. In particular, the temperature is preferably 350° C. or higher and 800° C. or lower, and more preferably 450° C. or higher and 800° C. or lower. When heat treatment is performed at 350° C. or higher, oxygen is released from the oxide semiconductor film. On the other hand, by performing heat treatment at 800° C. or less, the crystal structure of the oxide semiconductor film is maintained. In addition, oxygen can be released from the oxide semiconductor film. There is 1×10 -7 Pa or more and 10 Pa or less, preferably 1×10 -7 Pa or more and 1Pa or less, Preferably 1 x 10 -7 Pa or more 1×10 -1 It is preferable to heat the device in a pressure atmosphere of less than 1 Pa. I wish.

[0085] Next, the oxide semiconductor film 155a including defects is treated with an impurity The atmosphere containing impurities is hydrogen, nitrogen, water vapor, etc. There is an atmosphere that includes one or more of these.

[0086] Alternatively, the surface of the oxide semiconductor film 155a including defects is doped with boron, phosphorus, an alkali metal, or After exposure to the solution containing an alkaline earth metal, a heat treatment is performed.

[0087] As a result, as shown in FIG. 3C, a conductive oxide semiconductor film 155b is formed. It is possible.

[0088] <Method 3 for forming conductive oxide semiconductor film 155b> Method for forming the conductive oxide semiconductor film 155b by a method different from that shown in FIGS. This will be explained with reference to FIG.

[0089] As shown in FIG. 4A, an insulating film 153 is formed on a substrate 151, and then a An oxide semiconductor film 155 is formed on the first insulating film 151 .

[0090] Next, as shown in FIG. 4B, a hydrogen-containing The insulating film 157 is formed by sputtering, plasma CVD, or the like. The insulating film 157 may be formed while being heated. After the formation, a heat treatment may be carried out.

[0091] The insulating film 157 is formed by a sputtering method, a plasma CVD method, or the like. As a result, the oxide semiconductor film 155 is damaged and defects are formed. The hydrogen contained in the oxide semiconductor film 155 moves to the oxide semiconductor film 155. As a result, as shown in FIG. In this case, the oxide semiconductor film 155b having conductivity can be formed on the oxide semiconductor film 155b. As a result, the conductivity of the oxide semiconductor film 155 is increased compared to that of the oxide semiconductor film 155. The organic semiconductor film 155b functions as an electrode or wiring.

[0092] <Variation 1> The conductive oxide semiconductor film 155b described in this embodiment is a conductive oxide semiconductor film formed of a metal film. Therefore, the oxide semiconductor film 155b having conductivity has a higher resistivity than the oxide semiconductor film 155b having conductivity. It is preferable that the conductive film formed of a metal film is in contact with the wiring. The structure will be explained with reference to FIG.

[0093] FIG. 5A illustrates a conductive oxide semiconductor film and a conductive film in contact with the oxide semiconductor film. A cross-sectional view is shown.

[0094] In FIG. 5A, an insulating film 153 and a conductive oxide semiconductor over the insulating film 153 A conductive film 159 is formed on the substrate 151. The conductive film 159 is a conductive oxide semiconductor. It is formed on the conductive film 155b.

[0095] As shown in FIG. 5B, an insulating film 153 and a conductive oxide semiconductor film 155 An insulating film 157 may be formed over the conductive film 159.

[0096] As shown in FIG. 5C, a conductive oxide semiconductor film 1 In this case, the conductive oxide semiconductor film 155b and the conductive oxide semiconductor film 55b may be formed. An insulating film 153a can be provided over the film 159.

[0097] The conductive film 159 may be made of aluminum, titanium, chromium, nickel, copper, yttrium, or zinc. An element consisting of chromium, molybdenum, iron, cobalt, silver, tantalum, or tungsten. Metals or alloys mainly made of metals are used in a single layer or multilayer structure. For example, Single layer structure of aluminum film containing silicon, single layer structure of copper film containing manganese, on titanium film A two-layer structure in which an aluminum film is laminated on a tungsten film, and a two-layer structure in which an aluminum film is laminated on a tungsten film Layer structure, two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film, titanium film A two-layer structure in which a copper film is laminated on top of a tungsten film, a two-layer structure in which a copper film is laminated on a tungsten film, and a manganese A two-layer structure in which a copper film is laminated on a copper film containing titanium or titanium nitride, and the titanium film or An aluminum film or copper film is laminated on the titanium nitride film, and a titanium film is further laminated on the aluminum film or copper film. A three-layer structure forming a titanium nitride film or a molybdenum nitride film, an aluminum film or a copper film is laminated on the molybdenum film or the molybdenum nitride film; A three-layer structure in which a molybdenum film or a molybdenum nitride film is formed on top of the above, and a manganese-containing film is formed on the above. There are three-layer structures, such as a copper film containing manganese on top of a copper film containing manganese. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

[0098] <Variation 2> Here, modified examples of a conductive oxide semiconductor film and a conductive film will be described with reference to FIGS. .

[0099] In FIG. 6, a conductive oxide semiconductor film 155b is formed between the insulating film 153 and the conductive oxide semiconductor film 155b. It may have a membrane 159 .

[0100] Note that the conductive film 159 may have the same structure as that of the conductive film 159 shown in Modification 1 of this embodiment. It is possible.

[0101] The configurations and methods described in this embodiment may be used in conjunction with the configurations and methods described in other embodiments. They can be used in any suitable combination.

[0102] (Embodiment 2) In this embodiment, a resistor including the conductive oxide semiconductor film described in Embodiment 1 This will be described with reference to FIGS.

[0103] FIG. 7 shows a cross-sectional view of a resistor element included in the semiconductor device.

[0104] The resistor 160a illustrated in FIG. 7A includes a conductive oxide semiconductor film 155b and A pair of conductive films 161 and 162 are provided in contact with the conductive oxide semiconductor film 155b. The conductive oxide semiconductor film 155b and the pair of conductive films 161 and 162 are each a substrate. It is provided on an insulating film 153 formed on 151 .

[0105] Each of the pair of conductive films 161 and 162 has a single layer structure or a stacked structure of two or more layers. The pair of conductive films 161 and 162 may have the same structure as the conductive film 159 in Embodiment 1. Any suitable structure, material and method of formation may be used.

[0106] Also, as in the case of a resistor element 160b shown in FIG. 7B, an insulating film 153, a conductive acid A hydrogen-containing film is formed on the nitride semiconductor film 155b and the pair of conductive films 161 and 162. An insulating film 157 may also be formed.

[0107] Also, as shown in FIG. 7C, a resistor element 160c is formed of an insulating film containing hydrogen. A conductive oxide semiconductor film 155b and a pair of conductive films 161 and 16 In this case, the conductive oxide semiconductor film 155b and the pair of conductive films 2 may be formed. An insulating film 153a may be provided on the conductive films 161 and 162.

[0108] The conductive oxide semiconductor film 155b has a lower resistance than the pair of conductive films 161 and 162. Therefore, the conductive oxide semiconductor between the pair of conductive films 161 and 162 is The film 155b functions as a resistance element.

[0109] The conductive oxide semiconductor film 155b contains defects and impurities. The conductivity of the semiconductor film 155b is increased by the action of defects and impurities. The oxide semiconductor film 155b has a light-transmitting property. can be formed.

[0110] <Protection circuit diagram> Here, a protection circuit using the resistor element shown in this embodiment will be described with reference to FIG. Although the semiconductor device will be described here using a display device, other semiconductor devices may also be used. A protection circuit can be used.

[0111] FIG. 8A illustrates an example of a specific protection circuit 170a included in a semiconductor device.

[0112] The protective circuit 170a shown in FIG. 8A includes a resistor element 1 between a wiring 171 and a wiring 172. 73 and a diode-connected transistor 174.

[0113] The resistor element 173 is connected in series to the transistor 174. Control of the current flowing through the transistor 174, or as a protective resistor for the transistor 174 itself It can function.

[0114] The wiring 171 may be, for example, a scanning line or a data line included in the display device, or may be a line extending from a terminal portion. The wiring 172 corresponds to a wiring that is routed from the gate driver to the drive circuit section. The potential of the power supply line (VDD, VSS or The wiring 172 corresponds to a wiring to which a common potential (GND) is applied. ) corresponds to a wiring (common line) to which

[0115] An example of the wiring 172 is a power line for supplying power to a scanning line driving circuit, particularly a low It is preferable to connect the gate signal line to a wiring that supplies a low potential. Therefore, the potential of the wiring 172 is also low. In this case, the current leaking from the gate signal line to the wiring 172 during normal operation is This is because it is possible to reduce the

[0116] In FIG. 8A, a resistor element 173 is connected in series with a diode-connected transistor. However, the present invention is not limited to this, and may be applied to a diode-connected transistor and They can also be connected in parallel.

[0117] Next, FIG. 8B shows a protection circuit composed of a plurality of transistors and a plurality of resistor elements. show.

[0118] The protective circuit 170b shown in FIG. 174d and resistor elements 173a, 173b, and 173c. 0b is any one of a scanning line driving circuit, a signal line driving circuit, and a pixel unit included in the display device The transistor is provided between wirings 175, 176, and 177 connected to one or more of the transistors. 174a is a first terminal having a function as a source electrode and a second terminal having a function as a gate electrode. a second terminal connected to the first terminal and functioning as a drain electrode; and a third terminal connected to the second terminal and functioning as a drain electrode. The transistor 174b is connected to the first terminal having a function as a source electrode. The first terminal is connected to a second terminal having a function as a gate electrode, and the second terminal is connected to a drain electrode. A third terminal having both functions is connected to a first terminal of a transistor 174a. The transistor 174c has a first terminal functioning as a source electrode and a second terminal functioning as a gate electrode. a second terminal having a function as a drain electrode; and a third terminal having a function as a drain electrode. and a first terminal of the transistor 174b are connected to each other. The transistor 174d is A first terminal having a function as a source electrode, and a second terminal having a function as a gate electrode. The third terminal is connected to the wiring 177 and the wiring 175 and functions as a drain electrode. The first terminal of the resistor element 173a is connected to the first terminal of the transistor 174c. The resistor element 173c is provided on the wiring 177. The resistor element 173b is provided on the wiring 176. and a first terminal of the transistor 174b and a third terminal of the transistor 174c. It is being done.

[0119] The wiring 175 is used as, for example, a power supply line to which a low power supply potential VSS is applied. The wiring 176 can be used as a common line, for example. The line 177 can be used, for example, as a power supply line to which a high power supply potential VDD is applied.

[0120] The resistor element shown in this embodiment is applied to the resistor element shown in FIG. Note that the shape of a conductive oxide semiconductor film included in a resistor element, specifically, By adjusting the length or width, it is possible to make a resistor element with any resistance value. An example of the resistor element 160d is shown in FIG. 9(A). 9(B) is a cross-sectional view taken along dashed line AB in FIG. Like the resistor 160d, the top surface of the conductive oxide semiconductor film 155c has a zigzag shape. The resistance value of the resistor element can be controlled by forming the resistor element into a block shape.

[0121] In this manner, the protection circuit 170b includes a plurality of diode-connected transistors and a plurality of That is, the protection circuit 170b is configured by a diode-connected resistor element. A transistor and a resistor element connected in parallel can be used.

[0122] By providing a protection circuit in this way, ESD (Electrostatic Discharge) This increases the resistance to overcurrent caused by Therefore, it is possible to provide a semiconductor device with improved reliability.

[0123] Furthermore, a resistor element is used as a protection circuit, and the resistance value of the resistor element can be adjusted arbitrarily. Therefore, it is possible to protect diode-connected transistors and other devices used as protection circuits. It becomes Noh.

[0124] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done.

[0125] <Variation 1> Here, a modified example of the resistance element will be described with reference to FIG.

[0126] The resistor 160g shown in FIG. 10 includes an insulating film 153 and a conductive oxide semiconductor film 1 A pair of conductive films 163 and 164 are provided between the electrodes 55b.

[0127] The pair of conductive films 163 and 164 may have the same structure and material as the conductive film 159 in Embodiment 1. can be used appropriately.

[0128] The configurations and methods described in this embodiment may be used in conjunction with the configurations and methods described in other embodiments. They can be used in any suitable combination.

[0129] (Embodiment 3) In this embodiment, a capacitor including the conductive oxide semiconductor film described in Embodiment 1 will be described. This will be described with reference to FIG. 11 and FIG.

[0130] FIG. 11 is a cross-sectional view of a capacitor included in a semiconductor device.

[0131] The capacitor 180a illustrated in FIG. 11A includes a conductive oxide semiconductor film 155b and The insulating film 157 is in contact with the conductive oxide semiconductor film 155b. The conductive film 181 overlaps with the oxide semiconductor film 155b. A conductive film that functions as a wiring is in contact with the semiconductor film 155b or the conductive film 181. Here, the conductive film 1 in contact with the oxide semiconductor film 155b having conductivity may be formed. Note that the conductive oxide semiconductor film 155b, the insulating film 157, and the conductive film Each of the electrodes 159 is provided on an insulating film 153 formed on a substrate 151 .

[0132] The conductive film 159 has a structure, a material, and a formation method similar to those of the conductive film 159 described in Embodiment 1. It can be used appropriately.

[0133] As shown in FIG. 11B, a capacitor element 180b is provided on the insulating film 157a. In this case, the oxide semiconductor film 155b and the conductive film 159 may be formed. The insulating film 153a is provided between the oxide semiconductor film 155b having the above structure and the conductive film 181. can be done.

[0134] The conductive film 181 may be made of aluminum, titanium, chromium, nickel, copper, yttrium, or zinc. An element consisting of chromium, molybdenum, iron, cobalt, silver, tantalum, or tungsten. Metals or alloys mainly made of metals are used in a single layer or multilayer structure. For example, Single layer structure of aluminum film containing silicon, single layer structure of copper film containing manganese, on titanium film A two-layer structure in which an aluminum film is laminated on a tungsten film, and a two-layer structure in which an aluminum film is laminated on a tungsten film Layer structure, two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film, titanium film A two-layer structure in which a copper film is laminated on top of a tungsten film, a two-layer structure in which a copper film is laminated on a tungsten film, and a manganese A two-layer structure in which a copper film is laminated on a copper film containing titanium or titanium nitride, and the titanium film or An aluminum film or copper film is laminated on the titanium nitride film, and a titanium film is further laminated on the aluminum film or copper film. A three-layer structure forming a titanium nitride film or a molybdenum nitride film, an aluminum film or a copper film is laminated on the molybdenum film or the molybdenum nitride film; A three-layer structure in which a molybdenum film or a molybdenum nitride film is formed on top of the above, and a manganese-containing film is formed on the above. There are three-layer structures, such as a copper film containing manganese on top of a copper film containing manganese. do.

[0135] The conductive film 181 can have a structure and a material similar to those of the conductive film 159 as appropriate. do.

[0136] In addition, a light-transmitting conductive film can be used as the conductive film 181. The conductive film is made of indium oxide containing tungsten oxide, indium oxide containing tungsten oxide, Indium zinc oxide, indium oxide with titanium oxide, indium tin oxide with titanium oxide Oxide, ITO (Indium Tin Oxide) , indium zinc oxide, indium tin oxide with silicon oxide added, etc. It is possible.

[0137] The conductive oxide semiconductor film 155b contains defects and impurities. The conductivity of the semiconductor film 155b is increased by the action of defects and impurities. The oxide semiconductor film 155b has a light-transmitting property. By using a conductive film, a light-transmitting capacitor element can be formed.

[0138] <Variation 2> The capacitor 180e shown in FIG. 12 includes an insulating film 153 and a conductive oxide semiconductor film 1 A conductive film 159 is provided between the electrodes 55b.

[0139] The configurations and methods described in this embodiment may be used in conjunction with the configurations and methods described in other embodiments. They can be used in any suitable combination.

[0140] (Embodiment 4) In this embodiment, water (hereinafter, H2O When H2O is decomposed into H and OH, the behavior of H and OH is as follows: explain.

[0141] <1.H2O in IGZO> First, to investigate the effect of HO in IGZO, HO was added to IGZO. A model calculation was carried out. The specific calculation contents are shown below.

[0142] H2O molecules are placed on the InGaZnO4 crystal model (112 atoms) and the structure is optimized. The calculation model is shown in Figure 13. In Figure 13, 1, 2, and 3 represent the initial arrangement of H2O. show.

[0143] The calculation conditions are shown in Table 1. The optimized structure of the model with added H2O is shown in Figure 14.

[0144] [Table 1]

[0145] In both models, H2O decomposed into H and OH. Therefore, in IGZO, H It is difficult for the HO molecule to exist stably, and it has been found that the HO in IGZO decomposes into H and OH. Light.

[0146] Next, H and OH in IGZO will be described.

[0147] <2. H in IGZO> <2-(1) Diffusion of H> Here, the ease of hydrogen movement in the IGZO crystal was evaluated from the perspective of the activation barrier on the hydrogen movement path. Note that for the hydrogen movement mode, hopping from one oxygen to another oxygen and movement on one oxygen were assumed.

[0148] A schematic diagram of the region division in the single crystal IGZO (c-IGZO) where the hydrogen diffusion path was examined is shown in Fig. 15. Here, for the paths (in the ab-plane direction) in the InO2 region, (Ga,Zn)O region, and In O2-(Ga,Zn)O region shown in Fig. 15, respectively, and the paths crossing each region (c-axis direction) were examined.

[0149] For the evaluation of the activation barrier, it was carried out using the first-principles electronic state and molecular dynamics calculation package VASP (Vienna ab initio simulation package) and the NEB (Nudged Elastic Band) method, which is a chemical reaction path search method, was employed. The NEB method is a method for finding the state with the lowest required energy among the states connecting the initial state and the final state.

[0150] <<Intermediate region between InO2 plane and (Ga,Zn)O plane>> Fig. 16 shows the hydrogen movement path in the region between the InO2 plane and the (Ga,Zn)O plane and the activation barrier on that path. However, based on the most stable structure on the path, the energy of this structure was set as the origin of energy. Figs. 16(A) and 16(C) show the state of hydrogen movement. ​​​​These are referred to as route A and route B, respectively. The letters indicate the order of hydrogen transfer. In route A, the hydrogen moves from 3 to 4 in a straight line. On the other hand, in route B, hydrogen goes from 3 to 4 via 5. This is the route taken.

[0151] FIG. 16(B) shows the activity in the pathway in which hydrogen moves from 1 to 4 in pathway A. The calculation results of the hydrogenation barrier are shown in Fig. 16(D). In route B, hydrogen is converted from 1 to 4, and then to 5. The calculation results of the activation barrier for the pathway that moves through the nucleus are shown.

[0152] Compared with FIG. 16(B), the activation barrier shown in FIG. 16(D) is smaller, so hydrogen is 3 When going from 4 to 5, route B, which has a low barrier on the route, is likely to occur. When hydrogen moves through the region between the InO2 surface and the (Ga,Zn)O surface, the barrier on the path is low. It is expected that the more likely route B will occur.

[0153] <<(Ga,Zn)O region>> Next, the hydrogen migration pathway in the (Ga,Zn)O region and the activation barrier on that pathway are The structure is shown in Figure 17. The most stable structure on the path is used as the standard, and this structure is used as the energy origin. Figure 17(A) shows the hydrogen migration in the hydrogen migration path in the (Ga,Zn)O region. In Figure 17(A), the numbers indicate the order of hydrogen transfer. Figure 17(B) shows In FIG. 17(A), the calculated activation barrier for the hydrogen transfer path from 1 to 4 is shown. The results are shown.

[0154] From Figure 17(B), the activation barrier for hydrogen transfer in the (Ga,Zn)O region is 0.1 It can be seen that it is as low as about 6 eV. When only considering the height of the barrier, when hydrogen exists in the (Ga,Zn)O region, compared with the case where it exists in the region between the InO2 surface and the (Ga,Zn)O surface, the frequency of hydrogen movement is expected to be higher.

[0155] <<InO2 region>> Next, the hydrogen movement path in the InO2 region and the activation barrier on that path are shown in Fig. 18. However, based on the most stable structure on the path, this structure is taken as the energy origin. Fig. 1 8(A) shows the state of hydrogen movement in the hydrogen movement path in the InO2 region. Fig. 1 In 8(A), the numbers indicate the order of hydrogen movement. Fig. 18(B) shows the calculation results of the activation barrier in the path where hydrogen moves from 1 to 4 in Fig. 18(A). From Fig. 18, it can be seen that the activation barrier is very large compared with the paths in other regions.

[0156] Therefore, it is considered that hydrogen movement is less likely to occur in the InO2 region compared with other regions.

[0157] Next, the hydrogen movement path along the c-axis direction and the activation barrier on that path are shown in Fig. 19. However, based on the most stable structure on the path, this structure is taken as the energy origin. Fig. 19( A) shows the state of hydrogen movement in the hydrogen movement path along the c-axis direction. Fig. 19(A) In it, the numbers indicate the order of hydrogen movement. Fig. 19(B) shows the calculation results of the activation barrier in the path where hydrogen moves from 1 to 8 in Fig. 19(A).

[0158] From Fig. 19, there is a large activation barrier when entering or exiting the (Ga,Zn)O region. ​​​This is thought to be because the hydrogen transfer pathway blocks the M (metal)-O bond. In addition, the presence of a large barrier to diffusion in the InO2 region is confirmed. The frequency of continuous hydrogen transfer is expected to be low. One of the reasons for this is thought to be the large ionic radius of In.

[0159] Here, the reaction frequency (Γ) is calculated using the calculated activation barrier and the following formula 1. Ta.

[0160]

number

[0161] where Ea is the maximum activation barrier of the pathway, k B is the Boltzmann constant, T is the absolute temperature, and ν is the frequency The factors are shown.

[0162] Finally, the migration frequency estimated using the maximum barrier height on each route is shown in Table 2.

[0163] [Table 2]

[0164] At both 27℃ and 450℃, the region between the InO2 surface and the (Ga,Zn)O surface and the (Ga, The migration frequency is highest in the ZnO region, while the InO2 region (c-axis direction) shows high activity. It was found that the frequency of migration tends to be low due to the activation barrier. suggests that hydrogen diffuses preferentially along the ab plane. However, heating at 450 °C It was found that H diffuses sufficiently into the IGZO film during processing.

[0165] <2-(2).Oxygen deficiency V OEasy to create site> The strength of the metal-oxygen bond varies depending on the type and valence of the metal, so oxygen deficiency in IGZO Loss V O The ease of formation is thought to vary depending on the type, number, and distance of the metals to be bonded. Therefore, we calculated the susceptibility of oxygen vacancies to occur in the InGaZnO4 crystal model.

[0166] For the calculation, an InGaZnO4 crystal model (112 atoms) was used. This model is shown in Figure 20. The Ga and Zn in the (Ga,Zn)O region are arranged in such a way that they are energetically stable. In this case, the number of types of oxygen sites is four, based on the number of bond partners (as shown in Figure 20). 1 to 4) The details of each oxygen site are shown in Table 3.

[0167] [Table 3]

[0168] By removing one oxygen atom from the oxygen site of the above model, an oxygen vacancy model was created. The total energy after structural optimization was compared. The calculation conditions are shown in Table 4.

[0169] [Table 4]

[0170] The total energy was compared with the optimized structure. The relative values ​​of the total energy are shown in FIG. 21, taking the total energy of the sample as the reference (0.0 eV). As shown in Figure 21, oxygen vacancies are easily formed at oxygen site 4, and oxygen site 2 is relatively On the other hand, oxygen sites 1 and 3 are easily formed. It is thought that this is less likely to form than site 2 and oxygen site 4.

[0171] <2-(3). H O Ease of formation and stability The calculation result that H diffuses in IGZO, especially during heat treatment, is shown in <2-(1) Diffusion of H was explained in the previous section. Therefore, here, oxygen vacancy V O If present, H is an acid Deficiency V O Here, we calculated whether oxygen vacancy V O There is an H in Status H O (V O It may also be written as H.

[0172] As shown in Fig. 22, an InGaZnO4 crystal model was used for the calculation. Here, H O Medium The H in V O The activation barrier (E a ) using the NEB method The calculation conditions are shown in Table 5.

[0173] [Table 5] First, <2-(2). Oxygen deficiency (V O Based on the calculation results of the site where , oxygen deficiency V O There are two oxygen sites that are prone to forming oxygen vacancies. First, oxygen vacancies V O Form The oxygen site with three In atoms and one Zn atom bonded to it (see Figure 22) is the most likely oxygen site. Calculations were performed on 1).

[0174] The model of the initial state is shown in FIG. 23(A), and the model of the final state is shown in FIG. 23(B). In addition, the calculated activation barrier (E a ) is shown in Figure 24. Here, the initial state is oxygen vacancy V OThere is an H inside (H O ) and the final state is , oxygen deficiency V O and the state where oxygen is bonded to one Ga atom and two Zn atoms and H is bonded (H -O).

[0175] As a result of the calculation, oxygen deficiency V O It takes about 1.52 eV of energy for the H in the molecule to bond with another O. is required, whereas H bonded to O is oxygen vacant V O It takes about 0.46 eV to enter Energy was needed.

[0176] Here, the calculated activation barrier (E a ) and the above formula 1, the reaction frequency (Γ) In the formula 1, k B is the Boltzmann constant and T is the absolute temperature .

[0177] Frequency factor ν=10 13 [1 / sec] and the reaction frequency at 350°C was calculated. The frequency of H transfer from the model shown in Figure 23(A) to the model shown in Figure 23(B) is 5.5 2×10 0 [1 / sec]. Also, from the model shown in FIG. 23(B), The frequency of H transfer to the model shown in is 1.82×10 9 [1 / sec]. Therefore, H diffusing in IGZO is near the oxygen vacancy V. O If there is H O It is easy to form a Dan H O When oxygen vacancies are formed, V O It is thought that it is difficult to release from

[0178] Next, <2-(2). Oxygen deficiency V O Based on the calculation results of sites where oxygen deficiency is likely to occur, Loss VO The oxygen site that is most likely to form is one that is bonded to one Ga and two Zn. Calculations were performed for (2 shown in Figure 22).

[0179] The model of the initial state is shown in FIG. 25(A), and the model of the final state is shown in FIG. 25(B). In addition, the calculated activation barrier (E a ) is shown in Figure 26. Here, the initial state is oxygen vacancy V O There is an H inside (H O ) and the final state is , oxygen deficiency V O and the state where oxygen is bonded to one Ga atom and two Zn atoms and H is bonded (H -O).

[0180] As a result of the calculation, oxygen deficiency V O It takes about 1.75 eV of energy for the H in the molecule to bond with another O. is required, whereas H bonded to O is oxygen vacant V O It takes about 0.35 eV to enter Energy was needed.

[0181] In addition, the calculated activation barrier (E a ) and the above formula 1, the reaction frequency (Γ) is Calculated.

[0182] Frequency factor ν=10 13 [1 / sec] and the reaction frequency at 350°C was calculated. The frequency of H transfer from the model shown in Figure 25(A) to the model shown in Figure 25(B) is 7.5 3×10 -2 [1 / sec]. Also, from the model shown in FIG. 25(B), The frequency of H transfer to the model shown in 10 [1 / sec]. Therefore, for now, O When oxygen vacancies are formed, VO It is thought that H is unlikely to be released from

[0183] From the above, it can be seen that H in IGZO is easily diffused during heat treatment, and oxygen vacancies V O If there is is oxygen deficiency V O Enter the H o It was found that this is likely to occur.

[0184] <2-(4). H O Transition Levels > Oxygen vacancy in IGZO V O If and H exists, then <2-(3). H O Formation of From the calculation using the NEB method shown in the section on ease and stability, the oxygen deficiency V O and H is H O Shape It's easy to achieve and H O is considered to be stable. Therefore, H O is a career trap To investigate whether H O The transition level was calculated.

[0185] The calculation used an InGaZnO4 crystal model (112 atoms). The model is shown in Figure 22. Oxygen deficiency V O The oxygen site where the valence is most likely to occur is the oxygen bonded to three In atoms and one Zn atom (Figure 22) or oxygen bonded to one Ga and two Zn (2) in Fig. 22 Therefore, H was added to oxygen site 1 and oxygen site 2. O Create a model and transition levels The calculation conditions are shown in Table 6.

[0186] [Table 6]

[0187] By adjusting the mixing ratio of the exchange terms to obtain a band gap close to the experimental value, The band gap of the new InGaZnO4 crystal model is 3.08 eV, which is lower than the experimental value of 3.1 The result was close to 5 eV.

[0188] The transition level (ε(q / q')) of the model with defect D is calculated by the following formula 2. In addition, ΔE(D q ) is the formation energy of defect D at charge q, calculated from Eq. It is served.

[0189]

number

[0190]

number

[0191] In Formula 2 and Formula 3, E tot (D q ) is the charge q of the model including the defect D. Total energy, E tot (bulk) is the total energy of a defect-free model (perfect crystal), Δn i is the increase or decrease in the number of atoms i related to the defect, μ i is the chemical potential of atom i, ε VBM Missing The energy of the top of the valence band in the defect-free model, ΔV q is related to the electrostatic potential Correction term, E F is the Fermi energy.

[0192] Calculated H O The transition levels are shown in Fig. 27. The values ​​in Fig. 27 indicate the depth from the bottom of the conduction band. From Figure 27, H for oxygen site 1 O The transition level is 0.05e below the conduction band edge. V, and H on oxygen site 2 O The transition level of is located 0.11 eV below the conduction band edge. Therefore, each H O is thought to be involved in electron trapping. O It was revealed that H acts as a donor. O IGZO has electrical conductivity. It was revealed that it has.

[0193] <2-(5). H2O desorption from the surface> Next, we investigated the process in which H in IGZO is desorbed from the surface as H2O by heat treatment. The calculation was performed.

[0194] The surface of the InGaZnO4 crystal model was assumed to be a cleavage plane. The model used was the top surface (number of atoms: 112). The results are shown in Table 7.

[0195] [Table 7]

[0196] The InGaZnO4 surface model shows that two hydrogen atoms are bonded to the O atoms of the InO2 layer at the beginning of the reaction pathway. The following steps were calculated for the H2O desorption process:

[0197] (1) to (2) Steps in which the first H binds to the inside of the surface O (2) to (3) Steps in which the first H comes outside the surface O (3) to (4) Steps as the second H approaches (4) to (5) Steps in which the second H bond to the inside of the surface OH (5) to (6) Steps where the second H appears on the surface Steps (6) to (7) in which H2O is released

[0198] The structure of the model in the reaction process of the above steps is shown in Figure 29. The initial structure is The energy change when the standard (0.00 eV) is used is shown in Figure 30. The upper part shows the energy change in each of (1) to (7) in Fig. 29, and the lower part shows the energy change in each of (1) to (7) in Fig. 29. (1) to (7) are schematic diagrams of IGZO and the reaction of O and H on its surface, respectively. The figure shows:

[0199] The calculation results showed that when two H atoms are bonded to one O atom on the surface, H2O is released, resulting in an oxygen vacancy. V O In the reaction process in which α is formed (steps (6) to (7)), the maximum It was found that the energy is also high. Therefore, the reaction frequency from step (6) to (7) ( Γ) was calculated from Equation 1.

[0200] Frequency factor ν=1×10 13 The reaction frequency was calculated assuming a reaction rate of 35 At 0°C, the reaction frequency Γ = 3.66 × 10 4 [1 / sec]. From this, H H2O is released and oxygen deficiency V O The reaction in which It is possible.

[0201] (Embodiment 5) In this embodiment, a display device which is one embodiment of the present invention will be described with reference to drawings. In this embodiment, a capacitor including the conductive oxide semiconductor film described in Embodiment 1 is A display device having such a configuration will be described with reference to FIGS.

[0202] FIG. 31A shows an example of a display device. The display device shown in FIG. 31A has a pixel unit 10 1, a scanning line driving circuit 104, and a signal line driving circuit 106 are arranged in parallel or approximately in parallel. m scanning lines 107 are provided and the potentials of which are controlled by a scanning line driving circuit 104, The individual electrodes are arranged in parallel or approximately in parallel, and the potential is controlled by a signal line driver circuit 106. The pixel section 101 has n signal lines 109. The pixel 103 is arranged parallel or substantially parallel to the signal line 109. The capacitance line 115 may be arranged along the scanning line 107. The scanning line driving circuit 104 and the signal lines 105 may be arranged in parallel or approximately in parallel. The drive circuits 106 may be collectively referred to as a drive circuit section.

[0203] The display device includes a driving circuit for driving a plurality of pixels. A control circuit, a power supply circuit, a signal generating circuit, a backlight module, etc., arranged on the substrate It is sometimes called a liquid crystal module.

[0204] Each scanning line 107 corresponds to one of the pixels 103 arranged in m rows and n columns in the pixel section 101. The signal lines 109 are electrically connected to the n pixels 103 arranged in any one row. is m pixels 103 arranged in m rows and n columns, and m pixels 103 arranged in any one of the columns. 3. m and n are both integers of 1 or more. is m pixels 103 arranged in m rows and n columns, and m pixels 103 arranged in any one of the columns. 3. The capacitance lines 115 are arranged parallel to each other along the scanning lines 107. In the case where the pixels 103 are arranged in m rows and n columns, any one of the pixels 103 may be arranged in a matrix of m rows and n columns. The pixel array 104 is electrically connected to n pixels 103 arranged in a row.

[0205] In addition, when the liquid crystal display device is driven by FFS, the capacitance line is not provided, and the common line or the common The electrodes function as capacitance lines.

[0206] In this case, one pixel is defined as an area surrounded by scanning lines and signal lines and exhibiting one color. For this reason, in the case of a color display device consisting of the color elements R (red), G (green), and B (blue), In this case, the minimum unit of an image is composed of three pixels: an R pixel, a G pixel, and a B pixel. In addition, you can add pixels of yellow, cyan, magenta, etc. to R (red), G (green), and B (blue). This allows for improved color reproducibility. In addition, R (red), G (green), B (blue), and W (white) By adding the pixel, the power consumption of the display device can be reduced. In the case of , adding a W (white) pixel to each of R (red), G (green), and B (blue) Since it is possible to increase the brightness of the backlight, the brightness of the backlight can be reduced. This makes it possible to reduce the power consumption of the liquid crystal display device.

[0207] 31B and 31C show a pixel 103 of the display device shown in FIG. 31A. 1 shows an example of a circuit configuration that can be used.

[0208] The pixel 103 shown in FIG. 31B includes a liquid crystal element 121, a transistor 102, and a capacitor. child 105.

[0209] The potential of one of the pair of electrodes of the liquid crystal element 121 is appropriately set according to the specifications of the pixel 103. The alignment state of the liquid crystal element 121 is set by the written data. A common potential (common potential) is applied to one of a pair of electrodes of the liquid crystal element 121 of each pixel 103. In addition, one of the pair of electrodes of the liquid crystal element 121 for each row of the pixels 103 may be applied. may be given different potentials.

[0210] The liquid crystal element 121 controls the transmission or non-transmission of light by the optical modulation effect of the liquid crystal. The optical modulation effect of liquid crystals is achieved by the electric field applied to the liquid crystal (horizontal electric field, vertical electric field). The liquid crystal element 121 is controlled by an electric field in a direction or an electric field in an oblique direction. These include nematic liquid crystals, cholesteric liquid crystals, smectic liquid crystals, and thermotropic liquid crystals. , lyotropic liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc.

[0211] The display device having the liquid crystal element 121 can be driven in, for example, a TN mode or a VA mode. ASM (Axially Symmetric Aligned Micro-ce) ll) mode, OCB (Optically Compensated Birefringence ngence) mode, MVA mode, PVA (Patterned Vertical Alignment mode, IPS mode, FFS mode, or TBA (Tran You can also use the symmetric bend alignment mode. However, the present invention is not limited to this, and various liquid crystal elements and driving methods thereof can be used.

[0212] Also, a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent. The liquid crystal element may be configured by the liquid crystal that exhibits the blue phase. Since it is short and optically isotropic, alignment treatment is not required and viewing angle dependency is small.

[0213] In the configuration of the pixel 103 shown in FIG. 31B, the source electrode of the transistor 102 and One of the drain electrodes is electrically connected to the signal line 109, and the other is connected to one of the pair of liquid crystal elements 121. The gate electrode of the transistor 102 is electrically connected to the other electrode of the scan line. The transistor 102 is electrically connected to a transistor 107. The transistor 102 is turned on or off. Thus, the write control circuit 100 has a function of controlling the writing of data of the data signal.

[0214] In the configuration of the pixel 103 shown in FIG. 31B, one of a pair of electrodes of the capacitor 105 is The other is electrically connected to a pair of the liquid crystal elements 121. The potential value of the capacitance line 115 is determined based on the specifications of the pixel 103. The capacitance element 105 serves as a storage capacitor for storing written data. It has the function of

[0215] In addition, the pixel 103 shown in FIG. 31C has a transistor for switching a display element. 133, a transistor 102 for controlling the driving of the pixel, a transistor 135, and a capacitance element The display panel includes a light-emitting element 105 and a light-emitting element 131.

[0216] A data signal is applied to one of the source electrode and the drain electrode of the transistor 133. The gate electrode of the transistor 133 is electrically connected to the signal line 109. The pixel is electrically connected to a scanning line 107 to which a scanning signal is applied.

[0217] The transistor 133 is turned on or off to transmit the data of the data signal. It has the function of controlling the writing of data.

[0218] One of the source electrode and the drain electrode of the transistor 102 serves as an anode line. The source electrode and the drain electrode of the transistor 102 are electrically connected to the wiring 137. The other end is electrically connected to one electrode of the light-emitting element 131. The gate electrode of the second transistor is connected to the other of the source electrode and drain electrode of the transistor 133 and the capacitor It is electrically connected to one electrode of the element 105 .

[0219] The transistor 102 is turned on or off to produce a light emitting element 131. It has the function of controlling the flow of current.

[0220] One of the source and drain electrodes of the transistor 135 is provided with a data reference potential. The other of the source electrode and the drain electrode of the transistor 135 is connected to a wiring 139. , which is electrically connected to one electrode of the light-emitting element 131 and the other electrode of the capacitor 105. Furthermore, the gate electrode of the transistor 135 is connected to the scanning line 107 to which a gate signal is applied. are electrically connected.

[0221] The transistor 135 has a function of adjusting a current flowing through the light-emitting element 131. For example, When the internal resistance of the light emitting element 131 increases due to deterioration or the like of the light emitting element 131, the transistor The current flowing through the wiring 139 to which one of the source electrode and the drain electrode of the transistor 135 is connected is By monitoring, the current flowing through the light emitting element 131 can be corrected. The potential applied to 39 can be, for example, 0V.

[0222] One of a pair of electrodes of the capacitor 105 is connected to the gate electrode of the transistor 102 and the The other of the source electrode and the drain electrode of the transistor 133 is electrically connected to the capacitor element 105. The other of the pair of electrodes is the other of the source electrode and the drain electrode of the transistor 135, It is electrically connected to one electrode of the light emitting element 131 .

[0223] In the configuration of the pixel 103 shown in FIG. 31(C), the capacitance element 105 The capacitor functions as a storage capacitor to store data.

[0224] One of the pair of electrodes of the light emitting element 131 is a source electrode and a drain electrode of the transistor 135. The other electrode, the other electrode of the capacitor 105, and the source electrode and the drain electrode of the transistor 102 The other of the pair of electrodes of the light emitting element 131 is electrically connected to the cathode. The transistor 141 is electrically connected to a wiring 141 which functions as a gate.

[0225] The light-emitting element 131 may be, for example, an organic electroluminescence element (also called an organic EL element). However, the light emitting element 131 is not limited to this. Alternatively, an inorganic EL element made of an inorganic material may be used.

[0226] A high power supply potential VDD is applied to one of the wiring 137 and the wiring 141, and a In the configuration shown in FIG. 31C, a high power supply potential is applied to the wiring 137. A power supply potential VDD is applied to the wiring 141, and a low power supply potential VSS is applied to the wiring 142.

[0227] In addition, in FIG. 31(B) and FIG. 31(C), the liquid crystal element 121 and the light emitting element are used as the display element. Although an example using the element 131 has been described, one aspect of the embodiment of the present invention is not limited to this. It is also possible to use various display elements. For example, LEDs (white LEDs, red LEDs, green LEDs, etc.) LEDs (color LEDs, blue LEDs, etc.), transistors (transistors that emit light according to the current), Electron emission device, electronic ink, electrophoretic device, grating light valve (GLV), plastic Zuma Display (PDP), MEMS (Micro-Electro-Mechanical System) ), digital micromirror device (DMD), DMS (digital Micro Shutter), IMOD (Interference Modulation) element, Shutter-type MEMS display element, optical interference-type MEMS display element, electrowet Electromagnetic devices such as piezoelectric ceramic displays and carbon nanotubes. Those having a display medium whose contrast, brightness, reflectance, transmittance, etc. change depending on the action An example of a display device using an EL element is an EL display. An example of a display device using emission elements is a field emission display (FE D) or SED type flat panel display (SED: Surface-conductio n Electron-emitter Display) and others. An example of such a display device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, etc.). Display, reflective LCD display, direct-view LCD display, projection LCD display An example of a display device using electronic ink or electrophoretic elements is the electronic Paper, etc. In addition, semi-transmissive LCD displays and reflective LCD displays have been realized. In this case, a part or the whole of the pixel electrode is arranged to function as a reflective electrode. For example, a part or the whole of the pixel electrode may be made of aluminum, silver, etc. In this case, a memory circuit such as an SRAM may be provided under the reflective electrode. This makes it possible to further reduce power consumption.

[0228] Next, a specific configuration of the element substrate included in the display device will be described. A specific example of a liquid crystal display device using a liquid crystal element 103 will be described. A top view of the pixel 103 shown in FIG.

[0229] In this embodiment, a liquid crystal display device driven by FFS is used as the display device. A top view of a plurality of pixels 103a, 103b, and 103c is shown in FIG.

[0230] In FIG. 32, the conductive film 13 functioning as a scanning line is connected to the conductive film functioning as a signal line. The conductive wires function as signal lines. The film 21a extends in a direction (vertical direction in the figure) substantially perpendicular to the conductive film that functions as the scanning line. The conductive film 13 functioning as a scanning line is provided in the scanning line driving circuit 104 (FIG. 31. The conductive film 21a, which functions as a signal line, is electrically connected to the It is electrically connected to the line driver circuit 106 (see FIG. 31).

[0231] The transistor 102 includes a conductive film functioning as a scan line and a conductive film functioning as a signal line. The transistor 102 is provided in the region where the two intersect. A conductive film 13, a gate insulating film (not shown in FIG. 32), and a channel formed on the gate insulating film. The oxide semiconductor film 19a in which the regions are formed, the conductive layers functioning as a source electrode and a drain electrode, The conductive film 13 is a conductive film that functions as a scanning line. The oxide semiconductor film 19a also functions as a gate electrode of the transistor 102. The conductive film 21a functions as an electrode. The conductive film 21a also functions as a conductive film that functions as a signal line. A region overlapping with the oxide semiconductor film 19a is a source electrode or a drain electrode of the transistor 102. In FIG. 32, the conductive film that functions as the scanning line is In terms of shape, the end portion is located outside the end portion of the oxide semiconductor film 19a. The conductive film that functions as a light shielding film that blocks light from a light source such as a backlight. As a result, the oxide semiconductor film 19a included in the transistor is not irradiated with light. This makes it possible to suppress fluctuations in the electrical characteristics of the capacitor.

[0232] In the transistor 102, the organic insulating film 31 overlapping the oxide semiconductor film 19a is The organic insulating film 31 is formed by insulating an oxide semiconductor via an inorganic insulating film (not shown in FIG. 32). The oxide semiconductor film 19a, in particular, the region between the conductive films 21a and 21b, Overlap.

[0233] Since the organic insulating film 31 is formed separately for each transistor 10, water from the outside Since the organic insulating film 31 does not diffuse into the liquid crystal display device, It is therefore possible to reduce variation in the electrical characteristics of transistors.

[0234] The conductive film 21b is electrically connected to the oxide semiconductor film 19b having conductivity. In addition, a common electrode 29 is provided on the conductive oxide semiconductor film 19b via an insulating film. In the insulating film provided on the conductive oxide semiconductor film 19b, An opening 40 is provided, as indicated by a dashed line. The nitride semiconductor film 19b is in contact with a nitride insulating film (not shown in FIG. 32).

[0235] The common electrode 29 is a stripe-shaped electrode extending in a direction intersecting the conductive film 21a that functions as a signal line. The striped regions are parallel or parallel to the conductive film 21a that functions as a signal line. The stripes are connected to the regions extending in a direction substantially parallel to the stripes. In the common electrode 29, each stripe region has the same potential.

[0236] The capacitor 105 includes a conductive oxide semiconductor film 19b and a common electrode 29 overlapping each other. The conductive oxide semiconductor film 19b and the common electrode 29 are formed in a region where the ... That is, the capacitor 105 has a light-transmitting property.

[0237] As shown in FIG. 32, in an FFS mode liquid crystal display device, a conductor functioning as a signal line is A common electrode having a striped region extending in a direction intersecting the conductive film is provided, so that the control It is possible to manufacture a display device having excellent last characteristics.

[0238] In addition, since the capacitor 105 has a light-transmitting property, the capacitor 105 is large and is disposed in the pixel 103. Therefore, the aperture ratio can be increased, typically to 50% or more. Preferably, the capacitance of the display device can be increased to 60% or more. For example, in a display device with high resolution, such as a liquid crystal display device, The area of ​​the element is reduced, and the area of ​​the capacitive element is also reduced. This allows for a display device with high resolution. In this embodiment, however, the capacitance value stored in the capacitance element is small. Since the capacitor 105 has a light-transmitting property, the capacitor is provided in each pixel. It is possible to increase the aperture ratio while obtaining a sufficient capacitance value in the pixel density of 2 High resolution of 1000ppi or more, 300ppi or more, or even 500ppi or more The present invention can be suitably used in display devices.

[0239] In addition, in a liquid crystal display device, the larger the capacitance value of the capacitance element, the more In the liquid crystal display device, the period during which the alignment of the liquid crystal molecules in the liquid crystal element can be kept constant can be extended. When displaying a still image, the period can be extended, reducing the frequency with which image data is rewritten. It is possible to reduce the number of circuits, and therefore the power consumption. The structure shown in FIG. 1 can increase the aperture ratio even in a high-resolution display device. It is possible to efficiently use light from light sources such as backlights, thereby reducing the power consumption of display devices. It is possible.

[0240] Next, a cross-sectional view taken along the dashed line AB and CD in FIG. 32 is shown in FIG. The transistor 102 is a channel etch type transistor. 1B is a cross-sectional view of the transistor 102 in the channel length direction and the capacitor 105, and The cross-sectional view at D is a cross-sectional view of the transistor 102 in the channel width direction.

[0241] The liquid crystal display device described in this embodiment has a pair of substrates (a first substrate 11 and a second substrate 342). ), an element layer in contact with the first substrate 11, an element layer in contact with the second substrate 342, The element layer is a layer formed between the substrate and the liquid crystal layer. The substrate and the element layer may be collectively referred to as an element substrate. A liquid crystal element 322 is sandwiched between the substrates (first substrate 11 and second substrate 342).

[0242] The liquid crystal element 322 includes a conductive oxide semiconductor film 19b above the first substrate 11, A common electrode 29, a nitride insulating film 27, and a film for controlling the orientation (hereinafter referred to as an orientation film 33) are provided. ) and a liquid crystal layer 320. The common electrode 29 functions as one electrode (also called a pixel electrode) of the liquid crystal element 322. It functions as the other electrode of the crystal element 322.

[0243] First, the element layer formed on the first substrate 11 will be described. The transistor 102 is a transistor having a single gate structure and is provided on the first substrate 11. The first substrate 11 and the gate electrode 12 are connected to the conductive film 13. A nitride insulating film 15 is formed on the conductive film 13 that functions as an electrode. The oxide insulating film 17 formed on the nitride insulating film 15 and the oxide insulating film 17 are interposed between the gate electrode 11 and the nitride insulating film 15. The oxide semiconductor film 19a overlaps with the conductive film 13 functioning as a back electrode, and the oxide semiconductor film 19 a and conductive films 21a and 21b functioning as a source electrode and a drain electrode. The nitride insulating film 15 and the oxide insulating film 17 function as the gate insulating film 14. , the oxide insulating film 17, the oxide semiconductor film 19a, and the insulating film 19b functioning as a source electrode and a drain electrode. An oxide insulating film 23 is formed on the conductive films 21a and 21b. The oxide insulating film 25 is formed on the nitride insulating film 15, the oxide insulating film 23, and the oxide insulating film 24. The nitride insulating film 27 is formed on the film 25 and the conductive film 21b. The insulating film 25 and the nitride insulating film 27 function as an inorganic insulating film 30. An oxide semiconductor film 19b having a conductive oxide layer is formed over the oxide insulating film 17. The semiconductor film 19b is provided with conductive films 21a and 21b which function as a source electrode and a drain electrode. Here, the other electrode is connected to the conductive film 21b. 7. In addition, the oxide semiconductor film of the transistor 102 is formed on the inorganic insulating film 30. It has an organic insulating film 31 overlapping with 19a.

[0244] The configuration of the display device will be described in detail below.

[0245] As the substrate 11, the substrate 151 described in Embodiment 1 can be used as appropriate.

[0246] The conductive film 13 functioning as the gate electrode is made of aluminum, chromium, copper, tantalum, titanium, etc. A metal element selected from the group consisting of tungsten, molybdenum, and tungsten, or a metal element selected from the group consisting of the above-mentioned metal elements. The metal elements may be alloys of the above metal elements or alloys of the above metal elements. In addition, one or more metal elements selected from manganese and zirconium may be used. The conductive film 13 functioning as the gate electrode may have a single-layer structure or a laminated structure of two or more layers. For example, a single layer structure of an aluminum film containing silicon, an aluminum film on a titanium film, A two-layer structure in which a titanium film is laminated on a titanium nitride film, a two-layer structure in which a titanium film is laminated on a titanium nitride film, Two-layer structure in which a tungsten film is laminated on a tantalum film, a tantalum nitride film or a tungsten nitride film Two-layer structure with tungsten film on top of titanium film, two-layer structure with copper film on top of titanium film, A two-layer structure with a copper film laminated on a butene film, a titanium film, and an aluminum film on the titanium film. There are three-layer structures, such as a titanium film on top of the laminated aluminum. Choose from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium. Alternatively, an alloy film or a nitride film made of one or more of the above elements may be used.

[0247] The conductive film 13 functioning as a gate electrode has the same structure as the conductive film 159 shown in Embodiment 1. The conductive film 13 functioning as the gate electrode may be formed of any of the following materials and structures. The light-transmitting conductive film described in the conductive film 181 in Embodiment 3 can be used. The conductive film 13 functioning as a gate electrode is made of the above-mentioned light-transmitting conductive film and the above-mentioned gold film. The conductive film 13 functioning as a gate electrode may have a stacked structure of metal elements. The conductive oxide semiconductor film 155b described in Embodiment 1 may be used.

[0248] The nitride insulating film 15 may be a nitride insulating film having low oxygen permeability. A nitride insulating film having low permeability to oxygen, hydrogen, and water can be used for the oxygen insulating film. As an insulating film having low permeability to oxygen, hydrogen, and water, a nitride insulating film is used. Examples include silicon film, silicon nitride oxide film, aluminum nitride film, and aluminum nitride oxide film. In addition, a nitride insulating film having low oxygen permeability and a nitride insulating film having low oxygen, hydrogen, and water permeability are Instead of the insulating film, an aluminum oxide film, an aluminum oxynitride film, a gallium oxide film, an oxide gallium oxide film, yttrium oxide film, yttrium oxynitride film, hafnium oxide film, An oxide insulating film such as a hafnium oxynitride film can be used.

[0249] The thickness of the nitride insulating film 15 is 5 nm or more and 100 nm or less, and more preferably 20 nm or more. It is recommended to set it to 80 nm or less.

[0250] The oxide insulating film 17 is made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. Silicon oxide, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn metal An oxide, a silicon nitride, or the like may be used, and the insulating film is provided as a laminated layer or a single layer.

[0251] The oxide insulating film 17 is made of hafnium silicate (HfSiO x ), nitrogen is added Hafnium Silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminium minate (HfAl x O y N z ), hafnium oxide, yttrium oxide, etc. The use of high-quality materials can reduce gate leakage of transistors.

[0252] The thickness of the oxide insulating film 17 is 5 nm or more and 400 nm or less, and more preferably 10 nm or more. It is preferably 300 nm or less, and more preferably 50 nm or more and 250 nm or less.

[0253] The oxide semiconductor film 19a and the conductive oxide semiconductor film 19b are formed at the same time. Therefore, similarly to the conductive oxide semiconductor film 155b described in Embodiment 1, Oxide film, In-Zn oxide film, In-M-Zn oxide film (M is Al, Ga, Y, Zr, It is formed of a metal oxide film such as Sn, La, Ce, or Nd. The conductive oxide semiconductor film 19a and the conductive oxide semiconductor film 19b are films each containing the same metal element. It is.

[0254] However, the oxide semiconductor film 19b having conductivity is smaller than the oxide semiconductor film 19a. Therefore, the oxide semiconductor film 19a and the conductive The oxide semiconductor films 19a and 19b have different electrical characteristics. The oxide semiconductor film 19b has semiconductor properties, and the oxide semiconductor film 19c has electrical conductivity.

[0255] The oxide semiconductor film 19a and the conductive oxide semiconductor film 19b each have a thickness of 3 nm or more. 200 nm or less, preferably 3 nm or more and 100 nm or less, and more preferably 3 nm or more and 5 0 nm or less.

[0256] Since a part of the oxide semiconductor film 19a functions as a channel region of the transistor, The semiconductor film 19a has an energy gap of 2 eV or more, preferably 2.5 eV or more. More preferably, the energy gap is 3 eV or more. By using this, the off-state current of the transistor 102 can be reduced.

[0257] As the oxide semiconductor film 19a, an oxide semiconductor film with low carrier density is used. For example, The oxide semiconductor film 19a has a carrier density of 1×10 17 pieces / cm 3 Below, preferably 1 ×10 15 pieces / cm 3 Less than 1×10, more preferably 13 pieces / cm 3 The following is more preferred: 1×10 11 pieces / cm 3 Less than 1×10, more preferably 10 / cm3 is less than 1×10 -9 / cm 3 The above oxide semiconductor film is used.

[0258] In addition, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use a material with an appropriate composition according to the required properties (e.g., the resultant mobility, threshold voltage, etc.). In order to obtain semiconductor characteristics of a transistor, the carrier density and impurity of the oxide semiconductor film 19a are controlled. The concentration of metals, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. are appropriately adjusted. It is preferable.

[0259] Note that the oxide semiconductor film 19a is an oxide semiconductor having a low impurity concentration and a low density of defect states. By using a conductive film, it is possible to fabricate a transistor with even better electrical characteristics. Here, the low impurity concentration and low defect level density (low oxygen vacancy) are considered to be the High purity authentic or substantially high purity authentic. High purity authentic or substantially high purity authentic Since the oxide semiconductor has a small number of carrier generation sources, the carrier density can be reduced. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film may be The threshold voltage rarely becomes negative (also called normally-on). In addition, a highly-purified intrinsic or substantially highly-purified intrinsic oxide semiconductor film has a low defect state density. The low valence may also result in a low trap density. The high-purity intrinsic oxide semiconductor film has a significantly small off-state current and a channel width of 1×10 6 μm and the channel length L is 10 μm, the voltage between the source and drain electrodes ( In the drain voltage range of 1V to 10V, the off-state current is Below the measurement limit of Isa, i.e. 1×10 -13 A characteristic of less than A can be obtained. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has low fluctuation in electrical characteristics. The impurities are hydrogen, nitrogen, and alkaline metals. metals, or alkaline earth metals.

[0260] Hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. Oxygen vacancies are formed in the lattice from which oxygen has been removed (or in the portion from which oxygen has been removed). When hydrogen enters the gap, electrons, which act as carriers, can be generated. When it bonds with oxygen, which bonds with metal atoms, it can generate electrons, which act as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen has normally-on characteristics. It is easy to become.

[0261] Therefore, in the oxide semiconductor film 19a, oxygen vacancies and hydrogen are reduced as much as possible. Specifically, it is preferable that the oxide semiconductor film 19a is By SIMS (Secondary Ion Mass Spectrometry) The resulting hydrogen concentration is 5×10 19 atoms / cm 3 Less than or equal to 1×10 19 a toms / cm 3 Less than or equal to 5×10 18 atoms / cm 3 Less than 1 ×10 18 atoms / cm 3 Less than or equal to 5×10 17 atoms / cm3 below, Preferably 1 x 10 16 atoms / cm 3 The following applies.

[0262] The oxide semiconductor film 19a contains silicon or carbon, which is one of the Group 14 elements. As a result, oxygen vacancies increase in the oxide semiconductor film 19a, causing the oxide semiconductor film 19a to become n-type. The concentrations of silicon and carbon in the nitride semiconductor film 19a (obtained by secondary ion mass spectrometry) The concentration of 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0263] In addition, in the oxide semiconductor film 19a, an alkali metal ion concentration obtained by secondary ion mass spectrometry is The concentration of metal or alkaline earth metal is 1×10 18 atoms / cm 3 The following is preferably is 2 × 10 16 atoms / cm 3 The following are the alkali metals and alkaline earth metals: When a compound is bonded to an oxide semiconductor, carriers may be generated, increasing the off-state current of a transistor. For this reason, the alkali metal or alkali metal in the oxide semiconductor film 19a may become large. It is preferable to reduce the concentration of alkaline earth metals.

[0264] In addition, when the oxide semiconductor film 19a contains nitrogen, electrons that serve as carriers are generated, and The carrier density increases and it becomes easier to make the material n-type. Therefore, the transistor having the oxide semiconductor film tends to be normally on. In this case, it is preferable that the nitrogen content is reduced as much as possible. For example, in the case of secondary ion mass spectrometry, The nitrogen concentration obtained is 5×10 18 atoms / cm 3 It is preferable to do the following: .

[0265] The conductive oxide semiconductor film 19b is an oxide semiconductor film formed at the same time as the oxide semiconductor film 19a. By providing defects, such as oxygen vacancies and impurities, in the semiconductor film, the conductive property is improved. Therefore, the oxide semiconductor film 19b having conductivity functions as an electrode. In this embodiment, it functions as a pixel electrode.

[0266] Both the oxide semiconductor film 19a and the conductive oxide semiconductor film 19b are oxide insulating films. The oxide semiconductor film 17 is formed on the oxide semiconductor film 19a, but has a different impurity concentration. In contrast, the oxide semiconductor film 19b having conductivity has a high impurity concentration. The hydrogen concentration in the film 19a is 5×10 19 atoms / cm 3 Below, preferably 1x 10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 Below, preferably 1 ×10 18 atoms / cm 3 Less than or equal to 5×10 17 atoms / cm 3 below, Preferably 1 x 10 16 atoms / cm 3 On the other hand, conductive oxide semiconductors The hydrogen concentration in the conductive film 19b is 8×10 19 atoms / cm 3 More than 1, preferably 1 ×10 20 atoms / cm 3 More than 5×10 20 atoms / cm 3That's it In addition, the oxide semiconductor film 19b has a higher conductivity than the oxide semiconductor film 19a. The hydrogen concentration is twice as high, preferably 10 times or more.

[0267] In addition, the oxide semiconductor film 19b having conductivity has a lower resistivity than the oxide semiconductor film 19a. The resistivity of the conductive oxide semiconductor film 19b is greater than that of the oxide semiconductor film 19a. 1×10 -8 1×10 times more -1 It is preferable that the ratio is less than 1×10 -3 Ωcm or more 1×10 4 Ωcm, and more preferably a resistivity of 1×10 -3 Ωcm or more 1×10 -1 It is preferable that the resistivity is less than Ωcm.

[0268] The oxide semiconductor film 19a and the conductive oxide semiconductor film 19b are It is possible to appropriately select a crystal structure similar to that of the conductive oxide semiconductor film 155b shown in FIG. can.

[0269] The conductive films 21a and 21b functioning as the source electrode and the drain electrode are the same as those in the first embodiment. The structure and material of the conductive film 159 shown in FIG.

[0270] The oxide insulating film 23 or the oxide insulating film 25 contains oxygen having a stoichiometric composition. It is preferable to use an oxide insulating film containing a lot of oxygen. Then, an oxide insulating film that transmits oxygen is formed. An oxide insulating film containing more oxygen than the oxygen that satisfies the condition is formed.

[0271] The oxide insulating film 23 is an oxide insulating film that transmits oxygen. The oxygen desorbed from the oxide insulating film 25 provided on the oxide insulating film 23 is absorbed through the oxide insulating film 23. The oxide insulating film 23 can be transferred to the oxide semiconductor film 19a. The oxide insulating film 25 may also serve as a film for reducing damage to the oxide semiconductor film 19a when the oxide insulating film 25 is formed. It works.

[0272] The oxide insulating film 23 has a thickness of 5 nm to 150 nm, preferably 5 nm or more. Silicon oxide, silicon oxynitride, etc., having a thickness of 50 nm or less can be used.

[0273] In addition, the oxide insulating film 23 contains nitrogen and has few defects. is preferred.

[0274] A typical example of an oxide insulating film containing nitrogen and having few defects is a silicon oxynitride film. , aluminum oxynitride film, etc.

[0275] The oxide insulating film with few defects shows the spectrum obtained by ESR measurement at 100K or less. The first signal has a g value of 2.037 to 2.039, and the second signal has a g value of 2.001 to 2.002. A second signal with a g value of .003 or less and a third signal with a g value between 1.964 and 1.966, inclusive. A null is observed. Note that the split width of the first signal and the second signal, The split width of the second and third signals is about 5 in the X-band ESR measurement. mT. The first signal has a g value of 2.037 to 2.039, and the second signal has a g value of 2. A second signal between 0.001 and 2.003, and a g value between 1.964 and 1.966 The total spin density of the third signal is 1×10 18 spins / cm 3 Less than Typically, 1×10 17 spins / cm 3 More than 1×10 18 spins / cm 3 is less than.

[0276] In addition, the g value in the ESR spectrum below 100K is 2.037 to 2.039. The first signal has a g value of 2.001 to 2.003, and the second signal has a g value of 1 The third signal, between .964 and 1.966, is nitrogen oxides (NOx, x is between 0 and 2). Representative examples of nitrogen oxides include: , nitric oxide, nitrogen dioxide, etc. That is, the g value is 2.037 or more and 2.039 or less, or 1 The lower the spin density of the signal, which is between .964 and 1.966, the greater the oxide insulating film. It can be said that the nitrogen oxide content is low.

[0277] When the oxide insulating film 23 contains a small amount of nitrogen oxide as described above, the oxide insulating film 2 In this way, it is possible to reduce carrier traps at the interface between the oxide semiconductor film and the insulating layer 3 . As a result, the amount of variation in the threshold voltage of a transistor included in the semiconductor device can be reduced. This makes it possible to reduce fluctuations in the electrical characteristics of the transistors.

[0278] The oxide insulating film 23 is formed by SIMS (Secondary Ion Mass Spectroscopy). The nitrogen concentration measured by ectrometry is 6×10 20 atoms / cm 3 Below As a result, nitrogen oxides are less likely to be generated in the oxide insulating film 23. As a result, the trapping of carriers at the interface between the oxide insulating film 23 and the oxide semiconductor film 19a is reduced. In addition, it is possible to reduce the threshold voltage of a transistor included in the semiconductor device. It is possible to reduce the amount of fluctuation in the voltage, and thus to reduce fluctuation in the electrical characteristics of the transistor. can be done.

[0279] Note that if the oxide insulating film 23 contains nitrogen oxide and ammonia, During the heat treatment process in the manufacturing process, nitrogen oxides and ammonia react to produce nitrogen oxides. The oxide becomes nitrogen gas and is desorbed. As a result, the nitrogen concentration and nitrogen oxide concentration of the oxide insulating film 23 are In addition, the oxide insulating film 23 and the oxide semiconductor film 19 can be formed in a thin film. It is possible to reduce carrier traps at the interface with a. It is possible to reduce the amount of variation in the threshold voltage of the transistor included in the This can reduce the fluctuation in the electrical characteristics of the stator.

[0280] Note that in the oxide insulating film 23, all of the oxygen that has entered the oxide insulating film 23 from the outside is Some oxygen does not move outside the oxide insulating film 23 and remains in the oxide insulating film 23. As oxygen enters the oxide insulating film 23, the oxygen contained in the oxide insulating film 23 In some cases, oxygen may move in the oxide insulating film 23 due to the movement of oxygen to the outside.

[0281] When an oxide insulating film that transmits oxygen is formed as the oxide insulating film 23, the oxide insulating film 23 The oxide insulating film 23 is formed on the upper surface of the oxide insulating film 23. The electrons can be transferred to the semiconductor film 19a.

[0282] An oxide insulating film 25 is formed so as to be in contact with the oxide insulating film 23. The fifth embodiment is formed using an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. The oxide insulating film containing more oxygen than the stoichiometric composition is heated to remove the oxygen. A part of the element is released. The oxide insulating film contains more oxygen than the oxygen that satisfies the stoichiometric composition. In TDS analysis, the amount of oxygen released was 1.0 x 10 18 atoms / cm 3 More than 3.0×10 20 atoms / cm 3 The oxide insulating film The surface temperature of the film during the TDS analysis was 100°C to 700°C. or in the range of 100° C. to 500° C.

[0283] The oxide insulating film 25 has a thickness of 30 nm to 500 nm, preferably 50 nm. Silicon oxide, silicon oxynitride, etc., having a thickness of 400 nm or more and 400 nm or less can be used.

[0284] In addition, it is preferable that the oxide insulating film 25 has a small amount of defects. Therefore, the spin density of the signal appearing at g=2.001 is 1.5×10 18 spins / cm 3 Less than or even 1×10 18 spins / cm 3 It is preferable that the oxidation The oxide insulating film 25 is located farther away from the oxide semiconductor film 19a than the oxide insulating film 23. The oxide insulating film 24 may have a higher defect density than the oxide insulating film 23.

[0285] The nitride insulating film 27 is made of a nitride insulating film having low oxygen permeability, similar to the nitride insulating film 15. Furthermore, it is possible to use a nitride insulating film that has low permeability to oxygen, hydrogen, and water. It is possible.

[0286] The nitride insulating film 27 has a thickness of 50 nm to 300 nm, preferably 100 nm. Silicon nitride film, silicon oxynitride film, aluminum nitride film, Examples include an aluminum oxide nitride film.

[0287] In the oxide insulating film 23 or the oxide insulating film 25, oxygen having a stoichiometric composition is When the oxide insulating film 23 or the oxide insulating film 22 contains more oxygen than the oxide insulating film 21, Part of the oxygen contained in the oxide semiconductor film 19a is transferred to the oxide semiconductor film 19a. It is possible to reduce the amount of oxygen vacancies contained in the silicon dioxide.

[0288] A transistor including an oxide semiconductor film having oxygen vacancies in the oxide semiconductor film is The threshold voltage tends to shift in the negative direction, and the device tends to have normally-on characteristics. This is because oxygen vacancies in the oxide semiconductor film generate charges, resulting in a decrease in resistance. If a transistor has normally-on characteristics, malfunctions are likely to occur during operation. Various problems may occur, such as high power consumption when not in operation. The stress test increases the variation of the electrical characteristics of the transistor, typically the threshold voltage. There is a problem that...

[0289] However, in the transistor 102 described in this embodiment, The oxide insulating film 23 or the oxide insulating film 25 has a stoichiometric composition of oxygen. The oxide insulating film contains more oxygen than the oxide semiconductor film 19a. The film 23 and the oxide insulating film 25 are wrapped with the nitride insulating film 15 and the oxide insulating film 17 . As a result, oxygen contained in the oxide insulating film 23 or the oxide insulating film 25 is efficiently converted into oxide. The amount of oxygen vacancies in the oxide semiconductor film 19a can be reduced by the above. As a result, the transistor has normally-off characteristics. The non-contact test reduces the variation in the electrical characteristics of the transistor, typically the threshold voltage. It is possible.

[0290] The common electrode 29 is made of a light-transmitting film, preferably a light-transmitting conductive film. The conductive film having optical properties is an indium oxide film containing tungsten oxide, a tungsten oxide film, Indium zinc oxide film containing titanium oxide, indium oxide film containing titanium oxide Indium tin oxide film, ITO film, indium zinc oxide film, indium oxide film with silicon oxide added Examples include indium tin oxide film.

[0291] Note that the common electrode 29 may be formed using the conductive oxide semiconductor film 15 shown in Embodiment 1. It may be formed using 5b.

[0292] The extending direction of the conductive film 21a functioning as a signal line and the extending direction of the common electrode 29 intersect. Therefore, the electric field generated between the conductive film 21a functioning as the signal line and the common electrode 29 Between the pixel electrode formed of the conductive oxide semiconductor film 19b and the common electrode 29 The direction of the electric field generated is misaligned, and the angle of the misalignment is large. When liquid crystal molecules are used, the alignment state of the liquid crystal molecules near the conductive film that functions as the signal line and the alignment state of the adjacent The electric field generated between the pixel electrode and the common electrode of the pixel is The alignment state of the adjacent liquid crystal molecules is not easily influenced by each other. As a result, the change in the transmittance of the pixel As a result, flicker in the image can be reduced.

[0293] In addition, in a liquid crystal display device with a low refresh rate, even during the retention period, The alignment of the liquid crystal molecules in the vicinity of the conductive film 21a, which functions as a pixel electrode, is determined by the pixel electrodes provided in the adjacent pixels. The electric field generated between the pixel electrode and the common electrode 29 affects the alignment state of the liquid crystal molecules near the pixel electrode. As a result, the transmittance of the pixel can be maintained during the retention period. , flickering can be reduced.

[0294] The common electrode 29 is formed in stripes in a direction intersecting with the conductive film 21a that functions as a signal line. Therefore, the oxide semiconductor film 19b having conductivity and the conductive film 21 In the vicinity of a, it is possible to prevent unintended alignment of liquid crystal molecules, thereby suppressing light leakage. As a result, a display device with excellent contrast can be manufactured.

[0295] The shape of the common electrode 29 is not limited to the shape shown in FIG. 32, but may be a straight stripe shape. In the case of stripes, the extending direction may be parallel to the conductive film functioning as the signal line. The common electrode 29 may be in the form of a comb. Alternatively, the conductive oxide semiconductor film 19b may be formed on the entire surface of the plate 11. Conductive films having different light transmittance may be formed on the common electrode 29 via an insulating film.

[0296] The thickness of the organic insulating film 31 is preferably 500 nm or more and 10 μm or less. The thickness of the organic insulating film 31 shown in FIG. 1 is the thickness of the inorganic insulating film 30 formed on the first substrate 11 and the second The distance between the organic insulating film 31 and the second A liquid crystal layer 320 is provided between the element layer formed on the substrate 342. Between the alignment film 33 on the substrate 31 and the alignment film 352 included in the element layer of the second substrate 342 The liquid crystal layer 320 is disposed above the substrate 310 .

[0297] Although not shown, the alignment film 33 on the organic insulating film 31 and the second substrate 342 are The organic insulating film 352 may be in contact with the alignment film 352 included in the element layer. The film 31 functions as a spacer, so that the cell gap of the liquid crystal display device is maintained by an organic insulating film. It can be held.

[0298] In FIG. 33, the alignment film 33 is provided on the organic insulating film. One embodiment is not limited thereto. In some cases, or depending on the situation, The insulating film 31 may be provided on the alignment film 33. In this case, the rubbing process may be, for example, The alignment film 33 is not formed immediately after the alignment film 33 is formed, but is formed after the organic insulating film 31 is formed on the alignment film 33. It may be performed after

[0299] When a negative voltage is applied to the conductive film 13 that functions as a gate electrode, an electric field is generated. The electric field is not blocked by the oxide semiconductor film 19a and affects the inorganic insulating film 30. A weak positive charge is applied to the surface of the insulating film 30. Also, the conductive film 1, which functions as a gate electrode, When a negative voltage is applied to the electrode 3, positively charged particles contained in the air are attracted to the surface of the inorganic insulating film 30. As a result of adsorption, the surface of the inorganic insulating film 30 is charged with a weak positive charge.

[0300] Positive charges are applied to the surface of the inorganic insulating film 30, generating an electric field, which then causes the oxide This affects the interface between the semiconductor film 19a and the inorganic insulating film 30. At the interface between the insulating film a and the inorganic insulating film 30, a substantially positive bias is applied. The threshold voltage of the transistor is shifted negatively.

[0301] On the other hand, the transistor 102 in this embodiment has an organic insulating film 31 over an inorganic insulating film 30. Since the organic insulating film 31 has a large thickness of 500 nm or more, it does not function as a gate electrode. The effect of the electric field generated by applying a negative voltage to the conductive film 13 that functions as a gate insulating film is The surface of the organic insulating film 31 is not affected, and the surface of the organic insulating film 31 is unlikely to be positively charged. Even if positively charged particles contained in the air are adsorbed on the surface of the organic insulating film 31, the organic insulating film 31 Since the thickness of the organic insulating film 31 is as large as 500 nm or more, the charge of the positively charged particles adsorbed on the surface of the organic insulating film 31 is increased. The interface is unlikely to affect the interface between the oxide semiconductor film 19a and the inorganic insulating film 30. A substantially positive bias is applied to the interface between the compound semiconductor film 19a and the inorganic insulating film 30. Therefore, the threshold voltage of the transistor does not fluctuate much.

[0302] Water and the like are likely to diffuse through the organic insulating film 31. Since the insulating film is formed separately, water from the outside penetrates through the organic insulating film 31 to the semiconductor device. In addition, since the inorganic insulating film 30 includes a nitride insulating film, the organic insulating film 31 It is possible to prevent the water that has diffused into the oxide semiconductor film 19a from diffusing into the oxide semiconductor film 19a.

[0303] An alignment film 33 is formed on the common electrode 29, the nitride insulating film 27, and the organic insulating film 31. .

[0304] Next, a method for manufacturing the transistor 102 and the capacitor 105 shown in FIG. 4 to 36.

[0305] As shown in FIG. 34(A), a conductive film 12 that will become a conductive film 13 is formed on a first substrate 11. The conductive film 12 is formed by a method such as a sputtering method, a chemical vapor deposition (CVD) method (metal organic chemical deposition ( MOCVD, metal chemical vapor deposition, atomic layer deposition (ALD) or plasma chemistry Chemical vapor deposition (PECVD), evaporation, pulsed laser deposition (PLD), etc. The metal organic chemical vapor deposition (MOCVD), metal chemical vapor deposition, atomic layer deposition ( By using the ALD method, it is possible to form a conductive film that is less damaged by plasma. In addition, the conductive film 12 can be formed by using the oxide semiconductor film 15 having conductivity described in Embodiment 1. In the case of using the oxide semiconductor film 155b, a method for forming the oxide semiconductor film 155b having conductivity is appropriately used. can be done.

[0306] In this embodiment, a glass substrate is used as the first substrate 11. The conductive film 12 is a thin film having a thickness of A 100 nm tungsten film is formed by sputtering.

[0307] Next, a mask is formed on the conductive film 12 by a photolithography process using a first photomask. Next, a part of the conductive film 12 is etched using the mask to form a mask as shown in FIG. As shown in FIG. 1B, a conductive film 13 that functions as a gate electrode is formed. After that, a mask is Remove.

[0308] The conductive film 13 functioning as the gate electrode may be formed by electrolytic plating instead of the above-mentioned method. The conductive layer may be formed by a method such as a printing method or an ink jet method.

[0309] Here, the tungsten film is etched by dry etching to form a gate electrode. Then, a conductive film 13 that functions as a conductive film is formed.

[0310] Next, as shown in FIG. 34(C), a nitride film is formed on the conductive film 13 that functions as a gate electrode. An insulating film 15 and an oxide insulating film 16 that will later become an oxide insulating film 17 are formed. On the insulating film 16, a layer that will later become an oxide semiconductor film 19a and a conductive oxide semiconductor film 19b is formed. An oxide semiconductor film 18 is formed.

[0311] The nitride insulating film 15 and the oxide insulating film 16 are formed by a sputtering method, a chemical vapor deposition (CVD) method, or the like. ) method (metal organic chemical vapor deposition (MOCVD), metal chemical vapor deposition, atomic layer deposition (ALD) ) method or plasma enhanced chemical vapor deposition (PECVD) method. ), evaporation method, pulsed laser It is formed by metal organic chemical vapor deposition (MOCVD), coating method, printing method, etc. ) method, metal chemical vapor deposition method, and atomic layer deposition (ALD) method. The nitride insulating film 15 and the oxide insulating film 16 can be formed with little damage. The nitride insulating film 15 and the oxide insulating film 16 are formed by using an atomic layer deposition (ALD) method. It is possible to increase the coverage.

[0312] Here, we used the plasma CVD method with silane, nitrogen, and ammonia as raw material gases. As the nitride insulating film 15, a silicon nitride film having a thickness of 300 nm is formed.

[0313] The oxide insulating film 16 may be a silicon oxide film, a silicon oxynitride film, or a silicon nitride oxide film. When forming a silicon film, a deposition gas containing silicon and an oxidizing gas are used as the source gas. Representative examples of deposition gases containing silicon include silane, disilane, Examples of oxidizing gases include trisilane, fluorinated silane, etc. Examples of oxidizing gases include oxygen, ozone, and nitrous oxide. , nitrogen dioxide, etc.

[0314] When a gallium oxide film is formed as the oxide insulating film 16, MOCVD (Metal O Formed using the organic chemical vapor deposition (OCVD) method It is possible.

[0315] Here, we used the plasma CVD method with silane and dinitrogen monoxide as raw material gases to oxidize As the insulating film 16, a silicon oxynitride film having a thickness of 50 nm is formed.

[0316] The oxide semiconductor film 18 was formed by a method similar to that of the oxide semiconductor film 155 described in Embodiment 1. It can be formed by using appropriate materials.

[0317] Here, an In-Ga-Zn oxide target (In:Ga:Zn=1:1:1) was used. A 35-nm-thick In-Ga-Zn oxide film was deposited as an oxide semiconductor film by sputtering. A nitride film is formed.

[0318] Next, a photolithography process using a second photomask is performed on the oxide semiconductor film 18. After a mask is formed by etching, part of the oxide semiconductor film is etched using the mask. As a result, separated oxide semiconductor films 19a and 19c are formed as shown in FIG. After this, the mask is removed.

[0319] Here, a mask is formed on the oxide semiconductor film 18, and the oxide semiconductor film 18 is oxidized by wet etching. By selectively etching a portion of the oxide semiconductor film 18, the oxide semiconductor films 19a and 19c are formed. Form.

[0320] Next, as shown in FIG. 35(A), a conductive film 20 which will later become conductive films 21a and 21b is formed. Complete.

[0321] The conductive film 20 can be formed as appropriate by a method similar to that of the conductive film 159 described in Embodiment 1. This can be done.

[0322] Here, a Cu-Mn alloy film having a thickness of 50 nm and a copper film having a thickness of 300 nm are sputtered in this order. The layers are laminated by the ring method.

[0323] Next, a mask is formed on the conductive film 20 by a photolithography process using a third photomask. Next, the conductive film 20 is etched using the mask to form a mask as shown in FIG. 3, the conductive films 21a and 21b functioning as the source electrode and the drain electrode are formed. After this, the mask is removed.

[0324] Here, a mask is formed on the copper film by a photolithography process. The Cu--Mn film and the copper film are etched using a etch mask to form conductive films 21a and 21b. In addition, by using the wet etching method, the Cu-Mn film and the copper film can be etched in one step. Conductive films 21a and 21b can be formed by etching in a process.

[0325] Next, as shown in FIG. 35C, the oxide semiconductor films 19a and 19c and the conductive film 21a 21b, an oxide insulating film 22 which will later become an oxide insulating film 23 and an oxide insulating film 2 The oxide insulating film 22 and the oxide insulating film 24 are formed by nitriding. The insulating film 15 and the oxide insulating film 16 can be formed by using a method similar to that for forming the insulating film 15 and the oxide insulating film 16, as appropriate.

[0326] After the oxide insulating film 22 is formed, the oxide insulating film 2 is continuously removed without being exposed to the air. After the oxide insulating film 22 is formed, the source gas The oxide insulating film 24 is continuously formed by adjusting one or more of the flow rate, pressure, high frequency power, and substrate temperature. By forming the oxide insulating film 22 and the oxide insulating film 24 in the In addition, the impurity concentration in the oxide insulating film 24 can be reduced. The amount of oxygen vacancies in the oxide semiconductor film 19a can be reduced. It can be reduced.

[0327] The oxide insulating film 22 is formed by mixing the oxidizing gas with the deposition gas at a ratio of 20 times or more to 100 times or less. times, preferably 40 to 80 times, and the pressure in the treatment chamber is less than 100 Pa, preferably By using a CVD method with a pressure of 50 Pa or less, an oxide containing nitrogen and with few defects can be obtained. The insulating film can be used.

[0328] As the source gas for the oxide insulating film 22, a deposition gas containing silicon and an oxidizing gas are used. Representative examples of deposition gases containing silicon include silane, disilane, Examples of oxidizing gases include trisilane, fluorinated silane, etc. Examples of oxidizing gases include oxygen, ozone, and nitrous oxide. , nitrogen dioxide, etc.

[0329] By using the above conditions, an oxide insulating film that transmits oxygen is formed as the oxide insulating film 22. In addition, by providing the oxide insulating film 22, the process of forming the oxide insulating film 24 can be performed. In this process, damage to the oxide semiconductor film 19a can be reduced.

[0330] Here, the oxide insulating film 22 is made of silane at a flow rate of 50 sccm and 2000 sccm. The source gas was nitrous oxide of 1.0 cm3, the pressure in the processing chamber was 20 Pa, and the substrate temperature was 220°C. A 27.12MHz high-frequency power source was used to supply 100W of high-frequency power to the parallel plate electrodes. A silicon oxynitride film with a thickness of 50 nm is formed by the plasma CVD method under the following conditions. In this manner, a silicon oxynitride film containing nitrogen and having few defects can be formed.

[0331] The oxide insulating film 24 is placed in a vacuum-evacuated processing chamber of a plasma CVD apparatus. The substrate is kept at a temperature of 180° C. or higher and 280° C. or lower, more preferably 200° C. or higher and 240° C. or lower. The raw material gas is introduced into the processing chamber to set the pressure in the processing chamber at 100 Pa or more and 250 Pa or less. More preferably, the pressure is set to 100 Pa or more and 200 Pa or less. .17W / cm 2 More than 0.5W / cm 2 Less than or equal to 0.25 W / cm 2 End 0.35W / cm 2 Under the following conditions of high frequency power supply, silicon oxide film or oxide A silicon nitride film is formed.

[0332] As the source gas of the oxide insulating film 24, a deposition gas containing silicon and an oxidizing gas are used. Representative examples of deposition gases containing silicon include silane, disilane, Examples of oxidizing gases include trisilane, fluorinated silane, etc. Examples of oxidizing gases include oxygen, ozone, and nitrous oxide. , nitrogen dioxide, etc.

[0333] The oxide insulating film 24 is formed under the conditions of high frequency irradiation with the above power density in a processing chamber at the above pressure. Supplying microwave power increases the efficiency of decomposing the source gas in the plasma, and oxygen radicals are increased. As the oxidation of the source gas proceeds, the oxygen content in the oxide insulating film 24 becomes lower than the stoichiometric ratio. On the other hand, in the film formed at the above substrate temperature, the bonds between silicon and oxygen Because the combined force is weak, some of the oxygen in the film is released by the heat treatment in the subsequent process. An acid that contains more oxygen than satisfies the stoichiometric composition and loses some of the oxygen when heated. In addition, an oxide insulating film 22 can be formed on the oxide semiconductor film 19a. Therefore, in the step of forming the oxide insulating film 24, the oxide insulating film 22 This serves as a protective film for the oxide semiconductor film 19a. The oxide insulating film 24 can be formed by using high-frequency power with high power density while reducing the can.

[0334] Here, the oxide insulating film 24 is made of silane at a flow rate of 200 sccm and SiO at a flow rate of 4000 s. The source gas was nitrous oxide (N2O) at 1.0 ccm, the pressure in the processing chamber was 200 Pa, and the substrate temperature was 220° C. A 27.12MHz high-frequency power source was used to apply 1500W of high-frequency power to the parallel plate electrodes. A silicon oxynitride film with a thickness of 400 nm is formed by the supplied plasma CVD method. The plasma CVD device has an electrode area of ​​6000 cm 2 Parallel plate plasma CVD The power supplied to the device is converted to power per unit area (power density) of 0.25W. / cm 2 It is.

[0335] In addition, when forming the conductive films 21a and 21b which function as the source electrode and the drain electrode, The oxide semiconductor film 19a is damaged by the etching of the conductive film, and the oxide semiconductor The back channel of the film 19a (which functions as a gate electrode in the oxide semiconductor film 19a) However, oxygen vacancies occur on the surface opposite to the surface facing the conductive film 13. By applying an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition to 4, The oxygen vacancies occurring on the back channel side can be repaired by the heat treatment. This can reduce defects in the oxide semiconductor film 19a, This can improve the reliability of the sensor 102.

[0336] Next, a photolithography process using a fourth photomask is performed on the oxide insulating film 24. Next, the oxide insulating film 22 and the oxide insulating film 24 are formed using the mask. 36(A), a part of the oxide insulating film having an opening 40 is formed. 23 and the oxide insulating film 25 are formed. After that, the mask is removed.

[0337] In this process, the oxide insulating film 22 and the oxide insulating film 2 As a result, the oxide semiconductor film 19c is Since the oxide semiconductor film 19c is exposed to plasma during the etching process, the amount of oxygen vacancies in the oxide semiconductor film 19c increases. is possible.

[0338] Next, a heat treatment is performed. The temperature of the heat treatment is typically 150° C. or higher and 400° C. or lower. The temperature is preferably 300°C or higher and 400°C or lower, and more preferably 320°C or higher and 370°C or lower.

[0339] The heat treatment can be performed using an electric furnace, an RTA device, or the like. Therefore, heat treatment can be performed at a temperature above the distortion point of the substrate for a short period of time. The processing time can be reduced.

[0340] Heat treatment is carried out in a vacuum of nitrogen, oxygen, or ultra-dry air (water content of 20 ppm or less, preferably 1 ppm). pm or less, preferably 10 ppb or less air), or rare gases (argon, helium, etc.) In addition, the above-mentioned nitrogen, oxygen, ultra-dry air, or rare gas may be mixed with hydrogen, water, or the like. It is preferable that the above is not included.

[0341] By this heat treatment, part of oxygen contained in the oxide insulating film 25 is oxidized to the oxide semiconductor film 19a Therefore, the amount of oxygen vacancies in the oxide semiconductor film 19a can be further reduced. .

[0342] In the case where the oxide insulating film 23 and the oxide insulating film 25 contain water, hydrogen, or the like, In the case where the nitride insulating film 26 further has a barrier property against water, hydrogen, etc., the nitride insulating film 2 When the oxide insulating film 23 and the oxide insulating film 25 are formed later and subjected to heat treatment, Water, hydrogen, and the like move to the oxide semiconductor film 19a, causing defects in the oxide semiconductor film 19a. However, the heating causes the oxide insulating film 23 and the oxide insulating film 25 to It is possible to remove water, hydrogen, and the like from the semiconductor device, and the variation in the electrical characteristics of the transistor 102 can be reduced. It is possible to reduce the threshold voltage and suppress the fluctuation of the threshold voltage.

[0343] The oxide insulating film 24 is formed on the oxide insulating film 22 while being heated. Oxygen is transferred to the oxide semiconductor film 19a, thereby reducing the amount of oxygen vacancies in the oxide semiconductor film 19a. Therefore, the heat treatment may not be performed.

[0344] The heat treatment is performed after the oxide insulating film 22 and the oxide insulating film 24 are formed. However, the heat treatment after the formation of the oxide insulating film 23 and the oxide insulating film 25 is more effective in preventing oxidation. The transfer of oxygen to the oxide semiconductor film 19c does not occur, and the oxide semiconductor film 19c is exposed. Therefore, oxygen is released from the oxide semiconductor film 19c, and oxygen vacancies are formed, so that the oxide semiconductor film 19c becomes more conductive. This is preferable because it allows the formation of a film having excellent properties.

[0345] Here, heat treatment is performed in a nitrogen and oxygen atmosphere at 350° C. for 1 hour.

[0346] Next, as shown in FIG. 36(B), the nitride insulating film 26 is formed.

[0347] The nitride insulating film 26 is formed by appropriately using the same method as the nitride insulating film 15 and the oxide insulating film 16. The nitride insulating film 26 can be formed by sputtering, CVD, or the like. As a result, the oxide semiconductor film 19c is exposed to plasma. The amount of oxygen vacancy can be increased.

[0348] In addition, the conductivity of the oxide semiconductor film 19c is improved, and the conductive oxide semiconductor film 19b As the nitride insulating film 26, a silicon nitride film is formed by the plasma CVD method. Then, hydrogen contained in the silicon nitride film diffuses into the oxide semiconductor film 19c, and the oxide The conductivity of the semiconductor film can be increased. The method for forming the oxide semiconductor film 155b having another conductivity, which is described in Embodiment 1, is the same as that for forming the oxide semiconductor film 155b having another conductivity. can be used appropriately.

[0349] When a silicon nitride film is formed as the nitride insulating film 26 by the plasma CVD method, the plasma The substrate placed in the evacuated processing chamber of the CVD device is heated to 300°C or higher and 400°C or lower. Furthermore, by setting the temperature at 320°C or higher and 370°C or lower, a dense silicon nitride film can be formed. This is preferable because it is possible to

[0350] When forming a silicon nitride film, a deposition gas containing silicon, nitrogen, and ammonia are used. It is preferable to use a small amount of ammonia as the raw material gas compared to nitrogen. By using ammonia, ammonia dissociates in the plasma and active species are generated. The silicon and hydrogen bonds and the triple bonds of nitrogen contained in the silicon-containing deposition gas are As a result, the bonds between silicon and nitrogen are promoted and the bonds between silicon and hydrogen are reduced. It is possible to form a dense silicon nitride film with few defects. In this case, if the amount of ammonia relative to nitrogen is large, the deposition gas containing silicon and the nitrogen itself are The decomposition of these materials does not proceed, and silicon and hydrogen bonds remain, increasing the number of defects and causing coarse grains. For these reasons, the source gas should be ammonia-free. The flow rate ratio of nitrogen to oxygen is preferably 5 to 50, more preferably 10 to 50. stomach.

[0351] Here, silane at a flow rate of 50 sccm and 5000 The source gases were nitrogen at a flow rate of 100 sccm and ammonia at a flow rate of 100 sccm. The pressure in the processing chamber was The pressure was set at 100 Pa, the substrate temperature was set at 350°C, and a 27.12 MHz high frequency power source was used for 1000 The nitride insulating film 26 and the The plasma CVD device has an electrode area of ​​1000 nm. 6000cm2 This is a parallel plate type plasma CVD device, and the power supplied is divided into This is converted to power per unit area (power density) of 1.7 x 10 -1 W / cm 2 It is.

[0352] Next, a heat treatment may be performed. The temperature of the heat treatment is typically 150° C. or higher and 40° C. or lower. 0°C or lower, preferably 300°C or higher and 400°C or lower, preferably 320°C or higher and 370°C or lower As a result, the negative shift of the threshold voltage can be reduced. Therefore, the amount of fluctuation in the low voltage can be reduced.

[0353] Next, although not shown, a photolithography process is performed using a fifth photomask. Next, a nitride insulating film 15, an oxide insulating film 16, and an oxide The oxide insulating film 23, the oxide insulating film 25, and the nitride insulating film 26 are each partially etched. The nitride insulating film 27 is formed, and a part of the connection terminal formed at the same time as the conductive film 13 is exposed. Alternatively, the oxide insulating film 23, the oxide insulating film 25, and the nitride insulating film are formed. 26 are partially etched to form a nitride insulating film 27 and a conductive film 21. An opening is formed to expose a part of the connection terminal formed simultaneously with 21a and 21b.

[0354] Next, as shown in FIG. 36(C), a layer that will later become a common electrode 29 is formed on the nitride insulating film 27. A conductive film 28 is formed.

[0355] The conductive film 28 is formed by a sputtering method, a CVD method, a vapor deposition method or the like.

[0356] As the conductive film 28, the conductive oxide semiconductor film 155b In the case of using the oxide semiconductor film 155b, a method for forming the oxide semiconductor film 155b having conductivity can be appropriately used. Cut.

[0357] Next, a mask is formed on the conductive film 28 by a photolithography process using a sixth photomask. Next, a part of the conductive film 28 is etched using the mask to form a mask as shown in FIG. As shown in A), a common electrode 29 is formed. Although not shown, the common electrode 29 is , a connection terminal formed simultaneously with the conductive film 13, or a connection terminal formed simultaneously with the conductive films 21a and 21b The mask is then removed.

[0358] Next, as shown in FIG. 37(B), an organic insulating film 31 is formed on the nitride insulating film 27. The organic insulating film can be formed by appropriately using a coating method, a printing method, or the like.

[0359] When forming an organic insulating film by using a coating method, a photosensitive composition is applied to the nitride insulating film 27 and the After being applied onto the capacitor electrode 29, a photolithography process using a seventh photomask is performed. The composition is exposed to light and developed, and then heat-treated. When the resist is applied to the insulating film 27 and the common electrode 29, the resist is applied to the non-photosensitive composition. Then, the resist is processed by a photolithography process using a seventh photomask to form a mask. The non-photosensitive composition is etched using the mask to form an organic insulating film 31. can be formed.

[0360] Through the above steps, the transistor 102 and the capacitor 105 are manufactured. It is possible.

[0361] The element substrate of the display device described in this embodiment overlaps with the transistor via an inorganic insulating film. This has an organic insulating film, which makes it possible to improve the reliability of the transistor and improve the display. A display device with maintained quality can be manufactured.

[0362] In addition, the element substrate of the display device described in this embodiment has a zigzag shape on the top surface. A common electrode having a region extending in a stripe shape in a direction intersecting with the conductive film functioning as a signal line is provided. As a result, a display device with excellent contrast can be manufactured. In a liquid crystal display device with a low refresh rate, flickering can be reduced.

[0363] In addition, the element substrate of the display device shown in this embodiment has a channel region of a transistor. At the same time, a conductive oxide semiconductor film that functions as a pixel electrode is formed on the oxide semiconductor film. In order to form the transistor 102 and the capacitor 105, six photomasks are used. The conductive oxide semiconductor film can be used as one electrode of the capacitor. The common electrode functions as the other electrode of the capacitance element. Therefore, a step of forming a conductive film is not required to form a capacitor element, and the manufacturing process can be simplified. In addition, the capacitance element has a light-transmitting property. As a result, the area occupied by the capacitance element can be increased. It is possible to increase the aperture ratio of the pixel while maintaining the high quality. It is possible.

[0364] Next, an element layer formed on the second substrate 342 will be described. A film having color (hereinafter, referred to as a colored film 346) is formed on the surface of the substrate 341. The light-shielding film 344 adjacent to the colored film 346 functions as a color filter. is formed on the second substrate 342. The light-shielding film 344 functions as a black matrix. In addition, the colored film 346 is not necessarily provided. For example, if the liquid crystal display device has a black and white display, In the illustrated case, the colored film 346 may not be provided.

[0365] The colored film 346 may be any colored film that transmits light in a specific wavelength range. For example, A red (R) film transmits light in the red wavelength range, and a green (G) film transmits light in the green wavelength range. ) film, or a blue (B) film that transmits light in the blue wavelength range, etc. can be used.

[0366] The light-shielding film 344 may be made of a metal or other material as long as it has a function of blocking light in a specific wavelength range. Alternatively, an organic insulating film containing a black pigment or the like can be used.

[0367] An insulating film 348 is formed on the colored film 346. The insulating film 348 is formed by planarizing the The function of the colored film 346 is to prevent impurities contained therein from diffusing into the liquid crystal element. It has the function of controlling

[0368] A conductive film 350 may be formed over the insulating film 348. The conductive film 350 is a light-transmitting The conductive film 350 is formed using a conductive film having the same potential as the common electrode 29. In other words, it is preferable that a common potential is applied to the conductive film 350.

[0369] When a voltage for driving the liquid crystal molecules is applied to the conductive film 21b, the conductive film 21b and the common electrode An electric field is generated between the conductive film 21b and the common electrode 29. The liquid crystal molecules between the 9 become misaligned, causing flickering.

[0370] However, a conductive film 350 is provided facing the common electrode 29 via the liquid crystal layer 320, By setting the common electrode 29 and the conductive film 350 to the same potential, the conductive film 21b and the common electrode 29 It is possible to suppress the change in the alignment of the liquid crystal molecules in the direction perpendicular to the substrate caused by the electric field between the substrate and the liquid crystal layer. Therefore, the alignment state of the liquid crystal molecules in the region is stabilized, and as a result, flickering can be reduced.

[0371] An alignment film 352 is formed on the conductive film 350 .

[0372] In addition, a liquid crystal layer 320 is formed between the alignment film 33 and the alignment film 352. The crystal layer 320 is formed by sealing the first substrate 11 and the second substrate 342 with a sealing material (not shown). The sealant is used to prevent moisture from entering from the outside. In particular, a configuration in which the inorganic material is in contact with the inorganic material is preferred.

[0373] In addition, the thickness of the liquid crystal layer 320 (also called the cell gap) is between the alignment film 33 and the alignment film 352. A spacer may be provided to maintain the

[0374] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0375] <Variation 1> A modification of the display device shown in FIG. 33 is shown in FIG.

[0376] In the display device shown in FIG. 38, no organic resin film is formed on the inorganic insulating film 30, and the alignment film 33 is As a result, the photoresist film 14 is in contact with the inorganic insulating film 30. It is possible to reduce the number of masks by one, and the manufacturing process of the first substrate 11 having the element layer is It is possible to simplify the process.

[0377] <Variation 2> A modification of the display device shown in FIG. 33 is shown in FIG.

[0378] The display device shown in FIG. 39 has an organic resin film 31 that is continuous and not separated on a nitride insulating film 27. A common electrode 29 is formed on the organic resin film 31a. Since the layer 31a can function as a flattening film, the liquid crystal molecules contained in the liquid crystal layer It is possible to reduce the unevenness in the alignment.

[0379] <Variation 3> A modification of the display device shown in FIG. 33 is shown in FIG.

[0380] The conductive oxide semiconductor film 19b functioning as a pixel electrode shown in FIG. Note that the shape of the conductive oxide semiconductor film 19b is not limited to the above and may be a comb-like shape. The shape may also be used.

[0381] <Variation 4> A modification of the display device shown in FIG. 33 is shown in FIG.

[0382] The common electrode 29 shown in FIG. 41 overlaps with the conductive film 21b via the nitride insulating film 27. The capacitor electrode 29, the nitride insulating film 27, and the conductive film 21b constitute a capacitance element 105b. With this configuration, the capacitance element 105b serves as a capacitance element for holding the potential of the pixel electrode. Therefore, by adopting such a configuration, the pixel The capacitance value at can be increased.

[0383] <Variation 5> A modification of the transistor 102 shown in FIG. 33 will be described with reference to FIG.

[0384] The transistor 102d shown in FIG. 42A is a transistor having an oxide film formed using a multi-tone mask. It is characterized by having a semiconductor film 19g and a pair of conductive films 21c and 21d.

[0385] By using a multi-tone mask, it is possible to form resist masks with multiple thicknesses. The oxide semiconductor film 19g is formed using the resist mask, and then the oxide semiconductor film 19g is etched by oxygen plasma. By exposing the resist mask to light, a part of the resist mask is removed to form a pair of conductive films. Therefore, the oxide semiconductor film 19g and the pair of conductive films The number of photolithography steps in the manufacturing process of 21c and 21d can be reduced.

[0386] Note that the oxide semiconductor film 19g formed using the multi-tone mask has a pair of planar shapes. The conductive films 21c and 21d are partially exposed to the outside.

[0387] The transistor 102e shown in FIG. 42B is a channel protection transistor. It is characterized by:

[0388] The transistor 102e shown in FIG. 42B has a gate electrode provided on the first substrate 11. A conductive film 13 that functions as an electrode and a gate insulator formed on the first substrate 11 and the conductive film 13. an insulating film 14; an oxide semiconductor film 19a overlapping the conductive film 13 via the gate insulating film 14; The inorganic insulating film 30a covers the channel region and the side surface of the oxide semiconductor film 19a, and the inorganic insulating film 3 The source and drain electrodes are in contact with the oxide semiconductor film 19a through the openings in the direction of arrow Oa. The conductive film 21e and the conductive film 21f function as a conductive film.

[0389] In the channel protection transistor, the oxide semiconductor film 19a is covered with the inorganic insulating film 30a. Therefore, in the etching for forming the conductive films 21e and 21f, the oxide semiconductor film 19 Therefore, defects in the oxide semiconductor film 19a can be reduced. do.

[0390] The configurations and methods described in this embodiment may be used in conjunction with the configurations and methods described in other embodiments. They can be used in any suitable combination.

[0391] (Embodiment 6) In this embodiment, a VA-driven liquid crystal display device will be used as an example of the display device. First, a top view of a plurality of pixels 103 included in a liquid crystal display device is shown in FIG.

[0392] In FIG. 43, the conductive film 13 functioning as a scanning line is connected to the conductive film functioning as a signal line. The conductive wires function as signal lines. The film 21a extends in a direction (vertical direction in the figure) substantially perpendicular to the conductive film that functions as the scanning line. The conductive film 21e that functions as a capacitance line is provided so as to extend in a direction parallel to the signal line. The conductive film 13 functioning as a scanning line is connected to a scanning line driving circuit 104 (FIG. 3). 1. The conductive film 21a and the capacitance line 22b are electrically connected to the capacitor 21a and the capacitor 22b. The conductive film 21e functioning as the signal line driver circuit 106 (see FIG. 31) is electrically connected to the signal line driver circuit 106. This is being continued.

[0393] The transistor 102 includes a conductive film functioning as a scan line and a conductive film functioning as a signal line. The transistor 102 is provided in the region where the two intersect. A conductive film 13, a gate insulating film (not shown in FIG. 43), and a channel formed on the gate insulating film. The oxide semiconductor film 19a in which the region is formed, the conductive films 21a and 21b functioning as a pair of electrodes, The conductive film 13 also functions as a scanning line, and is formed of the oxide semiconductor film 19 The region overlapping with the conductive film 21 functions as a gate electrode of the transistor 102. The region a also functions as a signal line, and the region overlapping with the oxide semiconductor film 19a is the transistor 10 43. In FIG. 43, the scanning line The conductive film that functions as a conductive layer has an end portion located outside an end portion of the oxide semiconductor film 19a in a top view. For this reason, the conductive film that functions as the scanning line does not block light from a light source such as a backlight. As a result, the oxide semiconductor film 19a included in the transistor is shielded from light. Therefore, the change in the electrical characteristics of the transistor can be suppressed.

[0394] In the transistor 102, similarly to Embodiment 5, the oxide semiconductor film 19a and The organic insulating film 31 overlaps the inorganic insulating film (not shown in FIG. 43). The oxide semiconductor film 19a, in particular, the oxide semiconductor film 19a and the conductive film 21 a and 21b.

[0395] The conductive film 21b has a light-transmitting property and functions as a pixel electrode in the opening 41. It is electrically connected to the conductive film 29c.

[0396] The capacitor 105 is connected to a conductive film 21e that functions as a capacitor line. The element 105 includes a conductive oxide semiconductor film 19d formed on a gate insulating film and a A dielectric film is provided on the transistor 102, and a light-transmitting conductive film that functions as a pixel electrode is provided on the transistor 102. The gate insulating film is formed of a conductive oxide semiconductor film 29c. The body film 19d has light-transmitting properties, that is, the capacitor element 105 has light-transmitting properties.

[0397] In this way, since the capacitor 105 has a light-transmitting property, the capacitor 105 is large in the pixel 103. Therefore, the aperture ratio can be increased, typically by 55%. or more, preferably 60% or more, and the capacitance value is increased. For example, a semiconductor device with high resolution, such as a liquid crystal display device, can be obtained. In this case, the area of ​​the pixel is smaller, and the area of ​​the capacitance element is also smaller. In the semiconductor device, the capacitance value stored in the capacitive element is reduced. Since the capacitor 105 shown in the embodiment has a light-transmitting property, the capacitor can be provided in a pixel. This makes it possible to increase the aperture ratio while obtaining a sufficient capacitance value in each pixel. The raw density is 200ppi or more, further 300ppi or more, or even 500ppi or more. It can be suitably used in high-resolution semiconductor devices.

[0398] In addition, according to one embodiment of the present invention, the aperture ratio can be increased even in a high-resolution display device. This allows the light from light sources such as backlights to be used efficiently, and reduces the power consumption of the display device. The force can be reduced.

[0399] Next, a cross-sectional view taken along the dashed line AB and CD in FIG. 43 is shown in FIG. The transistor 102 is a channel etch type transistor. B is a channel length direction of the transistor 102, which functions as the transistor 102 and a pixel electrode. 1 is a cross-sectional view of a connection portion of a conductive film 29c having light-transmitting properties and a capacitor element 105; The cross-sectional view in FIG. 1 is a cross-sectional view of the transistor 102 in the channel width direction.

[0400] Since the liquid crystal display device shown in this embodiment is a VA-driven liquid crystal display device, the first substrate 1 A light-transmitting conductive film 29c functioning as a pixel electrode included in the first element layer and a second substrate A conductive film 350 included in the element layer of the plate 342 and the liquid crystal layer 320 constitute a liquid crystal element 322. do.

[0401] The transistor 102 in FIG. 44 is the same as the transistor 102 in Embodiment 5. The conductive film 21a functions as a source electrode and a drain electrode. , 21b, in this case, a transparent film that functions as a pixel electrode connected to the conductive film 21b is A conductive film 29c is formed on the nitride insulating film 27. In the pixel electrode 41, the conductive film 21b is connected to the conductive film 29c having a light transmitting property and functioning as a pixel electrode. To be continued.

[0402] The light-transmitting conductive film 29c functioning as a pixel electrode is the same as the common electrode shown in the fifth embodiment. The same materials and manufacturing methods as those for the pole 29 can be used as appropriate.

[0403] The capacitor element 105 shown in FIG. 44 is formed on the oxide insulating film 17. The oxide semiconductor film 19d, the nitride insulating film 27, and a light-transmitting insulating film functioning as a pixel electrode are and a conductive film 29c.

[0404] The oxide insulating films 23 and 25 are formed over the transistor 102 in this embodiment. The separated oxide insulating films 23 and 25 overlap with the oxide semiconductor film 19a.

[0405] In addition, an organic insulating film 31 is provided on the nitride insulating film 27 and overlaps with the oxide semiconductor film 19a. By providing the organic insulating film 31 overlapping the oxide semiconductor film 19a on the transistor 102, The surface of the oxide semiconductor film 19a and the surface of the organic insulating film 31 can be spaced apart from each other. As a result, the surface of the oxide semiconductor film 19a is filled with the positively charged The transistor 102 is not affected by an electric field due to particles, and the reliability of the transistor 102 can be improved.

[0406] In the capacitor 105, the conductive oxide semiconductor film 19d is Unlike the case of 5, the oxide semiconductor film 19d is not connected to the conductive film 21b. , and is in contact with the conductive film 21d. The conductive film 21d functions as a capacitance line. The semiconductor film 19d has a similar structure to the conductive oxide semiconductor film 19b described in Embodiment 5. That is, the conductive oxide semiconductor film 19d can be formed by The metal oxide film has the same metal element as the film 19a. The oxide semiconductor film 19d is formed by the same method as that of the conductive oxide semiconductor film 19b described in Embodiment 5. It can be used appropriately.

[0407] Next, a method for manufacturing the transistor 102 and the capacitor 105 shown in FIG. 5 and FIG. 46.

[0408] After forming a conductive film on the first substrate 11, the first photolithography shown in the fifth embodiment is performed. The conductive film is etched using the mask obtained through the etching process, and a gate electrode is formed on the first substrate 11. A conductive film 13 that functions as a gate electrode is formed (see FIG. 45(A)).

[0409] Next, a nitride insulating film 1 is formed on the first substrate 11 and the conductive film 13 that functions as a gate electrode. 5 and the oxide insulating film 16 are formed. Next, an oxide semiconductor film is formed over the oxide insulating film 16. Then, the mask obtained through the second photolithography process shown in the fifth embodiment is used. The oxide semiconductor film is then etched to form oxide semiconductor films 19a and 19c (FIG. 4). See 5(B). )

[0410] Next, a conductive film is formed over the oxide insulating film 16 and the oxide semiconductor films 19a and 19c. Using the mask obtained through the third photolithography process shown in the fifth embodiment, The conductive film is etched to form conductive films 21a, 21b, and 21d (see FIG. 45(C)). At this time, the conductive film 21b is formed so as not to be in contact with the oxide semiconductor film 19c. A conductive film 21d is formed in contact with the oxide semiconductor film 19c.

[0411] Next, the oxide insulating film 16, the oxide semiconductor films 19a and 19c, and the conductive films 21a and 21b are After forming an oxide insulating film on 21d, the fourth photolithography method shown in the fifth embodiment is performed. The oxide insulating film is etched using the mask obtained through the process to form a mask having an opening 40. Then, oxide insulating films 23 and 25 are formed (see FIG. 46(A)).

[0412] Next, the oxide insulating film 17, the oxide semiconductor films 19a and 19c, the conductive films 21a, 21b, and After forming a nitride insulating film over the oxide insulating films 23 and 25, The nitride insulating film is etched using the mask obtained through the fifth photolithography process. 3, a nitride insulating film 27 having an opening 41 exposing a part of the conductive film 21b is formed. (See Figure 46(B).)

[0413] Through this process, the oxide semiconductor film 19c becomes a conductive oxide semiconductor film 19d. In addition, a silicon nitride film is formed later as the nitride insulating film 27 by the plasma CVD method. Then, hydrogen contained in the silicon nitride film diffuses into the oxide semiconductor film 19c, and the conductive It is possible to form the oxide semiconductor film 19d having the above structure.

[0414] Next, a conductive film is formed on the conductive film 21b and the nitride insulating film 27, and then the The conductive film is etched using a mask obtained through a sixth photolithography process. Then, a conductive film 29c is formed to be connected to the conductive film 21b (see FIG. 46(C)).

[0415] As described above, a semiconductor device including an oxide semiconductor film has improved electrical characteristics. can be obtained.

[0416] The element substrate of the semiconductor device described in this embodiment is In addition, a light-transmitting electrode that functions as a pixel electrode is formed. The conductive film is used as the other electrode of the capacitor. In addition, a step of forming a new conductive film is not required, and the manufacturing steps can be reduced. Since the electrodes are transparent, the capacitance element is transparent. It is possible to increase the aperture ratio of the pixel while increasing the size of the pixel.

[0417] <Variation 1> In this embodiment, the semiconductor device can be manufactured with a smaller number of masks than that in the fifth embodiment. A display device that can be manufactured will be described with reference to FIG.

[0418] The display device illustrated in FIG. 47 includes an oxide insulating film 22 and an oxide By not etching the oxide insulating film 24, the number of masks can be reduced. In addition, the nitride insulating film 27 is formed on the oxide insulating film 24. An opening 41a is formed in the nitride insulating film 27 to expose a part of the conductive film 21b. A pixel electrode is formed on the nitride insulating film 27 and connected to the conductive film 21b in the opening 41a. Then, a light-transmitting conductive film 29d that functions as a light-transmitting film is formed.

[0419] In addition, a conductive film 21d is formed on the oxide insulating film 17. Since the conductive film 21a and 21b are formed at the same time, the photomask is increased to form the conductive film 21d. The conductive film 21d functions as a capacitance line. 22, an oxide insulating film 24, a nitride insulating film 27, and a light-transmitting insulating film functioning as a pixel electrode. The conductive film 29d constitutes a capacitance element 105a.

[0420] The configurations and methods described in this embodiment may be used in conjunction with the configurations and methods described in other embodiments. They can be used in any suitable combination.

[0421] (Embodiment 7) In this embodiment mode, a display device and a manufacturing method thereof different from those in Embodiment Mode 5 will be described with reference to FIG. In this embodiment, an oxide film is formed between different gate electrodes in a transistor. The transistor has a dual gate structure, that is, a nitride semiconductor film is provided. This embodiment differs from the fifth embodiment. Note that a description of the configuration that overlaps with the fifth embodiment will be omitted.

[0422] A specific configuration of an element layer provided on a first substrate 11 included in a display device will be described. The transistor provided in the display device described in this embodiment serves as a gate electrode. The conductive film 13, the oxide semiconductor film 19a, the conductive films 21a and 21b, and the oxide insulating film 25 are The conductive film 29b functions as a gate electrode and overlaps with each of the gate electrodes 29a and 29b. The conductive film 29b, which functions as a gate electrode, is formed in the openings 41a and 41b. 1, it is connected to a conductive film 13 which functions as a gate electrode.

[0423] Next, the transistor 102a shown in FIG. 48 is a channel etch type transistor. Note that AB is the channel length direction of the transistor 102a and the 1 is a cross-sectional view, and the cross-sectional view taken along CD is a cross-sectional view taken along the channel width direction of the transistor 102a and Connection of the conductive film 13 functioning as a gate electrode and the conductive film 29b functioning as a gate electrode FIG.

[0424] The transistor 102a shown in FIG. 48 is a transistor having a dual gate structure. The semiconductor device has a conductive film 13 that functions as a gate electrode provided on a first substrate 11. The nitride insulating film 15 is formed on the substrate 11 and the conductive film 13 that functions as a gate electrode. The oxide insulating film 17 formed on the nitride insulating film 15 and the nitride insulating film 15 and the oxide insulating film 17 are The oxide semiconductor film 19a overlaps with the conductive film 13 functioning as a gate electrode via the insulating film 17. and a conductive film which functions as a source electrode and a drain electrode and is in contact with the oxide semiconductor film 19a. The oxide insulating film 17, the oxide semiconductor film 19a, and the An oxide insulating film 23 is formed on the conductive films 21a and 21b which function as a source electrode and a drain electrode. On the oxide insulating film 23, an oxide insulating film 25 is formed. A nitride insulating film 27 is formed on the oxide insulating film 23, the oxide insulating film 25, and the conductive film 21b. In addition, a conductive oxide semiconductor film 19b is formed over the oxide insulating film 17. The conductive oxide semiconductor film 19b functions as a source electrode and a drain electrode. One of the conductive films 21a and 21b, here the conductive film 21b, is connected to the common electrode 2. 9, and a conductive film 29b functioning as a gate electrode is formed on the nitride insulating film 27.

[0425] As shown in the cross-sectional view of CD, the nitride insulating film 15, the oxide insulating film 17, and the oxide insulating film 18 are Openings 41a and 41b provided in the insulating film 23, the oxide insulating film 25, and the nitride insulating film 27 In the above, the conductive film 29b functioning as a gate electrode is a conductive film That is, the conductive film 13 functioning as a gate electrode and the conductive film 14 functioning as a gate electrode are connected to each other. The conductive film 29b that functions as the second electrode has the same potential.

[0426] Therefore, by applying the same voltage to each gate electrode of the transistor 102a, -Reduction of variation in characteristics, suppression of deterioration in GBT stress test, and under different drain voltages In addition, the oxide semiconductor film 19a can suppress the fluctuation of the on-state current rising voltage. In the case of As a result, the on-state current of the transistor 102a increases and the field effect As a result, the mobility is high, typically with a field effect mobility of 20 cm 2 / V s or more.

[0427] The oxide insulating films 23 and 25 are formed over the transistor 102a described in this embodiment. The oxide insulating films 23 and 25 overlap with the oxide semiconductor film 19a. In the cross-sectional view, the oxide insulating film 23 and the oxide insulating film 25 are provided on the outer side of the oxide semiconductor film 19a. In addition, in the channel width direction shown in FIG. The conductive film 29b is located at the end of the oxide insulating film 23 and the oxide insulating film 25.

[0428] At the edge of the oxide semiconductor film that is processed by etching or the like, the oxide semiconductor film is damaged during the processing. This leads to the formation of defects and contamination by impurities. It is easily activated by the application of stress, and as a result, it tends to become n-type (low resistance). Therefore, the oxide semiconductor film 19a overlapping the conductive film 13 functioning as a gate electrode The end portion is easily converted to n-type. The n-type end portion is connected to the source electrode and the drain electrode. When the n-type region is provided between the conductive films 21a and 21b that function as electrodes, However, the cross section of the CD 1, in the channel width direction, the conductive film 29b functioning as the gate electrode is The gate insulating films 23 and 25 face the side surfaces of the oxide semiconductor film 19a. Due to the influence of an electric field of the conductive film 29b functioning as an electrode, the side surface or The occurrence of parasitic channels in the region including the side surface and the vicinity thereof is suppressed. A transistor with excellent electrical characteristics in which the drain current increases sharply with the threshold voltage. It becomes.

[0429] The element substrate of the display device described in this embodiment includes a semiconductor film including a transistor and an oxide semiconductor film. A conductive oxide semiconductor film that functions as a pixel electrode is formed. The compound semiconductor film functions as one electrode of the capacitance element. For this reason, a new conductive film is formed to form a capacitor element. Since a step of forming a capacitor is not required, the number of manufacturing steps can be reduced. As a result, the area occupied by the capacitive element can be increased while increasing the aperture ratio of the pixel.

[0430] The details of the configuration of the transistor 102a will be described below. Descriptions of components with the same reference numerals will be omitted.

[0431] The conductive film 29b functioning as the gate electrode is the same as the common electrode 29 shown in the fifth embodiment. The above materials can be used appropriately.

[0432] Next, a method for manufacturing the transistor 102a and the capacitor 105a shown in FIG. This will be explained with reference to Figures 34 to 36 and Figure 49.

[0433] As in the fifth embodiment, a gel is formed on a first substrate 11 through the steps shown in FIG. 34 to FIG. 36(A). A conductive film 13 functioning as a gate electrode, a nitride insulating film 15, an oxide insulating film 16, and an oxide semiconductor a conductive oxide semiconductor film 19b; The conductive films 21a and 21b, the oxide insulating film 22, the oxide insulating film 24, and the nitride insulating film In this process, the first photomask to the fourth photomask are used to form the film 26. A photolithography process is carried out using a mask.

[0434] Next, a fifth photomask is used to form a photoresist film on the nitride insulating film 26. After forming a mask, a part of the nitride insulating film 26 is etched using the mask, as shown in FIG. As shown in 49(A), a nitride insulating film 27 having openings 41a and 41b is formed.

[0435] Next, as shown in FIG. 49(B), a conductive film 13 functioning as a gate electrode and a nitride insulating film are A conductive film 29b that will later function as a common electrode 29 and a gate electrode is formed on the insulating film 27. A film 28 is formed.

[0436] Next, a mask is formed on the conductive film 28 by a photolithography process using a sixth photomask. Next, a part of the conductive film 28 is etched using the mask to form a mask as shown in FIG. As shown in FIG. 2C, a conductive film 29b that functions as a common electrode 29 and a gate electrode is formed. After that, the mask is removed.

[0437] Through the above steps, the transistor 102a and the capacitor 105a are manufactured. It is possible.

[0438] The transistor described in this embodiment has a gate electrode functioning in the channel width direction. The conductive film 29b is connected to the side surface of the oxide semiconductor film 19a with the oxide insulating films 23 and 25 interposed therebetween. By facing each other, the oxide semiconductor layer 29b is formed by the effect of the electric field of the conductive film 29b functioning as a gate electrode. The occurrence of a parasitic channel on the side surface of the conductive film 19a or on the region including the side surface and its vicinity As a result, the drain current rises sharply at the threshold voltage, and the electrical characteristics are improved. This results in a transistor with excellent performance.

[0439] The element substrate of the display device shown in this embodiment has a region extending in a striped shape in a direction intersecting the signal lines. A common electrode having a large area is formed. This makes it possible to manufacture a display device with excellent contrast. It is possible.

[0440] In addition, the element substrate of the display device described in this embodiment has the same structure as the oxide semiconductor film of the transistor. At the same time, a conductive oxide semiconductor film that functions as a pixel electrode is formed. The oxide semiconductor film functions as one electrode of the capacitor. This functions as the other electrode of the element. Since the step of forming a conductive film is not required, the manufacturing steps can be reduced. As a result, it is possible to increase the area occupied by the capacitance element while increasing the aperture ratio of the pixel. do.

[0441] The configurations and methods described in this embodiment may be used in conjunction with the configurations and methods described in other embodiments. They can be used in any suitable combination.

[0442] (Embodiment 8) In this embodiment, the number of defects in the oxide semiconductor film is further reduced compared to the above embodiment. A display device having a transistor capable of performing the above-mentioned operation will be described with reference to the drawings. The transistor described in the present embodiment has a plurality of The difference is that the multilayer film includes an oxide semiconductor film. The transistor will now be described in detail.

[0443] 50 shows a cross-sectional view of an element substrate of a display device. -B corresponds to the cross-sectional view between C and D.

[0444] The transistor 102b in FIG. 50A includes the nitride insulating film 15 and the oxide insulating film 17. A multilayer film 37a overlaps the conductive film 13 that functions as a gate electrode through the intermediation of the multilayer film 37a. The source electrode and the drain electrode are electrically conductive films 21a and 21b, which function as a source electrode and a drain electrode in contact with the source electrode and the drain electrode. In addition, the nitride insulating film 15 and the oxide insulating film 17, the multilayer film 37a, and the source electrode and the drain electrode An oxide insulating film 23 and an oxide insulating film 24 are formed on the conductive films 21a and 21b which function as inner electrodes. 25 and a nitride insulating film 27 are formed.

[0445] The capacitance element 105b shown in FIG. 50(A) is a multilayer film 37 formed on the oxide insulating film 17. b, the nitride insulating film 27 in contact with the multilayer film 37b, and a common electrode in contact with the nitride insulating film 27. The multilayer film 37b functions as a pixel electrode.

[0446] In the transistor 102b described in this embodiment, the multilayer film 37a is an oxide semiconductor film. The multilayer film 37a has a two-layer structure. A part of the oxide semiconductor film 19a functions as a channel region. The oxide insulating film 23 is formed so as to contact the oxide insulating film 23. In other words, the oxide semiconductor film 19a and the oxide insulating film 23 are formed on the oxide semiconductor film 19a. An oxide semiconductor film 39a is provided on the insulating film 34.

[0447] The oxide semiconductor film 39a is composed of one or more elements that constitute the oxide semiconductor film 19a. Therefore, the interface between the oxide semiconductor film 19a and the oxide semiconductor film 39a is Therefore, the movement of carriers is not hindered at the interface. This increases the field effect mobility of the transistor.

[0448] The oxide semiconductor film 39a is typically an In-Ga oxide film, an In-Zn oxide film, or an I nM-Zn oxide film (M is Al, Ga, Y, Zr, Sn, La, Ce, or Nd) The energy of the bottom of the conduction band is closer to the vacuum level than that of the oxide semiconductor film 19a. In summary, the energy of the bottom of the conduction band of the oxide semiconductor film 39a and the energy of the oxide semiconductor film 19a The difference in energy between the conduction band minimum and the V or more, or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or is 0.4 eV or less. That is, the electron affinity of the oxide semiconductor film 39a and the The difference in electron affinity from 19a is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, Or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less.

[0449] The oxide semiconductor film 39a contains In, and thus the carrier mobility (electron mobility) is increased. This is preferable.

[0450] The oxide semiconductor film 39a is made of Al, Ga, Y, Zr, Sn, La, Ce, or Nd. By having a higher atomic ratio of In than In, the following effects may be obtained. (1) Oxide (2) Enlarging the energy gap of the oxide semiconductor film 39a (3) To reduce the diffusion of impurities from the outside. (4) To form an oxide semiconductor film. Compared to 19a, it has higher insulating properties. (5) Ga, Y, Zr, Sn, La, Ce, or Nd is a metal element that has a strong bond with oxygen, so oxygen deficiency is less likely to occur.

[0451] When the oxide semiconductor film 39a is an In-M-Zn oxide film, the sum of In and M is 10 When the atomic percentage of In and M is 0 atomic%, the atomic percentage of In is less than 50 atomic%, M is higher than 50 atomic %, and more preferably In is less than 25 atomic %; Suppose M is 75 atomic% higher.

[0452] In addition, the oxide semiconductor film 19a and the oxide semiconductor film 39a are In-M-Zn oxide M( In the case of Al, Ga, Y, Zr, Sn, La, Ce, or Nd), the oxide semiconductor film 19a In comparison, M (Al, Ga, Y, Zr, Sn, La, The atomic ratio of Ce or Nd) is large, and is typically contained in the oxide semiconductor film 19a. Compared with the above atoms, it is 1.5 times or more, preferably 2 times or more, and more preferably 3 times or more. This is the atomic ratio.

[0453] In addition, the oxide semiconductor film 19a and the oxide semiconductor film 39a are made of In-M-Zn oxide (M In the case where the oxide semiconductor film 39 is Al, Ga, Y, Zr, Sn, La, Ce, or Nd, a is In:M:Zn=x1:y1:z1 [atomic ratio], and the oxide semiconductor film 19a is In:M If Zn=x2:y2:z2 [atomic ratio], then y1 / x1 is greater than y2 / x2. Preferably, y1 / x1 is 1.5 times or more larger than y2 / x2. More preferably, y1 / x1 is more than twice as large as y2 / x2, and more preferably, y1 / x1 is more than y2 / x More than three times larger than 2.

[0454] The oxide semiconductor film 19a is an In-M-Zn oxide film (wherein M is Al, Ga, Y, Zr, or Sn). , La, Ce, or Nd), the target used to form the oxide semiconductor film 19a In the target, when the atomic ratio of the metal elements is In:M:Zn = x1:y1:z1 、 x 1 / y1 is 1 / 3 or more and 6 or less, further 1 or more and 6 or less, and z1 / y1 is 1 / 3 or more and 6 or less, further 1 or more and 6 or less is preferable. By setting z1 / y1 to 1 or more and 6 or less, a CAAC-OS film is likely to be formed as the oxide semiconductor film 19a . Representative examples of the atomic ratio of the metal elements in the target include In:M:Zn = 1:1:1, I n:M:Zn = 1:1:1.2, In:M:Zn = 3:1:2, etc.

[0455] When the oxide semiconductor film 39a is an In-M-Zn oxide film (M is Al, Ga, Y, Zr, Sn , La, Ce, or Nd), the target used to form the oxide semiconductor film 39a In the target, when the atomic ratio of the metal elements is In:M:Zn = x2:y2:z2 、 x 2 / y2 < x1 / y1, and z2 / y2 is 1 / 3 or more and 6 or less, further 1 or more and 6 or more It is preferable that it is below. By setting z2 / y2 to 1 or more and 6 or less, the oxide semiconductor film 39a is likely to be formed as a CAAC-OS film. Representative examples of the atomic ratio of the metal elements in the target include In:M:Zn = 1:3:2, In:M:Zn = 1:3:4, In :M:Zn = 1:3:6, In:M:Zn = 1:3:8, In:M:Zn = 1:4:4, In:M:Zn = 1:4:5, In:M:Zn = 1:4:6, In:M:Zn = 1:4: 7, In:M:Zn = 1:4:8, In:M:Zn = 1:5:5, In:M:Zn = 1: 5:6, In:M:Zn = 1:5:7, In:M:Zn = 1:5:8, In:M:Zn = Examples include 1:6:8.

[0456] Note that the atomic ratios of the oxide semiconductor film 19a and the oxide semiconductor film 39a are each subject to error. The atomic ratios listed above may vary by ±40%.

[0457] The oxide semiconductor film 39a is a film that is used as an oxide semiconductor when forming the oxide insulating film 25 to be formed later. It also functions as a membrane for reducing damage to the body membrane 19a.

[0458] The thickness of the oxide semiconductor film 39a is 3 nm to 100 nm, preferably 3 nm to 50 nm. 0 nm or less.

[0459] The oxide semiconductor film 39a may have the crystal structure shown in the oxide semiconductor film 19a as appropriate. This can be done.

[0460] Note that the oxide semiconductor film 19a and the oxide semiconductor film 39a each have an amorphous structure. region, microcrystalline region, polycrystalline region, CAAC-OS region, single crystal region The mixed film may have two or more regions, for example, an amorphous structure region, The region may be a microcrystalline region, a polycrystalline region, a CAAC-OS region, or a single crystal region. In some cases, the mixed film may have a single layer structure having two or more regions. The structure is divided into three regions: microcrystalline structure, polycrystalline structure, CAAC-OS, and single crystal structure. There may be a laminate structure of two or more of the regions.

[0461] Here, the oxide semiconductor film 39a is disposed between the oxide semiconductor film 19a and the oxide insulating film 23. For this reason, between the oxide semiconductor film 39a and the oxide insulating film 23, Even if carrier traps are formed by impurities and defects, the carrier traps and oxides There is a gap between the oxide semiconductor film 19a. As a result, the electrons flowing through the oxide semiconductor film 19a is less likely to be captured by carrier traps, making it possible to increase the on-state current of the transistor. In addition, the field effect mobility can be increased. When trapped, the electrons become a fixed negative charge. However, the oxide semiconductor film 19a and the carrier trapping The separation between the carrier traps reduces the capture of electrons in the carrier traps. This makes it possible to reduce the amount of variation in the threshold voltage.

[0462] In addition, the oxide semiconductor film 39a can block impurities from the outside. The amount of impurities moving from the outside to the oxide semiconductor film 19a can be reduced. The oxide semiconductor film 39a is less likely to form oxygen vacancies. It is possible to reduce the impurity concentration and oxygen vacancy amount in a.

[0463] The oxide semiconductor film 19a and the oxide semiconductor film 39a are not simply laminated. A continuous junction (here, the energy of the bottom of the conduction band changes continuously between the layers) is used. In other words, trap centers and recombination centers are formed at the interfaces of each film. The layer structure is designed so that there are no impurities that would create such defect levels. When impurities are present between the oxide semiconductor film 19a and the oxide semiconductor film 39a, the energy The continuity of the Gate band is lost, and carriers are trapped or recombined at the interface, causing dissipation. It will be destroyed.

[0464] To form continuous junctions, a multi-chamber deposition system equipped with a load lock chamber is required. Each film is laminated in succession using a sputtering device without exposing it to the air. Each chamber in the sputtering apparatus is required for the oxide semiconductor film. In order to remove impurities such as water as much as possible, an adsorption type vacuum pump such as a cryopump is used. High vacuum pump (5×10 -7 Pa~1×10 -4 It is preferable to use a temperature of up to about 10 Pa. Alternatively, a turbo molecular pump and cold trap can be combined to separate the chamber from the exhaust system. It is preferable to prevent the backflow of gases into the bar, especially gases containing carbon or hydrogen. stomach.

[0465] In place of the multilayer film 37a, a transistor 102c shown in FIG. It may have a multi-layer film 38a.

[0466] In place of the multilayer film 37b, a multilayer film such as a capacitive element 105c shown in FIG. It may have a membrane 38b.

[0467] The multilayer film 38a includes an oxide semiconductor film 49a, an oxide semiconductor film 19a, and an oxide semiconductor film That is, the multilayer film 38a has a three-layer structure. It functions as a channel region.

[0468] The oxide semiconductor film 49a is formed using a material and a method similar to those of the oxide semiconductor film 39a. It is possible.

[0469] The multilayer film 38b includes a conductive oxide semiconductor film 49b, a conductive oxide semiconductor The multilayer film 38b includes a conductive oxide semiconductor film 39f and a conductive oxide semiconductor film 39b. The multilayer film 38b functions as a pixel electrode.

[0470] The oxide semiconductor film 19f is formed by using the same material and method as the conductive oxide semiconductor film. The oxide semiconductor film 49b can be formed of a material similar to that of the oxide semiconductor film 39b. and a formation method can be appropriately used.

[0471] The oxide insulating film 17 and the oxide semiconductor film 49a are in contact with each other. An oxide semiconductor film 49a is provided between the oxide semiconductor film 19a and the oxide semiconductor film 49b.

[0472] The multilayer film 38a and the oxide insulating film 23 are in contact with each other. The oxide semiconductor film 19a is in contact with the oxide insulating film 23. That is, between the oxide semiconductor film 19a and the oxide insulating film 23, An oxide semiconductor film 39a is provided.

[0473] The oxide semiconductor film 49a is preferably thinner than the oxide semiconductor film 19a. The thickness of the semiconductor film 49a is set to 1 nm or more and 5 nm or less, preferably 1 nm or more and 3 nm or less. This makes it possible to reduce the amount of variation in the threshold voltage of the transistor.

[0474] In the transistor described in this embodiment, Therefore, the oxide semiconductor film 39a and the oxide Even if carrier traps are formed between the insulating films 23 due to impurities and defects, There is a gap between the carrier traps and the oxide semiconductor film 19a. Electrons flowing through the conductive film 19a are less likely to be captured by carrier traps, and the on-state current of the transistor is reduced. It is possible to increase the current and improve the field effect mobility. When an electron is captured by a carrier trap, the electron becomes a negative fixed charge. As a result, the threshold voltage of the transistor varies. Since there is a gap between the film 19a and the carrier trap, the electrons in the carrier trap Therefore, it is possible to reduce the amount of trapping of electrons, and the amount of variation in the threshold voltage can be reduced.

[0475] In addition, the oxide semiconductor film 39a can block impurities from the outside. The amount of impurities moving from the outside to the oxide semiconductor film 19a can be reduced. The oxide semiconductor film 39a is less likely to form oxygen vacancies. It is possible to reduce the impurity concentration and oxygen vacancy amount in a.

[0476] In addition, an oxide semiconductor film 49a is provided between the oxide insulating film 17 and the oxide semiconductor film 19a. The oxide semiconductor film 39 is disposed between the oxide semiconductor film 19a and the oxide insulating film 23. Since the oxide semiconductor film 49a is provided near the interface between the oxide semiconductor film 49a and the oxide semiconductor film 19a, the silicon and carbon concentrations in the oxide semiconductor film 19a, Alternatively, silicon or carbon in the vicinity of the interface between the oxide semiconductor film 39a and the oxide semiconductor film 19a As a result, the concentration of the multilayer film 38a can be reduced. The absorption coefficient derived by the method is 1×10 -3 / cm, preferably less than 1×10 -4 / cm not yet The number of localized levels is extremely small.

[0477] The transistor 102c having such a structure includes a multilayer film including an oxide semiconductor film 19a. Since there are very few defects in 38a, it is possible to improve the electrical characteristics of the transistor. Typically, it is possible to increase the on-current and improve the field effect mobility. The threshold voltage in the BT stress test and the optical BT stress test, which are examples of stress tests, The pressure fluctuation is small and it is highly reliable.

[0478] The configurations and methods described in this embodiment may be used in conjunction with the configurations and methods described in other embodiments. They can be used in any suitable combination.

[0479] (Embodiment 9) In this embodiment, the semiconductor device formed on the first substrate 11 shown in any of the embodiments 5 to 8 is A light-emitting device using a part of the element layer will be described with reference to FIGS. Here, a part of the element layer shown in the embodiment modes 5 and 6 will be described. Other configurations of element layers may be used in the light emitting device.

[0480] The light emitting device shown in FIG. 51 is formed on the first substrate 11 shown in FIG. 33 of the fifth embodiment. In the element layer, an insulating film 371 is provided on the inorganic insulating film 30, and the inorganic insulating film 30 and a conductive The EL layer 373 is provided over the oxide semiconductor film 19b having an insulating film 371 and the insulating film 371. The conductive film 375 is provided on the L layer 373 and the insulating film 371. The compound semiconductor film 19b, the EL layer 373, and the conductive film 375 constitute a light emitting element 370a. do.

[0481] The light emitting device shown in FIG. 52 is formed on the first substrate 11 shown in FIG. 44 of the sixth embodiment. In the element layer, an insulating film provided on the inorganic insulating film 30 and the conductive film 29c having light-transmitting properties 371, and an EL layer 373 provided on the inorganic insulating film 30 and the conductive film 29c having light-transmitting properties. and a conductive film 375 provided over the EL layer 373 and the insulating film 371. The conductive film 29c, the EL layer 373, and the conductive film 375 constitute a light emitting element 370b. .

[0482] In addition, the element substrate of the light-emitting device described in this embodiment has the same structure as the oxide semiconductor film of the transistor. At the same time, a conductive oxide semiconductor film that functions as a pixel electrode is formed. A light emitting device can be manufactured with fewer steps than before.

[0483] Alternatively, the element substrate of the light-emitting device described in this embodiment may include an oxide semiconductor film of a transistor. At the same time, a conductive oxide semiconductor film that functions as an electrode of a capacitor is formed. The conductive oxide semiconductor film functions as one electrode of the capacitor. In order to form a quantum well, a process for forming a conductive film is not required, and the manufacturing process can be reduced. The other electrode of the capacitor element can be a light-transmitting conductive film that functions as a pixel electrode. Therefore, the capacitor element has a light-transmitting property. As a result, the area occupied by the capacitor element is increased. At the same time, the aperture ratio of the pixel can be increased.

[0484] The configurations and methods described in this embodiment may be used in conjunction with the configurations and methods described in other embodiments. They can be used in any suitable combination.

[0485] (Embodiment 10) In this embodiment, a transistor included in the display device described in the above embodiment is One embodiment applicable to an oxide semiconductor film will be described.

[0486] <Structure of oxide semiconductors> The structure of an oxide semiconductor will be described below.

[0487] Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor, polycrystalline oxide Examples of the oxide semiconductor include a semiconductor, a microcrystalline oxide semiconductor, and an amorphous oxide semiconductor.

[0488] From another point of view, the oxide semiconductor is classified into an amorphous oxide semiconductor and a crystalline oxide semiconductor. Crystalline oxide semiconductors are classified into single crystal oxide semiconductors, CAAC- These include OS, polycrystalline oxide semiconductors, and microcrystalline oxide semiconductors.

[0489] <caac-os> First, let me explain about CAAC-OS. The oxide semiconductor has Axis Aligned Nanocrystals. It is also possible.

[0490] CAAC-OS is an oxide that has multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0491] Transmission Electron Microscope (TEM) A combined analysis image (high resolution) of the bright-field image and diffraction pattern of CAAC-OS was obtained by using a microscope. When observing a high-resolution TEM image, multiple pellets can be confirmed. On the other hand, in high-resolution TEM images, the boundaries between pellets, i.e., grain boundaries, are clearly visible. Therefore, it is difficult to clearly confirm the presence of the CAAC-OS at the grain boundaries. It can be said that the decrease in electron mobility caused by the above phenomenon is unlikely to occur.

[0492] The following describes the CAAC-OS observed by TEM. 1 shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction approximately parallel to the sample surface. For high-resolution TEM imaging, spherical aberration correction is required. The spherical aberration corrector function was used. , specifically called a Cs-corrected high-resolution TEM image. Cs-corrected high-resolution TEM images are obtained, for example, This is performed using an atomic resolution analytical electron microscope such as the JEM-ARM200F manufactured by JEOL Ltd. It is possible.

[0493] An enlarged Cs-corrected high-resolution TEM image of region (1) in Figure 72(A) is shown in Figure 72(B). From Figure 72(B), it can be confirmed that the metal atoms are arranged in layers in the pellet. The arrangement of each metal atom layer is determined by the surface on which the CAAC-OS film is to be formed (also called the surface on which the film is to be formed). Or it reflects the unevenness of the top surface and is parallel to the surface on which the CAAC-OS is formed or the top surface.

[0494] As shown in Figure 72(B), CAAC-OS has a characteristic atomic arrangement. ) shows the characteristic atomic arrangement with auxiliary lines. ) the size of each pellet is about 1 nm to 3 nm, and the size of each pellet is about 1 nm to 3 nm. It can be seen that the size of the gap caused by the inclination is about 0.8 nm. The pellets may also be referred to as nanocrystals (nc).

[0495] Here, based on the Cs-corrected high-resolution TEM image, the pellets of CAAC-OS on the substrate 5120 were The layout of the 5100 is shown diagrammatically as a stack of bricks or blocks. (See FIG. 72(D)). Between the pellets observed in FIG. 72(C), The portion where the inclination occurs corresponds to the area 5161 shown in FIG.

[0496] FIG. 73(A) shows the C s-corrected high-resolution TEM images are shown. ) are enlarged Cs-corrected high-resolution TEM images shown in Fig. 73(B), Fig. 73(C), and Fig. 73(D), respectively. As shown in Figure 73(D), Figure 73(B), Figure 73(C) and Figure 73(D) show that the pellet It can be seen that the metal atoms are arranged in a triangular, quadrangular or hexagonal shape. However, no regularity is observed in the arrangement of metal atoms among different pellets.

[0497] Next, C was analyzed by X-ray diffraction (XRD). We will explain AAC-OS. For example, CAAC-O with InGaZnO4 crystals When the out-of-plane structural analysis is performed on S, the result is as shown in Figure 74(A). As shown in the figure, a peak may appear at a diffraction angle (2θ) of around 31°. Since this is attributed to the (009) plane of the ZnO4 crystal, it is believed that the CAAC-OS crystal has a c-axis orientation. It can be seen that the crystal has a c-axis oriented in a direction substantially perpendicular to the surface on which the crystal is formed or to the upper surface.

[0498] In addition, in the out-of-plane structural analysis of CAAC-OS, 2θ is 31 In addition to the peaks around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks in the vicinity indicate that some of the CAAC-OS contains crystals that do not have the c-axis orientation. The more preferable CAAC-OS is a structure obtained by the out-of-plane method. The analysis shows a peak at 2θ around 31° and no peak at 2θ around 36°.

[0499] On the other hand, in-pla, X-rays are incident on CAAC-OS from a direction almost perpendicular to the c-axis. When the structure is analyzed by the NE method, a peak appears at 2θ of about 56°. This peak is I It is assigned to the (110) plane of the crystal of nGaZnO4. In the case of CAAC-OS, 2θ is set to 5 The sample was fixed at approximately 6° and analyzed while rotating around the normal vector of the sample surface (φ axis). Even if a (φ scan) is performed, no clear peak appears as shown in Figure 74(B). On the other hand, in the case of a single crystal oxide semiconductor such as InGaZnO4, 2θ is fixed at around 56° and φ When scanned, it is assigned to a crystal plane equivalent to the (110) plane, as shown in Figure 74(C). Six peaks are observed. Therefore, from the structural analysis using XRD, CAAC-OS It can be seen that the orientation of the a-axis and the b-axis is irregular.

[0500] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with ZnO4 crystals, a probe diameter of 300 nm was used parallel to the sample surface. When an electron beam is incident on the sample, a diffraction pattern (selected area transmission electron diffraction) as shown in FIG. This diffraction pattern may appear due to the InGaZnO4 The spots due to the (009) plane of the crystal are included. Therefore, even by electron diffraction, The pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis faces the surface to be formed or the upper surface. On the other hand, when the probe was applied perpendicular to the sample surface, The diffraction pattern when an electron beam with a diameter of 300 nm is incident is shown in FIG. 5(B), a ring-shaped diffraction pattern is observed. Therefore, electron diffraction also It can be seen that the a-axis and b-axis of the pellets contained in CAAC-OS do not have any orientation. In addition, the first ring in FIG. 75(B) is the (010) plane of the InGaZnO4 crystal. This is thought to be due to the (100) plane and the like. This is thought to be due to the (110) surface, etc.

[0501] In addition, the CAAC-OS is an oxide semiconductor with a low density of defect states. The defects include, for example, defects caused by impurities and oxygen vacancies. AC-OS can also be considered an oxide semiconductor with a low impurity concentration. S can also be said to be an oxide semiconductor with few oxygen vacancies.

[0502] Impurities contained in oxide semiconductors can act as carrier traps or as carrier generation sources. In addition, oxygen vacancies in an oxide semiconductor may become carrier traps or By capturing hydrogen, it can become a carrier generation source.

[0503] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon have a higher acidity than metal elements that constitute oxide semiconductors. Elements with strong bonds to oxygen remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0504] In addition, an oxide semiconductor with a low density of defect states (few oxygen vacancies) has a low carrier density. Such an oxide semiconductor can be a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor. CAAC-OS is called an oxide semiconductor. It has a low impurity concentration and a low density of defect states. Therefore, the oxide semiconductor is likely to be a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor. A transistor using AC-OS has electrical characteristics in which the threshold voltage is negative (normal Also, it is rare for the product to be pure or substantially pure. Oxide semiconductors have few carrier traps. The charge that is stored in the material takes a long time to be released and behaves like a fixed charge. Therefore, a transistor using an oxide semiconductor with a high impurity concentration and a high density of defect states is required. On the other hand, transistors using CAAC-OS can have unstable electrical characteristics. The resulting transistor has small fluctuations in electrical characteristics and is highly reliable.

[0505] In addition, because the density of defect states in CAAC-OS is low, the defects generated by light irradiation can be easily removed. Therefore, the carriers are less likely to be captured by the defect states. The electrical characteristics of a transistor vary little when irradiated with visible light or ultraviolet light.

[0506] <Microcrystalline oxide semiconductor> Next, a microcrystalline oxide semiconductor will be described.

[0507] Microcrystalline oxide semiconductors have regions where crystals can be confirmed in high-resolution TEM images. The microcrystalline oxide semiconductor has a crystal structure including a region in which a crystal part is not clearly observed and a region in which a crystal part is not clearly observed. The crystal part contained is 1 nm to 100 nm or 1 nm to 10 nm in size. In particular, fine crystals with sizes between 1 nm and 10 nm or between 1 nm and 3 nm are often The oxide semiconductor with nanocrystals is called nc-OS (nanocrystallin The nc-OS is called NC-Oxide Semiconductor. In some cases, the grain boundaries cannot be clearly seen in the TEM images. It is possible that the origin of the pellets in C-OS is the same as that of the pellets in C-OS. The crystalline part of the OS is sometimes called a pellet.

[0508] nc-OS is a material that is used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially regions between 1 nm and The atomic arrangement has periodicity in the region of 3 nm or less. There is no regularity in the crystal orientation between the layers. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be indistinguishable from amorphous oxide semiconductors. For example, an XRD apparatus that uses X-rays with a diameter larger than that of the pellet for nc-OS may be used. When the structure was analyzed using the out-of-plane method, the crystal plane was not shown. In addition, the probe diameter ( For example, electron diffraction (also called selected area electron diffraction) is performed using an electron beam of 50 nm or more. On the other hand, for nc-OS, a halo-like diffraction pattern is observed. Nanobeam electron circuits are used that use an electron beam with a probe diameter close to the size of the pellet or smaller than the pellet. When the nc-OS is folded, spots are observed. In some cases, a bright area with a circular (ring-like) appearance may be observed. Multiple spots may be observed within a ring-like region.

[0509] In this way, the crystal orientation between the pellets (nanocrystals) is not regular, so nc -OS with RANC (Random Aligned nanocrystals) The oxide semiconductor or NANC (Non-Aligned Nanocrystal The semiconductor may also be referred to as an oxide semiconductor having a structure including a metal oxide layer.

[0510] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. However, the density of defect states in the nc-OS is lower than that in the amorphous oxide semiconductor. In the case of S, there is no regularity in the crystal orientation between different pellets. Therefore, the nc-OS is The defect density is higher than that of AAC-OS.

[0511] <Amorphous oxide semiconductor> Next, the amorphous oxide semiconductor will be described.

[0512] Amorphous oxide semiconductors are oxides in which the atomic arrangement in the film is irregular and there are no crystalline parts. An example is an oxide semiconductor that has an amorphous state, such as quartz.

[0513] In the case of an amorphous oxide semiconductor, no crystalline parts can be confirmed in a high-resolution TEM image.

[0514] When the structure of amorphous oxide semiconductors is analyzed using an XRD device, out-of-p In the lane analysis, no peaks indicating crystal planes were detected. When electron diffraction is performed on a conductor, a halo pattern is observed. When nanobeam electron diffraction was performed on the specimen, no spots were observed, only a halo pattern was observed. Observed.

[0515] There are various views on amorphous structures. For example, A structure that does not have this property is called a completely amorphous structure. In addition, the distance between the nearest neighbors or the second nearest neighbors is called the structure. A structure that has order at the interface and no long-range order is sometimes called an amorphous structure. Therefore, according to the strictest definition, an oxide semiconductor that has even a slight degree of order in its atomic arrangement is called a non-crystalline oxide semiconductor. In addition, it cannot be called an crystalline oxide semiconductor. Amorphous oxide semiconductors cannot be called amorphous oxide semiconductors. For example, CAAC-OS and nc-OS can be used as amorphous oxide semiconductors or completely amorphous It cannot be called an oxide semiconductor.

[0516] <Amorphous-like oxide semiconductor> Note that an oxide semiconductor may have a structure between an nc-OS and an amorphous oxide semiconductor. An oxide semiconductor having such a structure is particularly called an amorphous-like oxide semiconductor (alumina-like oxide semiconductor). ike OS:amorphous-like Oxide Semiconducto It is called r).

[0517] In a-like OS, voids are observed in high-resolution TEM images. In addition, crystals may be clearly visible in high-resolution TEM images. and regions where no crystalline portion can be confirmed.

[0518] Because of the porosity, the a-like OS has an unstable structure. e OS has an unstable structure compared with CAAC-OS and nc-OS. This shows the change in structure due to electron irradiation.

[0519] The samples to be irradiated with electrons were a-like OS (referred to as sample A), nc-OS Sample B) and CAAC-OS (sample C) are prepared. The sample in is also an In-Ga-Zn oxide.

[0520] First, high-resolution cross-sectional TEM images of each sample are obtained. It can be seen that all the materials have crystalline parts.

[0521] The determination of which part is regarded as one crystal part can be made as follows. For example, The unit cell of the InGaZnO4 crystal has three In-O layers and one Ga-Zn-O layer. It is known that the structure has a total of nine layers, six of which are layered in the c-axis direction. The spacing between these adjacent layers is approximately the same as the lattice spacing (also called the d value) of the (009) plane. The value is calculated to be 0.29 nm from crystal structure analysis. The areas where the spacing between the crystals is 0.28 nm to 0.30 nm are considered to be crystal parts of InGaZnO4. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal.

[0522] Figure 76 shows an example of investigating the average size of the crystal parts (22 to 45 places) of each sample. However, the length of the lattice fringes is the size of the crystal part. It can be seen that the crystalline part of the ke OS grows in size according to the cumulative dose of electron irradiation. Specifically, as shown by (1) in Figure 76, the initial TEM observation showed a size of about 1.2 nm. The crystal part (also called the initial nucleus), which was 4.2×10 8 e - / n m 2 On the other hand, in the nc-O For S and CAAC-OS, the cumulative electron dose from the start of electron irradiation was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystals within the range of As shown in (2) and (3) in Figure 76, the nc-OS and The sizes of the crystal parts of the CAAC-OS and CAAC-OS are approximately 1.4 nm and 2.1 nm, respectively. It can be seen that.

[0523] Thus, in a-like OS, the growth of crystals can be observed by electron irradiation. On the other hand, in the case of nc-OS and CAAC-OS, the growth of the crystals due to electron irradiation is almost nonexistent. In other words, a-like OS is not seen as a nc-OS or CAAC-OS. It is clear that it has an unstable structure compared to the OS.

[0524] In addition, because of the porosity, a-like OS is more difficult to treat than nc-OS and CAAC-OS. Specifically, the density of the a-like OS is The density of the nc-OS and the CAA The density of C-OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a crystal density of less than 78%.

[0525] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of single crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 It becomes. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0g / cm 3 More than 5.9g / cm 3 It will be less than. For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, , the density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0526] In some cases, single crystals of the same composition do not exist. In such cases, crystals of different compositions may be used in any ratio. By combining single crystals of the desired composition, the density equivalent to that of a single crystal of the desired composition can be estimated. The density corresponding to a single crystal of a desired composition can be obtained by combining single crystals of different compositions. The density should be as low as possible. It is preferable to estimate the size of the single crystal by combining different types of single crystals.

[0527] As described above, oxide semiconductors have various structures and each structure has various characteristics. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, or a microcrystalline oxide semiconductor. The layer may be a laminated film having two or more of a compound semiconductor and a CAAC-OS.

[0528] <Film formation model> An example of a film formation model for CAAC-OS and nc-OS will be described below.

[0529] FIG. 77(A) shows a process of forming a CAAC-OS film by a sputtering method. FIG. 1 is a schematic diagram of the inside of a membrane chamber.

[0530] The target 5130 is attached to a backing plate. A plurality of magnets are disposed at positions facing the target 5130 through the magnets. The magnetic field is generated by a number of magnets. The magnetic field of the magnets is used to increase the deposition speed. The sputtering method used is called magnetron sputtering.

[0531] The substrate 5120 is disposed so as to face the target 5130, and the distance therebetween is d( The target-substrate distance (TS distance) is preferably 0.01 m or more and 1 m or less. The deposition chamber is mostly filled with deposition gas (e.g., oxygen, argon, or a mixture containing 5% or more by volume of oxygen) and The pressure is controlled to be 1 Pa or more and 100 Pa or less, preferably 0.1 Pa or more and 10 Pa or less. By applying a certain voltage to the target 5130, a discharge starts and a plasma is generated. It is confirmed that a high density plasma region is generated near the target 5130 by the magnetic field. In the high-density plasma region, the deposition gas is ionized, and ions 5101 The ion 5101 is, for example, an oxygen cation (O + ) and argon cations ( Ar + ) etc.

[0532] Here, the target 5130 has a polycrystalline structure having multiple crystal grains, The crystal grains include cleavage planes. FIG. 78(A) shows an example of a cleavage plane included in the target 5130. The crystal structure of InGaZnO4 is shown in Fig. 78(A). This is the structure of InGaZnO4 crystals observed from the outside. In the Ga-Zn-O layers, the oxygen atoms in each layer are arranged in close proximity. The negative charge of the oxygen atom causes the two adjacent Repulsion occurs between the Ga-Zn-O layers. As a result, the InGaZnO4 crystals are The cleavage plane is between the two Ga-Zn-O layers.

[0533] Ions 5101 generated in the high-density plasma region are attracted to the target 5130 by the electric field. The cleavage plane is then accelerated and collides with the target 5130. At this time, flat or planar particles are generated from the cleavage plane. Pellet 5100a and pellet 5100b, which are pellet-shaped sputtered particles, are peeled off, The pellets 5100a and 5100b are ejected by the ions 5101. The impact of a collision can cause distortion of the structure.

[0534] The pellet 5100a is a flat plate or pellet having a triangular, for example equilateral, plane. The pellet 5100b is a sputtered particle having a hexagonal shape, for example, a regular hexagonal plane. The pellets 5100a and 5100b are sputtered particles having a plate-like or pellet-like shape. The term pellets refers to flat or pellet-shaped sputter particles such as pellet 5100b. The planar shape of the pellet 5100 is not limited to a triangle or a hexagon, but may be any shape, e.g. For example, a shape may be formed by combining multiple triangles. In some cases, the shape may be a quadrilateral (for example, a rhombus) made up of two joined sides.

[0535] The thickness of the pellet 5100 is determined according to the type of deposition gas. The reason will be explained later. It is preferable that the thickness of the pellet 5100 is uniform. A pellet shape with no lumps is preferable to a thick cube shape. The thickness of the 5100 is 0.4 nm to 1 nm, preferably 0.6 nm to 0.8 nm. For example, the pellet 5100 has a width of 1 nm or more and 3 nm or less. The diameter of the pellet 5100 is 1.2 nm or more and 2.5 nm or less. For example, the target 5 having In-Ga-Zn oxide corresponds to the initial nucleus described in . When ions 5101 are bombarded onto the Ga-Zn-O layer 130, as shown in FIG. 7, a pellet 5100 having three layers, an In-O layer and a Ga-Zn-O layer, is peeled off. FIG. 8(C) shows the structure of the exfoliated pellet 5100 observed from a direction parallel to the c-axis. The RET5100 is a nano-sized wafer with two Ga-Zn-O layers and an In-O layer. This can also be called a sandwich structure.

[0536] As the pellet 5100 passes through the plasma, the sides may become negatively or positively charged. The pellet 5100 may, for example, have negatively charged oxygen atoms located on its sides. The sides of the particles have the same polarity of charge, so the charges repel each other, forming a flat or pentamorphic shape. It is possible to maintain the shape of the In-Ga-Z In the case of n-oxide, the oxygen atom bonded to the indium atom may be negatively charged. Or, an oxygen atom bonded to an indium atom, a gallium atom, or a zinc atom is negatively charged. In addition, when the pellet 5100 passes through the plasma, it may be possible that the pellet 5100 may be irradiated with the plasma. The area where the atoms grow by bonding with indium, gallium, zinc, and oxygen atoms. The difference in size between (2) and (1) in Figure 76 above is due to the growth in the plasma. Here, when the substrate 5120 is at room temperature, the pellets on the substrate 5120 Since the growth of 5100 does not occur easily, the OS becomes nc-OS (see Figure 77(B)). Since the film can be formed at a low temperature, nc-OS can be formed even on a large substrate (5120). In order to grow the pellet 5100 in plasma, a sputtering method is used. It is effective to increase the film formation power in the pellet 5. 100 structures can be stabilized.

[0537] As shown in FIG. 77(A) and FIG. 77(B), for example, a pellet 5100 is a plasma It flies like a kite through the air and flutters up to the top of the board 5120. Since the pellet 100 is electrically charged, it will be attracted to the area where other pellets 5100 are already deposited. Here, on the upper surface of the substrate 5120, a repulsive force is generated in a direction parallel to the upper surface of the substrate 5120. In addition, a vertical magnetic field (also called a horizontal magnetic field) is generated between the substrate 5120 and the target 5120. Since a potential difference is applied between the electrodes 130, the electric field from the substrate 5120 to the target 5130 Therefore, the pellet 5100 is disposed on the upper surface of the substrate 5120 in the following manner: The magnetic field and the electric current act on the object, resulting in a force (Lorentz force). This is what Fleming This can be understood by the left-hand rule.

[0538] The pellet 5100 has a large mass compared to a single atom. In order to move the surface, it is important to apply some kind of force from the outside. One of these forces is It is possible that the force is generated by the action of a magnetic field and an electric current. To provide sufficient force to move the top surface of 5120, the top surface of the substrate 5120 must be The magnetic field parallel to the upper surface of the substrate 5120 is 10 G or more, preferably 20 G or more, and more preferably It is preferable to provide a region where the resistance is 30 G or more, and more preferably 50 G or more. At the top surface of the plate 5120, a magnetic field parallel to the top surface of the substrate 5120 At least 1.5 times, preferably at least 2 times, more preferably at least 3 times the magnetic field perpendicular to the top surface. It is preferable to provide an area where the thickness is 5 times or more.

[0539] At this time, the magnet and the substrate 5120 move or rotate relatively. The direction of the horizontal magnetic field on the upper surface of the substrate 5120 continues to change. On the upper surface of the plate 5120, the pellet 5100 is subjected to forces from various directions. You can move to.

[0540] Also, when the substrate 5120 is heated as shown in FIG. 0 and the substrate 5120, the resistance due to friction is small. The pellet 5100 glides over the top surface of the substrate 5120. The transfer occurs with the flat surface facing the substrate 5120. When the pellet 5100 reaches its side surface, the sides of the pellet 5100 are joined together. The oxygen atom on the side of 00 is removed. The removed oxygen atom causes the Since oxygen vacancies may be filled, the CAAC-OS has a low density of defect states. The temperature of the upper surface of the plate 5120 is, for example, 100° C. or more and less than 500° C., 150° C. or more and 450° C. The temperature may be set to 170° C. or higher and lower than 400° C. Even in such a case, it is possible to form a CAAC-OS film.

[0541] In addition, the pellet 5100 is heated on the substrate 5120, whereby the atoms are rearranged. The distortion of the structure caused by the collision of the ions 5101 is relieved. Pellet 5100 is almost single crystal. Even if the pellets 5100 are heated after being bonded to each other, the pellets 5100 themselves do not expand. Therefore, the gaps between the pellets 5100 widen, and the crystals Defects such as grain boundaries do not form, and crevasses do not form.

[0542] In addition, the CAAC-OS is not made of a single crystal oxide semiconductor. The pellets are made of nano-crystals, and the aggregates resemble bricks or blocks stacked together. In addition, there are no grain boundaries between the pellets 5100. Heating during and after film formation, or bending, can cause deformation such as shrinkage in CAAC-OS. Even if the deformation occurs, it is possible to relieve the local stress or release the strain. This structure is suitable for use in flexible semiconductor devices. The result is an arrangement in which Ret 5100 (nanocrystals) are randomly stacked.

[0543] When the target 5130 is sputtered by ions 5101, not only the pellet 5100 but also Zinc oxide may peel off. Zinc oxide is lighter than pellet 5100. Therefore, it reaches the upper surface of the substrate 5120 first. A zinc oxide layer 5102 having a thickness of 2 nm or more and 5 nm or less, or 0.5 nm or more and 2 nm or less, is formed. Figure 79 shows a schematic cross-sectional view.

[0544] As shown in FIG. 79(A), a pellet 5105a and a pellet Here, the pellets 5105a and 5105b are deposited. The pellets 5105c and 5105c are arranged so that their sides are in contact with each other. After being deposited on the pellet 5105b, the pellet 510 slides on the pellet 5105b. In another aspect of FIG. 05a, a plurality of particles 510 detached from the target along with zinc oxide. 3 is crystallized by heating from the substrate 5120 to form a region 5105a1. The number of particles 5103 may include oxygen, zinc, indium, and gallium, among others.

[0545] As shown in FIG. 79(B), the region 5105a1 is integral with the pellet 5105a. The pellet 5105c is formed by condensing the pellet 5105a2. Place it so that it is in contact with another side of 5105b.

[0546] Next, as shown in FIG. 79(C), a pellet 5105d is further added to the pellet 5105a2. After being deposited on pellet 5105a2 and pellet 5105b, It slides on the pellet 5105b. It also slides toward the other side of the pellet 5105c. The pellet 5105 e slides on the zinc oxide layer 5102 .

[0547] As shown in FIG. 79(D), the pellet 5105d has a side surface similar to that of the pellet 51. The pellet 5105e is placed so that its side is in contact with the pellet 5105a2. Also, the other side of the pellet 5105d is placed in contact with the other side of the pellet 5105c. On the surface, a plurality of particles 5103 peeled off from the target 5130 together with zinc oxide are formed. Heat from plate 5120 causes crystallization, forming region 5105d1.

[0548] As described above, the piled pellets are arranged so that they come into contact with each other, and the pellets are The growth occurs to form a CAAC-OS on the substrate 5120. The individual pellets of AC-OS are larger than those of nc-OS. The difference in size between 3) and (2) corresponds to the growth that occurred after deposition.

[0549] In addition, the gaps between the pellets become extremely small, so that one large pellet is formed. One large pellet may have a single crystal structure. For example, The size is 10 nm or more and 200 nm or less, 15 nm or more and 100 nm or less, as viewed from the top. In some cases, the size of the transistors used is between 20nm and 50nm. In an oxide semiconductor, a channel formation region may be contained within one large pellet. That is, a region having a single crystal structure can be used as a channel forming region. As the gap grows, the region with a single crystal structure becomes the channel formation region of the transistor. , may be used as source and drain regions.

[0550] In this way, the channel formation region of the transistor and the like are formed in a region having a single crystal structure. By doing so, it may be possible to improve the frequency characteristics of the transistor.

[0551] Based on the above model, it is considered that the pellet 5100 is deposited on the substrate 5120. CAAC-OS can be deposited even on a surface that does not have a crystalline structure. This indicates that the growth mechanism is different from epitaxial growth. AC-OS does not require laser crystallization and can achieve uniform growth even on large glass substrates. For example, the structure of the upper surface (surface to be formed) of the substrate 5120 is an amorphous structure (e.g. It is possible to form a CAAC-OS film even on amorphous silicon oxide.

[0552] In addition, even if the upper surface of the substrate 5120 on which the CAAC-OS is to be formed is uneven, It can be seen that the pellets 5100 are arranged along the shape of the substrate 5120. If the surface is atomically flat, the pellet 5100 will have a flat surface that is parallel to the ab plane. If the pellet 5100 has a uniform thickness, it is flat and has a uniform thickness. A layer with high crystallinity is formed. Then, the layer is stacked in n steps (n is a natural number). By doing so, CAAC-OS can be obtained.

[0553] On the other hand, even if the upper surface of the substrate 5120 has unevenness, the CAAC-OS can be easily formed by the pellet 51 The structure is made up of n layers (n is a natural number) of layers in which 00 are arranged along the unevenness. Since the surface of the pellet 5100 is uneven, gaps tend to form between the pellets 5100 in the CAAC-OS. However, even in this case, intermolecular forces act between the pellets 5100, causing unevenness. Even if the pellets are arranged in a way that the gaps between them are as small as possible. It is possible to obtain a CAAC-OS having high crystallinity.

[0554] Since the CAAC-OS film is formed by such a model, the sputtered particles are distributed evenly throughout the film. It is preferable that the sputtered particles are in the form of thick pellets. In this case, the surface facing the substrate 5120 is not uniform, and the thickness and crystal orientation cannot be made uniform. There is.

[0555] The film formation model shown above shows that a highly crystalline film can be formed even on a substrate surface having an amorphous structure. Thus, a CAAC-OS having the above properties can be obtained.

[0556] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.

[0557] (Embodiment 11) In this embodiment, a structural example of an electronic device to which a display device of one embodiment of the present invention is applied will be described. In addition, in this embodiment, a display module to which the display device of one embodiment of the present invention is applied will be described. The rule will be explained with reference to FIG. 53.

[0558] The display module 8000 shown in FIG. 53 includes an upper cover 8001 and a lower cover 8002. Between them, touch panel 8004 connected to FPC8003, A display panel 8006, a backlight unit 8007, a frame 8009, a printed circuit board The backlight unit 8007, the battery 8011, and the LCD panel 8012 are also included. The telly 8011, the touch panel 8004, etc. may not be provided.

[0559] The display device of one embodiment of the present invention can be used for the display panel 8006, for example.

[0560] The upper cover 8001 and the lower cover 8002 are connected to the touch panel 8004 and the display panel The shape and dimensions can be changed as appropriate to match the size of 8006.

[0561] The touch panel 8004 is a resistive or capacitive touch panel. The display panel 8006 can be used by overlapping it with the opposing substrate (sealing substrate). It is also possible to provide a touch panel function to the display panel. It is also possible to provide an optical sensor in each pixel of the 8006 to make it into an optical touch panel. Alternatively, a touch sensor electrode may be provided in each pixel of the display panel 8006 to realize a capacitive touch sensor. It is also possible to use it as a touch panel.

[0562] The backlight unit 8007 includes a light source 8008. Alternatively, the light diffusing plate may be provided at the end of the light receiving unit 8007.

[0563] The frame 8009 protects the display panel 8006 and also supports the movement of the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the frame. The frame 8009 may also function as a heat sink.

[0564] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal, and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. 1 can be omitted if commercial power is used.

[0565] The display module 8000 also includes components such as a polarizing plate, a retardation plate, and a prism sheet. Additional ones may be provided.

[0566] FIG. 54 is an external view of an electronic device including a display device of one embodiment of the present invention.

[0567] The electronic device may be, for example, a television device (television or television receiver) (also called "computer monitors"), digital cameras, digital video cameras, etc. digital photo frames, mobile phones (also called mobile phones or mobile phone devices), These include large game machines such as small game machines, portable information terminals, audio playback devices, and pachinko machines. can be.

[0568] FIG. 54(A) shows a portable information terminal, which includes a main body 1001, a housing 1002, a display unit 10 The display unit 1003b is a touch panel. By touching the keyboard button 1004 displayed on the display unit 1003b, Of course, the display unit 1003a can be configured as a touch panel. The transistor described in the above embodiment may be used as a switching element in a liquid crystal panel. By fabricating a display panel or an organic light-emitting panel and applying it to the display units 1003a and 1003b, It is possible to provide a highly reliable portable information terminal.

[0569] The portable information terminal shown in FIG. 54(A) displays various information (still images, videos, text images, etc.) Functions that display calendars, dates, or times on the display, functions that display Ability to manipulate or edit displayed information, processed by various software (programs) In addition, the rear and side of the housing may be provided with terminals for external connection. It may also be configured to include a connector (such as an earphone jack or USB port) and a recording medium insertion section.

[0570] The portable information terminal shown in FIG. 54(A) is configured to be capable of wirelessly transmitting and receiving information. The desired book data can be purchased and downloaded wirelessly from an electronic book server. It is also possible to configure the device to perform this function.

[0571] FIG. 54(B) shows a portable music player. The main body 1021 has a display unit 1023 and an earphone. The device has a fixing part 1022 for mounting to an external device, a speaker, an operation button 1024, and an external memory slot. The transistors described in the above embodiment are switched By preparing a liquid crystal panel or an organic light-emitting panel as an element and applying it to the display unit 1023, This makes it a more reliable portable music player.

[0572] Furthermore, the portable music player shown in FIG. 54(B) is equipped with an antenna, microphone function, and wireless function. If you carry it with you and connect it to your mobile phone, you can enjoy wireless hands-free driving while driving a car. Conversations in Lee are also possible.

[0573] FIG. 54(C) shows a mobile phone, which is composed of two housings, housing 1030 and housing 1031. The housing 1031 includes a display panel 1032, a speaker 1033, a microphone, and the like. 1034, a pointing device 1036, a camera 1037, an external connection terminal 103 The housing 1030 also includes a solar cell 1040 for charging the mobile phone. , an external memory slot 1041, etc. Also, the antenna is provided inside the housing 1031. The transistor described in the above embodiment is applied to the display panel 1032. This makes it possible to provide a highly reliable mobile phone.

[0574] The display panel 1032 is equipped with a touch panel, and the image displayed on the display panel 1032 is shown in FIG. The operation keys 1035 are indicated by dotted lines. It also implements a boost circuit to boost the voltage supplied to each circuit to the voltage required.

[0575] The display direction of the display panel 1032 changes appropriately depending on the usage mode. The camera 1037 is located on the same surface as the screen 1032, so video calls are possible. The speaker 1033 and microphone 1034 are not limited to voice calls, but can also be used for video calls, recording, Furthermore, the housing 1030 and the housing 1031 can be slid to each other, as shown in FIG. C) It can be folded from the unfolded state to the folded state, making it small and easy to carry. It is possible to typeify it.

[0576] The external connection terminal 1038 can be connected to various cables such as AC adapters and USB cables. It is possible to charge the battery and to communicate data with a personal computer, etc. By inserting a recording medium into the external memory slot 1041, it is possible to store and transfer a larger amount of data. Cut.

[0577] In addition to the above functions, it also has infrared communication function, TV reception function, etc. Good too.

[0578] FIG. 54(D) shows an example of a television device. The television device 1050 is A display unit 1053 is built into the housing 1051. The display unit 1053 displays an image. In addition, the CPU is built into the stand 1055 that supports the housing 1051. The transistor described in the above embodiment is applied to the display portion 1053 and the CPU. By using this, a highly reliable television device 1050 can be obtained.

[0579] The television device 1050 can be operated using an operation switch provided on the housing 1051 or a separate remote control. The remote control can be operated by a remote controller. A display unit for displaying information output from the machine may be provided.

[0580] The television device 1050 includes a receiver, a modem, and the like. This allows reception of general television broadcasts, and can also be used for wired or wireless reception via a modem. By connecting to a network, communication can be one-way (sender to receiver) or two-way It is also possible to communicate information in both directions (between sender and receiver, or between receivers). .

[0581] The television device 1050 also includes an external connection terminal 1054 and a storage medium playback / recording unit 1055. 052, and an external memory slot. The external connection terminal 1054 is a It can be connected to any type of cable, enabling data communication with a personal computer, etc. In the storage medium playback and recording unit 1052, a disk-shaped recording medium is inserted and It is possible to read the stored data and write it to the recording medium. Images and videos stored in the external memory 1056 inserted in the reslot It is also possible to display it on the display unit 1053.

[0582] In addition, when the off-leak current of the transistor described in the above embodiment is extremely small, By applying this transistor to the external memory 1056 and the CPU, power consumption can be reduced sufficiently. This results in a highly reliable television apparatus 1050 with reduced power consumption.

[0583] The portable information terminal shown in FIG. 54(E) has a housing 1101 and a displayable device on the surface of the housing 1101. A display panel 1110 is provided.

[0584] The housing 1101 has a top surface, a back surface, a first side surface, a second side surface in contact with the first side surface, The surface shape has a third side surface facing the first side and a fourth side surface facing the second side surface. .

[0585] The display panel 1110 has a first display area 1111 that overlaps with the top surface of the housing 1101, A second display area 1112 overlaps one of the sides of the housing 1101, and a second display area 1112 overlaps the other side of the housing 1101. It has a third display area 1113 overlapping the second display area and a fourth display area 1114 facing the second display area. do.

[0586] At least the area of ​​the four sides of the housing 1101 that overlaps with the display panel 1110 is It is preferable that the surface has a curved shape. For example, the surface has corners between the top surface and the side surface, and between the side surface and the back surface. It is preferable that the side surfaces are continuous and do not have any gaps. It is preferable that the substrate 1 has a curved surface with a continuous tangent slope from the top surface to the back surface.

[0587] In addition to the display panel 1110, the surface of the housing 1101 is equipped with hardware buttons and external In addition, the display panel 1110 may have a connection terminal or the like. It is preferable that the area overlapping the display area has a touch sensor.

[0588] The mobile information terminal shown in FIG. 54(E) displays not only on the surface parallel to the top surface of the housing, but also on the surface parallel to the top surface of the housing. In particular, it is possible to display information along two or more sides of the housing. Providing regions is preferable since it increases the variety of displays.

[0589] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination. EXAMPLES

[0590] In this example, hydrogen (H) in an oxide semiconductor film with reduced resistance as described in Embodiment 1 is The results of investigating the concentration, resistivity, and transmittance are shown in FIG. 55 and FIG.

[0591] <Hydrogen (H) concentration and resistivity> In this embodiment, samples A1 and A2 were prepared as samples for measuring impurity concentrations. Ta.

[0592] First, a method for preparing sample A1 will be described below.

[0593] Sample A1 is a 100 nm thick In-M-Zn oxide film (hereinafter referred to as IG) on a glass substrate. In FIG. 55, an IGZO film was formed. Next, the Heat treatment was then performed at 450°C for 1 hour, followed by a nitrogen and oxygen mixed gas atmosphere (nitrogen = 80% The silicon nitride film was then heated at 450°C for 1 hour in a 20% oxygen atmosphere. A silicon film (shown as SiN in FIG. 55) was formed.

[0594] The conditions for forming the IGZO film were as follows: sputtering with a metal oxide target (In:Ga:Zn=1:1:1) was used, and 50 vol% oxygen (diluted with argon) was spat. The pressure was 0.6 Pa, the deposition power was 5000 W, and the substrate temperature was 17 A condition of 0° C. was used.

[0595] The silicon nitride film was formed under the conditions of plasma CVD using a mixture of SiH4 / N2 / NH3=50 / 5000 / 100sccm, pressure=100Pa, deposition power=1000W, The substrate temperature was set to 220° C. Through the above steps, sample A1 was fabricated.

[0596] Next, a method for fabricating the sample A2 will be described below.

[0597] A 100 nm thick IGZO film (shown as IGZO in Figure 55) was formed on a glass substrate. Next, the film was heat-treated at 450°C for 1 hour in a nitrogen atmosphere, and then heated in a nitrogen / oxygen mixture. The heat treatment was carried out at 450°C for 1 hour in a gas atmosphere (nitrogen = 80%, oxygen = 20%). Then, a silicon oxynitride film (represented as SiON in FIG. 55) having a thickness of 450 nm and a A 100 nm silicon nitride film was deposited.

[0598] The deposition conditions for the IGZO film and the silicon nitride film were the same as those for sample A1. The deposition conditions for the silicon oxynitride film were the plasma CVD method. SiH4 / N2O=30 / 4000sccm, pressure=40Pa, deposition power=150W A silicon oxynitride film having a thickness of 50 nm is formed under the condition of a substrate temperature of 220° C., and then, Plasma CVD method, SiH4 / N2O=160 / 4000sccm, pressure=200P a, A 400 nm thick oxynitride film was formed under the conditions of deposition power = 1500 W and substrate temperature = 220 °C. A silicon film was formed. Through the above steps, sample A2 was fabricated.

[0599] The impurity analysis results of Samples A1 and A2 are shown in FIG.

[0600] The impurity analysis was carried out using secondary ion mass spectrometry (SIMS). Measurements were performed from the glass substrate side using ion mass spectrometry. .

[0601] In FIG. 55, the solid line indicates the concentration profile of hydrogen (H) obtained by measuring sample A1. The dashed line is the concentration profile of hydrogen (H) obtained by measuring sample A2. It is.

[0602] From Figure 55, the hydrogen (H) concentration in the IGZO film of sample A1 is 1.0×10 20 a toms / cm 3 In addition, the hydrogen (H ) concentration is 5.0 x 10 19 atoms / cm 3 It can be seen that.

[0603] Due to its measurement principle, SIMS analysis cannot measure the area near the sample surface or the layered boundary between films of different materials. It is known that it is difficult to obtain accurate data near the surface. When analyzing the distribution of hydrogen (H) in the thickness direction by SIMS, the area in which the target film exists is In the range, there is no extreme fluctuation, and the average value in the region where almost constant intensity is obtained is adopted. do.

[0604] In this way, by changing the constituent elements of the insulating film in contact with the IGZO film, It was confirmed that there was a difference in hydrogen (H) concentration between the IGZO film in contact with the silicon oxynitride film and the In comparison, the IGZO film in contact with the silicon nitride film has a higher hydrogen (H) concentration. This indicates that hydrogen (H) diffuses from the silicon nitride film into the IGZO film. I found out.

[0605] The resistivity of the IGZO film in sample A2 was measured at the upper limit (1 × 10 2 [Ωcm] In contrast, the resistivity of the IGZO film in sample A1 is ρ = 3.6 × 10 -3 This resistivity was reduced to 1000 Ωcm. This value is comparable to that of the O membrane.

[0606] <Transmittance> Next, the transmittance of a low-resistance oxide semiconductor film will be described.

[0607] First, a method for preparing the sample A3 will be described.

[0608] A 50 nm thick IGZO film was formed on a glass substrate, and then a 100 nm thick nitride film was The silicon film was laminated to form a film.

[0609] The conditions for forming the IGZO film were as follows: sputtering with a metal oxide target (In:Ga:Zn=1:1:1) was used, and 33 vol% oxygen (diluted with argon) was spat. The gas was used as a terminating gas, pressure = 0.4 Pa, film formation power = 200 W, and substrate temperature = 300 C. conditions were used.

[0610] The silicon nitride film was formed under the conditions of plasma CVD using a mixture of SiH4 / N2 / NH3=50 / 5000 / 100sccm, pressure=100Pa, deposition power=1000W, The substrate temperature was set to 350° C. Through the above steps, sample A3 was fabricated.

[0611] Next, the visible light transmittance of the sample A3 was measured. The measured transmittance of the sample A3 was As shown in Figure 56, the transmittance of sample A3 was 80% or more over a wide energy range. It is believed that the oxide semiconductor film with low resistance can be used as a light-transmitting electrode. It is possible. EXAMPLES

[0612] In this embodiment, what state causes the resistivity of a conductive oxide semiconductor is described. To investigate whether the photocurrent is constant, a constant photocurrent measurement method was used. Method:CPM), Hard X-ray Photoelectron Spectroscopy Electron Spectroscopy (HX-PES), SIMS, Electron Spin Resonance (Electron Spin Resonance:ESR), Thermal Desorption Gas Analysis ( Thermal Desorption Spectroscopy (TDS) The temperature dependence of resistivity was also measured.

[0613] <cpm> First, the relationship between heat treatment in a vacuum atmosphere and the amount of oxygen vacancies in the oxide semiconductor film was examined using CP The CPM measurement was performed to evaluate the amount of light absorption in the deep level defects. It can be measured by sensitivity and compared relative to other values.

[0614] The method for preparing the samples used for CPM measurement is described below.

[0615] Here, an IGZO film is formed on a quartz substrate by sputtering, and then the IGZO film is A pair of electrodes was formed to prepare each sample. Some samples had an IGZO film formed on them. After that, the vacuum atmosphere (4×10 -4 The samples were then heat-treated at 700°C or 800°C under a pressure of 10 Pa. The preparation conditions of the IGZO film for each sample are shown in Table 8. The samples that were not heated at 700℃ in a vacuum atmosphere are indicated as as-depo. The sample was heated at 700℃ in a vacuum atmosphere at 800℃. The material is shown as 800℃ vac.anneal.

[0616] [Table 8]

[0617] Next, CPM measurements were performed on each sample. When a voltage is applied between a pair of electrodes placed in contact with the O film, the photocurrent value becomes constant. The amount of light irradiated onto the sample surface between the pair of electrodes is adjusted so that the absorption coefficient is derived from the amount of irradiated light. In CPM measurement, when the object to be measured has a defect, The absorption coefficient at the energy (converted from wavelength) corresponding to the level where the defect exists increases. By multiplying this increase in the absorption coefficient by a constant, the defect density of the object to be measured can be derived. This can be done.

[0618] The upper part of Figure 57 shows the CPM measurement results for each sample. From the coefficient curve (the solid line in the upper part of Figure 57), we can see that the so-called Urbach tail is caused by the bottom of the band. By removing the absorption coefficient due to the localized level (the upper broken line in Figure 57), The Urbach tail is the absorption peak obtained by CPM measurement. This refers to the region in the coefficient curve that has a certain slope, and the slope is called the Urbach energy. In the upper part of Figure 57, the horizontal axis represents light energy and the vertical axis represents absorption coefficient.

[0619] Next, the integral values ​​of the shaded areas in the upper part of Fig. 57 are calculated and shown in the lower part of Fig. 57. In the lower part of FIG. 57, the horizontal axis represents the absorption coefficient, and the vertical axis represents the light energy. In the lower vertical axis of Figure 57, the lower end of the conduction band of the IGZO film is set to 0 eV, and the upper end of the valence band is set to 0 eV. The edge is set to 3.5 eV. In the lower part of Figure 57, the solid curves indicate the band gap of each sample. For each sample, the light energy range was 1.6 eV to 2.8 eV. Absorption due to deep levels in the band gap was confirmed in the range below 1000 V. Quantitative values ​​of absorption coefficients due to deep levels in the band gap for the materials are shown in Table 9.

[0620] [Table 9] From Table 9, the quantitative value of the absorption coefficient due to the deep levels in the band gap is It can be seen that the treatment increases the surface area. Oxygen vacancies in membranes V O It is suggested that a level is formed deep in the band gap. Therefore, the deep levels in the band gap observed by CPM are also oxygen vacant V O To In other words, the heat treatment in a vacuum atmosphere creates oxygen deficiency in the IGZO film. Loss V O It is suggested that this generates

[0621] <HX-PES(1)> First, the intra-gap states of the oxide semiconductor film were measured by HX-PES.

[0622] A method for fabricating sample B1 will be described.

[0623] A 100 nm thick IGZO film was formed on a silicon wafer.

[0624] The conditions for forming the IGZO film were as follows: sputtering with a metal oxide target (In:Ga:Zn=1:1:1) was used, and 33 vol% oxygen (diluted with argon) was spat. The pressure was 0.4 Pa, the deposition power was 500 W, and the substrate temperature was 300 ° C. Sample B1 was fabricated by the above steps.

[0625] Next, a method for fabricating sample B2 will be described.

[0626] Using the same conditions as for sample B1, a 100 nm thick IGZO film was formed on a silicon wafer. After the deposition, argon was added to the IGZO film to form an IGZO film with oxygen vacancies.

[0627] Here, argon ions are added to the IGZO film using ion implantation to increase the argon in the film. The argon concentration is 1×10 20 [1 / cm 3 Through the above process, an IGZO film was formed. Thus, sample B2 was prepared.

[0628] Next, a method for fabricating sample B3 will be described.

[0629] Sample B3 was prepared by heat-treating sample B2 in a hydrogen gas atmosphere at 133 Pa and 350°C for 1 hour. As a result, an IGZO film containing H was formed.

[0630] Next, the results of HX-PES analysis of samples B1, B2, and B3 are shown in FIG. In FIG. 58, the horizontal axis indicates binding energy, and the vertical axis indicates signal intensity (arbitrary units). .

[0631] In Figure 58, the position of 0 eV binding energy on the horizontal axis is approximately the Fermi level. The position of the gap level is confirmed at a position of about 0.2 eV from the Fermi level. (Hereinafter referred to as shallow level.)

[0632] In addition, the gap level is confirmed at a position about 2 eV from the Fermi level (hereafter, These are called deep levels.)

[0633] Sample B1 is oxygen-deficient V O The amount of (V O -poor), low hydrogen concentration (Hp Sample B2 is oxygen-deficient V O The amount of (V O -rich), low hydrogen concentration ( H-poor). Sample B3 is oxygen-deficient V O The amount of (V O -rich), hydrogen concentration is High (H-rich).

[0634] In sample B3, a high intensity signal was observed at approximately 0.2 eV from the Fermi level. From this, in order to reduce the resistance of an oxide semiconductor film, it is necessary to reduce the It is speculated that the shallow level at 0.2 eV plays an important role.

[0635] <sims> Next, the hydrogen (H) concentration in the IGZO film of samples B1 to B3 was analyzed by SIMS. The results are shown in FIG. 59. In FIG. 59, the solid line shows the measurement results for sample B1, and the dashed line shows the measurement results for sample B2. The dashed and dotted line shows the measurement results for sample B2, and the dotted line shows the measurement results for sample B3.

[0636] As shown in Figure 59, the hydrogen (H) concentration in sample B2 is almost unchanged compared to that in sample B1. On the other hand, sample B3 has a higher hydrogen (H) concentration than samples B1 and B2. is high, specifically, 1×10 20 [1 / cm 3 ] hydrogen (H) is present You can see that.

[0637] Furthermore, as shown in samples B2 and B3, the IGZO film with Ar added has a crystal structure The collapse of the structure causes oxygen vacancies (V O ) concentration is thought to be increasing. Deficiency of element (V O ) increases, and as shown in Fig. 58, specimens B2 and B3, On the other hand, in sample B2, the signal intensity at only the deep level increases. The signal intensity is increased, but in sample B3, where hydrogen (H) is introduced into sample B2, the signal intensity is increased. The intensity of the signal at the deep levels decreases and the intensity of the signal at the shallow levels increases.

[0638] From these results, it is concluded that the shallow levels that cause the IGZO film to have a low resistance are Oxygen deficiency (V O ) and hydrogen (H) resulting in H O This is due to It is speculated that.

[0639] <esr> Next, oxygen vacancies (V O ) and hydrogen (H) in more detail Therefore, we performed ESR analysis to evaluate defects in the IGZO film.

[0640] In order to clarify the origin of the ESR signal in the IGZO film, We performed ESR measurements on samples with thin films of ZnO, ZnO, GaO, and InO. Ta.

[0641] Here, each sample was prepared by forming a thin film on a quartz substrate by sputtering. The conditions for forming the thin films in the samples are shown in Tables 10 and 11. Note that a heat treatment was performed after the film formation. The preparation conditions for the samples that were not heated after deposition are shown in Table 10. The results are shown in Table 11.

[0642] [Table 10]

[0643] [Table 11]

[0644] The ESR measurement was performed on a sample in which an oxide semiconductor film was formed under the conditions shown in Table 10. The results are shown in Figure 60. In Figure 60, the horizontal axis is the magnetic field and the vertical axis is the normalized ESR signal. The strength of the IGZO film, zinc oxide film, gallium oxide film, or indium oxide film is shown. In all the samples, an asymmetric ESR signal was observed near g=2.

[0645] In addition, ESR measurements were performed on samples in which oxide semiconductor films were formed under the conditions shown in Table 11. The results are shown in Figure 61. In Figure 61, the horizontal axis is the magnetic field and the vertical axis is the normalized ESR. The signal intensity is shown. In the sample with the IGZO film, the ESR signal is at g=1.932. In the sample with zinc oxide film, an ESR signal was observed at g = 1.967, and the acid In the sample with the indium oxide film, an ESR signal was observed at g=1.877. No ESR signal was observed in the sample with the gallium oxide film.

[0646] From the above results, it was found that the IGZO film was heated in a nitrogen atmosphere. The ESR signal at g=1.93 is due to the formation of the oxide of the constituent elements of IGZO. The ESR signal has a different g value from that of the lead film, gallium oxide film, and indium oxide film. It was also confirmed that the ESR signal observed in the sample with the IGZO film was due to the free charge. The g value is significantly smaller than that of the original (g = 2.0023). It is believed that the ESR signal observed in the sample with the film is related to the metallic element.

[0647] Next, the integral of the ESR signal at g=1.93 observed in the sample with the IGZO film was The relationship between the strength and the film thickness was measured. The samples used were IGZO films with thicknesses varying in the range of nm. As a condition, a metal oxide target (In:Ga:Zn=1:1: 1) was used, and 33 vol% oxygen (diluted with argon) was used as the sputtering gas. The conditions used were: pressure = 0.4 Pa, film formation power = 500 W, and substrate temperature = 200°C.

[0648] The results of ESR measurements of IGZO films with different thicknesses are shown in Figure 62. The horizontal axis indicates the thickness of the IGZO film for each sample, and the vertical axis indicates the ESR signal at g=1.93. The above sample shows the integrated intensity of the null. By integrating the ESR signal, the flux that causes the ESR signal was obtained. The number of pins can be calculated. That is, Figure 62 shows the product of the ESR signal with g=1.93. It can be said that this shows the dependence of the number of spins calculated from the intensity on the IGZO film thickness. The integrated intensity of the ESR signal at g=1.93 in the IGZO film is roughly proportional to the film thickness. This shows that the spin responsible for the ESR signal at g=1.93 is is uniformly present in the IGZO film, and is present at the interface between the quartz and the IGZO film and on the surface of the IGZO film. It was confirmed that it was not localized.

[0649] Next, the change in the ESR signal of g=1.93 due to the measurement temperature was investigated. The results are shown in Figure 63. In Figure 63, the horizontal axis shows 1000 / T (T is absolute temperature) and the left vertical axis shows g=1. The right vertical axis shows the ESR line width. The R line width is the signal width in the ESR measurement data output as the first derivative of the Lorentz function. The signal intensity is defined as the interval between the maximum and minimum values ​​of the magnetic field. The signal intensity of the output ESR measurement data is double integrated and the value calculated is the intensity at room temperature of 1 From Figure 63, the ESR signal of g=1.93 is It can be seen that the signal intensity is almost independent of the measurement temperature. This temperature dependence is seen in graphite and other perovskite. This is a characteristic of the ESR signal obtained by ESR measurement of paramagnetic materials. The temperature-dependent ESR signal shown in Fig. 63 is attributed to conduction electrons. To be tempted.

[0650] Next, oxygen vacancies (V O ) and hydrogen (H) in more detail. In order to achieve this, heat treatment in a vacuum atmosphere and a reduced pressure H2 atmosphere were used. Oxygen deficiency (V O ) and hydrogen (H) were introduced into the IGZO film. Here, samples B5 to B12 were prepared by using different heat treatment conditions. The heat treatment conditions for each sample are shown in Table 12. An IGZO film with a thickness of 100 nm was formed on a quartz substrate. The deposition conditions for the IGZO film were as follows: The deposition conditions for the IGZO film in Example 1 were the same as those for Example 1, except that the deposition power was 2500 W.

[0651] In the samples B5 to B12, the heat treatment in a vacuum atmosphere was performed at a temperature of 4×10 - 4 The reaction was carried out at 100 Pa for 1 hour. <cmp>Therefore, the heating process in a vacuum atmosphere The heat treatment increases the oxygen vacancies in the IGZO film. It is expected that the hydrogen concentration in the ZO film has been reduced.

[0652] In addition, in order to add hydrogen to the IGZO film, specimens B6, B8, B10, and B11 were In sample B12, the heat treatment was performed in a reduced pressure H2 atmosphere. In samples B10 and B12, the amount of oxygen vacancy and hydrogen is thought to have increased. Note that the heat treatment in a reduced pressure H2 atmosphere does not allow elements other than hydrogen to be mixed into the IGZO film. In order to minimize leakage, the reaction was carried out at 133 Pa for one hour.

[0653] [Table 12]

[0654] FIG. 64 shows the resistivity and ESR spin density of the IGZO films in samples B5 to B12. The relationship between the ESR spin density and the heat treatment conditions is shown. In Figure 64, the bar graph shows the ESR spin density, and the The line graph shows the corresponding change in resistivity. In the plot, 1 / ρ is plotted instead of resistivity ρ. The black circles indicate sample B7 and sample B8. The white circles indicate the 1 / ρ of samples B6, B8, and B11, respectively. 10, and 1 / ρ of sample B12.

[0655] FIG. 65 shows the hydrogen concentration and ESR in the IGZO film of samples B5 to B12. The relationship between the spin density and the heat treatment conditions is shown. The ESR spin density is The bar graph in Figure 65 shows the integral intensity of the ESR signal at g=1.93. The black graph shows the pin density, and the line graph shows the change in hydrogen concentration in the IGZO film. The circles indicate the hydrogen concentrations of samples B5, B7, B9, and B11, respectively, and the white circles indicate the hydrogen concentrations of samples B5, B7, B9, and B11, respectively. indicate the hydrogen concentrations of sample B6, sample B8, sample B10, and sample B12, respectively.

[0656] FIG. 66 shows the hydrogen concentration and electrical conductivity in the IGZO film of samples B5 to B12. The relationship between the hydrogen concentration (1 / ρ) and the heat treatment conditions is shown in Fig. 66. The bars with diagonal lines represent electrical conductivity.

[0657] In FIG. 64, the resistivity of sample B5 is above the detection limit (1×10 2 [Ωcm] or more, E The SR spin density is at the detection limit (3.7 × 10 16 [spins / cm 3 ]) Therefore, resistivity and ESR spin density are not plotted.

[0658] In FIG. 64, samples B7, B9, and B1 were subjected to heat treatment in a vacuum atmosphere. In the case of sample B11, the resistivity clearly increases. The conductivity of Sample B11 and Sample B21 is decreased. In the samples B7, B9, and B11, which were subjected to heat treatment in a vacuum atmosphere, As the processing temperature increases, the hydrogen concentration decreases. The R spin density is decreased.

[0659] In addition, in FIG. 64, sample B8 and sample B1 were subjected to heat treatment in a reduced pressure H2 atmosphere. In the case of sample B10 and sample B12, the resistivity was almost the same regardless of the temperature of the heat treatment in a vacuum atmosphere. In addition, in FIG. 66, in samples B8, B10, and B12, In addition, in Fig. 65 and Fig. 66, the conductivity is almost the same in a reduced pressure H2 atmosphere. In the samples B8, B10, and B12 that were subjected to the heat treatment in the vacuum atmosphere, The hydrogen concentration is almost the same regardless of the heat treatment temperature. In this study, the ESR spin density was increased by heat treatment in a reduced pressure H2 atmosphere.

[0660] For these reasons, after heat treatment in a vacuum atmosphere, heat treatment in a reduced pressure H2 atmosphere was performed. By carrying out the treatment, it was found that the ESR spin density increases when both the hydrogen concentration and oxygen vacancies increase. It was confirmed that oxygen deficiency (V O ) and hydrogen (H) coexist, the resistivity and conductivity This suggests that it plays a very important role in

[0661] Next, FIG. 67 shows the relationship between the ESR spin density and 1 / ρ for samples B5 to B12. In Figure 67, the horizontal axis represents the ESR spin density at g=1.93 in the IGZO film of each sample. The vertical axis indicates the 1 / ρ of the IGZO film of each sample. The measurement results of samples B7, B9, and B11 are indicated by black circles, and those of samples B6, B8, and B 10. The measurement results of sample B12 are shown with white circles.

[0662] In Figure 67, a clear positive correlation was observed between the ESR spin density and 1 / ρ. Therefore, the ESR signal at g=1.93 in the IGZO film is O Strongly related to resistivity It is thought that they can be linked.

[0663] <tds> Next, H O In order to evaluate the stability of the The results of the TDS analysis are shown in Figure 68. In each case, the mass-to-charge ratio m / z = The intensity is proportional to the amount of desorption of H2O (m / z=2) and H2O (m / z=18). The desorption of H2O at surface temperatures below 100°C is due to the desorption of surface-adsorbed water. .

[0664] Both specimens B6 and B12 contain a large amount of H, but after vacuum baking at 800°C, In the case of sample B12, the desorption of H2O gas was not observed even when it was heated up to 550°C. , oxygen deficiency (V O ) is introduced and the hydrogen (H) that entered later becomes H O Stable as a heat treatment This result can be interpreted as being due to the fact that it is difficult to leave the room. It is consistent with the calculation results.

[0665] <HX-PES(2)> The mechanism shown in the fourth embodiment reduces the resistance of the laminated film of the IGZO film and the silicon nitride film. In order to confirm whether this is a valid factor, a silicon nitride film was first formed on the IGZO film. After that, the silicon nitride film was etched back and the sample was subjected to HX-PES analysis.

[0666] First, a method for preparing sample B13 will be described.

[0667] A 100 nm thick IGZO film was formed on a silicon wafer.

[0668] The conditions for forming the IGZO film were as follows: sputtering with a metal oxide target (In:Ga:Zn=1:1:1) was used, and 50 vol% oxygen (diluted with argon) was spat. The pressure was 0.6 Pa, the deposition power was 2500 W, and the substrate temperature was 17 The temperature condition was 0° C. Through the above steps, sample B13 was produced.

[0669] Next, a method for producing sample B14 will be described.

[0670] Using the same conditions as for sample B13, a 100 nm thick IGZO film was deposited on a silicon wafer. After the deposition, a silicon nitride film having a thickness of 100 nm was formed.

[0671] The conditions for forming the silicon nitride film were plasma CVD with SiH4 / N2 / NH3 = 50 / 5000 / 100sccm, pressure = 100Pa, deposition power = 1000W, substrate temperature The conditions used were: temperature = 350°C.

[0672] Next, the silicon nitride film was etched to expose the IGZO film. The IGZO film included in sample B14 was a low-resistance film. It is.

[0673] The results of HX-PES analysis of samples B13 and B14 are shown in Figure 69. An enlarged view of the spectrum in the energy range from -0.5 eV to 0.5 eV is shown separately in Figure 69. In FIG. 69, the solid line shows the analysis result of sample B14, and the dashed line shows the analysis result of sample B13. These are the analysis results.

[0674] Compared to sample B13, sample B14 has a higher peak at approximately 0.2 eV from the Fermi level. It was confirmed that a certain shallow level was enhanced. The B14 material also has an increased deep level located about 2 eV from the Fermi level. As mentioned above, the increase in these levels is due to the fact that the silicon nitride film is placed on the IGZO film. Oxygen vacancies (V O ) and silicon nitride Hydrogen (H) contained in the silicon film diffuses into the IGZO film, generating H O The increase in It is believed to be the case.

[0675] From the above, the oxide semiconductor film is damaged when a film is formed on it. Oxygen vacancies (V O ) and hydrogen (H) diffusing from the outside combine to form H O And then, It was found that the nucleon level is formed.

[0676] <Temperature Dependence of Resistivity> Next, a film formed of an oxide semiconductor (hereinafter referred to as an oxide semiconductor film (OS)) and an oxide The films formed from oxide conductors (hereinafter referred to as oxide conductor films (OC)) The temperature dependence of resistivity will be explained with reference to FIG. 70. In FIG. 70, the horizontal axis indicates the measured The vertical axis shows the temperature, and the vertical axis shows the resistivity. Here, the resistivity was measured using a four-terminal van-der-P The measurement results were obtained by the auw method. The measurement results of the oxide semiconductor film (OS) are indicated by circles, and the oxide conductive film (OS) is indicated by circles. The measurement results for the occlusion membrane (OC) are indicated by squares.

[0677] The sample including the oxide semiconductor film (OS) was formed on a glass substrate with an atomic ratio of In:Ga A sputtering method was used to deposit a thick ZnO film using a sputtering target with a ratio of 1:1:1.2. An In-Ga-Zn oxide film having a thickness of 35 nm was formed, and the atomic ratio of the film was In:Ga:Zn=1:4. A 20 nm thick In- A Ga-Zn oxide film was formed, and then heat-treated in a nitrogen atmosphere at 450°C. The silicon oxynitride film is then formed by plasma CVD. It was produced by forming

[0678] The sample containing the oxide conductor (OC) was prepared by depositing an In:Ga atomic ratio on a glass substrate. A sputtering method was used with a sputtering target of Zn=1:1:1 to deposit a 10 ... After forming a 00 nm In-Ga-Zn oxide film and heat-treating it in a nitrogen atmosphere at 450 °C, The silicon nitride was then deposited by plasma CVD. It was prepared by forming a con film.

[0679] As can be seen from FIG. 70, the temperature dependence of resistivity in the oxide conductor film (OC) is The temperature dependence of resistivity is smaller than that of oxide semiconductor films (OS). Typically, it is 80K or higher. The change in resistivity of the oxide conductor film (OC) at 290K or less is less than ±20%. Alternatively, the rate of change in resistivity from 150K to 250K is less than ±10%. That is, an oxide conductor is a degenerate semiconductor, and the conduction band edge and the Fermi level are coincident or approximately coincident. It is presumed that they are in agreement. EXAMPLES

[0680] In this embodiment, a liquid crystal display device was manufactured according to the method of the fifth embodiment. The display format and images will be explained.

[0681] Table 13 shows the specifications of the liquid crystal display device.

[0682] [Table 13]

[0683] FIG. 71 shows a photograph of an image displayed by the liquid crystal display device fabricated in this example. As shown in FIG. 1, the display device of the present invention is a high-definition liquid crystal display device with excellent display quality. In addition, the liquid crystal display device manufactured in this embodiment can also be driven at a low frequency. It is possible to reduce power consumption.< / tds> < / cmp> < / esr> < / sims> < / cpm>

Claims

1. forming a first oxide semiconductor film over the first insulating film; a rare gas is added to the first oxide semiconductor film by a doping method or an ion implantation method, and then heat treatment is performed in an atmosphere containing hydrogen to form a second oxide semiconductor film having electrical conductivity; The hydrogen concentration of the second oxide semiconductor film is 5×10 ２０ atoms / cm ３ The above is the method for manufacturing a semiconductor device.

2. In claim 1, The rare gas is at least one of helium, neon, argon, krypton, and xenon.

3. In claim 1 or 2, The resistivity of the second oxide semiconductor film is 1×10 －３ Ωcm or more 1×10 ４ A method for fabricating a semiconductor device, the method comprising:

4. In any one of claims 1 to 3, the second oxide semiconductor film includes a crystal portion, and a c-axis of the crystal portion is oriented at an angle of greater than or equal to −30° and less than or equal to 30° with respect to a normal vector of a surface on which the second oxide semiconductor film is formed or a top surface of the second oxide semiconductor film.

5. In any one of claims 1 to 4, the second oxide semiconductor film includes at least one of an In—Ga oxide, an In—Zn oxide, and an In-M-Zn oxide (M is Al, Ga, Y, Zr, Sn, La, Ce, or Nd).

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