Semiconductor Device

Abstract

To provide a semiconductor device including a transistor having an oxide semiconductor and capable of suppressing variations in electric characteristics and improving reliability.SOLUTION: A semiconductor device includes a transistor 100. The transistor comprises: an oxide semiconductor film 110 on a first insulation film 108; a gate insulation film 112 on the oxide semiconductor film; a gate electrode 114 on the gate insulation film; a second insulation film 118 on the oxide semiconductor film and the gate electrode; and a source electrode 122a and a drain electrode 122b electrically connected to the oxide semiconductor film. The first insulation film contains oxygen, and the second insulation film contains hydrogen. The oxide semiconductor film includes: a first region 110a in contact with the gate insulation film; and second regions 110b and 110c in contact with the second insulation film. The first insulation film includes: a third region overlapping the first region; and a fourth region overlapping the second region. The fourth region has a higher impurity element concentration than the third region.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention is a semiconductor device including an oxide semiconductor film and a display device including the semiconductor device. Regarding the device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect of the present invention relates to a product, a method, or a manufacturing method. process, machine, manufacture, or composition of matter In particular, one embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, The present invention relates to a device, a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general. Semiconductor elements such as transistors, semiconductor circuits, computing devices, memory The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices The device may include a semiconductor device. [Background technology]

[0004] A transistor (field-effect transistor) is made using a semiconductor thin film formed on a substrate with an insulating surface. The technology that makes up the field-effect transistor (FET) or thin-film transistor (TFT) is attracting attention. The transistor is used in integrated circuits (ICs) and image display devices (display devices). It is widely used in electronic devices. Silicon is a semiconductor thin film that can be used in transistors. Semiconductor materials such as silicon are widely known, but oxide semiconductors are also attracting attention. It is being watched.

[0005] For example, amorphous oxides containing In, Zn, Ga, Sn, etc. are used as oxide semiconductors. A technique for fabricating a transistor using self-aligned transistors has been disclosed (see Patent Document 1). A technique for fabricating a transistor using a thin oxide film having a top gate structure has been disclosed (Patent (See patent document 2).

[0006] In addition, a base insulating layer of the oxide semiconductor layer in which a channel is formed is heated to release oxygen. A semiconductor device is disclosed in which an insulating layer is used to reduce oxygen vacancies in the oxide semiconductor layer. (See Patent Document 3). [Prior art documents] [Patent documents]

[0007] [Patent Document 1] JP 2006-165529 A [Patent Document 2] JP 2009-278115 A [Patent Document 3] JP 2012-009836 A Summary of the Invention [Problem to be solved by the invention]

[0008] As a transistor having an oxide semiconductor film, for example, an inverted staggered type (bottom gate structure) The oxide semiconductor is a planar type (also called a top gate structure) or a planar type (also called a top gate structure). When a transistor having a conductor film is applied to a display device, it is more advantageous than a planar type transistor. However, the manufacturing process of the inverted staggered transistor is relatively simple and the manufacturing cost can be reduced. However, as the screen size of display devices increases, High definition image quality of the device (for example, 4k x 2k (horizontal pixel count = 3840 pixels, vertical pixel count = 3840 pixels) Prime number = 2048 pixels) or 8k x 4k (horizontal pixels = 7680 pixels, vertical pixels As the development of high-resolution display devices (represented by displays with 4320 pixels) progresses, the use of inverted staggered transistors In the case of a transistor, there is a parasitic capacitance between the gate electrode and the source electrode and between the gate electrode and the drain electrode. There is a problem in that signal delays and the like increase depending on the capacitance, deteriorating the image quality of the display device. In addition, in the case of an inverted staggered transistor, the transistor Therefore, a transistor having an oxide semiconductor film is used. The structure of the Renner-type transistor has stable semiconductor characteristics and high reliability. Furthermore, there is a demand for the development of a transistor that can be formed through a simple manufacturing process.

[0009] In addition, when a transistor is manufactured by using an oxide semiconductor film for a channel region, Oxygen vacancies formed in the channel region of the conductive film affect transistor characteristics. For example, when oxygen vacancies are formed in the channel region of the oxide semiconductor film, the oxygen Carriers are generated due to electron vacancies. Carriers are generated in the channel region of the oxide semiconductor film. When the oxide semiconductor film is generated, the electrical characteristics of a transistor having a channel region including the oxide semiconductor film change. Typically, a shift in threshold voltage occurs. In addition, the electrical characteristics of each transistor vary. Therefore, in the channel region of the oxide semiconductor film, oxygen vacancies are formed. On the other hand, in a transistor using an oxide semiconductor film for a channel region, In the present invention, the region of the oxide semiconductor film in contact with the source electrode and the drain electrode is In order to reduce the contact resistance between the electrode and the drain electrode, it is preferable that the electrode has many oxygen vacancies and low resistance. It is.

[0010] In view of the above problems, one embodiment of the present invention is a semiconductor device including a transistor including an oxide semiconductor. One of the objectives of the present invention is to suppress fluctuations in electrical characteristics and improve reliability in a semiconductor device. Another embodiment of the present invention is a planar transistor including an oxide semiconductor. Another object of the present invention is to provide a semiconductor device having an acid. To provide a semiconductor device having a transistor with a large on-state current and a nitride semiconductor. Another object of one embodiment of the present invention is to provide a semiconductor device having an oxide semiconductor and having a low off-state current. It is an object of the present invention to provide a semiconductor device having a transistor. An object of one embodiment is to provide a semiconductor device with reduced power consumption. One embodiment of the present invention is a semiconductor device including a transistor that has a small area and includes an oxide semiconductor. Another object of the present invention is to provide a novel semiconductor device. One of the objectives is to provide a place for

[0011] The above description of the problem does not preclude the existence of other problems. The embodiment does not necessarily have to solve all of these problems. Problems other than those mentioned above may be solved by the specification. The above problems are obvious from the description of the specification, etc., and problems other than those mentioned above cannot be extracted from the description of the specification, etc. It is possible to issue it. [Means for solving the problem]

[0012] One embodiment of the present invention is a semiconductor device including a transistor, the transistor comprising: an oxide semiconductor film on the insulating film; a gate insulating film on the oxide semiconductor film; A gate electrode, an oxide semiconductor film, a second insulating film on the gate electrode, and a gate insulating film between the oxide semiconductor film and the gate electrode. a source electrode and a drain electrode electrically connected to each other, and the first insulating film contains oxygen. The second insulating film contains hydrogen, and the oxide semiconductor film has a first region in contact with the gate insulating film and a second region in contact with the oxide semiconductor film. The first insulating film has a second region that contacts the second insulating film, and the first insulating film has a third region that overlaps the first region. a third region overlapping the second region, and a fourth region overlapping the second region, the fourth region being smaller than the third region. The semiconductor device is characterized by having a high concentration of impurity elements. It is.

[0013] One embodiment of the present invention is a semiconductor device including a transistor, the transistor comprising: an oxide semiconductor film on the insulating film; a gate insulating film on the oxide semiconductor film; a gate electrode, a second insulating film over the oxide semiconductor film and the gate electrode, and a first insulating film over the second insulating film; a first insulating film, a first opening formed in the second insulating film and the third insulating film, The oxide semiconductor film and the third insulating film are electrically connected through the second opening and the first opening. a source electrode electrically connected to the oxide semiconductor film through the second opening; and a drain electrode including the first insulating film and the second insulating film including hydrogen. The oxide semiconductor film has a first region in contact with the gate insulating film and a second region in contact with the second insulating film. a first insulating film having a third region overlapping the first region and a second region overlapping the second region; and a fourth region having a higher concentration of the impurity element than the third region. The semiconductor device is characterized by the above.

[0014] Another embodiment of the present invention is a semiconductor device including a transistor. The photodiode includes a first gate electrode, a first insulating film on the first gate electrode, and an oxide film on the first insulating film. a gate insulating film on the oxide semiconductor film; and a second gate electrode on the gate insulating film. a second insulating film on the oxide semiconductor film and the second gate electrode; and a third insulating film on the second insulating film. a first opening formed in the second insulating film and the third insulating film; The third insulating film is electrically connected to the oxide semiconductor film through the second opening and the first opening. a source electrode electrically connected to the oxide semiconductor film through a second opening; and a drain electrode including the first insulating film and the second insulating film including hydrogen. The oxide semiconductor film has a first region in contact with the gate insulating film and a second region in contact with the second insulating film. a first insulating film having a third region overlapping the first region and a second region overlapping the second region, and a fourth region having a higher concentration of the impurity element than the third region. The semiconductor device is characterized by the above.

[0015] Another embodiment of the present invention is a semiconductor device including a transistor. The photodiode includes a first gate electrode, a first insulating film on the first gate electrode, and an oxide film on the first insulating film. a gate insulating film on the oxide semiconductor film; and a second gate electrode on the gate insulating film. a second insulating film on the oxide semiconductor film and the second gate electrode; and a third insulating film on the second insulating film. a first opening formed in the second insulating film and the third insulating film; A second opening in the third insulating film, and a third opening in the first insulating film and the gate insulating film. a source electrode electrically connected to the oxide semiconductor film through the first opening; a drain electrode electrically connected to the oxide semiconductor film through the second opening; The first gate electrode and the second gate electrode are electrically connected through a third opening. The insulating film contains oxygen, the second insulating film contains hydrogen, and the oxide semiconductor film is a gate insulating film. and a second region in contact with a second insulating film, the first insulating film being A third region overlapping the first region and a fourth region overlapping the second region, The second region has a higher concentration of an impurity element than the third region.

[0016] In each of the above structures, the impurity element is hydrogen, boron, carbon, nitrogen, fluorine, or phosphorus. In each of the above structures, it is preferable that the impurity is one or more of sulfur and rare gas. Preferably, the element comprises hydrogen or argon.

[0017] In each of the above configurations, the first region has a portion having a lower hydrogen concentration than the second region. In each of the above structures, the first region has a higher crystallinity than the second region. It is preferred to have a high area.

[0018] In each of the above structures, the oxide semiconductor film contains oxygen, In, Zn, and M (M is Ti, Ga, Y, Zr, La, Ce, Nd, or Hf). In each of the above structures, the oxide semiconductor film includes a crystal part, and the c-axis of the crystal part is It is preferable that the portion has a portion that is parallel to the normal vector of the surface on which the film is formed.

[0019] Another embodiment of the present invention is a semiconductor device and a display element according to any one of the above structures. Another embodiment of the present invention is a display device including the display device and a touch sensor. Another embodiment of the present invention is a display module having any one of the above structures. The semiconductor device according to any one of claims 1 to 5, the display device, or the display module, and an operation key or and a battery. Effect of the Invention

[0020] According to one embodiment of the present invention, a semiconductor device including a transistor including an oxide semiconductor As a result, the fluctuation of the electrical characteristics can be suppressed and the reliability can be improved. According to one embodiment of the present invention, there is provided a semiconductor device having a planar transistor including an oxide semiconductor. According to one embodiment of the present invention, an on-state electrode having an oxide semiconductor can be provided. It is possible to provide a semiconductor device having a transistor with a large current. According to one embodiment, a semiconductor device including a transistor having an oxide semiconductor and low off-state current is provided. According to one embodiment of the present invention, a semiconductor device with reduced power consumption can be provided. According to one embodiment of the present invention, a semiconductor device having an oxide semiconductor can be provided. It is possible to provide a semiconductor device having a transistor with a small area. According to one embodiment of the present invention, a novel semiconductor device can be provided.

[0021] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. The above will become apparent from the description in the specification, drawings, claims, etc. It is possible to extract other effects from the descriptions in the claims, etc. [Brief description of the drawings]

[0022] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Diagram 2] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Diagram 3] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 4] 1A and 1B are model diagrams illustrating transfer paths of impurity elements and oxygen in the vicinity of an oxide semiconductor film. [Diagram 5] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 6] 1A to 1C are cross-sectional views illustrating one embodiment of a semiconductor device and diagrams illustrating one embodiment of a band structure. [Figure 7] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 8] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 9] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 10] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 11] Cs-corrected high-resolution TEM image of a cross section of CAAC-OS, and a schematic cross-sectional diagram of CAAC-OS. [Figure 12] Cs-corrected high-resolution TEM image of the CAAC-OS in the plane. [Figure 13] 13A to 13C show structural analyses of a CAAC-OS and a single-crystal oxide semiconductor by XRD. [Figure 14] Electron diffraction pattern of CAAC-OS. [Figure 15] Schematic diagram illustrating a film formation model of CAAC-OS, and cross-sectional views of a pellet and CAAC-OS. [Figure 16] Schematic diagram explaining a film formation model of nc-OS and a figure showing a pellet. [Figure 17] FIG. [Figure 18] 4A to 4C are diagrams illustrating the force applied to a pellet on a formation surface. [Figure 19] 4A to 4C are diagrams illustrating the movement of pellets on a formation surface. [Figure 20] A diagram explaining the InGaZnO4 crystal. [Figure 21] A diagram explaining the structure of InGaZnO4 before atoms collide. [Figure 22] A diagram explaining the structure of InGaZnO4 after atomic collisions. [Diagram 23] A diagram explaining the trajectory of atoms after they collide. [Figure 24] Cross-sectional HAADF-STEM images of CAAC-OS and the target. [Diagram 25] FIG. 4 is a diagram illustrating the temperature dependence of resistivity. [Figure 26] FIG. 1 is a diagram for explaining a computational model. [Figure 27] FIG. 1 is a diagram for explaining an initial state and a final state. [Figure 28] FIG. 1 is a diagram illustrating the activation barrier. [Figure 29] FIG. 1 is a diagram for explaining an initial state and a final state. [Diagram 30] FIG. 1 is a diagram illustrating the activation barrier. [Diagram 31] A diagram explaining VoH transition levels. [Diagram 32] FIG. 1 is a top view illustrating one embodiment of a display device. [Diagram 33] FIG. 1 is a cross-sectional view showing one embodiment of a display device. [Diagram 34] FIG. 1 is a cross-sectional view showing one embodiment of a display device. [Diagram 35] 1A and 1B are a block diagram and a circuit diagram illustrating a display device. [Diagram 36] FIG. 2 is a diagram illustrating a display module. [Figure 37] 1A to 1C are diagrams illustrating electronic devices. [Figure 38] 13A and 13B are graphs showing argon concentrations in oxide semiconductor films; [Figure 39] FIG. 1 shows the change in the crystal part of an In-Ga-Zn oxide due to electron irradiation. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0023] Hereinafter, the embodiments will be described with reference to the drawings. It is possible to carry out the present invention in various forms without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications may be made to the details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0024] Also, in the drawings, the size, layer thickness, or area are exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown in the drawings. The drawings are merely schematic illustrations and are not limited to the shapes or values ​​shown in the drawings.

[0025] In addition, the ordinal numbers "first," "second," and "third" used in this specification refer to the components of the It should be noted that this is added to avoid confusion and is not intended to limit the numbers.

[0026] In addition, in this specification, the words "above" and "below" indicating the position of the components are used. The positional relationship is used for convenience in describing the drawings. The relationship changes depending on the direction in which each component is depicted. The above words and phrases are not limited to those used above, but can be rephrased appropriately depending on the situation.

[0027] In this specification, a transistor includes a gate, a drain, and a source. The drain terminal is a diode that has at least three terminals. Between the drain region or drain electrode and the source (source terminal, source region or source electrode) A current flows through the drain, the channel region, and the source. In this specification and the like, the channel region refers to a region through which a current mainly flows. The flow area.

[0028] In addition, the functions of the source and drain may differ depending on whether transistors of different polarities are used or the circuit In operation, when the direction of the current changes, the positions may be reversed. In the specification, the terms source and drain may be used interchangeably. do.

[0029] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a "device having some electrical function." "of" is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. For example, "something that has an electrical effect" includes electrodes, wiring, and transistors. These devices have various functions such as switching elements, resistor elements, inductors, capacitors, etc. This includes elements such as:

[0030] In addition, in the specification, "parallel" means that the angle between two straight lines is between -10° and 10°. Therefore, it includes the case where the angle is between -5° and 5°. "Approximately parallel" refers to a state in which two straight lines are arranged at an angle of -30° or more and 30° or less. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it includes the case where the angle is between 85° and 95°. refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0031] (Embodiment 1) In this embodiment mode, a semiconductor device having a transistor and a manufacturing method of the semiconductor device will be described. An example will be described with reference to FIGS.

[0032] <Configuration 1 of Semiconductor Device> 1A, 1B, and 1C show examples of a semiconductor device including a transistor. The transistors shown in 1(A), (B), and (C) have a top-gate structure.

[0033] FIG. 1A is a top view of a transistor 100 included in a semiconductor device, and FIG. 1(A) is a cross-sectional view taken along dashed line X1-X2 in FIG. 1(A), and FIG. 1(C) is a cross-sectional view taken along dashed line Y in FIG. 1A is a cross-sectional view taken along line 1-Y2 of FIG. 1A. For clarity, the substrate 102 and the insulating film are not shown in FIG. 108, insulating film 112, etc. are omitted. In subsequent drawings, as in FIG. 1(A), some of the components may be omitted. The dashed line X1-X2 direction is the channel length direction, and the dashed line Y1-Y2 direction is the channel This may be referred to as the width direction.

[0034] The transistor 100 shown in FIGS. 1A, 1B, and 1C includes an insulating layer formed on a substrate 102. The insulating film 108 (also referred to as a first insulating film), the oxide semiconductor film 110 over the insulating film 108, and the oxide An insulating film 112 is formed on the oxide semiconductor film 110, and the insulating film 112 is overlapped with the oxide semiconductor film 110. the conductive film 114, and an insulating film covering the oxide semiconductor film 110, the insulating film 112, and the conductive film 114. An insulating film 118 (also called a second insulating film) and an insulating film 120 (a third insulating film) on the insulating film 118. An opening 140a (a first opening) is provided in the insulating film 118 and the insulating film 120. a conductive film 122a electrically connected to the oxide semiconductor film 110 through an insulating film (also referred to as a conductive portion); An opening 140b (also referred to as a second opening) is provided in the insulating film 118 and the insulating film 120. and a conductive film 122b electrically connected to the oxide semiconductor film 110 through an intermediate film. On the transistor 100, an insulating film 120 and an insulating layer covering the conductive films 122a and 122b are provided. A membrane 128 may be provided.

[0035] In the transistor 100, the insulating film 108 is made up of an insulating film 108a and an insulating film 10 The oxide semiconductor film 110 has an insulating film 108b on the channel region 11. 0a (also called the first region) and a pair of low resistance regions 110b sandwiching the channel region 110a. , 110c (also referred to as a second region). The low resistance regions 110b and 110c contact the insulating film 118. The film 114 includes a conductive film 114a and a conductive film 114b over the conductive film 114a.

[0036] The insulating film 112 functions as a gate insulating film, and the conductive film 114 functions as a gate electrode. The conductive film 122a functions as one of the source electrode and the drain electrode. The conductive film 122b functions as the other electrode of the source electrode and the drain electrode. It functions as a pole.

[0037] In the transistor 100, the insulating film 108 contains oxygen and is The insulating film 108 supplies oxygen to the oxide film 10. The insulating film 118 can compensate for oxygen vacancies that may be formed in the semiconductor film 110. The oxide semiconductor film 110 contains hydrogen and has a function of supplying hydrogen to the oxide semiconductor film 110.

[0038] In the oxide semiconductor film 110, the low-resistance regions 110b and 110c are formed with oxygen vacancies. Hereinafter, the elements that form oxygen vacancies will be described as impurity elements. Representative examples of elements include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, and the rare gases. Representative examples of rare gas elements include helium, neon, argon, and krypton. and xenon.

[0039] When an impurity element is added to an oxide semiconductor film, the metal element and oxygen in the oxide semiconductor film are The bond is broken, and oxygen vacancies are formed. Alternatively, an impurity element is added to the oxide semiconductor film. When the oxide semiconductor film is heated, oxygen that has been bonded to a metal element in the oxide semiconductor film is bonded to an impurity element, and the metal element is As a result, oxygen is released from the oxide semiconductor film, and oxygen vacancies are formed. The carrier density increases and the conductivity becomes higher.

[0040] Here, enlarged views of the oxide semiconductor film 110 and its vicinity are shown in FIGS. In addition, in FIG. 2(A), (B) and FIG. 3, the same functions as those described above are used. In such cases, the hatch patterns may be the same and no particular reference numbers may be used.

[0041] In the cross-sectional shape of the oxide semiconductor film 110 in the channel length direction, A region where the metal density is increased and the conductivity is high (hereinafter referred to as a low resistance region) is formed. The low-resistance region formed in the oxide semiconductor film 110 is a region in which the oxide semiconductor film 110 is formed. In addition, in Fig. 2(A)(B) and Fig. 3, the channel length L is , a region sandwiched between a pair of low resistance regions.

[0042] As shown in FIG. 2A, the oxide semiconductor film 110 is formed in a region overlapping with the conductive film 114. A channel region 110a is formed by diffusing the impurity element. As shown in FIG. In the cross-sectional shape in the channel length direction, the channel region 110a and the low resistance region 110b are The boundary of 110c coincides or is approximately the same as the lower end of the conductive film 114a through the insulating film 112. That is, in terms of the top view, the channel region 110a and the low resistance region 11 The boundary between 0b and 110c coincides or approximately coincides with the lower end of the conductive film 114a.

[0043] Alternatively, as shown in FIG. 2B, in the cross-sectional shape in the channel length direction, the low resistance region 1 The regions 10b and 110c overlap with the conductive film 114 via the insulating film 112. The overlap region in the channel length direction Length L ov L ov is less than 20% of the channel length L, or less than 10%, or Less than 5% or less than 2%.

[0044] Alternatively, as shown in FIG. 3, in a cross section in the channel length direction, the oxide semiconductor film 11 0 has a low resistance region 110d between a channel region 110a and a low resistance region 110b. The low resistance region 110e is located between the channel region 110a and the low resistance region 110c. The regions 110d and 110e have a lower concentration of impurity elements than the low resistance regions 110b and 110c. The resistivity is high. Here, the low resistance regions 110d and 110e overlap the insulating film 112, The low-resistance region 11 may overlap with the insulating film 112 and the conductive film 114. 0d, 110e are shown as Ldd.

[0045] As shown in FIG. 3, the oxide semiconductor film 110 has more impurities than the low-resistance regions 110b and 110c. A low-resistance region 110d has a low concentration of elements and has a higher resistivity than the low-resistance regions 110b and 110c. , 110e, the electric field in the drain region can be relaxed. The variation in threshold voltage of the transistor due to the electric field in the region can be reduced.

[0046] In the structure shown in FIG. 3, the shapes of the conductive films 114a and 114b are the same as those shown in FIG. The shape of the conductive films 114a and 114b of the transistor 100 is different from that of the conductive films 114a and 114b of the transistor 100 shown in FIG. 1, the lower end of the conductive film 114a is positioned outside the lower end of the conductive film 114b. The conductive film 114b may have a tapered shape. The angle θ between the surface of the conductive film 114b and the side surface of the conductive film 114b is less than 90° and is less than 10°. or 15° or more and 85° or less, or 30° or more and 85° or less, or 4 The angle θ may be 5° or more and 85° or less, or 60° or more and 85° or less. 10° to 85°, or 15° to 85°, or 30° to 85° , or 45° or more and 85° or less, or 60° or more and 85° or less, This makes it possible to improve the coverage of the insulating film 118 on the side surface of 4b.

[0047] By using the structure of the conductive film 114 illustrated in FIG. 3, the impurity element can be easily introduced into the oxide semiconductor film 110. A low-resistance region having a different concentration can be formed. When an impurity element is introduced into the oxide semiconductor film 110, the conductive film 114b is The conductive film 114a in the region and the conductive film 114b below the conductive film 114a in the region protruding from the conductive film 114b By introducing an impurity element into the oxide semiconductor film 110 through the insulating film 112, a low-resistance region is formed. Regions 110d, 110e can be formed.

[0048] In addition, the oxide semiconductor film 110 is a film in a region that does not overlap with the insulating film 112 and the conductive film 114. The thickness of the insulating film 112 is smaller than that of the conductive film 114. The oxide semiconductor film in the thin region is thicker than the oxide semiconductor film in the region overlapping with the insulating film 112 and the conductive film 114. It is a thin region with a thickness of 0.1 nm or more and 5 nm or less.

[0049] The low-resistance regions 110b and 110c in the oxide semiconductor film 110 are the source and drain regions. The low resistance regions 110b, 110c and 110d function as a drain region. d and 110e contain impurity elements.

[0050] The impurity element is a rare gas element, and the oxide semiconductor film 110 is formed by a sputtering method. In this case, the channel region 110a and the low resistance regions 110b, 110c, 110d, and 110 e each contain a rare gas element. The concentration of rare gas elements is higher in the low-resistance regions 110b and 110c. Compared to e, the low resistance regions 110b and 110c have a higher concentration of rare gas elements.

[0051] When the oxide semiconductor film 110 is formed by a sputtering method, Since a rare gas is sometimes used as the gas, the oxide semiconductor film 110 contains a rare gas. In addition, in the low resistance regions 110b and 110c, oxygen vacancies are intentionally formed. This is because rare gas is added to the low resistance regions 110b, 110c, and 110. The channels 110d and 110e may be doped with a rare gas element different from that doped in the channel region 110a.

[0052] Here, in the case where argon is added to the oxide semiconductor film as a rare gas element, The concentration of impurity elements in the oxide semiconductor film was evaluated. The concentrations of the elements will now be explained.

[0053] FIG. 38 shows the results of secondary ion mass spectrometry (SIMS). 1 is a graph showing the argon concentration in an oxide semiconductor film measured by CCD spectrometry. The sample used in the SIMS analysis was a glass substrate 602 having an oxide semiconductor film 604 formed thereon. did.

[0054] Note that the oxide semiconductor film 604 was formed using a sputtering apparatus. Oxygen gas was introduced into the chamber of the sputtering equipment at a flow rate of 200 sccm. Metal oxide sputtering of In:Ga:Zn=1:1:1.2 [atomic %] placed inside the bar The metal oxide sputtering was performed by supplying 2.5 kW of power to the ring target. An AC power supply was used as the power supply applied to the deposition target. The oxide semiconductor film 604 was formed to a thickness of 100 nm by the above-mentioned method. As shown in the figure, the deposition gas was oxygen gas only, and no argon was used in the deposition gas.

[0055] Next, the substrate on which the oxide semiconductor film 604 was formed was subjected to heat treatment. Heat treatment was performed at 450°C for 1 hour in a nitrogen atmosphere, followed by a nitrogen and oxygen mixed gas. Heat treatment was carried out in an atmosphere at 450° C. for 1 hour.

[0056] Then, Sample A-1 in which no impurity element was added to the oxide semiconductor film 604 and Sample A-2 in which Samples A-2 and A-3 were prepared by adding impurity elements to the film 604. As a sample A-2 to which ions were added, an ion doping apparatus was used to dope the oxide semiconductor film 604. The acceleration voltage was 10 kV and the dose was 1.0 × 10 15 ions / cm 2 It will be Argon was added to the oxide semiconductor film 604 by adjusting the temperature as described above. As the sample A-3, an ion doping apparatus was used to apply heat to the oxide semiconductor film 604. The acceleration voltage was 30 kV, and the dose was 1.0 × 10 15 ions / cm 2 Adjust so that Then, argon was added to the oxide semiconductor film 604 .

[0057] In the graph shown in FIG. 38, the protective film 606 is formed over the oxide semiconductor film 604. The protective film 606 is a thin film of an oxide semiconductor when the oxide semiconductor film 604 is analyzed by SIMS. The SIMS analysis is performed from the glass substrate side. method, so-called SSDP-SIMS method (Substrate Side Depth Prof. Using ion secondary ion mass spectrometry (IMS) The detection limit for argon in a SIMS analyzer is approximately 2.0×10 19 at oms / cm 3 In FIG. 38, the horizontal axis represents the depth (nm) and the vertical axis represents the argon concentration. Concentration (atoms / cm 3 The primary ion species in SIMS analysis are Cesium primary ion (Cs + ) was used.

[0058] As shown in FIG. 38, as sample A-1 to which no impurity element was added, the oxide semiconductor film The argon concentration in 604 was generally at the detection limit. As Sample A-2 and Sample A-3 to which an oxide element is added, the argon in the oxide semiconductor film 604 is added. The concentration of 2.0×10 19 atoms / c m 3 ~2.0×10 21 atoms / cm 3 It is confirmed that the above is included. When comparing specimens A-2 and A-3, specimen A-3, which has a higher accelerating voltage, has a higher oxide semiconductor The argon is doped deep into the oxide semiconductor film 604. For example, the thickness of the oxide semiconductor film 604 is When the thickness is set to 50 nm or less, argon is added up to the base of the oxide semiconductor film 604 .

[0059] As described above, by adding an impurity element to the oxide semiconductor film 604, It was confirmed that there was a region where the impurity concentration in 604, in this case argon concentration, was high.

[0060] The impurity element is hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, or chlorine. In this case, the low resistance regions 110b, 110c, 110d, and 110e contain the above impurity elements. Therefore, compared with the channel region 110a, the low resistance regions 110b, 110c, and 110d are The low-resistance regions 110b and 110e have higher concentrations of the above-mentioned impurity elements. In 10c, 110d, and 110e, impurity elements obtained by secondary ion mass spectrometry The concentration of is 5×10 18 atoms / cm 3 More than 1×10 22 atoms / cm 3 below, or 1×10 19 atoms / cm 3 More than 1×10 21 atoms / cm 3 The following also is 5 x 10 19 atoms / cm 3 5×10 or more 20 atoms / cm 3 The following shall be done: can be done.

[0061] In addition, when the impurity element is hydrogen, the low resistance region 11 is larger than the channel region 110a. The hydrogen concentration is higher in the low-resistance region 110b, 110c, 110d, and 110e. b, 110c, 110d, and 110e, hydrogen obtained by secondary ion mass spectrometry. The concentration of is 8×10 19 atoms / cm 3 or more, or 1×10 20 atoms / cm 3 or more, or 5×10 20 atoms / cm 3 It can be more than that.

[0062] The low resistance regions 110b, 110c, 110d, and 110e contain impurity elements, so that oxygen The number of defects increases, and the carrier density increases. As a result, the low resistance regions 110b, 110c, and 110d are 10d and 110e have high conductivity.

[0063] The impurity elements are hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, or chlorine. In this case, the low resistance regions 110b, 11 In 0c, 110d, and 110e, the oxygen vacancies formed by the rare gas and the added water by interaction with one or more of the elements silicon, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, or chlorine. The low resistance regions 110b, 110c, 110d, and 110e may become more conductive. be.

[0064] When hydrogen is added to an oxide semiconductor in which oxygen vacancies have been formed by the addition of an impurity element, oxygen Hydrogen enters the vacancy site and a donor level is formed near the conduction band. As a result, the oxide semiconductor The conductivity of the oxide semiconductor increases and it becomes a conductor. The oxide semiconductor that becomes a conductor is called an oxide conductor. In general, oxide semiconductors have a large energy gap and are therefore sensitive to visible light. On the other hand, an oxide conductor is an oxide having a donor level near the conduction band. Therefore, the effect of absorption due to the donor level is small, and the material is oxidized to visible light. It has the same level of light transmittance as nitride semiconductors.

[0065] Here, the resistance of a film formed of an oxide conductor (hereinafter referred to as an oxide conductor film) The temperature dependency of resistivity will be explained with reference to FIG.

[0066] Here, a sample having an oxide conductor film was prepared. The oxide conductor film (OC_SiN x ) In the doping apparatus, argon is added to the oxide semiconductor film, and the silicon nitride film is The oxide conductor film (OC_Ar dope+SiN x ), or In the plasma processing apparatus, the oxide semiconductor film is exposed to argon plasma, and silicon nitride is The oxide conductive film formed by contacting with the film (OC_Ar plasma + SiN x )of The silicon nitride film contains hydrogen.

[0067] Oxide conductive film (OC_SiN x The method for preparing the sample containing the ZnO film is as follows. A silicon oxynitride film with a thickness of 400 nm was formed on the substrate by plasma CVD, and then oxygen was pumped. By exposing the silicon oxynitride film to plasma and adding oxygen ions to it, oxygen is released by heating. Next, a silicon oxynitride film that releases oxygen when heated was formed. A sputtering target with an atomic ratio of In:Ga:Zn=1:1:1.2 was placed on the silicon film. A 100 nm thick In-Ga-Zn oxide film was formed by the sputtering method used. After heat treatment in a nitrogen atmosphere at 450°C, it was annealed in a mixed gas atmosphere of nitrogen and oxygen at 450°C. Then, a silicon nitride film having a thickness of 100 nm was formed by PECVD. The sample was then heat-treated at 350° C. in a mixed gas atmosphere of nitrogen and oxygen.

[0068] Oxide conductor film (OC_Ar doped + SiN x The method for preparing the sample containing A silicon oxynitride film with a thickness of 400 nm was formed on a glass substrate by the PECVD method. After that, it is exposed to oxygen plasma to add oxygen ions to the silicon oxynitride film, Next, a silicon oxynitride film that releases oxygen by heating was formed. On the silicon nitride film, sputtering with the atomic ratio of In:Ga:Zn=1:1:1.2 A 100 nm thick In-Ga-Zn oxide was deposited by sputtering using a target. After forming the film, it was heat-treated in a nitrogen atmosphere at 450°C, and then heated in a mixed gas of nitrogen and oxygen at 450°C. Next, a doping device was used to dope the In-Ga-Zn oxide film. The acceleration voltage was 10 kV and the dose was 5 × 10 14 ions / cm 2 of argon was added. Next, a 1 mm thick In-Ga-Zn oxide film was grown by PECVD. A silicon nitride film of 00 nm was formed. Next, a nitrogen and oxygen mixed gas atmosphere at 350° C. was used. It was heat treated.

[0069] Oxide conductive film (OC_Ar plasma + SiN x The preparation method of the sample including A silicon oxynitride film with a thickness of 400 nm was formed on a glass substrate by the PECVD method. After that, the silicon oxynitride film is exposed to oxygen plasma to form a silicon oxynitride film that releases oxygen when heated. Next, a silicon oxynitride film having an atomic ratio of In: The sputtering method was performed using a sputtering target of Ga:Zn=1:1:1.2. Then, a 100 nm thick In-Ga-Zn oxide film was formed and heated at 450°C in a nitrogen atmosphere. After the treatment, the specimen was heat-treated at 450°C in a mixed gas atmosphere of nitrogen and oxygen. In the processing equipment, argon plasma is generated and accelerated argon ions are ionized into In-G The oxygen vacancies were created by bombarding the a-Zn oxide film with oxygen. A silicon nitride film of 100 nm was formed. Next, the substrate was placed in a nitrogen and oxygen mixed gas atmosphere at 350° C. It was heat treated in air.

[0070] Next, the resistivity of each sample was measured and the results are shown in Figure 25. The resistivity was measured using a four-terminal In FIG. 25, the horizontal axis indicates the measurement temperature, and the vertical axis indicates indicates resistivity. Also, the oxide conductor film (OC_SiN x ) are shown with square marks, Oxide conductor film (OC_Ar doped + SiN x The measurement results of oxide conductors are shown with circles. Electrical film (OC_Ar plasma+SiN x ) The measurement results are indicated by triangles.

[0071] Although not shown, the oxide semiconductor film that is not in contact with the silicon nitride film has a high resistivity. Therefore, it is considered that the oxide conductor film has a higher resistivity than the oxide semiconductor film. It is clear that it is low.

[0072] As can be seen from FIG. 25, the oxide conductor film (OC_Ar doped+SiN x ) and acid Compound conductor film (OC_Ar plasma+SiN x ) contains oxygen vacancies and hydrogen The resistivity fluctuation is small. Typically, the resistivity fluctuation is small at temperatures between 80K and 290K. The resistivity variation is less than ±20% between 150K and 250K. The rate is less than ±10%. In other words, oxide conductors are degenerate semiconductors, and the conduction band edge and the ferroelectric It is estimated that the luminescence level of the oxide conductor film is equal to or approximately equal to the luminescence level of the oxide conductor film. By using it as the source and drain regions of a transistor, the oxide conductor film and the source The contact with the conductive film that functions as the electrode and drain electrode is an ohmic contact, and the oxide conductive The contact resistance between the conductive film and the conductive film functioning as the source electrode and the drain electrode can be reduced. In addition, since the resistivity of the oxide conductor has low temperature dependence, the oxide conductor film and the source electrode and drain electrode can be easily formed. The variation in contact resistance with the conductive film that functions as the drain electrode is small, resulting in highly reliable transistors. It is possible to create a star.

[0073] The oxide conductor film is a degenerate semiconductor, and the conduction band edge and the Fermi level are coincident or approximately coincident. Therefore, the oxide conductor film and the source and drain electrodes are The contact with the conductive film that functions is an ohmic contact, and the oxide conductive film and the source electrode and the drain electrode This can reduce the contact resistance with the conductive film that functions as the inner electrode.

[0074] As described above, the low-resistance region formed in the oxide semiconductor film 110 has been described. The low-resistance region is formed by filling oxygen vacancies in the oxide semiconductor film 110 with oxygen. This can result in a decrease in carrier density and an increase in resistance.

[0075] Specifically, the insulating film 108 is located below the oxide semiconductor film 110. The oxide semiconductor film 8 contains oxygen and has a function of supplying oxygen to the oxide semiconductor film 110. Oxygen is supplied to the oxygen vacancies in the channel region 110a of the conductive film 110, and the oxide semiconductor The function of supplying oxygen to the low resistance regions 110b, 110c, 110d, and 110e of the membrane 110 is also Possesses the ability.

[0076] Therefore, the low resistance regions 110b, 110c, 110d, and 11 Even if oxygen vacancies are formed in 0e, the oxygen vacancies are compensated for by oxygen supplied from the insulating film 108. Here, the movement of the impurity element and oxygen in the vicinity of the oxide semiconductor film 110 may be A model diagram of the path is shown in FIG. 4. Note that FIG. 4 is a model of a cross-sectional view of the area 190 shown in FIG. This corresponds to a delta diagram.

[0077] The solid arrows in FIG. 4A represent oxygen 191 supplied from the insulating film 108b. The dashed arrows represent hydrogen 192 supplied from the insulating film 118 .

[0078] As shown in FIG. 4A, the insulating film 108b uniformly supplies oxygen to the oxide semiconductor film 110. In the case where the channel region 110a and the low resistance region 110b have a function of being capable of being doped with oxygen, Hydrogen 191 is supplied to the low resistance region 110b from the insulating film 118. Therefore, in the vicinity of the surface of the low resistance region 110b in contact with the insulating film 118, Oxygen vacancies in the oxide semiconductor film 110 are combined with hydrogen, and the carrier density increases. In the vicinity of the bottom surface of the low-resistance region 110b in contact with the insulating film 108b, the oxide semiconductor film 1 The oxygen vacancies in 10 are combined with oxygen, and the oxygen vacancies are filled, resulting in a decrease in carrier density.

[0079] The carrier density in the low resistance region 110b is reduced, so that the resistance of the low resistance region 110b is This increases the contact resistance with the conductive film that functions as the source electrode and the drain electrode. I end up doing this.

[0080] Therefore, in one embodiment of the present invention, an impurity element is introduced into the insulating film 108b to form a low-resistance The amount of oxygen released into the region 110b is reduced. , an impurity element is introduced into the insulating film 108b, and oxygen is supplied into the low resistance region 110b. The impurity element introduced into the insulating film 108b is simultaneously supplied into the low resistance region 110b. This suppresses oxygen from filling up the oxygen vacancies in the low-resistance region 110b with oxygen.

[0081] Specifically, as shown in FIG. 4B, a region 193 (a third region) is formed in the insulating film 108b. The region 194 is a region 193. The region 194 is a region 193. The insulating film 108b has a region 194, so that the impurity concentration is higher than that of the region 19. The amount of oxygen 191 released from the insulating film 108b is reduced. By this, oxygen 191 and impurity elements 195 are transferred from the region 194 to the low resistance region 11. 0b. In FIG. 4B, the impurity element 195 is indicated by a solid white line. This is indicated by an arrow pointing out the hole.

[0082] The region 194 may be formed, for example, by forming the conductive film 114 and then forming a low resistance region. The insulating film 108b can be formed by introducing an impurity element into the insulating film 108b through the insulating film 110b. The impurity element can be introduced into the insulating film 108b by, for example, ion doping. The impurity introduced into the insulating film 108b may be a silicide, an ion implantation method, a plasma treatment method, or the like. The elements have one or more of hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur or a rare gas. The impurity element introduced into the insulating film 108b is particularly hydrogen and / or aluminum. Gon is preferred.

[0083] In the transistor 100 described in this embodiment, the channel region 110a is a source region and a drain region. The structure is sandwiched between low resistance regions 110b and 110c, which function as drain regions. Therefore, the transistor 100 has a large on-state current and a high field-effect mobility. In addition, in the transistor 100, the conductive film 114 is used as a mask to form an oxide semiconductor film having an impurity element. In other words, a low resistance region can be formed in a self-aligned manner. Cut.

[0084] The transistor 100 includes a conductive film 114 functioning as a gate electrode and a source electrode In addition, the conductive films 122a and 122b functioning as drain electrodes do not overlap with each other. Therefore, the parasitic capacitance between the conductive film 114 and the conductive films 122a and 122b can be reduced. As a result, when a large-area substrate is used as the substrate 102, the conductive film 114 and This makes it possible to reduce signal delay in the conductive films 122a and 122b.

[0085] In addition, the transistor 100 has two regions in the insulating film 108 that have different concentrations of impurity elements. By providing the above, a channel region 110a and low resistance regions 110b and 110c are provided. The amount of oxygen released can be varied. By providing two regions with different concentrations of The amount of the impurity element discharged from the first electrode 110b and the second electrode 110c can be made different. As a result, the increase in resistance of the low resistance regions 110b and 110c can be suppressed. It is possible to provide a highly reliable semiconductor device.

[0086] Next, other configurations of the semiconductor device shown in FIGS. 1(A), 1(B), and 1(C) will be described in detail. do.

[0087] Various substrates can be used as the substrate 102 and are not limited to a specific one. Examples of the substrate include a semiconductor substrate (e.g., a single crystal substrate or a silicon substrate), a SO I substrate, glass substrate, quartz substrate, plastic substrate, metal substrate, stainless steel substrate , Substrate with Stainless Steel Foil, Tungsten Substrate, Tungsten Foil A substrate having a fibrous material, a flexible substrate, a laminated film, a paper containing a fibrous material, or a base film Examples of glass substrates include barium borosilicate glass and aluminophore. silicate glass, or soda lime glass. Flexible substrates, lamination films Examples of the materials and base films are as follows: Polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulf For example, there are plastics such as polyether ether sulphate (PES). Synthetic resins, etc. Examples include polypropylene, polyester, and polyfluorine. Examples of such materials include polyvinyl chloride, polyvinyl chloride, and polyamide. Imide, aramid, epoxy, inorganic deposition film, paper, etc. In particular, semiconductor By manufacturing transistors using substrates, single crystal substrates, or SOI substrates, etc. , small variation in characteristics, size, or shape, high current capability, small size It is possible to manufacture transistors. Circuits are constructed using such transistors. As a result, it is possible to reduce the power consumption of the circuit or to increase the degree of integration of the circuit.

[0088] In addition, a flexible substrate is used as the substrate 102, and a transistor is formed directly on the flexible substrate. Alternatively, a separation layer may be provided between the substrate 102 and the transistor. After a semiconductor device is partially or entirely completed on the substrate, the semiconductor device is separated from the substrate 102 and another In this case, the transistor can be transferred to a substrate with poor heat resistance or a flexible substrate. The transfer can also be performed on a flexible substrate. The above-mentioned release layer may be, for example, a tungsten film and a silicon oxide film. A laminated structure of inorganic films with silicon films, or an organic resin film such as polyimide is formed on the substrate The above-mentioned configurations and the like can be used.

[0089] An example of a substrate on which a transistor is transferred is a substrate on which the above-mentioned transistor is formed. In addition to the substrates that can be used, paper substrates, cellophane substrates, aramid film substrates, polyimide film substrates, Rubber substrate, stone substrate, wood substrate, fabric substrate (natural fibers (silk, cotton, hemp), synthetic fibers (nylon) , polyurethane, polyester) or regenerated fibers (acetate, cupra, rayon, These substrates include recycled polyester, leather substrates, and rubber substrates. By using this, it is possible to form transistors with good characteristics and low power consumption. It is possible to form, manufacture devices that are less likely to break, are heat resistant, or are lighter or thinner. .

[0090] The insulating film 108 can be formed by sputtering, CVD, vapor deposition, pulsed laser deposition ( The insulating film 108 can be formed by appropriately using a photolaser laser deposition (PLD) method, a printing method, a coating method, or the like. For example, a single layer or a stacked layer of an oxide insulating film or a nitride insulating film can be formed. Note that in order to improve the interface characteristics with the oxide semiconductor film 110, In this case, at least a region in contact with the oxide semiconductor film 110 is preferably formed using an oxide insulating film. It is preferable to use an oxide insulating film that releases oxygen by heating as the insulating film 108. Then, oxygen contained in the insulating film 108 is transferred to the oxide semiconductor film 110 by heat treatment. It is possible.

[0091] The thickness of the insulating film 108 is 50 nm or more, or 100 nm or more and 3000 nm or less, or The thickness of the insulating film 108 can be set to 200 nm or more and 1000 nm or less. This can increase the amount of oxygen released from the insulating film 108 and also increase the amount of oxygen released from the insulating film 108 and the oxide semiconductor. The interface state at the interface with the conductive film 110 and the channel region 1 It is possible to reduce the oxygen vacancies contained in 10a.

[0092] The insulating film 108 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitrogen. Silicon oxide, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn oxide The insulating film may be a single layer or a stacked layer. A silicon nitride film is used as the insulating film 108a, and a silicon oxynitride film is used as the insulating film 108b. The insulating film 108 has a laminated structure of an insulating film 108a and an insulating film 108b. By using a silicon nitride film for the insulating film 8a and a silicon oxynitride film for the insulating film 108b, As a result, oxygen can be efficiently introduced into the compound semiconductor film 110.

[0093] The oxide semiconductor film 110 is typically an In-Ga oxide, an In-Zn oxide, or an In- M-Zn oxide (M is Mg, Al, Ti, Ga, Y, Zr, La, Ce, Nd, or The oxide semiconductor film 110 is formed using a metal oxide such as Hf. Note that the oxide semiconductor film 110 has a light-transmitting property.

[0094] In addition, when the oxide semiconductor film 110 is an In-M-Zn oxide, the atomic ratio of In to M is When the sum of In and M is 100 atomic %, In is 25 atomic % or more, and M is less than 75 atomic %, or In is 34 atomic % or more, and M is 66 atomic % or more. Less than c%.

[0095] The oxide semiconductor film 110 has an energy gap of 2 eV or more, or 2.5 eV or more. Or it is 3 eV or more.

[0096] The thickness of the oxide semiconductor film 110 is 3 nm or more and 200 nm or less, or 3 nm or more and 100 The thickness can be 3 nm or less, or 3 nm to 60 nm.

[0097] When the oxide semiconductor film 110 is an In-M-Zn oxide, the In-M-Zn oxide is deposited. The atomic ratio of the metal elements in the sputtering target used for this purpose is In≧M, Zn≧M. It is preferable that the atomic ratio of the metal elements in such a sputtering target and In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn =2:1:1.5, In:M:Zn=2:1:2.3, In:M:Zn=2:1:3, I The atomic ratio of n:M:Zn to Zn is preferably 3:1:2. The atomic ratios are calculated based on the atomic ratio of the metal elements contained in the sputtering target. This includes a fluctuation of plus or minus 40% in numerical ratios.

[0098] In addition, the oxide semiconductor film 110 contains silicon or carbon, which is one of the Group 14 elements. When the oxide semiconductor film 110 is filled with oxygen, oxygen vacancies increase in the oxide semiconductor film 110, causing the oxide semiconductor film 110 to become n-type. Therefore, the oxide semiconductor film 110, particularly the channel region 110a, is made of silicon or The carbon concentration (obtained by secondary ion mass spectrometry) was set to 2 × 10 18 atoms / cm 3 or less, or 2×10 17 atoms / cm 3 This can be expressed as follows: A transistor has electrical characteristics in which the threshold voltage is positive (also called normally-off characteristics). .)

[0099] In addition, in the oxide semiconductor film 110, especially in the channel region 110a, secondary ions The concentration of alkali metals or alkaline earth metals obtained by mass spectrometry was calculated using a ratio of 1×10 1 8 atoms / cm 3 or less, or 2×10 16 atoms / cm 3 The following can be done: Alkali metals and alkaline earth metals generate carriers when bonded to oxide semiconductors. This may cause the off-state current of the transistor to increase. It is preferable to reduce the concentration of alkali metals or alkaline earth metals in the panel region 110a. As a result, the transistor has electrical characteristics in which the threshold voltage is positive (normally off). Also called characteristics.

[0100] In addition, the oxide semiconductor film 110 contains nitrogen, particularly in the channel region 110a. When this happens, electrons that act as carriers are generated, the carrier density increases, and the material becomes n-type. As a result, a transistor using an oxide semiconductor film containing nitrogen has normally-on characteristics. Therefore, in the oxide semiconductor film, particularly in the channel region 110a, For example, in secondary ion mass spectrometry, it is preferable that the nitrogen content is reduced as much as possible. The nitrogen concentration obtained from 18 atoms / cm 3 It can be the following:

[0101] The oxide semiconductor film 110 is formed by reducing impurity elements, particularly in the channel region 110a. By reducing the amount of the oxide semiconductor film, the carrier density of the oxide semiconductor film can be reduced. In the semiconductor film 110, particularly in the channel region 110a, the carrier density is set to 8× 10 11 / cm 3 Less than 1 x 10 11 / cm 3 Less than 1×1 0 10 / cm 3 Less than 1 x 10 -9 / cm 3 It can be more than that.

[0102] The oxide semiconductor film 110 is an oxide semiconductor film having a low impurity concentration and a low density of defect states. By using such a material, a transistor having better electrical characteristics can be manufactured. Here, a high-purity pure silicon has a low impurity concentration and a low defect level density (few oxygen vacancies). High-purity intrinsic or substantially high-purity intrinsic oxides Semiconductors have few carrier generation sources, so it is sometimes possible to reduce the carrier density. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has a threshold voltage The electrical characteristics tend to be such that the voltage is positive (also called normally-off characteristics). An oxide semiconductor film that is intrinsic or substantially highly purified intrinsic has a low density of defect states; The trap density may also be lower. A certain oxide semiconductor film has a remarkably small off-state current and a voltage between the source and drain electrodes ( In the drain voltage range of 1V to 10V, the off-state current is Below the measurement limit of Isa, i.e. 1×10 -13 A characteristic of less than A can be obtained. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has low fluctuation in electrical characteristics. In some cases, this can result in a transistor with low resistance and high reliability.

[0103] The oxide semiconductor film 110 may have a non-single crystal structure, for example. For example, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor), polycrystalline structure, microcrystalline structure (described later), Among non-single crystal structures, the amorphous structure has the highest defect level density, C AAC-OS has the lowest defect state density.

[0104] Note that the oxide semiconductor film 110 may have an amorphous structure, a microcrystalline structure, a polycrystalline structure, or a A mixed film having two or more of the following regions may be used: a region of a CAAC-OS structure, a region of a single crystal structure, and a region of a crystalline structure. The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CA In the case of a single-layer structure having two or more regions of either AC-OS or single crystal structure In addition, the mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, and the like. A structure in which two or more of the following are stacked: a CAAC-OS region, a CAAC-OS region, and a single crystal structure region. There are cases.

[0105] In the oxide semiconductor film 110, the channel region 110a, the low-resistance region 110b, The crystallinity of 110c, 110d, and 110e may differ. In the membrane 110, the channel is larger than the low resistance regions 110b, 110c, 110d, and 110e. The crystallinity of the low-resistance region 110a is higher than that of the low-resistance region 110b, 110c, and 110d. When an impurity element is added to the low-resistance regions 110b, 110c, and 110d, , 110e will be damaged, resulting in a decrease in crystallinity.

[0106] The insulating film 112 is formed by using a single layer or a stack of an oxide insulating film or a nitride insulating film. Note that in order to improve the interface characteristics with the oxide semiconductor film 110, At least a region in contact with the oxide semiconductor film 110 is formed using an oxide insulating film. The insulating film 112 is preferably made of, for example, silicon oxide, silicon oxynitride, or silicon nitride oxide. Silicon, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide or Ga The insulating layer 11 may be formed of a single layer or a multilayer structure, such as a -Zn oxide.

[0107] In addition, an insulating film having a blocking effect against oxygen, hydrogen, water, etc. is provided as the insulating film 112. By this, oxygen can be diffused from the oxide semiconductor film 110 to the outside, and oxygen can be absorbed from the oxide semiconductor film 110 to the outside. It is possible to prevent hydrogen, water, etc. from entering the film 110. Examples of insulating films having such properties include aluminum oxide, aluminum oxynitride, gallium oxide, Gallium oxide nitride, yttrium oxide, yttrium oxide nitride, hafnium oxide, oxynitride Hafnium oxide, etc.

[0108] The insulating film 112 is made of hafnium silicate (HfSiO x ), nitrogen is added Hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminate (HfAl x O y N z ), high-k materials such as hafnium oxide and yttrium oxide The use of this material can reduce the gate leakage current of a transistor.

[0109] In addition, by using an oxide insulating film that releases oxygen by heating as the insulating film 112, Oxygen contained in the insulating film 112 is transferred to the oxide semiconductor film 110 by heat treatment. is possible.

[0110] The thickness of the insulating film 112 is 5 nm or more and 400 nm or less, or 5 nm or more and 300 nm or less. , or may be 10 nm or more and 250 nm or less.

[0111] The conductive film 114 and the conductive films 122a and 122b can be formed by a sputtering method, a vacuum deposition method, or the like. The film can be formed by a method such as a photolithography method, a pulsed laser deposition (PLD) method, or a thermal CVD method. The conductive film 114 and the conductive films 122a and 122b may be made of, for example, aluminum, quartz, or the like. From chromium, copper, tantalum, titanium, molybdenum, nickel, iron, cobalt, and tungsten The selected metal element or the alloy containing the above-mentioned metal elements or the combination of the above-mentioned metal elements In addition, it can be formed by using an alloy of manganese and zirconium. Alternatively, one or more metal elements may be used. The conductive films 122a and 122b may have a single-layer structure or a laminated structure of two or more layers. For example, A single layer structure of aluminum film containing silicon, a single layer structure of copper film containing manganese, A two-layer structure in which a titanium film is laminated on a titanium nitride film, a two-layer structure in which a titanium film is laminated on a titanium nitride film, A two-layer structure in which a tungsten film is laminated on a titanium nitride film, a tantalum nitride film or a tungsten nitride film Two-layer structure with tungsten film laminated on stainless film, copper film laminated on copper film containing manganese A two-layer structure is formed by laminating a titanium film and an aluminum film on the titanium film, and then laminating the titanium film on top of that. A three-layer structure that forms a manganese film. A copper film is laminated on a copper film containing manganese, and a manganese film is further laminated on top of that. There are three-layer structures that form a copper film containing gun. In addition, aluminum is coated with titanium and tantalum. tungsten, molybdenum, chromium, neodymium, and scandium. An alloy film or a nitride film having a combination of the above may also be used.

[0112] The conductive film 114 and the conductive films 122a and 122b are made of indium tin oxide (In tungsten oxide (also called indium tin oxide, ITO) oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide Indium tin oxide, indium zinc oxide, silicon oxide A light-transmitting conductive material such as indium tin oxide can also be used. A laminated structure of a light-transmitting conductive material and the above metal element may also be used.

[0113] The thickness of the conductive film 114 and the conductive films 122a and 122b is 30 nm or more and 500 nm or less. , or 100 nm or more and 400 nm or less.

[0114] The insulating film 118 contains hydrogen. For example, the insulating film 118 containing hydrogen is a nitride. Examples of the nitride insulating film include silicon nitride, silicon oxynitride, and nitride. The insulating film 118 can be formed using aluminum nitride, aluminum oxide nitride, or the like. The hydrogen concentration in is 1×10 22 atoms / cm 3 It is preferable that the above is true. The insulating film 118 is in contact with the low-resistance region of the oxide semiconductor film 110. In the oxide semiconductor film 110, hydrogen contained in the insulating film 118 is As a result of this diffusion, the hydrogen concentration is higher in the low resistance region than in the channel region.

[0115] The insulating film 120 is formed by forming a single layer or a multilayer of an oxide insulating film or a nitride insulating film. The insulating film 120 can be made of, for example, silicon oxide, silicon oxynitride, or silicon nitride oxide. Con, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide or Ga-Z An n-oxide or the like may be used, and the layer may be formed as a single layer or a multilayer.

[0116] The insulating film 128 is preferably a film that functions as a barrier film against hydrogen, water, and the like from the outside. The insulating film 128 may be made of, for example, silicon nitride, silicon oxynitride, or aluminum oxide. The above may be used, and the layer may be formed as a single layer or a multilayer.

[0117] The thickness of the insulating film 118, the insulating film 120, and the insulating film 128 is 30 nm or more and 500 nm or less. The thickness can be 100 nm or less, or 100 nm or more and 400 nm or less.

[0118] <Configuration 2 of Semiconductor Device> Next, regarding another configuration of the semiconductor device shown in FIGS. 1(A), 1(B), and 1(C), FIGS. 5 and 6 will be described. I will use this to explain.

[0119] FIG. 5A is a top view of a transistor 100A included in the semiconductor device, and FIG. 5(A) is a cross-sectional view taken along the dashed line X1-X2 in FIG. 5(A), and FIG. 5(C) is a cross-sectional view taken along the dashed line X1-X2 in FIG. This is a cross-sectional view between Y1 and Y2.

[0120] The transistor 100A shown in FIGS. 5A, 5B, and 5C includes an insulating layer formed on a substrate 102. A conductive film 106 on the insulating film 104, and an insulating film 108 (first insulating film 108) on the insulating film 104 and the conductive film 106 The oxide semiconductor film 11 overlaps with the conductive film 106 with the insulating film 108 interposed therebetween. 0, an insulating film 112 on the oxide semiconductor film 110, and an oxide semiconductor film The conductive film 114 overlapping with the oxide semiconductor film 110, the insulating film 112, and the conductive film 11 An insulating film 118 (also called a second insulating film) covers the insulating film 4, and an insulating film 120 (called a first insulating film) on the insulating film 118. The insulating film 118 and the insulating film 120 are provided with an opening 140a ( The conductive film 1 is electrically connected to the oxide semiconductor film 110 through a first opening. 22a, and an opening 140b (second opening) provided in the insulating film 118 and the insulating film 120. a conductive film 122b electrically connected to the oxide semiconductor film 110 through Note that the insulating film 120 and the conductive films 122a and 122b are provided over the transistor 100A. An insulating film 128 may be provided to cover the insulating film 128 .

[0121] In the transistor 100A, the insulating film 108 is made up of an insulating film 108a and an insulating film 108b. The oxide semiconductor film 110 has an insulating film 108b over the channel region 108a. 10a (also called a first region) and a pair of low resistance regions 110 sandwiching a channel region 110a. The channel region 110a has an insulating layer 110b and a insulating layer 110c (also called a second region). The low resistance regions 110b and 110c contact the insulating film 118. The conductive film 114 includes a conductive film 114a and a conductive film 114b on the conductive film 114a.

[0122] The conductive film 106 also functions as a first gate electrode (also called a bottom gate electrode). The insulating film 108 also functions as a first gate insulating film. The conductive film 114 functions as a second gate electrode (also called a top gate electrode). The insulating film 112 functions as a second gate insulating film. The conductive film 122a functions as one of a source electrode and a drain electrode. The second electrode functions as the other of the source electrode and the drain electrode.

[0123] In the transistor 100A, the insulating film 108 contains oxygen and is an oxide semiconductor film. The insulating film 108 supplies oxygen to the insulating film 110. This can compensate for oxygen vacancies that may be formed in the insulating film 118. The oxide semiconductor film 110 contains hydrogen and has a function of supplying hydrogen to the oxide semiconductor film 110.

[0124] The transistor 100A shown in FIGS. 5(A), 5(B), and 5(C) is the same as the transistor described above. Unlike the gate electrode 100, a conductive film functioning as a gate electrode is formed above and below the oxide semiconductor film 110. As shown in the transistor 100A, the semiconductor device of one embodiment of the present invention has a structure Alternatively, two or more gate electrodes may be provided.

[0125] As shown in FIG. 5C, the conductive film 114 functioning as the second gate electrode is In the opening 139 (also called the third opening) provided in the insulating film 108 and the insulating film 112, Thus, the conductive film 106 functions as a first gate electrode. The same potential is applied to the film 114 and the conductive film 106. The conductive film 114 and the conductive film 106 may be applied with different potentials.

[0126] As shown in FIG. 5C, the oxide semiconductor film 110 functions as a first gate electrode. and a conductive film 114 functioning as a second gate electrode. The second gate electrode is sandwiched between two conductive films that function as gate electrodes. The length of the conductive film 114 functioning as a channel electrode in the channel width direction is The length of the oxide semiconductor film 110 in the channel width direction is longer than the length of the oxide semiconductor film 110 in the channel width direction. The gate electrode 112 is covered with a conductive film 114. The gate electrode 112 also functions as a second gate electrode. The conductive film 114 and the conductive film 106 functioning as the first gate electrode are surrounded by the insulating film 108 and the insulating film 109. Since the connection is made through the opening 139 provided in the insulating film 112, the oxide semiconductor film 110 One of the side surfaces in the channel width direction functions as a second gate electrode via an insulating film 112. It faces the conductive film 114 .

[0127] In other words, in the channel width direction of the transistor 100A, The conductive film 106 functioning as a first gate electrode and the conductive film 114 functioning as a second gate electrode are an insulating film 108 functioning as a gate insulating film, and an insulating film 109 functioning as a second gate insulating film; 112 and functions as a first gate insulating film. The oxide semiconductor is formed through the insulating film 108 and the insulating film 112 which functions as a second gate insulating film. It is configured to surround the body membrane 110.

[0128] With such a configuration, the oxide semiconductor film 11 included in the transistor 100A 0 is a conductive film 106 functioning as a first gate electrode and a conductive film 107 functioning as a second gate electrode. The transistor 100A can be electrically surrounded by the electric field of the conductive film 114. A channel region is formed by the electric field of the first gate electrode and the second gate electrode. The device structure of a transistor that electrically surrounds an oxide semiconductor film is called surrounded c This can be called a hannel (s-channel) structure.

[0129] Since the transistor 100A has an s-channel structure, the first gate electrode and The conductive film 106 functioning as a gate electrode or the conductive film 114 functioning as a second gate electrode. As a result, an electric field for inducing a channel can be effectively applied to the oxide semiconductor film 110. Therefore, the current driving capability of the transistor 100A is improved, and high on-current characteristics can be obtained. In addition, since the on-current can be increased, the transistor 100A In addition, the transistor 100A has an oxide semiconductor film 110 The conductive film 106 functions as a first gate electrode and the conductive film 107 functions as a second gate electrode. Since the transistor 100A has a structure surrounded by the conductive film 114, the mechanical strength of the transistor 100A is increased. It can be done.

[0130] An opening 139 is formed in the channel width direction of the transistor 100A. An opening different from the opening 139 may be formed on a side surface of the oxide semiconductor film 110 that is not covered by the insulating film 134.

[0131] The insulating film 104 may be formed using the same material as the insulating film 108 described above. The conductive film 106 can be formed using the same material as the conductive film 114 described above. Note that the transistor 100A does not include the insulating film 104. However, the present invention is not limited to this. For example, the insulating film 104 may be omitted. This is also fine.

[0132] The other configurations of the transistor 100A are the same as those of the transistor 100 shown above. Yes, and it has the same effect.

[0133] <Configuration 3 of Semiconductor Device> The transistor 100B shown in FIG. 6A has the same structure as the transistor 100A shown in FIG. The transistor 100B has a different structure from the oxide semiconductor film 110. The oxide semiconductor film 110 is a semiconductor film 110_1 and a semiconductor film 110_2. and an oxide semiconductor film 110_2 provided in the oxide semiconductor film 110. has a multi-layer structure.

[0134] The oxide semiconductor film 110 of the transistor 100B illustrated in FIG. Specifically, the oxide semiconductor film 110 of the transistor 100B has a low-resistance region. A channel region 110a_1, a channel region 110a_2, and a low resistance region 110b_1. , low resistance region 110b_2, low resistance region 110c_1, low resistance region 110c_2, has.

[0135] <Band structure> FIG. 6B shows a cross section along line AB including the channel region of the transistor 100B. Note that the oxide semiconductor film 110_2 has a band structure larger than that of the oxide semiconductor film 110_1. The insulating film 108a, the insulating film 108b, and the insulating film 108c have a larger energy gap than the insulating film 108b. The insulating film 112 has a higher energy density than the oxide semiconductor film 110_1 and the oxide semiconductor film 110_2. In addition, the oxide semiconductor film 110_1 and the oxide semiconductor film 110_ 2. The Fermi level (Ef) of the insulating film 108a, the insulating film 108b, and the insulating film 112 .) is the position of each intrinsic Fermi level (denoted as Ei). The work functions of the conductive film 106 and the conductive film 114 are set at the same position as the Fermi level.

[0136] When the gate voltage is set to be equal to or higher than the threshold voltage of the transistor, the oxide semiconductor film 110_1 Due to the difference in energy between the bottom of the conduction band between the oxide semiconductor film 110_1 and the oxide semiconductor film 110_2, electrons are In other words, electrons are buried in the oxide semiconductor film 110_1. It can be estimated that the energy at the bottom of the conduction band is denoted as Ec, and the valence The energy at the top of the subband is denoted as Ev.

[0137] Therefore, the transistor according to one embodiment of the present invention has an interface scattering caused by the embedding of electrons. Therefore, the transistor according to one embodiment of the present invention has a reduced channel resistance. The resistance is small.

[0138] Next, FIG. 6(C) shows a CD cross section including the source or drain region of a transistor. The band structure in the low resistance region 110c_1 and the low resistance region 110c_2 is shown. In the low-resistance region 110c_1, the oxide semiconductor film 110 The Fermi level of 1 is set to be approximately equal to the energy of the bottom of the conduction band. In the oxide semiconductor film 110_2, the Fermi level of the oxide semiconductor film 110_2 is equal to the energy of the bottom of the conduction band. To that extent.

[0139] At this time, the conductive film 122b having a function as a source electrode or a drain electrode and the low The energy barrier between the resistive region 110c_2 is sufficiently small, so that ohmic contact is achieved. Moreover, the low resistance region 110c_2 and the low resistance region 110c_1 are in ohmic contact with each other. Therefore, the conductive film 122b, the oxide semiconductor film 110_1, and the oxide semiconductor film 110 It can be seen that electrons are exchanged smoothly between _2 and .

[0140] Note that the conductive film 122a and the oxide film 122b functioning as source and drain electrodes of the transistor are The low resistance region 110b_1 and the low resistance region 110b_2 of the nitride semiconductor film 110 are in contact with each other. In this region, the same explanation as in FIG. 6(C) can be applied.

[0141] As described above, the transistor according to one embodiment of the present invention has a source electrode and a drain electrode. The electron exchange between the electrode and the channel region is smooth, and the channel resistance is small. In other words, it is a transistor with excellent switching characteristics. It can be seen that.

[0142] <Method 1 for manufacturing semiconductor device> Next, an example of a method for manufacturing the transistor 100 shown in FIG. 1 will be described with reference to FIGS. 7 to 10 are cross-sectional views illustrating a method for manufacturing the transistor 100. be.

[0143] Note that the films constituting the transistor 100 (the insulating film, the oxide semiconductor film, the conductive film, and the like) are Sputtering, Chemical Vapor Deposition (CVD), Vacuum Evaporation, Pulsed Laser Deposition (PLD) Alternatively, it can be formed by a coating method or a printing method. The most common deposition methods are sputtering and plasma enhanced chemical vapor deposition (PECVD). However, thermal CVD may also be used. An example of a thermal CVD method is MOCVD (metal organic chemical vapor deposition). Alternatively, a deposition (multilayer deposition) method or an atomic layer deposition (ALD) method may be used.

[0144] In the thermal CVD method, the pressure in the chamber is set to atmospheric pressure or reduced pressure, and the source gas and the oxidizing agent are simultaneously The reaction is carried out in the chamber near or on the substrate, where it is deposited on the substrate to form a film. As described above, the thermal CVD method is a film formation method that does not generate plasma. This has the advantage that defects are not generated due to damage.

[0145] In addition, in the ALD method, the pressure inside the chamber is set at atmospheric pressure or reduced pressure, and the source gas for the reaction is The gases are introduced into the chamber in sequence, and the film is formed by repeating the gas introduction sequence. For example, By switching each switching valve (also called high-speed valve), two or more types of raw materials can be The source gases are sequentially supplied to the chamber, and the first source gas is supplied to the chamber so that multiple source gases do not mix. Simultaneously with or after the second gas, an inert gas (such as argon or nitrogen) is introduced. Introduce the raw material gas. If an inert gas is introduced at the same time, the inert gas is used as a carrier gas. In addition, an inert gas may be introduced at the same time as the second source gas is introduced. Also, instead of introducing an inert gas, the first source gas is discharged by evacuation, and then the second source gas is introduced. The first source gas may be adsorbed on the surface of the substrate to form a first monoatomic layer. The second monoatomic layer is formed by reacting with the second source gas introduced later. Layer upon layer is laminated to form a thin film.

[0146] This gas introduction sequence is controlled and repeated several times until the desired thickness is achieved. The thickness of the thin film increases depending on the number of times the gas introduction sequence is repeated. This allows precise film thickness control, making it possible to fabricate minute transistors. It is suitable for fabrication.

[0147] First, the insulating film 108 (insulating film 108a and insulating film 108b) is formed on the substrate 102. (See Figure 7(A)).

[0148] The insulating film 108 can be formed by sputtering, CVD, vapor deposition, pulsed laser deposition ( The film can be formed by appropriately using a PLD method, a printing method, a coating method, or the like. For the insulating film 108a, a silicon nitride film is formed to a thickness of 100 nm using a PECVD apparatus. In addition, a silicon oxynitride film is formed as the insulating film 108b by using a PECVD apparatus. 0 nm is formed.

[0149] After the insulating film 108b is formed, oxygen may be added to the insulating film 108b. The oxygen added to 108b may be an oxygen radical, an oxygen atom, an oxygen atomic ion, or an oxygen molecule. The methods of addition include ion doping, ion implantation, plasma In addition, a film that suppresses oxygen desorption is formed on the insulating film, and then the insulating film is etched through the film. Oxygen may be added to the insulating film 108b.

[0150] In addition, the substrate placed in the evacuated processing chamber of the PECVD device was heated to 180°C or higher for 28 The temperature is kept at 0°C or lower, or at 200°C to 240°C or lower, and a raw material gas is introduced into the treatment chamber. The pressure inside the device is between 100 Pa and 250 Pa, or between 100 Pa and 200 Pa. The electrode in the treatment chamber is 0.17 W / cm 2 More than 0.5W / cm 2 Less than or equal to 0 .25W / cm 2 More than 0.35W / cm2 Heating was performed under the following high-frequency power supply conditions. A silicon oxide film or a silicon oxynitride film capable of releasing oxygen by treatment is used as an insulating film. 108b.

[0151] Here, a film for suppressing oxygen desorption is formed on the insulating film 108b, and then the insulating film is A method for adding oxygen to the insulating film 108b will now be described.

[0152] First, a film 141 for suppressing oxygen desorption is formed over the insulating film 108b (see FIG. 7B). see).

[0153] Next, oxygen 142 is added to the insulating film 108b through the film 141 (see FIG. 7C).

[0154] The film 141 for suppressing oxygen desorption is made of indium, zinc, gallium, tin, aluminum, etc. Aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, tungsten A metal element selected from the above, an alloy containing the above metal element, or a combination of the above metal elements. an alloy having the above-mentioned metal element, a metal nitride having the above-mentioned metal element, a metal oxide having the above-mentioned metal element, The insulating film 11 is formed using a conductive material such as a metal nitride oxide having the above-mentioned metal element.

[0155] The thickness of the film 141 for suppressing oxygen desorption is 1 nm or more and 20 nm or less, or 2 nm or more. It can be made 10 nm or less.

[0156] As a method for adding oxygen 142 to the insulating film 108b through the film 141, ion doping is used. The film 141 is provided on the insulating film 108b. By adding oxygen, the film 141 can suppress the desorption of oxygen from the insulating film 108b. This functions as a protective film, and therefore allows more oxygen to be added to the insulating film 108b. do.

[0157] In addition, when oxygen is introduced in plasma processing, the oxygen is excited by microwaves to produce high-density oxygen. By generating atomic plasma, the amount of oxygen introduced into the insulating film 108b can be increased. do.

[0158] After that, the film 141 is removed (see FIG. 7(D)).

[0159] The film 141 can be removed by, for example, wet etching and / or dry etching. In addition, the insulating film 108b is formed by adding sufficient oxygen after the film formation. In cases where it is possible, the oxygen addition process shown in FIG. 7(B) and FIG. 7(C) is not performed. It's okay.

[0160] Next, an oxide semiconductor film is formed over the insulating film 108b and then formed into a desired shape. The insulating film 108b and the oxide semiconductor film 110 are formed by processing the insulating film 108b and the oxide semiconductor film 110. An insulating film 112 is formed on the compound semiconductor film 110 (see FIG. 8(A)).

[0161] A method for forming the oxide semiconductor film 110 is described below. Tarring method, coating method, pulsed laser deposition method, laser ablation method, thermal CVD method, etc. Next, a mask is formed on the oxide semiconductor film by a lithography process. After forming a mask, part of the oxide semiconductor film is etched using the mask. As shown in FIG. 8(A), the oxide semiconductor film 110 can be formed. Note that after the oxide semiconductor film 110 is formed, heat treatment may be performed.

[0162] In addition, by using a printing method for the oxide semiconductor film 110, an oxide semiconductor film having element separation can be formed. The membrane 110 can be formed directly.

[0163] When an oxide semiconductor film is formed by a sputtering method, a power source for generating plasma The device may be an RF power supply device, an AC power supply device, a DC power supply device, or the like. CAAC-OS films can be formed by using an AC or DC power supply. It is also possible to form an oxide semiconductor film by sputtering using an RF power supply. In contrast, an oxide semiconductor film is formed by a sputtering method using an AC power supply or a DC power supply. It is preferable to form the film having a uniform thickness, composition, or crystallinity. stomach.

[0164] A sputtering gas for forming an oxide semiconductor film is a rare gas (typically, argon). ), oxygen, rare gas, and mixed gas of oxygen are used as appropriate. Note that the mixed gas of rare gas and oxygen In this case, it is preferable to increase the gas ratio of oxygen to the rare gas.

[0165] In addition, a sputtering target for forming an oxide semiconductor film is preferably a target material having an oxide It may be appropriately selected according to the composition of the semiconductor film.

[0166] Note that when the oxide semiconductor film is formed by, for example, a sputtering method, Temperature: 150℃ to 750℃, 150℃ to 450℃, or 200℃ An oxide semiconductor film is formed at a temperature of 350° C. or lower to form a CAAC-OS film. In addition, by setting the substrate temperature at 25° C. or higher and lower than 150° C., it is possible to form a microcrystalline oxide semiconductor. A conductive film can be formed.

[0167] In order to form a CAAC-OS film, which will be described later, it is preferable to apply the following conditions: It is.

[0168] By suppressing the inclusion of impurities during film formation, it is possible to prevent the crystal state from being destroyed by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the film formation chamber can be In addition, the impurity concentration in the deposition gas may be reduced. A deposition gas having a temperature of -80°C or lower or -100°C or lower is used.

[0169] In addition, by increasing the oxygen ratio in the deposition gas and optimizing the power, plasma damage during deposition is reduced. The oxygen ratio in the deposition gas is preferably 30% by volume or more, or 100% by volume or more. %.

[0170] In addition, after the oxide semiconductor film is formed, heat treatment is performed to dehydrogenate or The temperature of the heat treatment is typically 150° C. or higher and lower than the substrate distortion point. Or, the temperature is 250°C or higher and 450°C or lower, or 300°C or higher and 450°C or lower.

[0171] Heat treatment is carried out using rare gases such as helium, neon, argon, xenon, krypton, or The heating is performed in an inert gas atmosphere containing nitrogen, or after heating in an inert gas atmosphere, the heating is performed in an oxygen atmosphere. The inert atmosphere and oxygen atmosphere may be free of hydrogen, water, etc. The treatment time is preferably from 3 minutes to 24 hours.

[0172] The heat treatment can be performed using an electric furnace, an RTA device, or the like. Therefore, heat treatment can be performed at a temperature above the distortion point of the substrate for a short period of time. The processing time can be reduced.

[0173] The oxide semiconductor film is formed while being heated, and after the oxide semiconductor film is formed, By performing heat treatment, the oxide semiconductor film is The hydrogen concentration is 5×10 19 atoms / cm 3 or less, or 1×10 19 atoms / c m 3 Below, 5 x 10 18 atoms / cm 3 or less, or 1×10 18 atoms / cm 3 or less, or 5×10 17 atoms / cm 3 or less, or 1×10 16 atoms / cm 3 It can be as follows:

[0174] The deposition equipment using ALD can be used to form oxide semiconductor films, such as InGaZnO X (X>0) When forming a film, In(CH3)3 gas and O3 gas are introduced in sequence and repeatedly to form InO Then, Ga(CH3)3 gas and O3 gas are introduced simultaneously to form a GaO layer. Then, Zn(CH3)2 and O3 gas are introduced simultaneously to form a ZnO layer. The order of these layers is not limited to this example. Also, by mixing these gases, the InGaO2 layer InZnO2 layer, GaInO layer, ZnInO layer, GaZnO layer, etc. Alternatively, instead of O3 gas, H2O gas bubbled with an inert gas such as Ar may be used. However, it is preferable to use O3 gas that does not contain H. In(CH3) Instead of the gas In(C2H5)3, gas Ga(CH3)3 may be used. Alternatively, Ga(C2H5)3 gas may be used. Zn(CH3)2 gas may also be used. This is also fine.

[0175] In this embodiment, the oxide semiconductor film 110 is formed by a sputtering apparatus. The sputtering target was In-Ga-Zn metal oxide (In:Ga:Zn = 1:1:1.2 [atomic ratio]) to form a 50 nm-thick oxide semiconductor film. Heat treatment is performed to move oxygen contained in the insulating film 108b to the oxide semiconductor film. A mask is formed over the oxide semiconductor film, and part of the oxide semiconductor film is selectively etched. In this way, the oxide semiconductor film 110 is formed.

[0176] The heat treatment should be performed at a temperature between 350℃ and 650℃, or between 450℃ and 600℃. By doing this, the CAAC conversion rate described below can be reduced to 60% or more but less than 100%, or 80% or more but less than 100%. 00%, or between 90% and 100%, or between 95% and 98%. In addition, an oxide semiconductor film in which the content of hydrogen, water, and the like is reduced can be obtained. That is, an oxide semiconductor having a low impurity concentration and a low density of defect states can be obtained. A film can be formed.

[0177] The insulating film 112 can be formed by appropriately using the same method as for forming the insulating film 108b. As the method, a silicon oxide film or a silicon oxynitride film is formed by using a PECVD method. In this case, the source gas may be a deposition gas containing silicon and an oxidizing gas. Representative examples of deposition gases containing silicon include silane, disilane, etc. Examples of oxidizing gases include oxygen, ozone, and dioxygen. Nitrogen, nitrogen dioxide, etc.

[0178] In addition, the insulating film 112 is formed by mixing an oxidizing gas with a deposition gas that is 20 times or more and 100 times or less in thickness. 100 Pa or less, or 40 to 80 times the pressure in the treatment chamber. By using the PECVD method at 0 Pa or less, a silicon oxynitride film with few defects can be formed. It can be achieved.

[0179] The insulating film 112 is formed on a substrate placed in a vacuum-evacuated processing chamber of a PECVD apparatus. The plate is kept at 280°C or more and 400°C or less, and raw material gas is introduced into the treatment chamber to The pressure is set to 20 Pa or more and 250 Pa or less, and more preferably, 100 Pa or more and 250 Pa or less. By supplying high frequency power to an electrode provided in the processing chamber, the insulating film 112 is formed. A dense silicon oxide film or silicon oxynitride film can be formed.

[0180] The insulating film 112 may be formed by a plasma CVD method using microwaves. Microwaves refer to the frequency range from 300MHz to 300GHz. In the case of the electron beam, the electron temperature is low and the electron energy is small. A smaller proportion of the electrons are used to accelerate the molecules, and more are used to dissociate and ionize the molecules. It is possible to excite a high density plasma. The insulating film 112 is formed with less defects due to less plasma damage to the deposition surface and deposits. It is possible.

[0181] The insulating film 112 can be formed by a CVD method using an organic silane gas. The organic silane gases include ethyl silicate (TEOS: chemical formula Si(OC2H5)4), Tetramethylsilane (TMS: chemical formula Si(CH3)4), tetramethylcyclotetrasilane Octamethylcyclotetrasiloxane (TMCTS), Octamethylcyclotetrasiloxane (OMCTS), Hexa Methyldisilazane (HMDS), triethoxysilane (SiH(OC2H5)3), tri Silicon-containing compounds such as dimethylaminosilane (SiH(N(CH3)2)3) are used. By using the CVD method with organic silane gas, it is possible to obtain insulating films with high coating properties. A membrane 112 may be formed.

[0182] In addition, when a gallium oxide film is formed as the insulating film 112, MOCVD (Metal Organic Chemical Vapor Deposition (OCVD) method It can be achieved.

[0183] The insulating film 112 is formed by using a thermal CVD method such as an ALD method or an MOCVD method. In the case of forming a hafnium oxide film, a liquid containing a solvent and a hafnium precursor compound (e.g., hafnium alkoxides and hafnium alkoxides such as tetrakisdimethylamidohafnium (TDMAH) Two types of gases are used: vaporized fluorine (F3) and ozone (O3) as an oxidizer. The chemical formula for tetrakisdimethylamidohafnium is Hf[N(CH3)2 ]4. Another material liquid is tetrakis(ethylmethylamido)hafnium etc.

[0184] The insulating film 112 is formed by using a thermal CVD method such as an ALD method or an MOCVD method. In the case of forming an aluminum oxide film, a liquid containing a solvent and an aluminum precursor compound is The raw material gas (e.g. trimethylaluminum TMA) is vaporized, and H2O is used as an oxidizer. Two types of gas are used. The chemical formula for trimethylaluminum is Al(CH3)3. Other liquid materials include tris(dimethylamido)aluminum and triisobutyrate. Aluminum tris(2,2,6,6-tetramethyl-3,5-hepta) By forming the film using the ALD method, the coating rate is high and the film thickness is thin. It is possible to form a thin insulating film 112.

[0185] The insulating film 112 is formed by using a thermal CVD method such as an ALD method or an MOCVD method. In the case of forming a silicon oxide film, hexachlorodisilane is adsorbed on the surface to be formed. It removes chlorine from the clothes and supplies radicals of oxidizing gases (O2, nitrous oxide) React with the adsorbate.

[0186] Here, a PECVD apparatus is used to deposit a 100 nm thick oxide / nitride film as the insulating film 112. Form a recombinant membrane.

[0187] Next, the conductive film 113 (the conductive film 113a and the conductive film 113b) is formed on the insulating film 112. (See FIG. 8(B)).

[0188] The conductive film 113 can be formed by sputtering, vacuum deposition, pulsed laser deposition (PLD), or the like. The conductive film 1 can be formed by a method such as a thermal CVD method. As the substrate 13a, a tantalum nitride film is formed to a thickness of 30 nm using a sputtering device. As the conductive film 113b, a tungsten film is formed to a thickness of 150 nm using a sputtering device. When the conductive film 113a and the conductive film 113b are formed successively in a vacuum, the conductive film 10 This is preferable because it can suppress impurities at the interface between 6a and the conductive film 106b.

[0189] In addition, a tungsten film is formed as the conductive film 113b by a film forming apparatus using ALD. In this case, WF6 gas and B2H6 gas are repeatedly introduced in sequence to obtain the initial A tungsten film is formed, and then WF6 gas and H2 gas are introduced simultaneously to form the tungsten A film is formed. Note that SiH4 gas may be used instead of B2H6 gas.

[0190] Next, a mask 145 is formed on the conductive film 113b by a lithography process, and then the conductive film 113b, the conductive film 113a, and part of the insulating film 112 are etched (see FIG. 8C). ).

[0191] The conductive film 113 and the insulating film 112 are etched by wet etching and / or Alternatively, a dry etching method can be appropriately used.

[0192] Note that in the etching process of the conductive film 113 and the insulating film 112, at least an oxide A part of the conductive film 110 is exposed. Note that the region where the part of the oxide semiconductor film 110 is exposed is The conductive film 114 and the insulating film 112 are etched, and the oxide film overlapping the conductive film 114 is removed. The thickness of the conductive film 113 and the insulating film 112 may be thinner than that of the semiconductor film 110. In the etching step, the oxide semiconductor film 11 0, a part of the exposed region is removed, and the thickness of the region overlapping with the oxide semiconductor film 110 is reduced. may also become thinner.

[0193] Next, an impurity element 1 is introduced from above the insulating film 108b, the oxide semiconductor film 110, and the mask 145. Add 43 (see FIG. 8(D)).

[0194] In the step of adding the impurity element 143, the conductive film 114 and the mask 145 are The impurity element 143 is added to the oxide semiconductor film 110. As a result, oxygen vacancies are formed in the oxide semiconductor film 110. In the process, the conductive film 114 and the insulating film 108b are formed with the oxide semiconductor film 110 interposed therebetween. A region having a large amount of the impurity element is formed in the region not overlapping with the film 112 .

[0195] The impurity element 143 can be added by ion doping, ion implantation, plasma In the case of plasma treatment, the plasma is heated in a gas atmosphere containing the impurity element to be added. Impurity elements can be added by generating a plasma and performing a plasma treatment. The plasma generating device may be a dry etching device, an ashing device, A plasma CVD apparatus, a high density plasma CVD apparatus, or the like can be used.

[0196] The source gas for the impurity element 143 is B2H6, PH3, CH4, N2, NH3 , AlH3, AlCl3, SiH4, Si2H6, F2, HF, H2 and one or more of the rare gases Alternatively, B2H6, PH3, N2, NH3, diluted with rare gases, One or more of AlH3, AlCl3, F2, HF, and H2 can be used. Diluted B2H6, PH3, N2, NH3, AlH3, AlCl3, F2, HF, and The impurity element 143 is added to the oxide semiconductor film 110 using one or more of H and and one or more of hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, and chlorine simultaneously. The compound semiconductor film 110 and the insulating film 108b can be doped with the above-mentioned hydrogen.

[0197] Alternatively, a rare gas is added to the oxide semiconductor film 110 and the insulating film 108b, and then B2H6, PH3, CH4, N2, NH3, AlH3, AlCl3, SiH4, Si2H6, F2, One or more of HF and H 2 may be added to the oxide semiconductor film 110 and the insulating film 108b.

[0198] Or B2H6, PH3, CH4, N2, NH3, AlH3, AlCl3, SiH4 , Si2H6, F2, HF, and H2 are added to the oxide semiconductor film 110 and the insulating film 108. After the rare gas is added to the oxide semiconductor film 110 and the insulating film 108b, the rare gas may be added to the oxide semiconductor film 110 and the insulating film 108b.

[0199] The addition of the impurity element 143 is controlled by appropriately setting implantation conditions such as acceleration voltage and dose amount. For example, when argon is added by ion implantation, the acceleration voltage is set to 10 kV or more. 00kV or less, dose amount is 1×10 13 ions / cm 2 More than 1×10 16 ions / c m 2 For example, 1×10 14 ions / cm 2 Also, When phosphorus ions are added by the on-implantation method, the acceleration voltage is 30 kV and the dose is 1×10 13 ions / cm 2 5×10 or more 16 ions / cm 2 For example, 1×1 0 15 ions / cm 2 This can be done as follows.

[0200] In addition, argon is added as the impurity element 143 using a dry etching apparatus. In this case, the substrate is placed on the cathode side of the parallel plate so that a bias is applied to the substrate side. RF power may be supplied, for example, at a power density of 0.1 W / cm. 2 More than 2W / cm 2 The following would suffice.

[0201] As shown in this embodiment, the impurity element 143 is removed while the mask 145 is left. It is preferable to perform the doping with the impurity element 143 while leaving the mask 145. As a result, it is possible to prevent the constituent elements of the conductive film 114 from adhering to the side walls of the insulating film 112. However, the method of adding the impurity element 143 is not limited to this. For example, After the removal, the impurity element 143 may be added using the conductive film 114 as a mask.

[0202] After that, heat treatment is performed to remove the impurity element 143 from the region of the oxide semiconductor film 110 to which the impurity element 143 has been added. The temperature of the heat treatment is typically 150° C. or higher. Less than the plate distortion point, or 250°C to 450°C, or 300°C to 450°C. do.

[0203] Next, the mask 145 is removed. Note that the oxide semiconductor film 110 does not contain the impurity element 143. By adding, a channel region 110a overlapping the conductive film 114 and the insulating film 112 and a channel region 110b overlapping the conductive film 114 and the insulating film 112 are formed. A pair of low resistance regions 110b and 110c are formed, sandwiching the low resistance region 110a (see FIG. 9(A)). Although not shown, a low resistance is formed on the insulating film 108b in contact with the low resistance regions 110b and 110c. An impurity element 143 is added through the resistive regions 110b and 110c.

[0204] Next, the insulating film 118 is formed over the insulating film 108b, the oxide semiconductor film 110, and the conductive film 114. Then, an insulating film 120 is formed over the insulating film 118 (see FIG. 9B).

[0205] The insulating film 118 and the insulating film 120 are formed by the method of forming the insulating film 108a and the insulating film 108b. It can be formed by taking into consideration the law.

[0206] In this embodiment, the insulating film 118 is formed by depositing silicon nitride using a PECVD apparatus. A 100 nm thick silicon film is formed. The insulating film 120 is formed by oxidizing the silicon film using a PECVD apparatus. A silicon nitride film is formed to a thickness of 300 nm.

[0207] By using a silicon nitride film as the insulating film 118, hydrogen in the silicon nitride film is oxidized. The oxide semiconductor film 110, more specifically, the oxide semiconductor film 110 that is in contact with the insulating film 118. In effect, it is possible to further improve the carrier concentration in the low resistance regions 110b and 110c. do.

[0208] Next, a mask is formed on the insulating film 120 by a lithography process, and then the insulating film 120 and 1 and a part of the insulating film 118 is etched to form an opening 140a reaching the oxide semiconductor film 110. , 140b are formed (see FIG. 9(C)).

[0209] The method for etching the insulating film 120 and the insulating film 118 is a wet etching method and / or Alternatively, a dry etching method can be appropriately used.

[0210] Next, a conductive film 122 is formed on the insulating film 120 so as to cover the openings 140a and 140b. (See FIG. 9(D)).

[0211] The conductive film 122 can be formed by using the method for forming the conductive film 113 as appropriate. The conductive film 121a is a tungsten film having a thickness of 50 nm. The conductive film 121b is formed to a thickness of 200 nm using a sputtering device. A copper film having a thickness of m is formed.

[0212] Next, a mask is formed over the conductive film 122 by a lithography process. A part of the film is etched to form conductive films 122a and 122b (see FIG. 10A).

[0213] Next, an insulating film 128 is formed on the insulating film 120 and the conductive films 122a and 122b (FIG. 10(B)).

[0214] The insulating film 128 can be formed by taking into consideration the method for forming the insulating film 108a. Here, the insulating film 128 is a 200 nm thick nitride film formed by using a PECVD apparatus. A silicon film is formed.

[0215] Through the above steps, the transistor 100 can be manufactured.

[0216] <Method 2 for manufacturing semiconductor device> Next, an example of a method for manufacturing the transistor 100A shown in FIG. 5 will be described below.

[0217] First, an insulating film 104 is formed on a substrate 102. Next, a conductive film is formed on the insulating film 104. The conductive film is processed into a desired shape to form the conductive film 106. A PECVD device is used to form a silicon nitride film with a thickness of 100 nm. As the film 106, a tungsten film having a thickness of 200 nm is formed using a sputtering device. Next, the same steps as those shown in Figs. 7(A) to (D) and Fig. 8(A) are carried out. After that, a mask is formed on the insulating film 112 by a lithography process, and then a portion of the insulating film 112 is The portion is etched to form an opening 139 reaching the conductive film 106. In this case, the transistor 1 shown in FIG. 5 can be obtained by carrying out the same steps as those shown in FIG. 8(B) and subsequent steps. 00A can be created.

[0218] The structures and methods described in this embodiment mode may be appropriately combined with the structures and methods described in other embodiment modes. They can be used in combination.

[0219] (Embodiment 2) In this embodiment, a structure of an oxide semiconductor included in a semiconductor device of one embodiment of the present invention will be described. A detailed explanation is provided below.

[0220] First, the structure of an oxide semiconductor film will be described below.

[0221] Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor, polycrystalline oxide Semiconductor, nc-OS (nanocrystalline oxide semiconductor uctor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous l Examples include amorphous oxide semiconductors, amorphous oxide semiconductors, etc.

[0222] From another point of view, the oxide semiconductor is classified into an amorphous oxide semiconductor and a crystalline oxide semiconductor. Crystalline oxide semiconductors are classified into single crystal oxide semiconductors, CAAC- These include OS, polycrystalline oxide semiconductor, and nc-OS.

[0223] The definition of an amorphous structure is generally that it is not fixed in a metastable state and is isotropic. It is known that the bond angle is flexible and the bond length is short. In other words, it is a structure that has discrete order but does not have long-range order.

[0224] On the other hand, in the case of an essentially stable oxide semiconductor, In addition, it cannot be called an oxide semiconductor because it is not isotropic. The oxide semiconductor, which is not amorphous (for example, has a periodic structure in a microscopic region), is transformed into a completely amorphous oxide. However, a-like OS is a semiconductor that can be used in a small area. Although it has a periodic structure, it has voids and is an unstable structure. In terms of physical properties, it can be said that the semiconductor is close to an amorphous oxide semiconductor.

[0225] <caac-os> First, let me explain about CAAC-OS.

[0226] CAAC-OS is an oxide that has multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0227] Transmission Electron Microscope (TEM) A combined analysis image (high resolution) of the bright-field image and diffraction pattern of CAAC-OS was obtained by using a microscope. When observing a high-resolution TEM image, multiple pellets can be confirmed. On the other hand, in high-resolution TEM images, the boundaries between pellets, i.e., grain boundaries, are clearly visible. Therefore, it is difficult to clearly confirm the presence of the CAAC-OS at the grain boundaries. It can be said that the decrease in electron mobility caused by the above phenomenon is unlikely to occur.

[0228] The CAAC-OS observed by TEM is described below. 1 shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction approximately parallel to the sample surface. For high-resolution TEM imaging, spherical aberration correction is required. The spherical aberration corrector function was used. , specifically called a Cs-corrected high-resolution TEM image. Cs-corrected high-resolution TEM images are obtained, for example, This is performed using an atomic resolution analytical electron microscope such as the JEM-ARM200F manufactured by JEOL Ltd. It is possible.

[0229] A Cs-corrected high-resolution TEM image of the enlarged area (1) in Figure 11(A) is shown in Figure 11(B). From FIG. 11(B), it can be confirmed that the metal atoms are arranged in layers in the pellet. The arrangement of each metal atom layer is determined by the surface on which the CAAC-OS film is to be formed (also called the surface on which the film is to be formed). Or it reflects the unevenness of the top surface and is parallel to the surface on which the CAAC-OS is formed or the top surface.

[0230] As shown in FIG. 11(B), CAAC-OS has a characteristic atomic arrangement. ) shows the characteristic atomic arrangement with auxiliary lines. ) the size of each pellet is about 1 nm to 3 nm, and the size of each pellet is about 1 nm to 3 nm. It can be seen that the size of the gap caused by the inclination is about 0.8 nm. The pellets can also be called nanocrystals (nc). AAC-OS, CANC(C-Axis Aligned nanocrystals) ) can also be referred to as an oxide semiconductor.

[0231] Here, based on the Cs-corrected high-resolution TEM image, the pellets of CAAC-OS on the substrate 5120 were The layout of the 5100 is shown diagrammatically as a stack of bricks or blocks. (See FIG. 11(D)). Between the pellets observed in FIG. 11(C), The portion where the inclination occurs corresponds to the region 5161 shown in FIG.

[0232] FIG. 12(A) shows the C The s-corrected high-resolution TEM images are shown for regions (1), (2) and (3) in FIG. ) are enlarged Cs-corrected high-resolution TEM images shown in Fig. 12(B), (C) and (D), respectively. As shown in Fig. 12(D), Fig. 12(B), Fig. 12(C) and Fig. 12(D) show that the pellet It can be seen that the metal atoms are arranged in a triangular, quadrangular or hexagonal shape. However, no regularity is observed in the arrangement of metal atoms among different pellets.

[0233] Next, C was analyzed by X-ray diffraction (XRD). We will explain AAC-OS. For example, CAAC-O with InGaZnO4 crystals When the structure of S is analyzed using the out-of-plane method, the result is as shown in Figure 13(A). As shown in the figure, a peak may appear at a diffraction angle (2θ) of around 31°. Since this is attributed to the (009) plane of the ZnO4 crystal, it is believed that the CAAC-OS crystal has a c-axis orientation. It can be seen that the crystal has a c-axis oriented in a direction substantially perpendicular to the surface on which the crystal is formed or to the upper surface.

[0234] In addition, in the out-of-plane structural analysis of CAAC-OS, 2θ is 31 In addition to the peaks around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks in the vicinity indicate that some of the CAAC-OS contains crystals that do not have the c-axis orientation. The more preferable CAAC-OS is a structure obtained by the out-of-plane method. The analysis shows a peak at 2θ around 31° and no peak at 2θ around 36°.

[0235] On the other hand, in-pla, X-rays are incident on CAAC-OS from a direction nearly perpendicular to the c-axis. When the structure is analyzed by the NE method, a peak appears at 2θ of about 56°. This peak is I It is attributed to the (110) plane of the crystal of nGaZnO4. In the case of CAAC-OS, 2θ is set to 5 The sample was fixed at approximately 6° and analyzed while rotating around the normal vector of the sample surface (φ axis). Even if a φ scan is performed, no clear peak appears as shown in FIG. 13(B). On the other hand, in the case of a single crystal oxide semiconductor such as InGaZnO4, 2θ is fixed at around 56° and φ When scanned, it is assigned to a crystal plane equivalent to the (110) plane, as shown in Figure 13(C). Six peaks are observed. Therefore, from the structural analysis using XRD, CAAC-OS It can be seen that the orientation of the a-axis and the b-axis is irregular.

[0236] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with ZnO4 crystals, a probe diameter of 300 nm was used parallel to the sample surface. When an electron beam is incident on the sample, a diffraction pattern (selected area transmission electron diffraction) as shown in FIG. This diffraction pattern may appear due to the InGaZnO4 The spots due to the (009) plane of the crystal are included. Therefore, even by electron diffraction, The pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis faces the surface to be formed or the upper surface. On the other hand, when the probe was applied perpendicular to the sample surface, The diffraction pattern when an electron beam with a diameter of 300 nm was incident is shown in FIG. 4(B), a ring-shaped diffraction pattern is observed. Therefore, electron diffraction also It can be seen that the a-axis and b-axis of the pellets contained in CAAC-OS do not have any orientation. In addition, the first ring in FIG. 14(B) is the (010) plane of the InGaZnO4 crystal. This is thought to be due to the (100) plane and the like. This is thought to be due to the (110) surface, etc.

[0237] As described above, the CAAC-OS is an oxide semiconductor with high crystallinity. Crystallinity can be reduced by the inclusion of impurities or the generation of defects, so the opposite view can be taken. Therefore, CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies).

[0238] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon have a higher acidity than metal elements that constitute oxide semiconductors. Elements with strong bonds to oxygen remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0239] When an oxide semiconductor has impurities or defects, its characteristics may change due to light, heat, etc. For example, impurities contained in oxide semiconductors can act as carrier traps or In addition, oxygen vacancies in oxide semiconductors can act as carrier traps and In some cases, the SiO 2 can become a carrier generation source by capturing hydrogen.

[0240] CAAC-OS, which has few impurities and oxygen vacancies, is an oxide semiconductor with low carrier density. There is. Specifically, 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 less than, More preferably, 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 More than 100 Such an oxide semiconductor can be a high-purity intrinsic or The CAAC-OS is essentially a high-purity intrinsic oxide semiconductor. In other words, it can be said that the oxide semiconductor has stable characteristics.

[0241] <nc-os> Next, we will explain nc-OS.

[0242] In the high-resolution TEM image, the nc-OS is divided into two regions: one where the crystals can be confirmed, and the other where the clear The crystalline parts in nc-OS are In most cases, the size is between 1 nm and 10 nm, or between 1 nm and 3 nm. An oxide semiconductor having a crystal size of 10 nm or more and 100 nm or less is called a microcrystalline oxide. For example, in high-resolution TEM images, nc-OS shows grain boundaries. In some cases, the nanocrystals are not clearly visible in the pellets of CAAC-OS. Therefore, in the following, the crystalline part of nc-OS is referred to as the pellet. There is a chance to call.

[0243] nc-OS is a material that is used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially regions between 1 nm and The atomic arrangement has periodicity in the region of 3 nm or less. There is no regularity in the crystal orientation between the layers. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. For example, the nc-OS may be a pellet with a larger diameter than the pellet. When X-rays are used, the peaks that indicate the crystal planes are In addition, for nc-OS, the probe diameter is larger than the pellet (e.g., 50 When electron diffraction is performed using an electron beam of 1 nm or more, a halo-like diffraction pattern is produced. On the other hand, for nc-OS, pellets with sizes close to or smaller than the pellets were observed. When nanobeam electron diffraction is performed using an electron beam with a lobe diameter, spots are observed. When nanobeam electron diffraction was performed on nc-OS, high brightness regions were observed in a circular (ring-like) pattern. In addition, multiple spots may be observed within a ring-shaped area. There may be cases where this occurs.

[0244] In this way, the crystal orientation between the pellets (nanocrystals) is not regular, so nc -OS with RANC (Random Aligned nanocrystals) The oxide semiconductor or NANC (Non-Aligned Nanocrystal The semiconductor may also be referred to as an oxide semiconductor having a structure including a metal oxide layer.

[0245] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the a-like OS and amorphous oxide semiconductors. However, the crystal orientation of nc-OS is not regular among different pellets. Therefore, the nc-OS has a higher density of defect states than the CAAC-OS.

[0246] <a-like OS> The a-like OS is an oxide semiconductor that has a structure between the nc-OS and the amorphous oxide semiconductor. It is a semiconductor.

[0247] In a-like OS, pores may be observed in high-resolution TEM images. In the high-resolution TEM image, there are areas where crystals can be clearly seen, and areas where crystals can be seen. and areas where it is not possible to

[0248] Because of the porosity, the a-like OS has an unstable structure. e OS has an unstable structure compared with CAAC-OS and nc-OS. This shows the change in structure due to electron irradiation.

[0249] The samples to be irradiated with electrons were a-like OS (referred to as sample A), nc-OS (hereinafter referred to as sample B) and CAAC-OS (hereinafter referred to as sample C) are prepared. Both samples are In-Ga-Zn oxides.

[0250] First, high-resolution cross-sectional TEM images of each sample are obtained. It can be seen that all the materials have crystalline parts.

[0251] The determination of which part is regarded as one crystal part can be made as follows. For example, The unit cell of the InGaZnO4 crystal has three In-O layers and one Ga-Zn-O layer. It is known that the structure has a total of nine layers, six of which are layered in the c-axis direction. The spacing between these adjacent layers is approximately the same as the lattice spacing (also called the d value) of the (009) plane. The value is calculated to be 0.29 nm from crystal structure analysis. The areas where the spacing between the crystals is 0.28 nm to 0.30 nm are considered to be crystal parts of InGaZnO4. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal.

[0252] Figure 39 shows an example of investigating the average size of the crystal parts (22 to 45 places) of each sample. However, the length of the lattice fringes is the size of the crystal part. It can be seen that the crystalline part of the ke OS grows in size according to the cumulative dose of electron irradiation. Specifically, as shown by (1) in Figure 39, the initial TEM observation showed a size of about 1.2 nm. The crystal part (also called the initial nucleus), which was 4.2×10 8 e - / n m 2 On the other hand, in the nc-O For S and CAAC-OS, the cumulative electron dose from the start of electron irradiation was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystals within the range of As shown in (2) and (3) in Fig. 39, the nc-OS and The sizes of the crystal parts of the CAAC-OS and CAAC-OS are approximately 1.4 nm and 2.1 nm, respectively. It can be seen that.

[0253] Thus, in a-like OS, the growth of crystals can be observed by electron irradiation. On the other hand, in the case of nc-OS and CAAC-OS, the growth of the crystals due to electron irradiation is almost nonexistent. In other words, a-like OS is not seen as a nc-OS or CAAC-OS. It is clear that it has an unstable structure compared to the OS.

[0254] In addition, because of the porosity, a-like OS is more difficult to treat than nc-OS and CAAC-OS. Specifically, the density of the a-like OS is The density of the nc-OS and the CAA The density of C-OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a crystal density of less than 78%.

[0255] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of single crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 It becomes. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0g / cm 3 More than 5.9g / cm 3 It will be less than. For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, , the density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0256] In some cases, single crystals of the same composition do not exist. In such cases, crystals of different compositions may be used in any ratio. By combining single crystals of the desired composition, the density equivalent to that of a single crystal of the desired composition can be estimated. The density corresponding to a single crystal of a desired composition can be obtained by combining single crystals of different compositions. The density should be as low as possible. It is preferable to estimate the size of the single crystal by combining different types of single crystals.

[0257] As described above, oxide semiconductors have various structures and each structure has various characteristics. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, or an nc-OS. The film may be a laminated film having two or more of the CAAC-OS and CAAC-OS.

[0258] <Film formation model> The following describes the film formation models of CAAC-OS and nc-OS.

[0259] FIG. 15A shows a process of forming a CAAC-OS film by a sputtering method. FIG. 1 is a schematic diagram of the inside of a membrane chamber.

[0260] The target 1130 is glued onto the backing plate. A plurality of magnets are disposed under the backing plate. A magnetic field is generated above the target 1130 by the magnet. A sputtering method that increases the film deposition rate is called magnetron sputtering.

[0261] The target 1130 has a polycrystalline structure, with each grain containing a cleavage plane. The cleavage plane will be described in detail later.

[0262] The substrate 1120 is disposed so as to face the target 1130, and the distance therebetween is d( The target-substrate distance (TS distance) is preferably 0.01 m or more and 1 m or less. The thickness of the deposition chamber is 0.02m or more and 0.5m or less. Most of the deposition gas (e.g., oxygen, argon, or a mixture containing 50% or more by volume of oxygen) and 0. The pressure is controlled to be 0.1 Pa or more and 100 Pa or less, preferably 0.1 Pa or more and 10 Pa or less. By applying a voltage of a certain level or more to the target 1130, a discharge is initiated, and a plasma is generated. It is confirmed that a high density plasma region is formed by the magnetic field on the target 1130. In the high-density plasma region, the deposition gas is ionized, generating ions 1101. The ions 1101 are, for example, positive oxygen ions (O + ) and argon cations (Ar + ) etc.

[0263] The ions 1101 are accelerated toward the target 1130 by the electric field, and eventually reach the target At this time, the sputtered particles are either flat or pellet-shaped. The pellets 1100a and 1100b are separated and knocked out. The ion 1101 impacts the pellet 1100a and the pellet 1100b, forming a structure. Distortion may occur.

[0264] The pellet 1100a is a flat plate or pellet having a triangular, for example equilateral, plane. The pellet 1100b is a sputtered particle having a hexagonal shape, for example, a regular hexagonal plane. The pellets 1100a and 1100b are sputtered particles having a plate-like or pellet-like shape. The term pellets refers to flat or pellet-shaped sputter particles such as pellet 1100b. The planar shape of the pellet 1100 is not limited to a triangle or a hexagon, but may be any shape, e.g. For example, the shape may be a combination of 2 to 6 triangles. In some cases, two squares (triangles) may be joined together to form a quadrilateral (rhombus).

[0265] The thickness of the pellet 1100 is determined according to the type of deposition gas. The reason will be described later. It is preferable that the thickness of the pellet 1100 is uniform. A pellet shape with no gaps is preferable to a thick cube shape.

[0266] The pellet 1100 receives a charge as it passes through the plasma, causing the sides to become negative or The pellet 1100 has oxygen atoms on its side, and the oxygen atoms For example, the pellet 1100a may have negatively charged oxygen atoms on its side. An example of a ferroelectric capacitor with a ferroelectric element is shown in Figure 17. In this way, the sides are charged with the same polarity, The charges repel each other, allowing the plate-like shape to be maintained. When the OS is an In-Ga-Zn oxide, the oxygen atom bonded to the indium atom is negatively charged. It may become electrically charged or may bond with indium, gallium and zinc atoms. The oxygen atom may become negatively charged.

[0267] As shown in FIG. 15(A), for example, a pellet 1100 flies like a kite through the plasma. The pellet 1100 flies and flutters up onto the substrate 1120. Therefore, when an area where other pellets 1100 are already deposited approaches, a repulsive force is generated. Here, a magnetic field parallel to the upper surface of the substrate 1120 is generated on the upper surface of the substrate 1120. In addition, since a potential difference is applied between the substrate 1120 and the target 1130, A current flows from the substrate 1120 to the target 1130. The substrate 1100 is a substrate that is formed on the upper surface of the substrate 1120 by the action of a magnetic field and a current. This can be explained by Fleming's left-hand rule. In order to increase the force applied to the pellet 1100, the upper surface of the substrate 1120 is In the plane, the magnetic field parallel to the upper surface of the substrate 1120 is 10 G or more, preferably 20 G or more. It is preferable to provide a region where the resistance is 30 G or more, and more preferably 50 G or more. Alternatively, a magnetic field parallel to the upper surface of the substrate 1120 may be applied to the substrate 1120. The magnetic field perpendicular to the upper surface of the plate 1120 is at least 1.5 times, preferably at least 2 times, more preferably It is advisable to provide a region where the difference is three times or more, and more preferably five times or more.

[0268] In addition, the substrate 1120 is heated, and friction between the pellet 1100 and the substrate 1120 occurs. As a result, as shown in FIG. 19(A), the pellet The pellet 1100 glides over the upper surface of the substrate 1120. The movement of the pellet 1100 is as follows: This occurs with the flat surface facing the substrate 1120. Then, as shown in FIG. 19(B), When the pellets reach the side of the other pellets 1100 piled up on the surface, the sides of the pellets join together. At this time, oxygen atoms on the side of the pellet 1100 are released. In some cases, oxygen vacancies in the CAAC-OS are filled, resulting in a CAAC-OS with a low defect level density. It becomes the OS.

[0269] In addition, when the pellet 1100 is heated on the substrate 1120, the atoms are rearranged, The structural distortion caused by the collision of the ions 1101 is relieved. Pellet 1100 becomes almost a single crystal. Pellet 1100 becomes almost a single crystal. Even if the pellets 1100 are heated after bonding, the pellets 1100 themselves hardly expand or contract. Therefore, the gaps between the pellets 1100 are widened, and the grain boundaries and other Defects do not form and crevasses do not form. In addition, the gaps are filled with elastic metal atoms, etc. The pellets are laid out in a grid, and the sides of the 1100 pellets are connected like a highway. It is thought that this is the case.

[0270] Based on the above model, it is assumed that the pellet 1100 is deposited on the substrate 1120. Therefore, unlike epitaxial growth, if the surface on which the film is formed does not have a crystal structure, For example, it is possible to form a CAAC-OS film even when the substrate is 1120. Even if the structure of the top surface (the surface to be formed) is amorphous, it is possible to form a CAAC-OS film. It is Noh.

[0271] In addition, the CAAC-OS is not only applicable to a flat surface, but also to the substrate 1120 on which the formation is to be performed. Even if the top surface is uneven, the pellets 1100 are aligned along the shape of the surface. For example, if the top surface of the substrate 1120 is atomically flat, the pellet 1100 will have an ab plane. The plates are arranged side by side with their parallel flat surfaces facing downwards, resulting in a uniform thickness, flatness, and high crystallinity. Then, by stacking the layers n times (n is a natural number), a layer having C AAC-OS can be obtained (see FIG. 15(B)).

[0272] On the other hand, even if the upper surface of the substrate 1120 has unevenness, the CAAC-OS can be easily formed by the pellet 11 The structure is made up of n layers (n is a natural number) of 00 arranged side by side along the convex surface. Since the pellet 120 has unevenness, gaps tend to occur between the pellets 1100 in the CAAC-OS. However, intermolecular forces act between the pellets 1100, so even if there are irregularities, the pellets Therefore, even if there are irregularities, high crystallinity is achieved. The CAAC-OS may have the above configuration (see FIG. 15C).

[0273] Therefore, CAAC-OS does not require laser crystallization and can be used on large-area glass substrates. Even if the thickness is small, a uniform film can be formed.

[0274] Since the CAAC-OS film is formed by such a model, the sputtered particles are distributed evenly throughout the film. It is preferable that the sputtered particles are in the form of thick pellets. In this case, the surface facing the substrate 1120 is not uniform, and the thickness and crystal orientation cannot be made uniform. There is.

[0275] The film formation model shown above shows that a highly crystalline film can be formed even on a substrate surface having an amorphous structure. Thus, a CAAC-OS having the above properties can be obtained.

[0276] In addition to the pellet 1100, CAAC-OS also has a coating model with zinc oxide particles. This can also be explained by:

[0277] The zinc oxide particles have a smaller mass than the pellet 1100 and therefore reach the substrate 1120 first. On the upper surface of the substrate 1120, zinc oxide grains grow preferentially in the horizontal direction. A thin zinc oxide layer is formed by this. The zinc oxide layer has a c-axis orientation. The c-axis of the crystal of the zinc layer is parallel to the normal vector of the substrate 1120. The CAAC-OS was grown on a SiO2 substrate, which acts as a seed layer for growing the CAAC-OS. It has a function of increasing crystallinity. The zinc oxide layer has a thickness of 0.1 nm to 5 nm. The zinc oxide layer is thin enough that it barely covers the grain boundaries. It is difficult to confirm.

[0278] Therefore, in order to form a CAAC-OS film with high crystallinity, the composition should be more favorable than the stoichiometric composition. It is preferred to use a target containing a high percentage of zinc.

[0279] Similarly, the nc-OS can be understood by the deposition model shown in FIG. The only difference between FIG. 16 and FIG. 15(A) is whether or not the substrate 1120 is heated.

[0280] Therefore, the substrate 1120 is not heated, and the pellet 1100 and the substrate 1120 As a result, the pellet 1100 is pulled toward the substrate 1. Since it cannot glide across the top of the 120, it falls and accumulates irregularly. This allows you to obtain the nc-OS.

[0281] <cleavage plane> Below, we explain the cleavage plane of the target described in the CAAC-OS deposition model. Reveal.

[0282] First, the cleavage plane of the target will be explained with reference to FIG. 20. The crystal structure of nO4 is shown in Fig. 20(A). Note that the c-axis is oriented upward and parallel to the b-axis. The structure of the InGaZnO4 crystal is shown when observed from the c direction. The structure of an InGaZnO4 crystal observed from a direction parallel to the axis is shown.

[0283] The energy required for cleavage on each crystal plane of an InGaZnO4 crystal was calculated using first-principles calculations. The calculation is performed using pseudopotentials and density functionals using a plane wave basis. The pseudopotential used is the ultrasoft type pseudopotential. The potential is used. The functional is GGA PBE. The cutoff is The energy is set to 400 eV.

[0284] The energy of the initial structure was derived after structural optimization including the cell size. In addition, the energy of the structure after cleavage on each plane is expressed as the atomic ratio with the cell size fixed. It is derived after performing structural optimization of the arrangement.

[0285] Based on the crystal structure of InGaZnO4 shown in Figure 20, the first plane, the second plane, and the third plane A structure cleaved at either the first or fourth plane was created, and the cell size was fixed and structural optimization calculations were performed. Here, the first plane is a crystal plane between the Ga-Zn-O layer and the In-O layer, ( The second plane is a crystal plane parallel to the (001) plane (or ab plane) (see Figure 20(A)). , the crystal plane between the Ga-Zn-O layer and the Ga-Zn-O layer, and the (001) plane (or a The third plane is parallel to the (110) plane (see Figure 20(A)). (See Figure 20(B)). The fourth plane is the (100) plane (or the bc plane). The crystal planes are parallel (see Figure 20(B)).

[0286] Under the above conditions, the energy of the structure after cleavage on each plane is calculated. The difference between the energy of the structure and the energy of the initial structure is divided by the area of ​​the cleavage plane. The cleavage energy, which is a measure of the ease of cleavage on each plane, is calculated. Energy is the kinetic energy of the electrons and the interatomic and atomic energies of the atoms and electrons contained in the structure. This energy takes into account interactions between electrons and between electrons.

[0287] The calculation results show that the cleavage energy of the first face is 2.60 J / m 2 , the cleavage energy of the second face -0.68J / m 2 , the cleavage energy of the third face is 2.18 J / m 2 , cleavage of the fourth plane Energy is 2.12J / m 2 It was found that (see Table 1).

[0288] [Table 1]

[0289] From this calculation, in the crystal structure of InGaZnO4 shown in Figure 20, The cleavage energy is the lowest at the Ga-Zn-O layer and the Ga-Zn-O layer. It can be seen that the plane (cleavage plane) between the two is the easiest to cleave. When referred to as a cleavage plane, it refers to the second plane, which is the plane that is most likely to cleave.

[0290] Since the cleavage plane is on the second plane between the Ga-Zn-O layers, The InGaZnO4 crystal shown in 20(A) is separated by a plane equivalent to the two second planes. Therefore, when ions or the like are bombarded with a target, the highest cleavage energy is obtained. The wafer-like units (which we call pellets) cleaved from the lower surface of the ghee are the best. It is thought that the InGaZnO4 pellets will fly out in small units. The result is three layers: a Ga-Zn-O layer, an In-O layer, and a Ga-Zn-O layer.

[0291] The first plane (a crystal plane between the Ga-Zn-O layer and the In-O layer, which is the (001) plane) (or ab-plane)), the third plane (a crystal plane parallel to the (110) plane), the The cleavage energy of the fourth plane (a crystal plane parallel to the (100) plane (or the bc plane)) is low. This suggests that the planar shape of the pellets is often triangular or hexagonal.

[0292] Next, classical molecular dynamics calculations were performed to determine the homologous structure of the target InGa Assuming a ZnO4 crystal, the target is sintered with argon (Ar) or oxygen (O). The cleavage plane of the InGaZnO4 crystal (26 The cross-sectional structure of the 88-atom GaN crystal is shown in FIG. 21(A), and the top view structure is shown in FIG. 21(B). The fixed layer shown in (A) is a layer in which the arrangement of atoms is fixed so that the positions do not fluctuate. The temperature control layer shown in 21(A) is a layer that is always kept at a constant temperature (300K).

[0293] For classical molecular dynamics calculations, Fujitsu Ltd.'s Materials Explorer 5 was used. The initial temperature is 300K, the cell size is constant, and the time step size is 0.01f. The time is set to femtoseconds and the number of steps is set to 10 million. In the calculation, under these conditions, 300 eV of energy is applied, and atoms are injected into the cell from a direction perpendicular to the ab plane of the InGaZnO4 crystal. is incident.

[0294] FIG. 22(A) shows the state where argon is introduced into the cell having the InGaZnO4 crystal shown in FIG. The atomic arrangement is shown 99.9 picoseconds (psec) after irradiation. The atomic arrangement shown in Fig. 22 is 99.9 picoseconds after oxygen is injected into the hole. A part of the fixing layer shown in (A) is omitted.

[0295] From Figure 22(A), within 99.9 picoseconds after argon enters the cell, the ) the cracks occur from the cleavage plane corresponding to the second plane shown in Fig. 1. Therefore, InGaZnO4 When argon collides with a crystal of the above, if the top surface is the second surface (0th), the second surface ( It can be seen that a large crack occurs in the second part.

[0296] On the other hand, from FIG. 22(B), within 99.9 picoseconds after oxygen enters the cell, the It can be seen that the cracks originate from the cleavage plane corresponding to the second plane shown in A). In the event of a collision, a large crack will occur on the second (first) surface of the InGaZnO4 crystal. You can see that this is happening.

[0297] Therefore, the top surface of the target containing InGaZnO4 crystals having a homologous structure When atoms (ions) collide with the InGaZnO4 crystal, it cleaves along the second plane, It can be seen that flat particles (pellets) peel off. At this time, the size of the pellets It was found that the collision with oxygen was smaller than that with argon. Light.

[0298] The above calculations suggest that the detached pellet contains a damaged area. Damaged areas in the matrix can be repaired by reacting oxygen with the defects caused by the damage. There are cases.

[0299] Therefore, we investigated whether the pellet size differs depending on the type of atoms collided. do.

[0300] In FIG. 23(A), argon is introduced into the cell having the InGaZnO4 crystal shown in FIG. The trajectory of each atom from 0 picoseconds to 0.3 picoseconds after irradiation is shown in Fig. 23(A) corresponds to the period between FIG. 21 and FIG. 22(A).

[0301] As shown in Figure 23(A), argon collides with gallium (Ga) in the first layer (Ga-Zn-O layer). Then, after the gallium collides with the zinc (Zn) in the third layer (Ga-Zn-O layer), It can be seen that zinc reaches the vicinity of the sixth layer (Ga-Zn-O layer). The colliding argon is repelled out. Therefore, the crystals of InGaZnO4 are When argon is bombarded against the target, a turtle is formed on the second surface (second) in FIG. It is thought that cracks will occur.

[0302] In addition, in FIG. 23(B), oxygen is added to the cell having the InGaZnO4 crystal shown in FIG. The trajectory of each atom from 0 picoseconds to 0.3 picoseconds after injection is shown. Therefore, FIG. 23(B) corresponds to the period between FIG. 21 and FIG. 22(A).

[0303] On the other hand, as shown in FIG. 23(B), oxygen collides with gallium (Ga) in the first layer (Ga-Zn-O layer). When the gallium collides with the zinc (Zn) in the third layer (Ga-Zn-O layer), It can be seen that the zinc does not reach the fifth layer (In-O layer). Oxygen is expelled out. Therefore, the target containing InGaZnO4 crystals When oxygen is bombarded, it is believed that a crack will appear on the second surface (first surface) in FIG. 21(A). can be.

[0304] This calculation also shows that when atoms (ions) collide with InGaZnO4 crystals, the cleavage plane It is suggested that the material peels off from the surface.

[0305] In addition, we consider the difference in crack depth from the viewpoint of conservation laws. The conservation laws can be expressed as equations (1) and (2). Here, E is the a The energy of argon or oxygen (300 eV), m A is the mass of argon or oxygen, v A is the velocity of argon or oxygen before the collision, v' A is the velocity of argon or oxygen after the collision , m Ga is the mass of gallium, v Ga is the velocity of gallium before the collision, v' Ga The gully after the collision It's the speed of Um.

[0306]

number

[0307]

number

[0308] Assuming that the collisions of argon or oxygen are elastic, v A , v' A , v Ga Oh Bi'v' Ga The relationship can be expressed as equation (3).

[0309]

number

[0310] From equations (1), (2) and (3), v Ga If you set it to 0, argon or oxygen The velocity of the gallium after the collision is v' Ga can be expressed as equation (4).

[0311]

number

[0312] In formula (4), m A Substitute the mass of argon or the mass of oxygen into and calculate the mass of each atom. Compare the velocity of gallium after it is hit by argon and oxygen. When the number of collisions is the same, the collision with argon is 1.2 times greater than the collision with oxygen. The speed of gallium is four times faster than that of the gallium. Therefore, the energy of gallium is also When Gon collides, the velocity is squared higher than when oxygen collides.

[0313] When argon was bombarded, the amount of gallium after the collision was greater than when oxygen was bombarded. Therefore, when argon is collided, It is believed that cracks occurred at deeper positions in the case of bombardment with oxygen than in the case of bombardment with oxygen.

[0314] From the above calculations, it was found that the target containing InGaZnO4 crystals with a homologous structure When sputtering, it peels off from the cleavage plane and forms a pellet. Sputtering areas of other structures on the target that do not have a surface will not form pellets. The sputtered particles are formed in a size on the atomic level, which is smaller than the size of the sputtered particles. Because it is smaller than a pellet, it can be vacuum pumped through the sputtering device. Therefore, the crystal of InGaZnO4 with homologous structure When a target containing Zn is sputtered, particles of various sizes and shapes fly to the substrate and accumulate. It is difficult to imagine a model in which a film is formed by deposition of sputtered pellets. The model for forming a C-OS film shown in Figure 15(A) is reasonable.

[0315] The density of the CAAC-OS film thus formed is comparable to that of single-crystal OS. For example, the density of a single crystal OS with a homologous structure of InGaZnO4 is 6.36g. / cm 3 The density of CAAC-OS, which has a similar atomic ratio, is 6.3 g / c m 3 It will be about that amount.

[0316] Figure 24 shows the In-Ga-Zn oxide film, which is a CAAC-OS film formed by sputtering. (See FIG. 24(A)) and the cross section of the target (See FIG. 24(B)). The atomic arrangement is shown. The atomic arrangement was observed using high-angle annular dark-field scanning transmission electron microscopy (HA ADF-STEM:High-Angle Annular Dark Field S canning Transmission Electron Microscopy In HAADF-STEM, the image intensity of each atom is proportional to the square of the atomic number. Therefore, Zn (atomic number 30) and Ga (atomic number 31), which have similar atomic numbers, The HAADF-STEM uses a Hitachi HD-27 scanning transmission electron microscope. Use 00.

[0317] Comparing Fig. 24(A) and Fig. 24(B), the CAAC-OS and the target are Both have homologous structures, and it can be seen that the arrangement of their atoms corresponds to each other. Therefore, as shown in the deposition model in Figure 15(A), the crystal structure of the target is transformed. The image shows that a CAAC-OS film is formed.

[0318] The structures and methods described in this embodiment mode may be appropriately combined with the structures and methods described in other embodiment modes. They can be used in combination.

[0319] (Embodiment 3) In this embodiment, oxygen vacancies in an oxide semiconductor film will be described in detail below. .

[0320] <(1)V o Ease of formation and stability of H> When the oxide semiconductor film (hereinafter referred to as IGZO) is a perfect crystal, H is dominant at room temperature. During heat treatment at 450°C, H diffuses primarily along the ab plane. In this study, oxygen vacancies in IGZO are o If there is In this case, H is oxygen vacancy V o Here, we will explain whether it is easy to enter the oxygen vacancy V o Medium The state where there is H in V o It is written as H.

[0321] For the calculation, the InGaZnO4 crystal model shown in Figure 26 was used. Here, V o H in H V o The activation barrier (E a ) to NEB (Nud The calculation conditions are shown in Table 2.

[0322] [Table 2]

[0323] In addition, in the InGaZnO4 crystal model, the difference in the number of metal elements to which oxygen is bonded Therefore, there are oxygen sites 1 to 4 as shown in FIG. 26. Here, oxygen vacancies V o The calculations were performed for oxygen site 1 and oxygen site 2, which are likely to form

[0324] First, oxygen deficiency V o As oxygen site 1, which is likely to form The calculations were performed for the oxygen sites bonded to the

[0325] The model of the initial state is shown in FIG. 27(A), and the model of the final state is shown in FIG. 27(B). In addition, the calculated activation barrier (E a ) is shown in Figure 28. Here, the initial state is oxygen vacancy V o There is an H inside (V o H) and the final state is is oxygen deficiency V o and the state where oxygen bound to one Ga atom and two Zn atoms is bound to H ( It is a structure having a HO.

[0326] As a result of the calculation, oxygen deficiency V o It takes about 1.52 eV of energy for the H in the molecule to bond with another O. is required, whereas H bonded to O is oxygen vacant V o It takes about 0.46 eV to enter Energy was needed.

[0327] Here, the calculated activation barrier (E a ) and the following formula 5, the reaction frequency (Γ) In the formula 5, k B is the Boltzmann constant, T is the absolute temperature, and ν is Frequency factors are shown.

[0328]

number

[0329] Frequency factor ν=10 13 [1 / sec] and the reaction frequency at 350°C was calculated. The frequency of H transfer from the model shown in Figure 27(A) to the model shown in Figure 27(B) is 5.5 2×10 0 [1 / sec]. Also, from the model shown in FIG. 27(B), The frequency of H transfer to the model shown in is 1.82×10 9 [1 / sec]. Therefore, H diffusing in IGZO is near the oxygen vacancy V. o There is V o It is easy to form H, Once V o H forms oxygen vacancy V o It is thought that it is difficult to release from

[0330] Next, oxygen deficiency V o The oxygen site 2, which is likely to form a bond with one Ga and two Zn, Calculations were performed for the combined oxygen sites.

[0331] The model of the initial state is shown in FIG. 29(A), and the model of the final state is shown in FIG. 29(B). In addition, the calculated activation barrier (E a ) is shown in Figure 30. Here, the initial state is oxygen vacancy V o There is an H inside (V o H) and the final state is is oxygen deficiency V o and the state where oxygen bound to one Ga atom and two Zn atoms is bound to H ( It is a structure having a HO.

[0332] As a result of the calculation, oxygen deficiency V o It takes about 1.75 eV of energy for the H in the molecule to bond with another O. is required, whereas H bonded to O is oxygen vacant V o It takes about 0.35 eV to enter Energy was needed.

[0333] In addition, the calculated activation barrier (E a ) and the above formula 5, the reaction frequency (Γ) is Calculated.

[0334] Frequency factor ν=10 13 [1 / sec] and the reaction frequency at 350°C was calculated. The frequency of H transfer from the model shown in Figure 29(A) to the model shown in Figure 29(B) is 7.5 3×10 -2 [1 / sec]. Also, from the model shown in FIG. 29(B), The frequency of H transfer to the model shown in 10 [1 / sec]. Therefore, for now, V o H forms oxygen vacancy V o It is thought that H is unlikely to be released from

[0335] From the above, it can be seen that H in IGZO is easily diffused during annealing, and oxygen vacancies V o If there is is oxygen deficiency V o Enter V o It was found that it is likely to become H.

[0336] <(2)V o H transition level > Oxygen vacancy in IGZO V o If and H exist, then <(1)V o Ease of forming H From the calculation using the NEB method shown in and stability, oxygen vacancy V o and H is V o Form H Easy and V o H is considered stable. Therefore, V o H is a career trap To investigate whether V o The transition levels of H were calculated.

[0337] The calculation was performed using an InGaZnO4 crystal model (112 atoms). V for oxygen site 1 and oxygen site 2 o The H model was created and the transition level was calculated. The conditions are shown in Table 3.

[0338] [Table 3]

[0339] By adjusting the mixing ratio of the exchange terms to obtain a band gap close to the experimental value, The band gap of the new InGaZnO4 crystal model is 3.08 eV, which is lower than the experimental value of 3.1 The result was close to 5 eV.

[0340] The transition level (ε(q / q')) of the model with defect D is calculated by the following formula 6. In addition, ΔE(D q ) is the formation energy of defect D at charge q, calculated from Eq. 7. It is served.

[0341]

number

[0342]

number

[0343] In Formula 6 and Formula 7, E tot (D q ) is the charge q of the model including the defect D. Total energy, E tot (bulk) is the total energy of a defect-free model (perfect crystal), Δn i is the increase or decrease in the number of atoms i related to the defect, μ i is the chemical potential of atom i, ε VBM Missing The energy of the top of the valence band in the defect-free model, ΔV q is related to the electrostatic potential Correction term, E F is the Fermi energy.

[0344] Calculated V o The transition levels of H are shown in Figure 31. The values ​​in Figure 31 indicate the depth from the bottom of the conduction band. From Figure 31, V for oxygen site 1 o The transition level of H is 0.0 below the conduction band edge. 5 eV, and V for oxygen site 2 o The transition level of H is 0.11e below the conduction band edge. V, so each V o H is thought to be involved in electron trapping. , V o It was revealed that H acts as a donor. o IGZO with H It was revealed that the material has electrical conductivity.

[0345] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done.

[0346] (Embodiment 4) In this embodiment, a display device including the transistor described in the above embodiment will be An example will be described below with reference to FIGS.

[0347] FIG. 32 is a top view showing an example of a display device. The display device 700 shown in FIG. A pixel portion 702 provided on a substrate 701 and a source driver 703 provided on the first substrate 701 are A pixel portion 702, a source driver circuit portion 704, a gate driver circuit portion 706, and a a sealant 712 arranged to surround the gate driver circuit section 704 and the gate driver circuit section 706; and a second substrate 705 disposed opposite to the first substrate 701. The first substrate 701 and the second substrate 705 are sealed with a sealant 712. That is, the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are The first substrate 701, the sealant 712, and the second substrate 705 are used for sealing. Although not shown in FIG. 32, a display element is provided between the first substrate 701 and the second substrate 705. can be done.

[0348] The display device 700 is surrounded by a sealant 712 on the first substrate 701. In a region different from the region, a pixel section 702, a source driver circuit section 704, a gate driver circuit section A path portion 706 and an FPC terminal portion 708 electrically connected to the gate driver circuit portion 706 (FPC: Flexible printed circuit) is provided. An FPC 716 is connected to the FPC terminal section 708. Various signals are supplied to the source driver circuit section 704 and the gate driver circuit section 706. In addition, the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 A signal line 710 is connected to the FPC terminal portion 708. Various signals and the like are supplied to the pixel section 702, the source driver circuit 703, and the like via a signal line 710. 7, a gate driver circuit section 704, a gate driver circuit section 706, and an FPC terminal section 708.

[0349] The display device 700 may include a plurality of gate driver circuits 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example in which the pixel portion 702 is formed on the same first substrate 701 is shown, the present invention is not limited to this configuration. For example, only the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, the substrate on which the source driver circuit or the gate driver circuit is formed (for example, A driving circuit board formed of a monocrystalline semiconductor film or a polycrystalline semiconductor film is mounted on a first substrate 701. The method of connecting the separately formed drive circuit board is not particularly limited. Instead, we use COG (Chip On Glass) method, wire bonding method, etc. can be used.

[0350] The display device 700 also includes a pixel portion 702, a source driver circuit portion 704, and a gate The driver circuit portion 706 includes a plurality of transistors. In addition, in the pixel portion 702, a transistor according to the present invention can be used. A transistor and a capacitor which are the semiconductor device of one embodiment of the present invention can be used.

[0351] The display device 700 can also include various elements, such as: Liquid crystal elements, EL (electroluminescence) elements (EL elements containing organic and inorganic materials, Organic EL elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs ED, etc.), transistors (transistors that emit light according to the current), electron emitters, electron Ink, electrophoretic element, grating light valve (GLV), plasma display (PDP), a display element using MEMS (microelectromechanical systems) Digital Micromirror Device (DMD), Digital MicroShutter MIRASOL (registered trademark), IMOD (Interference Modulation MEMS display elements using the shutter method, MEMS display elements using the optical interference method, Using chromium-based wetting elements, piezoelectric ceramic displays, and carbon nanotubes In addition to these, there are other display elements that use electrical or magnetic effects to change the contrast. The display medium may have a variable brightness, reflectance, transmittance, etc. An example of such a display device is an EL display. One example of such a device is a field emission display (FED) or SED type flat panel display. Type display (SED: Surface-conduction Electron- Examples of display devices using liquid crystal elements include LCD (transmissive LCD, semi-transmissive LCD, reflective LCD) LCDs include LCDs, direct-view LCDs, and projection LCDs. An example of a display device using ink or electrophoretic elements is electronic paper. In order to realize a semi-transmissive or reflective liquid crystal display, the pixel electrodes A part or the whole of the pixel electrode may be made to function as a reflective electrode. A part or the whole of the element electrodes may be made of aluminum, silver, or the like. Furthermore, in this case, it is also possible to provide a memory circuit such as an SRAM under the reflective electrode. This makes it possible to further reduce power consumption.

[0352] The display method of the display device 700 may be a progressive method or an interlace method. In addition, the color elements controlled by pixels when displaying in color are R It is not limited to the three colors GB (R stands for red, G stands for green, B stands for blue). For example, It may be composed of four pixels: a pixel, a pixel, and a pixel of white (W). As in the column, two colors of RGB compose one color element, and two different colors are created by the color element. Alternatively, one or more colors such as yellow, cyan, magenta, etc. may be selected for RGB. The size of the display area may be different for each dot of the color element. However, the disclosed invention is not limited to color display devices, and may be used with monochrome displays. The present invention can also be applied to display devices such as those shown in FIG.

[0353] Also, white light is emitted from the backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, etc.) In order to display full color using (W), a colored layer (also called a color filter) is The colored layer may be, for example, red (R), green (G), blue (B), or red (C). ), yellow (Y), etc. can be used in appropriate combination. In this case, the color reproducibility can be improved compared to when no color layer is used. By disposing a region having a color layer and a region not having a color layer, The white light in the region may be directly used for display. By placing the colored layer over the entire display, the decrease in brightness caused by the colored layer can be reduced during bright display, and power consumption can be reduced by 2. However, in some cases, the emission of light from organic EL elements and inorganic EL elements can be reduced by about 10 to 30%. When using optical elements to display full color, R, G, B, Y, and W are each emitted in different colors. By using a self-luminous element, it is possible to obtain a light emission from a colored layer. In some cases, power consumption can be reduced even further.

[0354] In addition, the colorization method involves passing a portion of the white light through a color filter. In addition to the color filter method, which converts the light into red, green, and blue by filtering the light, A method that uses two colors of light (three-color method), or a method that uses part of the light emitted from the blue light to emit red or A method for converting to green (color conversion method, quantum dot method) may be applied.

[0355] In this embodiment, a liquid crystal element and an EL element are used as display elements. 33 and 34. Note that FIG. 33 shows the area indicated by the dashed line QR in FIG. FIG. 34 is a cross-sectional view of the liquid crystal display device shown in FIG. 32, which is a cross-sectional view taken along the dashed line QR, and shows a configuration in which an EL element is used as a display element. It is.

[0356] First, the common parts shown in FIG. 33 and FIG. 34 will be explained, and then the different parts will be explained. This will be explained below.

[0357] <Explanation of common parts of display device> The display device 700 shown in FIG. 33 and FIG. 34 includes a wiring portion 711 and a pixel portion 702. The display panel 700 includes a source driver circuit section 704 and an FPC terminal section 708. The line portion 711 includes a signal line 710. The pixel portion 702 includes a transistor 750 and The source driver circuit portion 704 includes a transistor 752. Yes.

[0358] Transistor 750 and transistor 752 are similar to transistor 100A shown above. The structures of the transistors 750 and 752 are the same as those described above. Other transistors shown in the embodiment of the present invention may be used.

[0359] The transistor used in this embodiment is made of a highly purified oxide film in which the formation of oxygen vacancies is suppressed. The transistor has a semiconductor film. Therefore, the retention time of electric signals such as image signals can be extended, and the power supply When the write interval is on, it is possible to set it longer. This reduces the frequency of refresh operations. This has the effect of reducing power consumption.

[0360] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed operation can be used for a liquid crystal display. By using this in a display device, the switching transistor in the pixel section and the driver circuit section In other words, the driver transistor can be formed on the same substrate as the driver circuit. Therefore, it is not necessary to use a semiconductor device formed from a silicon wafer or the like. The number of components can be reduced. By using a register, a high quality image can be provided.

[0361] The capacitor 790 is formed using the same conductive film as the second gate electrode of the transistor 750. The lower electrode formed through the process of forming the source electrode and the drain electrode of the transistor 750. and an upper electrode formed through a process of processing the same conductive film as the rain electrode. Between the lower electrode and the upper electrode, an insulating film identical to the second insulating film of the transistor 750 is provided. In other words, the capacitance element 790 is The structure is such that an insulating film is sandwiched between a pair of electrodes.

[0362] 33 and 34, a transistor 750, a transistor 752, and a capacitor An insulating film 766 and a planarizing insulating film 770 are provided on the capacitor 790 .

[0363] The insulating film 766 can be formed using a material and a method similar to those of the insulating film 128 in the above embodiment. The planarization insulating film 770 can be formed by a method. Acrylic resin, polyimide amide resin, benzocyclobutene resin, polyamide resin, epoxy Heat-resistant organic materials such as epoxy resins can be used. The planarization insulating film 770 may be formed by stacking a plurality of insulating films. The smoothing insulating film 770 does not necessarily have to be provided.

[0364] The signal line 710 is connected to the source and drain electrodes of the transistors 750 and 752. The signal line 710 is formed through the same process as the conductive film that functions as the transistor. A conductive film formed through a process different from that of the source electrode and drain electrode of 750 and 752, e.g. For example, a conductive film functioning as a first gate electrode or a conductive film functioning as a second gate electrode A conductive film formed through the same process as the conductive film may be used as the signal line 710. When materials containing copper are used, signal delays caused by wiring resistance are reduced, and the display is easier to see on a large screen. It becomes possible to show

[0365] The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and an FPC 71. 6. The connection electrode 760 is connected to the source and drain electrodes of the transistors 750 and 752. The connection electrode 760 is formed through the same process as the conductive film that functions as the drain electrode. , and is electrically connected to a terminal of the FPC 716 via an anisotropic conductive film 780 .

[0366] The first substrate 701 and the second substrate 705 may be, for example, a glass substrate. In addition, the first substrate 701 and the second substrate 705 may be flexible substrates. The flexible substrate may be, for example, a plastic substrate. do.

[0367] In addition, a structure 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer obtained by selectively etching an insulating film. A device for controlling the distance (cell gap) between the first substrate 701 and the second substrate 705 is provided. In addition, a spherical spacer may be used as the structure 778.

[0368] In addition, on the second substrate 705 side, a light-shielding film 738 functioning as a black matrix and A colored film 736 that functions as a color filter, a light-shielding film 738 that is in contact with the colored film 736, and An insulating film 734 is provided.

[0369] <Example of the configuration of a display device using a liquid crystal element as a display element> The display device 700 shown in FIG. 33 includes a liquid crystal element 775. The liquid crystal element 775 includes a conductive film The conductive film 774 is a second substrate 705. The display device 700 shown in FIG. The alignment state of the liquid crystal layer 776 changes depending on the voltage applied to the conductive film 772 and the conductive film 774. By controlling the light transmission or non-transmission, an image can be displayed.

[0370] The conductive film 772 serves as a source electrode and a drain electrode of the transistor 750. The conductive film 772 is connected to a conductive film that functions as a pixel electrode. The conductive film 772 functions as a reflective electrode, that is, one of the electrodes of the display element. The display device 700 shown in FIG. The liquid crystal display device 730 is a so-called reflective color liquid crystal display device, which reflects the light and displays it through the colored film 736.

[0371] The conductive film 772 may be a conductive film that transmits visible light or a conductive film that reflects visible light. A conductive film having a reflectivity can be used. For example, a material containing one of the elements indium (In), zinc (Zn), and tin (Sn) As a conductive film that is reflective in visible light, for example, aluminum In this embodiment, the conductive film 772 may be formed of A conductive film that is reflective in visible light is used.

[0372] In the display device 700 shown in FIG. 33, the planarization insulating film 770 of the pixel section 702 The unevenness is formed in a part of the insulating film 770 by, for example, forming an organic resin film or the like. The reflecting current can be formed by forming a reflecting current on the surface of the organic resin film and providing the reflecting current on the surface of the organic resin film. The conductive film 772, which functions as an electrode, is formed along the above-mentioned unevenness. When light enters the conductive film 772, the light can be diffusely reflected on the surface of the conductive film 772. This makes it possible to improve visibility.

[0373] The display device 700 shown in FIG. 33 is a reflective color liquid crystal display device. However, the present invention is not limited to this. For example, the conductive film 772 may be a conductive film that transmits visible light. A transmissive color liquid crystal display device may be formed by using the above-mentioned. In this case, the unevenness provided in the planarization insulating film 770 does not necessarily have to be provided.

[0374] Although not shown in FIG. 33, the conductive films 772 and 774 on the side in contact with the liquid crystal layer 776 In addition, although not shown in FIG. Optical members (optical substrates) such as optical members, phase difference members, and anti-reflection members may be provided as appropriate. For example, circularly polarized light produced by a polarizing substrate and a retardation substrate may be used. Crites, sidelights, etc. may also be used.

[0375] When liquid crystal elements are used as display elements, thermotropic liquid crystal, low molecular weight liquid crystal, high molecular weight liquid crystal, Liquid crystals, polymer-dispersed liquid crystals, ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. can be used. Depending on the conditions, the liquid crystal material can have a cholesteric phase, a smectic phase, a cubic phase, or a chiral phase. It shows nematic phase, isotropic phase, etc.

[0376] In addition, when the in-plane switching method is adopted, liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of a cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. In order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent is used in the liquid crystal layer. It has a short response time and is optically isotropic, so alignment treatment is not required. It also exhibits a blue phase. The liquid crystal composition containing the liquid crystal and the chiral agent has a small viewing angle dependency. Since rubbing is unnecessary, the electrostatic discharge caused by rubbing is eliminated. It is possible to prevent damage and reduce defects and damage to the liquid crystal display device during the manufacturing process. Cut.

[0377] In addition, when liquid crystal elements are used as display elements, TN (Twisted Nematic) ) mode, IPS (In-Plane-Switching) mode, FFS (Frin ge Field Switching) mode, ASM (Axially Symme tric aligned Micro-cell) mode, OCB(Optical Compensated Birefringence mode, FLC (Ferrero lectric Liquid Crystal) mode, AFLC (AntiFerr Electrochemical Liquid Crystal (ECC) mode can be used. .

[0378] In addition, normally black type liquid crystal display devices, for example, those using a vertical alignment (VA) mode The vertical alignment mode may be a transmission type liquid crystal display device. For example, MVA (Multi-Domain Vertical Alignment) ) mode, PVA (Patterned Vertical Alignment) mode mode, ASV mode, etc. can be used.

[0379] <Display device using light-emitting elements as display elements> The display device 700 shown in FIG. 34 includes a light-emitting element 782. The light-emitting element 782 is a conductive film The display device 700 shown in FIG. The EL layer 786 of the light element 782 emits light, thereby displaying an image. do.

[0380] The conductive film 784 serves as a source electrode and a drain electrode of the transistor 750. The conductive film 784 is connected to a conductive film that functions as a pixel electrode. The conductive film 784 functions as an electrode, that is, one of the electrodes of the display element. In the above, a conductive film that transmits light or a conductive film that reflects visible light can be used. Examples of conductive films that are transparent to visible light include indium (In), zinc (Zn), and ZnO. It is recommended to use a material containing one of the following elements: Zn (Zn) or tin (Sn). The reflective conductive film may be made of a material containing aluminum or silver. stomach.

[0381] In addition, in the display device 700 shown in FIG. An insulating film 730 is provided. The insulating film 730 covers a part of the conductive film 784. 782 has a top emission structure. Therefore, the conductive film 788 has a light transmitting property, and It transmits the light emitted by the L layer 786. In this embodiment, the top emission The structure is exemplified, but is not limited to this. For example, a bottom emission structure in which light is emitted to both the conductive film 784 and the conductive film 788; It can also be applied to al-emission structures.

[0382] A colored film 736 is provided at a position overlapping the light emitting element 782, and a colored film 736 is provided at a position overlapping the insulating film 730. A light-shielding film 738 is provided at the position where the light-shielding film 738 is to be formed, the wiring portion 711, and the source driver circuit portion 704. The colored film 736 and the light-shielding film 738 are covered with an insulating film 734. In addition, the space between the light emitting element 782 and the insulating film 734 is filled with a sealing film 732. In the display device 700 shown in FIG. 1, a configuration in which a colored film 736 is provided is illustrated. For example, when the EL layer 786 is formed by coloring, The film 736 may not be provided.

[0383] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done.

[0384] (Embodiment 5) In this embodiment, a display device including a semiconductor device of one embodiment of the present invention will be described with reference to FIG. This will be used to explain.

[0385] The display device shown in FIG. 35(A) has a region having pixels of a display element (hereinafter, referred to as a pixel portion 502). ) and a circuit section ( hereinafter referred to as a drive circuit section 504) and a circuit having a function of protecting the element (hereinafter referred to as a protection circuit 50 6) and a terminal portion 507. Note that the protection circuit 506 is not provided. This is also fine.

[0386] A part or the whole of the driver circuit portion 504 is formed on the same substrate as the pixel portion 502. This makes it possible to reduce the number of parts and terminals. When a part or the whole of the pixel portion 502 is not formed on the same substrate, the driving circuit A part or the whole of the path portion 504 is COG or TAB (Tape Automated Band). It can be implemented by using the onding.

[0387] The pixel section 502 is arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). The display device has a circuit for driving a plurality of display elements (hereinafter, referred to as pixel circuit 501), The path section 504 is a circuit (hereinafter, a gate driver) that outputs a signal (scanning signal) for selecting a pixel. 504a) to provide a signal (data signal) for driving the display element of the pixel. The pixel circuit 504 includes a driver circuit such as a circuit (hereinafter, referred to as a source driver 504b).

[0388] The gate driver 504a includes a shift register and the like. A signal for driving the shift register is input via a terminal unit 507, and a signal is output. For example, a start pulse signal, a clock signal, etc. are input to the gate driver 504a. The gate driver 504a outputs a pulse signal. The gate has a function of controlling the potential of the scanning lines GL_1 to GL_X. A plurality of drivers 504a are provided, and the scanning lines GL_1 to Alternatively, the gate driver 504a may control the GL_X by dividing it. However, the gate driver 50 has a function of supplying 4a may also provide another signal.

[0389] The source driver 504b includes a shift register and the like. Through the terminal section 507, a signal for driving the shift register as well as a source of a data signal are input. The source driver 504b outputs a pixel circuit based on the image signal. The source driver 504b has a function of generating a data signal to be written to the source driver 501. A data signal is generated according to a pulse signal obtained by inputting a start pulse, a clock signal, etc. The source driver 504b has a function of controlling the output of a data signal. The data lines DL_1 to DL_Y are connected to the data line 101 through the data line 102. Alternatively, the source driver 504b may have a function of supplying an initialization signal. However, the present invention is not limited to this, and the source driver 504b may also supply other signals. It is possible.

[0390] The source driver 504b is configured using, for example, a plurality of analog switches. The source driver 504b sequentially turns on a number of analog switches, The image signal can be time-division-multiplexed and output as a data signal. Also, a shift register, etc. This may be used to configure the source driver 504b.

[0391] Each of the plurality of pixel circuits 501 is connected to one of the plurality of scanning lines GL to which a scanning signal is applied. A pulse signal is inputted through the data line DL, and a data signal is given through one of the data lines DL. A data signal is input to each of the pixel circuits 501. 504a controls writing and holding of data of the data signal. For example, The second pixel circuit 501 is connected to a gate driver GL_m (where m is a natural number equal to or smaller than X) via a scanning line GL_m. A pulse signal is input from 504a, and the data line DL_n ( A data signal is input from the source driver 504b via a source driver 504c (n is a natural number equal to or smaller than Y).

[0392] The protection circuit 506 shown in FIG. 35(A) is, for example, a gate driver 504a and a pixel circuit 5 01. Alternatively, the protection circuit 506 is connected to the scanning line GL, which is the wiring between the source driver The data line DL is connected between the driver 504b and the pixel circuit 501. The protection circuit 506 can be connected to a wiring between the gate driver 504a and the terminal unit 507. Alternatively, the protection circuit 506 may be a wiring between the source driver 504b and the terminal unit 507. The terminal unit 507 can be connected to a power supply and a power supply line from an external circuit to the display device. This refers to the part provided with terminals for inputting control signals and image signals.

[0393] When a potential outside a certain range is applied to the wiring to which the protection circuit 506 is connected, the protection circuit This is a circuit that brings one wire into electrical continuity with another wire.

[0394] As shown in FIG. 35A, a protection circuit 50 is provided in each of a pixel section 502 and a driver circuit section 504. 6, ESD (Electro Static Discharge: This can improve the resistance of the display device to overcurrent caused by electrostatic discharge (ESD) and the like. However, the configuration of the protection circuit 506 is not limited to this. For example, A configuration in which a protection circuit 506 is connected, or a protection circuit 506 is connected to the source driver 504b Alternatively, a protection circuit 506 may be connected to the terminal portion 507. It can also be written as:

[0395] In FIG. 35(A), the gate driver 504a and the source driver 504b Therefore, although an example in which the driver circuit portion 504 is formed is shown, the present invention is not limited to this configuration. For example, only the gate driver 504a is formed, and a source driver circuit is formed separately. A substrate (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) is It may also be configured to be equipped with

[0396] In addition, the pixel circuits 501 shown in FIG. 35(A) may have a configuration shown in FIG. 35(B), for example. It can be said that:

[0397] The pixel circuit 501 shown in FIG. 35B includes a liquid crystal element 570, a transistor 550, and a capacitor. The transistor 550 may be any of the transistors described in the previous embodiment. can be applied.

[0398] The potential of one of the pair of electrodes of the liquid crystal element 570 is appropriately set according to the specifications of the pixel circuit 501. The alignment state of the liquid crystal element 570 is set by the written data. A common potential is applied to one of a pair of electrodes of the liquid crystal element 570 in each of the pixel circuits 501. A common potential may be applied to the pair of liquid crystal elements 570 of the pixel circuits 501 in each row. A different potential may be applied to one of the electrodes.

[0399] For example, the display device including the liquid crystal element 570 can be driven in a TN mode, an STN mode, or the like. Mode, VA mode, ASM (Axially Symmetric Aligned M icro-cell mode, OCB (Optically Compensated Birefringence mode, FLC (Ferroelectric Liquid id Crystal) mode, AFLC (AntiFerroelectric Li quid Crystal) mode, MVA mode, PVA (Patterned Ve Vertical Alignment mode, IPS mode, FFS mode, or TBA (Transverse Bend Alignment) mode, etc. may also be used. In addition to the above-mentioned driving method, the display device can be driven by an ECB (Electric Carrier Bipolar Transistor) or the like. Ally Controlled Birefringence mode, PDLC(P Oligomeric Dispersed Liquid Crystal (PNLC) mode (Polymer Network Liquid Crystal) mode, guest hole However, there are various types of liquid crystal elements and their driving methods, and they are not limited to these. A variety of different types of sensors can be used.

[0400] In the pixel circuit 501 in the mth row and the nth column, One of the electrodes is electrically connected to the data line DL_n, and the other is a pair of electrodes of the liquid crystal element 570. The gate electrode of the transistor 550 is electrically connected to the other of the electrodes of the scan line G. L_m. The transistor 550 can be turned on or off. Thus, the data write of the data signal is controlled.

[0401] One of a pair of electrodes of the capacitor 560 is connected to a wiring to which a potential is supplied (hereinafter, a potential supply line VL ) and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The value of the potential of the potential supply line VL is set appropriately according to the specifications of the pixel circuit 501. The capacitor 560 functions as a storage capacitor for storing written data.

[0402] For example, in a display device having the pixel circuit 501 shown in FIG. The pixel circuits 501 in each row are sequentially selected by a gate driver 504a shown in FIG. 550 is turned on to write data of the data signal.

[0403] In the pixel circuit 501 in which data has been written, the transistor 550 is turned off. By repeating this process row by row, an image can be displayed.

[0404] In addition, the pixel circuits 501 shown in FIG. 35(A) may have a configuration shown in FIG. 35(C), for example. It can be said that:

[0405] The pixel circuit 501 shown in FIG. 35C includes transistors 552 and 554 and a capacitance element. The transistor 552 and the transistor 554 The transistor described in the above embodiment can be used for either or both of the above. .

[0406] A data signal is applied to one of the source and drain electrodes of the transistor 552. The transistor 55 is electrically connected to a wiring (hereinafter, referred to as a signal line DL_n). The gate electrode of 2 is electrically connected to the wiring (hereinafter referred to as the scanning line GL_m) to which the gate signal is applied. are connected to the network.

[0407] Transistor 552 is turned on or off to transfer the data of the data signal. It has the function of controlling the writing of data.

[0408] One of a pair of electrodes of the capacitor 562 is connected to a wiring to which a potential is applied (hereinafter, a potential supply line VL _a), and the other is electrically connected to the source electrode and drain electrode of the transistor 552. The second electrode is electrically connected to the other of the first and second electrodes.

[0409] The capacitor 562 functions as a storage capacitor for storing written data.

[0410] One of the source electrode and the drain electrode of the transistor 554 is connected to the potential supply line VL_a. In addition, the gate electrode of the transistor 554 is electrically connected to the It is electrically connected to the other of the source electrode and the drain electrode.

[0411] One of the anode and the cathode of the light-emitting element 572 is electrically connected to the potential supply line VL_b. The other one is electrically connected to the other of the source electrode and drain electrode of the transistor 554. will be done.

[0412] The light-emitting element 572 may be, for example, an organic electroluminescence element (also called an organic EL element). However, the light-emitting element 572 is not limited to this. Alternatively, an inorganic EL element made of an inorganic material may be used.

[0413] A high power supply potential VDD is applied to one of the potential supply lines VL_a and VL_b. and the other is supplied with a low power supply potential VSS.

[0414] In a display device having the pixel circuit 501 shown in FIG. 35(C), for example, The pixel circuits 501 in each row are sequentially selected by the gate driver 504a, and the transistors 552 are turned on. The data signal is written by turning it on.

[0415] In the pixel circuit 501 to which the data has been written, the transistor 552 is turned off. Furthermore, the transistor 554 is in a holding state in response to the potential of the written data signal. The amount of current flowing between the source electrode and the drain electrode is controlled, and the light emitting element 572 The light is emitted with a brightness that corresponds to the flow rate. By performing this process row by row, an image can be displayed.

[0416] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done.

[0417] (Embodiment 6) In this embodiment, a display module and an electronic device each including a semiconductor device according to one embodiment of the present invention will be described. This will be described with reference to FIG. 36 and FIG. 37.

[0418] The display module 8000 shown in FIG. 36 includes an upper cover 8001 and a lower cover 8002. Between them, touch panel 8004 connected to FPC8003, A display panel 8006, a backlight 8007, a frame 8009, and a printed circuit board 801 0, has battery 8011.

[0419] The semiconductor device of one embodiment of the present invention can be used for the display panel 8006, for example.

[0420] The upper cover 8001 and the lower cover 8002 are connected to the touch panel 8004 and the display panel The shape and dimensions can be changed as appropriate to match the size of 8006.

[0421] The touch panel 8004 is a resistive or capacitive touch panel. The display panel 8006 can be used by overlapping it with the opposing substrate (sealing substrate). It is also possible to provide the display panel 8 with a touch panel function. It is also possible to provide an optical sensor in each pixel of the display panel 006 to make it into an optical touch panel.

[0422] The backlight 8007 has a light source 8008. In FIG. In the above embodiment, the light source 8008 is disposed on the light source 8007, but the present invention is not limited to this. For example, a light source 8008 is arranged at the end of a backlight 8007, and a light diffusion plate is further used. In addition, when a self-luminous light-emitting element such as an organic EL element is used, or when a reflective In the case of a flat panel or the like, the backlight 8007 need not be provided.

[0423] The frame 8009 protects the display panel 8006 and also supports the movement of the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the frame. The frame 8009 may also function as a heat sink.

[0424] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal, and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. , this can be omitted when using a commercial power source.

[0425] In addition, the display module 8000 includes components such as a polarizing plate, a retardation plate, and a prism sheet. It may be added.

[0426] 37(A) to 37(H) are diagrams showing electronic devices. These electronic devices are A body 9000, a display unit 9001, a speaker 9003, an LED lamp 9004, and an operation key 90 05 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 ( Force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substances , sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, 9008, a microphone 9009, etc. can.

[0427] FIG. 37(A) shows a mobile computer, which includes, in addition to the above, a switch 9009 , an infrared port 9010, etc. FIG. 37(B) shows a mobile phone equipped with a recording medium. A portable image reproducing device (e.g., a DVD reproducing device) and, in addition to the above, the following devices are also included: The display unit 9002, the recording medium reading unit 9011, etc. In addition to the above, the display includes a second display unit 9002 and a support unit 9012. , earphones 9013, etc. FIG. 37(D) shows a portable game machine. In addition to the above, a recording medium reading unit 9011, etc. can be included. FIG. 37(E) shows This is a digital camera with a TV receiving function. In addition to the above, it also has an antenna 9014, The mobile phone may have a shutter button 9015, an image receiving unit 9016, etc. This is a slot machine, and in addition to the above, it has a second display unit 9002, a recording medium reading unit 9011, , etc. FIG. 37(G) shows a television receiver, which, in addition to the above, has It can have a tuner, an image processor, etc. FIG. 37(H) shows a portable television receiver. In addition to the above, the device includes a charger 9017 capable of transmitting and receiving signals. can be done.

[0428] The electronic devices shown in FIGS. 37(A) to 37(H) can have various functions. For example, the function to display various information (still images, videos, text images, etc.) on the display, Panel function, calendar, date or time display function, various software (platform A function to control processing by a program, a wireless communication function, and a function to control various Functions for connecting to computer networks, wireless communication functions for transmitting various data, The function of receiving, reading out the program or data recorded on the recording medium and displaying it on the display Furthermore, in an electronic device having a plurality of display units, In this case, one display section is used mainly to display image information, and the other display section is used mainly to display text information. A function to display images with parallax taken into account on multiple displays to create a stereoscopic effect. Furthermore, in electronic devices having an image receiving unit, These include functions for taking still images, taking videos, and automatically or manually correcting the images. The camera has a function to correct the captured image, a function to save the captured image on a recording medium (external or built-in to the camera), The image displayed on the display unit can have a function of displaying the image. The functions that the electronic device shown in 7(H) can have are not limited to these, and various functions may be included. It is possible to have.

[0429] The electronic device described in this embodiment has a display unit for displaying some information. Note that the semiconductor device of one embodiment of the present invention can be used in an electronic device that does not have a display portion. can also be applied to

[0430] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done. [Explanation of symbols]

[0431] 100 transistors 100A Transistor 100B Transistor 102 Substrate 104 Insulating film 106 Conductive Film 106a Conductive film 106b Conductive film 108 Insulating film 108a Insulating film 108b Insulating film 110 Oxide semiconductor film 110_1 Oxide semiconductor film 110_2 Oxide semiconductor film 110a Channel Region 110a_1 Channel region 110a_2 Channel region 110b Low resistance area 110b_1 Low resistance region 110b_2 Low resistance region 110c low resistance area 110c_1 Low resistance region 110c_2 Low resistance region 110d low resistance area 110e low resistance area 112 Insulating film 113 Conductive Film 113a Conductive film 113b Conductive film 114 Conductive Film 114a Conductive film 114b Conductive film 118 Insulating film 120 Insulating film 121a Conductive film 121b Conductive film 122 Conductive Film 122a Conductive film 122b Conductive film 128 Insulating film 139 Opening 140a opening 140b opening 141 Membrane 142 Oxygen 143 Impurity elements 145 Mask 190 areas 191 Oxygen 192 Hydrogen 193 areas 194 areas 195 Impurity elements 501 Pixel circuit 502 Pixel section 504 Drive circuit section 504a Gate Driver 504b source driver 506 Protection circuit 507 Terminal section 550 Transistor 552 Transistor 554 Transistor 560 Capacitive element 562 Capacitive element 570 Liquid crystal element 572 Light emitting element 602 Glass substrate 604 Oxide Semiconductor Film 606 Protective film 700 Display device 701 Substrate 702 Pixel section 704 Source driver circuit section 705 Substrate 706 Gate driver circuit section 708 FPC terminal section 710 Signal Line 711 Wiring section 712 Sealing material 716 FPC 730 Insulating film 732 Sealing film 734 Insulating film 736 Colored film 738 Light-shielding film 750 Transistors 752 Transistor 760 Connection electrode 766 Insulating Film 770 Planarizing Insulating Film 772 Conductive Film 774 Conductive Film 775 Liquid crystal elements 776 Liquid crystal layer 778 Structure 780 Anisotropic Conductive Film 782 Light emitting element 784 Conductive Film 786 EL layer 788 Conductive Film 790 Capacitive element 1100 pellets 1100a Pellets 1100b Pellets 1101 AEON 1120 Substrate 1130 Target 5100 pellets 5120 PCB 5161 area 8000 Display Module 8001 Top cover 8002 Lower cover 8003 FPC 8004 Touch Panel 8005 FPC 8006 Display Panel 8007 Backlight 8008 light source 8009 Frame 8010 Printed Circuit Board 8011 Battery 9000 Chassis 9001 Display section 9002 Display section 9003 Speaker 9004 LED Lamp 9005 Operation key 9006 Connection terminal 9007 Sensor 9008 Microphone 9009 Switch 9010 Infrared port 9011 Recording medium reading unit 9012 Support part 9013 Earphones 9014 Antenna 9015 Shutter button 9016 Image receiving unit 9017 charger

Claims

1. A first insulating film; an oxide semiconductor film having a region on the first insulating film; a second insulating film having a region on the oxide semiconductor film; a first conductive film having a region on the second insulating film; a second conductive film having an area on the first conductive film; a third insulating film having a region over the oxide semiconductor film, a region over the first conductive film, and a region over the second conductive film; a fourth insulating film having a region on the third insulating film; a third conductive film having a region on the fourth insulating film; a fourth conductive film having a region on the fourth insulating film; the first conductive film has a region that functions as a gate electrode of a transistor; the third conductive film has a region that functions as a source electrode of the transistor, the fourth conductive film has a region that functions as a drain electrode of the transistor, the second insulating film has a region that functions as a gate insulating film of the transistor, the third conductive film has a region in contact with the oxide semiconductor film, the third conductive film has a region provided within a first opening formed in the third insulating film and the fourth insulating film; the fourth conductive film has a region in contact with the oxide semiconductor film, the fourth conductive film has a region provided within a second opening of the third insulating film and the fourth insulating film; the first insulating film contains oxygen; the third insulating film contains hydrogen; the oxide semiconductor film has, in a plan view, a first region overlapping with the first conductive film and the second conductive film, a second region overlapping with the first conductive film but not overlapping with the second conductive film, and a third region not overlapping with the first conductive film and the second conductive film; the first region and the second region are in contact with the second insulating film; the third region is in contact with the third insulating film, the second region and the third region contain an impurity element; the second region has a lower concentration of the impurity element than the third region; the first insulating film has a fourth region overlapping with the first region and a fifth region overlapping with the third region; the fifth region has a higher concentration of the impurity element than the fourth region; The fifth region releases less oxygen than the fourth region.

2. A first conductive film; a first insulating film having a region on the first conductive film; an oxide semiconductor film having a region on the first insulating film; a second insulating film having a region on the oxide semiconductor film; a second conductive film having a region on the second insulating film; a third conductive film having an area on the second conductive film; a third insulating film having a region over the oxide semiconductor film, a region over the second conductive film, and a region over the third conductive film; a fourth insulating film having a region on the third insulating film; a fourth conductive film having a region on the fourth insulating film; a fifth conductive film having a region on the fourth insulating film; the first conductive film has a region that functions as a first gate electrode of a transistor; the second conductive film has a region that functions as a second gate electrode of the transistor, the fourth conductive film has a region that functions as a source electrode of the transistor, the fifth conductive film has a region that functions as a drain electrode of the transistor, the first insulating film has a region that functions as a first gate insulating film of the transistor; the second insulating film has a region that functions as a second gate insulating film of the transistor, the fourth conductive film has a region in contact with the oxide semiconductor film, the fourth conductive film has a region provided in a first opening formed in the third insulating film and the fourth insulating film; the fifth conductive film has a region in contact with the oxide semiconductor film, the fifth conductive film has a region provided within a second opening of the third insulating film and the fourth insulating film; the first insulating film contains oxygen; the third insulating film contains hydrogen; the oxide semiconductor film has, in a plan view, a first region overlapping with the second conductive film and the third conductive film, a second region overlapping with the second conductive film but not overlapping with the third conductive film, and a third region not overlapping with the second conductive film and the third conductive film; the first region and the second region are in contact with the second insulating film; the third region is in contact with the third insulating film, the second region and the third region contain an impurity element; the second region has a lower concentration of the impurity element than the third region; the first insulating film has a fourth region overlapping with the first region and a fifth region overlapping with the third region; the fifth region has a higher concentration of the impurity element than the fourth region; The fifth region releases less oxygen than the fourth region.

3. A first conductive film; a first insulating film having a region on the first conductive film; an oxide semiconductor film having a region on the first insulating film; a second insulating film having a region on the oxide semiconductor film; a second conductive film having a region on the second insulating film; a third conductive film having an area on the second conductive film; a third insulating film having a region over the oxide semiconductor film, a region over the second conductive film, and a region over the third conductive film; a fourth insulating film having a region on the third insulating film; a fourth conductive film having a region on the fourth insulating film; a fifth conductive film having a region on the fourth insulating film; the first conductive film has a region that functions as a first gate electrode of a transistor; the second conductive film has a region that functions as a second gate electrode of the transistor, the fourth conductive film has a region that functions as a source electrode of the transistor, the fifth conductive film has a region that functions as a drain electrode of the transistor, the first insulating film has a region that functions as a first gate insulating film of the transistor; the second insulating film has a region that functions as a second gate insulating film of the transistor, the fourth conductive film has a region in contact with the oxide semiconductor film, the fourth conductive film has a region provided in a first opening formed in the third insulating film and the fourth insulating film; the fifth conductive film has a region in contact with the oxide semiconductor film, the fifth conductive film has a region provided within a second opening of the third insulating film and the fourth insulating film; the second conductive film has a region in contact with the first conductive film, the second conductive film has a region provided in a third opening formed in the first insulating film and the second insulating film; the first insulating film contains oxygen; the third insulating film contains hydrogen; the oxide semiconductor film has, in a plan view, a first region overlapping with the second conductive film and the third conductive film, a second region overlapping with the second conductive film but not overlapping with the third conductive film, and a third region not overlapping with the second conductive film and the third conductive film; the first region and the second region are in contact with the second insulating film; the third region is in contact with the third insulating film, the second region and the third region contain an impurity element; the second region has a lower concentration of the impurity element than the third region; the first insulating film has a fourth region overlapping with the first region and a fifth region overlapping with the third region; the fifth region has a higher concentration of the impurity element than the fourth region; The fifth region releases less oxygen than the fourth region.

4. In any one of claims 1 to 3, The impurity element is A semiconductor device comprising one or more of hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, or a rare gas.

5. In any one of claims 1 to 3, The impurity element comprises argon.

6. In any one of claims 1 to 3, The first region has a portion having a lower hydrogen concentration than the third region.

7. In any one of claims 1 to 3, The first region has a higher crystallinity than the third region.

8. In any one of claims 1 to 3, The oxide semiconductor film contains oxygen, In, Zn, and M (M is Ti, Ga, Y, Zr, La, Ce, Nd, or Hf).

9. In any one of claims 1 to 3, the oxide semiconductor film includes a crystal portion, The crystalline portion has a crystal oriented along a c-axis.

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