Semiconductor Device

Abstract

To provide a technology that allows proper fitting between a base plate and a case.SOLUTION: A semiconductor device comprises: a semiconductor element; an insulation substrate mounting thereon, the semiconductor element; a base plate mounting thereon the insulation substrate; and a case mounted on the base plate, surrounding the semiconductor element and the insulation substrate. One of a surface of the base plate and a surface of the case is provided with one or more tapered convex parts. The other of the surface of the base plate and the surface of the case is provided with one or more tapered recess parts fitted to the one or more convex parts.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device. [Background technology]

[0002] Conventionally, semiconductor devices including a base plate and a case have been proposed. For example, Patent Document 1 proposes a technique in which a convex portion provided on one of the base plate and the case is fitted into a concave portion provided on the other of the base plate and the case. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 11-312782 Summary of the Invention [Problem to be solved by the invention]

[0004] In the technology of Patent Document 1, the convex and concave portions are provided perpendicular to the surface on which they are provided. In such a technology, if the margin of the dimensions of the convex and concave portions is large, the positional deviation becomes large, and if the margin of the dimensions of the convex and concave portions is small, a large force is required for fitting or they cannot be fitted at all.

[0005] Therefore, the present disclosure has been made in consideration of the above-mentioned problems, and aims to provide a technology that enables appropriate fitting between a base plate and a case. [Means for solving the problem]

[0006] The semiconductor device according to the present disclosure includes a semiconductor element, an insulating substrate on which the semiconductor element is mounted, a base plate on which the insulating substrate is mounted, and a case mounted on the base plate and surrounding the semiconductor element and the insulating substrate, wherein one or more tapered convex portions are provided on one of a surface of the base plate and a surface of the case, and one or more tapered concave portions are provided on the other of the surface of the base plate and the surface of the case and engaged with the one or more convex portions, Beyond and the recess Each of the opposing flat surfaces at the bottom of of , in the direction perpendicular to the plane A common through-hole is provided in the base plate and the case. Effect of the Invention

[0007] According to the present disclosure, one or more tapered convex portions are provided on one of the surface of the base plate and the surface of the case, and one or more tapered concave portions are provided on the other of the surface of the base plate and the surface of the case, engaging with the one or more convex portions. With this configuration, the base plate and the case can be appropriately engaged with each other. [Brief description of the drawings]

[0008] [Figure 1] 1 is a cross-sectional view showing a configuration of a semiconductor device according to a first embodiment. [Diagram 2] 1 is a plan view showing a configuration of a portion of a semiconductor device according to a first embodiment. [Diagram 3] FIG. 11 is a cross-sectional view showing a configuration of a semiconductor device according to a modified example of the first embodiment. [Figure 4] FIG. 11 is a plan view showing a configuration of a portion of a semiconductor device according to a second embodiment. [Diagram 5] FIG. 11 is a plan view showing a configuration of a portion of a semiconductor device according to a third embodiment. [Figure 6] FIG. 11 is a plan view showing a configuration of a part of a semiconductor device according to a combination of second and third embodiments. [Figure 7]FIG. 11 is a cross-sectional view showing a configuration of a semiconductor device according to a fourth embodiment. [Figure 8] FIG. 13 is a cross-sectional view showing a configuration of a semiconductor device according to a fifth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, the embodiments will be described with reference to the accompanying drawings. The features described in each of the following embodiments are merely examples, and not all features are necessarily required. In addition, in the following description, similar components in multiple embodiments are given the same or similar reference numerals, and different components are mainly described. In addition, in the following description, specific positions and directions such as "upper", "lower", "left", "right", "front" or "back" do not necessarily correspond to positions and directions in actual implementation.

[0010] <Embodiment 1> 1 is a cross-sectional view showing the configuration of a semiconductor device according to the first embodiment. In the following, an example will be described in which the semiconductor device is a power semiconductor device.

[0011] The semiconductor device in FIG. 1 includes a semiconductor element 1, an insulating substrate 2, bonding portions 3a and 3b, a base plate 4, a case 5, an adhesive 6, electrodes 7, metal wires 8, and a sealing material 9.

[0012] The semiconductor element 1 includes a power semiconductor element such as a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), an Insulated Gate Bipolar Transistor (IGBT), a Schottky Barrier Diode (SBD), a PN junction diode (PND), or a Reverse Conducting IGBT (RC-IGBT).

[0013] The material of the semiconductor element 1 may be ordinary silicon (Si) or a wide band gap semiconductor. Wide band gap semiconductors include, for example, silicon carbide (SiC) or gallium nitride (GaN). When the material of the semiconductor element 1 is a wide band gap semiconductor, the semiconductor element 1 can operate appropriately at high voltage, high frequency, and high temperature.

[0014] 1, the number of semiconductor elements 1 in one case 5 is one, but this is not limited thereto. For example, the number of semiconductor elements 1 in one case 5 may be two (i.e., a 2-in-1 configuration), or the number of semiconductor elements 1 in one case 5 may be six (i.e., a 6-in-1 configuration).

[0015] The semiconductor element 1 is mounted on an insulating substrate 2. The insulating substrate 2 includes an insulating layer portion and first and second circuit pattern portions provided on both sides of the insulating layer portion. The material of the insulating layer portion includes inorganic ceramic materials such as alumina (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), etc. The material of the first and second circuit pattern portions includes copper (Cu), aluminum (Al), or an alloy thereof, for example.

[0016] The semiconductor element 1 and the first circuit pattern portion of the insulating substrate 2 are joined by a joint 3a. The material of the joint 3a is, for example, a metal joint material. The metal joint material may include solder made of lead (Pb) and tin (Sn) or a solder alloy, or may include a sintered material made of nano silver or a sintered material made of nano copper particles.

[0017] The insulating substrate 2 is mounted on a base plate 4. The material of the base plate 4 may include a metal material such as copper, aluminum, or a copper-molybdenum alloy (CuMo), or may include a composite material such as a silicon carbide-aluminum composite (AlSiC) or a silicon carbide-magnesium composite (MgSiC). The material of the base plate 4 may also include an organic material such as an epoxy resin, a polyimide resin, an acrylic resin, or a polyphenylene sulfide (PPS) resin.

[0018] The insulating substrate 2 and the second circuit pattern portion of the base plate 4 are joined by a joint 3b. The material of the joint 3b may be the same as or different from the material of the joint 3a.

[0019] The case 5 is mounted on the base plate 4, and surrounds the semiconductor element 1 and the insulating substrate 2. The case 5 may be made of any material that has electrical insulation properties, and examples of such materials include PPS, PBT, and PET-PBT resins.

[0020] A gap is provided between the base plate 4 and the case 5, and an adhesive 6 is provided in the gap. A silicone adhesive is generally used as the adhesive 6, but the material of the adhesive 6 may contain an acrylic resin, an epoxy resin, or the like.

[0021] The electrode 7 is provided integrally with the case 5. The electrode 7 has a first end and a second end exposed from the case 5, and the second end is provided on the opposite side of the case 5 to the first end. The material of the electrode 7 includes a metal mainly composed of, for example, copper or an alloy thereof. The surface of the electrode 7 preferably has a plating layer of nickel (Ni) or the like, but may not have a plating layer.

[0022] The metal wire 8 electrically connects between the semiconductor element 1 and the first circuit pattern portion of the insulating substrate 2, and between the first circuit pattern portion and the first end portion of the electrode 7, etc. The metal wire 8 may be a metal wiring made of, for example, copper (Cu), aluminum (Al), or an alloy thereof.

[0023] The sealing material 9 seals the assembly surrounded by the base plate 4 and the case 5 as an object to be sealed. Although not shown in Fig. 1, the object to be sealed may include a control board that controls the semiconductor element 1. The material of the sealing material 9 includes, for example, silicone gel or an insulating resin such as an epoxy resin.

[0024] As shown in FIG. 1, a tapered convex portion 5a is provided on the surface of the case 5 (the bottom surface in FIG. 1), and a tapered concave portion 4a is provided on the surface of the base plate 4 (the top surface in FIG. 1) that is engaged with the convex portion 5a.

[0025] The sidewall of the protrusion 5a is inclined by 15° to 30° with respect to the perpendicular direction of the surface of the case 5, so that the protrusion 5a has a tapered shape tapering toward its tip. The sidewall of the recess 4a is inclined by the same degree as the sidewall of the protrusion 5a with respect to the perpendicular direction of the surface of the base plate 4, so that the recess 4a has a tapered shape tapering toward its bottom. The depth of the recess 4a is, for example, 1 / 3 to 2 / 3 of the thickness of the base plate 4. A gap is provided between the protrusion 5a and the recess 4a facing each other, and an adhesive 6 is provided in the gap. During production, the adhesive 6 is preferably provided in the gap under reduced pressure.

[0026] 1, a plurality of convex parts 5a having the same shape are provided on the surface of the case 5, a plurality of concave parts 4a having the same shape are provided on the surface of the base plate 4, and the plurality of convex parts 5a and the plurality of concave parts 4a are fitted together, but this is not limited thereto. For example, the number of each of the convex parts 5a and the concave parts 4a may be one.

[0027] In a configuration in which the base plate 4 is made of metal and the case 5 is made of resin, the recess 4a of the base plate 4 may be formed by press working or the like, and the protrusion 5a of the case 5 may be formed by integral molding or the like.

[0028] 1 may be reversed, that is, the surface of the base plate 4 may be provided with a tapered protrusion, and the surface of the case 5 may be provided with a tapered recess.

[0029] Furthermore, the protrusions 5a and the recesses 4a may have a tapered shape with two or more steps. That is, the cross-sectional shape of the side walls of the protrusions 5a and the recesses 4a may have a straight line shape with one or more bends, or may have a semicircular shape with an unlimited number of steps.

[0030] 1, the convex portion 5a and the concave portion 4a are provided directly below the electrode 7 embedded in the case 5. This configuration can suppress deviation of the electrode 7 from its designed position on the base plate 4, thereby suppressing misalignment that causes problems when the semiconductor device is attached to an external device.

[0031] 2 is a plan view of the base plate 4 according to the first embodiment as viewed from the insulating substrate 2 side. In FIG. 2, the positions and shapes of the multiple recesses 4a in a plan view and the mounting holes 13 for mounting the case 5 to the base plate 4 are shown. In FIG. 2, the surface of the base plate 4 and the table A case mounting area 16, which is an area facing the surface, is indicated by a dotted line. Although not shown in Fig. 2, the positions and shapes of the multiple protrusions 5a in a plan view correspond to the positions and shapes of the multiple recesses 4a in a plan view.

[0032] 2, the multiple recesses 4a are arranged symmetrically on the base plate 4 in a plan view. The symmetry here includes line symmetry with respect to a short-side line or a long-side line passing through the center point of the base plate 4, or point symmetry with respect to the center point of the base plate 4. Although not shown, the multiple protrusions 5a are also arranged symmetrically on the case 5 in a plan view.

[0033] In the example of Figure 2, the multiple recesses 4a are provided along the short sides of the base plate 4, but they may also be provided along the long sides of the base plate 4, or along both the short sides and the long sides of the base plate 4, or may be provided at locations other than these in the case mounting area 16.

[0034] 2, the shape of the recess 4a is a rectangle having sides of about 5 to 50 mm, but is not limited thereto. For example, the shape of the recess 4a may be any other polygonal shape, or may be a shape that combines polygonal shapes, such as a T-shape.

[0035] <Summary of the first embodiment> According to the semiconductor device of the first embodiment as described above, one or more convex portions are provided on one of the surface of the base plate 4 and the surface of the case 5, and one or more concave portions engaged with the one or more convex portions are provided on the other of the surface of the base plate 4 and the surface of the case 5. According to such a configuration, it is possible to suppress misalignment in the translational direction and misalignment in the rotational direction between the base plate 4 and the case 5.

[0036] In addition, in the first embodiment, since the protrusions and recesses each have a tapered shape, the protrusions and recesses are guided to appropriate positions. This makes it possible to suppress misalignment regardless of the dimensional margin of the protrusions and recesses, and facilitates fitting, so that appropriate fitting can be performed between the base plate 4 and the case 5. As a result, the fitting work is made more efficient, the assembly of the semiconductor device is improved, and the defective rate of the semiconductor device is reduced, thereby reducing the manufacturing cost of the semiconductor device.

[0037] If moisture passes through the gap between the base plate 4 and the case 5 from the outside and reaches electrical components such as the semiconductor element 1 and the insulating substrate 2 in the internal space surrounded by the base plate 4 and the case 5, the insulation of the electrical components will be deteriorated, and performance such as life will be deteriorated. In contrast, in the present embodiment 1, the creeping distance from the outside of the base plate 4 and the case 5 to the internal space can be increased, and the adhesive 6 is provided on the creeping distance, so that it is possible to prevent moisture from reaching the electrical components.

[0038] If the adhesive 6 is made of a silicone-based material, for example, the generation of bubbles will reduce properties such as insulation. For this reason, instead of the adhesive 6, a sealant 9 such as epoxy resin or silicone gel may be provided in the gap between the convex portion and the concave portion. Alternatively, the adhesive 6 may be provided in a part of the gap, and the sealant 9 may be provided in the remaining portion of the gap. If the moisture can be sufficiently prevented from reaching the electrical components even without adhesion between the convex portion and the concave portion, the adhesive 6 or the like may not be provided in the gap.

[0039] <Modification of the first embodiment> Fig. 3 is a cross-sectional view showing a configuration of a semiconductor device according to a modification of embodiment 1. In embodiment 1, as shown in Fig. 2, the positions of recess 4a and protrusion 5a are different from the position of mounting hole 13, but as shown in Fig. 3, the positions of recess 4a and protrusion 5a may overlap with the position of mounting hole 13.

[0040] <Embodiment 2> Fig. 4 is a plan view of the base plate 4 according to the second embodiment as viewed from the insulating substrate 2 side. Although not shown in Fig. 4, the positions and shapes of the multiple convex portions 5a in the plan view correspond to the positions and shapes of the multiple concave portions 4a in the plan view, respectively.

[0041] In the second embodiment, as shown in Fig. 4, the multiple recesses 4a are arranged asymmetrically on the base plate 4 in a plan view. That is, the multiple recesses 4a are not arranged in line symmetry or point symmetry on the base plate 4 in a plan view. In the example of Fig. 4, the multiple recesses 4a are provided along the short sides of the base plate 4, but this is not limited thereto. For example, the multiple recesses 4a may be provided at locations other than along the short sides, or one recess 4a may be arranged asymmetrically on the base plate 4 in a plan view.

[0042] Although not shown, the multiple protrusions 5a are also arranged symmetrically in the plan view of the case 5. In the second embodiment, similarly to the first embodiment, protrusions may be provided on the surface of the base plate 4, and recesses may be provided on the surface of the case 5.

[0043] <Summary of the second embodiment> In the first embodiment, one or more convex portions or one or more concave portions are asymmetrically arranged on the base plate 4 or the case 5 in a plan view, as shown in Fig. 2. In such a configuration, even if the case 5 is rotated by 180° from the designed state with respect to the base plate 4, it can still be fitted to the base plate 4, which may lead to incorrect assembly.

[0044] In contrast, in the second embodiment, one or more convex portions or one or more concave portions are arranged asymmetrically on the base plate 4 or the case 5 in a plan view. According to such a configuration, when the case 5 is rotated by 180° from the designed state with respect to the base plate 4, one or more pairs of convex portions and concave portions do not interlock, so that assembly errors can be suppressed. As a result, in a configuration in which the electrodes 7 are not symmetrically arranged on the case 5 or the shape of the base plate 4 or the case 5 is not symmetric, the defect rate of the semiconductor device due to assembly errors decreases, and the manufacturing cost of the semiconductor device can be reduced.

[0045] <Embodiment 3> Fig. 5 is a plan view of the base plate 4 according to the third embodiment as viewed from the insulating substrate 2 side. Although not shown in Fig. 5, the positions and shapes of the multiple convex portions 5a in the plan view correspond to the positions and shapes of the multiple concave portions 4a in the plan view, respectively.

[0046] In the third embodiment, as shown in Fig. 5, the multiple recesses 4a include a first recess 4a1 and a second recess 4a2 that are different in shape from each other in a plan view. In Fig. 5, as an example, the size (e.g., vertical size) of at least a part of the shape of the first recess 4a1 is different from the size (e.g., vertical size) of at least a part of the shape of the second recess 4a2. Although not shown, the type of shape of the first recess 4a1 and the type of shape of the second recess 4a2 may be different from each other, such as the first recess 4a1 being rectangular and the second recess 4a2 being round.

[0047] Although not shown, the plurality of protrusions 5a also include a first protrusion and a second protrusion having mutually different shapes in a plan view. In the third embodiment, similarly to the first embodiment, a protrusion may be provided on the surface of the base plate 4, and a recess may be provided on the surface of the case 5.

[0048] <Summary of the Third Embodiment> In the semiconductor device according to the third embodiment, the multiple convex portions include a first convex portion and a second convex portion having mutually different shapes in a plan view, and the multiple concave portions include a first concave portion and a second concave portion having mutually different shapes in a plan view. According to such a configuration, as in the second embodiment, when the case 5 is rotated by 180° with respect to the base plate 4 from the designed state, one or more pairs of the convex portion and the concave portion do not engage with each other, so that assembly errors can be suppressed.

[0049] As shown in Fig. 6, the configuration of the third embodiment may be combined with the configuration of the second embodiment. With such a configuration, assembly errors can be further suppressed.

[0050] <Fourth embodiment> 7 is a cross-sectional view showing the configuration of a semiconductor device according to the present embodiment 4. In the present embodiment 4, the multiple protrusions 5a include first protrusions 5a1 and second protrusions 5a2 having different shapes in a cross-sectional view, and the multiple recesses 4a include first recesses 4a1 and second recesses 4a2 having different shapes in a cross-sectional view.

[0051] 7, as an example, the size of at least a part of the shape of the first recess 4a1 (e.g., the size of the width or the taper angle) is different from the size of at least a part of the shape of the second recess 4a2 (e.g., the size of the width or the taper angle). Although not shown, the type of shape of the first recess 4a1 and the type of shape of the second recess 4a2 may be different from each other, such as the first recess 4a1 being a zero-step taper shape and the second recess 4a2 being a one-step taper shape. The above also applies to the first convex portion 5a1 and the second convex portion 5a2.

[0052] <Summary of the fourth embodiment> In the semiconductor device according to the fourth embodiment, the plurality of convex portions include a first convex portion and a second convex portion having mutually different shapes in a cross-sectional view, and the plurality of concave portions include a first concave portion and a second concave portion having mutually different shapes in a cross-sectional view. According to such a configuration, as in the second embodiment, when the case 5 is rotated by 180° with respect to the base plate 4 from the designed state, one or more pairs of the convex portion and the concave portion do not engage with each other, so that an assembly error can be suppressed.

[0053] The configuration of the fourth embodiment may be combined with at least one of the configurations of the second embodiment and the third embodiment. With such a configuration, assembly errors can be further suppressed.

[0054] <Embodiment 5> 8 is a cross-sectional view showing the configuration of a semiconductor device according to the fifth embodiment. In the fifth embodiment, the multiple protrusions 5a are adjacent to each other in a direction from the center toward the outer periphery of the case 5, and the multiple recesses 4a are adjacent to each other in a direction from the center toward the outer periphery of the base plate 4. Note that the multiple protrusions 5a and the multiple recesses 4a may be provided on the entire periphery of the case 5 and the base plate 4, respectively.

[0055] <Summary of the fifth embodiment> According to the fifth embodiment as described above, the creepage distance from the outside of the base plate 4 and the case 5 to the internal space can be made longer than in the first embodiment, so that moisture can be further prevented from reaching the electrical components. Also, since the multiple protrusions are adjacent to each other and the multiple recesses are adjacent to each other, the overall size of the multiple protrusions and the overall size of the multiple recesses can be reduced, and as a result, the size of the semiconductor device can be reduced.

[0056] The configuration of the fifth embodiment may be combined with at least one of the configurations of the second, third, and fourth embodiments. For example, the shapes of the convex portions and concave portions may be different in the fifth embodiment. With such a configuration, assembly errors can be suppressed.

[0057] It should be noted that the embodiments and modifications may be freely combined, and the embodiments and modifications may be modified or omitted as appropriate. [Explanation of symbols]

[0058] REFERENCE SIGNS LIST 1 semiconductor element, 2 insulating substrate, 4 base plate, 4a recess, 4a1 first recess, 4a2 second recess, 5 case, 5a protrusion, 5a1 first protrusion, 5a2 second protrusion, 6 adhesive, 9 sealing material.

Claims

1. A semiconductor element; an insulating substrate on which the semiconductor element is mounted; A base plate on which the insulating substrate is mounted; a case mounted on the base plate and surrounding the semiconductor element and the insulating substrate; Equipped with One or more tapered projections are provided on a surface of the base plate or a surface of the case, one or more tapered recesses are provided on the other of the surface of the base plate and the surface of the case, the one or more protrusions being fitted thereto; The semiconductor device has mounting holes provided in the base plate and the case, the mounting holes penetrating the facing planes of the top of the protrusion and the bottom of the recess, which are fitted together, in a direction perpendicular to the planes.

2. 2. The semiconductor device according to claim 1, The semiconductor device, wherein the one or more convex portions or the one or more concave portions are asymmetrically arranged on the base plate or the case in a plan view.

3. 3. The semiconductor device according to claim 1, the one or more protrusions are a plurality of protrusions, The one or more recesses are a plurality of recesses respectively fitted with the plurality of protrusions.

4. 4. The semiconductor device according to claim 3, The plurality of convex portions include a first convex portion and a second convex portion having mutually different shapes in a plan view, The semiconductor device, wherein the plurality of recesses include a first recess and a second recess having mutually different shapes in a plan view.

5. 4. The semiconductor device according to claim 3, The plurality of protrusions include a first protrusion and a second protrusion that are different in shape from each other in a cross-sectional view, The semiconductor device, wherein the plurality of recesses include a first recess and a second recess having mutually different shapes in a cross-sectional view.

6. 4. The semiconductor device according to claim 3, The semiconductor device, wherein the plurality of protruding portions are adjacent to one another and the plurality of recessed portions are adjacent to one another.

7. 7. The semiconductor device according to claim 1, A gap is provided between the protruding portion and the recessed portion that face each other, At least one of an adhesive and a sealant is provided in the gap.

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