Photoelectric conversion device, photoelectric conversion system, and mobile body

Abstract

To provide a structure for a separation portion suitable for a device structure of an avalanche photodiode (APD).SOLUTION: An avalanche photodiode has a first semiconductor area of a first conductivity type with many carriers of a charge of the same polarity as a signal charge and a second semiconductor area of a second conductivity type. A separation portion provided between first and second photoelectric conversion elements has a trench structure. The top surface of the trench structure is located between the top surface of the second semiconductor area and the bottom surface of the second semiconductor area.SELECTED DRAWING: Figure 7

Description

[Technical field]

[0001] The present invention relates to a photoelectric conversion device. [Background technology]

[0002] There is known a photoelectric conversion device including an avalanche photodiode (APD). Patent Document 1 discloses a configuration in which an avalanche multiplication region is formed by a first semiconductor region having majority carriers of the same conductivity type as the conductivity type of the signal charge and a second semiconductor region of a second conductivity type, and the second semiconductor region is connected to a separation section.

[0003] 10 of Patent Document 1 discloses that the third semiconductor region of the second conductivity type is disposed deeper than the second semiconductor region, and that the second semiconductor region suppresses excessive expansion of the depletion layer deep into the semiconductor layer. This allows the avalanche multiplication region to be concentrated near the first semiconductor region, enabling avalanche multiplication at a low voltage. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2020-57651 A Summary of the Invention [Problem to be solved by the invention]

[0005] Patent Document 1 discloses the use of a second conductivity type semiconductor region as an isolating portion between pixels, and the use of both a semiconductor region and an insulator region. However, it does not propose a structure of the isolating portion suitable for the device structure of an APD. Therefore, an object of the present invention is to provide a structure of the isolating portion suitable for the device structure of an APD. [Means for solving the problem]

[0006] A photoelectric conversion device according to one embodiment comprises a semiconductor layer including a plurality of photoelectric conversion elements and having a first surface and a second surface opposite to the first surface through which light is incident, each of the plurality of photoelectric conversion elements includes an avalanche photodiode, the avalanche photodiode having a first semiconductor region of a first conductivity type having a charge of the same polarity as a signal charge as a majority carrier, and a second semiconductor region of a second conductivity type, each of the plurality of photoelectric conversion elements being separated by an isolation portion including a third semiconductor region of the second conductivity type, the second semiconductor region being arranged in contact with the third semiconductor region, the plurality of photoelectric conversion elements including a first photoelectric conversion element and a second photoelectric conversion element arranged in a first direction, the isolation portion provided between the first photoelectric conversion element and the second photoelectric conversion element having a trench structure, and the trench structure being arranged such that an upper surface of the trench structure is located between an upper surface of the second semiconductor region and a lower surface of the second semiconductor region. Effect of the Invention

[0007] According to the present invention, it is possible to provide a separation part structure suitable for the device structure of an APD. [Brief description of the drawings]

[0008] [Figure 1] 1 is a diagram showing a configuration of a photoelectric conversion device; [Diagram 2] Sensor board layout example [Diagram 3] Circuit board layout example [Figure 4] Block diagram including equivalent circuit of photoelectric conversion element [Diagram 5] A diagram showing the relationship between APD operation and output signal [Figure 6] 1 is a schematic plan view of a photoelectric conversion device according to a first embodiment. [Figure 7] Schematic cross-sectional view of a photoelectric conversion device according to embodiment 1. [Figure 8] 1 is a potential diagram of a pixel of a photoelectric conversion device according to embodiment 1. [Figure 9] 1 is a schematic plan view of a photoelectric conversion device according to a modified example of the first embodiment. [Figure 10] Schematic cross-sectional view of a photoelectric conversion device according to a modified example of the first embodiment. [Figure 11] Schematic plan view of a photoelectric conversion device according to embodiment 2. [Figure 12] Schematic cross-sectional view of a photoelectric conversion device according to embodiment 2. [Figure 13] 1 is a schematic plan view of a photoelectric conversion device according to a third embodiment. [Figure 14] Schematic cross-sectional view of a photoelectric conversion device according to embodiment 3. [Figure 15] 11 is a schematic cross-sectional view of a photoelectric conversion device according to another example of embodiment 3. [Figure 16] 13 is a schematic plan view of a photoelectric conversion device according to a modified example of the third embodiment. [Figure 17] 13 is a schematic cross-sectional view of a photoelectric conversion device according to a modified example of the third embodiment. [Figure 18] Block diagram of a photoelectric conversion system according to a fourth embodiment [Figure 19] Block diagram of a photoelectric conversion system according to a fifth embodiment [Figure 20] Block diagram of a photoelectric conversion system according to a sixth embodiment [Figure 21] Block diagram of a photoelectric conversion system according to a seventh embodiment [Figure 22] FIG. 13 is a diagram showing a specific example of a photoelectric conversion system according to an eighth embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] The following embodiments are intended to embody the technical ideas of the present invention, and are not intended to limit the present invention. The sizes and positional relationships of the components shown in the drawings may be exaggerated to clarify the description. In the following description, the same components may be designated by the same reference numerals, and the description may be omitted.

[0010] Hereinafter, the embodiments will be described in detail with reference to the drawings. In the following description, terms indicating specific directions or positions (for example, "upper", "lower", "right", "left" and other terms including these terms) will be used as necessary. The use of these terms is for the purpose of facilitating understanding of the embodiments with reference to the drawings, and the technical scope of the present invention is not limited by the meaning of these terms.

[0011] In the following description, the anode of the avalanche photodiode (hereinafter, APD) is set to a fixed potential, and a signal is taken from the cathode side. Therefore, the first conductive type semiconductor region having charges of the same polarity as the signal charge as the majority carrier is an N-type semiconductor region, and the second conductive type semiconductor region having charges of a polarity opposite to the signal charge as the majority carrier is a P-type semiconductor region. The present invention is also valid when the cathode of the APD is set to a fixed potential, and a signal is taken from the anode side. In this case, the first conductive type semiconductor region having charges of the same polarity as the signal charge as the majority carrier is a P-type semiconductor region, and the second conductive type semiconductor region having charges of a polarity opposite to the signal charge as the majority carrier is an N-type semiconductor region. In the following, a case where one node of the APD is set to a fixed potential will be described, but the potentials of both nodes may fluctuate.

[0012] In this specification, when the term "impurity concentration" is used simply, it means the net impurity concentration minus the amount compensated by the impurity of the opposite conductivity type. In other words, "impurity concentration" refers to the NET doping concentration. A region where the P-type doped impurity concentration is higher than the N-type doped impurity concentration is a P-type semiconductor region. Conversely, a region where the N-type doped impurity concentration is higher than the P-type doped impurity concentration is an N-type semiconductor region.

[0013] In this specification, the term "planar view" refers to a view from a direction perpendicular to the surface of the semiconductor layer opposite to the light incident surface described below. Also, the term "cross section" refers to a surface in a direction perpendicular to the surface of the semiconductor layer opposite to the light incident surface. Note that, when the light incident surface of the semiconductor layer is a rough surface when viewed microscopically, the planar view is defined based on the light incident surface of the semiconductor layer when viewed macroscopically.

[0014] The semiconductor layer 300 has a first surface and a second surface, which is the surface opposite to the first surface and on which light is incident. In this specification, the depth direction is the direction from the first surface of the semiconductor layer 300 on which the APD is arranged toward the second surface. Hereinafter, the "first surface" may be referred to as the "front surface" and the "second surface" may be referred to as the "back surface." The direction from a predetermined position on the semiconductor layer 300 toward the back surface of the semiconductor layer 300 may be expressed as "deep." Also, the direction from a predetermined position on the semiconductor layer 300 toward the front surface of the semiconductor layer 300 may be expressed as "shallow."

[0015] First, a configuration common to each embodiment will be described with reference to FIGS. 1 to 5. FIG.

[0016] FIG. 1 is a diagram showing the configuration of a stacked photoelectric conversion device 100. The photoelectric conversion device 100 is configured by stacking and electrically connecting two substrates, a sensor substrate 11 and a circuit substrate 21. The sensor substrate 11 has a first semiconductor layer (semiconductor layer 300) having a photoelectric conversion element 102 described later, and a first wiring structure. The circuit substrate 21 has a second semiconductor layer having circuits such as a signal processing portion 103 described later, and a second wiring structure. The photoelectric conversion device 100 is configured by stacking the second semiconductor layer, the second wiring structure, the first wiring structure, and the first semiconductor layer in this order. The photoelectric conversion device described in each embodiment is a back-illuminated photoelectric conversion device in which light is incident from the second surface and a circuit substrate is disposed on the first surface.

[0017] In the following, the sensor substrate 11 and the circuit substrate 21 will be described as diced chips, but are not limited to chips. For example, each substrate may be a wafer. Also, each substrate may be stacked in a wafer state and then diced, or each chip may be stacked and bonded after being chipped from the wafer state.

[0018] A pixel region 12 is disposed on the sensor substrate 11, and a circuit region 22 that processes signals detected in the pixel region 12 is disposed on the circuit substrate 21.

[0019] 2 is a diagram showing an example of the arrangement of the sensor substrate 11. Pixels 104, each having a photoelectric conversion element 102 including an APD, are arranged in a two-dimensional array in a plan view to form a pixel region 12.

[0020] The pixel 104 is typically a pixel for forming an image, but when used for TOF (Time of Flight), it does not necessarily have to form an image. That is, the pixel 104 may be a pixel for measuring the time when light arrives and the amount of light.

[0021] 3 is a configuration diagram of the circuit board 21. It has a signal processing unit 103 that processes electric charges photoelectrically converted by the photoelectric conversion element 102 in FIG. 2, a readout circuit 112, a control pulse generating unit 115, a horizontal scanning circuit unit 111, a signal line 113, and a vertical scanning circuit unit 110.

[0022] The photoelectric conversion element 102 in FIG. 2 and the signal processing unit 103 in FIG. 3 are electrically connected via connection wiring provided for each pixel.

[0023] The vertical scanning circuit section 110 receives a control pulse supplied from a control pulse generating section 115 and supplies the control pulse to each pixel. The vertical scanning circuit section 110 uses logic circuits such as a shift register and an address decoder.

[0024] The signal output from the photoelectric conversion element 102 of the pixel is processed by a signal processing unit 103. The signal processing unit 103 is provided with a counter, a memory, etc., and digital values ​​are held in the memory.

[0025] The horizontal scanning circuit unit 111 inputs a control pulse for sequentially selecting each column to the signal processing unit 103 in order to read out the signal from the memory of each pixel in which the digital signal is held.

[0026] A signal is output to the signal line 113 from the signal processing unit 103 of the pixel selected by the vertical scanning circuit unit 110 for the selected column.

[0027] The signal output to the signal line 113 is output via an output circuit 114 to a recording unit or a signal processing unit outside the photoelectric conversion device 100 .

[0028] 2, the photoelectric conversion elements in the pixel region may be arranged one-dimensionally. The function of the signal processing unit does not necessarily need to be provided for each of the photoelectric conversion elements, and for example, one signal processing unit may be shared by a plurality of photoelectric conversion elements to perform signal processing sequentially.

[0029] 2 and 3, a plurality of signal processing units 103 are arranged in a region overlapping the pixel region 12 in a planar view. A vertical scanning circuit unit 110, a horizontal scanning circuit unit 111, a readout circuit 112, an output circuit 114, and a control pulse generating unit 115 are arranged so as to overlap between an end of the sensor substrate 11 and an end of the pixel region 12 in a planar view. In other words, the sensor substrate 11 has the pixel region 12 and a non-pixel region arranged around the pixel region 12. A vertical scanning circuit unit 110, a horizontal scanning circuit unit 111, a readout circuit 112, an output circuit 114, and a control pulse generating unit 115 are arranged in a region overlapping the non-pixel region in a planar view.

[0030] FIG. 4 is an example of a block diagram including the equivalent circuits of FIG. 2 and FIG.

[0031] In FIG. 2, a photoelectric conversion element 102 having an APD 201 is provided on a sensor substrate 11, and other members are provided on a circuit substrate 21.

[0032] The APD 201 generates charge pairs according to the incident light by photoelectric conversion. A voltage VL (first voltage) is supplied to the anode of the APD 201. A voltage VH (second voltage) higher than the voltage VL supplied to the anode is supplied to the cathode of the APD 201. A reverse bias voltage that causes the APD 201 to perform avalanche multiplication is supplied to the anode and cathode. With such a voltage supplied, the charges generated by the incident light undergo avalanche multiplication, generating an avalanche current.

[0033] When a reverse bias voltage is supplied, the mode in which the potential difference between the anode and cathode is greater than the breakdown voltage is called the Geiger mode, whereas the mode in which the potential difference between the anode and cathode is close to or less than the breakdown voltage is called the linear mode.

[0034] An APD operated in the Geiger mode is called a SPAD (Single Photon Avalanche Diode). For example, the voltage VL (first voltage) is −30 V, and the voltage VH (second voltage) is 1 V. The APD 201 may be operated in either the linear mode or the Geiger mode.

[0035] The quench element 202 is connected to a power supply that supplies a voltage VH and the APD 201. The quench element 202 functions as a load circuit (quench circuit) during signal multiplication by avalanche multiplication, and has a function of suppressing avalanche multiplication by suppressing the voltage supplied to the APD 201 (quench operation). The quench element 202 also has a function of returning the voltage supplied to the APD 201 to the voltage VH by flowing a current equivalent to the voltage drop caused by the quench operation (recharge operation).

[0036] The signal processing section 103 has a waveform shaping section 210, a counter circuit 211, and a selection circuit 212. In this specification, it is sufficient that the signal processing section 103 has any one of the waveform shaping section 210, the counter circuit 211, and the selection circuit 212.

[0037] The waveform shaping unit 210 shapes the potential change of the cathode of the APD 201 obtained when a photon is detected, and outputs a pulse signal. For example, an inverter circuit is used as the waveform shaping unit 210. Although an example in which one inverter is used as the waveform shaping unit 210 is shown in Fig. 4, a circuit in which a plurality of inverters are connected in series may be used, or another circuit having a waveform shaping effect may be used.

[0038] The counter circuit 211 counts the pulse signal output from the waveform shaping unit 210 and holds the count value. When a control pulse pRES is supplied via a drive line 213, the signal held in the counter circuit 211 is reset.

[0039] A control pulse pSEL is supplied to the selection circuit 212 from the vertical scanning circuit unit 110 in Fig. 3 via a drive line 214 (not shown in Fig. 3) in Fig. 4, and switches between electrical connection and non-connection between the counter circuit 211 and the signal line 113. The selection circuit 212 includes, for example, a buffer circuit for outputting a signal.

[0040] The electrical connection may be switched by disposing a switch such as a transistor between the quench element 202 and the APD 201 or between the photoelectric conversion element 102 and the signal processing unit 103. Similarly, the supply of the voltage VH or the voltage VL to the photoelectric conversion element 102 may be electrically switched using a switch such as a transistor.

[0041] In this embodiment, a configuration using the counter circuit 211 has been shown. However, instead of the counter circuit 211, a photoelectric conversion device 100 may be configured to acquire the pulse detection timing using a time-to-digital converter (hereinafter, TDC) and a memory. In this case, the generation timing of the pulse signal output from the waveform shaping unit 210 is converted into a digital signal by the TDC. To measure the timing of the pulse signal, a control pulse pREF (reference signal) is supplied to the TDC from the vertical scanning circuit unit 110 in FIG. 1 via a drive line. The TDC acquires, as a digital signal, a signal obtained by converting the input timing of the signal output from each pixel via the waveform shaping unit 210 into a relative time based on the control pulse pREF.

[0042] FIG. 5 is a diagram showing a schematic diagram of the relationship between the operation of an APD and an output signal.

[0043] Fig. 5(a) is a diagram in which the APD 201, the quench element 202, and the waveform shaping unit 210 of Fig. 4 are extracted. Here, the input side of the waveform shaping unit 210 is node A, and the output side is node B. Fig. 5(b) shows the waveform change of node A in Fig. 5(a), and Fig. 5(c) shows the waveform change of node B in Fig. 5(a).

[0044] Between time t0 and time t1, a potential difference of VH-VL is applied to the APD 201 in FIG. 5(a). When a photon is incident on the APD 201 at time t1, avalanche multiplication occurs in the APD 201, an avalanche multiplication current flows through the quench element 202, and the voltage at nodeA drops. When the voltage drop amount becomes larger and the potential difference applied to the APD 201 becomes smaller, the avalanche multiplication of the APD 201 stops as at time t2, and the voltage level at nodeA does not drop by more than a certain value. After that, between time t2 and time t3, a current that compensates for the voltage drop from the voltage VL flows through nodeA, and at time t3, nodeA is stabilized to the original potential level. At this time, the part of the output waveform at nodeA that exceeds a certain threshold is shaped by the waveform shaping unit 210 and output as a signal at nodeB.

[0045] The arrangement of the signal lines 113, the readout circuits 112, and the output circuits 114 is not limited to that shown in Fig. 3. For example, the signal lines 113 may be arranged to extend in the row direction, and the readout circuits 112 may be arranged at the ends of the signal lines 113.

[0046] The photoelectric conversion devices of the respective embodiments will be described below.

[0047] (Embodiment 1) The photoelectric conversion device according to the first embodiment will be described with reference to FIGS.

[0048] FIG. 6 is a schematic plan view of four pixels (2×2) among the multiple pixels included in the pixel region 12. FIG. 6 shows a plan view of the semiconductor layer 300. Note that FIG. 6 is a schematic view, and may be expressed in a see-through state of a certain member. Specifically, as shown in FIG. 7(a) described below, the trench structure 321 is not exposed on the first surface of the semiconductor layer 300, and the fourth semiconductor region 314 is exposed on the first surface. However, in FIG. 6, in order to emphasize the location of the trench structure 321, some members are shown in a see-through state.

[0049] Fig. 7(a) is a schematic cross-sectional view taken along line A-A' in Fig. 6, i.e., in a first direction, and Fig. 7(b) is a schematic cross-sectional view taken along line B-B' in Fig. 6, i.e., in a second direction intersecting with the first direction. In Fig. 7, the first direction and the second direction are perpendicular to each other. In Fig. 7, the first direction is the opposite side direction, and the second direction is the diagonal direction.

[0050] 6, each pixel 104 includes at least one APD. In the following description, a form in which the pixel 104 is configured with one APD will be described, but the pixel 104 may be configured to include multiple APDs. For convenience, the APD arranged in the direction opposite the first APD will be referred to as the second APD below, and the APD arranged in the diagonal direction of the first APD will be referred to as the third APD below.

[0051] Although each semiconductor region will be described in detail later, Fig. 6 shows a first semiconductor region 311 of a first conductivity type (e.g., N type) for forming an avalanche multiplication region of the APD. A third semiconductor region 313 is disposed around the first semiconductor region 311.

[0052] In FIG. 6, a sixth semiconductor region 316 of a second conductivity type (for example, P type) to which a contact plug is connected is disposed between the first semiconductor region 311 of the first APD and the first semiconductor region 311 of the third APD.

[0053] Between each pixel, an isolation portion including a fourth semiconductor region 314 of the second conductivity type is disposed. The fourth semiconductor region 314 of the second conductivity type is disposed so as to isolate the opposite side and the diagonal direction. In a plan view, the sixth semiconductor region 316 is disposed so as to overlap with the fourth semiconductor region 314. In addition, a trench structure 321 is provided so as to isolate each pixel in the opposite side direction.

[0054] The trench structure 321 preferably includes a material different from that of the semiconductor layer 300. The trench structure 321 preferably includes a reflective material or a light absorbing material. The reflective material or the light absorbing material is, for example, a material that reflects or absorbs 20% or more. For example, the trench structure 321 includes at least one of an insulating member, air, and a metal. When the semiconductor layer 300 is silicon, examples of the insulating member include a silicon oxide film and a silicon nitride film. This makes it possible to reduce crosstalk to adjacent APDs. More preferably, the trench structure 321 includes at least one of an insulating member and a metal. In the avalanche multiplication region 302, a phenomenon called avalanche emission may occur. This is a phenomenon in which electrons, which are hot carriers generated by avalanche multiplication, recombine with holes to generate photons. When the photons caused by this avalanche emission leak into adjacent pixels and are photoelectrically converted, electron-hole pairs are generated. In other words, photons generated by avalanche emission, not incident light, are read out as signals from adjacent pixels, resulting in false signals. By including a light-shielding member such as a metal in the trench structure 321, it is possible to prevent photons from entering adjacent pixels even when avalanche emission occurs.

[0055] In the following description, a configuration in which the pixel 104 is configured with one APD will be described, but the pixel 104 may be configured to include a plurality of APDs.

[0056] As shown in FIG. 7(a), the semiconductor layer 300 is provided with the semiconductor regions constituting the pixel 104. The APD includes at least a first semiconductor region 311 of a first conductivity type and a second semiconductor region 312 of a second conductivity type. The first semiconductor region 311 and the second semiconductor region 312 form a PN junction. The impurity concentration of the first semiconductor region 311 is higher than the impurity concentration of the second semiconductor region 312. In addition, the avalanche multiplication region 302 is formed by applying a predetermined reverse bias voltage to the first semiconductor region 311 and the second semiconductor region 312. The first semiconductor region 311 is connected to a contact plug 130, and a voltage is applied via the contact plug 130. Note that a plurality of contact plugs 130 may be provided.

[0057] A semiconductor region 301 of a first conductivity type having a lower impurity concentration than the first semiconductor region 311 may be disposed between the first semiconductor region 311 and the second semiconductor region 312. The semiconductor region 301 may be of the first conductivity type or the second conductivity type.

[0058] A third semiconductor region 313 of the first conductivity type is disposed at an end of the first semiconductor region 311 in order to relax the electric field. The third semiconductor region 313 may be composed of a semiconductor region of the second conductivity type as long as the purpose of relaxing the electric field can be achieved. The impurity concentration of the third semiconductor region 313 is lower than that of the first semiconductor region 311 in the case of the first conductivity type, and is lower than that of the second semiconductor region 312 in the case of the second conductivity type. The difference in impurity concentration between the third semiconductor region 313 and the first semiconductor region 311 or the second semiconductor region 312 is two times or more different. The third semiconductor region is an additional semiconductor region and may not be provided.

[0059] 7(a) and 7(b), a fourth semiconductor region 314 of the second conductivity type is arranged to separate the opposite sides and diagonal directions between each pixel. A second semiconductor region 312 of the second conductivity type is arranged in contact with the fourth semiconductor region 314. A fifth semiconductor region 315 of the second conductivity type is arranged in contact with the fourth semiconductor region 314.

[0060] A fifth semiconductor region 315 of the second conductivity type is disposed at a position deeper than the second semiconductor region 312. The fifth semiconductor region 315 of the second conductivity type is disposed in contact with the fourth semiconductor region 314. In a plan view, the fifth semiconductor region 315 may be disposed on the entire surface of the pixel 104, and a part of the fifth semiconductor region 315 may overlap with the fourth semiconductor region 314. In Figs. 7(a) and (b), the fifth semiconductor region 315 is disposed in contact with the back surface of the semiconductor layer 300, but may be disposed away from the back surface. Note that Figs. 7(a) and (b) show an example in which the fifth semiconductor region 315 of the second conductivity type is formed by ion implantation, but the semiconductor layer does not necessarily have to be formed by ion implantation. For example, a pinning film may be disposed on the back surface of the semiconductor layer 300, and the fifth semiconductor region 315 may not be formed by ion implantation. A known material may be used for the pinning film.

[0061] Although not shown, a planarization layer, a filter layer, a microlens, etc. may be disposed on the back surface of the semiconductor layer 300. The filter layer may be a variety of optical filters such as a color filter, an infrared light cut filter, a monochrome filter, etc. The color filter may be an RGB color filter, an RGBW color filter, etc.

[0062] Between the second semiconductor region 312 and the fifth semiconductor region 315, a seventh semiconductor region 317 of the first conductivity type is provided. The impurity concentration of the seventh semiconductor region 317 is higher than the impurity concentration of the semiconductor region 301 provided around the seventh semiconductor region 317. With this configuration, the potential of the seventh semiconductor region 317 becomes lower than the potential of the semiconductor region 301 for the signal charge, and it becomes possible to collect more charges in the avalanche multiplication region 302. The seventh semiconductor region 317 is a semiconductor region provided as necessary, and may not be provided. In the cross-sectional view of FIG. 7, the seventh semiconductor region 317 is provided away from the second semiconductor region 312, but a part of the seventh semiconductor region 317 and the second semiconductor region 312 may be in contact with each other.

[0063] 7(a), a trench structure 321 is disposed from the back surface side of the semiconductor layer 300. The trench structure 321 is provided so as to be contained in the fourth semiconductor region 314. That is, in the opposite side direction, pixels are separated by both the trench structure 321 and the second conductivity type fourth semiconductor region 314.

[0064] 7(b), no trench structure 321 is provided in the diagonal direction, and pixels are separated only by the fourth semiconductor region 314. Since the trench structure 321 is not provided between pixels in the diagonal direction, the electrical resistance from the contact plug 131 to the fifth semiconductor region 315 can be reduced. This makes it easier to form a potential gradient in a direction perpendicular to the semiconductor layer 300, and shortens the time required for signal charges to be collected in the avalanche multiplication region 302.

[0065] A sixth semiconductor region 316 of the second conductivity type is provided in the fourth semiconductor region 314 of the second conductivity type on the front surface side of the semiconductor layer 300. The impurity concentration of the sixth semiconductor region 316 is higher than the impurity concentration of the fourth semiconductor region 314. With this configuration, by connecting the sixth semiconductor region 316 to the contact plug 131, it is possible to make the contact resistance between the metal and the semiconductor lower than the contact resistance when the fourth semiconductor region 314 and the contact plug 131 are connected.

[0066] By applying a predetermined reverse bias voltage between the contact plug 131 connected to the sixth semiconductor region 316 and the contact plug 130 connected to the first semiconductor region 311, the avalanche multiplication region 302 can be formed.

[0067] In the above, an example has been described in which the contact plugs 131 are arranged in the diagonal direction between the pixels, and are not arranged in the opposite side direction between the pixels. However, since the contact plugs 131 only need to be configured to be able to supply a potential to the second semiconductor region 312, the contact plugs may be arranged in the opposite side direction between the pixels. In this case, the contact plugs are connected to the upper surface of the fourth semiconductor region 314 shown in FIG. 7(a). Also, a semiconductor region of a second conductivity type having a higher impurity concentration than the fourth semiconductor region 314 may be provided between the fourth semiconductor region 314 and the contact plug, and the semiconductor region and the contact plug may be connected.

[0068] (Arrangement of semiconductor regions at each position and relationship with potential) At the first depth D1, a first semiconductor region 331 of a first conductivity type, a third semiconductor region 313 of a first conductivity type or a second conductivity type, a semiconductor region 301 of a first conductivity type or a second conductivity type, a fourth semiconductor region 314 of a second conductivity type, and a sixth semiconductor region 316 of a second conductivity type are arranged.

[0069] The first semiconductor region 331 and the third semiconductor region 313 are in contact with each other in a planar view. Moreover, the third semiconductor region 313 and the semiconductor region 301 are in contact with each other in a planar view.

[0070] Here, each semiconductor region being disposed at the first depth D1 means, for example, that the concentration peak of the ion-implanted impurity is disposed at the first depth D1. However, the peak does not necessarily have to be disposed at the first depth D1, and it is sufficient that a region in which the impurity is recognized as having been diffused is provided.

[0071] The second depth D2 is deeper than the first depth D1. In other words, the second depth D2 is closer to the back surface side of the semiconductor layer 300 than the first depth D1. At the second depth D, the second semiconductor region 312 and the fourth semiconductor region 314 are disposed.

[0072] The third depth D3 is deeper than the second depth D2. In other words, the third depth D3 is closer to the back surface side of the semiconductor layer 300 than the second depth D2. The seventh semiconductor region 317, the semiconductor region 301, the trench structure 321, and the fourth semiconductor region 314 are disposed at the third depth D3.

[0073] The fourth depth D4 is located deeper than the third depth D3. In other words, the fourth depth D4 is located closer to the back surface of the semiconductor layer 300 than the third depth D3. The fifth semiconductor region 315, the trench structure 321, and the fourth semiconductor region 314 are disposed at the fourth depth D4.

[0074] FIG. 8 shows a potential diagram for the APD of FIGS.

[0075] 8, a dotted line 20 indicates the potential distribution of a line segment DD', and a solid line 30 indicates the potential distribution of a line segment CC'. D1 to D4 in the depth direction on the horizontal axis in FIG. 8 correspond to D1 to D4 in FIG.

[0076] With respect to the dotted line 20 in Fig. 8, the potential gradually decreases from the depth D4 toward the depth D3. Since the seventh semiconductor region 317 arranged at the depth D3 is of the first conductivity type and the second semiconductor region 312 arranged at the depth D2 is of the second conductivity type, the potential gradually increases from the depth D3 toward the depth D2. On the other hand, the third semiconductor region 313 arranged at the depth D1 is of the first conductivity type or of the second conductivity type having a lower impurity concentration than the second semiconductor region 312. Therefore, the potential decreases from the depth D2 toward the depth D1.

[0077] On the other hand, the solid line 30 has the same tendency as the dotted line 20 in that the potential gradually decreases from depth D4 to depth D3. However, in the solid line 30, the potential gradually decreases from depth D3 to depth D2. In addition, the potential decreases steeply from depth D2 to depth D1. From depth D4 to D3, the potential gradients of the dotted line 20 and the solid line 30 show almost the same tendency, and the potential gradient decreases gradually. Therefore, the charge generated in the photodetector moves to the front surface side (first surface side) of the semiconductor layer 300 due to the gentle potential gradient.

[0078] As described above, the first semiconductor region 311 and the second semiconductor region 312 form a PN junction, but the impurity concentration of the second semiconductor region 312 is lower than that of the first semiconductor region 311. Therefore, when a potential that becomes a reverse bias is supplied to the first semiconductor region 311 and the second semiconductor region 312, a depletion layer region is formed on the second semiconductor region 312 side. In this case, a large electric field is applied to the center of the second semiconductor region 312 around the avalanche multiplication region 302, whereas only a small electric field is applied to the peripheral portion of the second semiconductor region 312. Therefore, at the position of the depth D2, the potential of the solid line 30 is significantly lowered, and at the depth D2, the potential of the solid line 30 is lower than the potential of the dotted line 20. On the other hand, since only a small electric field is applied to the peripheral portion of the second semiconductor region 312, the potential relationship corresponding to the difference in the conductivity type or the difference in the impurity concentration of each semiconductor region is maintained.

[0079] 8, the potential height for electrons, which are signal charges, is lower in the center of the second semiconductor region 312 than in the peripheral portion. This makes it easier for photoelectrically converted charges to move toward the center of the second semiconductor region 312.

[0080] The charges that have moved to the vicinity of the center of the second semiconductor region 312 are accelerated by the steep potential gradient from depth D2 to depth D1 of the solid line 30 in FIG.

[0081] In contrast, the potential distribution does not cause avalanche multiplication from depth D2 to depth D1 of the dotted line 20 in Fig. 8. Therefore, the generated charges can be counted as signal charges without increasing the area of ​​the avalanche multiplication region 302 relative to the pixel size.

[0082] An example of the impurity concentration of each semiconductor region will be specifically described below. Here, the first conductivity type is N-type, and the second conductivity type is P-type.

[0083] The impurity concentration of the sixth semiconductor region 316 in FIG. 19 ~10 20 [atoms / cm 3 ] degree.

[0084] The N-type first semiconductor region 311 has a higher impurity concentration than the N-type seventh semiconductor region 317. For example, the impurity concentration of the N-type first semiconductor region 311 is 1×10 18 [atoms / (cm 3 )], and a potential that serves as a reverse bias with respect to the fourth semiconductor region 314 is supplied to the N-type first semiconductor region 311.

[0085] The N-type third semiconductor region 313 has an impurity concentration lower than that of the N-type first semiconductor region 311. For example, the impurity concentration of the N-type third semiconductor region 313 is 1×10 16 ~5×10 17 [atoms / cm 3 If the third semiconductor region 313 is P-type, an avalanche multiplication electric field may be formed between the first semiconductor region 311 and the third semiconductor region 313 depending on the impurity concentration of the third semiconductor region 313, which may cause noise deterioration.

[0086] The impurity concentration of the P-type second semiconductor region 312 is set to be lower than the impurity concentration of the P-type fourth semiconductor region 314. For example, the impurity concentration of the P-type second semiconductor region 312 is set to be lower than the impurity concentration of the P-type fourth semiconductor region 314. 16 ~5×10 17[atoms / cm 3 ] degree.

[0087] 7, it is assumed that the P-type second semiconductor region 312 is not provided, and an N-type seventh semiconductor region 317 having a lower impurity concentration than the N-type first semiconductor region 311 is disposed immediately below the N-type first semiconductor region 311. In this case, it is possible to generate charges in the seventh semiconductor region 317 and read out the charges from the N-type first semiconductor region 311.

[0088] However, it is difficult to perform avalanche multiplication under voltage conditions equivalent to those of this embodiment. This is because most of the potential difference of the reverse bias is applied to the depletion layer region of the N-type seventh semiconductor region 317, and the potential difference applied to the avalanche multiplication region near the N-type first semiconductor region 311 becomes small. On the other hand, in this embodiment, the N-type seventh semiconductor region 317 is surrounded by P-type semiconductor regions in each direction, so the potential of the N-type seventh semiconductor region 317 is at a level closer to the surrounding P-type semiconductor region than the N-type first semiconductor region 311. That is, by suppressing excessive spread of the depletion layer deep into the semiconductor layer with the P-type second semiconductor region 312, it is possible to concentrate most of the applied potential difference in the avalanche multiplication region near the N-type first semiconductor region 311. As a result, the photocharge can be avalanche multiplied at a lower voltage. At this time, the impurity concentration of the N-type seventh semiconductor region 317 needs to be lower than the impurity concentration of the N-type first semiconductor region 311.

[0089] 7, the N-type seventh semiconductor region 317 is shown as an example of a region having the same impurity concentration. However, it is preferable that the N-type seventh semiconductor region 317 has an impurity concentration gradient so as to form a potential structure in which charges move toward the first surface side of the semiconductor layer 300. By providing such an impurity concentration gradient, it is possible to facilitate the movement of charges to the N-type seventh semiconductor region 317.

[0090] 7, the P-type second semiconductor region 312 is shown as an impurity region having the same impurity concentration. However, any configuration may be adopted as long as the potential of the central portion of the second semiconductor region 312 is lower than the potential of the peripheral portion. For example, a configuration may be adopted in which the impurity concentration of the peripheral portion of the second semiconductor region 312 is higher than the impurity concentration of the central portion of the P-type second semiconductor region 312. Furthermore, the central portion of the second semiconductor region 312 may be an N-type semiconductor region.

[0091] The thickness of the semiconductor layer 300 can be appropriately set depending on the wavelength at which light is detected. The color of light detected by the photoelectric conversion device can be set according to the purpose, such as blue, green, red, or infrared light. The peak wavelength of the light detected by the photoelectric conversion device can be set, for example, within the range of 350 nm or more and 1000 nm or less.

[0092] In FIG. 7(a), position 470 where the upper surface of trench structure 321 is provided is between position 460 where the upper surface of second semiconductor region 312 is provided and position 450 where the lower surface of second semiconductor region 312 is provided.

[0093] As described above, the trench structure 321 is provided to reduce crosstalk to adjacent APDs. Here, crosstalk includes not only crosstalk of incident light but also crosstalk due to avalanche emission. Therefore, in order to reduce crosstalk, the upper surface of the trench structure 321 (corresponding to the "lower surface" during the trench structure formation process) should be provided until it reaches the upper surface of the semiconductor layer 300. Alternatively, the trench structure 321 should be provided so that the upper surface of the trench structure 321 is located between the upper surface of the second semiconductor region 312 and the upper surface of the semiconductor layer 300.

[0094] However, when the upper surface of the trench structure 321 is provided near the upper surface of the semiconductor layer 300 in this manner, the potential supply from the contact plug 131 to the fourth semiconductor region 314 may be insufficient due to the influence of the trench structure 321. This may increase the reverse bias voltage required for avalanche multiplication, resulting in increased power consumption.

[0095] Therefore, in this embodiment, the upper surface of the trench structure 321 is 2 Semiconductor Area 31 2 This structure is such that the fourth semiconductor region 314 is located between the upper and lower surfaces of the first semiconductor region 312. This reduces crosstalk, and also allows the potential to be appropriately supplied to the fourth semiconductor region 314, thereby reducing power consumption. In addition, the avalanche efficiency can be stabilized, and a decrease in sensitivity can be suppressed.

[0096] (Modification of the first embodiment) In the above embodiment 1, an example has been described in which the trench structures 321 are provided in the opposite side direction but not in the diagonal direction. However, the photoelectric conversion device may be configured so that the trench structures 321 are provided in both the opposite side direction and the diagonal direction.

[0097] 9 is a plan view of four 2×2 pixels on the first surface of the semiconductor layer 300. In FIG. 9, a trench structure 321 is also arranged at a position overlapping with the sixth semiconductor region 316.

[0098] FIG. 10(a) is a schematic cross-sectional view taken along line A-A' in FIG. 9, that is, in the opposite side direction, and FIG. 10(b) is a schematic cross-sectional view taken along line B-B' in FIG. 9, that is, in the diagonal direction. As shown in FIG. 10(b), a trench structure 321 is also arranged in the diagonal direction. Also in FIG. 10(b), the upper surface of the trench structure 321 is configured to be located between a position 460 on the upper surface of the second semiconductor region 312 and a position 450 on the lower surface. This allows the potential to be appropriately supplied to the second semiconductor region 312, and reduces power consumption. In addition, by arranging the trench structure 321 in the diagonal direction, crosstalk between pixels arranged in the diagonal direction can be further suppressed.

[0099] (Embodiment 2) A photoelectric conversion device according to embodiment 2 will be described with reference to Fig. 11 and Fig. 12. The difference from embodiment 1 is that the upper surface of the second conductivity type fourth semiconductor region 314 in the opposite side direction does not reach the first surface of the semiconductor layer 300.

[0100] FIG. 11 is a schematic plan view of a semiconductor layer 300 in which the APD of the photoelectric conversion device according to this embodiment is disposed.

[0101] 12(a) is a schematic cross-sectional view taken along line AA' in FIG. 11, ie, in the opposite side direction, and FIG. 12(b) is a schematic cross-sectional view taken along line BB' in FIG. 11, ie, in the diagonal direction.

[0102] 12(a), the upper surface of the second conductive type fourth semiconductor region 314 is configured to be located between position 460 of the upper surface of the second semiconductor region 312 and the upper surface (first surface) of the semiconductor layer 300. That is, in FIG. 12(a), the upper surface (one end) of the fourth semiconductor region 314 is disposed at a position shallower than the second semiconductor region 312 and deeper than the first surface of the semiconductor layer 300, and the fourth semiconductor region 314 is disposed away from the first surface of the semiconductor layer 300.

[0103] It is assumed that the fourth semiconductor region 314 is continuously disposed from the second surface to the first surface of the semiconductor layer 300 between the first APD and the second APD disposed in the opposite direction to the first APD. In this case, an electric field of a predetermined level or higher may be generated between the first semiconductor region 311 or the third semiconductor region 313 and the fourth semiconductor region 314. On the other hand, if the upper surface of the fourth semiconductor region 314 is located lower than the upper surface of the second semiconductor region 312, a depletion layer extending laterally from the first semiconductor region 311 of the first APD and a depletion layer extending laterally from the first semiconductor region 311 of the second APD may be connected. This may cause charge crosstalk (punch-through) between the first semiconductor region 311 of the first APD and the first semiconductor region 311 of the second APD.

[0104] In contrast, according to the present embodiment, in the opposite side direction, the upper surface of the fourth semiconductor region 314 is disposed at a position deeper than the first surface and shallower than the upper surface of the second semiconductor region 312. Therefore, it is possible to reduce the occurrence of electric field concentration in the lateral direction while making punch-through less likely to occur.

[0105] As shown in FIG. 12(b), in the diagonal direction, the fourth semiconductor region 314 is continuously arranged from the first surface to the same depth as the depth at which the fifth semiconductor region 315 is arranged. The distance between the APDs in the diagonal direction is greater than the distance between the APDs in the opposite side direction. Therefore, the distance between the fourth semiconductor region 314 and the first semiconductor region 311 or the third semiconductor region 313 is greater in the diagonal direction compared to the opposite side direction. Therefore, even if the fourth semiconductor region 314 is continuously arranged up to the first surface of the semiconductor layer 300 in the diagonal direction, electric field concentration in the lateral direction is less likely to occur compared to the opposite side direction. Therefore, in the diagonal direction, the fourth semiconductor region 314 is continuously arranged up to the first surface of the semiconductor layer 300 in consideration of applying a voltage to the second semiconductor region 312 through the contact plug 131. Since it is sufficient that the fourth semiconductor region 314 is in contact with the sixth semiconductor region 316, it is not necessary for the fourth semiconductor region 314 to be provided continuously up to the first surface of the semiconductor layer 300. It is sufficient that at least the fourth semiconductor region 314 and the sixth semiconductor region 316 are in contact with each other.

[0106] In this embodiment, as in the first embodiment, the upper surface of the trench structure 321 is 2 Semiconductor Area 31 2 This structure is such that the fourth semiconductor region 314 is located between the upper and lower surfaces of the first semiconductor region 312. This reduces crosstalk, and also allows the potential to be appropriately supplied to the fourth semiconductor region 314, thereby reducing power consumption. In addition, the avalanche efficiency can be stabilized, and a decrease in sensitivity can be suppressed.

[0107] As in the modification of the first embodiment, in this embodiment as well, by arranging the trench structures 321 in the diagonal directions, crosstalk between the pixels provided in the diagonal directions can be further suppressed.

[0108] (Embodiment 3) 13 and 14, a photoelectric conversion device according to embodiment 3 will be described. The difference from embodiment 2 is that a ninth semiconductor region 319 of a first conductivity type (e.g., N type) is disposed near the first surface of the semiconductor layer 300.

[0109] FIG. 13 is a schematic plan view of a semiconductor layer 300 in which the APD of the photoelectric conversion device according to this embodiment is disposed.

[0110] 14(a) is a schematic cross-sectional view taken along line AA' in FIG. 13, ie, in the opposite side direction, and FIG. 14(b) is a schematic cross-sectional view taken along line BB' in FIG. 13, ie, in the diagonal direction.

[0111] 13, the ninth semiconductor region 319 is disposed so as to surround the first semiconductor region 311 and the third semiconductor region 313 in a plan view. The impurity concentration of the ninth semiconductor region 319 is equal to or lower than the impurity concentration of the third semiconductor region 313. For example, when the impurity concentrations of the ninth semiconductor region 319 and the third semiconductor region 313 are different, it is preferable that the impurity concentration of the ninth semiconductor region 319 is at least twice as low as that of the third semiconductor region 313.

[0112] By disposing the ninth semiconductor region 319, it is possible to reduce noise in a signal due to dark electrons that may be generated by defect levels at the interface of the first surface of the semiconductor layer 300 or in the vicinity of the first surface. By disposing the ninth semiconductor region 319, it is possible to form a region in which the potential for dark electrons is lowered from the ninth semiconductor region 319 toward the first semiconductor region 311. In other words, dark electrons generated at the interface of the first surface of the semiconductor layer 300 or the like are more likely to move to the first semiconductor region 311 and less likely to move to the semiconductor region 301 or the seventh semiconductor region 317. Therefore, it is possible to reduce the passage of dark electrons through the avalanche multiplication region 302, and to reduce noise. Dark electrons that have moved to the first semiconductor region 311 via the third semiconductor region 313 are read out without passing through the avalanche multiplication region 302 and are not determined as a signal. Therefore, even if they are read out, they do not become noise.

[0113] The ninth semiconductor region 319 may be arranged so that the impurity concentration decreases with increasing distance from the fourth semiconductor region 314 side to the first semiconductor region 311, or may be arranged so that the impurity concentration is the same. Moreover, the ninth semiconductor region 319 may have a concentration gradient in the depth direction.

[0114] As shown in FIG. 14(a), in the opposite side direction, it is preferable that the ninth semiconductor region 319 is continuously arranged between adjacent pixels, from the third semiconductor region 313 of the first pixel 104 to the third semiconductor region 313 of the adjacent second pixel.

[0115] 13, the ninth semiconductor region 319 is preferably arranged so as to surround the first semiconductor region 311, the third semiconductor region 313, the sixth semiconductor region 316, and the fourth semiconductor region 314 in a planar view. For example, the ninth semiconductor region 319 is preferably arranged in a region excluding the first semiconductor region 311, the third semiconductor region 313, the sixth semiconductor region 316, and the fourth semiconductor region 314 in a planar view. This makes it easier to reduce deterioration of signal noise due to dark electrons over a wider region.

[0116] 14(a), the bottom surface of the ninth semiconductor region 319 is preferably disposed at a position shallower than the bottom surface of the first semiconductor region 311. Furthermore, the length in the vertical direction of the ninth semiconductor region 319 is preferably shorter than the length in the vertical direction of the third semiconductor region 313. Furthermore, the length in the vertical direction of the ninth semiconductor region 319 is preferably shorter than the length in the vertical direction of the first semiconductor region 311. This can reduce unintentional movement of dark electrons to the avalanche multiplication region 302.

[0117] In the diagonal direction, the ninth semiconductor region 319 and the fourth semiconductor region 314 may be in contact with each other or may be spaced apart as shown in Fig. 14. When the ninth semiconductor region 319 and the fourth semiconductor region 314 are in contact with each other, charge is less likely to move to adjacent pixels, and when they are spaced apart, electric field concentration is less likely to occur between the fourth semiconductor region 314 and the first semiconductor region 311. In addition, in the diagonal direction, the ninth semiconductor region 319 and the fourth semiconductor region 314 are in contact with each other as shown in Fig. 14(b), but they may be spaced apart.

[0118] 14, the ninth semiconductor region 319 is arranged so as to be in contact with the first surface of the semiconductor layer 300, but this is not essential. For example, the ninth semiconductor region 319 may be arranged at a position spaced apart from the first surface.

[0119] In FIG. 14, the third semiconductor region 313 and the second semiconductor region 312 are arranged to be spaced apart from each other, but the third semiconductor region 313 and the second semiconductor region 312 may be arranged to be in contact with each other.

[0120] In Figs. 13 and 14, the third semiconductor region 313 has a torus shape. However, as shown in Fig. 15, the third semiconductor region 313 may be configured in a circular shape. When the third semiconductor region 313 is configured in a circular shape in this way, the third semiconductor region 313 of the first conductivity type is disposed between the first semiconductor region 311 and the second semiconductor region 312. By disposing the third semiconductor region 313 between the first semiconductor region 311 and the second semiconductor region 312, the PN junction surface can be deepened, and the local concentration of the electric field in the avalanche multiplication region 302 can be reduced. The schematic plan view is the same as that of Fig. 13.

[0121] 15, the impurity concentration of the third semiconductor region 313 near the side surface of the first semiconductor region 311 may be the same as or different from the impurity concentration of the third semiconductor region 313 near the bottom surface of the first semiconductor region 311. For example, a plurality of regions having different impurity concentrations may be provided in the third semiconductor region 313 such that the impurity concentration of the third semiconductor region 313 decreases from the first semiconductor region 311 toward the second semiconductor region 312.

[0122] Furthermore, the third semiconductor region 313 may have a lower impurity concentration in the vicinity of the first semiconductor region 311 than the impurity concentration in the vicinity of the ninth semiconductor region 319. For example, the third semiconductor region 313 may have an impurity concentration that decreases stepwise from the side closer to the first semiconductor region 311 to the side farther from the first semiconductor region 311. This makes it possible to alleviate electric field concentration in the lateral direction.

[0123] According to this embodiment, it is possible to reduce punch-through between adjacent APDs while reducing electric field concentration in the lateral direction, similarly to the embodiment 2. Moreover, compared to the embodiment 2, it is possible to reduce the influence of signal noise due to dark electrons that may occur at the first surface interface of the semiconductor layer 300 or in the vicinity thereof.

[0124] In this embodiment, as in the first embodiment, the upper surface of the trench structure 321 is 2 Semiconductor Area 31 2This structure is such that the fourth semiconductor region 314 is located between the upper and lower surfaces of the first semiconductor region 312. This reduces crosstalk, and also allows the potential to be appropriately supplied to the fourth semiconductor region 314, thereby reducing power consumption. In addition, the avalanche efficiency can be stabilized, and a decrease in sensitivity can be suppressed.

[0125] (Modification of the third embodiment) In the above-described third embodiment, an example has been described in which the trench structures 321 are provided in the opposite side direction but not in the diagonal direction. However, the photoelectric conversion device may be configured so that the trench structures 321 are provided in both the opposite side direction and the diagonal direction.

[0126] 16 is a plan view of four 2×2 pixels on the first surface of the semiconductor layer 300. In FIG. 16, a trench structure 321 is also arranged at a position overlapping with the sixth semiconductor region 316.

[0127] FIG. 17(a) is a schematic cross-sectional view taken along line A-A' in FIG. 16, that is, in the opposite side direction, and FIG. 17(b) is a schematic cross-sectional view taken along line B-B' in FIG. 16, that is, in the diagonal direction. As shown in FIG. 17(b), a trench structure 321 is also arranged in the diagonal direction. Also in FIG. 17(b), the upper surface of the trench structure 321 is configured to be located between a position 460 on the upper surface of the second semiconductor region 312 and a position 450 on the lower surface. This allows the potential to be appropriately supplied to the second semiconductor region 312, and reduces power consumption. In addition, by arranging the trench structure 321 in the diagonal direction, crosstalk between pixels arranged in the diagonal direction can be further suppressed.

[0128] (Embodiment 4) The photoelectric conversion system according to this embodiment will be described with reference to Fig. 18. Fig. 18 is a block diagram showing a schematic configuration of the photoelectric conversion system according to this embodiment.

[0129] The photoelectric conversion devices described in the above-mentioned first to third embodiments are applicable to various photoelectric conversion systems. Examples of the applicable photoelectric conversion systems include digital still cameras, digital camcorders, security cameras, copiers, fax machines, mobile phones, vehicle-mounted cameras, and observation satellites. In addition, a camera module having an optical system such as a lens and an imaging device is also included in the photoelectric conversion system. FIG. 18 illustrates a block diagram of a digital still camera as an example of these.

[0130] 18 includes an image pickup device 1004, which is an example of a photoelectric conversion device, and a lens 1002 that forms an optical image of a subject on the image pickup device 1004. The photoelectric conversion system further includes an aperture 1003 that varies the amount of light passing through the lens 1002, and a barrier 1001 that protects the lens 1002. The lens 1002 and the aperture 1003 form an optical system that focuses light on the image pickup device 1004. The image pickup device 1004 is a photoelectric conversion device according to any one of the above embodiments, and converts the optical image formed by the lens 1002 into an electrical signal.

[0131] The photoelectric conversion system also has a signal processing unit 1007 which is an image generating unit that generates an image by processing an output signal output from the imaging device 1004. The signal processing unit 1007 performs various corrections and compression as necessary to output image data. The signal processing unit 1007 may be formed on a semiconductor substrate on which the imaging device 1004 is provided, or may be formed on a semiconductor substrate separate from the imaging device 1004. Moreover, the imaging device 1004 and the signal processing unit 1007 may be formed on the same semiconductor substrate.

[0132] The photoelectric conversion system further includes a memory unit 1010 for temporarily storing image data, and an external interface unit (external I / F unit) 1013 for communicating with an external computer or the like. The photoelectric conversion system further includes a recording medium 1012 such as a semiconductor memory for recording or reading out imaging data, and a recording medium control interface unit (recording medium control I / F unit) 1011 for recording or reading out data on the recording medium 1012. The recording medium 1012 may be built into the photoelectric conversion system, or may be removable.

[0133] The photoelectric conversion system further includes an overall control / calculation unit 1009 that performs various calculations and controls the entire digital still camera, and a timing generation unit 1008 that outputs various timing signals to the image capture device 1004 and the signal processing unit 1007. Here, the timing signals and the like may be input from outside, and the photoelectric conversion system only needs to include at least the image capture device 1004 and the signal processing unit 1007 that processes the output signal output from the image capture device 1004.

[0134] The imaging device 1004 outputs an imaging signal to a signal processing unit 1007. The signal processing unit 1007 performs predetermined signal processing on the imaging signal output from the imaging device 1004, and outputs image data. The signal processing unit 1007 generates an image using the imaging signal.

[0135] In this way, according to this embodiment, it is possible to realize a photoelectric conversion system to which the photoelectric conversion device (imaging device) according to any one of the above embodiments is applied.

[0136] (Embodiment 5) The photoelectric conversion system and the moving object of this embodiment will be described with reference to Fig. 19. Fig. 19 is a diagram showing the configuration of the photoelectric conversion system and the moving object of this embodiment.

[0137] FIG. 19(a) shows an example of a photoelectric conversion system related to an in-vehicle camera. The photoelectric conversion system 2300 has an imaging device 2310. The imaging device 2310 is the photoelectric conversion device described in any of the above embodiments. The photoelectric conversion system 2300 has an image processing unit 2312 that performs image processing on a plurality of image data acquired by the imaging device 2310. The photoelectric conversion system 2300 also has a parallax acquisition unit 2314 that calculates parallax (phase difference of parallax images) from a plurality of image data acquired by the photoelectric conversion system 2300. The photoelectric conversion system 2300 also has a distance acquisition unit 2316 that calculates a distance to an object based on the calculated parallax, and a collision determination unit 2318 that determines whether or not there is a possibility of collision based on the calculated distance. Here, the parallax acquisition unit 2314 and the distance acquisition unit 2316 are examples of distance information acquisition means that acquire distance information to an object. That is, the distance information is information on the parallax, the defocus amount, the distance to the object, and the like. The collision determination unit 2318 may determine the possibility of a collision using any of these pieces of distance information. The distance information acquisition means may be realized by dedicated hardware, or may be realized by a software module. In addition, it may be realized by a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or the like, or may be realized by a combination of these.

[0138] The photoelectric conversion system 2300 is connected to a vehicle information acquisition device 2320, and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. The photoelectric conversion system 2300 is also connected to a control ECU 2330, which is a control device (control unit) that outputs a control signal to generate a braking force for the vehicle based on the judgment result of the collision judgment unit 2318. The photoelectric conversion system 2300 is also connected to an alarm device 2340 that issues an alarm to the driver based on the judgment result of the collision judgment unit 2318. For example, when the judgment result of the collision judgment unit 2318 indicates that there is a high possibility of a collision, the control ECU 2330 performs vehicle control to avoid a collision and reduce damage by applying the brakes, releasing the accelerator, suppressing engine output, etc. The alarm device 2340 warns the user by sounding an alarm, displaying alarm information on the screen of a car navigation system, etc., or vibrating the seat belt or steering wheel.

[0139] In this embodiment, the surroundings of the vehicle, for example, the front or rear, are imaged by the photoelectric conversion system 2300. Fig. 19(b) shows a photoelectric conversion system for imaging the area in front of the vehicle (imaging range 2350). A vehicle information acquisition device 2320 sends an instruction to the photoelectric conversion system 2300 or the imaging device 2310. This configuration can further improve the accuracy of distance measurement.

[0140] Although the above describes an example of control to prevent collision with other vehicles, the present invention can also be applied to control of automatic driving by following other vehicles, control of automatic driving to prevent deviation from lanes, etc. Furthermore, the photoelectric conversion system is not limited to vehicles such as the vehicle itself, but can be applied to moving bodies (moving devices) such as ships, aircraft, and industrial robots. In addition, the present invention can be applied not only to moving bodies, but also to a wide range of devices that use object recognition, such as intelligent transport systems (ITS).

[0141] (Embodiment 6) The photoelectric conversion system of this embodiment will be described with reference to Fig. 20. Fig. 20 is a block diagram showing an example of the configuration of a range image sensor which is the photoelectric conversion system.

[0142] 20, the distance image sensor 401 is configured to include an optical system 402, a photoelectric conversion device 403, an image processing circuit 404, a monitor 405, and a memory 406. The distance image sensor 401 can obtain a distance image according to the distance to the subject by receiving light (modulated light or pulsed light) that is projected from a light source device 411 toward the subject and reflected by the surface of the subject.

[0143] The optical system 402 is configured to have one or more lenses, and guides image light (incident light) from a subject to the photoelectric conversion device 403 , forming an image on the light receiving surface (sensor portion) of the photoelectric conversion device 403 .

[0144] As the photoelectric conversion device 403, the photoelectric conversion device described in the above-mentioned embodiments 1 to 4 is applied, and a distance signal indicating the distance determined from the light receiving signal output from the photoelectric conversion device 403 is supplied to the image processing circuit 404.

[0145] The image processing circuit 404 performs image processing to construct a distance image based on the distance signal supplied from the photoelectric conversion device 403. The distance image (image data) obtained by this image processing is then supplied to a monitor 405 for display, or supplied to a memory 406 for storage (recording).

[0146] In the range image sensor 401 configured in this way, by applying the above-described photoelectric conversion device, it is possible to obtain, for example, a more accurate range image as the pixel characteristics improve.

[0147] (Embodiment 7) The photoelectric conversion system of this embodiment will be described with reference to Fig. 21. Fig. 21 is a diagram showing an example of a schematic configuration of an endoscopic surgery system which is the photoelectric conversion system of this embodiment.

[0148] 21 shows a state in which an operator (doctor) 1131 is performing surgery on a patient 1132 on a patient bed 1133 using an endoscopic surgery system 1003. As shown in the figure, the endoscopic surgery system 1003 is composed of an endoscope 1100, a surgical tool 1110, and a cart 1134 on which various devices for endoscopic surgery are mounted.

[0149] The endoscope 1100 is composed of a lens barrel 1101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 1132, and a camera head 1102 connected to the base end of the lens barrel 1101. In the illustrated example, the endoscope 1100 is configured as a so-called rigid lens barrel having a rigid lens barrel 1101, but the endoscope 1100 may be configured as a so-called flexible lens barrel having a flexible lens barrel.

[0150] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 1101. A light source device 1203 is connected to the endoscope 1100. Light generated by the light source device 1203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 1101. The light guided to the tip of the lens barrel is irradiated via the objective lens towards an observation target in the body cavity of the patient 1132. The endoscope 1100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0151] An optical system and a photoelectric conversion device are provided inside the camera head 1102, and reflected light (observation light) from an observation target is collected by the optical system onto the photoelectric conversion device. The observation light is photoelectrically converted by the photoelectric conversion device to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to an observation image. The photoelectric conversion device may be any of the photoelectric conversion devices described in the first to fourth embodiments. The image signal is transmitted to a camera control unit (CCU) 1135 as RAW data.

[0152] The CCU 1135 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and performs overall control of the operations of the endoscope 1100 and the display device 1136. Furthermore, the CCU 1135 receives an image signal from the camera head 1102, and performs various types of image processing on the image signal, such as development processing (demosaic processing), for displaying an image based on the image signal.

[0153] Under the control of the CCU 1135 , the display device 1136 displays an image based on an image signal that has been subjected to image processing by the CCU 1135 .

[0154] The light source device 1203 is composed of a light source such as an LED (Light Emitting Diode), and supplies the endoscope 1100 with irradiation light when photographing an operation site or the like.

[0155] The input device 1137 is an input interface for the endoscopic surgery system 1003. A user can input various information and instructions to the endoscopic surgery system 1003 via the input device 1137.

[0156] The treatment tool control device 1138 controls the driving of the energy treatment tool 1112 for cauterizing tissue, incising, sealing blood vessels, or the like.

[0157] The light source device 1203 that supplies irradiation light to the endoscope 1100 when photographing the surgical site can be composed of a white light source composed of, for example, an LED, a laser light source, or a combination of these. When the white light source is composed of a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, so that the white balance of the captured image can be adjusted in the light source device 1203. In this case, it is also possible to capture images corresponding to each of the RGB colors in a time-division manner by irradiating the observation target with laser light from each of the RGB laser light sources in a time-division manner and controlling the driving of the image sensor of the camera head 1102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter to the image sensor.

[0158] Furthermore, the light source device 1203 may be controlled to change the intensity of the light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 1102 in synchronization with the timing of the change in the light intensity to acquire images in a time-division manner and synthesizing the images, it is possible to generate an image with a high dynamic range that is free of so-called blocked-up shadows and blown-out highlights.

[0159] The light source device 1203 may be configured to supply light in a predetermined wavelength band corresponding to the special light observation. In the special light observation, for example, the wavelength dependency of light absorption in body tissue is utilized. Specifically, a predetermined tissue such as blood vessels on the mucous membrane surface is photographed with high contrast by irradiating light in a narrower band than the irradiation light (i.e., white light) in normal observation. Alternatively, the special light observation may be a fluorescent observation in which an image is obtained by fluorescence generated by irradiating excitation light. In the fluorescent observation, it is possible to irradiate excitation light to the body tissue and observe the fluorescence from the body tissue, or to locally inject a reagent such as indocyanine green (ICG) into the body tissue and irradiate the body tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 1203 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.

[0160] (Embodiment 8) The photoelectric conversion system of this embodiment will be described with reference to FIG. 22. FIG. 22(a) is a diagram showing an example of the configuration of glasses 1600 (smart glasses) which are the photoelectric conversion system. The glasses 1600 have a photoelectric conversion device 1602. The photoelectric conversion device 1602 is the photoelectric conversion device described in the above-mentioned embodiments 1 to 4. A display device including a light-emitting device such as an OLED or LED may be provided on the back side of the lens 1601. The photoelectric conversion device 1602 may be one or more. A combination of multiple types of photoelectric conversion devices may also be used. The arrangement position of the photoelectric conversion device 1602 is not limited to that shown in FIG. 22(a).

[0161] The glasses 1600 further include a control device 1603. The control device 1603 functions as a power source that supplies power to the photoelectric conversion device 1602 and the display device. The control device 1603 also controls the operations of the photoelectric conversion device 1602 and the display device. The lens 1601 is formed with an optical system for focusing light on the photoelectric conversion device 1602.

[0162] FIG. 22(b) illustrates glasses 1610 (smart glasses) according to one application example. The glasses 1610 have a control device 1612, and the control device 1612 is equipped with a photoelectric conversion device corresponding to the photoelectric conversion device 1602 and a display device. The lens 1611 is formed with an optical system for projecting light emitted from the photoelectric conversion device in the control device 1612 and the display device, and an image is projected onto the lens 1611. The control device 1612 functions as a power source for supplying power to the photoelectric conversion device and the display device, and controls the operation of the photoelectric conversion device and the display device. The control device may have a line of sight detection unit that detects the line of sight of the wearer. Infrared light may be used for detecting the line of sight. The infrared light emission unit emits infrared light toward the eyeball of a user gazing at a display image. An imaging unit having a light receiving element detects the reflected light of the emitted infrared light from the eyeball, thereby obtaining an image of the eyeball. By having a reduction means for reducing light from the infrared light emission unit to the display unit in a planar view, deterioration of image quality is reduced.

[0163] The gaze of the user with respect to the displayed image is detected from an image of the eyeball obtained by capturing infrared light. Any known method can be applied to gaze detection using the image of the eyeball. As an example, a gaze detection method based on a Purkinje image formed by reflection of irradiated light on the cornea can be used.

[0164] More specifically, the gaze detection process is performed based on the pupil-corneal reflex method. Using the pupil-corneal reflex method, a gaze vector that indicates the direction (rotation angle) of the eyeball is calculated based on the pupil image and the Purkinje image included in the captured image of the eyeball, thereby detecting the user's gaze.

[0165] The display device of this embodiment may have a photoelectric conversion device having a light receiving element, and may control the display image of the display device based on information about the user's line of sight from the photoelectric conversion device.

[0166] Specifically, the display device determines a first field of view area to which the user gazes and a second field of view area other than the first field of view area based on the line-of-sight information. The first field of view area and the second field of view area may be determined by a control device of the display device, or may be received from an external control device. In the display area of ​​the display device, the display resolution of the first field of view area may be controlled to be higher than the display resolution of the second field of view area. In other words, the resolution of the second field of view area may be lower than that of the first field of view area.

[0167] The display area may have a first display area and a second display area different from the first display area, and a high priority area may be determined from the first display area and the second display area based on line-of-sight information. The first field of view area and the second field of view area may be determined by a control device of the display device, or may be received from an external control device. The resolution of the high priority area may be controlled to be higher than the resolution of areas other than the high priority area. In other words, the resolution of an area with a relatively low priority may be lowered.

[0168] In addition, AI may be used to determine the first field of view area and the area with high priority. The AI ​​may be a model configured to estimate the angle of the line of sight and the distance to an object at the end of the line of sight from the image of the eyeball, using the image of the eyeball and the direction in which the eyeball in the image was actually looking as teacher data. The AI ​​program may be included in the display device, the photoelectric conversion device, or an external device. If included in the external device, it is transmitted to the display device via communication.

[0169] When display control is performed based on visual recognition detection, the present invention is preferably applicable to smart glasses further including a photoelectric conversion device for capturing an image of the outside world. The smart glasses can display captured outside information in real time.

[0170] The above-described embodiments can be modified as appropriate without departing from the technical concept. In addition, an example in which a part of the configuration of any of the embodiments is added to another embodiment, or an example in which a part of the configuration of any of the embodiments is replaced with another embodiment, is also included in the embodiments of the present invention. Furthermore, the photoelectric conversion systems described in the fifth to ninth embodiments are examples of photoelectric conversion systems to which the photoelectric conversion device can be applied, and the photoelectric conversion systems to which the photoelectric conversion device of the present invention can be applied are not limited to the configurations shown in Figs. 18 to 22. [Explanation of symbols]

[0171] 300 Semiconductor layer 311 First semiconductor region (first conductive type first semiconductor region) 312 Second semiconductor region (second conductive type second semiconductor region) 313 Third Semiconductor Region 314 Fourth semiconductor region (third semiconductor region of second conductivity type) 315 Fifth semiconductor region (fifth semiconductor region of second conductivity type) 316 6th Semiconductor Region 317 Seventh semiconductor region (sixth semiconductor region of the first conductivity type) 319 9th semiconductor region (4th semiconductor region of the 1st conductivity type) 321 Trench Structure

Claims

1. a semiconductor layer including a plurality of photoelectric conversion elements and having a first surface and a second surface opposite to the first surface and through which light is incident; each of the plurality of photoelectric conversion elements includes an avalanche photodiode; The avalanche photodiode has a first semiconductor region of a first conductivity type in which charges of the same polarity as a signal charge are used as majority carriers, and a second semiconductor region of a second conductivity type; each of the plurality of photoelectric conversion elements is separated by an isolation portion including a third semiconductor region of the second conductivity type; the second semiconductor region is disposed in contact with the third semiconductor region, the plurality of photoelectric conversion elements include a first photoelectric conversion element and a second photoelectric conversion element arranged in a first direction; an isolation portion provided between the first photoelectric conversion element and the second photoelectric conversion element has a trench structure; A photoelectric conversion device, comprising: a trench structure disposed such that an upper surface of the trench structure is located between an upper surface of the second semiconductor region and a lower surface of the second semiconductor region.

2. The photoelectric conversion device according to claim 1, characterized in that the third semiconductor region is arranged between the first photoelectric conversion element and the second photoelectric conversion element such that the upper surface of the third semiconductor region is located between the first surface of the semiconductor layer and the upper surface of the second semiconductor region.

3. 3 . The photoelectric conversion device according to claim 1 , wherein the plurality of photoelectric conversion elements include the first photoelectric conversion element and a third photoelectric conversion element arranged in a second direction intersecting the first direction. 4 .

4. an isolation portion provided between the first photoelectric conversion element and the third photoelectric conversion element has the trench structure; The photoelectric conversion device according to claim 3, characterized in that the trench structure is provided between the first photoelectric conversion element and the third photoelectric conversion element such that the upper surface of the trench structure is positioned between the upper surface of the second semiconductor region and the lower surface of the second semiconductor region.

5. 4. The photoelectric conversion device according to claim 3, wherein an isolation portion provided between the first photoelectric conversion element and the third photoelectric conversion element does not have a trench structure.

6. 6. The photoelectric conversion device according to claim 3, wherein the first direction is a direction of an opposite side, and the second direction is a diagonal direction.

7. 7. The photoelectric conversion device according to claim 3, wherein a contact plug is connected to the first surface between the first photoelectric conversion element and the third photoelectric conversion element.

8. 8. The photoelectric conversion device according to claim 7, wherein a voltage is applied to the second semiconductor region via the contact plug and the third semiconductor region.

9. a fourth semiconductor region of the first conductivity type is continuously disposed between the first semiconductor region of the first photoelectric conversion element and the first semiconductor region of the second photoelectric conversion element; an impurity concentration of the fourth semiconductor region is lower than an impurity concentration of the first semiconductor region; The photoelectric conversion device according to claim 1 , wherein the fourth semiconductor region constitutes a part of the first surface.

10. a fifth semiconductor region of the second conductivity type is disposed closer to the second surface side of the semiconductor layer than the second semiconductor region; 10. The photoelectric conversion device according to claim 1, wherein a sixth semiconductor region of the first conductivity type is provided between the second semiconductor region and the fifth semiconductor region.

11. 11. The photoelectric conversion device according to claim 10, wherein the sixth semiconductor region has an impurity concentration lower than the impurity concentration of the first semiconductor region.

12. 12. The photoelectric conversion device according to claim 1, wherein the third semiconductor region arranged between the first photoelectric conversion element and the second photoelectric conversion element constitutes a part of the first surface of the semiconductor layer.

13. 13. The photoelectric conversion device according to claim 1, wherein an oxide film is provided in the trench structure.

14. The trench structure includes an oxide film and at least one of air and metal; 13. The photoelectric conversion device according to claim 1, wherein at least one of the air and the metal is disposed between the oxide films.

15. The photoelectric conversion device according to claim 1 , and a signal processing unit that generates an image using a signal output from the photoelectric conversion device.

16. A moving object comprising the photoelectric conversion device according to any one of claims 1 to 14, A moving body comprising: a control unit that controls the movement of the moving body using a signal output from the photoelectric conversion device.

Images