Semiconductor module and method for manufacturing the same

Abstract

To provide a semiconductor module having a structure capable of suppressing quality variation, and a method for manufacturing semiconductor module capable of suppressing quality variation.SOLUTION: A semiconductor module 1 has a semiconductor chip 10 having a plurality of electrode pads 12A, 12B, a clip 20 having a plurality of joints 22A, 22B corresponding to the plurality of electrode pads 12A, 12B, and conductive bonding materials 30A, 30B for bonding electrode pads 12A, 12B and joints 22A, 22B. In the semiconductor module 1, the electrode pads 12A, 12B and the junction portions 22A, 22B are joined with the conductive bonding materials 12A, 12B for each corresponding set.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor module and a method for manufacturing the semiconductor module. [Background technology]

[0002] Conventionally, semiconductor modules using clips as members for achieving electrical connection have been widely known (see, for example, Patent Document 1). Note that in this specification, the term "clip" refers to a plate-shaped connection member made of a conductive material.

[0003] FIG. 14 is a diagram for explaining a conventional semiconductor module 901. FIG. 14(a) is a plan view of the semiconductor module 901, and FIG. 14(b) is a cross-sectional view taken along line AA of FIG. 14(a). As shown in FIG. 14, the conventional semiconductor module 901 includes a semiconductor chip 910, a clip 920, and a conductive bonding material 930 that bonds the semiconductor chip 910 and the clip 920. In addition to the above-mentioned components, the semiconductor module 901 includes a die pad frame 940 having a die pad 942 on which the semiconductor chip 910 is placed, a die pad side bonding material 950 that bonds the die pad 942 and the semiconductor chip 910, and another clip 960 different from the clip 920. The other clip 960 is smaller than the clip 920. Although not shown, the semiconductor module 901 may include components other than those described above (for example, a sealing resin). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2019-87741 A Summary of the Invention [Problem to be solved by the invention]

[0005] In order to manufacture the conventional semiconductor module 901, it is necessary to appropriately bond members (semiconductor chip 910, clip 920, etc.) that require electrical connection. For example, by using a material (e.g., solder) that melts at high temperatures as the conductive bonding material 930, it is possible to bond the electrode pads 912 and 914 of the semiconductor chip 910 to the connection portion 922 of the clip 920 and the connection portion 962 of the clip 960 by reflow (heat treatment).

[0006] However, in the semiconductor module 901, since reflow needs to be performed with many components stacked, it is difficult to perform reflow while fixing the positions of all the components from the outside. For this reason, when manufacturing a semiconductor module such as the semiconductor module 901, reflow is often performed without fixing at least one of the semiconductor chip and the clip. For this reason, the conventional semiconductor module 901 has a problem that the semiconductor chip 910 and the clip 920 are easily misaligned or tilted, making it difficult to suppress variations in quality.

[0007] Therefore, the present invention has been made to solve the above problems, and has an object to provide a semiconductor module having a structure capable of suppressing the variation in quality. It is also an object of the present invention to provide a manufacturing method of a semiconductor module capable of suppressing the variation in quality. [Means for solving the problem]

[0008] The semiconductor module of the present invention comprises a semiconductor chip having a plurality of electrode pads connected to the same destination, a clip having a plurality of joints corresponding to the plurality of electrode pads, and a conductive bonding material that bonds the electrode pads and the joints, and is characterized in that the electrode pads and the joints are bonded to each corresponding pair by the conductive bonding material.

[0009] The manufacturing method of the semiconductor module of the present invention is characterized by including a bonding preparation process in which a semiconductor chip having a plurality of electrode pads connected to the same destination and a clip having a plurality of joints corresponding to the plurality of electrode pads are prepared, and the semiconductor chip and the clip are arranged on top of each other with a conductive bonding material interposed between the electrode pads and the joints, and a bonding process in which the electrode pads and the joints are bonded to each corresponding pair of them with the conductive bonding material by reflow. Effect of the Invention

[0010] The semiconductor module of the present invention includes a semiconductor chip having a plurality of electrode pads connected to the same destination, and a clip having a plurality of joints corresponding to the plurality of electrode pads, and the electrode pads and the joints are joined by a conductive adhesive material for each corresponding pair. Therefore, the surface tension generated by melting the conductive adhesive material during reflow in the manufacturing process occurs at each location where the conductive adhesive material exists. Therefore, even if the semiconductor chip or clip is not fixed during reflow, the balance of the surface tension generated at multiple locations makes it possible to stabilize the posture of the semiconductor chip or clip (so-called self-alignment). For the above reasons, the semiconductor chip or clip is less likely to be misaligned or tilted, and the semiconductor module of the present invention has a structure that can suppress quality variations.

[0011] The method for manufacturing a semiconductor module of the present invention includes a bonding preparation step of overlapping a semiconductor chip and a clip with a conductive bonding material interposed between the electrode pads and the bonding parts, and a bonding step of bonding each corresponding pair of electrode pads and bonding parts with the conductive bonding material by reflow, which makes it possible to reduce the occurrence of misalignment or tilt of the semiconductor chip or clip. Therefore, the method for manufacturing a semiconductor module of the present invention is a method for manufacturing a semiconductor module that can suppress quality variation by reducing the occurrence of misalignment or tilt of the semiconductor chip or clip during reflow. [Brief description of the drawings]

[0012] [Figure 1] FIG. 2 is a diagram for explaining a semiconductor module 1 according to the first embodiment. [Diagram 2] 4 is a flowchart of a method for manufacturing the semiconductor module according to the first embodiment. [Diagram 3] 3A to 3C are views for explaining the method for manufacturing the semiconductor module according to the first embodiment. [Figure 4] FIG. 4 is a diagram for explaining a semiconductor module 2 according to a second embodiment. [Diagram 5] 10 is a flowchart of a method for manufacturing a semiconductor module according to the second embodiment. [Figure 6] 6A to 6C are views for explaining a method for manufacturing a semiconductor module according to the second embodiment. [Figure 7] FIG. 11 is a cross-sectional view of a semiconductor module 3 according to a third embodiment. [Figure 8] 11 is a flowchart of a method for manufacturing a semiconductor module according to the third embodiment. [Figure 9] 11A to 11C are views for explaining a method for manufacturing a semiconductor module according to a third embodiment. [Figure 10] FIG. 11 is a diagram for explaining a semiconductor module 4 according to a fourth embodiment. [Figure 11] FIG. 13 is a plan view of a semiconductor module 5 according to a fifth embodiment. [Figure 12] FIG. 4 is a plan view of a semiconductor module 6 according to a first modified example. [Figure 13] FIG. 11 is a plan view of a semiconductor module 7 according to a second modified example. [Figure 14] FIG. 9 is a diagram for explaining a conventional semiconductor module 901. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] The semiconductor module and the manufacturing method of the semiconductor module of the present invention will be described below based on the embodiments shown in the drawings. Note that each drawing is a schematic diagram and does not necessarily strictly reflect the actual dimensions. Each embodiment described below does not limit the invention according to the claims. Furthermore, not all of the elements and combinations thereof described in each embodiment are necessarily essential to the solution of the present invention. In each embodiment, for items that have the same basic configuration, features, functions, etc. (including items that are not completely identical in shape, etc.), the same reference numerals are used across the embodiments, and repeated explanations may be omitted.

[0014] [Embodiment 1] 1. Configuration of semiconductor module 1 according to embodiment 1 Fig. 1 is a diagram shown for explaining a semiconductor module 1 according to embodiment 1. Fig. 1(a) is a plan view of the semiconductor module 1, and Fig. 1(b) is a cross-sectional view taken along the line A1-A1 in Fig. 1(a).

[0015] As shown in Fig. 1, the semiconductor module 1 according to the first embodiment includes a semiconductor chip 10, a clip 20, conductive bonding materials 30A and 30B, a die pad frame 40, a die pad side bonding material 50, and another clip 60. Although not shown, the semiconductor module 1 may include other components than those described above. For example, the semiconductor module 1 preferably includes a sealing resin that seals the parts other than the parts (terminals, etc.) that need to be exposed to the outside. Note that the "semiconductor module" in this specification can be considered as a device that operates by the function of a semiconductor chip, and therefore can also be called a "semiconductor device" from this perspective. Below, the individual components of the semiconductor module 1 will be described.

[0016] The semiconductor chip 10 has electrode pads 12A, 12B corresponding to the clip 20. The semiconductor chip 10 also has an electrode pad 14 corresponding to another clip 60 and an electrode pad (not shown) corresponding to the die pad frame 40. In this specification, the term "pad" refers to a structure or part provided for bonding to another component with a bonding material, and the term "electrode pad" refers to a structure or part provided for electrically bonding to another component with a conductive bonding material. The structure of the electrode pads is widely known and will not be described in detail, but the electrode pads 12A, 12B, 14 in the semiconductor chip 10 are parts on which the passivation film 16 is not formed.

[0017] The clip 20, the other clip 60, and the die pad frame 40 are members to be electrically connected to different connection destinations. The semiconductor chip 10 in the first embodiment is a three-terminal semiconductor chip, specifically a three-terminal MOSFET. The electrode pads 12A and 12B are source pads, the electrode pad 14 is a gate pad, and the electrode pad corresponding to the die pad frame 40 is a drain pad. Note that the semiconductor chip 10 may be an element other than a three-terminal MOSFET, such as an IGBT, a thyristor, or any other appropriate element.

[0018] In this specification, "having multiple electrode pads connected to the same destination" can also be expressed as "having multiple electrode pads at the same potential." For example, if the semiconductor chips each have one electrode pad each connected to a different destination (as in the case of the conventional semiconductor module 901), the requirements of the present invention are not met.

[0019] The clip 20 has a plurality of joints 22A, 22B corresponding to the plurality of electrode pads 12A, 12B.

[0020] The joints 22A and 22B have portions that protrude toward the electrode pads 12A and 12B. In the clip 20, the plate thickness of the joints 22A and 22B is the same as that of the other portions, but the plate thickness of the joints 22A and 22B may be different from that of the other portions (for example, may be thicker). Since the protruding portions, which are important portions of the joints 22A and 22B, are on the back side as viewed from the viewpoint of FIG. 1(a), the leading lines of the symbols of the joints 22A and 22B are dashed lines in FIG. 1(a). The leading lines of the joints 62 in another clip 60 and the joints in other plan views described later are also indicated in the same manner as the joints 22A and 22B.

[0021] The clip 20 has a shape in which the width in the direction of current flow changes discontinuously when viewed in a plan view. In this specification, the "direction of current flow" refers to the direction from the joint corresponding to the electrode pad of the semiconductor module to the tip of the connection terminal when the clip is viewed as a whole. In the clip 20, the wide part is the main connection part 24, and the narrow part whose tip T is the connection terminal is the connecting part 26. The connecting terminal which is the tip T of the connecting part 26 may be for connecting to a device or the like other than the semiconductor module 1, or may be for connecting to other components in the semiconductor module 1. In the following description, when the semiconductor module 1 is viewed in a plan view, the region where the semiconductor chip 10 and the main connection part 24 overlap is the first region R1, and the region where the semiconductor chip 10 and the connecting part 26 overlap is the second region R2. The dashed line indicated by the symbol L in FIG. 1 indicates the boundary between the first region R1 and the second region R2.

[0022] In this specification, the term "planar view" is merely used to describe the positional relationship of components. In the semiconductor module of the present invention, the components described using a planar view do not necessarily need to be visible from the outside in the actual product.

[0023] The conductive bonding materials 30A and 30B bond the electrode pads 12A and 12B to the bonding portions 22A and 22B. The bonding by the conductive bonding materials 30A and 30B will be described in detail later. The conductive bonding materials 30A and 30B are preferably solders (solder in a broad sense including lead-free solders) that can be treated by reflow.

[0024] The electrode pads 12A, 12B and the bonding portions 22A, 22B are bonded to each corresponding pair by conductive bonding materials 30A, 30B. In the semiconductor module 1, the electrode pads and bonding portions bonded by the conductive bonding material are present in both the first region R1 and the second region R2. That is, in the first region R1, the electrode pad 12A and the bonding portion 22A are bonded to each other by the conductive bonding material 30A, and in the second region R2, the electrode pad 12B and the bonding portion 22B are bonded to each other by the conductive bonding material 30B. There are places between the bonding portions 22A and 22B where no conductive bonding material is present.

[0025] Since widely known materials can be used for the die pad frame 40, the die pad side bonding material 50, and the separate clip 60, only a brief description will be given of each of them.

[0026] The die pad frame 40 is a plate-like member having a die pad 42 for mounting the semiconductor chip 10 thereon, and at least a portion of which is made of a conductive material (e.g., copper). The die pad frame 40 serves as a base on which the semiconductor chip 10 is mounted.

[0027] The die pad side bonding material 50 bonds the die pad 42 and an electrode pad corresponding to the die pad frame 40 of the semiconductor chip 10. In the semiconductor module 1, since it is necessary to electrically connect the electrode pad (drain pad) corresponding to the die pad frame 40 and the die pad 42, the die pad side bonding material 50 needs to be a conductive bonding material. Note that when no electrical connection is required between the die pad frame (base) and the semiconductor chip, a non-conductive die pad side bonding material can also be used.

[0028] Another clip 60 has a joint 62 that is joined to the electrode pad 14 by a conductive adhesive (not shown). The structure of the joint 62 can be similar to that of the joints 22A and 22B of the clip 20.

[0029] 2. Manufacturing method of the semiconductor module according to the first embodiment Next, a method for manufacturing the semiconductor module according to the first embodiment will be described. FIG. 2 is a flowchart of a method for manufacturing the semiconductor module according to the first embodiment. 3A to 3D are diagrams for explaining the method for manufacturing the semiconductor module according to embodiment 1. FIG 3A to FIG 3D are diagrams showing the respective steps. FIG 3 is a cross-sectional view corresponding to FIG 1B.

[0030] The method for manufacturing the semiconductor module according to the first embodiment includes a bonding preparation step S10 and a bonding step S20, as shown in Fig. 2. Each step will be described below.

[0031] The bonding preparation step S10 is a step of preparing a semiconductor chip 10 having a plurality of electrode pads 12A, 12B and a clip having a plurality of bonding portions 22A, 22B corresponding to the plurality of electrode pads 12A, 12B, and arranging the semiconductor chip 10 and the clip 20 in an overlapping state with conductive bonding materials 30A, 30B interposed between the electrode pads 12A, 12B and the bonding portions 22A, 22B (see FIG. 3). In the first embodiment, the bonding preparation step S10 includes a die pad frame preparation step S12, a semiconductor chip arrangement step S14, and a clip arrangement step S16.

[0032] The die pad frame preparation step S12 is a step of preparing a die pad frame 40 having a die pad 42 on which the semiconductor chip 10 is to be mounted (see FIG. 3(a)).

[0033] The semiconductor chip placement process S14 is a process of placing the die pad 42 and the semiconductor chip 10 on top of each other with a die pad side bonding material 51 interposed between the die pad 42 and the semiconductor chip 10 (see FIG. 3(b)). In the method for manufacturing a semiconductor module according to the first embodiment, the die pad side bonding material 51 may be placed (applied) before placing the semiconductor chip 10, or the die pad frame 40 on which the die pad side bonding material 51 has been placed in advance on the die pad 42 may be prepared in the die pad frame preparation process S12. The die pad side bonding material 51 is a pre-reflow (unsolidified) die pad side bonding material (e.g., cream solder).

[0034] The clip placement step S16 is a step of placing the semiconductor chip 10 and the clip 20 on top of each other with the conductive bonding materials 31A and 31B interposed therebetween (see FIG. 3(c)). The conductive bonding materials 31A and 31B are the conductive bonding materials 30A and 30B before reflow.

[0035] The bonding process S20 is a process in which the electrode pads 12A, 12B and the bonding portions 22A, 22B are bonded to each corresponding pair by the conductive bonding materials 30A, 30B through reflow. In the bonding process S20, the reflow is performed with the die pad frame 40 and the clip 20 in a fixed position (see FIG. 3(d)). In FIG. 3(d), the reference character P denotes a jig (e.g., a positioning pin) for fixing the position during reflow. After reflow, the position fixing by the jig is released.

[0036] Through the above steps, the semiconductor module 1 according to the first embodiment can be manufactured.

[0037] 3. Effects of the semiconductor module 1 and the manufacturing method of the semiconductor module according to the first embodiment The effects of the semiconductor module 1 and the method for manufacturing the semiconductor module according to the first embodiment will be described below.

[0038] The semiconductor module 1 according to the first embodiment includes a semiconductor chip 10 having a plurality of electrode pads 12A, 12B, and a clip 20 having a plurality of bonding portions 22A, 22B corresponding to the plurality of electrode pads 12A, 12B, and the electrode pads 12A, 12B and the bonding portions 22A, 22B are bonded to each corresponding pair by conductive bonding materials 30A, 30B. Therefore, the surface tension generated by melting the conductive bonding materials 31A, 31B during reflow in the manufacturing process occurs at each location where the conductive bonding materials 31A, 31B are present. Therefore, even if the semiconductor chip 10 and the clip 20 are not fixed during reflow, the balance of the surface tension generated at multiple locations makes it possible to stabilize the postures of the semiconductor chip 10 and the clip 20 (so-called self-alignment). For the above reasons, the semiconductor chip 10 and the clip 20 are less likely to be displaced or tilted, and the semiconductor module 1 according to the first embodiment is a semiconductor module having a structure capable of suppressing quality variations.

[0039] Furthermore, according to the semiconductor module 1 of embodiment 1, by dispersing (separating) the arrangement of the electrode pads 12A, 12B and the joints 22A, 22B, it is possible to easily form a structure that is advantageous for dispersing the heat source and dissipating heat, thereby making it possible to reduce thermal stress and suppress the occurrence of cracks in the components (especially the sealing resin when resin sealing is performed).

[0040] Furthermore, according to the semiconductor module 1 of embodiment 1, the electrode pads and joints joined by the conductive bonding material are present in both the first region R1 (main connection portion 24 side) and the second region R2 (connection portion 26 side) (in the first region R1, the electrode pad 12A and the joint portion 22A are joined by the conductive bonding material 30A, and in the second region R2, the electrode pad 12B and the joint portion 22B are joined by the conductive bonding material 30B). Therefore, by increasing the total area of ​​the electrode pads and connections compared to the configuration of the conventional semiconductor module 901, it is possible to reduce the on-resistance, improve the heat dissipation capacity, and increase the connection area.

[0041] Furthermore, according to the semiconductor module 1 of embodiment 1, the semiconductor chip 10 is a MOSFET and the electrode pads 12A, 12B are source pads. Therefore, by improving the structure on the side where a relatively large current is exchanged, it is possible to further reduce the on-resistance and further improve the heat dissipation capability.

[0042] The method for manufacturing a semiconductor module according to the first embodiment includes a bonding preparation step S10 in which the semiconductor chip 10 and the clip 20 are arranged in a stacked manner with the conductive bonding materials 31A, 31B interposed between the electrode pads 12A, 12B and the bonding portions 22A, 22B, and a bonding step S20 in which the electrode pads 12A, 12B and the bonding portions 22A, 22B are bonded to each corresponding pair of the electrode pads 12A, 12B and the bonding portions 22A, 22B by the conductive bonding materials 30A, 30B through reflow, making it possible to prevent positional deviation or tilt of the semiconductor chip 10 and the clip 20 from occurring. Therefore, the method for manufacturing a semiconductor module according to the first embodiment is a method for manufacturing a semiconductor module that can suppress quality variations.

[0043] Furthermore, according to the method for manufacturing a semiconductor module of embodiment 1, the semiconductor chip 10 and the clip 20 are stacked with the conductive bonding materials 31A, 31B interposed therebetween and then reflow is performed. Therefore, even if reflow is performed without fixing the position of the semiconductor chip 10, it is possible to suppress variation in the quality of the manufactured semiconductor module 1.

[0044] [Embodiment 2] Fig. 4 is a diagram for explaining a semiconductor module 2 according to embodiment 2. Fig. 4(a) is a plan view of the semiconductor module 2, and Fig. 4(b) is a cross-sectional view of the semiconductor module 2. Fig. 4(b) is a cross-sectional view corresponding to Fig. 1(b).

[0045] The semiconductor module 2 according to the second embodiment basically has the same configuration as the semiconductor module 1 according to the first embodiment, but differs from the semiconductor module 1 according to the first embodiment in that it further includes a lead frame. In addition, since the semiconductor module 2 includes the lead frame, the connecting portion of the clip also has a different shape from that of the semiconductor module 1 according to the first embodiment.

[0046] 4, the semiconductor module 2 includes a lead frame 70. The lead frame 70 is a member that corresponds to the tip of the connecting portion 26 of the clip 20 in the first embodiment, and is, for example, a terminal for external connection or a part of a circuit. The lead frame 70 has lead-side pads 72 on which the clip 21 is placed. The lead frame 70 can be made of the same material as the clip 21.

[0047] The clip 21 has a basically similar configuration to the clip 20 in the first embodiment, but the connecting portion 27 has a lead bonding portion 28 at the tip side. The lead bonding portion 28 is a portion to be bonded to the lead-side pad 72, and is bonded to the lead-side pad 72 by a lead-side bonding material 74, which is a conductive bonding material.

[0048] Next, a method for manufacturing the semiconductor module 2 according to the second embodiment will be described. FIG. 5 is a flowchart of a method for manufacturing a semiconductor module according to the second embodiment. 6A to 6E are diagrams for explaining a method for manufacturing a semiconductor module according to embodiment 2. Fig. 6 is a cross-sectional view corresponding to Fig. 1B.

[0049] The manufacturing method of the semiconductor module according to the second embodiment is basically the same as the manufacturing method of the semiconductor module according to the first embodiment. However, due to the presence of the lead frame 70, some steps are different from the manufacturing method of the semiconductor module according to the first embodiment.

[0050] The method for manufacturing a semiconductor module according to the second embodiment includes a bonding preparation step S30 and a bonding step S40, as shown in Fig. 5. The bonding preparation step S30 also includes a die pad frame preparation step S32, a lead frame preparation step S34, a semiconductor chip arrangement step S36, and a clip arrangement step S38. Each step will be described below.

[0051] The die pad frame preparation step S32 is the same as the die pad frame preparation step S12 in the first embodiment (see FIG. 6(a)).

[0052] The lead frame preparation step S34 is a step of preparing a lead frame 70 having lead-side pads 72 for mounting clips (see FIG. 6(b)). The lead frame preparation step S34 may be performed prior to or simultaneously with the die pad frame preparation step S32, and may be performed simultaneously with or after the semiconductor chip placement step S36.

[0053] The semiconductor chip arrangement step S36 is the same as the semiconductor chip arrangement step S14 in the first embodiment (see FIG. 6(c)).

[0054] The clip placement step S38 is a step of overlapping and placing the semiconductor chip 10, the lead frame 70 and the clip 21 with the conductive bonding materials 31A, 31B interposed between the electrode pads 12A, 12B and the bonding portions 22A, 22B and the lead-side bonding material 75 interposed between the lead-side pad 72 and the portion of the clip 21 to be bonded to the lead-side pad 72 (lead bonding portion 28) (see FIG. 6(d)). In the method for manufacturing a semiconductor module according to the second embodiment, the lead-side bonding material 75 may be placed (applied) before placing the clip 21, or a lead frame on which the lead-side bonding material 75 is previously placed on the lead-side pad 72 may be prepared in the lead frame preparation step S34. The lead-side bonding material 75 is the lead-side bonding material 74 before reflow.

[0055] In the bonding step S40, reflow is performed with the die pad frame 40 and the lead frame 70 in a fixed position (see FIG. 6(e)). That is, in the bonding step S40, reflow is performed without fixing the positions of the semiconductor chip 10 and the clip 21.

[0056] The semiconductor module 2 according to the second embodiment differs from the semiconductor module 1 according to the first embodiment in that it further includes a lead frame, etc., but since each pair of corresponding electrode pads 12A, 12B and bonding portions 22A, 22B are bonded with conductive bonding materials 30A, 30B, the semiconductor module has a structure capable of suppressing quality variations, similar to the semiconductor module 1 according to the first embodiment. Furthermore, the semiconductor module 2 according to the second embodiment also has the corresponding effects of the semiconductor module 1 according to the first embodiment.

[0057] Although some steps of the manufacturing method for the semiconductor module of embodiment 2 are different from those of embodiment 1, the manufacturing method for the semiconductor module of embodiment 2 includes a bonding preparation step S30 in which the semiconductor chip 10 and the clip 21 are stacked with conductive bonding materials 31A, 31B interposed between the electrode pads 12A, 12B and the bonding portions 22A, 22B, and a bonding step S40 in which the electrode pads 12A, 12B and the bonding portions 22A, 22B are bonded to each corresponding pair of the electrode pads 12A, 12B and the bonding portions 22A, 22B by reflow with the conductive bonding materials 30A, 30B, resulting in a manufacturing method for a semiconductor module that can suppress quality variation, similar to the manufacturing method for the semiconductor module of embodiment 1.

[0058] Furthermore, according to the method for manufacturing a semiconductor module of embodiment 2, the semiconductor chip 10 and the clip 21 are stacked with the conductive bonding materials 31A, 31B interposed therebetween and then reflow is performed. Therefore, even if reflow is performed without fixing the positions of the semiconductor chip 10 and the clip 21, it is possible to suppress variation in the quality of the semiconductor module 2 to be manufactured.

[0059] [Embodiment 3] Fig. 7 is a cross-sectional view of a semiconductor module 3 according to embodiment 3. Fig. 7 is a cross-sectional view corresponding to Fig. 1(b).

[0060] The semiconductor module 3 according to the embodiment 3 basically has the same configuration as the semiconductor module 2 according to the embodiment 2, but the die pad side bonding material is different from that of the semiconductor module 2 according to the embodiment 2. That is, the die pad side bonding material 52 in the semiconductor module 3 has a higher melting point than the other bonding materials (the conductive bonding materials 30A and 30B and the lead side bonding material 74).

[0061] Next, a method for manufacturing the semiconductor module 3 according to the third embodiment will be described. FIG. 8 is a flowchart of a method for manufacturing a semiconductor module according to the third embodiment. 9A to 9E are diagrams for explaining the method for manufacturing a semiconductor module according to embodiment 3. FIG 9A to FIG 9E are diagrams showing the steps. FIG 9A is a cross-sectional view corresponding to FIG 1B.

[0062] The manufacturing method of the semiconductor module according to the third embodiment is basically the same as the manufacturing method of the semiconductor module according to the second embodiment. However, some steps are different from the manufacturing method of the semiconductor module according to the second embodiment because the semiconductor module 3 to be manufactured includes a die pad side bonding material 52.

[0063] The method for manufacturing a semiconductor module according to the third embodiment includes a bonding preparation step S50 and a bonding step S60, as shown in Fig. 8. The bonding preparation step S50 also includes a die pad frame preparation step S52, a semiconductor chip bonding step S54, a lead frame preparation step S56, and a clip arrangement step S58. Each step will be described below.

[0064] The die pad frame preparing step S52 is the same as the die pad frame preparing step S32 in the second embodiment (see FIG. 9(a)).

[0065] The semiconductor chip bonding process S54 is a process for bonding the die pad frame 40 and the semiconductor chip 10 (see FIG. 9(b)). In the third embodiment, the die pad side bonding material 52 having a higher melting point than the other bonding materials (conductive bonding materials 31A, 31B and lead side bonding material 75) is used, and reflow is performed at a higher temperature than the reflow in the bonding process S60, thereby bonding the die pad frame 40 and the semiconductor chip 10.

[0066] The lead frame preparation step S56 is the same as the lead frame preparation step S34 in the second embodiment (see FIG. 9(c)). Note that the lead frame preparation step S56 may be performed simultaneously with or prior to the steps described above.

[0067] The clip placement step S58 is the same as the clip placement step S38 in the second embodiment (see FIG. 9(d)).

[0068] In the bonding step S60, reflow is performed with the die pad frame 40 and the lead frame 70 in a fixed position (see FIG. 9(e)). That is, in the bonding step S60, reflow is performed without fixing the clip 21 in position.

[0069] Although the semiconductor module 3 according to the embodiment 3 has a die pad side bonding material different from that of the semiconductor module 2 according to the embodiment 2, each pair of corresponding electrode pads 12A, 12B and bonding portions 22A, 22B are bonded with conductive bonding materials 30A, 30B, and therefore, like the semiconductor module 2 according to the embodiment 2, the semiconductor module 3 according to the embodiment 3 has a structure capable of suppressing quality variations. In addition, the semiconductor module 3 according to the embodiment 3 has the corresponding effects of the semiconductor module 2 according to the embodiment 2.

[0070] Although some steps of the manufacturing method for the semiconductor module of embodiment 3 are different from those of embodiment 2, the manufacturing method for the semiconductor module of embodiment 3 includes a bonding preparation step S50 in which the semiconductor chip 10 and the clip 21 are arranged in a stacked manner with conductive bonding materials 31A, 31B interposed between the electrode pads 12A, 12B and the bonding portions 22A, 22B, and a bonding step S60 in which the electrode pads 12A, 12B and the bonding portions 22A, 22B are bonded to each corresponding pair of the electrode pads 12A, 12B and the bonding portions 22A, 22B by reflow with the conductive bonding materials 30A, 30B, resulting in a manufacturing method for a semiconductor module that can suppress quality variation, similar to the manufacturing method for the semiconductor module of embodiment 2.

[0071] Furthermore, according to the method for manufacturing a semiconductor module of embodiment 3, the semiconductor chip 10 and the clip 21 are stacked with the conductive bonding materials 31A, 31B interposed therebetween, and then reflow is performed. Therefore, even if reflow is performed without fixing the position of the clip 21, it is possible to suppress variation in the quality of the semiconductor module 3 to be manufactured.

[0072] [Embodiment 4] Fig. 10 is a diagram for explaining a semiconductor module 4 according to embodiment 4. Fig. 10(a) is a plan view of the semiconductor module 4, and Fig. 10(b) is a cross-sectional view of the semiconductor module 4. Fig. 10(b) is a cross-sectional view corresponding to Fig. 1(b).

[0073] The semiconductor module 4 according to the embodiment 4 basically has the same configuration as the semiconductor module 1 according to the embodiment 1, but the number of electrode pads and connecting portions is different from that of the semiconductor module 1 according to the embodiment 1. That is, in the semiconductor module 4, as shown in Fig. 10, in the first region R1, there are multiple sets of electrode pads 82A and connecting portions 92A bonded by a conductive bonding material 30A.

[0074] The semiconductor module 4 includes a semiconductor chip 80 having four electrode pads 82A and a clip 90 having four joints 92A on a main connection portion 94. Each of the electrode pads 82A and joints 92A has a similar configuration to the electrode pads 12A and joints 22A in the first embodiment, except that each of the electrode pads 82A and joints 92A has a smaller area in a plan view.

[0075] Although the semiconductor module 4 of embodiment 4 differs from the semiconductor module 1 of embodiment 1 in the number of electrode pads and connection parts, each pair of corresponding electrode pads 82A, 12B and joint parts 92A, 22B are joined by conductive bonding materials 30A, 30B, and therefore, like the semiconductor module 1 of embodiment 1, the semiconductor module has a structure capable of suppressing quality variation.

[0076] Furthermore, according to the semiconductor module 4 of embodiment 4, in the first region R1, there are multiple sets of electrode pads 82A and bonding portions 92A bonded by the conductive bonding material 30A, which makes it possible to further increase the number of points at which surface tension is generated during reflow and to further promote dispersion of the heat source during use.

[0077] The semiconductor module 4 according to the fourth embodiment also has the corresponding effects among the effects of the semiconductor module 1 according to the first embodiment.

[0078] [Embodiment 5] FIG. 11 is a plan view of a semiconductor module 5 according to the fifth embodiment.

[0079] The semiconductor module 5 according to the fifth embodiment basically has the same configuration as the semiconductor module 4 according to the fourth embodiment, but differs from the semiconductor module 4 according to the fourth embodiment in that a through hole is formed in the clip. That is, in the semiconductor module 5, as shown in Fig. 11, a through hole 96 is formed in a main connection portion 94 at a position that does not overlap with a joint portion 92A in plan view.

[0080] The semiconductor module 5 of embodiment 5 differs from the semiconductor module 4 of embodiment 4 in that a through hole is formed in the clip. However, since each pair of corresponding electrode pads 82A, 12B and joints 92A, 22B are joined by conductive bonding materials 30A, 30B, the semiconductor module has a structure capable of suppressing quality variation, similar to the semiconductor module 4 of embodiment 4.

[0081] Furthermore, according to the semiconductor module 5 of embodiment 5, the through hole 96 is formed in the main connection portion 94 at a position that does not overlap with the joint portion 92A when viewed in a plane, so that it is possible to increase the surface area and the irregularities of the surface shape, thereby improving the heat dissipation performance and the adhesion of the resin when resin sealing is performed.

[0082] The semiconductor module 5 according to the fifth embodiment also has the corresponding effects of the semiconductor module 4 according to the fourth embodiment.

[0083] Although the present invention has been described based on the above embodiment, the present invention is not limited to the above embodiment. It can be embodied in various forms without departing from the spirit of the present invention, and for example, the following modifications are also possible.

[0084] (1) The shapes, positions, sizes, etc. described in the above embodiments are merely examples and may be changed without impairing the effects of the present invention. The same applies to the modified examples described below.

[0085] (2) In the above-mentioned embodiments 4 and 5, the case where there are four electrode pads 82A and four joints 92A in the first region R1 has been described as an example, but the present invention is not limited to this. Fig. 12 is a plan view of a semiconductor module 6 according to modification 1. Fig. 13 is a plan view of a semiconductor module 7 according to modification 2. In the semiconductor module 6 according to modification 1 and the semiconductor module 7 according to modification 2, there are 15 electrode pads 112A and 15 joints 122A in the first region R1.

[0086] Here, the semiconductor module 6 according to the first modification and the semiconductor module 7 according to the second modification will be briefly described. The semiconductor modules 6 and 7 basically have the same configuration as the semiconductor modules 4 and 5 described in the fourth and fifth embodiments, but are larger overall than the semiconductor modules 4 and 5 and have more electrode pads and connecting parts. The semiconductor modules 6 and 7 include a semiconductor chip 110, a conductive bonding material (not shown), a die pad frame 140, a die pad side bonding material (not shown), and another clip 60 as common components. The clip 120 of the semiconductor module 6 and the clip 121 of the semiconductor module 7 have three connecting parts 126 as a common structure. These connecting parts 126 each have a bonding part 122B that is bonded to the electrode pad 112B of the semiconductor chip 110. The clip 120 of the semiconductor module 6 does not have a through hole, while the clip 121 of the semiconductor module 7 has eight through holes 128A formed in the main connecting part 124. In FIG. 13, in order to make the position of the through-hole 128A easier to understand, the reference numerals for the electrode pad 112A and the bonding portion 122A are shown only for one at the top left of the page.

[0087] (3) In the above-mentioned embodiment 5 and modification 2, the through holes that look like squares in plan view have been described, but the present invention is not limited to this. The shape of the through holes can be an appropriate shape for each semiconductor module to which they are applied, and may be other shapes such as a circle, an ellipse, or a polygon in plan view. In addition, the positions at which the through holes are formed and the number of the through holes can also be appropriate for each semiconductor module.

[0088] (4) In the above embodiments and modifications, a die pad frame is used as a base on which a semiconductor chip is mounted, but the present invention is not limited to this. In the semiconductor module of the present invention, a suitable board such as a printed circuit board may be used as a base on which a semiconductor chip is mounted. [Explanation of symbols]

[0089] 1, 2, 3, 4, 5, 6, 7...semiconductor module, 10, 80, 110...semiconductor chip, 12A, 12B, 14, 82A, 112A, 112B...electrode pad, 16...passivation film, 20, 21, 90, 120, 121...clip, 22A, 22B, 92A, 122A, 122B...joint, 24, 94, 124...main connection part, 26, 27, 126...connection part, 28...lead joint, 30A, 30B...conductive joint material, 31A, 31B...(ribs) Conductive bonding material (before reflow), 40, 140... die pad frame, 42... die pad, 50, 52... die pad side bonding material, 51... die pad side bonding material (before reflow), 60... another clip, 62... bonding portion (of another clip), 70... lead frame, 72... lead side pad, 74... lead side bonding material, 75... lead side bonding material (before reflow), 96, 128A... through hole, R1... first region, R2... second region, L... boundary between first region and second region

Claims

1. A semiconductor chip having a plurality of electrode pads connected to the same destination; a clip having a plurality of joints corresponding to the plurality of electrode pads; a conductive bonding material that bonds the electrode pad and the bonding portion, a semiconductor module in which the electrode pads and the joints are joined together by the conductive bonding material for each corresponding pair, The semiconductor module includes: a die pad frame having a die pad for mounting the semiconductor chip; a die pad side bonding material that bonds the die pad and the semiconductor chip; a lead frame having lead side pads for mounting the clip; a lead-side bonding material for bonding the lead-side pads to a portion of the clip that is to be bonded to the lead-side pads, the die pad side bonding material has a higher melting point than the conductive bonding material and the lead side bonding material, the clip has a shape in which a width in a direction along which a current flows changes discontinuously when viewed in a plan view, In the clip, when the wider portion is a main connection portion, the narrower portion having a connection terminal at its tip is a connecting portion, the region where the semiconductor chip and the main connection portion overlap is a first region, and the region where the semiconductor chip and the connecting portion overlap is a second region, the electrode pad and the bonding portion bonded by the conductive bonding material are present in both the first region and the second region, The clip has a plurality of connecting portions, A semiconductor module, wherein each of the connecting portions has the joint portion.

2. 2. The semiconductor module according to claim 1, wherein a plurality of pairs of the electrode pad and the joint portion joined by the conductive joint material are present in the first region.

3. 3. The semiconductor module according to claim 1, wherein the main connection portion has a through hole formed at a position not overlapping with the joint portion in a plan view.

4. the semiconductor chip is a MOSFET, 4. The semiconductor module according to claim 1, wherein an electrode pad constituting the plurality of electrode pads is a source pad.

5. a bonding preparation step of preparing a semiconductor chip having a plurality of electrode pads to be connected to the same destination and a clip having a plurality of bonding portions corresponding to the plurality of electrode pads, and arranging the semiconductor chip and the clip in a superimposed state with a conductive bonding material interposed between the electrode pads and the bonding portions; a bonding step of bonding the electrode pads and the bonding portions to each corresponding pair with the conductive bonding material by reflow, the bonding preparation step includes a die pad frame preparation step of preparing a die pad frame having a die pad on which the semiconductor chip is to be placed, a semiconductor chip bonding step of bonding the die pad frame and the semiconductor chip with a die pad side bonding material interposed between the die pad frame and the semiconductor chip, a lead frame preparation step of preparing a lead frame having lead side pads on which the clip is to be placed, and a clip arrangement step of overlapping and arranging the semiconductor chip, the lead frame and the clip with the conductive bonding material interposed between the electrode pads and the bonding portions and with a lead side bonding material interposed between the lead side pads and portions of the clip to be bonded to the lead side pads, In the bonding step, reflow is performed with the die pad frame and the lead frame fixed in position; In the semiconductor chip bonding step, a die pad side bonding material having a higher melting point than the conductive bonding material and the lead side bonding material is used, and reflow is performed at a higher temperature than the reflow in the bonding step; the clip has a shape in which a width in a direction along which a current flows changes discontinuously when viewed in a plan view, In the clip, a wide portion is a main connection portion, a narrow portion having a connection terminal at its tip is a connecting portion, and after the clip placement step, a region where the semiconductor chip and the main connection portion overlap is a first region, and a region where the semiconductor chip and the connecting portion overlap is a second region. the electrode pad and the bonding portion to be bonded by the conductive bonding material in the bonding step are present in both the first region and the second region, The clip has a plurality of connecting portions, 4. A method for manufacturing a semiconductor module, wherein each of the connecting portions has the joint portion.

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