Electronic interlocking device and computer program

Abstract

To making it possible to integrate and process interlocking functions of many stations.SOLUTION: An electronic interlocking device 1 is connected to a plurality of on-site apparatuses 2 including a signal 21, a point machine 22, and a train position detection device 23. The electronic interlocking device 1 includes an interlocking processing unit 3 performing arithmetic processing. The interlocking processing unit 3 has a sequential logic unit 32. The sequential logic unit 32 executes course locking processing. The sequential logic unit 32 has a plurality of comparison functions FC, a plurality of establishment conditions C, an internal state variable q, and an internal state function Fi. When an input variable x is input in the sequential logic unit 32, it is determined whether or not the input variable x and the internal state variable q coincide with the establishment conditions C by each comparison function FC. If they coincide with each other, the processing of outputting an output variable z corresponding to the establishment condition C is periodically repeated. The internal state function Fi is input with the input variable x and the output variable z and an internal state variable q of the next period is output. The sequential logic unit 32 calculates the plurality of comparison functions FC in parallel in the processing in each period.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to an electronic interlocking device for railways, and a computer program for causing a computer to perform arithmetic processing of the electronic interlocking device. [Background technology]

[0002] The Ministerial Ordinance (Ministry of Land, Infrastructure, Transport and Tourism Ordinance) that prescribes technical standards for railways states that "At crossings or junctions of tracks where there is a risk of collisions and derailments, and other points, devices that link signals that may interfere with the route, and between signals and switches in that route, or between similar devices, must be provided in order to prevent collisions and ensure the safety of train operation" (see Article 56). This device is the railway interlocking device. The interlocking device performs the following operations without any contradictions: route setting → switch switching → route securing → route maintenance → signal display. According to the Japan Industrial Standards, an interlocking device is a general term for a device that links signals, switches, etc. (see Non-Patent Document 1, number 5001). Interlocking devices include relay interlocking devices and electronic interlocking devices. Relay interlocking devices are interlocking devices that electrically link using a group of relays. Electronic interlocking devices are interlocking devices that link using a microcomputer or the like (see Non-Patent Document 1).

[0003] The interlocking performed by the interlocking devices will be described with reference to the interlocking diagram shown in Fig. 2. An interlocking diagram is a diagram that shows the interlocking of the interlocking devices and other details using railway signal letter symbols, graphic symbols, etc. (see number 1009 in Non-Patent Document 1). An interlocking diagram defines the circumstances under which a signal can be displayed and until when the route should be secured, and is composed of a simplified wiring diagram called an interlocking diagram (top of Fig. 2) and an operation definition table called an interlocking table (bottom of Fig. 2).

[0004] In this example, the interlocking diagram shows the track layout, down line yard signals "1R" and "2R", down line departure signals "3R" and "4R", and points "11" and "51". The yard signals are signals for trains entering a station (see number 2011 in Non-Patent Document 1). The departure signals are signals for trains leaving a station (see number 2012 in Non-Patent Document 1). Note that stations with yard signals, departure signals, and points are included in the definition of a station.

[0005] Generally, the normal state of a device is called the normal position, and the other (opposite) state is called the reverse position (see number 1008 in Non-Patent Document 1). In a point machine, the direction in which it is always open is called the normal position, and the other open directions are called the reverse position. The direction in which the arrow feathers on the interlocking diagram are pointing is defined as the normal position of the point machine, the direction they are not pointing is defined as the reverse position, and the state in which the route is not set by the signal lever is defined as the normal position, and the state in which the route is set is defined as the reverse position. Also, a state in which the device is mechanically protected so that the state does not change regardless of operation is called locked. Also, letters in circles on the interlocking diagram indicate the reverse position of the device in question.

[0006] The number column of the interlocking table lists the elements that can be operated. In this example, the "signal lever" that operates the signal and the "point lever" that operates the point machine are listed. The lock column and the signal control or point inspection lock column of the interlocking table show whether the action in the number column can be realized.

[0007] In the number column of the interlocking table, "1R" and "2R" are signal levers, and "11" and "51" are point levers.

[0008] For example, when setting a route that can be entered by the "1R" signal indicating proceed, that is, when setting the "1R" route, when the points "51" and "11" are locked in position and there are no other trains on the track sections "51T", "11T", "1RT", and "BT", the train can safely enter, and the "1R" signal indicating proceed can be turned on. This is how the route for "1R" is set. Although "BT" is not directly on this route, it is inserted in the interlocking table because of the possibility of a side collision.

[0009] Similarly, when setting the route for "2R", when point "51" is locked in position and point "11" is locked in reverse (circled number 11), and there are no other trains on the track sections "51T", "11T", "BT", and "2RT", the signal for "2R" can light up the aspect indicating proceed. This chain of events allows the route for "2R" to be set.

[0010] If you try to set a route for "1R" and a route for "2R" at the same time, the signal for "2R" will remain in a stop state because "11" is not reverse locked. In other words, you cannot set a route for "2R." This chain of events invalidates the conflicting operations.

[0011] When you want to switch point "11", if there is no train at "11T" and the route is not set by "1R" or "2R", you can switch point "11". "1R" and "2R" are not listed in the locking column of "11" in the interlocking table, but this is because point "11" is listed in the locking column of "1R" and "2R", so the entries are omitted.

[0012] Similarly, when you want to switch point "51", if there is no train at "51T" and the route is not set by "1R" or "2R", you can switch point "51". "1R" and "2R" are not listed in the locking column of "51" in the interlocking table, but this is because point "51" is listed in the locking column of "1R" and "2R", so the entries are omitted.

[0013] The Route Lock column and the Approach Lock or Reserved Lock column of the interlocking table indicate locks that prevent the points related to the route from being switched.

[0014] The route lock column indicates that the points in that section will remain locked until the train passes through the section in parentheses. For example, even if the train cancels its route at "1R" after passing the "1R" signal, points "51" and "11" will remain locked until the train has passed "51T," and point "11" will remain locked until the train has passed "11T."

[0015] The Approaching Lock or Pending Lock columns indicate that even if the route is cancelled, the route will be held for the number of seconds specified in parentheses if a train is present in the indicated section. This is because the train cannot stop immediately even if the route is cancelled.

[0016] Conventional electronic interlocking devices have realized the chains shown in interlocking diagrams using two main methods. One method focuses on the interlocking diagram, checks the track elements from the starting point to the destination shown in the interlocking diagram, and finds elements that affect the route. This method is called the "spur method" because it ensures a route from the starting point to the destination. The other method is the "wire data method," which focuses on the interlocking table, converts the chains shown in the interlocking table into relay logic, interprets the digitalized version, and executes it.

[0017] For example, in the example in Figure 2, the route of "1R" has a starting point of "Shimo 1T" and a destination point of "1RT." In the "track system," the electronic interlocking device realizes the function of the interlocking device by sequentially checking whether the train can occupy each element of "51T," "11T," "1RT," and "BT," which are the order in which the train moves.

[0018] In the "wired data method," relay logic is sequentially interpreted by an interpreter, which is general-purpose software for electronic interlocking, to realize the function of the interlocking device. In other words, this method is an imitation (emulation) of a relay interlocking device by software.

[0019] Both of these methods use a single thread to process the functions of the interlocking device (sequential confirmation or sequential interpretation). Therefore, if such processing is performed by a single computing element, as the amount of calculation increases, the processing cycle becomes longer in proportion to the amount of calculation. If the processing cycle becomes too long, real-time processing cannot be ensured.

[0020] Traditionally, interlocking devices have been installed in the equipment rooms of each station. Looking at technological trends, we are now in an era where computing resources do not necessarily need to be on-site, with the practical application of high-speed computing devices and the development of high-speed, large-capacity communications, and the technological elements for interlocking devices have become available that allow them to function without being installed in the equipment rooms of each station. With the advent of a super-aging society and population decline, it is advantageous from the perspective of continuity of maintenance to consolidate devices so that maintenance can be performed in a concentrated manner, rather than installing interlocking devices at each station of each railway company.

[0021] In recent years, an electronic interlocking device that processes the interlocking logic of multiple stations has been proposed (see Patent Document 1). This electronic interlocking device processes the interlocking logic of multiple stations sequentially for each station within a processing cycle (see paragraph 0009 and Figure 2 (B) of the specification of Patent Document 1). For this reason, as the number of stations increases, the processing volume required by the stations increases, and the processing capacity of the electronic interlocking device becomes insufficient (see paragraph 0028 of the same document). [Prior art documents] [Patent documents]

[0022] [Patent Document 1] Patent Publication No. 2021-62852 [Non-patent literature]

[0023] [Non-Patent Document 1] JIS E 3013:2001 "Railway signalling safety terminology" Summary of the Invention [Problem to be solved by the invention]

[0024] The present invention is intended to solve the above problem, and has an object to enable the interlocking functions of many stations to be processed in a centralized manner. [Means for solving the problem]

[0025] The electronic interlocking device of the present invention is an electronic interlocking device connected to a plurality of field devices including signals, points and train position detection devices, and is provided with an interlocking processing unit for performing arithmetic processing, and an interface for connecting the interlocking processing unit and the field devices, the interlocking processing unit has a sequence logic unit for executing a process of locking a route, the sequence logic unit has a plurality of comparison functions, a plurality of establishment conditions, an internal state variable and an internal state function, and periodically repeats a process in which an input variable is input, the input variable and the internal state variable are judged by each of the comparison functions to determine whether or not they match the establishment conditions, and when they match, an output variable corresponding to the establishment condition is output, the internal state function is input with the input variables and output variables, and outputs the internal state variables for the next period, and the input variables, the internal state variables, The variables and the conditions to be satisfied are each a tuple in which one or more data items are arranged in a predetermined order, and in the process of route locking, the input variables are tuples representing the route setting state and the train position, the internal state variables are tuples representing the train position one cycle ago and the route lock state of the point one cycle ago, the conditions to be satisfied are tuples representing the route lock conditions, the output variables represent the route lock state of the point, the internal state function substitutes the train position in the input variable for the train position in the internal state variable and substitutes the route lock state of the point in the output variable for the route lock state in the internal state variable, the multiple comparison functions are the same function, and the sequential logic unit calculates the multiple comparison functions in parallel in the processing within each cycle.

[0026] In this electronic interlocking device, it is preferable that the sequential logic unit further has a function of executing an approach lock or hold lock process, and in the approach lock or hold lock process, the input variables are tuples representing the train position and the signal aspects, the internal state variables are tuples representing the approach lock or hold lock state of the point machine of the route one cycle ago and the time element of the approach lock or hold lock one cycle ago, the establishment condition is a tuple representing the approach lock or hold lock condition, the output variables represent the approach lock or hold lock state of the point machine of the route, and the internal state function substitutes the approach lock or hold lock state of the point machine of the route in the output variable for the approach lock or hold lock state of the point machine of the route in the internal state variable, and sets the time element of the internal state variable to a value obtained by subtracting one cycle.

[0027] In this electronic interlocking device, the interlocking processing unit further has a combination logic unit that executes signal control and point lock processing, and the combination logic unit has a plurality of comparison functions and a plurality of satisfaction conditions, and an input variable is input, and each comparison function judges whether the input variable matches the satisfaction condition, and when the input variable matches, the judgment result is output as an output variable, and in the signal control and point lock processing, the input variable is a tuple representing the route setting state or point operation state and the train location on the line, the satisfaction condition is a tuple representing the conditions set for signal control and point lock, and the output variable represents whether the route setting or point operation conditions are satisfied, and it is preferable that the plurality of comparison functions are the same function, and the combination logic unit calculates the plurality of comparison functions in parallel.

[0028] In this electronic interlocking device, it is preferable that the interlocking processing unit has a post-processing unit to which a plurality of the output variables are input, the post-processing unit creates a logical sum for each point machine from the locking status of the points in the plurality of output variables, and outputs the result as whether or not each point machine is locked, and in the calculation of the logical sum, the side on which the point is locked is set to a logical variable of 1.

[0029] In this electronic interlocking device, it is preferable that the interlocking processing unit has a CPU and a GPU, the GPU has a plurality of cores, and each of the cores of the GPU calculates each of the comparison functions in parallel.

[0030] The computer program of the present invention is a computer program for causing a computer connected to a plurality of field devices including signals, points and train position detection devices to perform arithmetic processing of an electronic interlocking device, the computer having a sequential logic unit for causing the computer to execute a process of track locking, the sequential logic unit having a plurality of comparison functions, a plurality of satisfaction conditions, an internal state variable and an internal state function, an input variable is input, and each comparison function judges whether the input variable and the internal state variable match the satisfaction condition, and when they match, an output variable corresponding to the satisfaction condition is outputted in a periodically repeated manner, the input variable and the output variable are inputted to the internal state function, and the internal state function outputs the internal state variable for the next period, the input variables, the internal state variables and the satisfaction conditions being: Each of the comparison functions is a tuple, which is a set of one or more data items arranged in a predetermined order, and in the process of route locking, the input variables are tuples representing the route setting state and the train position, the internal state variables are tuples representing the train position one cycle ago and the route lock state of the point one cycle ago, the establishment condition is a tuple representing the route lock condition, the output variable represents the route lock state of the point, the internal state function substitutes the train position in the input variable for the train position in the internal state variable and substitutes the route lock state of the point in the output variable for the route lock state in the internal state variable, the multiple comparison functions are the same function, and the sequential logic unit causes a computer to calculate the multiple comparison functions in parallel in the processing within each cycle.

[0031] In this computer program, the sequential logic unit further has a function of executing processing of an approach lock or a hold lock, and in the processing of the approach lock or the hold lock, the input variables are tuples representing the train position and the signal aspects, the internal state variables are tuples representing the approach lock or hold lock state of the point machine of the route one cycle ago and the time element of the approach lock or hold lock one cycle ago, the establishment condition is a tuple representing the condition of the approach lock or hold lock, the output variables represent the approach lock or hold lock state of the point machine of the route, and it is preferable that the internal state function substitutes the approach lock or hold lock state of the point machine of the route in the output variable for the approach lock or hold lock state of the point machine of the route in the internal state variable, and sets the time element of the internal state variable to a value obtained by subtracting one cycle.

[0032] This computer program further has a combinational logic unit that causes the computer to execute signal control and point locking processing, the combinational logic unit having a plurality of comparison functions and a plurality of satisfaction conditions, an input variable is input, and each comparison function determines whether the input variable matches the satisfaction condition, and when the input variable matches, an output variable corresponding to the satisfaction condition is output, and in the signal control and point locking processing, the input variable is a tuple representing the route setting state or point operation state and the train location on the line, the satisfaction condition is a tuple representing the conditions set for signal control and point locking, the output variable represents whether the route setting or point operation conditions are satisfied, the plurality of comparison functions are the same function, and it is preferable that the combinational logic unit causes the computer to calculate the plurality of comparison functions in parallel.

[0033] This computer program has a post-processing unit to which a plurality of the output variables are input, and the post-processing unit creates a logical sum for each point from the locking status of the points in the plurality of output variables, and outputs the result as whether or not each point is locked, and it is preferable that in calculating the logical sum, the side on which the point is locked is set to a logical variable of 1.

[0034] In this computer program, it is preferable that the computer has a CPU and a GPU, the GPU has a plurality of cores, and the computer program causes each of the cores of the GPU to calculate each of the comparison functions in parallel. Effect of the Invention

[0035] According to the electronic interlocking device and computer program of the present invention, the interlocking processing unit processes the interlocking using multiple comparison functions and calculates the comparison functions in parallel, so that an increase in calculation time is suppressed even if the number of routes to be processed is large. [Brief description of the drawings]

[0036] [Figure 1] FIG. 2 is a block diagram of an electronic interlocking device according to an embodiment of the present invention. [Diagram 2] An example of an interlocking diagram. [Diagram 3] FIG. 2 is a block diagram of an interlocking processing unit in the electronic interlocking device. [Figure 4] FIG. 2 is a block diagram showing a logical model of a combinational logic unit in the interlocking processing unit. [Diagram 5] 3 is a state transition diagram of the course lock, approach lock, and pending lock in the example of FIG. 2. [Figure 6] FIG. 2 is a block diagram showing a logical model of a sequential logic unit in the interlocking processing unit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0037] An electronic interlocking device according to one embodiment of the present invention will be described with reference to Figures 1 to 6. As shown in Figure 1, an electronic interlocking device 1 is connected to a plurality of field devices 2 including a signal device 21, a point machine 22, and a train position detector 23. The electronic interlocking device 1 is a device that performs mutual chaining of the plurality of field devices 2. Chaining means setting a certain order and restrictions on the handling between two or more signals, points, etc. (see number 5006 in Non-Patent Document 1).

[0038] In this embodiment, the train position detection device 23 is a track circuit. A track circuit is an electric circuit that uses rails to detect trains or vehicles (see number 7001 in Non-Patent Document 1). Note that the train position detection device 23 is not limited to a track circuit, and may be, for example, a device that detects trains wirelessly or vehicles using loop coils installed on the track.

[0039] The electronic interlocking device 1 includes an interlocking processing unit 3 and an interface 4. The interlocking processing unit 3 performs calculation processing. The interlocking processing unit 3 is configured using a computer. The interface 4 connects the interlocking processing unit 3 and the field device 2.

[0040] The electronic interlocking device 1 has an I / O terminal 5 provided for each station 20. Each I / O terminal 5 is connected to the field devices 2 of the station 20 in which it is provided. The interface 4 has a data communication function for performing data communication between the interlocking processing unit 3 and the I / O terminal 5. When the interlocking functions of multiple stations 20 are consolidated, one interlocking processing unit 3 is connected to the field devices 2 via multiple I / O terminals 5.

[0041] The interlocking processing unit 3 has a CPU 6 and a GPU 7. The GPU 7 has multiple cores. A GPU (Graphics Processing Unit) is a type of microprocessor that assists a CPU (Central Processing Unit), and has the function of performing image processing at high speed. A GPU is not suitable for general-purpose processing like a CPU, but has many cores (operating units) inside and is suitable for repeatedly applying relatively simple calculations to a large amount of data in parallel. Taking advantage of this characteristic, GPU computing makes the GPU perform processing other than image processing at high speed. In addition to the CPU 6 and the GPU 7, the interlocking processing unit 3 has a memory (memory element or storage device) and the like.

[0042] As shown in Fig. 3, the interlocking processing unit 3 has a combination logic unit 31, a sequence logic unit 32, a post-processing unit 33, and a pre-processing unit 34. These are functional parts that function by executing a program in the CPU 6 or the like. The combination logic unit 31 has a function of executing signal control and police lock processing. The sequence logic unit 32 has a function of executing route lock processing and a function of executing approach lock or hold lock processing. The post-processing unit 33 outputs a control output to the interface 4. The pre-processing unit 34 receives information of the field devices 2 from the interface 4.

[0043] The operation principle of the combination logic unit 31 in the electronic interlocking device 1 configured as above will be explained using a model (example) (see FIG. 2). Note that the target of the interlocking process by the combination logic unit 31 is not limited to this model (interlocking diagram in FIG. 2).

[0044] In the interlocking table that constitutes the interlocking diagram in Figure 2, whether the operation in the number column is established or not depends on the information in the lock column and the information in the signal control or inspector lock column. This dependency can be expressed as a truth table.

[0045] [Table 1]

[0046] Table 1 is a truth table for route "1R" (a route that can be entered when the signal aspect of signal "1R" indicates to proceed) based on the interlocking table in Figure 2. Here, in the column for locking points, 1 indicates that the point is locked, and 0 indicates that it is not locked. In the column for no trains present, 1 indicates that there is no train in the section, and 0 indicates that there is a train present or that it is undetermined.

[0047] The logic shown in the truth table can be expressed as a logical expression combining AND (logical product), OR (logical sum), and NOT (negation). Therefore, in the interlocking table, whether the operation in the number column is established is determined by combination logic based on the information in the lock column and the information in the signal control or inspector lock column.

[0048] Logical expressions based on truth tables can be expressed as logical functions. From the truth table in Table 1, the logical function for path "1R" can be expressed as Equation 1.

[0049]

number

[0050] Similarly, the logic function for route “2R” can be expressed as Equation 2.

[0051]

number

[0052] Furthermore, we can create a logic function that leads to the same result even if we reverse the 1s and 0s in the logic variables x1, …, x9 (De Morgan's Laws).

[0053] The same applies if the number of paths is three or more; a truth table of the paths can be created and a logic function can be created from that truth table.

[0054] In addition, to determine whether the point in the number column can be switched, a truth table can be similarly created based on the interlocking table, and the logical function of that point (switch lever) can be created from that truth table.

[0055] Such a logic function can be expressed by input variables, valid conditions, and comparison functions.

[0056] For example, in the logic function of Equation 1, the input variable x has multiple data items as follows:

[0057] x=(x1,x2,x3,x4,x5,x6,x7,x8,x9)

[0058] The satisfaction condition C1 has multiple data items and is expressed by the following formula.

[0059] C1=(1,0,1,0,1,1,1,1,1,*)

[0060] In the conditions, * indicates that either 0 or 1 is acceptable.

[0061] Comparison function F C (x, C1) compares the input variable x with the condition C1 and determines whether the input variable x and the condition C1 match. If they match, F C If (x, C1) = 1 and there is no match, F C (x, C1) = 0. This gives the same result as directly calculating the logical function of Equation 1.

[0062] Similarly, in the logical function of Equation 2, the condition C2 to be satisfied is expressed by the following equation.

[0063] C2=(1,0,0,1,1,1,1,*,1)

[0064] Comparison function F C (x, C2) compares the input variable x with the condition C2 and determines whether the input variable x and the condition C2 match. If they match, F C If (x, C2) = 1 and there is no match, F C (x, C2) = 0. This gives the same result as directly calculating the logical function of Equation 2.

[0065] Comparison function F C Since the operation of does not depend on the time context, multiple comparison functions F C The above operations can be processed in parallel.

[0066] Comparison function F C is the same function regardless of the route and the switch. This is not limited to the interlocking table illustrated in FIG. 2, and the logic expressed in the truth table based on any interlocking table has the same comparison function F C Since the calculations are performed in this way, it is possible to obtain the expected performance on a GPU that excels at processing the same functions in parallel.

[0067] Based on the above-mentioned operating principle, the operation of the combinational logic unit 31 will be described. Figure 4 shows a logical model of the combinational logic unit 31. The combinational logic unit 31 executes signal control and police lock processing according to this logical model.

[0068] The combinatorial logic unit 31 is a set of a plurality of comparison functions F C and multiple satisfied conditions C1, C2, …, C m In addition, the condition C j (j=1 . . . m) are stored in advance in the memory of the interlocking processor 3.

[0069] The combination logic unit 31 receives an input variable x and determines whether the input variable x satisfies the condition C j Each comparison function F C (x,C j ) and when it matches (x=C j ), and the discrimination result is output as the output variable z j Output as (j=1…m).

[0070] Input variable x and condition C j are each a tuple, which is a set of one or more data items arranged in a predetermined order. The Japanese Industrial Standard JIS X 25024:2018 "Quality Requirements and Evaluation of Systems and Software Products" states that a tuple is a set of fields or data items. A set of data items is represented as a set of data items arranged in a predetermined order. A tuple can handle an array. Records in a database are also tuples. Note that in this application, a tuple is not limited to a tuple in a specific programming language.

[0071] In the signal control and point locking process, the input variable x is a tuple representing the route setting state or point operation state and the train location. j is a tuple representing the conditions set for signal control and station locking. The combination logic unit 31 determines the conditions C j The output variable z jindicates whether the route setting or point operation conditions are met. When the conditions are met, the output variable z j is 1, and when the condition is not met, the output variable z j is 0.

[0072] Multiple comparison functions F C are the same function. Note that each comparison function F C (x,C j ) (j=1…m) are not necessarily the same input variable x, and the condition C j are not identical.

[0073] The combinatorial logic unit 31 is a set of a plurality of comparison functions F C are calculated in parallel.

[0074] In this embodiment, each of the cores of the GPU 7 performs a comparison function F C Each of the above is calculated in parallel.

[0075] In this way, the combinatorial logic unit 31 of the interlocking processor 3 uses a plurality of comparison functions F C Since the above operations are performed in parallel, the increase in the calculation time can be suppressed even if the number of paths to be processed increases.

[0076] In addition, each core of the GPU 7 in the interlocking processing unit calculates a comparison function F C Since each of these is calculated in parallel, the comparison function F C This allows high-speed calculations, and increases in calculation time can be further suppressed even if the number of routes to be processed increases.

[0077] Next, the sequence logic unit 32 in the electronic interlocking device 1 will be described (see FIG. 3).

[0078] For example, in the interlocking diagram of Figure 2, there are points "51" and "11" on the route of signal "1R" in that order. Figure 5 shows an example of a state transition diagram for route lock, approach lock, and pending lock for that route. If there are three or more points on the route, the number of states in the state transition diagram can be increased.

[0079] Such state transitions are subject to sequential logic, and cannot be expressed by only input variables, establishment conditions, and comparison functions, because simple combinational logic cannot be applied. The inventor of the present application focused on the internal state of a system consisting of points and the like, and came to invent an electronic interlocking device 1 that uses a comparison function to process route locking, approach locking, and hold locking. The use of a comparison function makes it possible to process route locking, approach locking, and hold locking in parallel.

[0080] 6 shows a logical model of the sequential logic unit 32. The sequential logic unit 32 executes the process of route locks, approach locks and pending locks in accordance with this logical model.

[0081] The sequential logic unit 32 is a function of a plurality of comparison functions F C and multiple fulfillment conditions C k (k=1…n), internal state variable q, and internal state function F i Condition C k (k=1...n) is stored in advance in the memory of the interlocking processor 3. Note that the condition C k is the condition C for the combinational logic part j The sequential logic unit 32 determines a plurality of internal state variables q and a plurality of internal state functions F i may have the following structure:

[0082] The sequential logic unit 32 receives an input variable x and determines whether the input variable x and the internal state variable q satisfy the condition C k Each comparison function F C (x,C k ,q) and when it matches, the condition C k The output variable z k The process of outputting is repeated periodically.

[0083] Internal state function F i is the input variable x and the output variable z k is input and the internal state variable q of the next period is output.

[0084] That is, in the processing of the sequential logic unit 32, the internal state function F i The output of the comparison function F C This feedback periodically feeds back the comparison function F C Since the internal state is reflected in the comparison by, sequential logic processing becomes possible.

[0085] Input variable x, internal state variable q, and condition C k Each is a tuple, which is a set of one or more data items in a given order.

[0086] The above configuration of the sequence logic unit 32 is common to the route lock and the approach or hold lock.

[0087] In the process of the route locking, the input variable x is a tuple representing the route setting state and the train position. The internal state variable q is a tuple representing the train position one cycle ago and the route locking state of the point one cycle ago. k is a tuple that represents the path locking condition. The output variable z represents the path locking state of the point.

[0088] Internal state function F i (x,q,z1…z n ) substitutes the train position in the input variable x for the train position in the internal state variable q and outputs the k The route lock state of the point at is substituted into the route lock state at the internal state variable q.

[0089] The sequence logic unit 32 has the function of executing the above-mentioned route locking process, as well as the function of executing approach locking or hold locking.

[0090] In the process of approach lock or hold lock, the input variable x is a tuple representing the train position and the signal aspect. The internal state variable q is a tuple representing the state of the approach lock or hold lock of the point machine on the route one cycle ago, and the time element of the approach lock or hold lock one cycle ago. k(k=1...n) is a tuple that represents the condition of the approach lock or the pending lock. k indicates the approach lock or pending lock status of the point machine on the route.

[0091] Internal state function F i is the output variable z k The approach lock or pending lock state of the point of the route in is substituted for the approach lock or pending lock state of the point of the route in internal state variable q, and the time element of internal state variable q is set to a value obtained by subtracting one period.

[0092] Multiple comparison functions F C are the same function. Note that the comparison function F C is the comparison function F of the combinatorial logic unit 31. C Each comparison function F C The input variable x input to is not necessarily the same, and the satisfaction condition C is not the same.

[0093] The sequential logic unit 32 uses a plurality of comparison functions F C are calculated in parallel.

[0094] The interlocking process of the route locking by the sequential logic unit 32 will be described in further detail using the model of the interlocking diagram in Fig. 2. Table 2 is a logic table showing the route locking in the interlocking table in Fig. 2, and describes the route locking of point machine "51". Note that the route locking of point machines "11" and the like may be described in the "..." column of this logic table, but since it is created in the same way as point machine "51", description is omitted in this example. The target of the interlocking process by the sequential logic unit 32 is not limited to this model (the interlocking diagram in Fig. 2).

[0095] [Table 2]

[0096] In this logic table, the left column represents the input, the middle column represents the internal state, and the right column represents the output.

[0097] The left column indicates whether or not a train is present in the section "51T" x5, that is, whether or not the train is located in the section "51T", and whether or not the route "1R" or "2R" is set δ 1R or δ 2R It should be noted that when a track circuit is used for the train position detection device 23, the section "51T" is also called the track "51T". The input variable x is a tuple having at least the following data items.

[0098] x=(x5,δ 1R or δ 2R )

[0099] When a train is present in the section "51T", x5 = 1. When no train is present in the section "51T", x5 = 0. When the route setting is "1R" or "2R", δ 1R or δ 2R = 1. When the course is not set, δ 1R or δ 2R = 0. Note that a logical table can be created by assigning the binary values ​​1 and 0 in the opposite order.

[0100] The middle column shows whether or not a train is present in the section "51T" one cycle ago (x5), and the state of the track lock "51TRS" of the point machine "51" one cycle ago (δ 51TRS ) In this way, what is inside the brackets indicates what happened one cycle ago. The internal state variable q is a tuple that has at least the following data items:

[0101] q=((x5),(δ 51TRS ))

[0102] The right column shows the state of the "51TRS" switch "51" 51TRS The output variable z is expressed by the following equation.

[0103] z=δ 51TRS

[0104] When locking the switch "51", δ 51TRS = 1. When the switch "51" is not locked, δ51TRS =0.

[0105] Comparison function F C (x,C,q) is the function for producing output z.

[0106] The satisfaction condition C represents the condition for locking the route, and is a tuple that compares at least the data items in the following expressions. Each satisfaction condition C corresponds to each row in the logical table.

[0107] (x5,δ 1R or δ 2R ,(x5),(δ 51TRS ))

[0108] Comparison function F C (x,C,q) determines whether the input variable x and the internal state variable q meet the condition C, and if they do, the sequential logic unit 32 outputs the output variable z corresponding to the condition C. For example, in the row No. 4 of the logic table, the output variable z corresponding to the condition C=(0,0,1,1) is z=δ 51TRS =0, which means switch "51" is unlocked.

[0109] Internal state function F i is a function that receives an input variable x and an output variable z and outputs an internal state variable q for the next period. i Substitutes x5 in the input variable x for (x5) in the internal state variable, and δ in the output variable z 51TRS (δ 51TRS For example, in row No. 4 of the logic table, the internal state variable q = (1,1), x5 = 0 of the input variable x, and δ of the output variable z. 51TRS = 0 is assigned to the internal state variable q, and since q = (0,0), a transition is made to row No. 1 in the logic table.

[0110] Whether a train has entered the designated section "51T" and whether it has passed through it is determined by comparing the presence or absence of a train on the line x5 in the input variable x and the presence or absence of a train on the line one cycle ago (x5) in the internal state variable q with the condition C. The entry and passage of other sections are determined in the same way.

[0111] Each row of this logic table will be explained (see No. 1 to No. 16 in Table 2). There are four data items in total, two for the input variable x and two for the internal state variable q. 4 =16 states are listed.

[0112] No.1 is the state where there is no train at all, x5=0,(x5)=0, and no route is set. 1R or δ2R =0.

[0113] No.2 is δ even though the course has not been set. 1R or δ2R = 0, the lane lock is off (δ 51TRS )=1. This is a state where a failure of the electronic interlocking device 1 is detected, and the transition to the safe side δ 51TRS =1.

[0114] No.3 is a state in which the train was on the line regardless of the route "1R" or "2R".

[0115] At No. 4, the train has left section 51T and the track lock may be released.

[0116] No. 5 is the state immediately after the course is set, when the course locking starts.

[0117] In No.6, the route has been set and the train has not yet passed the signal.

[0118] In No.7, the train continues to set its route, but the route lock is released because the train has passed through section "51T". This is the δ 51TRS =1.

[0119] In No.8, the train has left section "51T" but is still setting its course.

[0120] No.9 indicates that a train unrelated to the route has entered section "51T."

[0121] No.10 changed course, but the train was unable to stop and began to move inward from the signal.

[0122] No.11 indicates that a train unrelated to the route is present in section "51T".

[0123] No.12 is on course and is currently in section "51T".

[0124] No.13 is a state where a train enters section "51T" without a route lock even though the route has been set. This transition occurs to the safe side due to a dangerous side failure.

[0125] No.14 shows the state in which the train has entered section "51T" with its course set.

[0126] No.15 is a state where the train is in section "51T" with the route set but the route is not locked. This transition is made to the safe side due to a dangerous side failure.

[0127] No.16 shows the train in section "51T" with its course set.

[0128] A route lock establishment condition C is created based on each row of such a logic table.

[0129] Next, the interlocking process of the approach lock or the hold lock by the sequence logic unit 32 will be described in more detail using the interlocking diagram model of Fig. 2. Table 3 is a logic table showing the approach lock or the hold lock in the interlocking table of Fig. 2, and describes the approach lock or the hold lock of the route "1R". Note that the approach lock or the hold lock of the route "2R" etc. may be described in the "..." column of this logic table, but since it is created in the same way as the route "1R", description is omitted in this example. The target of the interlocking process by the sequence logic unit 32 is not limited to this model (the interlocking diagram of Fig. 2).

[0130] [Table 3]

[0131] In this logic table, the left column represents the input, the middle column represents the internal state, and the right column represents the output.

[0132] The left column shows the presence or absence of trains in section "51T" x 5, that is, whether the train is in section "51T" or not, and the F of signal "1R". 1R When the route setting conditions for route "1R" are met, the signal "1R" indicates "Go". Signal "1R" indicates F 1R is included in the output of the combinatorial logic unit 31. The input variable x is a tuple having at least the following data items:

[0133] x=(x5,F 1R )

[0134] When a train is present in the section "51T", x5 = 1. When no train is present in the section "51T", x5 = 0. When the signal "1R" is showing a proceeding aspect, F 1R = 1. When the signal "1R" is a stop signal, F 1R =0.

[0135] The middle column shows the approach lock or pending lock status of the point machine for the course "1R" one cycle ago (δ 1R ), and the time element of the approach lock or pending lock one period ago (δtml The internal state variable q is a tuple having at least the following data items:

[0136] q=((δ 1R ),(δ tml ))

[0137] When the approach lock or reserved lock of the point machine of the course "1R" one cycle ago is locked, (δ 1R )=1, and without locking, (δ 1R )=0. (δ tml )>0, the specified time (specified number of seconds) for the approach lock or pending lock has not elapsed, and (δ tml ) ≦0, the specified time has elapsed.

[0138] In the middle column, No.5 (δ 1R ) * can be either 1 or 0 (DC: Don't Care). tml ) * can be either ">0" or "≦0".

[0139] The right column shows the approach lock or pending lock status δ of the point machine on the route. 1R , and the time element δ obtained by subtracting one period tml =(δ tml )-Δ. δ 1R is the output variable z. δ tml is the internal state function F i is the output of the sequential logic unit 32. Δ is the processing time required for one period in the periodic repetitive processing by the sequential logic unit 32 (processing period time). The internal state function is a time element δ tml The value obtained by subtracting the processing cycle time Δ from the value obtained by subtracting one cycle is used as the comparison function F C By feeding back the time element δ tml Subtract the above.

[0140] Comparison function F C (x,C,q) is the function for producing output z.

[0141] The satisfaction condition C represents the condition for approach lock or pending lock, and is a tuple that compares at least the following data items. Each satisfaction condition C corresponds to each row of the logical table.

[0142] (x5,F 1R ,(δ 1R ),(δ tml ))

[0143] Comparison function F C (x, C, q) determines whether the input variable x and the internal state variable q meet the condition C. If they meet, the sequential logic unit 32 sets the output variable z=δ corresponding to the condition C. 1R Output.

[0144] For example, in row No. 1, (x5,F 1R ,(δ 1R ),(δ tml )) matches C=(0,0,1,>0), output z=δ 1R =1, i.e. the switch for route "1R" is locked.

[0145] Although the rows No. 3 and No. 8 are not possible, they are set as safe transitions by the approach lock δ 1R is set.

[0146] Internal state function F i is a function that receives an input variable x and an output variable z and outputs an internal state variable q for the next period. i is the approach or pending lock state δ of the point of the route at output variable z 1R Let δ be the approach lock or pending lock state of the point of the route at the internal state variable q. 1R ) and substitute the time element (δ tml ) minus one period δ tml =(δ tml )-Δ.

[0147] The post-processing unit 33 of the interlocking processing unit 3 receives as input a plurality of output variables z from the combination logic unit 31 and the sequence logic unit 32 (see FIG. 3). The post-processing unit 33 creates a logical sum for each point 22 from the locking status of the points 22 in the plurality of output variables z, and outputs the result as the presence or absence of locking of each point 22. In the calculation of this logical sum, the safe side, i.e., the side on which the point 22 is locked, is set to 1 as a logical variable (binary value of 1 or 0).

[0148] In this embodiment, the preprocessing unit 34 of the interlocking processing unit 3 assigns the information on the state of the field device 2 input from the interface 4 to the interlocking processing unit 3 to the input variable x of the combination logic unit 31 and the sequential logic unit 32.

[0149] As described above, according to the electronic interlocking device 1 of the present embodiment, the interlocking processing unit 3 uses a plurality of comparison functions F C The linkage is processed using the comparison function F C Since the above operations are performed in parallel, the increase in the calculation time can be suppressed even if the number of paths to be processed increases.

[0150] In addition, each core of the GPU 7 in the interlocking processing unit 3 calculates a comparison function F C Since each of these is calculated in parallel, the comparison function F C This allows high-speed calculations, and increases in calculation time can be further suppressed even if the number of routes to be processed increases.

[0151] Since the interlocking processor 3 is configured using a computer, the interlocking function described above by the interlocking processor 3 is realized by causing the computer to execute a computer program.

[0152] This computer program causes a computer connected to a plurality of field devices 2, including a signal 21, a point 22, and a train position detector 23, to perform arithmetic processing of an electronic interlocking device 1 (see FIG. 1). This computer program has a sequential logic unit 32 that causes the computer to execute a process of track locking (see FIG. 3). The sequential logic unit 32 uses a plurality of comparison functions F C and several satisfied conditions C, an internal state variable q, and an internal state function Fi The sequential logic unit 32 receives an input variable x and checks whether the input variable x and the internal state variable q satisfy a condition C by using each comparison function F. C (x, C, q) is judged, and when a match occurs, the process of outputting the output variable z corresponding to the condition C is repeated periodically. i (x,q,z) receives input variable x and output variable z, and outputs internal state variable q for the next cycle. The input variable x, internal state variable q, and satisfaction condition C are each a tuple, which is a set of one or more data items arranged in a predetermined order. In the process of track locking, the input variable x is a tuple representing the track setting state and the train position. The internal state variable q is a tuple representing the train position one cycle ago, and the track lock state of the point machine one cycle ago. The satisfaction condition C is a tuple representing the track locking condition. The output variable z is a tuple representing the track lock state of the point machine. The internal state function F i substitutes the train position in the input variable x for the train position in the internal state variable q, and substitutes the point lock state in the output variable z for the point lock state in the internal state variable q. C are the same function. The sequential logic unit 32 uses a plurality of comparison functions F C The above is calculated in parallel by a computer.

[0153] In this computer program, the sequential logic unit 32 further has a function of executing the approach lock or hold lock process. In the approach lock or hold lock process, the input variable x is a tuple representing the train position and the signal aspect. The internal state variable q is a tuple representing the approach lock or hold lock state of the point machine on the route one cycle ago, and the time element of the approach lock or hold lock one cycle ago. The satisfaction condition C is a tuple representing the condition of the approach lock or hold lock. The output variable z represents the approach lock or hold lock state of the point machine on the route. The internal state function F i substitutes the approaching lock or pending lock state of the point of the route in the output variable z for the approaching lock or pending lock state of the point of the route in the internal state variable q, and sets the time element of the internal state variable q to a value obtained by subtracting one period.

[0154] The computer program further comprises a combinatorial logic unit 31 which causes the computer to carry out the signal control and police locking processes (see FIG. 3). The combinatorial logic unit 31 is implemented by a number of comparison functions F C and a plurality of satisfying conditions C (see FIG. 4). The combinational logic unit 31 receives an input variable x and judges whether the input variable x satisfies the satisfying conditions C by using each comparison function F C When a match is found, an output variable z corresponding to the condition C is output. The input variable x and the condition C are each a tuple consisting of one or more data items arranged in a predetermined order. In the signal control and point locking process, the input variable x is a tuple representing the route setting state or point operation state and the train location on the line. The condition C is a tuple representing the conditions set for signal control and point locking. The output variable z represents whether the route setting or point operation condition is met. Multiple comparison functions F C are the same function. The combinatorial logic unit 31 is C The above is calculated in parallel by a computer.

[0155] This computer program has a post-processing unit 33 to which a plurality of output variables z are input (see FIG. 3). The post-processing unit 33 performs a logical sum for each point 22 from the locking states of the points 22 in the plurality of output variables z, and outputs the result as the presence or absence of locking of each point 22. In the calculation of this logical sum, the side on which the point 22 is locked is set as a logical variable of 1.

[0156] The computer that executes this computer program includes a CPU 6 and a GPU 7 (see FIG. 1). The GPU 7 includes multiple cores, and the computer program assigns a comparison function F C are computed in parallel.

[0157] The computer that executes this computer program is not limited to a computer dedicated to the electronic interlocking device.

[0158] The present invention is not limited to the configuration of the above embodiment, and various modifications are possible without departing from the spirit of the invention. For example, a part or all of the functions of the pre-processing unit 34 may be included in the interface 4. [Explanation of symbols]

[0159] 1 Electronic interlocking device 3. Interlocking Processing Section 31 Combinational Logic Section 32 Sequential Logic 33 Post-processing section 4. Interface 5 I / O terminals 6 CPU 7 GPU C Conditions for establishment F C Comparison Functions F i Internal State Functions q internal state variable x input variable z output variable

Claims

1. An electronic interlocking device connected to a plurality of field devices including a signal device, a point machine, and a train position detection device, An interlocking processing unit that performs calculation processing; An interface that connects the interlocking processing unit and a field device, The interlocking processing unit has a sequence logic unit that executes a process of locking a route, the sequential logic unit has a plurality of comparison functions, a plurality of satisfaction conditions, an internal state variable, and an internal state function, and periodically repeats a process of inputting an input variable, determining whether the input variable and the internal state variable match the satisfaction condition using each of the comparison functions, and outputting an output variable corresponding to the satisfaction condition when the input variable and the internal state variable match; the internal state function receives the input variables and the output variables, and outputs an internal state variable for the next period; the input variables, the internal state variables, and the satisfied conditions are each a tuple, which is a set of one or more data items arranged in a predetermined order; In the process of route locking, the input variables are a tuple representing the route setting state and the train position, The internal state variable is a tuple representing the train position one cycle ago and the route lock state of the point one cycle ago. The condition is a tuple that represents the condition for locking the route. The output variable represents the state of the point lock. The internal state function substitutes the train position in the input variable for the train position in the internal state variable, and substitutes the point lock state in the output variable for the point lock state in the internal state variable; the comparison functions are the same function; The electronic interlocking device, wherein the sequential logic unit calculates a plurality of the comparison functions in parallel during processing within each period.

2. The sequence logic unit further has a function of executing an approach lock or a pending lock process, In the process of approaching or pending locking, the input variables are a tuple representing the train position and the signal aspect, The internal state variable is a tuple representing the state of the approach lock or pending lock of the point machine of the route one cycle ago, and the time element of the approach lock or pending lock one cycle ago, The satisfaction condition is a tuple that represents the conditions for approach lock or pending lock, The output variables represent the approach or pending lock status of the point of the route, 2. The electronic interlocking device according to claim 1, wherein the internal state function substitutes the approach lock or hold lock state of the point machine of the route in the output variable for the approach lock or hold lock state of the point machine of the route in the internal state variable, and sets the time element of the internal state variable to a value obtained by subtracting one period.

3. The interlocking processing unit further includes a combination logic unit that executes signal control and police lock processing, the combinational logic unit has a plurality of comparison functions and a plurality of satisfaction conditions, and when an input variable is input, determines whether the input variable matches the satisfaction condition by each of the comparison functions, and when the input variable matches, outputs the determination result as an output variable; In the process of signal control and point locking, the input variables are a tuple representing the route setting state or point operation state and the train location, The fulfillment condition is a tuple representing the conditions set for signal control and road locking, The output variables indicate whether a route setting or point operation condition is met or not, the comparison functions are the same function; 3. The electronic interlocking device of claim 2, wherein the combinational logic unit calculates a plurality of the comparison functions in parallel.

4. the interlocking processing unit has a post-processing unit to which a plurality of the output variables are input, the post-processing unit performs a logical sum for each point machine from the locking states of the points in the plurality of output variables, and outputs the result as the presence or absence of locking of each point machine; 4. An electronic interlocking device according to claim 3, wherein in the operation of the logical sum, the side on which the point is locked is set to a logical variable of 1.

5. The interlocking processing unit has a CPU and a GPU, The GPU has a plurality of cores, 5. The electronic interlocking device according to claim 1, wherein each of the cores of the GPU calculates each of the comparison functions in parallel.

6. A computer program that causes a computer connected to a plurality of field devices including a signal device, a point machine, and a train position detection device to perform arithmetic processing of an electronic interlocking device, A sequential logic unit that causes a computer to execute a process for locking a route, the sequential logic unit has a plurality of comparison functions, a plurality of satisfaction conditions, an internal state variable, and an internal state function, and periodically repeats a process of inputting an input variable, determining whether the input variable and the internal state variable match the satisfaction condition using each of the comparison functions, and outputting an output variable corresponding to the satisfaction condition when the input variable and the internal state variable match; the internal state function receives the input variables and the output variables, and outputs an internal state variable for the next period; the input variables, the internal state variables, and the satisfied conditions are each a tuple, which is a set of one or more data items arranged in a predetermined order; In the process of route locking, the input variables are a tuple representing the route setting state and the train position, The internal state variable is a tuple representing the train position one cycle ago and the route lock state of the point one cycle ago. The condition is a tuple that represents the condition for locking the route. The output variable represents the state of the point lock. The internal state function substitutes the train position in the input variable for the train position in the internal state variable, and substitutes the point lock state in the output variable for the point lock state in the internal state variable; the comparison functions are the same function; The sequential logic unit causes a computer to calculate a plurality of the comparison functions in parallel during processing within each period.

7. The sequence logic unit further has a function of executing an approach lock or a pending lock process, In the process of approaching or pending locking, the input variables are a tuple representing the train position and the signal aspect, The internal state variable is a tuple representing the state of the approach lock or pending lock of the point machine of the route one cycle ago, and the time element of the approach lock or pending lock one cycle ago, The satisfaction condition is a tuple that represents the conditions for approach lock or pending lock, The output variables represent the approach or pending lock status of the point of the route, 7. The computer program according to claim 6, wherein the internal state function substitutes a state of approach lock or hold lock of a point of the route in the output variable for a state of approach lock or hold lock of a point of the route in the internal state variable, and sets a time element of the internal state variable to a value obtained by subtracting one period.

8. and a combinational logic unit for causing the computer to execute signal control and police locking processes; the combinational logic unit has a plurality of comparison functions and a plurality of conditions to be satisfied, and receives an input variable, judges whether the input variable matches the condition to be satisfied by each of the comparison functions, and when the input variable matches, outputs an output variable corresponding to the condition to be satisfied; In the process of signal control and point locking, the input variables are a tuple representing the route setting state or point operation state and the train location, The fulfillment condition is a tuple representing the conditions set for signal control and road locking, The output variables indicate whether a route setting or point operation condition is met or not, the comparison functions are the same function; 8. The computer program product of claim 7, wherein the combinatorial logic unit causes a computer to compute a plurality of the comparison functions in parallel.

9. a post-processing unit to which the output variables are input, the post-processing unit performs a logical sum for each point machine based on the locking states of the point machines in the plurality of output variables, and outputs the result as the presence or absence of locking of each point machine; 9. The computer program according to claim 8, wherein in the operation of the logical sum, a side on which the point is locked is set as a logical variable of 1.

10. The computer includes a CPU and a GPU. The GPU has a plurality of cores, 10. The computer program of claim 6, wherein the computer program causes each of the cores of the GPU to calculate each of the comparison functions in parallel.

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