Quantum Information Processing Device

Abstract

To efficiently cool quantum bits of a quantum information processing device including a plurality of quantum bits.SOLUTION: A quantum information processing device comprises: a quantum bit array part in which a plurality of quantum bits are disposed; a cooling plate layer; a control circuit which controls the quantum bit array part; and a heat conductive material layer which is disposed between a first layer including the quantum bit array part and the cooling plate layer and electrically independent of the quantum bit array part and the control circuit.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to semiconductor devices, and in particular to the structure of devices used in quantum information processing. [Background technology]

[0002] Currently, many groups around the world are conducting research with the aim of realizing quantum computers. Quantum computers are computers that are expected to use quantum mechanical phenomena such as superposition and quantum entanglement to solve problems that conventional computers could not solve in a realistic time or on a realistic scale. Experiments are being conducted using a variety of physical systems, but regardless of which physical system is used, the first thing that is needed to realize a quantum computer is to create quantum bits in an isolated system that does not exchange matter or energy with the outside world, and to be able to maintain the coherence of the quantum system for a long period of time.

[0003] However, in real physical systems, it is impossible to completely avoid decoherence caused by interactions with the outside world. In experiments using any physical system, efforts are continuing to be made to suppress decoherence of qubits and extend the coherence time. Furthermore, in order to operate as a quantum computer, it is not enough to create a single qubit; multiple qubits must be configured as a device that satisfies the following three requirements:

[0004] The first requirement is that it must be scalable. One of the reasons quantum computers are capable of high-speed calculations is that the dimension of Hilbert space increases exponentially with respect to the number of quantum bits by utilizing quantum superposition. However, it would be meaningless if the costs (time, space, energy, etc.) required to control quantum bits also increased exponentially at the same time. Controlling quantum bits requires electrical circuits to apply RF pulses (Radio Frequency Pulses) and dilution refrigerators to cool quantum bits to extremely low temperatures, but a mechanism is needed that allows the number of quantum bits to be expanded without increasing the costs required for these experimental devices.

[0005] The second requirement is that any quantum operation must be possible. Like classical computers, quantum computers are composed of basic logic gates, and in the case of quantum computers, these are called quantum gates. Examples of quantum gates include the rotate gate, which is a one-qubit gate, and the controlled NOT gate, which is a two-qubit gate. "Any quantum operation is possible" means that any quantum state can be reached with a finite number of quantum gate operations. It has been theoretically shown that any quantum operation is possible in gate-type quantum computers by combining rotate gates and controlled NOT gates. In other words, if these quantum gate operations can be performed on any quantum bit, any quantum operation will be possible.

[0006] The third requirement is that error correction is possible. To realize a quantum computer using real quantum bits with decoherence, a function to correct errors caused by decoherence (quantum error correction) is necessary. Many algorithms have been proposed for quantum error correction, but in all algorithms, "initialization" and "readout" are performed to eliminate the entropy caused by decoherence. "Initialization" is an operation to reset the superposition state of quantum bits to a pure initialized state when the superposition state becomes a mixed state due to decoherence. "Readout" is an operation to measure the state of the quantum bits with an accuracy allowed by quantum mechanics. Currently, an algorithm called Surface Code is expected to be the most promising method for error correction. Surface Code operates on a row of physical quantum bits arranged in a two-dimensional square lattice.

[0007] In other words, if it is possible to expand the number of quantum bits with long coherence times into two dimensions while using a common device for controlling them, and if it can be configured as a quantum bit string that allows ``initialization,'' ``rotation gate operation,'' ``controlled NOT gate operation,'' and ``readout s'' for any quantum bit, it is expected that it will be possible to operate it as a quantum computer. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] Special Publication No. 2018-532255 [Patent Document 2] US2013 / 0258595 A1 Summary of the Invention [Problem to be solved by the invention]

[0009] In order to operate quantum bits as a quantum computer, it is essential to configure a device including multiple quantum bits, not just to pursue the performance of a single quantum bit. It is widely recognized that two-dimensional expansion is necessary to operate as a quantum computer, and a structure for such a quantum bit string has been proposed (Patent Document 1).

[0010] This aims to individually control a quantum bit array expanded two-dimensionally by switching using wiring and transistors formed in the upper layer. However, if quantum bits with a complex structure are formed in the lower layer, the crystallinity of the substrate cannot be maintained up to the upper layer, making it difficult to form transistors in the upper layer with current semiconductor fabrication technology. Meanwhile, we have devised a structure and fabrication method for a quantum bit array that can be expanded two-dimensionally and fabricated using current semiconductor manufacturing methods.

[0011] Furthermore, with regard to quantum computers, the issue of thermal control is known as a problem that must be taken into consideration (Patent Document 2).

[0012] When operating semiconductor qubits or superconducting qubits, it is common to use a dilution refrigerator to cool them to extremely low temperatures in order to reduce the effects of thermal noise. The number of wires that electrically connect the inside and outside of a dilution refrigerator is limited. For this reason, in order to operate a qubit array including multiple qubits that require a large number of input and output signals, a control circuit for controlling the input and output signals inside the dilution refrigerator is required in addition to the qubit array.

[0013] Because a large number of electrical wirings are required between the quantum bit string and the control circuit, part of the control circuit must be located near the quantum bit string. When the quantum bit array and the control circuit are operating, Joule heat is generated, but if the temperature of the quantum bit array increases due to the heat, the coherence time of the quantum bit string will be shortened, which will ultimately lead to a decrease in the performance of the quantum computer.

[0014] An object of the present invention is to efficiently cool quantum bits in a quantum information processing device including a plurality of quantum bits. [Means for solving the problem]

[0015] A preferred aspect of the present invention is a quantum information processing device comprising: a quantum bit array section in which a plurality of quantum bits are arranged; a cooling plate layer; a control circuit for controlling the quantum bit array section; and a heat conductive material layer that is disposed between a first layer including the quantum bit array section and the cooling plate layer and is electrically independent of the quantum bit array section and the control circuit.

[0016] Another preferred aspect of the present invention is a quantum information processing device comprising: a substrate; a quantum bit array section disposed on the substrate and having a plurality of quantum bits disposed therein; a control circuit for controlling the quantum bit array section; a first cooling plate layer disposed on a first surface side of the substrate; a second cooling plate layer disposed on a second surface side of the substrate; and a thermally conductive material member having a thermal resistance lower than that of silicon, the thermally conductive material member being provided at least one between the quantum bit array section and the first cooling plate layer and between the quantum bit array section and the second cooling plate layer, the thermally conductive material member being electrically independent of the quantum bit array section and the control circuit.

[0017] Another preferred aspect of the present invention is a quantum information processing device comprising: a substrate; a quantum bit array section disposed on the substrate and having a plurality of quantum bits disposed therein; a control circuit disposed on the substrate and controlling the quantum bit array section; a first cooling plate layer disposed on a first surface side of the substrate; and at least one of a vacuum region and a thermal insulating material region disposed between the quantum bit array section and the control circuit. Effect of the Invention

[0018] According to the present invention, it is possible to efficiently cool quantum bits of a quantum information processing device including a plurality of quantum bits. [Brief description of the drawings]

[0019] [Figure 1] FIG. 2 is a top view of the quantum information processing device of the present invention. [Diagram 2] 1 is a cross-sectional view of a quantum information processing device according to the present invention. [Diagram 3] 1 is a cross-sectional view of a quantum information processor cooling structure according to a first embodiment of the present invention. [Figure 4] FIG. 4 is a cross-sectional view of a cooling structure for a quantum information processor according to a second embodiment of the present invention. [Diagram 5] FIG. 11 is a cross-sectional view of a cooling structure for a quantum information processor according to a third embodiment of the present invention. [Figure 6] FIG. 11 is a cross-sectional view of a cooling structure for a quantum information processor according to a fourth embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] The embodiments will be described in detail with reference to the drawings. However, the present invention should not be interpreted as being limited to the description of the embodiments shown below. It will be easily understood by those skilled in the art that the specific configuration can be changed without departing from the concept or purpose of the present invention.

[0021] In the configurations of the embodiments described below, the same parts or parts having similar functions are denoted by the same reference numerals in different drawings, and duplicated explanations may be omitted.

[0022] When there are multiple elements having the same or similar functions, they may be described by using the same reference numerals with different subscripts. However, when there is no need to distinguish between multiple elements, the subscripts may be omitted.

[0023] The designations "first," "second," "third," and the like in this specification are given to identify components, and do not necessarily limit the number, order, or content. Furthermore, numbers for identifying components are used in different contexts, and a number used in one context does not necessarily indicate the same configuration in another context. Furthermore, a component identified by a certain number does not prevent the component from also having the function of a component identified by another number.

[0024] In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings, etc. may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings, etc.

[0025] All publications, patents, and patent applications cited herein are hereby incorporated by reference in their entirety.

[0026] As used herein, elements referred to in the singular are intended to include the plural unless the context clearly indicates otherwise.

[0027] A first aspect of this embodiment is a structure of a cooling mechanism for a quantum information processing device, comprising: a quantum bit array section in which a plurality of quantum bits are arranged; a cooling plate layer of a dilution refrigerator; a control circuit for controlling the quantum bit array section; and a thermally conductive material layer that is disposed between a first layer including the quantum bit array section and the cooling plate layer and is electrically independent of the quantum bit array section and the control circuit.

[0028] A second aspect of the present embodiment is a method for producing the quantum information processor cooling mechanism according to the first aspect.

[0029] First, a standard method for cooling a quantum information processing device including a quantum bit array and a control circuit will be described.

[0030] Figure 1 shows a top view of a quantum information processing device. Quantum information processing device 101 includes a quantum bit array 102 and a control circuit 103. Quantum information processing device 101 is fabricated, for example, using semiconductor manufacturing technology, and has a configuration of 1 cm square. The quantum bit array 102 is placed in the center, and the control circuit 103 surrounds the quantum bit array 102.

[0031] There are multiple wirings 104 between the quantum bit array 102 and the control circuit 103, and the quantum bit array 102 and the control circuit 103 are electrically connected to each other. There are also multiple pads 105, which are electrically connected to the control circuit 103. The quantum information processing device 101 is installed inside a dilution refrigerator (not shown), and the quantum information processing device 101 is electrically connected to the outside of the dilution refrigerator through the pads 105. The dilution refrigerator is, for example, a 3 m cubic housing, and multiple quantum information processing devices 101 can be placed inside the dilution refrigerator.

[0032] Figure 2 shows a cross-sectional view of the quantum information processing device of Figure 1. The quantum bit array 102 and the control circuit 103 are formed on a silicon substrate 201 (several hundred μm thick). The quantum bit array 102 and the control circuit 103 are each composed of a silicon channel 202 and a polysilicon gate 203, and the channel 202 and the gate 203 form a transistor structure.

[0033] In the quantum bit array 102, a single electron is trapped in the transistor structure and operates as a quantum bit. In the control circuit 103, the transistor structure operates as a normal transistor. The channels and gates are electrically isolated from each other by an interlayer insulating film 204 made of silicon oxide or a spacer 205 made of silicon nitride, and are electrically connected to each other by wiring 104.

[0034] The dilution refrigerator is electrically connected to the outside through pad 105 at the top of Fig. 2, and is fixed to cooling plate 206 of the dilution refrigerator through silicon substrate 201 at the bottom of Fig. 2. Cooling plate 206 is cooled to an extremely low temperature (a temperature of several tens of mK), and heat generated in quantum bit array 102 and control circuit 103 is conducted to cooling plate 206 through thermal resistance 207 between quantum information processing device 101 and cooling plate 206. At the same time, heat generated in control circuit 103 is conducted to quantum bit array 102 through thermal resistance 208 between control circuit 103 and quantum bit array 102.

[0035] Hereinafter, examples of the present invention will be described with reference to the drawings. However, the present invention should not be interpreted as being limited to the description of the embodiments shown below. It will be easily understood by those skilled in the art that the specific configuration can be changed without departing from the concept or purpose of the present invention. EXAMPLES

[0036] In the first embodiment, differences from the configuration in FIG. 2 will be described. As shown in FIG. 3, a structure is fabricated in which the silicon substrate 201 in FIG. 2 is replaced with a substrate 301 made of a thermally conductive material. First, as shown in FIG. 2, the quantum bit array 102 and the control circuit 103 are fabricated based on the silicon substrate 201. After fabrication, the silicon substrate 201 is removed by etching. The remaining portion is bonded to a substrate 301 made of a thermally conductive material that has a lower thermal resistance than silicon. Examples of the thermally conductive material include metal materials such as aluminum and copper. The examples of the thermally conductive material are similar to those in the other embodiments.

[0037] This configuration reduces thermal resistance 207 between quantum information processing device 101 and cooling plate 206. As a result, heat generated in quantum bit array 102 and control circuit 103 is quickly transferred to cooling plate 206, preventing an increase in temperature of quantum bit array 102. Substrate 301 made of a thermally conductive material is electrically isolated from quantum bit array 102 and control circuit 103 by interlayer insulating film 204 and the like, and does not affect the characteristics of the electrical circuit other than a decrease in temperature. EXAMPLES

[0038] In the second embodiment, differences from the configuration in FIG. 2 will be described. 4, a component 401 made of a thermally conductive material is formed on the upper side (opposite the substrate 201) near the quantum bit array 102. At the same time, an interposer 402 and a second cooling plate 403 are used to hold down and fix the quantum information processing device 101 from above.

[0039] A thermally conductive material region 404 is formed in the portion where the interposer 402 made of an insulator such as silicon oxide contacts the quantum bit array 102. The thermally conductive material region 404 may be a bulk of thermally conductive material, or may be a structure in which a via structure formed in the interposer substrate is plated with a conductive material such as metal. Examples of thermally conductive materials include metal materials such as aluminum and copper.

[0040] This configuration reduces the thermal resistance 406 between the quantum bit array 102 and the cooling plate 403. This allows the heat generated in the quantum bit array 102 to be quickly transferred to the second cooling plate 403, preventing the temperature of the quantum bit array 102 from increasing.

[0041] When the quantum information processing device 101 is fixed using the interposer 402 in this manner, it is not necessary to bond the quantum information processing device 101 and the cooling plate 403, and they may be brought into close contact by pressure. This provides the effect of preventing either of them from being damaged when the temperature changes due to the difference in thermal expansion coefficient between the quantum information processing device 101 and the cooling plate 403.

[0042] Meanwhile, wiring 405 is formed at the portion where interposer 402 contacts pad 105. This makes it possible to simultaneously cool quantum bit array 102 and electrically connect quantum information processing device 101 to an external control device and power supply device of the dilution refrigerator. Note that silicon substrate 201 in Fig. 2 may be replaced with substrate 301 made of a thermally conductive material in Fig. 3 to further improve cooling efficiency. EXAMPLES

[0043] In the third embodiment, differences from the configuration of the second embodiment (FIG. 4) will be described. As shown in Fig. 5, a vacuum region or heat insulating material region 501 is formed between the quantum bit array 102 and the control circuit 103. After the quantum bit array 102 and the control circuit 103 are fabricated as shown in Fig. 2, a groove is formed by etching the interlayer insulating film 204 from the underside of the substrate 201, thereby forming a vacuum region, and a heat insulating material is deposited in the groove to form a heat insulating material region.

[0044] Examples of heat insulating materials include silicon oxide and silicon nitride. This increases the thermal resistance between the quantum bit array 102 and the control circuit 103. The vacuum region is more effective than the heat insulating material region, but when the quantum information processing device 101 is fixed using the interposer 402, the vacuum region may apply stress and damage the quantum information processing device 101, so in that case the heat insulating material region is used. This prevents the heat generated by the control circuit 103 from being transmitted to the quantum bit array 102, and prevents the temperature of the quantum bit array 102 from rising.

[0045] As in Example 2 and Example 3, a first cooling plate layer is arranged on the first surface side of the layer in which the quantum bit array 102 and the control circuit 103 are arranged, and a second cooling plate layer is arranged on the second surface side of the first layer. By providing a thermally conductive material member that is electrically independent from the quantum bit array and the control circuit at least one between the quantum bit array and the first cooling plate layer and between the quantum bit array and the second cooling plate layer, efficient cooling is possible. EXAMPLES

[0046] In the fourth embodiment, differences from the configuration of the third embodiment (FIG. 5) will be described. 6, an electrically conductive material region 601 is formed between the quantum bit array 102 and the control circuit 103. The electrically conductive material region 601 can be formed by depositing an electrically conductive material in a part of the vacuum region or the thermal insulation material region 501.

[0047] This configuration blocks the electromagnetic field generated when the control circuit 103 is operated as a transistor, and prevents it from being transmitted to the quantum bit array 102. This, together with the mechanism shown in the third embodiment, makes it possible to simultaneously prevent a decrease in the coherence time of the quantum bits of the quantum bit array 102 caused by heat and electromagnetic fields.

[0048] The present invention is not limited to the above-mentioned embodiment, and includes various modified examples. For example, it is possible to replace a part of the configuration of a certain embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of a certain embodiment. In addition, it is possible to add, delete, or replace a part of the configuration of each embodiment with the configuration of another embodiment. For example, the quantum bit array 102 does not need to be arranged in the center of the quantum information processing device 101, and a plurality of control circuits 103 may be arranged in any location. It is not necessary to arrange the control circuit 103 in the periphery of the quantum information processing device 101, and a plurality of control circuits 103 may be arranged in any location. Although it is possible to implement each of the first, second, third, and fourth embodiments independently, it is also possible to combine and implement a plurality of them simultaneously.

[0049] In this specification and the like, the terms "electrode" and "wiring" do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wiring", and vice versa. Furthermore, the terms "electrode" and "wiring" also include cases where multiple "electrodes" or "wirings" are formed integrally. [Explanation of symbols]

[0050] 101...quantum information processing device, 102...quantum bit array, 103...control circuit, 104...wiring, 105...pad, 201...silicon substrate, 202...channel, 203...gate, 204...interlayer insulating film, 205...spacer, 206...cooling plate, 207...thermal resistance between the quantum information processing device and the cooling plate, 208...thermal resistance between the quantum bit array and the control circuit, 301...substrate made of thermally conductive material, 401...component made of thermally conductive material, 402...interposer, 403...second cooling plate, 404...thermal conductive material region in the interposer, 405...wiring in the interposer, 501...vacuum region or insulating material region, 601...electrically conductive material region.

Claims

1. a quantum bit array unit in which a plurality of quantum bits are arranged; A cooling plate layer; A control circuit for controlling the quantum bit array unit; a thermally conductive material layer having a lower thermal resistance than silicon, the thermally conductive material layer being disposed between a first layer including the quantum bit array portion and the control circuit and the cooling plate layer, the thermally conductive material layer being electrically independent of the quantum bit array portion and the control circuit; a second cooling plate layer disposed on the first layer opposite the side on which the cooling plate layer is disposed; a second thermally conductive material layer having a thermal resistance lower than that of silicon between the second cooling plate layer and the quantum bit array portion; disposing an interposer between the second cooling plate layer and the first layer; the interposer has a thermally conductive material region that thermally connects the second thermally conductive material layer and the second cooling plate layer; Quantum information processing device.

2. The thermally conductive material layer is a layer containing a metal material and having a thermal resistance lower than that of silicon. The quantum information processing device according to claim 1.

3. The present invention is characterized in that at least one of a vacuum region and a thermal insulating material region is provided between the quantum bit array section and the control circuit. The quantum information processing device according to claim 1.

4. A quantum bit array section in which a plurality of quantum bits are arranged; A cooling plate layer; A control circuit for controlling the quantum bit array unit; a thermally conductive material layer having a lower thermal resistance than silicon, the thermally conductive material layer being disposed between a first layer including the quantum bit array portion and the control circuit and the cooling plate layer, the thermally conductive material layer being electrically independent of the quantum bit array portion and the control circuit; and an electrically conductive material region between the quantum bit array section and the control circuit that does not electrically connect the quantum bit array section and the control circuit. Quantum information processing device.

5. A substrate, a quantum bit array section disposed on the substrate and having a plurality of quantum bits disposed therein; a control circuit disposed on the substrate and controlling the quantum bit array unit; a first cooling plate layer disposed on a first surface side of the substrate; and at least one of a vacuum region and a thermal insulating material region disposed between the quantum bit array section and the control circuit. Quantum information processing device.

6. The present invention is characterized in that the present invention further comprises a thermally conductive material member between the quantum bit array portion and the first cooling plate layer, the thermal conductive material member having a thermal resistance lower than that of silicon and electrically independent of the quantum bit array portion and the control circuit. The quantum information processing device according to claim 5.

7. A second cooling plate layer is disposed on a side of the substrate opposite to the side on which the first cooling plate layer is disposed; a second thermally conductive material layer between the second cooling plate layer and the quantum bit array portion; The quantum information processing device according to claim 5.

8. The present invention is characterized in that an electrically conductive material region is provided between the quantum bit array portion and the control circuit. The quantum information processing device according to claim 5.

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