Semiconductor Device
Patent Information
- Application Number
- JP2021143130
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-09-02
- Publication Date
- 2025-03-07
- Estimated Expiration
- 2041-09-02
AI Technical Summary
【0009】 本開示によれば、複数の半導体装置を並列接続する際、半導体装置が取付箇所から浮き上がることなく、第1の放熱板と横方向の一方側の半導体装置が備える第2の放熱板とを密着させた状態で接続することができると共に、第2の放熱板と横方向の他方側の半導体装置が備える第1の放熱板とを密着させた状態で接続することができる。これにより、複数の半導体装置を並列接続する際に発生する電流および熱のアンバランスを抑制することができる。
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Abstract
Description
[Technical field]
[0001] The present disclosure relates to a semiconductor device. [Background technology]
[0002] Conventionally, when multiple semiconductor devices are connected in parallel, the drain terminals of each semiconductor device are connected only by the substrate pattern, which causes a difference in parasitic resistance and parasitic inductance of each substrate pattern, resulting in a problem of current imbalance between the semiconductor devices. In addition, since each semiconductor device is connected to a heat sink via an insulating sheet, the thermal coupling is low, and if a temperature imbalance occurs in each semiconductor device, it is difficult to eliminate the temperature imbalance.
[0003] Therefore, when connecting multiple semiconductor devices in parallel, a method can be considered in which the heat sinks protruding from both lateral sides of the molded resin portion are connected to each other to suppress the imbalance in current and heat generated between the semiconductor devices.
[0004] For example, Patent Document 1 discloses a semiconductor device having a structure in which screw holes are provided in heat sinks protruding from both lateral sides of a molded resin portion. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] Japanese Utility Model Application Publication No. 56-43170 Summary of the Invention [Problem to be solved by the invention]
[0006] However, the technology described in Patent Document 1 does not assume that multiple semiconductor devices will be connected in parallel, and when multiple semiconductor devices are connected in parallel, the heat sinks must be stacked vertically. As a result, the semiconductor devices cannot be fixed correctly because they float up from the mounting locations, and the imbalance in current and heat generated between the semiconductor devices cannot be suppressed.
[0007] In view of the above, an object of the present disclosure is to provide a technique capable of suppressing the imbalance in current and heat that occurs when multiple semiconductor devices are connected in parallel. [Means for solving the problem]
[0008] A semiconductor device according to the present disclosure is a semiconductor device connectable to semiconductor devices arranged on both sides in a lateral direction, comprising: a semiconductor element that flows a current from a source to a drain when a signal is input from a gate; a sealing resin that is formed in a rectangular shape in a top view and seals the semiconductor element; a gate terminal that is electrically connected to the gate and protrudes from a first side of the sealing resin in a top view; a drain terminal that is electrically connected to the drain and protrudes from the first side of the sealing resin in a top view; the first heat sink comprises a source terminal protruding from a first side, a first heat sink electrically connected to the drain and protruding from a second side intersecting the first side of the sealing resin in a top view, and a second heat sink electrically connected to the drain and protruding from a third side opposing the second side of the sealing resin in a top view, wherein at least one of a height position of a lower surface of a tip end portion of the first heat sink and a height position of an upper surface of a base end portion of the second heat sink, and a height position of a lower surface of a tip end portion of the second heat sink and a height position of an upper surface of the base end portion of the first heat sink are the same; the first heat sink and the second heat sink protrude from the same height position of the sealing resin, the base end and the tip end of the first heat sink include a first flat plate portion and a first anchor portion, respectively, the base end and the tip end of the second heat sink include a second flat plate portion and a second anchor portion, respectively, a height position of a lower surface of the first anchor portion and a height position of an upper surface of the second flat plate portion are the same, a height position of a lower surface of the second anchor portion and a height position of an upper surface of the first flat plate portion are the same, The first heat sink and the second heat sink are formed in an L-shape with the tip end narrower than the base end when viewed from above, the first heat sink is point-symmetric with the second heat sink with respect to the sealing resin when viewed from above, the first anchor portion of the first heat sink is engageable with the second flat portion of the second heat sink provided on the semiconductor device on one side in the lateral direction, and the second anchor portion of the second heat sink is engageable with the first flat portion of the first heat sink provided on the semiconductor device on the other side in the lateral direction. Effect of the Invention
[0009] According to the present disclosure, when multiple semiconductor devices are connected in parallel, the first heat sink can be connected to the second heat sink of the semiconductor device on one side in the horizontal direction in a state of intimate contact with each other without the semiconductor devices rising up from their mounting locations, and the second heat sink can be connected to the first heat sink of the semiconductor device on the other side in the horizontal direction in a state of intimate contact with each other. This makes it possible to suppress imbalances in current and heat that occur when multiple semiconductor devices are connected in parallel. [Brief description of the drawings]
[0010] [Figure 1] 1A and 1B are a top view and a side view of a semiconductor device according to a first embodiment. [Diagram 2] 1A and 1B are a top view and a side view showing a state in which semiconductor devices according to a first embodiment are connected in parallel. [Diagram 3] FIG. 11 is a top view showing a state before frame cutting of a semiconductor device according to a second embodiment. [Figure 4] 11A and 11B are a top view and a side view showing a state after frame cutting of a semiconductor device according to a second embodiment. [Diagram 5] 11A and 11B are a top view and a side view showing a state after forming of a semiconductor device according to a second embodiment. [Figure 6] 11A and 11B are a top view and a side view showing a state in which semiconductor devices according to a second embodiment are combined in parallel. [Figure 7] 11A and 11B are a top view and a side view showing a state in which semiconductor devices according to a second embodiment are connected in parallel. [Figure 8] FIG. 11 is a top view showing a state before frame cutting of a semiconductor device according to a third embodiment. [Figure 9] 13A and 13B are a top view and a side view showing a state after frame cutting of a semiconductor device according to a third embodiment. [Figure 10] 13A and 13B are a top view and a side view showing a state after forming of a semiconductor device according to a third embodiment. [Figure 11] 13A and 13B are a top view and a side view showing a state in which semiconductor devices according to a third embodiment are combined in parallel. [Figure 12] 13A and 13B are a top view and a side view showing a state in which semiconductor devices according to a third embodiment are connected in parallel. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0011] <Embodiment 1> The first embodiment will be described below with reference to the drawings. Fig. 1(a) is a top view of a semiconductor device 1 according to the first embodiment, and Fig. 1(b) is a side view of the semiconductor device 1. Fig. 2(a) is a top view showing a state in which the semiconductor devices 1 according to the first embodiment are connected in parallel, and Fig. 2(b) is a side view showing a state in which the semiconductor devices 1 are connected in parallel.
[0012] As shown in Figures 1(a) and (b), the semiconductor device 1 is a switching device and includes a semiconductor element (not shown), a sealing resin 2, a gate terminal 3, a drain terminal 4, a source terminal 5, a heat sink 6 serving as a first heat sink, and a heat sink 7 serving as a second heat sink.
[0013] The semiconductor element is a semiconductor switching element, and when a signal is input from the gate, a current flows from the source to the drain. The sealing resin 2 is formed in a rectangular shape when viewed from above, and seals the semiconductor element.
[0014] The gate terminal 3 is electrically connected to the gate of the semiconductor element and protrudes from the first side of the sealing resin 2 in top view. The drain terminal 4 is electrically connected to the drain of the semiconductor element and protrudes from the first side of the sealing resin 2 in top view. The source terminal 5 is electrically connected to the source of the semiconductor element and protrudes from the first side of the sealing resin 2 in top view.
[0015] As shown in Figs. 2(a) and (b), the heat sinks 6 and 7 are connected to a heat sink 8 via an insulating sheet 9, and transfer heat generated by the semiconductor element to the heat sink 8. As shown in Figs. 1(a) and (b), the heat sink 6 is electrically connected to the drain of the semiconductor element and protrudes from a second side intersecting with a first side of the sealing resin 2 in a top view. The heat sink 7 is electrically connected to the drain of the semiconductor element and protrudes from a third side opposite to the second side of the sealing resin 2 in a top view. Here, the first side is the lower side of the sealing resin 2 in Fig. 1(a). The second side is the left side of the sealing resin 2 in Fig. 1(a), and the third side is the right side of the sealing resin 2 in Fig. 1(a).
[0016] The heat sink 6 is formed, for example, by bending a copper plate member into an L-shape in side view. The base end of the heat sink 6 protrudes from the sealing resin 2 and extends upward. The tip end of the heat sink 6 is provided via a portion bent from the base end to the left in Figures 1(a) and (b), forming a first flat plate portion extending to the left. The tip end of the heat sink 6 is formed with a through hole 6a that penetrates from the top surface to the bottom surface.
[0017] The heat sink 7 is formed of a plate-like member made of, for example, copper. The heat sink 7 extends to the right in Figs. 1(a) and (b), and the entire heat sink 7 forms a second flat plate portion. A through hole 7a is formed at the tip of the heat sink 7, penetrating from the top surface to the bottom surface. Here, the base end of the heat sink 7 is the portion on the left side of the through hole 7a in the heat sink 7 in Figs. 1(a) and (b).
[0018] 2(a) and (b), screws 10 are inserted into the through holes 6a and 7a to connect in parallel with the semiconductor devices 1 arranged on both sides in the horizontal direction. Note that the horizontal direction is the left-right direction in Figs. 2(a) and (b), and is the same in other drawings.
[0019] 1(b), heat sink 6 and heat sink 7 protrude from the same height position of sealing resin 2. A step s is provided between the lower surface of the tip end of heat sink 6 and the lower surface of the base end, and the height position of the lower surface of the tip end of heat sink 16 and the height position of the upper surface of the base end of heat sink 17 are the same.
[0020] 2(a) and (b), when multiple semiconductor devices 1 are connected in parallel on the upper surface of a heat sink 8 via insulating sheets 9, in the semiconductor devices 1 other than the left end and the right end, the lower surface of the tip of the heat sink 6 in the semiconductor device 1 is brought into close contact with the upper surface of the heat sink 7 in the semiconductor device 1 on one side (left side) in the lateral direction, and the lower surface of the tip of the heat sink 6 in the semiconductor device 1 on the other side (right side) is brought into close contact with the upper surface of the heat sink 7 in the semiconductor device 1. When the heat sink 6 and the heat sink 7 are in close contact with each other, the through hole 6a in the heat sink 6 and the through hole 7a in the heat sink 7 communicate with each other.
[0021] In the semiconductor device 1 at the left end, a spacer 11a is placed on the underside of the tip of the heat sink 6 to eliminate the step s of the heat sink 6, i.e., the distance between the tip of the heat sink 6 and the insulating sheet 9, and the spacer 11a is fixed together with the heat sink 6 by the screw 10. In the semiconductor device 1 at the right end, a spacer 11a is placed on the upper surface of the heat sink 7 to match the height position of the screw 10 used in the heat sink 7 of the semiconductor device 1 with the height position of the other screws 10, and the spacer 11a is fixed together with the heat sink 7 by the screw 10. In addition, in order to insulate the screw 10 from the heat sink 8, the screw 10 is inserted through the through hole 6a of the heat sink 6, the through hole 7a of the heat sink 7, and the through hole (not shown) of the spacer 11a via the spacer 11b.
[0022] As described above, the height position of the underside of the tip end of the heat sink 6 is the same as the height position of the upper surface of the base end of the heat sink 7, so that the semiconductor device 1 does not float up from the mounting point, and the heat sink 6 can be connected in a tight contact state to the heat sink 7 provided on the semiconductor device 1 on one lateral side (left side), and the heat sink 7 can be connected in a tight contact state to the heat sink 6 provided on the semiconductor device 1 on the other lateral side (right side).
[0023] In addition, the fact that the height position of the underside of the tip end of heat sink 6 and the height position of the upper surface of the base end of heat sink 7 are the same does not only mean that they are exactly the same, but also includes cases where there is a slight difference due to manufacturing errors, etc.
[0024] As described above, the semiconductor device 1 of the first embodiment is a semiconductor device 1 connectable to semiconductor devices 1 arranged on both sides in the horizontal direction, and includes a semiconductor element that flows a current from the source to the drain when a signal is input from the gate, a sealing resin 2 formed in a rectangular shape in a top view and sealing the semiconductor element, a gate terminal 3 electrically connected to the gate and protruding from a first side of the sealing resin 2 in a top view, a drain terminal 4 electrically connected to the drain and protruding from the first side of the sealing resin 2 in a top view, a source terminal 5 electrically connected to the source and protruding from the first side of the sealing resin 2 in a top view, a heat sink 6 electrically connected to the drain and protruding from a second side that intersects with the first side of the sealing resin 2 in a top view, and a heat sink 7 electrically connected to the drain and protruding from a third side opposite the second side of the sealing resin 2 in a top view. At least one of the height position of the underside of the tip end of heat sink plate 6 and the height position of the upper surface of the base end of heat sink plate 7, and the height position of the underside of the tip end of heat sink plate 7 and the height position of the upper surface of the base end of heat sink plate 6 are the same.
[0025] Specifically, heat sink 6 and heat sink 7 protrude from the same height position of sealing resin 2, the tip end of heat sink 6 includes a first flat portion, the base end of heat sink 7 includes a second flat portion, the first flat portion is provided via a portion bent laterally from the base end of heat sink 6 which protrudes from sealing resin 2 and extends upward, and the height position of the lower surface of the first flat portion and the height position of the upper surface of the second flat portion are the same.
[0026] Therefore, when multiple semiconductor devices 1 are connected in parallel, the semiconductor devices 1 do not rise up from their mounting locations, and the heat sink 6 can be connected in close contact with the heat sink 7 of the semiconductor device 1 on one lateral side (left side), and the heat sink 7 can be connected in close contact with the heat sink 6 of the semiconductor device 1 on the other lateral side (right side). This makes it possible to suppress imbalances in current and heat that occur when multiple semiconductor devices 1 are connected in parallel.
[0027] Furthermore, since the heat sinks 6 and 7 protrude from the same height position of the sealing resin 2, the semiconductor device 1 can be manufactured more easily than if they protrude from different height positions.
[0028] Furthermore, through holes 6a, 7a penetrating from the upper surface to the lower surface are formed at the tip of the heat sink 6 and the tip of the heat sink 7, respectively. Therefore, the heat sinks 6, 7 can be easily connected to each other with the screws 10.
[0029] In embodiment 1, the step s is provided by bending the heat sink 6, but a step may also be provided between the lower surface of the heat sink 6 and the upper surface of the heat sink 7 by making the heat sinks 6 and 7 protrude from different height positions in the sealing resin 2.
[0030] Furthermore, the through holes 6a, 7a of the heat sinks 6, 7 are not essential and are not required as long as the heat sinks 6, 7 can be connected to each other. In this case, the heat sinks 6, 7 may be connected to each other by soldering, pressure welding, or the like.
[0031] <Embodiment 2> Next, the semiconductor device 1A according to the second embodiment will be described. FIG. 3 is a top view showing the state of the semiconductor device 1A according to the second embodiment before frame cutting. FIG. 4(a) is a top view showing the state of the semiconductor device 1A according to the second embodiment after frame cutting, and FIG. 4(b) is a side view showing the state of the semiconductor device 1A after frame cutting. FIG. 5(a) is a top view showing the state of the semiconductor device 1A according to the second embodiment after forming, and FIG. 5(b) is a side view showing the state of the semiconductor device 1A after forming. FIG. 6(a) is a top view showing the state of the semiconductor device 1A according to the second embodiment combined in parallel, and FIG. 6(b) is a side view showing the state of the semiconductor device 1A combined in parallel. FIG. 7(a) is a top view showing the state of the semiconductor device 1A according to the second embodiment connected in parallel, and FIG. 7(b) is a side view showing the state of the semiconductor device 1A connected in parallel. However, in FIGS. 7(a) and (b), the heat sink is omitted. In the second embodiment, the same components as those described in the first embodiment are denoted by the same reference numerals and the description thereof will be omitted.
[0032] As shown in FIGS. 5(a) and 5(b), in the second embodiment, the semiconductor device 1A includes a heat sink 16 as a first heat sink and a heat sink 17 as a second heat sink instead of the heat sinks 6 and 7.
[0033] The heat sinks 16 and 17 are formed in an L-shape with a tip end narrower than a base end when viewed from above. The heat sinks 16 and 17 are formed, for example, by bending a copper plate member to have a step that protrudes upward, and protrude from the same height position of the sealing resin 2.
[0034] The heat sink 16 includes a first flat plate portion 16a, a first anchor portion 16b, and a notch 16c. The first flat plate portion 16a is formed on the portion of the heat sink 16 excluding the tip portion, i.e., the portion including the base end portion of the heat sink 16. The first anchor portion 16b is formed on the tip portion of the heat sink 16 and is located above the first flat plate portion 16a via a step. A semicircular notch 16c is formed on the inner periphery of the first flat plate portion 16a, penetrating from the upper surface to the lower surface. Here, the base end portion of the heat sink 16 is the portion to the right of the notch 16c in the heat sink 16 in Figs. 5(a) and (b).
[0035] The heat sink 17 includes a second flat plate portion 17a, a second anchor portion 17b, and a notch 17c. The second flat plate portion 17a is formed on the portion of the heat sink 17 excluding the tip portion, i.e., the portion including the base end portion of the heat sink 17. The second anchor portion 17b is formed on the tip portion of the heat sink 17 and is located above the second flat plate portion 17a via a step. The inner periphery of the second flat plate portion 17a is formed with a semicircular notch 17c that penetrates from the upper surface to the lower surface when viewed from above. Here, the base end portion of the heat sink 17 is the portion to the left of the notch 17c in the heat sink 17 in Figs. 5(a) and (b).
[0036] The heat sinks 16 and 17 are point-symmetrical with respect to each other in the top view with respect to the sealing resin 2. Furthermore, the height position of the lower surface of the first anchor portion 16b of the heat sink 16 and the height position of the upper surface of the second flat plate portion 17a of the heat sink 17 are the same, and the height position of the lower surface of the second anchor portion 17b of the heat sink 17 and the height position of the upper surface of the first flat plate portion 16a of the heat sink 16 are the same.
[0037] As a result, the first anchor portion 16b of the heat sink 16 is capable of engaging with the second flat portion 17a of the heat sink 17 in the semiconductor device 1A on one horizontal side (left side) as shown in Figures 6(a) and (b), and the second anchor portion 17b of the heat sink 17 is capable of engaging with the first flat portion 16a of the heat sink 16 in the semiconductor device 1A on the other horizontal side (right side).
[0038] In addition, the height position of the lower surface of the first anchor portion 16b of the heat sink 16 and the height position of the upper surface of the second flat portion 17a of the heat sink 17 are the same, and the height position of the lower surface of the second anchor portion 17b of the heat sink 17 and the height position of the upper surface of the first flat portion 16a of the heat sink 16 are the same does not only mean that they are completely the same, but also includes cases where there are slight differences due to manufacturing errors, etc.
[0039] Next, a procedure for forming the heat sinks 16, 17 and a procedure for connecting the semiconductor device 1A will be described. As shown in Fig. 3, before frame cutting, a plurality of semiconductor devices 1A are formed in an integrated state in parallel. The heat sinks 16, 17 are formed in a state in which the heat sinks 16, 17 of adjacent semiconductor devices 1A are integrated with each other. At this time, the heat sink 16 of the semiconductor device 1A on the left side in Fig. 3 and the heat sink 17 of the semiconductor device 1A on the right side are integrated with unnecessary parts 19 that are cut off when the frame is cut.
[0040] When frame cutting is performed along the dashed lines in Fig. 3, the semiconductor device 1A is divided into individual pieces as shown in Fig. 4(a) and (b). At this time, no steps are formed in the heat sinks 16 and 17, and the heat sinks 16 and 17 are entirely flat. When forming is performed, the first anchor portion 16b and the second anchor portion 17b are formed in a stepped shape as shown in Fig. 5(a) and (b).
[0041] 6(a) and (b), when combining multiple semiconductor devices 1A in parallel, the lower surface of the first anchor portion 16b of the heat sink 16 in the semiconductor device 1A is closely fitted and engaged with the upper surface of the second flat plate portion 17a of the heat sink 17 included in the semiconductor device 1A on one side (left side) in the horizontal direction, and the upper surface of the first flat plate portion 16a of the heat sink 16 in the semiconductor device 1A is closely fitted and engaged with the lower surface of the second anchor portion 17b of the heat sink 17 included in the semiconductor device 1A on one side (left side) in the horizontal direction. In this state, the notch 16c of the heat sink 16 and the notch 17c of the heat sink 17 form a through hole 18 (corresponding to a first through hole) in a top view.
[0042] Also, the lower surface of the second anchor portion 17b of the heat sink 17 in the semiconductor device 1A is closely fitted and engaged with the upper surface of the first flat plate portion 16a of the heat sink 16 included in the semiconductor device 1A on the other lateral side (right side), and the upper surface of the second flat plate portion 17a of the heat sink 17 in the semiconductor device 1A is closely fitted and engaged with the lower surface of the first anchor portion 16b of the heat sink 16 included in the semiconductor device 1A on the other lateral side (right side). In this state, the notch 17c of the heat sink 17 and the notch 16c of the heat sink 16 form a through hole 18 (corresponding to a second through hole) in a top view.
[0043] 7(a) and (b), in the semiconductor device 1A at the left end, a spacer 11a having a notch (not shown) is placed in an L-shaped recess in the heat sink 16 to form a through hole 18, and the spacer 11a is fixed together with the heat sink 16 by a screw 10. In the semiconductor device 1A at the right end, a spacer 11a having a notch (not shown) is placed in an L-shaped recess in the heat sink 17 to form a through hole 18, and the spacer 11a is fixed together with the heat sink 17 by a screw 10. Also, in order to insulate the screw 10 from the heat sink (not shown), the screw 10 is inserted into the through hole 18 via a spacer 11b.
[0044] As described above, in semiconductor device 1A of embodiment 2, heat sink 16 and heat sink 17 protrude from the same height position of sealing resin 2, the base end and tip end of heat sink 16 include first flat plate portion 16a and first anchor portion 16b, respectively, the base end and tip end of heat sink 17 include second flat plate portion 17a and second anchor portion 17b, respectively, the height position of the lower surface of first anchor portion 16b is the same as the height position of the upper surface of second flat plate portion 17a, and the height position of the lower surface of second anchor portion 17b is the same as the height position of the upper surface of first flat plate portion 16a.
[0045] Therefore, when multiple semiconductor devices 1A are connected in parallel, the semiconductor devices 1A do not rise up from their mounting locations, and the heat sink 16 can be connected in close contact with the heat sink 17 of the semiconductor device 1A on one lateral side (left side), and the heat sink 17 can be connected in close contact with the heat sink 16 of the semiconductor device 1A on the other lateral side (right side). This makes it possible to suppress imbalances in current and heat that occur when multiple semiconductor devices 1A are connected in parallel.
[0046] In addition, heat sinks 16, 17 are formed in an L-shape with a narrower tip end than a base end when viewed from above, heat sink 16 is point-symmetric with heat sink 17 relative to sealing resin 2 when viewed from above, and a first anchor portion 16b of heat sink 16 is engageable with a second flat portion 17a of heat sink 17 provided in semiconductor device 1A on one side in the horizontal direction, and second anchor portion 17b of heat sink 17 is engageable with a first flat portion 16a of heat sink 16 provided in semiconductor device 1A on the other side in the horizontal direction.
[0047] Therefore, compared to the first embodiment, the heat sinks 16 and 17 can be connected to each other more firmly.
[0048] In addition, the first flat plate portion 16a and the second flat plate portion 17a are each formed with semicircular cutouts 16c, 17c penetrating from the upper surface to the lower surface, and when the heat sink 16 is engaged with the heat sink 17 included in the semiconductor device 1A on one side in the horizontal direction (left side), the two cutouts 16c, 17c form a circular through hole 18 in a top view, and when the heat sink 17 is engaged with the heat sink 16 included in the semiconductor device 1A on the other side in the horizontal direction (right side), the two cutouts 16c, 17c form a circular through hole 18 in a top view. Therefore, the heat sinks 16, 17 can be easily connected to each other with the screws 10.
[0049] The notches 16c, 17c of the heat sinks 16, 17 are not essential and are not required if it is possible to connect the heat sinks 16, 17. In this case, the heat sinks 16, 17 may be connected to each other by soldering, pressure welding, or the like.
[0050] <Embodiment 3> Next, the semiconductor device 1B according to the third embodiment will be described. FIG. 8 is a top view showing the state of the semiconductor device 1B according to the third embodiment before frame cutting. FIG. 9(a) is a top view showing the state of the semiconductor device 1B according to the third embodiment after frame cutting, and FIG. 9(b) is a side view showing the state of the semiconductor device 1B after frame cutting. FIG. 10(a) is a top view showing the state of the semiconductor device 1B according to the third embodiment after forming, and FIG. 10(b) is a side view showing the state of the semiconductor device 1B after forming. FIG. 11(a) is a top view showing the state of the semiconductor device 1B according to the third embodiment combined in parallel, and FIG. 11(b) is a side view showing the state of the semiconductor device 1B combined in parallel. FIG. 12(a) is a top view showing the state of the semiconductor device 1B according to the third embodiment connected in parallel, and FIG. 12(b) is a side view showing the state of the semiconductor device 1B connected in parallel. However, in FIGS. 12(a) and (b), illustration of a heat sink is omitted. In the third embodiment, the same components as those described in the first and second embodiments are denoted by the same reference numerals and the description thereof will be omitted.
[0051] As shown in FIGS. 10(a) and 10(b), in the third embodiment, a semiconductor device 1B includes a heat sink 26 as a first heat sink and a heat sink 27 as a second heat sink instead of heat sinks 6 and 7.
[0052] The heat sinks 26 and 27 are formed by bending a copper plate member, for example, to have a step that protrudes upward, and protrudes from the sealing resin 2 at the same height position.
[0053] The heat sink 26 includes a first flat plate portion 26a and a pair of first anchor portions 26b. The first flat plate portion 26a is formed at the base end of the heat sink 26. The pair of first anchor portions 26b are formed at the tip end of the heat sink 26 and are located above the first flat plate portion 26a via a step. A gap 26c is formed between the pair of first anchor portions 26b.
[0054] The heat sink 27 includes a second flat plate portion 27a and a second anchor portion 27b. The second flat plate portion 27a is formed at the base end of the heat sink 27. The second anchor portion 27b is formed at the tip end of the heat sink 27 and is located above the second flat plate portion 27a via a step. The second anchor portion 27b is formed at the center in the width direction of the heat sink 27 and is formed to a size that allows it to pass through the gap 26c of the heat sink 26 of the other semiconductor device 1B and come into close contact with the upper surface of the first flat plate portion 26a.
[0055] The height position of the lower surface of a pair of first anchor portions 26b in the heat sink 26 is the same as the height position of the upper surface of the second flat portion 27a of the heat sink 27, and the height position of the lower surface of the second anchor portion 27b of the heat sink 27 is the same as the height position of the upper surface of the first flat portion 26a of the heat sink 26.
[0056] As a result, the pair of first anchor portions 26b of the heat sink 26 are engageable with the second flat portion 27a of the heat sink 27 provided in the semiconductor device 1B on one horizontal side (left side), as shown in Figures 11(a) and (b), and the second anchor portion 27b of the heat sink 27 is engageable with the first flat portion 26a of the heat sink 26 provided in the semiconductor device 1B on the other horizontal side (right side).
[0057] In addition, the height position of the lower surface of the pair of first anchor portions 26b in heat sink 26 and the height position of the upper surface of second flat portion 27a of heat sink 27 are the same, and the height position of the lower surface of second anchor portion 27b of heat sink 27 and the height position of the upper surface of first flat portion 26a of heat sink 26 are the same does not only mean that they are completely the same, but also includes cases where there are slight differences due to manufacturing errors, etc.
[0058] Further, a screw hole 2a is formed in the inner periphery of the sealing resin 2 when viewed from above, penetrating from the upper surface to the lower surface.
[0059] Next, a procedure for forming the heat sinks 26, 27 and a procedure for connecting the semiconductor device 1B will be described. As shown in Fig. 8, before frame cutting, a plurality of semiconductor devices 1B are formed in an integrated state in parallel. The heat sinks 26, 27 are formed in a state in which the heat sinks 26, 27 of adjacent semiconductor devices 1B are integrated with each other. At this time, the heat sink 26 of the semiconductor device 1B on the left side in Fig. 8 and the heat sink 27 of the semiconductor device 1B on the right side are integrated with unnecessary parts 29 that are cut off during frame cutting.
[0060] When frame cutting is performed along the dashed lines in Fig. 8, the semiconductor device 1B is divided into individual pieces as shown in Figs. 9(a) and (b). At this time, no steps are formed in the heat sinks 26 and 27, and the heat sinks 26 and 27 are entirely flat. When forming is performed, the first anchor portion 26b and the second anchor portion 27b are formed in a stepped shape as shown in Figs. 10(a) and (b).
[0061] Next, as shown in Figures 11(a) and (b), when combining multiple semiconductor devices 1B in parallel, the lower surfaces of a pair of first anchor portions 26b of the heat sink 26 in the semiconductor device 1B are closely fitted and engaged with the upper surface of the second flat portion 27a of the heat sink 27 provided in the semiconductor device 1B on one horizontal side (left side), and the upper surface of the first flat portion 26a of the heat sink 26 in the semiconductor device 1B is closely fitted and engaged with the lower surface of the second anchor portion 27b of the heat sink 27 provided in the semiconductor device 1B on one horizontal side (left side).
[0062] In addition, the lower surface of the second anchor portion 27b of the heat sink 27 in the semiconductor device 1B is closely fitted and engaged with the upper surface of the first flat portion 26a of the heat sink 26 provided in the semiconductor device 1B on the other lateral side (right side), and the upper surface of the second flat portion 27a of the heat sink 27 in the semiconductor device 1B is closely fitted and engaged with the lower surfaces of the pair of first anchor portions 26b of the heat sink 26 provided in the semiconductor device 1B on the other lateral side (right side).
[0063] Next, as shown in Figures 12(a) and (b), screws 30 are screwed into the screw holes 2a of the sealing resin 2, and the multiple semiconductor devices 1B are combined in parallel and fixed to the upper surface of a heat sink (not shown) via an insulating sheet 9.
[0064] As described above, in semiconductor device 1B of embodiment 3, heat sink 26 and heat sink 27 protrude from the same height position of sealing resin 2, the base end and tip end of heat sink 26 include first flat plate portion 26a and first anchor portion 26b, respectively, the base end and tip end of heat sink 27 include second flat plate portion 27a and second anchor portion 27b, respectively, the height position of the lower surface of first anchor portion 26b is the same as the height position of the upper surface of second flat plate portion 27a, and the height position of the lower surface of second anchor portion 27b is the same as the height position of the upper surface of first flat plate portion 26a.
[0065] Therefore, when multiple semiconductor devices 1B are connected in parallel, the semiconductor devices 1B do not rise up from their mounting locations, and the heat sink 26 can be connected in a state of intimate contact with the heat sink 27 of the semiconductor device 1B on one lateral side (right side), and the heat sink 27 can be connected in a state of intimate contact with the heat sink 26 of the semiconductor device 1B on the other lateral side (left side). This makes it possible to suppress imbalances in current and heat that occur when multiple semiconductor devices 1B are connected in parallel.
[0066] Furthermore, because screw holes 2a are formed in the inner periphery of the sealing resin 2 when viewed from above, the semiconductor device 1B can be fixed to the upper surface of a heat sink (not shown) without using the spacers 11a and 11b used in the first and second embodiments. This makes it possible to reduce the number of parts used when connecting multiple semiconductor devices 1B in parallel.
[0067] In the first and second embodiments as well as in the third embodiment, a screw hole 2a may be formed in the inner periphery of the sealing resin 2.
[0068] It should be noted that the embodiments can be freely combined, and each embodiment can be modified or omitted as appropriate. [Explanation of symbols]
[0069] 1, 1A, 1B semiconductor device, 2 sealing resin, 2a screw hole, 3 gate terminal, 4 drain terminal, 5 source terminal, 6 heat sink, 6a through hole, 7 heat sink, 7a through hole, 16 heat sink, 16a flat plate portion, 16b anchor portion, 16c cutout, 17 heat sink, 17a flat plate portion, 17b anchor portion, 17c cutout, 18 through hole, 26 heat sink, 26a flat plate portion, 26b anchor portion, 27 heat sink, 27a flat plate portion, 27b anchor portion.
Claims
1. A semiconductor device connectable to semiconductor devices arranged on both sides in a lateral direction, A semiconductor element that flows a current from a source to a drain when a signal is input from a gate; a sealing resin that is formed in a rectangular shape when viewed from above and seals the semiconductor element; a gate terminal electrically connected to the gate and protruding from a first side of the sealing resin in a top view; a drain terminal electrically connected to the drain and protruding from the first side of the sealing resin in a top view; a source terminal electrically connected to the source and protruding from the first side of the sealing resin in a top view; a first heat sink electrically connected to the drain and protruding from a second side of the sealing resin intersecting the first side in a top view; a second heat sink electrically connected to the drain and protruding from a third side of the sealing resin opposite to the second side in a top view; at least one of a height position of a lower surface of a tip end portion of the first heat sink plate and a height position of an upper surface of a base end portion of the second heat sink plate, and a height position of a lower surface of a tip end portion of the second heat sink plate and a height position of an upper surface of a base end portion of the first heat sink plate are the same; the first heat sink and the second heat sink protrude from the sealing resin at the same height position, the base end and the tip end of the first heat sink include a first flat portion and a first anchor portion, respectively; the base end and the tip end of the second heat sink include a second flat portion and a second anchor portion, respectively; a height position of a lower surface of the first anchor portion and a height position of an upper surface of the second flat plate portion are the same; a height position of a lower surface of the second anchor portion and a height position of an upper surface of the first flat plate portion are the same; The first heat sink and the second heat sink are formed in an L-shape with the tip end portion narrower than the base end portion when viewed from above, the first heat sink is point-symmetrical to the second heat sink with respect to the sealing resin in a top view; the first anchor portion of the first heat sink is engageable with the second flat portion of the second heat sink provided on the semiconductor device on one side in the lateral direction; A semiconductor device, wherein the second anchor portion of the second heat sink is engageable with the first flat portion of the first heat sink provided on the semiconductor device on the other side in the lateral direction.
2. The first flat plate portion and the second flat plate portion have a semicircular cutout formed therein, the cutout penetrating from the upper surface to the lower surface when viewed from above, when the first heat sink and the second heat sink of the semiconductor device on one side in the lateral direction are engaged with each other, the two notches form a first through hole having a circular shape in a top view; 2. The semiconductor device according to claim 1, wherein when the second heat sink is engaged with the first heat sink of the semiconductor device on the other side in the lateral direction, the two notches form a second through hole that is circular in a top view.
3. 3. The semiconductor device according to claim 1, wherein a screw hole is formed in an inner peripheral portion of said sealing resin when viewed from above.
Citation Information
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