Display device

Abstract

To provide a touch panel and a display device that are thin, have a simple configuration, and are easy to incorporate into electronic devices. [Solution] A touch panel 310 includes a first substrate 371, a transistor 203 having a region above the first substrate, an insulating layer 254 having a region above the transistor, a first conductive layer 251 having a region above the insulating layer, second conductive layers 331 and 341 and a third conductive layer 207 having regions above the transistor, and a source signal line. The first conductive layer 251 has a region that functions as a pixel electrode and a slit. The second conductive layer has a region that functions as one electrode of a touch sensor. The first conductive layer has a region in contact with the top surface of the insulating layer 254 and is electrically connected to one of the source or drain of the transistor through a first contact portion of the insulating layer. The second conductive layer is electrically connected to the third conductive layer 207 through a second contact portion of the insulating layer.

Description

[Technical field]

[0001] One aspect of the present invention relates to an input device. One aspect of the present invention relates to a display device. TECHNICAL FIELD One embodiment of the present invention relates to an input / output device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. One aspect of the present invention relates to a process, a machine, or a method of manufacture. , manufacture, or composition of matter. More specifically, a technical field of one embodiment of the present invention disclosed in this specification and the like is semiconductor device. , display devices, light-emitting devices, power storage devices, storage devices, electronic devices, lighting devices, input devices, input / output devices The present invention relates to an apparatus, a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general. Semiconductor elements such as transistors, semiconductor circuits, computing devices, memory The device is one aspect of a semiconductor device. power devices, input / output devices, electro-optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.) Some of the equipment and electronic devices include semiconductor devices. [Background technology]

[0004] In recent years, display devices (or display modules) equipped with touch sensors as a position input means have become popular. A display device (or a display module) equipped with a touch sensor is These are called touch panels or touch screens (hereafter, simply referred to as "touch panels"). It does not have a display device and is composed only of a touch sensor. Such a component may be called a touch panel. The display device equipped with the sensor is called a display device with a touch sensor, a touch panel with a display device, or The display device may also be called a display module. If an in-cell touch sensor is built in, Display device with on-cell touch sensor, or on-cell touch sensor (or on-cell touch sensor with In-cell touch sensors are sometimes called liquid crystal display devices. The electrodes used are also used as electrodes for the touch sensor. The touch sensor has a touch panel on the upper side of the counter substrate (the side on which the display element is not provided), for example. For example, these touch panels are The portable information terminals include smartphones and tablet terminals.

[0005] One type of display device is a liquid crystal display device that includes a liquid crystal element. The transistors are arranged in a trix shape and used as switching elements connected to each pixel electrode. Active matrix liquid crystal display devices using such a liquid crystal display device have been attracting attention.

[0006] For example, a metal oxide channel-type switching element is used to connect to each pixel electrode. Active matrix liquid crystal display devices using transistors with a region (Patent Document 1 and Patent Document 2).

[0007] Furthermore, Patent Documents 3 to 6 describe touch panels to which liquid crystal elements are applied.

[0008] Liquid crystal display devices are broadly classified into two types: a transmissive type and a reflective type.

[0009] Transmissive LCD devices use backlights such as cold cathode fluorescent lamps or LEDs to project light onto the LCD. By utilizing the optical modulation effect of the backlight, the light from the backlight passes through the liquid crystal and is emitted to the outside of the liquid crystal display device. Select the output state and non-output state, display light and dark, and The above are combined to display an image.

[0010] In addition, a reflective liquid crystal display device utilizes the optical modulation effect of liquid crystal to reflect external light, i.e., incident light, A state in which the light is reflected by the pixel electrode and output to the outside of the device, and a state in which the incident light is not output to the outside of the device By selecting the light and dark, and combining them, you can display the image. This is what happens. [Prior art documents] [Patent documents]

[0011] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A [Patent Document 3] JP 2011-197685 A [Patent Document 4] JP 2014-44537 A [Patent Document 5] JP 2014-178847 A [Patent Document 6] U.S. Patent No. 7,920,129 Summary of the Invention [Problem to be solved by the invention]

[0012] A display panel (display device or display module) is provided with a user interface. Therefore, there is a demand for touch panels that allow input by touching the screen with a finger or a stylus. is.

[0013] In addition, there is a demand for electronic devices to which touch panels are applied to be thinner and lighter. Therefore, there is a demand for thinner and lighter touch panels.

[0014] For example, a touch panel is a display panel that is operated by a human finger or pen on the visible side (display surface side). A touch sensor may be provided on the touch side.

[0015] For example, a touch panel (or a display module) may be configured with a display panel on the display surface side. A substrate having a touch sensor can be attached. The display panel and touch sensor are separate components in the display module (or display module). The display panel and the touch sensor are bonded together. However, in such a configuration, a touch sensor is required separately from the display panel substrate. Since a substrate for the touch panel is required, the thickness of the touch panel (or display module) cannot be reduced. There were problems with this, such as the lack of a suitable design and the large number of parts required.

[0016] One aspect of the present invention is a thin touch panel (or a display device with a touch sensor) or the like. One of the objectives is to provide a touch panel (or a touch panel) with a simplified configuration. One of the objectives is to provide a display device with a sensor, etc. One of the objectives is to provide a touch panel (or a display device with a touch sensor) that is easy to use. Alternatively, a touch panel (or a display device with a touch sensor) with a small number of parts may be used. One of the objectives is to provide a lightweight touch panel (or a touch sensor attached table). One of the objectives of the present invention is to provide a display device and the like.

[0017] Alternatively, it is an object of the present invention to provide a novel input device. Another object of the present invention is to provide a novel display device. The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment of the present invention to solve all of these problems. The problem is self-evident from the description, drawings, claims, etc. It is possible to extract other issues from documents, drawings, claims, etc. [Means for solving the problem]

[0018] One aspect of the present invention is a semiconductor device comprising a first substrate, a second substrate, a first conductive layer, a second conductive layer, and The touch panel includes a third conductive layer, a fourth conductive layer, a liquid crystal, and an FPC. The first conductive layer functions as a pixel electrode, and the second conductive layer functions as a common electrode. The third conductive layer and the fourth conductive layer function as electrodes of the touch sensor. The FPC is electrically connected to the fourth conductive layer. The layer, the fourth conductive layer, and the liquid crystal are located between the first substrate and the second substrate, and the first conductive layer, The second conductive layer and the third conductive layer are provided on the first substrate, and the FPC is provided on the first substrate. It is being done.

[0019] In the above, the fifth conductive layer and the connector are provided, and the fifth conductive layer is connected to the first substrate. the fourth conductive layer is provided on the second substrate, and the fifth conductive layer and the fourth conductive layer are It is preferable that the electrical connection is made via a connector.

[0020] Alternatively, the fourth conductive layer is preferably provided on the first substrate.

[0021] At this time, either the third conductive layer or the fourth conductive layer is on the same plane as the second conductive layer. It is preferable that the sensor is provided in the sensor area.

[0022] Alternatively, the third conductive layer is provided on the same surface as the first conductive layer or the second conductive layer, The fourth conductive layer is preferably provided on the same surface as the first conductive layer or the second conductive layer. It is nice.

[0023] Alternatively, the second conductive layer is integrally formed with either the third conductive layer or the fourth conductive layer. It is preferable that the

[0024] Alternatively, the first conductive layer is integrally formed with either the third conductive layer or the fourth conductive layer. It is preferable that the Effect of the Invention

[0025] According to one aspect of the present invention, a thin touch panel (or a display device with a touch sensor) Or, a simplified touch panel (or a display with a touch sensor) can be provided. Alternatively, it is possible to provide a touch panel (or touch panel) that is easily incorporated into electronic devices. Or, we can provide touch panels with fewer parts (or Or, a lightweight touch panel (or a touch sensor-equipped display device) can be provided. It is possible to provide a display device with a touch sensor, etc. Also, it is possible to provide a novel input device. This can provide a novel input / output device. Or, this can provide a novel display device. The description of these effects does not preclude the existence of other effects. It is not necessary for the invention to have all of these effects. Effects other than these may be described in the specification, This is self-evident from the description in the drawings, claims, etc. It is possible to extract other effects from any of the descriptions. [Brief description of the drawings]

[0026] [Figure 1] 1A and 1B are a block diagram and a timing chart of a touch sensor according to an embodiment. [Diagram 2] 1A to 1C are diagrams illustrating a pixel including a touch sensor according to an embodiment. [Diagram 3] 1A to 1C are diagrams illustrating a pixel including a touch sensor according to an embodiment. [Figure 4] 1A to 1C are diagrams illustrating a pixel including a touch sensor according to an embodiment. [Diagram 5] 1A to 1C are diagrams illustrating a pixel including a touch sensor according to an embodiment. [Figure 6] 5A to 5C are diagrams illustrating operations of a touch sensor and a pixel according to an embodiment. [Figure 7] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 8] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 9] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 10] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 11] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 12] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 13]3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 14] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 15] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 16] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 17] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 18] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 19] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 20] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 21] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 22] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 23] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 24] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 25] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 26] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 27] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 28] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 29] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 30] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 31] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 32] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 33] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 34] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 35] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 36] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 37] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 38] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 39] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 40] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 41] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 42] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 43] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 44] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 45] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 46] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 47] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 48] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 49] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 50] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 51] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 52] 3 shows an example of the configuration of a touch panel according to an embodiment. [Diagram 53] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 54] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 55] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 56] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 57] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 58] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 59] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 60] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 61] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 62] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 63] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 64] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 65] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 66] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 67] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 68] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 69] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 70] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 71] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 72] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 73] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 74] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 75] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 76] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 77] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 78]3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 79] 3 shows an example of the configuration of a touch panel according to an embodiment. [Figure 80] FIG. 1 is a schematic diagram illustrating an example of a display device. [Figure 81] 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 82] 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 83] 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 84] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 85] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 86] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 87] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 88] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 89] FIG. 2 is a diagram for explaining an energy band structure. [Figure 90] 1A to 1C are diagrams illustrating a display module according to an embodiment. [Figure 91] 1A to 1C are diagrams illustrating electronic devices according to an embodiment. [Figure 92] 1A to 1C are diagrams illustrating electronic devices according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] The embodiment will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiment, and various changes and modifications may be made in the form and details without departing from the spirit and scope of the present invention. It will be easily understood by those skilled in the art that the present invention can be realized by the following embodiments. The present disclosure should not be construed as being limited to the contents of the preceding paragraph.

[0028] In the configuration of the invention described below, the same parts or parts having similar functions are The same reference numerals are used in common between different drawings, and the repeated explanations are omitted. When referring to a function, the hatch pattern may be the same and no particular symbol may be used.

[0029] In each figure described in this specification, the size, layer thickness, or area of ​​each component is indicated by the following formula: The figures may be exaggerated for clarity and are not necessarily limited to scale. stomach.

[0030] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion of components. The numbers are added for the purpose of convenience and are not intended to be limiting.

[0031] The words "film" and "layer" can be used interchangeably. For example, the term "conductive layer" may be changed to the term "conductive film." In some cases, the term "insulating film" may be changed to the term "insulating layer." .

[0032] (Embodiment 1) In this embodiment, a driving method, a driving mode, and a driving method for an input device or an input / output device according to one embodiment of the present invention will be described. An example of the configuration will be described with reference to the drawings.

[0033] [Example of sensor detection method] FIG. 1(A) is a block diagram showing the configuration of a mutual capacitance type touch sensor. 1(A) shows a pulse voltage output circuit 601 and a current detection circuit 602. As an example, an electrode 621 to which a pulse voltage is applied and an electrode 62 to which a change in current is detected are 2 are shown as six wires, X1-X6 and Y1-Y6, respectively. The number of electrodes is not limited to this. In addition, in FIG. 1(A), the electrode 621 and the electrode 622 are overlapped. The electrode 621 and the electrode 622 are folded or arranged close to each other. The electrodes 621 and 622 have the same function. You may replace it.

[0034] As an example, the pulse voltage output circuit 601 applies a pulse voltage to the wirings X1-X6 in order. This is a circuit for applying a pulse voltage to the X1-X6 wiring. An electric field is generated between the electrodes 621 and 622 that form the electrode 3. Then, a pulse voltage This causes a current to flow through the capacitor 603. The electric field generated between these electrodes is In other words, the capacitance of 603 changes depending on the touch of a finger or pen. The capacitance value changes. In this way, the capacitance value changes when a finger or pen touches the By utilizing this, the approach or contact of a detection object can be detected.

[0035] The current detection circuit 602 detects the current in the wiring Y1-Y6 due to a change in the capacitance value of the capacitor 603. This is a circuit to detect changes in the temperature. The wiring of Y1-Y6 is If there is no touch, the detected current value will not change, but if the object to be detected approaches or touches it, When the capacitance value decreases due to the current flow, the change in the current is detected. The total amount may be detected. In that case, an integrating circuit or the like may be used for detection. Alternatively, the peak value of the current may be detected. In that case, the current is converted to a voltage and the voltage value is The peak value may be detected.

[0036] Next, FIG. 1B shows the input and output of the mutual capacitance type touch sensor shown in FIG. The timing chart of the waveform is shown in Fig. 1(B). In addition, in Fig. 1(B), when no object is detected (non-touch The two cases shown are Y1- For the Y6 wiring, the waveform is shown as a voltage value corresponding to the detected current value. The display panel is also performing a display operation. It is desirable to synchronize the timing of the touch sensor. shows an example in which the operation is not synchronized with the display operation.

[0037] A pulse voltage is applied to the wires X1-X6 in sequence, and the The waveform in the Y6 wiring changes. When there is no approach or contact of the object to be detected, X1-X6 The waveforms of Y1-Y6 change uniformly according to the change in the voltage of the wiring. Or, at the point of contact, the current value decreases, and the corresponding voltage waveform also changes. do.

[0038] In this way, by detecting the change in capacitance, the approach or contact of the object to be detected can be detected. In addition, when a detected object such as a finger or pen comes into contact with a touch sensor or a touch panel, Even if the vehicle is not moving and is approaching, the signal may still be detected.

[0039] The pulse voltage output circuit 601 and the current detection circuit 602 are, for example, a single IC It is preferable that the IC chip is formed in a It is preferable that the device is mounted on a touch panel or on a board inside the housing of an electronic device. In addition, when making a flexible touch panel, parasitic capacitance increases at the bent parts. However, this may increase the effect of noise, so it is recommended to use a drive that is less susceptible to noise. It is preferable to use an IC chip to which the method is applied. For example, the signal-to-noise ratio (S / It is preferable to use an IC chip to which a driving method for increasing the noise ratio is applied.

[0040] In addition, in FIG. 1A, a package in which only a capacitor 603 is provided at the intersection of wiring as a touch sensor is used. The configuration of a sub-matrix type touch sensor has been shown, but the active element having a transistor and a capacitor is Alternatively, a touch sensor of an active matrix type may be used.

[0041] [Example of in-cell touch panel configuration] Here, a touch sensor is formed on a substrate on which a display element, a transistor, etc. are provided. An example in which at least one of the electrodes is disposed will be described.

[0042] In the following, we will discuss a touch panel (a so-called Here, a configuration example of a display element (in-cell type) provided in a pixel is described. However, one embodiment of the present invention is not limited to this, and various Such a display element can be applied.

[0043] FIG. 2A shows a part of a pixel circuit provided in a display unit of a touch panel illustrated in this configuration example. FIG.

[0044] Each pixel includes at least a transistor 63 and a liquid crystal element 64. In addition, the transistor 63 may have a storage capacitor. A wiring 62 is electrically connected to either the source or the drain.

[0045] The pixel circuit includes a plurality of wirings (for example, wiring 72_1 and wiring 72_2) extending in the X direction. , a plurality of wirings (for example, wiring 71_1, wiring 71_2) extending in the Y direction, are provided so as to cross each other, and a capacitance is formed between the wirings.

[0046] As an example, among the pixels provided in the pixel circuit, some adjacent pixels One electrode of each liquid crystal element is electrically connected to form one block. Here, for example, a plurality of linear blocks extending in the Y direction (for example, blocks In addition, in FIG. 2(A), only a part of the pixel circuit is shown. In reality, these blocks are arranged repeatedly in the X direction. One of the electrodes of the sensor may be, for example, a common electrode or a counter electrode. On the other hand, the other electrode of the liquid crystal element is, for example, a pixel electrode.

[0047] With this configuration, the electrodes constituting the touch sensor and the liquid crystal of the pixel circuit The wiring 71_1 and the wiring 71_2 can also serve as one electrode of the element. 2 serves as one electrode of the liquid crystal element and also serves as an electrode constituting a touch sensor. The line 72_1 and the wiring 72_2 function as electrodes that constitute a touch sensor. Therefore, the configuration of the touch panel can be simplified. In FIG. 2(A), a plurality of The wiring (for example, the wiring 71_1 and the wiring 71_2) is connected to one electrode of the liquid crystal element and the touch sensor. However, one embodiment of the present invention is not limited to this. For example, A plurality of wirings (for example, wiring 72_1 and wiring 72_2) extending in the X direction are arranged to face one of the liquid crystal elements. The electrodes may also serve as electrodes constituting the touch sensor. is shown in Figure 3.

[0048] In addition, in FIG. 2(A) and FIG. 3, the wiring is connected to one electrode of the liquid crystal element and the touch sensor. However, one embodiment of the present invention is not limited to this. One electrode of the liquid crystal element and the electrode that constitutes the touch sensor are each wired separately. For example, as shown in FIG. 2B, one electrode of the liquid crystal element 64 and In this case, the wiring 66 may be connected to the liquid crystal element 64. At least one of the electrodes constituting the liquid crystal element 64 and the other electrode constituting the liquid crystal element 64 is connected in the X direction. At least one of the wirings extending in the Y direction and the wirings extending in the Y direction is coated with the same conductive film. By simultaneously forming the wiring 6, the manufacturing process of the touch panel can be simplified. 6 and the wiring 71_1 and the wiring 71_2 may be formed simultaneously, or the wiring 66 and the wiring 7 2_1 and the wiring 72_2 may be formed at the same time.

[0049] In addition, in FIG. 2(A), FIG. 2(B) and FIG. 3, a liquid crystal element is used as a display element. However, one embodiment of the present invention is not limited to this. An example of this use is shown in FIG. 4 and FIG.

[0050] FIG. 6A shows a plurality of wirings 72 extending in the X direction and a plurality of wirings 71 extending in the Y direction. It is an equivalent circuit diagram showing the connection configuration of the touch sensor. Each of the wirings 71 extending in the Y direction is connected to an input voltage (or , selected voltage) or common potential (or ground potential, or reference potential) In addition, each of the wirings 72 extending in the X direction is connected to a ground potential (or a reference potential). Alternatively, the wiring 72 can be electrically connected to the detection circuit. The wiring 71 and the wiring 72 can be interchanged. may be connected.

[0051] The operation of the above-mentioned touch panel will be described below with reference to FIGS.

[0052] Here, as an example, one frame period is divided into a writing period and a detection period. The write period is a period in which image data is written to the pixels, and the wiring 61 (gate During the detection period, the touch sensor is This is a period in which sensing is performed by the input voltage Vin. The wirings 71 extending in the Y direction are selected in sequence, and the input voltage Vin is is entered.

[0053] FIG. 6B is an equivalent circuit diagram during the writing period. A common potential is input to both the wiring 72 extending in the Y direction and the wiring 71 extending in the Y direction.

[0054] FIG. 6C is an equivalent circuit diagram at a certain point in the detection period. Each of the wirings 72 extending in the Y direction is electrically connected to the detection circuit. The selected one has the input voltage applied, and the others have the common potential applied. do.

[0055] The driving method exemplified here can be used not only for the in-cell method but also for the touch panel exemplified above. This can also be applied to the

[0056] In this way, the image writing period and the period for sensing by the touch sensor are separated. For example, it is preferable to perform sensing during a blanking period of a display. This prevents the touch sensor sensitivity from decreasing due to noise when writing to pixels. It is possible.

[0057] [About the touch panel system] In the following, several methods that can be applied to the touch panel according to one embodiment of the present invention will be described. do.

[0058] In this specification, the touch panel has a function of displaying (outputting) images on a display surface. A touch sensor that detects when a finger, stylus, or other object touches or approaches the display surface. Therefore, the touch panel is one type of input / output device. do.

[0059] In the present specification, the substrate of the touch panel is provided with, for example, an FPC (Flexible Printed Circuit). Print Circuit) or TCP (Tape Carrier Packag e) or other connectors attached to the board, or COG (Chip On Ground) The IC (integrated circuit) mounted by the LDLC method is called a touch panel module. It may be called a display module or simply a touch panel.

[0060] A capacitive touch sensor that can be applied to one aspect of the present invention includes a pair of conductive layers. A capacitance is formed between the pair of conductive layers. When the object to be detected touches or is connected to the pair of conductive layers, The detection is performed by utilizing the change in the capacitance between a pair of conductive layers due to the approach of the two layers. It is possible.

[0061] The capacitive touch panel includes a surface capacitive touch panel and a projected capacitive touch panel. Capacitive methods include self-capacitance and mutual capacitance, mainly depending on the driving method. The mutual capacitance method is preferable because it allows simultaneous multi-point detection. It is also possible to use the method.

[0062] In addition, a liquid crystal element (vertical electric field type) can be used as a display element in the touch panel of one embodiment of the present invention. type, or in-plane electric field type), MEMS (Micro Electro Mechanical Al System, an optical element, organic EL (Electro Luminescence) cence elements and light emitting diodes (LEDs) Various display elements such as light-emitting elements such as e) and electrophoretic elements can be used.

[0063] Here, as an example, a liquid crystal element in which a horizontal electric field method is applied as a display element in a touch panel is used. It is preferable to apply a transmission type liquid crystal display device using the above.

[0064] The touch panel according to one embodiment of the present invention includes a pair of electrodes that constitute a touch sensor between a pair of substrates. The display panel and the touch sensor are connected by sandwiching the electrodes (also called conductive layers or wiring). In other words, the touch sensor is not formed on a separate substrate, but A touch sensor is formed over a pair of substrates on which a display element and a transistor are provided. Therefore, the thickness of the touch panel can be reduced, and a lightweight touch panel can be realized.

[0065] In addition, the touch panel according to one embodiment of the present invention includes an FPC (Fl Both the flexible printed circuit (FPC) and the FPC that drives the touch sensor This makes it easier to incorporate into electronic devices and reduces the number of parts. It is possible to reduce

[0066] FIG. 7(A) is a schematic cross-sectional view illustrating the system of a touch panel 10 according to one embodiment of the present invention. .

[0067] The touch panel 10 includes a substrate 11, a substrate 12, an FPC 13, a conductive layer 14, a liquid crystal element 20, It has a colored layer 31, a conductive layer 41, and the like.

[0068] The liquid crystal element 20 is composed of a conductive layer 21, a conductive layer 22, and liquid crystal 23. FFS (Fringe Field Switching) mode is applied to the crystal element 20. The liquid crystal element shown in FIG. 1 is a liquid crystal element having a conductive layer 21 and a conductive layer 22 on the conductive layer 21. 2 is disposed. The conductive layer 22 has, for example, a comb-like upper surface shape or a slit The conductive layer 21 and the conductive layer 22 have a top surface shape (also referred to as a planar shape) in which One of them functions as a common electrode, and the other functions as a pixel electrode. When a light emitting element or the like is used, the conductive layer 22 may have a comb-like upper surface shape, for example. does not have a top surface shape with slits.

[0069] The touch sensor is formed by a conductive layer 41 provided on the substrate 12 side and a pair of electrodes of the liquid crystal element 20. The capacitance formed between the conductive layer 21 and the other conductive layer 21 can be used for detection. Here, as an example, the conductive layer 41 is formed on the surface of the substrate 12 facing the substrate 11 (i.e., the surface of the substrate 12 facing the substrate 11). It is preferable that the insulating layer 14 is provided on the lower surface of the insulating layer 14.

[0070] The conductive layer 41 provided on the substrate 12 side is connected to the conductive layer 41 provided on the substrate 11 side by the connection layer 15. The conductive layer 14 is electrically connected to the FPC 13 attached to the substrate 11 side. With this configuration, the touch sensor can be driven on one board. In addition, an FPC for driving the liquid crystal element 20 can be disposed on the substrate 11.

[0071] Here, as a configuration of the touch panel, for example, the surface of the substrate 12 opposite to the substrate 11 side (the surface That is, when a conductive layer that functions as an electrode of a touch sensor is disposed on the upper surface of the substrate 12, In order to electrically connect the FPC to the board 12, it is necessary to attach the FPC to the board 12. Even if the connecting layer 15 shown is not used, the FPC electrically connected to the conductive layer 41 is It is necessary to attach the substrate 12 to the substrate 11. Also, it is necessary to attach the substrate 12 to a substrate different from the substrate 11 and the substrate 12. When placing a conductive layer that functions as an electrode for the sensor, attach the FPC to the board. Therefore, such a configuration increases the number of parts and requires a large amount of time to be incorporated into the electronic device. However, in one embodiment of the present invention, Since it is possible to place the FPC on only one of the pair of boards, the number of parts is reduced and The configuration can be made easy to incorporate into child devices.

[0072] In addition, one electrode of the liquid crystal element 20 is connected to at least one of a pair of electrodes that function as a touch sensor. By combining both, the process can be simplified and the yield can be improved. The manufacturing costs can be reduced.

[0073] In FIG. 7B, a conductive layer 41 that functions as an electrode of the touch sensor is disposed on the substrate 11 side. The conductive layer 41 is electrically connected to the conductive layer 14. The touch sensor includes: The conductive layer 41 and a conductive layer that functions as one of a pair of electrodes (for example, a common electrode) of the liquid crystal element 20. The capacitance formed between the electrode layer 21 and the electrode 22 can be used for detection. In this case, the FPC 13 can be disposed on the substrate 11 side. It is preferable to use the surface on the side as the touch surface, since this can further increase the detection sensitivity.

[0074] In the configuration shown in FIG. 7C, the conductive layer 41 is disposed on the same plane as the conductive layer 22. The conductive layer 41 is electrically connected to the conductive layer 14 in a region not shown. It is preferable that the conductive layer 41 and the conductive layer 22 are simultaneously formed by processing the same conductive film. The touch sensor detects the capacitance between the conductive layer 41 and the conductive layer 21. The conductive layer 21 can function as a common electrode for the liquid crystal element 20 and as a touch panel. It also functions as an electrode of the sensor.

[0075] The configuration shown in FIG. 7D is an IPS (In-Plane-Switched) liquid crystal element 20. ng) mode is applied.

[0076] The conductive layer 21 and the conductive layer 22 that constitute the liquid crystal element 20 are provided on the same surface. The layer 21 and the conductive layer 22 each have a comb-like shape, and are arranged so as to interlock with each other. The touch sensor utilizes the capacitance formed between the conductive layer 41 and the conductive layer 21. The conductive layer 21 can function as a common electrode of the liquid crystal element 20, for example. The contact hole has a function as a contact hole for connecting the contact hole to the contact hole and a function as an electrode of the touch sensor.

[0077] The conductive layer 41, which functions as one electrode of the touch sensor, is made of the conductive layer 21 and the conductive layer 2 2. The conductive layer 41 is electrically connected to the conductive layer 14 in a region not shown. Here, the conductive layer 41, the conductive layer 21, and the conductive layer 22 are connected to the same conductive layer. It is preferable that the film is processed at the same time.

[0078] The configuration shown in FIG. 7E is another example in which the liquid crystal element 20 in the FFS mode is used. The touch sensor uses a capacitance formed between the conductive layer 41a and the conductive layer 41b. The conductive layer 21 and the conductive layer 22 are connected to the common electrode of the liquid crystal element 20. One functions as a current-carrying electrode, and the other functions as a pixel electrode of the liquid crystal element 20.

[0079] The conductive layer 41a is provided on the same plane as the conductive layer 22. The conductive layer 41b is provided on the same plane as the conductive layer 22. 1. Here, the conductive layer 41a and the conductive layer 22 are formed by applying the same conductive film. It is preferable to simultaneously form the conductive layer 41b and the conductive layer 21 by applying the same conductive material. It is preferable to process the film and form the film at the same time. In the process of forming a pair of electrodes of 0, a pair of electrodes constituting a touch sensor is formed at the same time. This allows the device to function as a touch sensor without increasing the manufacturing process. A panel 10 can be fabricated.

[0080] The configuration shown in FIG. 8A is another example in which a liquid crystal element 20 in the FFS mode is used. The touch sensor uses a capacitance formed between the conductive layer 41a and the conductive layer 41b. The conductive layer 21 can be used, for example, as a common electrode of the liquid crystal element 20. It has the following functions.

[0081] The conductive layer 41a and the conductive layer 41b are provided on the same plane as the conductive layer 22. The conductive layer 41a, the conductive layer 41b, and the conductive layer 22 are simultaneously formed by processing the same conductive film. By adopting such a configuration, in the step of forming one electrode of the liquid crystal element 20, Since a pair of electrodes constituting a touch sensor can be formed at the same time, the manufacturing process can be simplified. Therefore, it is possible to manufacture a touch panel 10 having a function as a touch sensor without causing any damage. do.

[0082] The conductive layer 41a is provided so as to overlap the conductive layer 21. However, the conductive layer 21 may be provided so as not to overlap the conductive layer 41a. As a result, the parasitic capacitance of the conductive layer 41a can be reduced. Similarly, in this case, the conductive layer 21 may be provided so as not to overlap the conductive layer 41b.

[0083] The configuration shown in FIG. 8B is another example in which the liquid crystal element 20 in the FFS mode is used. The touch sensor uses a capacitance formed between the conductive layer 41a and the conductive layer 41b. The conductive layer 21 and the conductive layer 22 are connected to the common electrode of the liquid crystal element 20. One functions as a current-carrying electrode, and the other functions as a pixel electrode of the liquid crystal element 20.

[0084] The conductive layer 41a and the conductive layer 41b are provided on the same plane as the conductive layer 21. The conductive layer 41a, the conductive layer 41b, and the conductive layer 21 are simultaneously formed by processing the same conductive film. By adopting such a configuration, in the step of forming one electrode of the liquid crystal element 20, Since a pair of electrodes constituting a touch sensor can be formed at the same time, the manufacturing process can be simplified. Therefore, it is possible to manufacture a touch panel 10 having a function as a touch sensor without causing any damage. do.

[0085] The configuration shown in FIG. 8C is another example in which the liquid crystal element 20 in the FFS mode is used. The touch sensor includes a conductive layer 41 and a liquid crystal element 20 as one of a pair of electrodes. It can be detected by utilizing the capacitance formed between the conductive layer 21 that is functioning. 1 serves as a common electrode for the liquid crystal element 20 and as an electrode for a touch sensor. It has the ability.

[0086] The conductive layer 41 is provided on the same plane as the conductive layer 21. It is preferable that the first and second electrodes are formed at the same time by processing the same conductive film. In this way, in the process of forming one electrode of the liquid crystal element 20, a pair of electrodes constituting a touch sensor are formed at the same time. This allows the formation of electrodes, enabling the device to function as a touch sensor without increasing the manufacturing process. It is possible to manufacture a touch panel 10 having such a function.

[0087] The configuration shown in FIG. 9 shows an example in which the liquid crystal element 20 is in the IPS mode.

[0088] The conductive layer 21 and the conductive layer 22 that constitute the liquid crystal element 20 are provided on the same surface. The layer 21 and the conductive layer 22 each have a comb-like shape, and are arranged so as to interlock with each other. One of the conductive layers 21 and 22 serves as a common electrode of the liquid crystal element 20. The other has a function as a pixel electrode of the liquid crystal element 20 .

[0089] The conductive layer 41a and the conductive layer 41b functioning as electrodes of the touch sensor are The conductive layer 41a, the conductive layer 41b, and the conductive layer 22 are disposed on the same plane. It is preferable that the conductive layer 21 and the conductive layer 22 are formed simultaneously by processing the same conductive film. The touch sensor detects the capacitance between the conductive layer 41a and the conductive layer 41b. It is possible.

[0090] In addition, when the FFS mode is applied, the conductive layer 21 is formed in a comb-like or strip-like shape. By providing a lit top surface, the display can be switched to IPS mode.

[0091] For example, FIG. 10A shows the case where FIG. 7C is changed to the IPS mode. 1 serves as a common electrode for the liquid crystal element 20 and as an electrode for a touch sensor. It has the ability.

[0092] Similarly, FIG. 10B shows the case where FIG. 7E is changed to the IPS mode. One of the first and second conductive layers 21 and 22 functions as a common electrode for the liquid crystal element 20, and the other functions as a common electrode for the liquid crystal element 20. The pixel electrode 20 functions as a pixel electrode.

[0093] Similarly, when Fig. 8(A) and Fig. 8(B) are changed to IPS mode, Fig. 11 11A and 11B. One of the conductive layer 21 and the conductive layer 22 is a common layer for the liquid crystal element 20. One functions as an electrode, and the other functions as a pixel electrode of the liquid crystal element 20.

[0094] Similarly, FIG. 11C shows the case where FIG. 8C is changed to the IPS mode. 1 serves as a common electrode for the liquid crystal element 20 and as an electrode for a touch sensor. It has the ability.

[0095] The upper electrode is a pixel electrode of the liquid crystal element 20, and the lower electrode is a common electrode of the liquid crystal element 20. Although many examples in which the upper electrode is a metal electrode have been shown, one embodiment of the present invention is not limited thereto. The upper electrode is a common electrode for the liquid crystal element 20, and the lower electrode is a pixel electrode for the liquid crystal element 20. You may do so.

[0096] For example, in FIG. 7C, the upper electrode is made to be a common electrode for the liquid crystal element 20. An example is shown in Fig. 12. The conductive layer 21 has a function as a common electrode of the liquid crystal element 20, It also has a function as an electrode of the touch sensor.

[0097] Similarly, in FIG. 8A, the upper electrode is made to be a common electrode for the liquid crystal element 20. An example is shown in FIG. 13(A). The conductive layer 21 functions as a common electrode of the liquid crystal element 20, for example. It has the ability.

[0098] Similarly, in FIG. 8C, the upper electrode is made to be a common electrode for the liquid crystal element 20. An example is shown in FIG. 13(B). The conductive layer 21 functions as a common electrode of the liquid crystal element 20, for example. The contact hole has a function as a contact hole and a function as an electrode of the touch sensor.

[0099] Similarly, in FIG. 11C, the upper electrode is made to be a common electrode for the liquid crystal element 20. An example of this is shown in FIG. 14. The conductive layer 21 functions as a common electrode of the liquid crystal element 20, for example. , and functions as an electrode of the touch sensor.

[0100] 15(A), (B), and (C) are conceptual diagrams of a touch panel according to one embodiment of the present invention as viewed from above. Therefore, the parts other than the touch sensor are largely omitted. In addition, the pixel electrode 51 has a comb-like upper surface shape or an upper surface shape with slits. Although there are cases where the above-mentioned configuration is included, it is omitted here.

[0101] In the configuration shown in FIG. 15(A), the touch sensor has a sensor electrode 55 and a sensor electrode 56. Here, the sensor electrodes 55 and 56 are made of the same conductive film as the pixel electrodes 51. Alternatively, the sensor electrodes 55 and 56 may be formed in the same structure as the pixel electrodes 51. The sensor electrodes 55 arranged in the X direction are electrically connected to each other. At this time, the sensor electrodes 55 are connected by wiring 57. The sensor electrode 56 is provided extending in the Y direction. The sensor electrodes 55 and 56 are arranged in a plane parallel to the pixel electrodes. Instead of being an electrode, the electrode may be formed of the same conductive film as the common electrode.

[0102] In the configuration shown in FIG. 15(B), the common electrode 52 and the sensor electrode 55 are formed from the same conductive film. Alternatively, the common electrode 52 and the sensor electrode 55 may be provided on the same surface. Here, the common electrode 52 and the sensor electrode 55 have a strip shape extending in the X direction. 15B has a configuration in which the sensor electrodes 56 intersect with each other. It can also be said to show a floor plan.

[0103] In FIG. 15C, the common electrode 52 shown in FIG. 15B also serves as the sensor electrode 55. In other words, FIG. 15(C) shows a plan view of FIG. 7(C). can.

[0104] Although the sensor electrodes 56 are shown in the example extending in the Y direction, they may be arranged in the X direction. In Fig. 15(A), Fig. 15(B), and Fig. 15(C), Examples of the case where the electrodes extend in the X direction are shown in FIG. 16(A), FIG. 16(B), and FIG. 16(C), respectively. vinegar.

[0105] In addition, in FIG. 15(B) and FIG. 15(C), the upper electrode (the electrode closer to the liquid crystal layer, In other words, the electrode closest to the object to be detected (such as a finger or pen) is the pixel electrode, and the electrode on the bottom (the liquid crystal layer The electrode farthest from the object to be detected (i.e., the electrode farthest from the finger or pen) is the common electrode. However, one embodiment of the present invention is not limited to this. The electrode on the near side (i.e., the electrode closest to the object being detected, such as a finger or pen) is the common electrode, and the The electrode on the side farther from the liquid crystal layer, i.e., the electrode on the side farther from the object to be detected, such as a finger or pen. ) may be a pixel electrode. Such a configuration is shown in FIG. 15(B) and FIG. 5(C) are shown in Figs. 17(A) and 17(B), respectively. In addition, the common electrode 52 has a comb-like upper surface shape or an upper surface shape with slits. Although there are cases where the above-mentioned configuration is included, it is omitted here.

[0106] This concludes the explanation of the touch panel method.

[0107] [Configuration example 1] A more specific example of the configuration of the touch panel will be described below.

[0108] FIG. 18(A) is a perspective schematic diagram of a touch panel 310 according to an embodiment of the present invention. FIG. 8(B) is a perspective schematic view of FIG. 18(A). For clarity, a representative structure is shown. In FIG. 18B, only the components are shown. Also, in FIG. 18B, some components (substrate 372) are shown with dashed lines. Only the outline is shown.

[0109] The touch panel 310 has a substrate 371 and a substrate 372 disposed opposite each other.

[0110] On the substrate 371, a display unit 381, a driving circuit 382, ​​wiring 383, a driving circuit 384, etc. are provided. A conductive layer 332 is formed on the display portion 381. An FPC 373 is provided which is electrically connected to the wiring 383. (B) shows an example in which IC374 is mounted on FPC373.

[0111] In addition, on the surface side of the substrate 372 facing the substrate 371, a plurality of conductive layers 331 and a plurality of conductive layers 335, a plurality of conductive layers 341, etc. are formed. The conductive layer 341 is The conductive layers 341 are electrically connected to the substrate 37 via the connection portions 385. 1 and electrically connect it to FPC 373 provided on the

[0112] The conductive layer 335 is disposed between the two conductive layers 331. A difference in transmittance occurs between an area where the conductive layer 331 is provided and an area where the conductive layer 331 is not provided. In addition, the conductive layer 335 is preferably electrically floating. In this manner, one of the conductive layers 331 and 332 is The change in potential of one electrode can be efficiently transmitted to the other electrode, thereby improving the detection sensitivity. The conductive layer 335 may not be provided if it is not necessary.

[0113] The display unit 381 has at least a plurality of pixels. A pixel includes at least one display element. In addition, the pixel preferably includes a transistor and a display element. Representative examples of the light-emitting element include an organic EL element and a liquid crystal element. .

[0114] The driving circuit 382 is, for example, a circuit that functions as a scanning line driving circuit, a signal line driving circuit, etc. There can be.

[0115] The wiring 383 has a function of supplying signals and power to the display portion 381 and the driver circuit 382 . The signal and power are input to the outside via FPC373 or from IC374 to wiring 383. will be done.

[0116] The driver circuit 384 has a function of sequentially selecting the conductive layers 332. In the case where the touch sensor is driven by sequentially selecting the conductive layers 331 instead of the driving The circuit 384 switches between a fixed potential and a signal used for sensing and supplies it to the conductive layer 332. The touch sensor is driven by a signal supplied from IC374 or an external device. In this case, the drive circuit 384 does not need to be provided.

[0117] In addition, in Figure 18(A) and (B), a COF (Chip On Film) is mounted on the FPC373. The IC374 is implemented in the following manner. For example, an IC having a function as a scanning line driver circuit or a signal line driver circuit can be applied. The touch panel 310 includes a circuit that functions as a scanning line driving circuit and a signal line driving circuit. In some cases, a circuit that functions as a scanning line driver circuit or a signal line driver circuit is provided externally, and the FPC When a signal for driving the display unit 381 is input via the IC 373, the IC 374 The IC374 may be configured without a COG (Chip On Glass) Alternatively, the device may be directly mounted on the substrate 371 by the method such as method s).

[0118] The touch sensor is made up of a conductive layer 331 provided on a substrate 372 and a conductive layer 332 provided on a substrate 371. The capacitance formed between the conductive layer 331 and the conductive layer 332 is Using this, the touch sensor can detect.

[0119] With this configuration, the FPC connected to the touch panel 310 is located on one board side ( In this case, it can be arranged only on the substrate 371 side. As shown in FIG. 1, the touch panel 310 is provided with one FPC 373. If the display panel and the touch sensor are configured to have a function of supplying signals to each other, the configuration can be simplified. This is preferable because it allows simplification.

[0120] At this time, the IC 374 may have a function of driving a touch sensor, or Alternatively, an IC for driving the touch sensor may be provided. It may be mounted on a substrate 371 .

[0121] FIG. 19 shows a schematic top view of a touch panel 310 having a different configuration from that shown in FIG. do.

[0122] The touch panel shown in FIG. 19 has a plurality of FPCs 373a and 373b on a substrate 371. The FPC 373a is a circuit for driving the display unit 381. The FPC 373b has a function of supplying a signal. 31.

[0123] In this manner, the FPC 373a is connected to the display unit 381 of the touch panel 310 along two or more sides thereof. By disposing the display unit 381, many signals can be supplied to the touch panel 310. In the case where the display has a high resolution, a structure in which signals are supplied from two or more sides of the display unit 381 is used. By forming the wiring in this way, the parasitic capacitance between the wirings can be reduced due to the increased wiring density. In the case of a display device of this type, the length of the wiring can be shortened by adopting such a configuration. This reduces wiring resistance and suppresses effects such as signal delay.

[0124] [Cross-section example 1] Hereinafter, an example of a cross-sectional configuration of a touch panel according to one embodiment of the present invention will be described with reference to the drawings. Reveal.

[0125] [Cross-sectional configuration example 1-1] FIG. 20 is a schematic cross-sectional view of a touch panel 310. In FIG. The area including the FPC 373, the area including the drive circuit 382, ​​and the area including the display unit 381 are The cross section of the structure is shown.

[0126] The substrate 371 and the substrate 372 are bonded together by an adhesive layer 151. The liquid crystal 253 is sealed in the area surrounded by the substrate 371, the substrate 372, and the adhesive layer 151. .

[0127] On the substrate 371, the transistor 201, the transistor 203, the connection portion 206, the conductive layer 207, a conductive layer 251 and a conductive layer 252 which constitute a liquid crystal element 208, and the like are provided.

[0128] On the substrate 371, an insulating layer 211, an insulating layer 212, an insulating layer 213, an insulating layer 214, an insulating The insulating layer 211 is provided with a layer 254, a spacer 216, etc. The insulating layers 212, 213, and 214 function as gate insulating layers for the gate insulating layer of the transistor. The insulating layer 214 is provided to cover each transistor, etc. In this embodiment, the insulating layer 21 is used as an insulating layer for covering the transistors and the like. 2, insulating layer 213, and insulating layer 214 are shown, but the present invention is not limited to this. It may be four or more layers, a single layer, or two layers. If the insulating layer 214 is unnecessary, it may not be provided.

[0129] FIG. 20 shows a cross section of one subpixel as an example of the display unit 381. The pixel is a sub-pixel that exhibits red, a sub-pixel that exhibits green, or a sub-pixel that exhibits blue. For example, the sub-pixel shown in FIG. The liquid crystal display device includes a liquid crystal element 208 and a colored layer 231.

[0130] FIG. 20 shows an example of a driver circuit 382 in which a transistor 201 is provided. It shows.

[0131] In FIG. 20, as an example of a transistor 201 and a transistor 203, a channel is formed. The semiconductor layer is formed as a gate electrode 283 and a gate electrode 284, or a gate electrode 281 and a The transistor shown in FIG. 1 is a structure in which the transistor is sandwiched between a gate electrode 282 and a gate electrode 283. In the case where the gate electrode 281 and the gate electrode 282 are connected to each other, or the gate electrode 283 When the gate electrode 284 is connected to the It is possible to increase the mobility and the on-current. As a result, It is possible to manufacture a circuit that can operate. Furthermore, it is possible to reduce the area occupied by the circuit part. By applying a transistor with a large on-current, it is possible to Even if the number of wirings increases when the panel is made larger or the resolution is increased, It is possible to reduce signal delay and suppress display unevenness.

[0132] Note that the transistors in the driver circuit 382 and the transistors in the display portion 381 are The transistors in the driver circuit 382 may all have the same structure. The transistors may have the same structure, or transistors having different structures may be used in combination. The transistors in the display portion 381 may all have the same structure or may have different structures. Transistors having different structures may be used in combination.

[0133] At least one of the insulating layers 212 and 213 covering the transistors is, for example, It is preferable to use a material that does not easily diffuse impurities such as water and hydrogen. The insulating layer 212 or the insulating layer 213 can function as a barrier film. By using this structure, it is possible to effectively suppress the diffusion of impurities into the transistor from the outside. This makes it possible to realize a highly reliable touch panel.

[0134] FIG. 20 shows a liquid crystal element 208 having a FFS (Fringe Field Switching The liquid crystal element 208 is a conductive type. The conductive layer 251, the liquid crystal 253, and the conductive layer 252 are The orientation of the liquid crystal 253 can be controlled by the electric field generated therebetween.

[0135] A conductive layer 252 is provided on the insulating layer 214. In addition, an insulating layer 2 54 is provided, and a conductive layer 251 is provided on the insulating layer 254. The conductive layer 251 is an insulating The transistor is connected to the insulating layer 254 through an opening in the insulating layer 214, the insulating layer 213, and the insulating layer 212. The conductive layer 251 is electrically connected to one of the source and drain of the transistor 203. When a light-transmitting conductive material is used as the conductive layer 252, the touch panel 310 can be a transmissive type. The display device may be a liquid crystal display device.

[0136] The conductive layer 251 has a comb-like upper surface shape or an upper surface shape with slits (planar shape The conductive layer 252 is disposed so as to overlap with the conductive layer 251. In the area overlapping the colored layer 231, the conductive layer 251 is not disposed on the conductive layer 252. It has a small part.

[0137] In FIG. 20, the conductive layer 251 functions as a pixel electrode, and the conductive layer 252 functions as a common electrode. In addition, the conductive layer 25 provided on the upper layer and having a comb-tooth or slit-like upper surface shape 1 may be used as a common electrode, and the conductive layer 252 provided below may be used as a pixel electrode. In that case, the conductive layer 252 is electrically connected to one of the source and drain of the transistor 203. Simply connect it to the network.

[0138] A connection portion 206 is provided in an area near the end of the substrate 371. The connection portion 206 is The conductive layer 20 is electrically connected to the FPC 373 via the connection layer 209. 7 and a conductive layer formed by processing the same conductive film as the conductive layer 251. An example of the configuration of the connection section 206 is shown.

[0139] On the surface of the substrate 372 facing the substrate 371, a conductive layer 331, a conductive layer 341, a colored layer 231, a shielding layer 341, and a conductive layer 342 are provided. An optical layer 232, an insulating layer 255, etc. are provided.

[0140] FIG. 20 shows a case where the conductive layer 331 and the conductive layer 341 are formed on the same surface. Here, the conductive layer 331 and the conductive layer 341 are formed at the same time by processing the same conductive film. It is preferable that the conductive layer 331 and the conductive layer 341 are integral with each other. At this time, at least the portion overlapping with the display unit 381 functions as one electrode of the touch sensor. The other part can also be called a conductive layer 341. It can be said that FIG. 20 shows an example of a cross-sectional view in the case of FIG.

[0141] In the connection portion 385, the conductive layer 341 has an area that is not covered by the insulating layer 255. The layer 341 is electrically connected to the conductive layer 207 provided on the substrate 371 side via a connector 386. As a result, the FPC 373 and the conductive layer 331 are electrically connected. is formed on the same plane as the conductive layer 251 and the portion where the connector 386 contacts the conductive layer 341, 207 and a portion that is in contact with the conductive layer. .

[0142] The connector 386 may be, for example, a conductive particle. For this purpose, it is possible to use particles of organic resin or silica coated with a metal material. It is preferable to use nickel or gold as the metal material because it is possible to reduce the contact resistance. Particles coated with layers of two or more metal materials, such as nickel coated with gold, are It is preferable to use a material that is elastically deformable or plastically deformable as the connector 386. In this case, the conductive particles are preferably in a shape that is crushed in the vertical direction as shown in FIG. This may result in a connection between the connector 386 and the conductive layer electrically connected thereto. The contact area is increased, contact resistance is reduced, and problems such as poor connections are prevented. do.

[0143] It is preferable that the connector 386 is disposed so as to be covered with the adhesive layer 151. For example, After applying the paste or the like that will become 151, the connector 386 is placed on the connector 385. For example, the adhesive layer 151 is used in a display device having a solid sealing structure or a hollow sealing structure. The structure used in the periphery is adapted to dispose the connection portion 385 in the portion where the adhesive layer 151 is provided. It can be used.

[0144] The colored layer 231 and the light-shielding layer 232 are provided on the conductive layer 331. An insulating layer 255 is provided to cover the light-shielding layer 232 .

[0145] The insulating layer 255 prevents impurities contained in the colored layer 231, the light-shielding layer 232, etc. from diffusing into the liquid crystal 253. It functions as an overcoat to prevent this.

[0146] The spacer 216 is provided on the insulating layer 254, and the distance between the substrate 371 and the substrate 372 is uniform. The function of preventing the spacer 216 from approaching the substrate 372 more closely than a certain distance is shown in FIG. Although an example is shown in which the insulating layer 255 and the like are in contact with each other, they do not have to be in contact with each other. In addition, although an example in which the spacer 216 is provided on the substrate 371 side has been shown here, it is possible to For example, it may be disposed between two adjacent sub-pixels. Granular spacers may be used as the spacers 216. For the granular spacers, silica However, it is preferable to use materials having elasticity such as organic resin and rubber. At this time, the granular spacers may be crushed in the vertical direction.

[0147] In addition, in the conductive layer 251, the insulating layer 254, the insulating layer 255, etc., the surface in contact with the liquid crystal 253 An alignment film for controlling the alignment of the liquid crystal 253 may be provided on the substrate 251 .

[0148] At least the portion of the conductive layer 331 that overlaps with the colored layer 231 is made of a material having light transmitting properties. It is preferable that

[0149] In the case of a transmission type liquid crystal element 208, for example, a polarizing plate (not shown) is arranged so as to sandwich the display unit. The light from the backlight placed outside the polarizing plate is At this time, the liquid crystal 25 is turned on by a voltage applied between the conductive layer 251 and the conductive layer 252. By controlling the orientation of the 3, the optical modulation of light can be controlled. The intensity of the light emitted can be controlled. Also, the light coming from the backlight is reflected by the colored layers. 231 absorbs light outside of a specific wavelength range, and the emitted light is, for example, red, blue, Or the light may have a green color.

[0150] In addition to the polarizing plate, for example, a circular polarizing plate can be used. For example, a linear polarizing plate and a quarter-wave retardation plate can be laminated. This makes it possible to reduce viewing angle dependence.

[0151] In this embodiment, an element to which the FFS mode is applied is used as the liquid crystal element 20. Liquid crystal elements in various modes can be used. For example, VA (Ver (Twisted Nematic) mode, mode, IPS (In-Plane-Switching) mode, FFS (Fringe Field Switching) mode, ASM (Axially Symmetr ic aligned Micro-cell mode, OCB (Optically Compensated Birefringence mode, FLC (Ferrero lectric Liquid Crystal) mode, AFLC (AntiFerr Liquid crystal elements that use the OLED (OELECTRIC LIQUID CRYSTAL) mode, etc. It can be used.

[0152] In addition, the touch panel 310 is provided with a normally black type liquid crystal display device, for example, a vertical alignment ( A transmissive liquid crystal display device using a vertical alignment (VA) mode may be used. The MVA (Multi-Domain Vertical Alignment) mode mode, PVA (Patterned Vertical Alignment) mode, A SV (Advanced Super View) mode, etc. can be used.

[0153] The liquid crystal element is an element that controls the transmission or non-transmission of light by the optical modulation action of liquid crystal. The optical modulation of liquid crystals is caused by the electric field applied to the liquid crystal (horizontal electric field, vertical electric field, The liquid crystal used in the liquid crystal element is Thermotropic liquid crystal, low molecular weight liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal (PDLC:P Polymer Dispersed Liquid Crystal), Ferroelectric Liquid Crystal, Antiferroelectric liquid crystals can be used. These liquid crystal materials can be cholesteric or These phases include nematic phase, smectic phase, cubic phase, chiral nematic phase, isotropic phase, etc.

[0154] As the liquid crystal material, either a positive type liquid crystal or a negative type liquid crystal may be used. It is only necessary to use an optimum liquid crystal material depending on the mode and design to be applied.

[0155] In addition, when the in-plane switching method is adopted, liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of a cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. In order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent is used in the liquid crystal layer. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent has a short wavelength and is optically isotropic. The composition does not require alignment treatment and has low viewing angle dependency. Also, no alignment film is required. This eliminates the need for rubbing, preventing electrostatic damage caused by rubbing. This can prevent the liquid crystal display device from being damaged or broken during the manufacturing process.

[0156] In this configuration example, the capacitance formed between the conductive layer 331 and the conductive layer 252 is used to That is, the conductive layer 252 is a pair of the liquid crystal element 208. The electrode serves as both one of the electrodes of the touch sensor and one of a pair of electrodes of the touch sensor.

[0157] Here, the conductive layer 251, the conductive layer 252, or the conductive layer 331 is a layer that transmits visible light. It is preferable to use a conductive material. For example, the conductive material may include a metal oxide. For example, among the conductive materials having light transmission properties described later, metal oxides can be used. Cut.

[0158] Alternatively, the conductive layer 251, the conductive layer 252, or the conductive layer 331 may be, for example, another conductive layer or It is preferable to use a metal oxide containing the same metal element as the semiconductor layer. When an oxide semiconductor is used for the semiconductor layer of the transistor included in the filter 310, It is preferable to use a conductive oxide containing a metal element. A silicon nitride film containing hydrogen may be used. In that case, the conductive layer 252 is made of an oxide semiconductor. When using a gas containing hydrogen, the electrical conductivity can be improved by hydrogen supplied from the insulating layer 254. That is, the oxide semiconductor can be made into an N+ state.

[0159] In some cases, a fixed potential may be applied to the conductive layer 331. can block electromagnetic noise from the outside. In this case, a constant potential that does not affect the switching of the liquid crystal 253 may be supplied to the conductive layer 331. For example, a ground potential, a common potential, or any constant potential can be used. The conductive layer 331 and the conductive layer 252 may have the same potential.

[0160] In addition, by applying an appropriate potential to the conductive layer 331, the conductive layer 251 and the conductive layer 252 are The direction of the electric field (direction of the electric field lines) generated between the In this way, the electric field can be oriented in a direction substantially perpendicular to the thickness (horizontal direction). This suppresses alignment defects in the liquid crystal 253 and prevents problems such as light leakage. This can be done.

[0161] Here, a substrate 372 is placed above the substrate 372 and directly touched by a sensing object such as a finger or a stylus. In this case, a polarizing plate or a circular polarizing plate may be provided between the substrate 372 and the substrate. In that case, a protective layer (ceramic coat, etc.) is provided on the substrate. The protective layer is preferably made of, for example, silicon oxide, aluminum oxide, or yttrium oxide. Alternatively, inorganic insulating materials such as yttria-stabilized zirconia (YSZ) can be used. The substrate may be made of tempered glass. The tempered glass may be made of a material such as glass that is tempered by an ion exchange method or an air-cooling method. The material is subjected to physical or chemical treatment and compressive stress is applied to the surface. It is possible.

[0162] [About each component] Each of the above components will be described below.

[0163] {substrate} The substrate of the touch panel can be made of a material having a flat surface. The substrate on the side from which the light is extracted is made of a material that transmits the light. For example, glass or quartz is used. Materials such as ceramic, sapphire, and organic resin can be used. Single crystal semiconductor substrates made of silicon carbide, polycrystalline semiconductor substrates, silicon germanium, etc. It is also possible to apply compound semiconductor substrates, SOI substrates, etc., and semiconductors can be formed on these substrates. A substrate provided with a semiconductor element may be used as the substrate.

[0164] In addition, when using a glass substrate as the substrate, the sixth generation (1500 mm × 1850 mm ), 7th generation (1870mm x 2200mm), 8th generation (2200mm x 2400mm ), 9th generation (2400mm x 2800mm), 10th generation (2950mm x 3400m By using a large-area substrate such as a GaN-based LCD, a large-sized display device can be manufactured. A flexible substrate is used as the plate, and transistors, capacitors, etc. are formed directly on the flexible substrate. This is also fine.

[0165] By using a thin substrate, the touch panel can be made lighter and thinner. Furthermore, by using a substrate having a thickness sufficient to provide flexibility, a flexible touch panel can be obtained. This can be achieved.

[0166] Examples of glass include non-alkali glass, barium borosilicate glass, and aluminophore glass. Usable materials include silicate glass.

[0167] Examples of materials having flexibility and transparency to visible light include materials having flexibility. Thickness of glass, polyethylene terephthalate (PET), polyethylene naphthalate Polyester resins such as (PEN), polyacrylonitrile resins, polyimide resins, methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PE S) Resin, polyamide resin, cycloolefin resin, polystyrene resin, polyamide imide resin, polyvinyl chloride resin, polytetrafluoroethylene (PTFE) resin, etc. In particular, it is preferable to use a material with a low thermal expansion coefficient, such as polyamide-imide. Resin, polyimide resin, PET, etc. can be suitably used. Uses substrates impregnated with resin or substrates with inorganic fillers mixed into organic resin to reduce the coefficient of thermal expansion Since the substrate using such a material is light in weight, The touch panel can also be made lighter.

[0168] In addition, the substrate on the side from which light is not extracted does not need to have light-transmitting properties. In addition to the above substrates, metal substrates using metal or alloy materials, ceramic substrates, or semiconductor substrates are also available. Metallic and alloy materials have high thermal conductivity, and the entire sealing substrate can be heated. Since the heat can be easily conducted, local temperature rise of the touch panel can be suppressed, which is preferable. In order to obtain flexibility and bendability, the thickness of the metal substrate should be between 10 μm and 200 μm. is preferable, and the thickness is more preferably 20 μm or more and 50 μm or less.

[0169] The material constituting the metal substrate is not particularly limited, but examples thereof include aluminum, copper, and nickel. Nickel, or an alloy of metals such as aluminum alloy or stainless steel is preferably used. This can be done.

[0170] In addition, the surface of a conductive substrate can be oxidized or an insulating film can be formed on the surface to provide an insulating film. A substrate that has been subjected to a treatment may be used. For example, a coating method such as a spin coating method or a dip method may be used. The insulating film may be formed by using an electrodeposition method, a vapor deposition method, a sputtering method, or the like. In addition to leaving it in an atmosphere or heating it, an oxide film is formed on the surface of the substrate by anodizing or other methods. It may be possible to do so.

[0171] As for the flexible substrate, the layer using the above-mentioned material is preferably used to protect the surface of the touch panel from scratches, etc. Hard coat layers (e.g., silicon nitride layers) that protect the material from the pressure and layers made of materials that can disperse pressure The laminate may be formed by laminating a layer (e.g., an aramid resin layer, etc.). In order to prevent the deterioration of the life of the display element due to the above-mentioned problems, silicon nitride film and silicon oxynitride film are used. and permeable films containing nitrogen and silicon such as aluminum nitride films. It may have an insulating film with low water resistance.

[0172] The substrate may be formed by laminating a plurality of layers. In particular, the substrate may have a glass layer. This improves the barrier properties against water and oxygen, making it possible to create a highly reliable touch panel. do.

[0173] For example, a substrate having a glass layer, an adhesive layer, and an organic resin layer laminated thereon from the side closest to the display element is used. The thickness of the glass layer is preferably 20 μm or more and 200 μm or less. The thickness of the glass layer is 25 μm or more and 100 μm or less. It is possible to simultaneously achieve high barrier properties and flexibility. The thickness of the organic resin layer is 10 μm. The thickness of such an organic resin is set to be 200 μm or more, and preferably 20 μm or more and 50 μm or less. By providing this layer, it is possible to suppress breakage and cracks in the glass layer and improve the mechanical strength. By applying such a composite material of glass material and organic resin to a substrate, This makes it possible to produce a highly reliable and flexible touch panel.

[0174] {Transistor} The transistor includes a conductive layer functioning as a gate electrode, a semiconductor layer, and a A conductive layer that functions as a drain electrode and a conductive layer that functions as a gate insulating layer. The above describes the case where a bottom-gate transistor is used. is.

[0175] Note that there is no particular limitation on the structure of a transistor included in a touch panel of one embodiment of the present invention. For example, it may be a planar type transistor or a staggered type transistor. Alternatively, a top-gate or bottom-gate transistor may be used. Alternatively, the transistor may have a gate electrode above and below the channel. The semiconductor material used for the transistor is not particularly limited, and for example, Examples of the semiconductor include nitride semiconductors, silicon, and germanium.

[0176] The crystallinity of the semiconductor material used in the transistor is not particularly limited. A semiconductor having crystallinity (a microcrystalline semiconductor, a polycrystalline semiconductor, a single crystal semiconductor, or a semiconductor having a partially crystalline region) If a semiconductor having crystallinity is used, the This is preferable because it is possible to suppress deterioration of the resistor characteristics.

[0177] In addition, the semiconductor material used in the transistor is, for example, a Group 14 element, a compound semiconductor, or the like. A conductor or an oxide semiconductor can be used for the semiconductor layer. A conductor, a semiconductor containing gallium arsenide, an oxide semiconductor containing indium, or the like can be used.

[0178] In particular, an oxide semiconductor can be used as a semiconductor in which a channel of a transistor is formed. It is particularly preferable to use an oxide semiconductor having a larger band gap than silicon. A semiconductor material with a wider band gap and lower carrier density than silicon is preferable. The use of such a compound is preferable because it can reduce the current in the off state of the transistor.

[0179] For example, the oxide semiconductor may contain at least indium (In) or zinc (Zn It is preferable that the oxide contains In-M-Zn (wherein M is Al, Ti, or G). a, Ge, Y, Zr, Sn, La, Ce, Hf or Nd (metals such as Includes.

[0180] In particular, the semiconductor layer has a plurality of crystal parts, and the crystal parts have a c-axis aligned with a surface on which the semiconductor layer is formed. Or, the crystals are oriented approximately perpendicular to the upper surface of the semiconductor layer, and grain boundaries are observed between adjacent crystal parts. It is preferable to use an oxide semiconductor film that cannot be formed by the above-mentioned method.

[0181] Such an oxide semiconductor does not have crystal grain boundaries, so that when the display panel is curved, The occurrence of cracks in the oxide semiconductor film due to stress is suppressed. Such oxide semiconductors are suitable for use in touch panels that are flexible and can be curved. It can be used.

[0182] In addition, by using such a crystalline oxide semiconductor for the semiconductor layer, This suppresses fluctuations in the capacitance, thereby achieving a highly reliable transistor.

[0183] In addition, a transistor using an oxide semiconductor having a larger band gap than silicon is Due to its low off-state current, the charge stored in the capacitor connected in series with the transistor can be discharged for a long period of time. By applying such a transistor to a pixel, It is also possible to stop the driving circuit while maintaining the grayscale of the image displayed in each display area. As a result, a display device with extremely reduced power consumption can be realized.

[0184] The semiconductor layer may be, for example, at least indium (In), zinc (Zn) and M (Al, Ti In-M-Zn oxide containing metals such as Ga, Y, Zr, La, Ce, Sn or Hf In addition, the electric field of a transistor using the oxide semiconductor is preferably It is preferable to include a stabilizer therewith to reduce variation in thermal properties.

[0185] The stabilizer includes the metals listed above under M, such as gallium (Ga), sulphuric acid (SA), and gallium (Ga). Sn, Hf, Al, or Zr Other stabilizers include the lanthanide lanthanum (La). , Cerium (Ce), Praseodymium (Pr), Neodymium (Nd), Samarium (Sm), Europium (Eu), Gadolinium (Gd), Terbium (Tb), Dysprosium ( Dy), Holmium (Ho), Erbium (Er), Thulium (Tm), Ytterbium (Yb), lutetium (Lu), etc.

[0186] Examples of oxide semiconductors constituting the semiconductor layer include In-Ga-Zn oxides, In- Al-Zn oxide, In-Sn-Zn oxide, In-Hf-Zn oxide, In-L a-Zn oxide, In-Ce-Zn oxide, In-Pr-Zn oxide, In-Nd -Zn oxide, In-Sm-Zn oxide, In-Eu-Zn oxide, In-Gd- Zn-based oxide, In-Tb-Zn-based oxide, In-Dy-Zn-based oxide, In-Ho-Z n-type oxides, In-Er-Zn-type oxides, In-Tm-Zn-type oxides, In-Yb-Zn In-Lu-Zn ​​oxide, In-Sn-Ga-Zn oxide, In-Hf- Ga-Zn oxide, In-Al-Ga-Zn oxide, In-Sn-Al-Zn oxide In-Sn-Hf-Zn oxide, In-Hf-Al-Zn oxide can be used. can.

[0187] In this case, the In-Ga-Zn oxide is an oxide having In, Ga, and Zn as main components. The ratio of In, Ga, and Zn does not matter. Metal elements other than n may be present.

[0188] The semiconductor layer and the conductive layer may contain the same metal element among the above oxides. By using the same metal element for the semiconductor layer and the conductive layer, the manufacturing cost can be reduced. For example, the manufacturing cost can be reduced by using metal oxide targets with the same metal composition. In addition, by using a metal oxide target with the same metal composition, The etching gas or the etching solution is commonly used for processing the semiconductor layer and the conductive layer. However, even if the semiconductor layer and the conductive layer contain the same metal element, the composition may be different. For example, during the manufacturing process of a transistor and a capacitor, In some cases, elements are removed, resulting in a different metal composition.

[0189] When the semiconductor layer is an In-M-Zn oxide, In and M, excluding Zn and O, The atomic ratio of In is preferably In when the sum of In and M is 100 atomic %. is higher than 25 atomic %, M is less than 75 atomic %, and more preferably In is 34 atomic% or higher and M less than 66 atomic%.

[0190] The semiconductor layer has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably In this way, the energy gap of oxide semiconductors is wide. This makes it possible to reduce the off-state current of the transistor.

[0191] The thickness of the semiconductor layer is 3 nm or more and 200 nm or less, preferably 3 nm or more and 100 nm or less. and more preferably, from 3 nm to 50 nm.

[0192] The semiconductor layer is In-M-Zn oxide (M is Al, Ti, Ga, Ge, Y, Zr, Sn, L a, Ce, Hf or Nd), the spatula used to deposit the In-M-Zn oxide film The atomic ratio of the metal elements in the ion implantation target preferably satisfies In≧M and Zn≧M. The atomic ratio of the metal elements in such a sputtering target is In:M:Z. n=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=3:1:2, 4: The atomic ratio of the semiconductor layers to be formed is preferably 2:3. The atomic ratio of metal elements contained in a sputtering target varies by ±40%. Includes.

[0193] For the semiconductor layer, an oxide semiconductor film having a low carrier density is used. For example, , the carrier density is 1×10 17 pieces / cm 3 Less than or equal to 1×1015 pieces / cm 3 below , and more preferably 1×10 13 pieces / cm 3 Less than or equal to 1×10 11 pieces / cm 3 The following oxide semiconductor film is used.

[0194] In addition, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use a material with an appropriate composition according to the required properties (e.g., the resultant mobility, threshold voltage, etc.). In order to obtain the semiconductor characteristics of a transistor, the carrier density, impurity concentration, and defect density of the semiconductor layer are determined. It is preferable to appropriately set the density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. stomach.

[0195] When silicon or carbon, which is one of the group 14 elements, is included in the semiconductor layer, This causes oxygen vacancies in the semiconductor layer, resulting in n-type conductivity. The carbon concentration (obtained by secondary ion mass spectrometry) was set to 2 × 10 18 atoms / cm 3 Less than or equal to 2×10 17 atoms / cm 3 The following applies.

[0196] In addition, in the semiconductor layer, an alkali metal or alkali metal compound obtained by secondary ion mass spectrometry is The concentration of alkaline earth metals is increased by 1×10 18 atoms / cm 3 Less than or equal to 2×10 1 6 atoms / cm 3 Alkali metals and alkaline earth metals are oxide semiconductors. When the electrons combine with each other, carriers may be generated, increasing the off-state current of the transistor. For this reason, it is necessary to reduce the concentration of alkali metals or alkaline earth metals in the semiconductor layer. It is preferable that

[0197] In addition, when nitrogen is contained in the semiconductor layer, electrons that act as carriers are generated, and the carrier density As a result, transistors using oxide semiconductors containing nitrogen Therefore, in the oxide semiconductor film, nitrogen is It is preferable that the amount of the ion concentration is as small as possible. For example, the amount of the ion concentration is preferably as small as possible. The nitrogen concentration is 5×10 18 atoms / cm 3 It is preferable to do the following:

[0198] The semiconductor layer may have a non-single crystal structure, for example. CAAC-OS(C Axis Aligned-Crystalline Oxide Semiconductor), polycrystalline structure, microcrystalline structure (described later), or amorphous structure Among non-single crystal structures, the amorphous structure has the highest defect level density, and CAAC-OS has the lowest defect state density.

[0199] The semiconductor layer may have, for example, an amorphous structure. The molecular arrangement is disordered and has no crystalline components. Alternatively, an oxide film with an amorphous structure is, for example, It has a completely amorphous structure and does not have any crystalline parts.

[0200] In addition, the semiconductor layer may have an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAA The film may be a mixed film having two or more types of regions, i.e., a C-OS region and a single crystal structure region. The composite film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC- It may have a layered structure of two or more regions of either an OS region or a single crystal structure region. .

[0201] Alternatively, silicon is preferably used as a semiconductor in which a channel of a transistor is formed. Although amorphous silicon may be used as silicon, silicon having crystallinity is particularly preferred. It is preferable to use silicon. For example, microcrystalline silicon, polycrystalline silicon, single crystal silicon, etc. In particular, polycrystalline silicon has a lower temperature than single crystal silicon. It has high field effect mobility and high reliability compared to amorphous silicon. By applying such a polycrystalline semiconductor to the pixels, the aperture ratio of the pixels can be improved. Even when the pixels are extremely fine, the gate drive circuit and the source drive circuit can be This makes it possible to form the circuits and pixels on the same substrate, reducing the number of parts that make up electronic devices. It is possible.

[0202] {Conductive layer} In addition to the gate, source, and drain of the transistor, the various wiring that makes up the touch panel Materials that can be used for conductive layers such as wires and electrodes include aluminum, titanium, Chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, The material is a single-layer or multi-layer structure made of metal such as tungsten or an alloy that contains this metal as its main component. For example, a single layer structure of aluminum film containing silicon, aluminum on titanium film, A two-layer structure in which an aluminum film is laminated on a tungsten film; a two-layer structure in which an aluminum film is laminated on a tungsten film; - Two-layer structure with copper film laminated on magnesium-aluminum alloy film, copper film laminated on titanium film Two-layer structure with copper film laminated on tungsten film, two-layer structure with titanium film or titanium nitride film laminated on tungsten film A titanium film and an aluminum film or a copper film are laminated on the titanium film or the titanium nitride film. A three-layer structure is formed by forming a titanium film or titanium nitride film on the top of the molybdenum film or The molybdenum nitride film is laminated with an aluminum film on the molybdenum film or the molybdenum nitride film. A molybdenum film or a copper film is laminated on the copper film, and a molybdenum film or a molybdenum nitride film is further formed on the copper film. Transparent conductive materials containing indium oxide, tin oxide, or zinc oxide are also used. In addition, when copper containing manganese is used, the shape can be easily controlled by etching. This is preferable because it increases the

[0203] Examples of the conductive material having a light-transmitting property include indium oxide, indium tin oxide, and indium tin oxide. Conductive oxides such as indium zinc oxide, zinc oxide, zinc oxide doped with gallium, or Graphene can be used. Alternatively, gold, silver, platinum, magnesium, nickel, tin, etc. such as tin, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium. Metallic materials and alloy materials containing the metallic materials can be used. Alternatively, a metal material, an alloy material (or a combination thereof) may be used. In the case of using these nitrides, it is sufficient to make them thin enough to have light transmission. A laminated film of a material can be used as the conductive layer. For example, a silver-magnesium alloy and an insulator can be used. It is preferable to use a laminated film of dilute tin oxide or the like, since the electrical conductivity can be increased.

[0204] Alternatively, the conductive layer is preferably made of an oxide semiconductor similar to that of the semiconductor layer. When the conductive layer is formed, the conductive layer exhibits a lower electrical resistance than the region in which the channel of the semiconductor layer is formed. , is preferably formed.

[0205] For example, such a conductive layer may be used as a conductive layer that functions as a second gate electrode of a transistor. Alternatively, the present invention can be applied to other conductive layers having light-transmitting properties.

[0206] {Method for controlling resistivity of oxide semiconductor} The oxide semiconductor film that can be used for the semiconductor layer and the conductive layer has oxygen vacancies and / or is a semiconductor material whose resistivity can be controlled by the concentration of impurities such as hydrogen and water in the film. Therefore, a process that increases oxygen deficiency and / or impurity concentration in the semiconductor layer and the conductive layer, or by selecting a treatment that reduces oxygen vacancies and / or impurity concentrations, respectively. The resistivity of the oxide semiconductor film can be controlled.

[0207] Specifically, a plasma treatment is performed on an oxide semiconductor film used for a conductive layer, and the oxide semiconductor Increase in oxygen vacancies in the film and / or impurities such as hydrogen and water in the oxide semiconductor film By increasing the amount of the fluorine atom, an oxide semiconductor film having a high carrier density and a low resistivity can be obtained. In addition, an insulating film containing hydrogen may be formed in contact with the oxide semiconductor film. By diffusing hydrogen from the insulating film to the oxide semiconductor film, the carrier density is increased and the resistivity is reduced. It is possible to provide an oxide semiconductor film with low thermal conductivity.

[0208] On the other hand, the semiconductor layer that functions as the channel region of the transistor is in contact with the insulating film that contains hydrogen. At least one of the insulating films in contact with the semiconductor layer contains oxygen. Then, by applying an insulating film capable of releasing oxygen, oxygen can be supplied to the semiconductor layer. The semiconductor layer to which oxygen is supplied has resistance because oxygen vacancies in the film or at the interface are filled. The insulating film capable of releasing oxygen can be an oxide semiconductor film having high resistivity. For example, a silicon oxide film or a silicon oxynitride film can be used.

[0209] In order to obtain an oxide semiconductor film with low resistivity, an ion implantation method, an ion doping method, etc. Using techniques such as plasma immersion ion implantation, hydrogen, boron, and lithium are implanted. Nitrogen or nitrogen may be implanted into the oxide semiconductor film.

[0210] In order to obtain an oxide semiconductor film with low resistivity, the oxide semiconductor film is subjected to plasma treatment. For example, the plasma treatment may be performed using a rare gas (He, Ne, A Plasma using gas containing one or more of the following: r, Kr, Xe), hydrogen, and nitrogen. More specifically, plasma treatment in an Ar atmosphere and a mixture of Ar and hydrogen are used. Plasma treatment in a mixed gas atmosphere, plasma treatment in an ammonia atmosphere, and plasma treatment in an Ar and ammonia atmosphere. Plasma treatment in a mixed gas atmosphere of nitric acid or in a nitrogen atmosphere. Some examples include:

[0211] By the above plasma treatment, the oxide semiconductor film is formed into a lattice from which oxygen has been desorbed (or This creates oxygen vacancies in the area (the area separated from the surface). These oxygen vacancies may be a cause of carrier generation. In addition, in the vicinity of the oxide semiconductor film, more specifically, in the lower side or the upper side of the oxide semiconductor film, When hydrogen is supplied from the insulating film adjacent to the side, the oxygen vacancies are combined with the hydrogen, forming a carrier In some cases, electrons that are rearranged may be generated.

[0212] On the other hand, an oxide semiconductor film in which oxygen vacancies are filled and the hydrogen concentration is reduced is highly purified and intrinsic. Alternatively, it can be said that the oxide semiconductor film is substantially highly purified and intrinsic. The carrier density of the oxide semiconductor film is 8×10 11 pieces / cm 3 Less than 1 x 10 1 1 / cm 3 less than 1×10 10 pieces / cm 3 It means that the purity is less than 100%. A highly pure or substantially highly pure intrinsic oxide semiconductor film has a small carrier generation source. In addition, the carrier density can be reduced. Since an oxide semiconductor film has a low density of defect states, the density of trap states can be reduced. Cut.

[0213] In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a significantly low off-state current. Very small, with a channel width of 1×10 6 Even if the device has a channel length of 10 μm, When the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1V to 10V, The current is below the measurement limit of the semiconductor parameter analyzer, i.e., 1×10 -13 A and below Therefore, the above-mentioned high purity intrinsic or substantially high purity intrinsic A transistor using a semiconductor layer including an oxide semiconductor film, which is electrically conductive, for a channel region is This results in a highly reliable transistor with minimal fluctuation in characteristics.

[0214] As an insulating film which is in contact with the oxide semiconductor film used as the conductive layer, for example, an insulating film containing hydrogen In other words, an insulating film capable of releasing hydrogen, typically a silicon nitride film, is used. As an insulating film capable of releasing hydrogen, The hydrogen concentration in the film is 1×10 22 atoms / cm 3 It is preferable that the above is the case. By forming such an insulating film in contact with the conductive layer, hydrogen can be effectively contained in the conductive layer. In this way, by changing the configuration of the insulating film in contact with the semiconductor layer and the conductive layer, In this way, the resistivity of the oxide semiconductor film can be controlled.

[0215] Hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. In this case, oxygen vacancies are formed in the lattice from which oxygen has been desorbed (or in the portion from which oxygen has been desorbed). When hydrogen enters the electron carrier, it can generate electrons. When it bonds with oxygen, which bonds with a metal atom, it may generate electrons, which act as carriers. Therefore, the conductive layer provided in contact with the insulating film containing hydrogen has a higher hydrogen content than the semiconductor layer. An oxide semiconductor film with high carrier density is obtained.

[0216] The semiconductor layer in which the transistor channel region is formed has as little hydrogen as possible. Specifically, it is preferable to use secondary ion mass spectrometry (SIMS) in the semiconductor layer. Water obtained by Secondary Ion Mass Spectrometry The elementary concentration is 2×10 20 atoms / cm 3 Less than or equal to 5×10 19 atoms / cm 3 Less than or equal to 1×10 19 atoms / cm 3 Below, 5 x 10 18 ato ms / cm 3 Less than 1 x 10 18 atoms / cm 3 Less than or equal to 5, more preferably ×10 17 atoms / cm 3 Less than 1×10, more preferably 16 atoms / cm 3 The following applies.

[0217] On the other hand, the conductive layer has a higher hydrogen concentration and / or oxygen vacancy amount and a lower resistivity than the semiconductor layer. The hydrogen concentration in the conductive layer is 8×10 19 atoms / cm 3 More than 1×10 20 atoms / cm 3 More preferably, 5×10 20 a toms / cm 3 The hydrogen concentration in the conductive layer is higher than that in the semiconductor layer. The resistivity of the conductive layer is at least 2 times, preferably at least 10 times, that of the semiconductor layer. 1×10 -8 1×10 times more -1 It is preferable that the ratio is less than 1×10 -3 Ωcm or more 1×10 4 Ωcm, and more preferably a resistivity of 1×10 -3 Ωcm or more 1×10 -1 It is preferable that the resistivity is less than Ωcm.

[0218] {insulating layer} Examples of insulating materials that can be used for each insulating layer, overcoat, spacer, etc. include For example, resins such as acrylic and epoxy, resins with siloxane bonds, silicon oxide, Inorganic insulation such as silicon oxynitride, silicon oxynitride, silicon nitride, and aluminum oxide Materials can also be used.

[0219] {adhesive layer} The adhesive layer is made of a hardening resin such as a thermosetting resin, a photocurable resin, or a two-liquid mixed hardening resin. For example, resins such as acrylic, urethane, and epoxy, or silicone can be used. Resins such as resins having siloxane bonds, such as corn, can be used.

[0220] {Connection Layer} The connection layer is made of anisotropic conductive film (ACF). conductive film) and anisotropic conductive paste (ACP) Conductive Paste) can be used.

[0221] {Colored layer} Materials that can be used for the coloring layer include metal materials, resin materials, pigments, and dyes. Examples of such materials include resin materials.

[0222] The above is a description of each component.

[0223] [Cross-sectional configuration example 1-2] FIG. 21 shows an example of a cross-sectional configuration of a touch panel having a partly different configuration from that described above. Note that we will omit the explanation of the parts that overlap with the above and will only explain the differences.

[0224] 21 shows an example in which the colored layer 231 is disposed on the substrate 371 side. In this case, the colored layer 231 is provided in contact with the upper surface of the insulating layer 213. An insulating layer 214 is provided to function as a planarizing layer.

[0225] By adopting such a configuration, the configuration of the substrate 372 can be further simplified. For example, in FIG. 21, only the conductive layer 331 and the conductive layer 341 are formed on the substrate 372. If necessary, an alignment film or the like may be provided on the substrate 372.

[0226] [Cross-sectional configuration example 1-3] In FIG. 22, the transistor 201 and the transistor 203 in FIG. 1 shows an example in which a gate-type transistor is applied.

[0227] Each transistor has a semiconductor layer, and a gate electrode is provided on the semiconductor layer via an insulating layer 211. The semiconductor layer may have a region with a low resistance. The region may be Acts as a source or drain.

[0228] The source and drain electrodes of the transistor are provided on the insulating layer 213, and the insulating layer 2 13, the insulating layer 212, the insulating layer 211 through the openings provided, the semiconductor layer is made to have a low resistance. The area is electrically connected to the

[0229] The region of the semiconductor layer with a lower resistance is, for example, a region where a transistor channel is formed. There are regions that contain more impurities, regions with high carrier concentration, regions with low crystallinity, etc. The impurities that have the effect of increasing the electrical conductivity can be selected from the group consisting of the semiconductor layer, ... and the semiconductor layer. Although it depends on the material, typically elements that can provide n-type conductivity, such as phosphorus, and boron, etc. Elements that can impart p-type conductivity, rare gases such as helium, neon, and argon, as well as hydrogen, Lithium, sodium, magnesium, aluminum, nitrogen, fluorine, potassium, calcium Other examples include titanium, iron, nickel, copper, zinc, silver, indium, and sulphur. For example, regions 262 and 263 function as impurities that affect the conductivity of the semiconductor. The region 63 contains more of the above impurities than the region in which the channel of the transistor is formed.

[0230] [Cross-sectional configuration example 1-4] FIG. 23 shows an example in which the position of the conductive layer 252 is different from that in FIG. 20 and the like. Specifically, an example of a configuration in which the conductive layer 252 is located between the insulating layer 212 and the insulating layer 213 is shown. There are.

[0231] For example, the conductive layer 252 can be formed using the above-mentioned light-transmitting conductive material. .

[0232] For example, the conductive layer 252 may include an oxide semiconductor having a low resistance. In particular, it is preferable that the semiconductor layer of the transistor of the touch panel 310 is oxidized. When a compound semiconductor is used, it is preferable to use an oxide semiconductor having a lower resistivity than the compound semiconductor. .

[0233] For example, the resistance of the conductive layer 252 can be reduced by the above-mentioned method for controlling the resistivity of an oxide semiconductor. It is possible to do so.

[0234] In addition, the insulating layer 213 covering the conductive layer 252 is formed of the above-mentioned insulating material containing a large amount of hydrogen. It is preferred to use an edge layer, particularly one that includes an insulating film that includes silicon nitride.

[0235] [Cross-section example 2] Below, we will explain the cross-sectional configuration example of a touch panel that has a partly different configuration from the above cross-sectional configuration example. explain.

[0236] [Cross-sectional configuration example 2-1] FIG. 24 shows the above-mentioned cross section in that the conductive layer 331 and the conductive layer 341 are disposed on the substrate 371 side. This is different from the surface configuration example.

[0237] The conductive layer 331 and the conductive layer 341 are provided on a substrate 371. An insulating layer 217 is provided to cover the conductive layer 341. A transistor 201, a transistor 203, etc. are provided.

[0238] In addition, in the connection portion 385, the conductive layer 341 and the insulating layer 217 are connected through an opening. It is electrically connected to the conductive layer 207 .

[0239] Here, the capacitance generated between the conductive layer 331 and the conductive layer 252 is used to detect the touch operation. It can be put out.

[0240] With this configuration, the configuration of the substrate 372 can be simplified.

[0241] At this time, the conductive layer 331 and the conductive layer 341 are formed using a conductive material with high heat resistance. In addition, when a material having a light-shielding property such as a metal is used as the conductive layer 331, It is preferable to provide an opening in the portion overlapping with the colored layer 231 as shown in FIG.

[0242] As shown in FIG. 24, the conductive layer 331 is arranged so as not to overlap the transistor 203 and the like. Alternatively, an opening is preferably provided in a portion of the conductive layer 331 that overlaps with the transistor 203 and the like. In this way, the potential change of the conductive layer 331 can be prevented. As a result, the transistor 203 and the like can be prevented from malfunctioning.

[0243] [Cross-sectional configuration example 2-2] FIG. 25 shows the structure shown in FIG. 24, in which the colored layer 231 is disposed on the substrate 371 side in the same manner as in FIG. An example is shown below.

[0244] In this manner, the conductive layer 331, the conductive layer 341, and the colored layer 231 are provided on the substrate 371 side. In this way, it is possible to form a structure in which nothing is formed on the substrate 372. An alignment film may be provided in a region of the substrate 371 that is in contact with the liquid crystal layer.

[0245] [Configuration example 2] Below, drawings are shown of examples of touch panel configurations that are partially different from the above configuration example 1. Please refer to the following for explanation.

[0246] The touch panel according to one embodiment of the present invention described below includes a pair of conductive electrodes constituting a touch sensor. At least one of the layers is a conductive film that is the same as at least one of the pair of conductive layers of the liquid crystal element. At least one of the pair of conductive layers constituting the touch sensor and the liquid crystal element are formed. At least one of the pair of conductive layers is disposed on the same surface. At least one of the pair of conductive layers constituting the liquid crystal element is a pair of conductive layers included in the liquid crystal element. In other words, one conductive film is provided to serve as a pair of conductive films constituting a touch sensor. At least one of the pair of conductive layers of the liquid crystal element This simplifies the touch panel manufacturing process. This can further reduce the manufacturing cost.

[0247] [Configuration Example 2-1] FIG. 26 shows a pair of conductive layers functioning as electrodes of a liquid crystal element and a touch sensor. FIG. 1 is a top view schematic diagram showing an example of a layout of paired conductive layers, in which the FFS mode is applied. The following description will be given taking the liquid crystal element as an example.

[0248] FIG. 27 is a cross-sectional view of a portion corresponding to the section line X1-X2 in FIG. 26 and 27 correspond to FIG 8(A).

[0249] The conductive layers 401 have island shapes and are arranged in a matrix in the X and Y directions. A slit is provided in the conductive layer 401. The conductive layer 402 overlaps each conductive layer 401. Here, the conductive layer 401 functions as a pixel electrode, and the conductive layer 402 In this example, the upper conductive layer 401 serves as a pixel electrode, and the lower The case where the conductive layer 402 is a common electrode will be described. However, the relationship may be reversed. good.

[0250] The conductive layer 411a and the conductive layer 411b extending in the Y direction are adjacent to each other. It is arranged so as to be located between layers 401 .

[0251] The conductive layer 412a extending in the X direction is composed of a conductive layer 404 and a conductive layer 405. The conductive layer 404 has a strip shape with its long side parallel to the X direction. The conductive layer 405 is provided between the conductive layer 411a and the conductive layer 411b. The conductive layer 411a and the conductive layer 411b are overlapped with each other. The conductive layer 404 is electrically connected to the conductive layer 405 through a contact hole. The layer 411a and the conductive layer 411b overlap with each other via an insulating layer (not shown). The conductive layer 405 may be disposed so as to extend in the X direction, as shown in FIG. In this way, the wiring resistance of the conductive layer 404 can be substantially reduced.

[0252] In addition, in FIG. 26 or FIG. 28, the conductive layer 411a and the conductive layer 411b are The conductive layer 412a and the conductive layer 412b are arranged so as to extend in the Y direction. It may be placed.

[0253] Here, the conductive layer 411a, the conductive layer 411b, the conductive layer 404, and the conductive layer 401 are Each of the conductive layers is formed by processing the same conductive film. The conductive layer 411b, the conductive layer 404, and the conductive layer 401 are disposed on the same plane. become.

[0254] Here, the conductive layer 405 is the source electrode and the drain electrode 285 of the transistor. In this case, the same conductive film as that of the conductive layer 405 is formed by processing the gate electrode. Even if a conductive electrode or the like is arranged, the layout can be done without any problems. The layer 405 is overlapped with a gate electrode and a film formed by processing the same conductive film as the gate electrode. However, one embodiment of the present invention is not limited thereto, and the transistors can be arranged in the same manner. The same conductive film as the gate electrode 281, the semiconductor layer, or other conductive layers is processed to form a conductive layer. 405 can be formed.

[0255] As an example, the conductive layer 405 is formed by processing the same conductive film as the gate electrode. In this case, the source electrode and the drain electrode 285 are formed on the conductive layer 405. Therefore, the conductive layer 405 can be laid out without any problem. , the source electrode and the drain electrode 285, or the same conductor as the source electrode and the drain electrode 285 The conductive film can be overlapped or crossed with the film formed by processing the conductive film. A source signal line (a wiring having a function of transmitting a video signal to each pixel) and a conductive layer 411a or Therefore, the layer of the conductive layer 401 can be arranged so as to overlap the conductive layer 411b. In other words, the aperture ratio can be increased.

[0256] Alternatively, the conductive layer 405 may be formed by processing the same conductive film as the conductive layer 402, as shown in FIG. In this case, the source electrode and drain electrode 285 and the gate electrode 286 are disposed under the conductive layer 405. Even if a conductive electrode or the like is arranged, the layout can be done without any problems. The layer 405 may be a gate electrode, a source electrode and a drain electrode 285, or the same layer as the gate electrode. A film formed by processing a conductive film or the same conductive film as the source electrode and drain electrode 285 is used. It can be placed overlapping or crossing with the processed membrane. A signal line (a wiring having a function of transmitting a video signal to each pixel) and a conductive layer 411a or a conductive The conductive layer 401 and the layer 411b can be disposed so as to overlap each other. In other words, the aperture ratio can be increased. A signal line (a wiring having a function of transmitting a signal for selecting each pixel) and a conductive layer 404 or a conductive Therefore, the layout area of ​​the conductive layer 401 can be reduced by In other words, the aperture ratio can be increased.

[0257] In addition, in FIG. 26 or FIG. 28, the conductive layer 411a and the conductive layer 411b are The conductive layer 412a and the conductive layer 412b are arranged so as to extend in the Y direction. When the conductive layers 412a and 412b are arranged, the conductive layers 412a and 412b are arranged in different directions. The conductive layer 411a is arranged to overlap the source signal line, not the gate signal line. In addition, the conductive layer 411b is arranged to overlap the gate signal line, not the source signal line. It will be placed in place.

[0258] In addition, when it is desired to reduce the resistance of the conductive layer 411a, the conductive layer 411b, and the conductive layer 404, In the above, a low-resistance layer is provided on or under the conductive layer 411a, the conductive layer 411b, and the conductive layer 404. Conductive layers 411a_1, 411b_1, and 404_1 may be provided. For example, aluminum , copper, titanium, molybdenum, tungsten, or a laminate thereof, as the conductive layer 411a, The conductive layer 411b may be provided above or below the conductive layer 404. At least one of a_1, 411b_1, and 404_1 is a metal film processed into a mesh shape. Alternatively, the conductive layers 411a_1, 411b_1, and 404_1 may be formed of at least one of the conductive layers 411a_1, 411b_1, and 404_1. At least one of them is made of metal nanowires or carbon nanotubes. However, it is preferable that the conductive layer 401 has a light-transmitting property. It is preferable not to provide a low-resistance conductive layer above or below 01. Examples of such cases are as follows: Shown in Figures 31 and 32.

[0259] In addition, when it is desired to substantially reduce the resistance value of the conductive layers 411a and 411b, The conductive layer 411aa and the conductive layer 411bb may be disposed. The conductive layer 411aa (conductive layer 411bb) is connected via a contact hole. An example of this case is shown in Figure 33 and Figure 34.

[0260] Although the conductive layer 405 may be formed separately, it is preferable to form it simultaneously with other conductive layers. I wish.

[0261] [Configuration Example 2-2] FIG. 35 shows that the conductive layer 411a, the conductive layer 411b, and the conductive layer 404 are the same as the conductive layer 402. 4 shows an example in which the conductive layer 411a is formed by processing the conductive film. The layer 411b, the conductive layer 404, and the conductive layer 402 are disposed on the same plane. FIG. 36 shows a cross section of a portion corresponding to the section line X3-X4 in FIG. 35 and 36 correspond to FIG 8(B).

[0262] As shown in FIG. 35, the conductive layer 402 has an island shape. The two adjacent conductive layers 402 sandwiching the conductive layer 411b are formed in the same manner as the conductive layer 412a. In this example, the two conductive layers adjacent in the Y direction are electrically connected to each other through the conductive layer 405. Although an example in which the conductive layers 402 are not electrically connected has been shown, it is also possible to use a plurality of conductive layers 402 in the Y direction. Electrical connection may be made via the conductive layer 405, or the conductive layer 40 may be used in both the X and Y directions. 5. In this example, the upper conductive layer 401 is a pixel electrode. The case where the lower conductive layer 402 is a common electrode will be described. It may be allowed.

[0263] The conductive layer 405 may be disposed to extend in the X direction as shown in FIG. In this way, the wiring resistance of the conductive layer 404 can be substantially reduced. .

[0264] In addition, in FIG. 35 or FIG. 37, the conductive layer 411a and the conductive layer 411b are The conductive layer 412a and the conductive layer 412b are arranged so as to extend in the Y direction. It may be placed.

[0265] In FIG. 36, the conductive layer 405 is the source electrode and the drain electrode 28 of the transistor. 5. In this case, the conductive layer 405 is formed by processing the same conductive film as that of the conductive layer 405. Even if gate electrodes and other elements are placed, the layout can be done without any problems. The conductive layer 405 is overlapped with the gate electrode and a film formed by processing the same conductive film as the gate electrode. However, one embodiment of the present invention is not limited to this. The gate electrode 281, the semiconductor layer, or the same conductive film as the other conductive layers is processed to form a conductive A layer 405 can be formed.

[0266] As an example, when the conductive layer 405 is formed by processing the same conductive film as the gate electrode 281, 38 shows the case where the source electrode and the drain electrode 2 are formed on the conductive layer 405. Even if the conductive layer 4 is arranged, the layout can be performed without any problem. 05 is a source electrode and a drain electrode 285, or a semiconductor device similar to the source electrode and the drain electrode 285 The film formed by processing a single conductive film can be overlapped or crossed. That is, the source signal line and the conductive layer 411a or the conductive layer 411b are arranged to overlap each other. Therefore, the layout area of ​​the conductive layer 401 can be increased. , the aperture ratio can be increased.

[0267] Alternatively, the conductive layer 405 may be formed by processing the same conductive film as the conductive layer 401, as shown in FIG. 9. In this case, the source electrode and drain electrode 285 and the gate electrode 286 are disposed under the conductive layer 405. Even if a conductive electrode or the like is arranged, the layout can be done without any problems. The layer 405 may be a gate electrode, a source electrode and a drain electrode 285, or the same layer as the gate electrode. A film formed by processing a conductive film or the same conductive film as the source electrode and drain electrode 285 is used. It can be placed overlapping or crossing with the processed membrane. The signal line and the conductive layer 411a or the conductive layer 411b can be disposed to overlap each other. Therefore, the layout area of ​​the conductive layer 401 can be increased. Alternatively, the gate signal line and the conductive layer 404 or the conductive layer 405 may be overlapped. Therefore, the layout area of ​​the conductive layer 401 can be increased. In other words, the aperture ratio can be increased.

[0268] In addition, in FIG. 35 or FIG. 37, the conductive layer 411a and the conductive layer 411b are The conductive layer 412a and the conductive layer 412b are arranged so as to extend in the Y direction. When the conductive layers 412a and 412b are arranged, the conductive layers 412a and 412b are arranged in different directions. The conductive layer 411a is arranged to overlap the source signal line, not the gate signal line. In addition, the conductive layer 411b is arranged to overlap the gate signal line, not the source signal line. It will be placed in place.

[0269] In addition, in FIG. 36, FIG. 38, and FIG. 39, the upper conductive layer 401 is a pixel electrode, and the lower However, in one embodiment of the present invention, The upper conductive layer 401 is a common electrode, and the lower conductive layer 402 is a pixel electrode. Examples of this case are shown in Figures 40, 41, and 42.

[0270] 40, 41, 42, etc., the conductive layer 411a, the conductive layer 411b, and the conductive layer In this example, the conductive layer 404 is formed by processing the same conductive film as the conductive layer 402. However, one embodiment of the present invention is not limited thereto. The layer 404 may be formed by processing the same conductive film as the conductive layer 401. The layer 411a, the conductive layer 411b, the conductive layer 404, and the conductive layer 401 are disposed on the same plane. Examples of such cases are shown in Figures 43, 44, and 45.

[0271] In addition, when it is desired to reduce the resistance of the conductive layer 411a, the conductive layer 411b, and the conductive layer 404, In the above, a low-resistance layer is provided on or under the conductive layer 411a, the conductive layer 411b, and the conductive layer 404. Conductive layers 411a_1, 411b_1, and 404_1 may be provided. For example, aluminum , copper, titanium, molybdenum, tungsten, or a laminate thereof, as the conductive layer 411a, The conductive layer 411b may be provided above or below the conductive layer 404. At least one of a_1, 411b_1, and 404_1 is a metal film processed into a mesh shape. Alternatively, the conductive layers 411a_1, 411b_1, and 404_1 may be formed of at least one of the conductive layers 411a_1, 411b_1, and 404_1. At least one of them is made of metal nanowires or carbon nanotubes. However, it is preferable that the conductive layer 402 has a light-transmitting property. It is preferable not to provide a low-resistance conductive layer above or below 02. Examples of such cases are as follows: Shown in Figures 46 and 47.

[0272] In addition, when it is desired to substantially reduce the resistance value of the conductive layers 411a and 411b, The conductive layer 411aa and the conductive layer 411bb may be disposed. The conductive layer 411aa (conductive layer 411bb) is connected via a contact hole. An example of this case is shown in Figure 48 and Figure 49.

[0273] [Configuration Example 2-3] FIG. 50 shows a conductive layer 411a and a conductive layer 411b formed by processing the same conductive film as the conductive layer 401. The conductive layers 412a and 412b are formed by processing the same conductive film as the conductive layer 402. Therefore, the conductive layer 411a, the conductive layer 411b, and the conductive layer 401 are disposed on the same plane. 2b and the conductive layer 402 are disposed on the same plane. FIG. 1 is a schematic cross-sectional view of a touch panel including a cross section of a portion corresponding to a cutting line X5-X6 in FIG. 50 and 51 correspond to FIG. 7(E).

[0274] In this way, two conductive layers (e.g., conductive layers 411a and conductive layer 412a, or conductive layer 411b and conductive layer 412b, etc. By forming the layers in different layers, they can be crossed. In comparison with the configuration example 2, since there is no need to form a bridge portion using the conductive layer 405, Therefore, the manufacturing yield can be improved. A solenoid is formed under the conductive layer 411a, the conductive layer 412a, the conductive layer 411b, or the conductive layer 412b. Even if the source electrode, drain electrode 285, gate electrode 281, etc. are arranged, the laser can be used without any problem. Therefore, the conductive layer 411a, the conductive layer 412a, and the conductive layer 411b can be laid out. Alternatively, the conductive layer 412b may be a gate electrode 281 or a source electrode and a drain electrode 285. A film formed by processing the same conductive film as the gate electrode 281, a source electrode and a drain electrode The electrode 285 is overlapped or crossed with a film formed by processing the same conductive film. That is, the source signal line, the conductive layer 411a, the conductive layer 412a, the conductive layer 41 1b or conductive layer 412b can be disposed so as to overlap with each other. The layout area of ​​01 can be increased. In other words, the aperture ratio can be increased. Alternatively, the gate signal line and the conductive layer 411a, the conductive layer 412a, the conductive layer 411b, or Therefore, the layer of the conductive layer 401 can be overlapped with the conductive layer 412b. The out area can be increased, that is, the aperture ratio can be increased.

[0275] In FIG. 51, the upper conductive layer 401 is a pixel electrode, and the lower conductive layer 402 is a common electrode. Although the case where the polarities are the same will be described, these relationships may be reversed.

[0276] In FIG. 50, the conductive layer 411a and the conductive layer 411b are arranged so as to extend in the X direction. The conductive layer 412a and the conductive layer 412b may be arranged to extend in the Y direction. stomach.

[0277] In addition, in FIG. 50 and FIG. 51, the upper conductive layer 401 is a pixel electrode, and the lower conductive layer An example in which 402 is a common electrode is shown. However, one embodiment of the present invention is not limited to this. The upper conductive layer 401 may be used as a common electrode, and the lower conductive layer 402 may be used as a pixel electrode. Examples of this case are shown in Figures 52 and 53.

[0278] The conductive layers 411a, 411b, 412a, and 412b When it is desired to reduce the resistance, the conductive layer 411a, the conductive layer 411b, the conductive layer 412a, and Conductive layers 411a_1, 411b_1, 412b having low resistance are disposed above or below the conductive layer 412b. a_1, 412b_1 may be provided. For example, aluminum, copper, titanium, molybdenum , tungsten, or a laminate thereof is formed as a conductive layer 411a, a conductive layer 411b, a conductive layer 411c, a conductive layer 411d, a conductive layer 411e, a conductive layer 411f, a conductive layer 411g, a conductive layer 411h, a conductive layer 411i, a conductive layer 411j ... 12a and the conductive layer 412b. Alternatively, the conductive layer 411a At least one of 411b_1, 412a_1, and 412b_1 is meshed. Alternatively, the conductive layers 411a_1, 411b_1, At least one of 412a_1 and 412b_1 is a metal nanowire or a carbon nanowire. However, the conductive layer 401 and the conductive layer 402 may be made of a transparent tube. Therefore, in the opening, the conductive layer 401 and the conductive It is preferable not to provide a low resistance conductive layer above or below the layer 402. This is shown in Figures 54 and 55.

[0279] Note that the conductive layer 411a, the conductive layer 411b, the conductive layer 412a, or the conductive layer 412b When it is desired to substantially reduce the resistance value, the conductive layer 411aa, the conductive layer 411bb, and the conductive layer 41 2aa or conductive layer 412bb may be disposed. , conductive layer 412a or conductive layer 412b) and conductive layer 411aa (conductive layer 411bb , conductive layer 412aa, or conductive layer 412bb) is connected through a contact hole. An example of this case is shown in FIG. 56 and FIG. 57. For example, the conductive layer 411 When connecting the conductive layer 402 to the conductive layer 411aa, the connection is made through a hole provided in the conductive layer 402. That is, the conductive layer 402 is interposed between the upper conductive layer such as the conductive layer 402 and the lower conductive layer such as the conductive layer 402. When connecting to another conductive layer, a hole or the like is provided in the conductive layer 402 .

[0280] Note that the conductive layers 411a and 411b, and the conductive layers 412a and 412b At the intersection, a capacitance is formed. However, the size of this capacitance is In some cases, it is desirable to have a small cross capacitance. The conductive layers may be connected to each other via a contact hole. 58 and 59 show examples of such a case. In FIG. 58 and FIG. 59, the conductive layers 412a (conductive layers 4 12b) are connected via a contact hole and a conductive layer 405. 405 is, for example, a film formed by processing the same conductive film as the gate electrode 281, or a source The drain electrode 285 is formed by processing the same conductive film. This reduces the parasitic capacitance of the touch sensor electrode. This can improve the sensitivity of the sensor.

[0281] [Configuration Example 2-4] In the above, a pair of conductive layers constituting a liquid crystal element and a pair of conductive layers constituting a touch sensor The liquid crystal element has a conductive layer that is connected to one of the conductive layers of the touch sensor. It may also serve as an electrical layer.

[0282] In FIG. 60, the conductive layer 402 has a strip shape extending in the X direction and is divided in the Y direction. In this example, one of the conductive layers 402 functions as an electrode of the touch sensor. The conductive layer 412a, the conductive layer 412b, or the conductive layer 412c functions as a conductive layer One of the conductive layers, for example, also functions as a common electrode. 60 shows a schematic cross-sectional view of a touch panel including a cross section of a portion corresponding to FIG. 5-X6. FIG. 61 corresponds to FIG. 7(C).

[0283] A conductive layer that functions as a pair of electrodes of the touch sensor (e.g., conductive layer 412a, conductive layer 4 12b, etc.) and the conductive layer 402 are formed in different layers, so that they are crossed. Therefore, compared with the configuration example 1 and the configuration example 2, the conductive layer 405 is used. Since there is no need to form a bridge portion, the structure can be further simplified. In addition, the conductive layer 411a, the conductive layer 412a, the conductive layer 411b, Alternatively, the source electrode and drain electrode 285 and the gate electrode 286 are disposed under the conductive layer 412b. Even if the conductive layer 4 is arranged, the layout can be performed without any problem. 11a, the conductive layer 412a, the conductive layer 411b, or the conductive layer 412b is a gate electrode 28 1, the source electrode and drain electrode 285, and the gate electrode 281 are processed using the same conductive film. The source electrode and the drain electrode 285 are formed by processing the same conductive film. In other words, the source signal line and the conductive film can be arranged to overlap or cross each other. The conductive layer 411a, the conductive layer 412a, the conductive layer 411b, or the conductive layer 412b are disposed in a stacked manner. Therefore, the layout area of ​​the conductive layer 401 can be increased. That is, the aperture ratio can be increased. , the conductive layer 412a, the conductive layer 411b, or the conductive layer 412b is disposed so as to overlap with each other. Therefore, the layout area of ​​the conductive layer 401 can be increased. , the aperture ratio can be increased.

[0284] In addition, in FIG. 60 and FIG. 61, the upper conductive layer 401 is a pixel electrode, and the lower conductive layer An example in which 402 is a common electrode is shown. However, one embodiment of the present invention is not limited to this. The upper conductive layer 401 may be used as a common electrode, and the lower conductive layer 402 may be used as a pixel electrode. Examples of this case are shown in Figures 62 and 63.

[0285] The conductive layers 411a, 411b, 412a, and 412b When it is desired to reduce the resistance, the conductive layer 411a, the conductive layer 411b, the conductive layer 412a, and Conductive layers 411a_1, 411b_1, 412b having low resistance are disposed above or below the conductive layer 412b. a_1, 412b_1 may be provided. For example, aluminum, copper, titanium, molybdenum , tungsten, or a laminate thereof is formed as a conductive layer 411a, a conductive layer 411b, a conductive layer 411c, a conductive layer 411d, a conductive layer 411e, a conductive layer 411f, a conductive layer 411g, a conductive layer 411h, a conductive layer 411i, a conductive layer 411j ... 12a and the conductive layer 412b. Alternatively, the conductive layer 411a At least one of 411b_1, 412a_1, and 412b_1 is meshed. Alternatively, the conductive layers 411a_1, 411b_1, At least one of 412a_1 and 412b_1 is a metal nanowire or a carbon nanowire. However, the conductive layer 401 and the conductive layer 402 may be made of a transparent tube. Therefore, in the opening, the conductive layer 401 and the conductive It is preferable not to provide a low resistance conductive layer above or below the layer 402. This is shown in Figures 64 and 65.

[0286] Note that the conductive layer 411a, the conductive layer 411b, the conductive layer 412a, or the conductive layer 412b When it is desired to substantially reduce the resistance value, the conductive layer 411aa, the conductive layer 411bb, and the conductive layer 41 2aa or conductive layer 412bb may be disposed. , conductive layer 412a or conductive layer 412b) and conductive layer 411aa (conductive layer 411bb , conductive layer 412aa, or conductive layer 412bb) is connected through a contact hole. An example of this case is shown in FIG. 66 and FIG. 67. For example, the conductive layer 411 When connecting the conductive layer 402 to the conductive layer 411aa, the connection is made through a hole provided in the conductive layer 402. That is, the conductive layer 402 is interposed between the upper conductive layer such as the conductive layer 402 and the lower conductive layer such as the conductive layer 402. When connecting to another conductive layer, a hole or the like is provided in the conductive layer 402 .

[0287] Note that the conductive layers 411a and 411b, and the conductive layers 412a and 412b At the intersection, a capacitance is formed. However, the size of this capacitance is In some cases, it is desirable to have a small cross capacitance. The conductive layers may be connected to each other via a contact hole. An example of this case is shown in FIG. 68 and FIG. 69. In FIG. 68 and FIG. 69, the conductive layers 402 are in contact with each other. The connection is made via the gate hole and the conductive layer 405. The conductive layer 405 is, for example, The source electrode and the drain electrode 281 are formed by processing the same conductive film. The film is formed by processing the same conductive film as 85. The parasitic capacitance of the sensor electrode can be reduced, thereby improving the sensitivity of the touch sensor. It is possible to do this.

[0288] In FIG. 60, the conductive layer 411a and the conductive layer 411b are arranged so as to extend in the X direction. The conductive layer 412a and the conductive layer 412b may be arranged to extend in the Y direction. stomach.

[0289] In FIG. 70, the conductive layer 402 has a strip shape extending in the Y direction and is divided in the X direction. In this example, one of the conductive layers 402 is used as an electrode of the touch sensor. The conductive layer 411a, the conductive layer 411b, or the conductive layer 411c functions as a liquid crystal layer. One conductive layer of the element, for example, also functions as a common electrode.

[0290] This configuration is preferable because it can further simplify the configuration.

[0291] In addition, an example in which a liquid crystal element to which the FFS mode is applied is used has been described here. However, for example, a liquid crystal element in IPS mode may be used. The conductive layers 401 and 402 may be formed by processing the same conductive film. Alternatively, both the conductive layer 401 and the conductive layer 402 may have a comb-like top surface. At this time, the conductive layer 402 functioning as a common electrode is extended in either the X direction or the Y direction. It is preferable that the conductive film has a strip-like shape and functions as one electrode of the touch sensor.

[0292] [Configuration example 3] The following describes a touch panel configuration example that is partially different from the above configuration examples 1 and 2. This will be described with reference to the drawings.

[0293] The touch panel according to one embodiment of the present invention described below uses an organic EL element as a display element. It is a touch panel.

[0294] [Configuration Example 3-1] FIG. 71 shows an example of a cross-sectional configuration of a region including two sub-pixels. The switch panel is a bottom-emitting type that emits light toward the substrate on which the transistors 201 and other elements are formed. This includes light emitting devices of the type.

[0295] The touch panel includes a light-emitting element 202. The light-emitting element 202 includes a conductive layer 321 and an EL The conductive layer 321 and the conductive layer 322 are stacked. An optical adjustment layer 324 may be provided between the light emitting element 202 and the substrate 3. The light is emitted toward the insulating layer 21 so as to cover the ends of the conductive layer 321 and the optical adjustment layer 324. 5 is provided.

[0296] The conductive layer 321 preferably has a light-transmitting property. It is preferable that

[0297] In addition, a colored layer 231 is provided on the substrate 371 side of the light emitting element 202. In the configuration shown in FIG.

[0298] One of the conductive layers 351 and 352 functions as one electrode of the touch sensor, and the other The conductive layer 351 functions as the other electrode of the touch sensor. The conductive layer 352 is formed on the two gate electrodes of the transistor 201. Therefore, the touch panel can be easily manufactured without increasing the manufacturing process. A chip panel can be created.

[0299] As shown in FIG. 71, on the substrate 371 side, a conductive layer 351 and a conductive layer 352 are formed. This can be detected by utilizing the capacitance.

[0300] [Light Emitting Element] The light-emitting element may be a self-emitting element that is illuminated by a current or a voltage. The category includes devices whose light intensity can be controlled. For example, light-emitting diodes (LEDs), organic An EL element, an inorganic EL element, etc. can be used.

[0301] The light-emitting elements are top emission type, bottom emission type, and dual emission type. The electrode on the light extraction side is made of a conductive film that transmits visible light. In addition, it is preferable to use a conductive film that reflects visible light for the electrode on the side from which light is not extracted. stomach.

[0302] The EL layer has at least a light-emitting layer. The EL layer has a hole-injecting layer as a layer other than the light-emitting layer. high hole transporting material, hole blocking material, high electron transporting material, electron injection The material contains a highly conductive material or a bipolar material (a material with high electron transport and hole transport properties). The insulating layer may further include a layer containing the insulating layer.

[0303] The EL layer can be made of either low molecular weight compounds or high molecular weight compounds. Each of the layers constituting the EL layer may be formed by deposition (including vacuum deposition). The insulating layer can be formed by a method such as a transfer method, a printing method, an ink-jet method, or a coating method.

[0304] When a voltage higher than the threshold voltage of the light-emitting element is applied between the cathode and anode, the EL layer is charged from the anode side. Holes are injected from the cathode side, and electrons are injected from the cathode side. The injected electrons and holes are These molecules recombine and the luminescent material contained in the EL layer emits light.

[0305] When a white-emitting light-emitting element is used as the light-emitting element, two or more types of light-emitting elements are used in the EL layer. For example, the light emitted by two or more luminescent materials may be of complementary colors. By selecting a light-emitting material so as to satisfy the above relationship, white light can be obtained. For example, Luminescent substances that emit light of R (red), G (green), B (blue), Y (yellow), O (orange), etc. Or, among luminescent materials that emit light containing two or more of the spectral components of R, G, and B, It is preferable that the spectrum of the light emitted from the light emitting element is in the visible light region. A light emitting element having two or more peaks within a wavelength range (e.g., 350 nm to 750 nm) is used. It is preferable to use a material having a peak in the yellow wavelength region. Preferably, the material has spectral components in the green and red wavelength regions as well.

[0306] More preferably, the EL layer is a layer including a light-emitting material that emits light of one color and a layer including a light-emitting material that emits light of another color. It is preferable that the EL layer has a laminated structure with a light-emitting layer containing a light-emitting material. The light-emitting layers in the light-emitting device may be laminated in contact with each other or may be laminated with a separating layer interposed therebetween. For example, a separation layer may be provided between the fluorescent light-emitting layer and the phosphorescent light-emitting layer. stomach.

[0307] The separation layer is configured to convert the excited state of a phosphorescent material generated in the phosphorescent-emitting layer into the fluorescent material in the fluorescent-emitting layer. Preventing energy transfer (especially triplet energy transfer) to optical materials through the Dexter mechanism The separation layer only needs to be a few nm thick. Specifically, it is 0. 1nm to 20nm, or 1nm to 10nm, or 1nm to 5nm The separation layer may be a single material (preferably a bipolar material) or a plurality of materials. (preferably a hole transporting material and an electron transporting material).

[0308] The separation layer may be formed using a material contained in the light-emitting layer that is in contact with the separation layer. This makes it easier to fabricate the light-emitting device and reduces the driving voltage. When the separation layer is made of a host material, an assist material, and a phosphorescent material (guest material), The separation layer may be formed of a host material and an assist material. The phosphorescent layer has a region that does not contain the material, and the phosphorescent layer has a region that contains the phosphorescent material. It is possible to vapor-deposit the separation layer and the phosphorescent layer depending on whether or not the phosphorescent material is present. With this configuration, it is possible to form the separation layer and the phosphorescent layer in the same chamber. This makes it possible to reduce the manufacturing cost.

[0309] The light-emitting element may be a single element having one EL layer, or a light-emitting element having multiple EL layers. and a charge generating layer interposed therebetween to form a tandem element.

[0310] [Configuration Example 3-2] FIG. 72 differs from FIG. 71 in that the position of the conductive layer 352 is different. In this case, the conductive layer 352 and one of the gate electrodes of the transistor 201 are insulated from the insulating layer 212. It is provided between layers 213.

[0311] The conductive layer 352 and one of the gate electrodes of the transistor 201 are provided with the above-mentioned low-resistance It is preferable that the insulating layer 10 includes an oxide semiconductor.

[0312] As shown in FIG. 73, the conductive layer 352 is disposed between the conductive layer 321, the optical adjustment layer 324, and the EL layer 32. 2, the conductive layer 323, and the colored layer 231 may be disposed so as to overlap at least one of them. As shown in FIG. 74, the conductive layer 352 is a conductive layer 321, an optical adjustment layer 324, an EL layer 322, and a conductive The insulating layer 323 and the colored layer 231 may be disposed so as not to overlap each other.

[0313] [Cross-sectional configuration example 3-2] FIG. 75 shows that both the conductive layer 351 and the conductive layer 352 constituting the touch sensor are conductive layers 32 1 is formed on the same plane.

[0314] At this time, the conductive layer 351 disposed in one subpixel and the conductive layer 352 disposed in the other subpixel This can be detected by utilizing the capacitance generated between layer 352.

[0315] [Cross-sectional configuration example 3-3] FIG. 76 shows a touch panel including a top emission type light emitting device that emits light to the substrate 372 side. 2 is an example of a cross-sectional configuration of a panel.

[0316] Here, in the light-emitting element 202, the conductive layer 321 has a reflectivity, and the conductive layer 323 has a light-transmitting It has sexuality.

[0317] The conductive layer 323 has an opening at least in a portion overlapping with a part of the conductive layer 351. In addition, the conductive layer 323 may have slits or openings, or may have a comb-like shape. It's fine.

[0318] The conductive layer 351 and the conductive layer 352 are formed on the same plane as the conductive layer 321 .

[0319] In the example shown in FIG. 76, a conductive layer 351 is disposed in one subpixel and a conductive layer 352 is disposed in the other subpixel. 3 shows an example in which detection is performed by utilizing the capacitance generated between the conductive layer 352 and the electrode 352.

[0320] Also, as shown in FIG. 77, the conductive layer 323 can be used as an electrode of a touch sensor. That is, the capacitance generated between the conductive layer 351 and the conductive layer 323 is used for detection. It is also possible to use the following.

[0321] FIG. 77 shows an example in which the EL layer 322 is formed by a color-coded method. At this time, by covering the end of the EL layer 322 with a conductive layer 323 as shown in FIG. The diffusion of impurities into the L layer 322 is suppressed, and the reliability can be improved. 2 shows an example in which the colored layer 231 and the like are not provided.

[0322] [Other configuration examples] Note that one embodiment of the present invention is not limited to the above-described exemplary configurations, and various configurations can be used. .

[0323] [Positional relationship between sensor electrodes and pixel wiring] For example, the source lines (signal lines) of the pixels are arranged in even-numbered columns and odd-numbered columns. The position can be changed to the right or left, resulting in two adjacent source lines. A conductive layer (electrode) for a touch sensor can be placed on top of the pixel. Similarly, the gate lines are placed close to each other in the upper and lower pixels, and the electrodes for the touch sensor are placed on top of them. An example of this is shown in Figure 78. 4 are adjacent to each other in pairs. Also, the gate lines 85, 86, 87, and 88 are adjacent to each other in pairs. is being treated.

[0324] [Peripheral circuits] The peripheral circuits may be configured not to be integrally formed. The circuit for driving the pixel and the circuit for driving the pixel can be formed separately. These functions may be realized by one circuit.

[0325] In addition, either the conductive layer in the X direction or the conductive layer (electrode) in the Y direction of the touch sensor A driver circuit for selecting the electric layer can also be formed integrally with the TFT.

[0326] The circuit that drives the touch sensor is the gate driver that drives the pixels, or the source driver. It may be located on either side of the driver.

[0327] In addition, it is electrically connected to the conductive layer (electrode) in the X direction or the conductive layer (electrode) in the Y direction of the touch sensor. Of the two circuits, it is preferable to use an IC as the circuit having the detection function. In this case, it is preferable that the conductive layer is controlled by the IC via an FPC.

[0328] [Material of the conductive layer (electrode) of the touch sensor] At least one of the pair of conductive layers constituting the touch sensor is connected to a common electrode constituting the liquid crystal element. It is preferable to use the same material as the electrodes and pixel electrodes.

[0329] Alternatively, at least one of the pair of conductive layers constituting the touch sensor is processed into a mesh shape. Alternatively, the insulating layer 11 may be made of a metal film (also called a metal mesh).

[0330] At least one of the conductive layers (electrodes) in the X direction or the Y direction of the touch sensor The resistance can be reduced by applying a metal film directly below or above it. In the case of a laminated structure of a conductive film containing a metal oxide and a conductive film containing a metal, a half-tone mask is used. It is preferable to form the insulating film by a patterning technique using a mask, since this simplifies the process.

[0331] [Wiring that connects the conductive layers (electrodes) of the touch sensor] At the intersection of the X-direction conductive layer and the Y-direction conductive layer of the touch sensor, When a bridge structure is realized using the conductive layer, for example, the conductive layer is used as a gate electrode of a transistor. The conductive layer in the X direction is routed horizontally across the entire pixel in parallel with the gate line. Alternatively, the conductive layer is formed on the same plane as the source and drain electrodes of the transistor. The Y-direction conductive layer is arranged in parallel with the source line and in the vertical direction across the entire pixel. A contact portion can be formed in the pixel, or the conductive layer can function as a common electrode. The same conductive layer as the conductive layer functioning as the pixel electrode, or a conductive layer on the same surface as the conductive layer functioning as the pixel electrode. may also be used.

[0332] [Conductive layers (electrodes) of touch sensors and conductive layers (electrodes) of liquid crystal elements] The conductive layer (electrode) with slits arranged on the top is used as a pixel electrode, and the A conductive layer (electrode) provided across a plurality of pixels is called a common electrode (also called a common electrode). ) can be used.

[0333] Alternatively, a conductive layer ( A conductive electrode is used as a common electrode, and a conductive layer is disposed at the bottom and provided for each of the plurality of pixels. The layer (electrode) can be used as a pixel electrode.

[0334] The conductive layer in the X direction of the touch sensor is used as a conductive layer that functions as a pixel electrode or a common electrode. Alternatively, the conductive layer may be configured to function as a conductive layer in the Y direction of the touch sensor. The conductive layer functions as a pixel electrode or a common electrode. The configuration can be such that:

[0335] In addition, the conductive layer in the X direction of the touch sensor is a conductive layer to which a pulse voltage is applied or a current is detected. In this case, the conductive layer in the Y direction of the touch sensor may be Just do the other one.

[0336] In addition, at the portion where the conductive layer in the X direction or the conductive layer in the Y direction of the touch sensor intersects, The shape of one of the conductive layers may be different from that of the other portion. For example, A pair of conductive layers of a touch sensor is formed only by a conductive layer on the same surface as the conductive layer that functions as a pixel electrode. When forming the touch sensor, the conductive layer that functions as a common electrode arranged at the bottom is However, it is possible to avoid placing the conductive layer of the touch sensor under the conductive layer of the touch sensor. When the conductive layer functioning as the common electrode is not provided at any of the positions, Therefore, the conductive layer that functions as a common electrode becomes island-shaped, and the two adjacent conductive layers that function as common electrodes are separated. It is preferable that the conductive layer has a shape having a slit so that a part of the conductive layer is connected.

[0337] In addition, the conductive layer functioning as a common electrode is provided across a plurality of pixels. Alternatively, for example, a common wiring formed by a conductive layer on the same plane as the gate electrode of the transistor may be used. In this case, the conductive layer that functions as a common electrode may be It may have an island shape.

[0338] [Opposite substrate] A substrate (also called an opposing substrate) is provided opposite a substrate on which a transistor or the like is provided. When a conductive layer is provided in the X direction or Y direction of the touch sensor, the It is preferable to provide a light-shielding layer on the side of the light-shielding layer.

[0339] In addition, when one of the electrodes of the liquid crystal element is formed on the opposing substrate (TN mode, MVA mode, etc.), In the case of the above, the electrode is provided with a conductive layer of the touch sensor on the opposing substrate. It is preferable to provide a lit.

[0340] In addition, in FFS mode, IPS mode, etc., a pair of electrodes is connected to a transistor, etc. Even when the liquid crystal display device is formed on a substrate that is opposite to the liquid crystal display device, a conductive layer for controlling the alignment of the liquid crystal is provided on the opposite substrate. In this case, the conductive layer may also have a slot at the portion where it overlaps with the conductive layer of the touch sensor. It is preferable to provide a slot.

[0341] [Driving method] As a method for driving the touch sensor, for example, one horizontal period (one gate selection) for driving the pixel is In this case, a method of sensing (scanning) the corresponding row during the gap between the pixel selection periods can be used. Alternatively, one frame period can be divided into two, with all pixels written in the first half and sensing in the second half. You may also search for

[0342] [Transistor] For example, in this specification, transistors of various structures are used as transistors. Therefore, there is no limitation on the type of transistor to be used. As the transistor, a transistor having single crystal silicon, or a transistor having amorphous silicon or polycrystalline silicon Con, microcrystalline (also called microcrystal, nanocrystal, semi-amorphous) silicon A transistor having a non-single crystal semiconductor film, such as a junction box, can be used. Alternatively, thin-film transistors (TFTs) made from these semiconductors can be used. There are various advantages to using TFTs. For example, it is easier to use than single crystal silicon. Since it can be manufactured at a lower temperature than conventional methods, it is possible to reduce manufacturing costs and increase the size of manufacturing equipment. Since the manufacturing equipment can be made larger, it is possible to manufacture on large substrates. Since a large number of display devices can be manufactured, the manufacturing cost can be reduced. Therefore, a substrate with low heat resistance can be used. Alternatively, a display element can be manufactured using a transistor on a light-transmitting substrate. The light transmission of the transistor can be controlled. A part of the film that forms the star can transmit light. This improves the aperture ratio. It is possible.

[0343] In addition, by using a catalyst (such as nickel) when producing polycrystalline silicon, It is possible to further improve the crystallinity and manufacture transistors with good electrical characteristics. As a result, the gate driver circuit (scanning line driver circuit), the source driver circuit (signal line driver circuit ), and signal processing circuits (signal generation circuit, gamma correction circuit, DA conversion circuit, etc.) on the board. It can be integrally formed.

[0344] In addition, when producing microcrystalline silicon, by using a catalyst (such as nickel), It is possible to further improve the crystallinity and manufacture transistors with good electrical characteristics. In this case, the crystallinity can be improved by simply applying heat treatment without laser irradiation. As a result, part of the source driver circuit (analog switch, etc.) and gate The gate driver circuit (scanning line driver circuit) can be formed integrally on the substrate. Therefore, if laser irradiation is not performed, the unevenness of the silicon crystallinity can be suppressed. Therefore, it is possible to display images with improved quality. However, the use of catalysts (such as nickel) It is possible to produce polycrystalline or microcrystalline silicon without using a SiO 2 .

[0345] In addition, improving the crystallinity of silicon to polycrystalline or microcrystalline can reduce the size of the entire panel. It is preferable to perform the process in a region other than the region of the panel, but it is not limited to this. The crystallinity of the contact may be improved. The crystallinity can be improved by selectively applying a laser beam. For example, the peripheral circuit area, which is an area other than the pixels, can be selectively irradiated. Only in the area of ​​the gate driver circuit and the source driver circuit, or only in the area of ​​the source driver circuit, Even if the laser light is irradiated only on a part of the driver circuit (for example, an analog switch), As a result, silicon crystallization is enhanced only in areas where high-speed circuit operation is required. The pixel area does not need to operate at high speed, so the crystallinity can be improved. Even if the pixel circuit is not connected to the power supply, it can still operate without any problems. Since the region in which the crystallinity needs to be improved is small, the manufacturing process can be shortened. This can improve throughput and reduce manufacturing costs. Since a small number of manufacturing devices are required, manufacturing costs can be reduced.

[0346] An example of a transistor is a compound semiconductor (e.g., SiGe, GaAs, etc.). ), or oxide semiconductors (e.g., Zn-O, In-Ga-Zn-O, In-Zn-O, I n-Sn-O(ITO), Sn-O, Ti-O, Al-Zn-Sn-O(AZTO), I A transistor having a Zn-Zn-O or the like can be used. These compound semiconductors or thin-film transistors made by thinning these oxide semiconductors These can be used at low manufacturing temperatures, for example, in a trans- As a result, it is possible to manufacture a transistor on a substrate with low heat resistance, such as a plastic substrate. It is possible to form transistors directly on a substrate or film substrate. Compound semiconductors or oxide semiconductors are not only used for the channel portion of transistors, but also for For example, these compound semiconductors or oxide semiconductors can be used for other purposes. It can be used as a wiring, a resistor element, a pixel electrode, a light-transmitting electrode, or the like. These can be deposited or formed simultaneously with the transistors, which reduces costs.

[0347] An example of a transistor is a transistor formed by an ink-jet method or a printing method. These can be used for manufacturing at room temperature, low vacuum, or can be manufactured on a large substrate. Therefore, it can be manufactured without using a mask (reticle). This allows the transistor layout to be easily changed. Alternatively, it is possible to manufacture without using resist, which reduces material costs and the number of processes. Or, since it is possible to apply the film only to the necessary parts, after forming the film on the entire surface, This method wastes less material and is less costly than the conventional method of etching.

[0348] An example of a transistor is a transistor having an organic semiconductor or a carbon nanotube. This allows transistors to be mounted on a flexible substrate. It is possible to form transistors using organic semiconductors and carbon nanotubes. The device using the method can be made shock resistant.

[0349] Note that transistors having various other structures can also be used. For example, transistors include MOS transistors, junction transistors, bipolar transistors, and A MOS transistor can be used as the transistor. By using this, the size of the transistor can be reduced. It is possible to mount a bipolar transistor as a transistor. This allows a large current to flow, making it possible to operate the circuit at high speed. It is also possible to combine MOS transistors and bipolar transistors on a single substrate. This can achieve low power consumption, small size, high speed operation, etc. Yes, it is possible.

[0350] For example, in this specification, an example of a transistor is a transistor having two or more gate electrodes. A multi-gate transistor can be used. Since the channel regions are connected in series, multiple transistors are connected in series. Therefore, the multi-gate structure reduces the off-current and improves the breakdown voltage of the transistor (reliability). Or, by using a multi-gate structure, it is possible to improve the saturation region. In addition, even if the voltage between the drain and source changes, the current between the drain and source remains constant. It is possible to obtain voltage-current characteristics that do not change and have a flat slope. By utilizing the voltage-current characteristic, an ideal current source circuit or a As a result, a differential circuit or a current mirror circuit with good characteristics can be realized. It is possible to realize roads, etc.

[0351] An example of a transistor is a transistor having a structure in which gate electrodes are arranged above and below a channel. A transistor with a structure in which gate electrodes are arranged above and below the channel can be applied. By using this structure, the circuit configuration becomes like multiple transistors connected in parallel. This increases the channel area, which increases the current value. By using a structure in which gate electrodes are arranged above and below the Therefore, the S value can be improved.

[0352] In addition, as an example of a transistor, a gate electrode is disposed on a channel region. a structure in which a gate electrode is disposed under a channel region; a positive staggered structure; and a reverse staggered structure. a structure in which the channel region is divided into a plurality of regions, a structure in which the channel regions are connected in parallel, or A transistor having a structure in which channel regions are connected in series can be used. Transistors include planar type, FIN type, and TRI-GATE type. Gate type), top gate type, bottom gate type, double gate type (gates above and below the channel The configuration can be various, such as a single-chip microcomputer (where a single chip is placed) or a multi-chip microcomputer (where a single chip is placed).

[0353] As an example of a transistor, a source electrode is provided in the channel region (or a part thereof). A transistor having an overlapping structure of the drain electrode and the channel region can be used. By making the source electrode and drain electrode overlap the This prevents the operation from becoming unstable due to charge accumulation in part of the channel area. .

[0354] As an example of a transistor, a structure in which an LDD region is provided can be applied. By providing a region, the off-state current can be reduced or the withstand voltage of the transistor can be improved (improved reliability). Alternatively, by providing an LDD region, it is possible to reduce the Even if the voltage between the drain and source is changed, the drain current does not change much and the slope is A flat voltage-current characteristic can be obtained.

[0355] For example, in FIG. 61, a case where a top-gate type transistor is used is shown in FIG. .

[0356] [What is connection?] For example, in the present specification, it is explicitly stated that X and Y are connected. The cases are when X and Y are electrically connected and when X and Y are functionally connected. The case where X and Y are directly connected and the case where X and Y are directly connected are both considered to be disclosed in this specification. Therefore, the present invention is not limited to a specific connection relationship, for example, a connection relationship shown in a drawing or a sentence. Connections other than those shown in the drawings or text are also included in the drawings or text. Let us assume that.

[0357] Here, X and Y are the objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layer, etc.).

[0358] An example of a direct connection between X and Y is The elements that function as When a diode, display element, light-emitting element, load, etc. is not connected between X and Y, An element (e.g., a switch, transistor, or capacitor) that allows electrical connection between X and Y. (capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) In this case, X and Y are connected.

[0359] An example of the case where X and Y are electrically connected is The elements that function as One or more diodes, display elements, light-emitting elements, loads, etc.) are connected between X and Y. The switch has a function of being controlled to be on and off. A switch can be in a conductive state (on) or a non-conductive state (off) to allow current to flow. The switch has the function of controlling whether or not current flows. When X and Y are electrically connected, X This also includes the case where and Y are directly connected.

[0360] An example of a case where X and Y are functionally connected is the case where the functional connection between X and Y is possible. Circuits that perform the functions of the following: logic circuits (inverters, NAND circuits, NOR circuits, etc.), signal Conversion circuits (DA conversion circuits, AD conversion circuits, gamma correction circuits, etc.), potential level conversion circuits ( Power supply circuits (boosting circuits, step-down circuits, etc.), level shifter circuits that change the potential level of signals, etc. ), voltage sources, current sources, switching circuits, amplifier circuits (which can increase the signal amplitude or current amount, etc.) (e.g., circuits that generate One or more devices (such as a synthesis circuit, memory circuit, or control circuit) can be connected between X and Y. For example, even if another circuit is inserted between X and Y, the signal output from X is If the signal is transmitted to Y, then X and Y are considered to be functionally connected. When X and Y are functionally connected, there are cases where X and Y are directly connected and cases where X and Y are functionally connected. This also includes the case where Y is electrically connected.

[0361] In addition, if it is explicitly stated that X and Y are electrically connected, When X and Y are electrically connected (i.e., when there is another element or circuit between X and Y), When X and Y are functionally connected (i.e., when X and Y are (X and Y are connected functionally with another circuit between them) and (X and Y are connected directly (i.e., when X and Y are connected without any other element or circuit between them) In other words, it is assumed that the above is disclosed in the present specification. If it is explicitly stated that it is connected, The same contents as those in the above case are deemed to be disclosed in the present specification, etc.

[0362] For example, the source (or the first terminal, etc.) of the transistor is connected to the The drain (or second terminal, etc.) of the transistor is electrically connected to X. It may be electrically connected to Y through Z2 (or not), or the source of the transistor may be A part of Z1 is directly connected to X, and another part of Z1 is directly connected to X. The drain (or second terminal, etc.) of the transistor is directly connected to a part of Z2. When a part of Z2 is directly connected to Y, and another part of Z2 is directly connected to Y, the following expression is obtained: It is possible to manifest it.

[0363] For example, "X and Y and the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor" 2 terminals, etc.) are electrically connected to each other, and X, the source (or The first terminal, the drain of the transistor, the second terminal, etc., and the Y are electrically connected in this order. "The source (or The drain (or second terminal, etc.) of the transistor is electrically connected to X. ) is electrically connected to Y, and X is the source (or first terminal, etc.) of the transistor, The drains (or second terminals, etc.) of the transistors, Y, are electrically connected in this order. Alternatively, "X is the source (or first terminal) of the transistor." ) and the drain (or the second terminal, etc.), and Y is electrically connected to X, The source (or first terminal, etc.) of a transistor, the drain (or second terminal, etc.) of a transistor, In these examples, Y is provided in this order. By using various expressions to specify the order of connections in a circuit configuration, The source (or first terminal, etc.) and the drain (or second terminal, etc.) of the transistor are separated. The technical scope can be determined separately.

[0364] Alternatively, for example, "the source (or first terminal, etc.) of a transistor" may be expressed as ) is electrically connected to X through at least a first connection path, and the first connection path does not have a second connection path, and the second connection path is a The source (or first terminal, etc.) of a transistor and the drain (or second terminal, etc.) of a transistor The first connection path is a path via Z1, and the second connection path is a path between the transistor The drain (or second terminal, etc.) of the transistor is connected to Y through at least a third connection path. the third connection path does not include the second connection path, and the third connection path is electrically connected to the The connection path of is the path through Z2. The source (or first terminal, etc.) of the resistor is connected to Z1 by at least the first connection path. and the first connection path does not have a second connection path. The second connection path has a connection path through a transistor, and the drain of the transistor The pin (or the second terminal, etc.) is connected to Y through Z2 by at least a third connection path. The third connection path is electrically connected to the second connection path. Alternatively, the source (or the first terminal, etc.) of the transistor may be The first electric path is electrically connected to X through Z1, The electrical path does not include a second electrical path, and the second electrical path includes a transistor. From the source (or first terminal, etc.) of the transistor to the drain (or second terminal, etc.) of the transistor The drain (or second terminal, etc.) of the transistor is an electrical path of at least The third electrical path is electrically connected to Y through Z2, and the third electrical path does not have a fourth electrical path, and the fourth electrical path is An electrical connection from the input (or second terminal, etc.) to the source (or first terminal, etc.) of a transistor. Using the same expression as these examples, the circuit configuration can be expressed as By defining the connection path in the structure, the source (or first terminal) of the transistor The technical scope is determined by distinguishing between the first terminal (or the first terminal, etc.) and the drain (or the second terminal, etc.). This can be done.

[0365] Note that these expression methods are merely examples, and the present invention is not limited to these expression methods. X, Y, Z1, and Z2 are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films , layer, etc.).

[0366] In addition, the circuit diagram shows that independent components are electrically connected to each other. Even if one component has the functions of multiple components, For example, when a part of the wiring also functions as an electrode, one conductive film functions as the wiring and The function of both components is combined with the function of the electrode. Electrical connection means that one conductive film has the functions of multiple components. cases are also included in this category.

[0367] 〔substrate〕 For example, in this specification, it is possible to form transistors using various substrates. The type of substrate is not limited to a specific one. Conductor substrates (e.g., single crystal substrates or silicon substrates), SOI substrates, glass substrates, quartz substrates, Plastic substrate, sapphire glass substrate, metal substrate, stainless steel substrate, stainless Substrate with less steel foil, tungsten substrate, tungsten foil Substrates, flexible substrates, laminated films, paper containing fibrous materials, base film, etc. Examples of glass substrates include barium borosilicate glass and aluminoborosilicate glass. Glass, soda lime glass, etc. Flexible substrates, laminated films, base film Examples of films include the following: Polyethylene naphthalate (PET), Polyethersulfone (PES) ), and polytetrafluoroethylene (PTFE). An example of the material is a synthetic resin such as acrylic. Another example is polypropylene. Examples include polyethylene, polyester, polyvinyl fluoride, and polyvinyl chloride. Examples of the material include polyamide, polyimide, aramid, epoxy, inorganic vapor deposition film, and paper. In particular, transistors using semiconductor substrates, single crystal substrates, SOI substrates, etc. By manufacturing the capacitors, there is little variation in characteristics, size, or shape, and the current capacity is high. This allows the manufacture of high-performance, small-sized transistors. By configuring the circuit in this way, it is possible to reduce the power consumption of the circuit or to increase the degree of integration of the circuit. .

[0368] In addition, a flexible substrate is used as the substrate, and a transistor is formed directly on the flexible substrate. Alternatively, a release layer may be provided between the substrate and the transistor. After a semiconductor device is partially or completely completed, it is separated from the substrate and transferred to another substrate. In this case, the transistor can be transferred to a substrate with poor heat resistance or a flexible substrate. The above-mentioned peeling layer may be formed of an inorganic material such as a tungsten film and a silicon oxide film. The structure may be a laminated structure of films or a structure in which an organic resin film such as polyimide is formed on a substrate. It is possible.

[0369] That is, one substrate is used to form a transistor, and then another substrate is used to form the transistor. The transistor may be transposed and placed on another substrate. As an example, in addition to the substrate on which the above-mentioned transistors can be formed, a paper substrate, a cellophane substrate, etc. Fan boards, aramid film boards, polyimide film boards, stone boards, wood boards, cloth Substrate (natural fibers (silk, cotton, linen), synthetic fibers (nylon, polyurethane, polyester) or recycled fibers (including acetate, cupra, rayon, recycled polyester, etc.), There are leather substrates, rubber substrates, etc. By using these substrates, Formation of transistors, formation of transistors with low power consumption, manufacturing of devices that are not easily damaged, heat resistance It is possible to provide a thinner, lighter, or thinner device.

[0370] This embodiment may be any of the other embodiments, at least some of which are described herein, or , can be implemented in appropriate combination with at least a part of this embodiment mode.

[0371] (Embodiment 2) In this embodiment, a driver IC is applied to the display device described in the above embodiment. An example of such implementation will be described with reference to Figures 80(A) and (B).

[0372] The display device 500A of FIG. 80(A) includes a pixel section 510, a gate driver 520_1, The pixel unit 510 includes a gate driver 520_2 and a source driver 530. The source driver 530 has a pixel 511 connected to a line GL and a source line SL. Number of TAB (Tape Automated Bonding) tapes 531, sourced The driver ICs 532_1 to 532_k (k is a natural number equal to or greater than 2).

[0373] In the pixel section 510, the pixel 511 is, for example, 80(A) 。 On the other hand, the short side (Y direction) and the short side (Y direction) are provided in a matrix. Therefore, in the configuration of this embodiment, the pixels 5 connected to the same gate line GL and provided on the short side The number of pixels 511 connected to the same source line SL and provided on the long side is greater than the number of pixels 11. Become more.

[0374] The gate driver 520_1 and the gate driver 520_2 are provided on the two long sides. The gate driver 520_1 drives the gate lines in odd rows (GL1, GL3), The gate driver 520_2 drives the gate lines in the even-numbered rows (GL2, GL4). The number of gate lines GL arranged side by side increases according to the number of pixels. 20_1 and gate driver 520_2 are provided to select one gate line GL. The period can be longer.

[0375] The gate driver 520_1 and the gate driver 520_2 are source drivers. 530, the gate driver 520_1 does not need to operate at a high speed. The gate driver 520_2 is a transistor manufactured in the same manner as the transistor of the pixel 511. The display device 500A includes a gate driver 520_1. By incorporating the gate driver 520_2, costs can be reduced. The frame of the display device 500A can be narrowed.

[0376] The source driver ICs 532_1 to 532_k (k is a natural number of 2 or more) are The display device 500A is mounted on the substrate 531 by an anisotropic conductive adhesive or the like. A plurality of TAB tapes 531 on which driver ICs 532_1 to 532_k are mounted are attached. By this, a plurality of source lines (SL1, SL2) are driven.

[0377] The source driver ICs 532_1 to 532_k include a gate driver 520_1, Therefore, the source driver IC53 2_1 to 532_k are the gate drivers 520_1 and 520_2. It is difficult to incorporate the source driver in the display device 500A. By placing the source driver ICs on the short side, the number of source driver ICs can be reduced, resulting in low cost. It is possible to streamline the process.

[0378] The reduction in the number of source driver ICs is particularly important for displays with a large number of pixels, such as 8k It is extremely effective to apply this technology to displays with a high pixel count, such as 4K. The low manufacturing cost allows for higher pixel resolution, resulting in a more realistic display device. can be produced at low cost.

[0379] Note that a configuration different from that shown in FIG. 80(A) may be used as shown in FIG. 80(B). The display device 500B in FIG. 80(A) has a gate line GL per pixel row. This is a configuration in which the number of source lines SL per pixel column is increased and the number of source lines SL per pixel column is reduced.

[0380] The gate driver 520_1 and the gate driver 520_2 in FIG. As in (A), the gate drivers 520_1 are provided on the two long sides. The gate driver 520_2 drives the gate lines (GL1, GL3, GL5, GL7). , drive the gate lines of the even rows (GL2, GL4, GL6, GL8).

[0381] The source driver ICs 532_1 to 532_k / 2 in FIG. It is necessary to drive only half the number of source lines (SL1) compared to the source driver. The number of bar ICs can be further reduced, resulting in further cost reduction.

[0382] Here, especially for display devices with large screens of 50 inches or more or 60 inches or more, To achieve this, the transistors provided in each pixel must have relatively high mobility. For example, it is preferable to use polycrystalline silicon for the semiconductor layer of a transistor. However, it is preferable to use an oxide semiconductor since it can be easily formed on a large substrate. In this case, when an In-M-Zn oxide is used as the oxide semiconductor, there is more In than M. For example, an oxide containing In:Ga:Zn=4:2:3 is preferably used. The oxide semiconductor film, which is a stack of a metal film and an oxide film of In:Ga:Zn=1:1:1, is used as a semiconductor. By applying the transistors used in the layer, high mobility can be achieved.

[0383] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0384] (Embodiment 3) In this embodiment mode, the transistor described in the above embodiment mode can be replaced with a An example of a transistor that can be used will be described with reference to the drawings.

[0385] The touch panel of one embodiment of the present invention can be implemented using a bottom-gate transistor or a top-gate transistor. The semiconductor device can be manufactured using various types of transistors, such as a transistor having a structure as shown in FIG. The semiconductor layer materials and transistor structures used can be easily arranged to fit existing production lines. It can be replaced.

[0386] [Bottom-gate transistor] FIG. 81(A1) shows a channel protection transistor, which is a type of bottom gate transistor. 81(A1) is a cross-sectional view of a transistor 810. In FIG. The transistor 810 is formed on a substrate 771 with an insulating layer 772 formed thereon. The semiconductor layer 742 is disposed on the electrode 746 with an insulating layer 726 interposed therebetween. The electrode 746 can function as a gate electrode. The insulating layer 726 can function as a gate insulating layer. It can function as such.

[0387] In addition, an insulating layer 741 is provided over a channel formation region of the semiconductor layer 742. An electrode 744a and an electrode 744b are provided on the insulating layer 726 in contact with a part of the insulating layer 742. Electrode 744a can function as either a source electrode or a drain electrode. , which can function as the other of the source electrode or the drain electrode. A portion of the electrode 744 b is formed on the insulating layer 741 .

[0388] The insulating layer 741 can function as a channel protection layer. 1, the thickness of the semiconductor layer 742 generated when the electrodes 744a and 744b are formed can be reduced. Therefore, when the electrodes 744a and 744b are formed, the semiconductor This can prevent the channel formation region of the layer 742 from being etched. According to this method, a transistor having good electrical characteristics can be realized.

[0389] The transistor 810 has an insulating layer 744 a, an electrode 744 b, and an insulating layer 741. It has an edge layer 728 and an insulating layer 729 on top of the insulating layer 728 .

[0390] The electrodes, semiconductor layers, insulating layers, and the like constituting the transistor disclosed in this embodiment are the same as those of other It can be formed using the materials and methods disclosed in the embodiment.

[0391] When an oxide semiconductor is used for the semiconductor layer 742, at least one of the electrodes 744a and 744b At least in the portion in contact with the semiconductor layer 742, oxygen is taken from a portion of the semiconductor layer 742, and oxygen deficiency is formed. It is preferable to use a material capable of generating oxygen vacancies in the semiconductor layer 742. The carrier concentration in the region where this occurs increases, the region becomes n-type, and the n-type region (n + layer) Therefore, the region can function as a source region or a drain region. When an oxide semiconductor is used for the semiconductor layer 742, oxygen is taken from the semiconductor layer 742, and oxygen vacancies occur. Examples of materials capable of generating this include tungsten and titanium. Cut.

[0392] The source and drain regions are formed in the semiconductor layer 742, forming an electrode 744. a and the contact resistance between the electrode 744b and the semiconductor layer 742 can be reduced. To improve the electrical characteristics of transistors, such as field effect mobility and threshold voltage. can be done.

[0393] When a semiconductor such as silicon is used for the semiconductor layer 742, the semiconductor layer 742 and the electrode 744 a and between the semiconductor layer 742 and the electrode 744b, It is preferable to provide a layer that functions as an n-type semiconductor or a p-type semiconductor. , can function as a source or drain region of a transistor.

[0394] The insulating layer 729 has a function of preventing or reducing the diffusion of impurities from the outside into the transistor. It is preferable to form the insulating layer 729 using a material having the above-mentioned properties. It can also be omitted.

[0395] Note that in the case where an oxide semiconductor is used for the semiconductor layer 742, the insulating layer 729 is formed before or after the insulating layer 729 is formed. Heat treatment may be performed after the formation of the insulating layer 729 or before or after the formation of the insulating layer 729. The oxygen contained in the insulating layer 729 or other insulating layers is diffused into the semiconductor layer 742, The oxygen vacancies in the insulating layer 742 can be filled. Alternatively, the insulating layer 729 can be formed while being heated. This makes it possible to compensate for oxygen vacancies in the semiconductor layer 742.

[0396] Generally, the CVD method is a plasma CVD (PECVD) method that uses plasma. sma Enhanced CVD method, Thermal CVD (TCVD) Furthermore, depending on the source gas used, it can be classified into metal CVD (MCV) and other methods. D:Metal CVD) method, MOCVD:Metal Organi c CVD) method.

[0397] Generally, the deposition method includes resistance heating deposition, electron beam deposition, MBE (Molecular Beam Evaporation), and r Beam Epitaxy) method, PLD (Pulsed Laser Deposit) tion) method, IAD (Ion beam Assisted Deposition) These methods can be classified into three types: ALD (Atomic Layer Deposition) method, and ALD (Atomic Layer Deposition) method.

[0398] The plasma CVD method can produce high-quality films at relatively low temperatures. When using a deposition method that does not use plasma, such as the plasma deposition method, damage occurs to the deposition surface. This makes it possible to obtain a film with fewer defects.

[0399] Generally, the sputtering method is classified into DC sputtering method, magnetron sputtering method, sputtering method, RF sputtering method, ion beam sputtering method, ECR (Electron Cycling) on Cyclotron Resonance) sputtering method, facing targets It can be classified into methods such as sputtering.

[0400] In the facing target sputtering method, the plasma is confined between the targets. This reduces the plasma damage to the substrate. Since the incident angle of the sputtered particles to the substrate can be made shallow, the step coverage is improved. It can be improved.

[0401] The transistor 811 shown in FIG. 81A2 has a gate insulating layer 729 and a back gate electrode 729 formed thereon. The transistor 810 differs from the transistor 810 in that it has an electrode 723 that can function as a It may be formed from materials and in a manner similar to that of pole 746 .

[0402] In general, the back gate electrode is formed of a conductive layer, and the gate electrode and the back gate electrode form a semiconductor. The back gate electrode is disposed so as to sandwich the channel forming region of the gate electrode. The back gate electrode can be made to function in the same manner as the gate electrode. Alternatively, the potential may be a ground potential (GND potential) or an arbitrary potential. By changing the potential of the gate electrode independently of the potential of the gate electrode, the transistor can be The threshold voltage can be varied.

[0403] Both the electrode 746 and the electrode 723 can function as a gate electrode. Thus, the insulating layer 726, the insulating layer 728, and the insulating layer 729 each serve as a gate insulating layer. The electrode 723 is provided between the insulating layer 728 and the insulating layer 729. It is okay.

[0404] When one of the electrodes 746 and 723 is referred to as a "gate electrode," the other is referred to as a "transistor." For example, in the transistor 811, the electrode 723 is called a "gate electrode." When referring to the back gate electrode, the electrode 746 is referred to as the "back gate electrode." When the transistor 811 is used as a "top electrode," the transistor 811 is a top-gate type transistor. In addition, either the electrode 746 or the electrode 723 can be considered as a type of The first gate electrode is sometimes referred to as the "first gate electrode" and the other as the "second gate electrode."

[0405] By providing the electrode 746 and the electrode 723 with the semiconductor layer 742 interposed therebetween, By setting the potentials of the electrodes 46 and 723 at the same potential, carriers flow in the semiconductor layer 742. The area becomes larger in the film thickness direction, so the amount of carrier movement increases. As the on-state current of the transistor 811 increases, the field-effect mobility increases.

[0406] Therefore, the transistor 811 is a transistor having a large on-current relative to its area. That is, the area occupied by the transistor 811 is According to one embodiment of the present invention, the area occupied by a transistor can be reduced. Therefore, according to one embodiment of the present invention, a highly integrated semiconductor device can be realized. It is possible.

[0407] In addition, since the gate electrode and the back gate electrode are formed of a conductive layer, the outside of the transistor The function of preventing the electric field generated by the electrostatic discharge from acting on the semiconductor layer in which the channel is formed (especially the electrostatic discharge The back gate electrode is larger than the semiconductor layer. By forming the semiconductor layer in a thin layer and covering it with a back gate electrode, the electric field shielding function can be improved. do.

[0408] In addition, the electrodes 746 and 723 each have a function of blocking an electric field from the outside. Therefore, the electric charges of the charged particles generated on the insulating layer 772 side or above the electrode 723 are transferred to the semiconductor layer This does not affect the channel formation region of the MOSFET. As a result, stress tests (e.g., applying a load to the gate) -GBT (Gate Bias-Temperature) stress test In addition, the on-current starts to flow depending on the magnitude of the drain voltage. This can reduce the phenomenon that the gate voltage (start voltage) changes. The effect occurs when the electrodes 746 and 723 are at the same potential or at different potentials. .

[0409] The BT stress test is a type of accelerated test that detects the transitions that occur during long-term use. It is possible to evaluate the characteristic changes (aging) of transistors in a short time. The amount of change in the threshold voltage of a transistor before and after testing is an important indicator for investigating reliability. The smaller the threshold voltage fluctuation, the more reliable the transistor. do.

[0410] In addition, the electrodes 746 and 723 are provided, and the electrodes 746 and 723 are set to the same potential. By doing so, the amount of variation in the threshold voltage is reduced. At the same time, the variation in electrical characteristics is reduced.

[0411] In addition, a transistor with a back gate electrode has a positive charge applied to the gate +GB The change in threshold voltage before and after the T stress test was also Smaller than Zysta.

[0412] In addition, by forming the back gate electrode with a conductive film having a light shielding property, This prevents light from entering the semiconductor layer from the electrode side. This can prevent degradation of electrical characteristics such as a shift in the threshold voltage of a transistor. do.

[0413] According to one embodiment of the present invention, a highly reliable transistor can be provided. As a result, a highly reliable semiconductor device can be realized.

[0414] FIG. 81(B1) shows a channel protection transistor, which is one of the bottom gate transistors. 8 shows a cross-sectional view of transistor 820. Transistor 820 is similar to transistor 810. The difference is that an insulating layer 741 covers a semiconductor layer 742. In an opening formed by selectively removing a part of the insulating layer 741 overlapping the semiconductor layer 742, The semiconductor layer 742 and the electrode 744a are electrically connected to each other. In another opening formed by selectively removing a part of the insulating layer 741, the semiconductor layer 742 is The region of the insulating layer 741 that overlaps with the channel forming region is electrically connected to the electrode 744b. The region can function as a channel protection layer.

[0415] The transistor 821 shown in FIG. 81B2 has a back gate electrode over an insulating layer 729. The transistor 820 differs from the transistor 820 in that it has an electrode 723 that can function as a transistor.

[0416] By providing the insulating layer 741, the semiconductor generated during the formation of the electrodes 744a and 744b is prevented. Therefore, the formation of the electrodes 744a and 744b can be prevented. In some cases, thinning of the semiconductor layer 742 can be prevented.

[0417] In addition, the transistors 820 and 821 are the same as the transistors 810 and The distance between the electrodes 744a and 746 and the distance between the electrodes 744b and 746 are smaller than that of the transistor 811. The distance between the electrodes 744a and 746 is increased. In addition, the parasitic capacitance between the electrode 744b and the electrode 746 can be reduced. According to one embodiment of the present invention, a transistor with good electrical characteristics can be realized. can.

[0418] The transistor 825 shown in FIG. 81(C1) is a bottom-gate transistor. The transistor 825 is a channel etched transistor. The electrodes 744a and 744b are formed without using any of the electrodes 744a and 744b. A part of the semiconductor layer 742 that is exposed when the electrode 744b is formed may be etched. On the other hand, since the insulating layer 741 is not provided, productivity of the transistor can be increased.

[0419] A transistor 826 shown in FIG. 81C2 has a gate insulating layer 729 over which a back gate electrode is formed. The transistor 724 differs from the transistor 825 in that it has an electrode 723 that can function as a transistor.

[0420] [Top-gate transistor] FIG. 82(A1) shows a transistor 830, which is a type of top-gate transistor. Transistor 830 includes a semiconductor layer 742 over an insulating layer 772. An electrode 744 a in contact with a part of the semiconductor layer 742 and an insulating layer 772 are provided on the semiconductor layer 742 and the insulating layer 772. and an electrode 744b in contact with a part of the semiconductor layer 742. An insulating layer 726 is provided over the electrode 744 b , and an electrode 746 is provided over the insulating layer 726 .

[0421] The transistor 830 is connected to the electrodes 746 and 744a, and the electrodes 746 and Since the electrodes 746 and 744b do not overlap, the parasitic capacitance between the electrodes 746 and 744a, In addition, the parasitic capacitance occurring between the electrode 746 and the electrode 744b can be reduced. After the electrode 746 is formed, the electrode 746 is used as a mask to introduce impurities 755 into the semiconductor. By introducing the ions into the semiconductor layer 742, the ions are self-aligned in the semiconductor layer 742. An impurity region can be formed (see FIG. 82(A3)). According to one embodiment of the present invention, A transistor with good electrical characteristics can be realized.

[0422] The impurity 755 is introduced by an ion implantation device, an ion doping device, or a plasma This can be done using a processing device.

[0423] The impurities 755 are, for example, at least one of Group 13 elements or Group 15 elements. When an oxide semiconductor is used for the semiconductor layer 742, one type of element can be used. contains at least one of the following elements as impurities 755: rare gases, hydrogen, and nitrogen. It is also possible to use

[0424] The transistor 831 shown in FIG. 82A2 has an electrode 723 and an insulating layer 727. The transistor 831 is formed on an insulating layer 772. The electrode 723 has an insulating layer 727 formed thereon. The electrode 723 has The insulating layer 727 can function as a back gate electrode. The insulating layer 727 can function as a conductor. It can be formed more.

[0425] Like transistor 811, transistor 831 has a large on-state current relative to its area. In other words, for the required on-current, According to one embodiment of the present invention, the area occupied by the transistor 831 can be reduced. Therefore, according to one aspect of the present invention, a highly integrated semiconductor device can be manufactured. A conductor device can be realized.

[0426] The transistor 840 illustrated in FIG. 82B1 is a top-gate transistor. The transistor 840 is a semiconductor device after forming the electrodes 744a and 744b. The transistor 830 differs from the transistor 830 in that a dielectric layer 742 is formed. The transistor 841 has an electrode 723 and an insulating layer 727. In the transistor 840 and the transistor 841, the semiconductor layer 74 A portion of the semiconductor layer 742 is formed on the electrode 744a, and another portion of the semiconductor layer 742 is formed on the electrode 744b. It is done.

[0427] Like transistor 811, transistor 841 has a large on-state current relative to its area. In other words, for the required on-current, According to one embodiment of the present invention, the area occupied by the transistor 841 can be reduced. Therefore, according to one aspect of the present invention, a highly integrated semiconductor device can be manufactured. A conductor device can be realized.

[0428] The transistor 842 illustrated in FIG. 83(A1) is a top-gate transistor. The transistor 842 is formed by forming an insulating layer 729, and then The transistor 830 and the transistor 840 are different in that the electrode 744 is formed. a and the electrode 744b are semi-insulated in the openings formed in the insulating layer 728 and the insulating layer 729. It is electrically connected to the conductor layer 742 .

[0429] In addition, a portion of the insulating layer 726 that does not overlap the electrode 746 is removed, and the electrode 746 and the remaining insulating layer 726 are separated. Impurities 755 are introduced into the semiconductor layer 742 using the layer 726 as a mask, thereby forming a semiconductor A self-aligned impurity region can be formed in layer 742 ( In the transistor 842, the insulating layer 726 does not extend beyond the edge of the electrode 746. When the impurity 755 is introduced into the semiconductor layer 742, the semiconductor layer 74 The impurity concentration in the region where the impurity 755 is introduced through the insulating layer 726 of the second insulating layer 726 is The region where the impurity 755 is introduced without passing through the semiconductor layer 742 is smaller than the region where the impurity 755 is introduced without passing through the semiconductor layer 742. A lightly doped dummy layer (LDD) is formed in the area adjacent to the area overlapping with the electrode 746. in) region is formed.

[0430] The transistor 843 shown in FIG. 83A2 has an electrode 723. 42. The transistor 843 has an electrode 723 formed on a substrate 771. The electrode 723 overlaps with the semiconductor layer 742 with an insulating layer 772 interposed therebetween. It can function.

[0431] In addition, the transistor 844 shown in FIG. 83(B1) and the transistor 845 shown in FIG. As in the case of the stadium 845, the insulating layer 726 in the area not overlapping with the electrode 746 may be entirely removed. In addition, the transistor 846 shown in FIG. 83(C1) and the transistor 847 shown in FIG. The insulating layer 726 may be left in areas that do not overlap with the electrodes 746, such as the stanchions 847.

[0432] After forming the electrode 746, the transistors 842 to 847 are also formed with the electrode 74. 6 as a mask, impurities 755 are introduced into the semiconductor layer 742, forming a semiconductor layer 74 According to one aspect of the present invention, an impurity region can be formed in a self-aligned manner in the electric According to one embodiment of the present invention, a transistor having good characteristics can be realized. A highly integrated semiconductor device can be realized.

[0433] [s-channel transistor] FIG. 84 illustrates an example of a transistor structure in which an oxide semiconductor is used as the semiconductor layer 742. The transistor 850 illustrated in FIG. 84 has a semiconductor layer 742b on a semiconductor layer 742a. The upper surface of the semiconductor layer 742b and the side surfaces of the semiconductor layer 742b and the semiconductor layer 742a are The transistor 850 has a structure in which the semiconductor layer 742c is covered with the transistor 850. FIG. 84(B) is a cross-sectional view of the portion indicated by the dashed line X1-X2 in FIG. 84(A). FIG. 84(C) is a cross-sectional view in the channel length direction. 1 is a cross-sectional view (cross-sectional view in the channel width direction) of a portion indicated by a dashed dotted line.

[0434] The transistor 850 further includes an electrode 743 that functions as a gate electrode. The electrode 43 can be formed using the same material and method as the electrode 746. The electrode 743 is a laminate of two conductive layers.

[0435] The semiconductor layer 742a, the semiconductor layer 742b, and the semiconductor layer 742c are made of In or Ga. The material is typically made of In-Ga oxide (In and Ga In-Zn oxide (oxide containing In and Zn), In-M-Zn oxide (Oxide containing In, element M, and Zn. Element M is Al, Ti, Ga, Y, Zr, La , Ce, Nd, or Hf, which has a stronger bond with oxygen than In. It is a strong metallic element.

[0436] The semiconductor layer 742a and the semiconductor layer 742c are formed by the same metal element as that of the semiconductor layer 742b. Among them, it is preferable that the material contains one or more kinds of the same metal element. When such a material is used, the interface between the semiconductor layer 742a and the semiconductor layer 742b and the semiconductor This can make it difficult for interface states to be generated at the interface between the layer 742c and the semiconductor layer 742b. Therefore, scattering and capture of carriers at the interface are unlikely to occur, and the field effect migration of transistors is improved. It is also possible to reduce the variation in the threshold voltage of the transistor. Therefore, it is possible to realize a semiconductor device having good electrical characteristics. It becomes Noh.

[0437] The thickness of the semiconductor layer 742a and the semiconductor layer 742c is preferably 3 nm or more and 100 nm or less. The thickness of the semiconductor layer 742b is preferably 3 nm or more and 50 nm or less. 00 nm or less, preferably 3 nm or more and 100 nm or less, and more preferably 3 nm or more and 50 nm or less.

[0438] The semiconductor layer 742b is an In-M-Zn oxide. When the semiconductor layer 742c is also an In-M-Zn oxide, the semiconductor layer 742a and the semiconductor layer 74 2c is In:M:Zn=x1:y1:z1 [atomic ratio], and the semiconductor layer 742b is In:M: If the atomic ratio of Zn is x2:y2:z2, then y1 / x1 is greater than y2 / x2. The semiconductor layer 742a, the semiconductor layer 742c, and the semiconductor layer 742b are selected so as to Preferably, the ratio is set so that y1 / x1 is at least 1.5 times larger than y2 / x2. A conductive layer 742a, a semiconducting layer 742c, and a semiconducting layer 742b are selected. In other words, the semiconductor layer 742a and the semiconductor layer 742b are arranged so that y1 / x1 is at least twice as large as y2 / x2. More preferably, y1 / x1 is greater than or equal to y2 The semiconductor layer 742a, the semiconductor layer 742c and the semiconductor layer 742b are formed so as to be three times or more larger than / x2. When y1 is equal to or larger than x1, the transistor has stable electrical characteristics. However, if y1 is three times or more larger than x1, the field effect of the transistor As a result, the mobility is decreased, so y1 is preferably less than three times x1. By configuring the semiconductor layer 742a and the semiconductor layer 742c as described above, The semiconductor layer 742c can be a layer in which oxygen vacancies are less likely to occur than in the semiconductor layer 742b.

[0439] When the semiconductor layer 742a and the semiconductor layer 742c are made of In-M-Zn oxide, The content of In and element M, excluding Zn and O, is preferably 50 atomic % In. The element M is 50 atomic % or more, and more preferably, In is less than 25 atomic %. The element M is 75 atomic % or more. When it is an oxide, the content of In and element M, excluding Zn and O, is preferably 2. 5 atomic % or more, element M is less than 75 atomic %, and more preferably In is 34 atomic % or more, and element M is less than 66 atomic %.

[0440] For example, a semiconductor layer 742a containing In or Ga and a semiconductor layer 742b containing In or Ga Layer 742c: In:Ga:Zn=1:3:2, 1:3:4, 1:3:6, 1:6:4 In-Ga-Zn oxide formed using targets with atomic ratios of 1:9:6, etc. In-Ga oxide formed using targets with atomic ratios such as In:Ga=1:9 The semiconductor layer 742b may be made of In:G Atomic ratio of a:Zn=3:1:2, 1:1:1, 5:5:6, or 4:2:4.1 The In-Ga-Zn oxide formed using the target can be used. The atomic ratios of the conductor layer 742a, the semiconductor layer 742b, and the semiconductor layer 742c are The difference includes a variation of ±20% from the atomic ratio above.

[0441] In order to provide a transistor using the semiconductor layer 742b with stable electrical characteristics, The impurities and oxygen vacancies in the semiconductor layer 742b are reduced to make the semiconductor layer 742b highly intrinsic. It is preferable that the oxide semiconductor layer be an intrinsic or substantially intrinsic oxide semiconductor layer. In any case, the channel formation region in the semiconductor layer 742b is an oxide that can be regarded as intrinsic or substantially intrinsic. It is preferable that the layer is a semiconductor layer.

[0442] Note that an oxide semiconductor layer that can be regarded as substantially intrinsic has a carrier density But 8 x 10 11 pieces / cm 3 Less than 1 x 10 11 / cm 3 Less than or equal to 1×10 10 pieces / cm3 Less than 1 x 10 -9 pieces / cm 3 The oxide semiconductor This refers to the body layer.

[0443] FIG. 85 illustrates an example of a transistor structure in which an oxide semiconductor is used as the semiconductor layer 742. The transistor 822 illustrated in FIG. 85 has a semiconductor layer 742b on a semiconductor layer 742a. The transistor 822 is a bottom-gate transistor having a back gate electrode. It is a type of transistor. FIG. 85(A) is a top view of the transistor 822. FIG. B) is a cross-sectional view (channel length direction) of the portion indicated by the dashed line X1-X2 in FIG. 85(A). FIG. 85(C) is a cross-sectional view of the portion indicated by the dashed line Y1-Y2 in FIG. 85(A). 1 is a cross-sectional view of the semiconductor device (cross-sectional view in the channel width direction).

[0444] The electrode 723 provided on the insulating layer 729 is connected to the insulating layer 726, the insulating layer 728, and the insulating The layer 729 is electrically connected to the electrode 746 through an opening 747a and an opening 747b. Therefore, the same potential is supplied to the electrode 723 and the electrode 746. It is not necessary to provide either the opening 747a or the opening 747b. It is not necessary to provide both the opening 747a and the opening 747b. If neither is provided, electrode 723 and electrode 746 can be supplied with different potentials.

[0445] [Energy band structure of oxide semiconductors] Here, the semiconductor layer 742a, the semiconductor layer 742b, and the semiconductor layer 742c are stacked. The function and effect of the semiconductor layer 742 will be described with reference to FIG. 89(A) and FIG. The energy band structure shown in FIG. 89(A) is the same as that shown in FIG. 84(B). FIG. 89(A) shows the energy band structure of the portion indicated by the dashed line in FIG. 8 shows the energy band structure of the channel formation region of the transistor 850.

[0446] In Figure 89(A), Ec882, Ec883a, Ec883b, Ec883c, Ec88 6 are an insulating layer 772, a semiconductor layer 742a, a semiconductor layer 742b, and a semiconductor layer 742 c, The energy of the conduction band minimum of the insulating layer 726 is shown.

[0447] Here, the difference between the vacuum level and the conduction band minimum energy (also called "electron affinity") is The energy difference between the vacuum level and the top of the valence band (also called the ionization potential) The energy gap is calculated by subtracting the energy gap from the (For example, HORIBA JOBIN YVON UT-300) The energy difference between the vacuum level and the top of the valence band is also measured by ultraviolet photoelectron spectroscopy (UPS). Ultraviolet Photoelectron Spectroscopy Equipment (For example, PHI's VersaProbe) can be used for measurement.

[0448] The In- The energy gap of Ga-Zn oxide is about 3.5 eV and the electron affinity is about 4.5 eV. In addition, the In was formed using a target with an atomic ratio of In:Ga:Zn=1:3:4. The energy gap of Ga-Zn oxide is about 3.4 eV, and the electron affinity is about 4.5 eV. In addition, the I was formed using a target with an atomic ratio of In:Ga:Zn=1:3:6. The energy gap of n-Ga-Zn oxide is about 3.3 eV, and the electron affinity is about 4.5 eV. In addition, the film was formed using a target with an atomic ratio of In:Ga:Zn=1:6:2. The energy gap of In-Ga-Zn oxide is about 3.9 eV, and the electron affinity is about 4.3 e V. The target was formed with an atomic ratio of In:Ga:Zn=1:6:8. The energy gap of the In-Ga-Zn oxide is about 3.5 eV and the electron affinity is about 4.4 The atomic ratio of In:Ga:Zn was 1:6:10. The energy gap of the synthesized In-Ga-Zn oxide is about 3.5 eV, and the electron affinity is about 4 0.5 eV. In addition, a target with an atomic ratio of In:Ga:Zn=1:1:1 was used. The energy gap of the formed In-Ga-Zn oxide is about 3.2 eV, and the electron affinity is about The atomic ratio of the target was In:Ga:Zn=3:1:2. The energy gap of the In-Ga-Zn oxide formed by this method is about 2.8 eV, and the electron affinity is It is about 5.0 eV.

[0449] Since the insulating layer 772 and the insulating layer 726 are insulators, Ec882 and Ec886 are It is closer to the vacuum level than Ec83a, Ec83b, and Ec883c (having smaller electron affinities). ).

[0450] Also, Ec883a is closer to the vacuum level than Ec883b. a is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more than Ec883b 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less A temperature close to the vacuum level is preferred.

[0451] Also, Ec883c is closer to the vacuum level than Ec883b. c is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more than Ec883b 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less A temperature close to the vacuum level is preferred.

[0452] In addition, in the vicinity of the interface between the semiconductor layer 742a and the semiconductor layer 742b and in the vicinity of the interface between the semiconductor layer 742a and the semiconductor layer 742b, In the vicinity of the interface between the semiconductor layer 742c and the semiconductor layer 742b, a mixed region is formed, so that the energy The energy changes continuously. That is, at these interfaces, the levels are almost nonexistent. do not have.

[0453] Therefore, in the stacked structure having the above energy band structure, the electrons are Therefore, the interface between the semiconductor layer 742a and the insulating layer 772 Or, even if a level exists at the interface between the semiconductor layer 742c and the insulating layer 726, the level The position of the semiconductor layer 742a and the semiconductor layer 742b hardly affects the movement of electrons. There is almost no level at the interface and at the interface between the semiconductor layer 742c and the semiconductor layer 742b. Therefore, the oxide does not hinder the movement of electrons in the region. A transistor having a semiconductor stack structure can achieve high field-effect mobility. .

[0454] As shown in FIG. 89A, the interface between the semiconductor layer 742a and the insulating layer 772 and the semiconductor In the vicinity of the interface between the conductor layer 742c and the insulating layer 726, there are trap levels 8 due to impurities and defects. 90 may be formed, but the semiconductor layer 742a and the semiconductor layer 742c are present. This can distance the semiconductor layer 742b from the trap levels.

[0455] In particular, in the transistor exemplified in this embodiment, the upper surface and the side surface of the semiconductor layer 742b are semiconductor. The lower surface of the semiconductor layer 742b is in contact with the semiconductor layer 742a. In this manner, the semiconductor layer 742b is covered with the semiconductor layer 742a and the semiconductor layer 742c. By doing so, the influence of the trap levels can be further reduced.

[0456] However, the energy difference between Ec883a or Ec883c and Ec883b is small. In this case, electrons in the semiconductor layer 742b may exceed the energy difference and reach the trap level. When electrons are captured in the trap level, a negative fixed charge is generated at the interface of the insulating layer. , the threshold voltage of the transistor shifts in the positive direction.

[0457] Therefore, the energy difference between Ec883a and Ec883c and Ec883b is If these are set to 0.1 eV or more, preferably 0.15 eV or more, the threshold voltage of the transistor Since the voltage fluctuation is reduced and the electrical characteristics of the transistor can be improved, preferable.

[0458] The band gaps of the semiconductor layer 742a and the semiconductor layer 742c are It is preferable that the band gap is wider than that of 2b.

[0459] FIG. 89(B) shows the energy band of the portion indicated by the dashed line D3-D4 in FIG. 85(B). FIG. 89(B) shows the energy balance of the channel formation region of the transistor 822. The figure shows the block structure.

[0460] In FIG. 89(B), Ec887 indicates the energy of the bottom of the conduction band of the insulating layer 728. By forming the semiconductor layer 742 into two layers, the semiconductor layer 742a and the semiconductor layer 742b, In addition, since the semiconductor layer 742c is not provided, the trap level can be reduced. Although it is easily affected by the potential 890, the semiconductor layer 742 has a higher potential than the single-layer structure. Field effect mobility can be achieved.

[0461] According to one embodiment of the present invention, a transistor with little variation in electrical characteristics can be realized. Therefore, a semiconductor device with little variation in electrical characteristics can be realized. According to one embodiment of the present invention, a highly reliable transistor can be realized. It is possible to realize a highly reliable semiconductor device.

[0462] In addition, oxide semiconductors have a large energy gap of 3.0 eV or more, and are highly sensitive to visible light. In addition, the transistor obtained by processing the oxide semiconductor under appropriate conditions has a high transmittance. In this case, the off-state current is 100zA (1 ×10 -19 A) or less, or 10zA (1×10 -20 A) or less, and even 1zA( 1×10 -21 A) or less. Therefore, a semiconductor device with low power consumption can be obtained. can be provided.

[0463] According to one embodiment of the present invention, a transistor with low power consumption can be realized. As a result, a semiconductor device such as a display element or a display device with low power consumption can be realized. Alternatively, a semiconductor device such as a display element or a display device with high reliability can be realized.

[0464] Returning to the description of the transistor 850 shown in FIG. By providing the semiconductor layer 742b, the side surface of the semiconductor layer 742b can also be covered with the electrode 743. That is, in the transistor 850, the semiconductor layer 742 is turned on by the electric field of the electrode 743. b is electrically surrounded by the electric field of the conductive film. The structure of the transistor that electrically surrounds the semiconductor layer in which the channel is formed is called the surr This is called the ounded channel (s-channel) structure. A transistor with a .nel structure is called an "s-channel transistor" or " It is also called an "s-channel transistor."

[0465] In the s-channel structure, a channel is formed in the entire (bulk) of the semiconductor layer 742b. In the s-channel structure, the drain current of the transistor can be increased. In addition, the electric field of the electrode 743 can be used to obtain a larger on-state current. As a result, the entire channel formation region formed in the semiconductor layer 742b can be depleted. Therefore, in the s-channel structure, the off-state current of the transistor can be further reduced. It is possible.

[0466] In addition, by making the protrusion of the insulating layer 772 high and reducing the channel width, the s-ch The tunnel structure can increase the on-current and reduce the off-current. In addition, when forming the semiconductor layer 742b, the exposed semiconductor layer 742a may be removed. In this case, the side surfaces of the semiconductor layer 742a and the semiconductor layer 742b may be aligned.

[0467] In addition, as in a transistor 851 shown in FIG. 86, an insulating layer is provided below a semiconductor layer 742. An electrode 723 may be provided through the transistor 851. FIG. FIG. 86(B) is a cross-sectional view of the portion indicated by the dashed line X1-X2 in FIG. 86(A). FIG. 86(C) is a cross-sectional view of a portion indicated by a dashed line Y1-Y2 in FIG. 86(A).

[0468] Also, as in the case of a transistor 852 shown in FIG. 87, an insulating layer 775 is provided above the electrode 743. A layer 725 may be provided over the insulating layer 775. FIG. 87(B) is a top view of the portion indicated by the dashed line X1-X2 in FIG. 87(A). FIG. 87(C) is a cross-sectional view of the portion indicated by the dashed line Y1-Y2 in FIG. 87(A). FIG.

[0469] In FIG. 87, the layer 725 is provided on the insulating layer 775, but it may be provided on the insulating layer 728 or The layer 725 may be formed over the insulating layer 729. It is possible to prevent the characteristics of the transistor from changing due to light irradiation, and the reliability from decreasing. The layer 725 is formed to be at least larger than the semiconductor layer 742b, and the layer 725 is formed to cover the semiconductor layer 742. By covering b, the above effect can be enhanced. The layer 725 may be made of a conductive material. In this case, layer 725 may be supplied with a voltage or may be left in an electrically floating state. It is also possible to use the following.

[0470] FIG. 88 shows an example of a transistor having an s-channel structure. The transistor 848 has a configuration similar to that of the transistor 847 described above. In the transistor 848 , the semiconductor layer 742 is formed on a protrusion provided in an insulating layer 772 . The transistor 848 is a type of top-gate transistor with a back gate electrode. FIG. 88(A) is a top view of a transistor 848. FIG. 88(B) is a top view of a transistor 848. FIG. 88(C) is a cross-sectional view of the portion indicated by the dashed line X1-X2 in FIG. 88(A). ) is a cross-sectional view of the portion indicated by the dashed dotted line Y1-Y2 in FIG.

[0471] The electrode 744a provided on the insulating layer 729 is connected to the insulating layer 726, the insulating layer 728, and the insulating layer 729. An opening 747c is provided in the edge layer 729, and the semiconductor layer 742 is electrically connected to the opening 747c. The electrode 744b provided on the insulating layer 729 is formed by insulating layers 726, 728, In addition, an opening 747d is provided in the insulating layer 729, and the insulating layer 729 is electrically connected to the semiconductor layer 742. It has been done.

[0472] The electrode 743 provided on the insulating layer 726 is a metal oxide film provided on the insulating layer 726 and the insulating layer 772. The openings 747a and 747b are electrically connected to the electrode 723. Therefore, the same potential is supplied to the electrode 746 and the electrode 723. It is not necessary to provide either the opening 747a or the opening 747b. It is not necessary to provide both the openings 747a and 747b. In this case, different potentials can be applied to the electrodes 723 and 746.

[0473] The semiconductor layer used in the transistor having the s-channel structure is an oxide semiconductor. It is not limited to the body.

[0474] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. It is Noh.

[0475] (Embodiment 4) In this embodiment, a display device according to one embodiment of the present invention or a display module having a touch panel will be described. The module and electronic device will be described with reference to FIGS. 90 to 92.

[0476] The display module 8000 shown in FIG. 90 includes an upper cover 8001 and a lower cover 8002. Between them, the touch panel 8004 connected to the FPC 8003, the frame 8009, and the printer The device has a substrate 8010 and a battery 8011.

[0477] The touch panel of one embodiment of the present invention can be used for the touch panel 8004, for example. do.

[0478] The upper cover 8001 and the lower cover 8002 are designed to fit the size of the touch panel 8004. The shape and dimensions can be changed appropriately.

[0479] The touch panel 8004 is a resistive or capacitive touch panel. In addition, the opposing substrate (sealing substrate) of the touch panel 8004 can be used by overlapping it with the It is also possible to provide a touch panel function. It is also possible to provide an optical sensor in each pixel of the display 4 to make it into an optical touch panel.

[0480] In addition, when a transmission type liquid crystal element is used, as shown in FIG. The backlight 8007 has a light source 8008. In the above example, the light source 8008 is disposed above the backlight 8007. For example, a light source 8008 is disposed at the end of the backlight 8007, and a light diffusion layer is disposed on the light source 8008. A diffuser plate may be used. When a self-luminous light-emitting element such as an organic EL element is used, In the case of a reflective panel, the backlight 8007 is not provided. This is also fine.

[0481] The frame 8009 protects the touch panel 8004 and also supports the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation. The frame 8009 may function as a heat sink.

[0482] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal, and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. , this can be omitted when using a commercial power source.

[0483] In addition, the touch panel 8004 includes additional components such as a polarizing plate, a retardation plate, and a prism sheet. It may also be provided as such.

[0484] 91(A) to (H) and 92 are diagrams showing electronic devices. These electronic devices are Housing 5000, display unit 5001, speaker 5003, LED lamp 5004, operation key 5 005 (including a power switch or an operation switch), a connection terminal 5006, and a sensor 5007 (force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemicals quality, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, (including a function to measure light or infrared rays), microphone 5008, etc. can be done.

[0485] FIG. 91(A) shows a mobile computer, which in addition to the above includes a switch 5009 , infrared port 5010, etc. FIG. 91(B) shows a mobile phone equipped with a recording medium. A portable image reproducing device (e.g., a DVD reproducing device) and, in addition to the above, the following devices are also included: The display unit 5002, the recording medium reading unit 5011, etc. The vision device may include, in addition to the above, a stand 5012 and the like. The television device can be operated using an operation switch provided in the housing 5000 or a separate remote control. The remote control unit 5013 has an operation key. This allows you to control the channel and volume, and manipulate the image displayed on the display unit 5001. In addition, the remote control operation device 5013 can be operated by the remote control operation device 5013. A display unit for displaying information output from the portable game device may be provided. In addition to the above, the device may also include a recording medium reading unit 5011. 91(E) is a digital camera with a television receiving function, and in addition to the above, 5014, a shutter button 5015, an image receiving unit 5016, etc. 1(F) is a portable gaming machine, which, in addition to the above, has a second display unit 5002, a recording medium reader / writer, FIG. 91(G) shows a portable television receiver. In addition to the above, a charger 5017 capable of transmitting and receiving signals may be included. FIG. 91(H) shows a wristwatch type information terminal, which, in addition to the above, includes a band 5018, a clasp, etc. The housing 5000, which also serves as a bezel, may have a clasp 5019, etc. The display unit 5001 has a non-rectangular display area. icon 5020, other icons 5021, etc. can be displayed. This is a digital signage. ) is a digital signage mounted on a cylindrical pillar.

[0486] The electronic devices shown in FIGS. 91(A) to (H) and 92 can have various functions. For example, functions to display various information (still images, videos, text images, etc.) on the display, Touch panel function, calendar, date or time display function, various software ( A function to control processing by a program, wireless communication function, and various functions using wireless communication function Functions for connecting to computer networks, transmitting various data using wireless communication functions, The function of receiving the data is to read out the program or data recorded on the recording medium and display it on the display unit. Furthermore, in electronic devices having multiple display units, In this case, one display section is used mainly to display image information and another display section is used mainly to display text information. A function to display information on the screen, or a function to display images that take parallax into account on multiple displays to create a stereoscopic image. Furthermore, in electronic devices having an image receiving unit, The camera has the functions of taking still images, taking videos, and automatically or manually correcting the captured images. The function of storing the captured images on a recording medium (external or built-in to the camera) It can have a function to display an image on a display unit. The functions that the electronic device shown in FIG. 92 can have are not limited to these, and various functions may be possible. It is possible to have.

[0487] The electronic device of the present embodiment is characterized in that it has a display unit for displaying some information. The touch panel of one embodiment of the present invention can be used for the display portion.

[0488] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination. [Explanation of symbols]

[0489] 10 Touch Panel 11 Substrate 12 Substrate 13 FPC 14 Conductive layer 15 Connectivity Layer 20 Liquid crystal element 21 Conductive layer 22 Conductive layer 23 Liquid crystal 31 Colored layer 41 Conductive layer 41a Conductive layer 41b Conductive layer 51 Pixel electrode 52 Common electrode 55 Sensor Electrode 56 Sensor Electrode 57 Wiring 61 Wiring 62 Wiring 63 Transistor 64 Liquid crystal element 65_1 Block 65_2 Block 66 Wiring 71 Wiring 71_1 Wiring 71_2 Wiring 72 Wiring 72_1 Wiring 72_2 Wiring 81 Source Line 82 Source Line 83 Source Line 84 Source Line 85 Gate Line 86 Gate Line 87 Gate Line 88 Gate Line 151 Adhesive layer 201 Transistor 202 Light emitting element 203 Transistor 206 Connection 207 Conductive Layer 208 Liquid crystal element 209 Connection Layer 211 Insulating layer 212 Insulating layer 213 Insulating Layer 214 Insulating layer 215 Insulating Layer 216 Spacer 217 Insulating Layer 231 Colored layer 232 Light blocking layer 251 Conductive Layer 252 Conductive layer 253 Liquid Crystal 254 Insulating layer 255 Insulation Layer 262 areas 263 areas 281 Gate electrode 282 Gate electrode 283 Gate electrode 284 Gate electrode 285 Drain electrode 310 Touch Panel 321 Conductive Layer 322 EL layer 323 Conductive Layer 324 Optical adjustment layer 331 Conductive Layer 332 Conductive Layer 335 Conductive Layer 341 Conductive Layer 351 Conductive Layer 352 Conductive layer 371 Substrate 372 Substrate 373 FPC 373a FPC 373b FPC 374 IC 381 Display section 382 Drive circuit 383 Wiring 384 Drive circuit 385 Connection 386 Connectors 401 Conductive layer 402 Conductive layer 404 Conductive layer 405 Conductive Layer 411a Conductive layer 411a_1 Conductive layer 411aa Conductive layer 411b Conductive layer 411b_1 Conductive layer 411bb conductive layer 411c conductive layer 412a conductive layer 412aa conductive layer 412b Conductive layer 412bb conductive layer 412c conductive layer 500A display device 500B display unit 510 Pixel section 511 pixels 520_1 Gate driver 520_2 Gate driver 530 Source Driver 531 TAB Tape 532_k Source Driver IC 532_1 Source driver IC 601 Pulse voltage output circuit 602 Current Detection Circuit 603 capacity 621 Electrode 622 Electrode 723 Electrode 725 layers 726 Insulating Layer 727 Insulation Layer 728 Insulating Layer 729 Insulation Layer 741 Insulation Layer 742 Semiconductor layer 742a Semiconductor layer 742b Semiconductor layer 742c Semiconductor layer 743 Electrode 744a electrode 744b electrode 746 Electrode 747a aperture 747b aperture 747c aperture 747d aperture 755 Impurities 771 Circuit Board 772 Insulation Layer 775 Insulation Layer 810 Transistor 811 Transistor 820 Transistor 821 Transistor 822 Transistor 825 Transistor 826 Transistor 830 Transistor 831 Transistor 840 Transistor 841 Transistor 842 Transistor 843 Transistor 844 Transistor 845 Transistor 846 Transistor 847 Transistor 848 Transistor 850 Transistors 851 Transistor 852 Transistor 882 Ec 883a Ec 883b Ec 883c Ec 886Ec 887 Ec 890 Trap Level 5000 cabinet 5001 Display section 5002 Display section 5003 Speaker 5004 LED Lamp 5005 Operation key 5006 Connection terminal 5007 Sensor 5008 Microphone 5009 Switch 5010 Infrared port 5011 Recording medium reading unit 5012 Stand 5013 Remote control device 5014 Antenna 5015 Shutter button 5016 Image receiving unit 5017 charger 5018 Band 5019 Clasp 5020 Icon 5021 Icon 8000 Display Module 8001 Top cover 8002 Lower cover 8003 FPC 8004 Touch Panel 8007 Backlight 8008 light source 8009 Frame 8010 Printed Circuit Board 8011 Battery

Claims

1. A substrate; a semiconductor layer having a region located above the substrate; a gate electrode having a region overlapping the semiconductor layer; a first insulating layer having a region located above the gate electrode; a source or drain electrode having a region located above the first insulating layer; a second insulating layer having a region located above the source electrode or a region located above the drain electrode; a first conductive layer having a region overlying the second insulating layer; a third insulating layer having a region overlying the first conductive layer; a second conductive layer having a region located above the third insulating layer; the first conductive layer has a region that functions as one electrode of a touch sensor; the first conductive layer is electrically connected to a third conductive layer; the third conductive layer is located in the same layer as the source electrode or the drain electrode and has the same material as the source electrode or the drain electrode; the second conductive layer has a region that functions as a pixel electrode, the second conductive layer has a slit; The second conductive layer is electrically connected to one of the source electrode and the drain electrode.

2. In claim 1, A display device, wherein the first conductive layer, the second conductive layer, and the third conductive layer have an area located above the substrate.

Images