Shape memory thermal capacitor and related methods

Abstract

An electronics assembly is disclosed that includes a thermal capacitor. The electronics assembly includes an electronics substrate that includes one or more insulating layers and one or more conductive layers disposed along the one or more insulating layers. The one or more conductive layers include a conductive material. A shape memory thermal capacitor is received within the electronics substrate. The shape memory thermal capacitor includes a shape memory core that includes a shape memory material.

Description

[Technical field]

[0001] This patent application claims the benefit of priority to U.S. Patent Application No. 16 / 900,390, filed June 12, 2020, which is incorporated herein by reference in its entirety.

[0002] This document relates generally, but not exclusively, to thermal management of electronic devices. [Background technology]

[0003] An electronic device includes an electronics substrate, such as a printed wiring board (PWB) or printed circuit board (PCB). Dielectric (insulating) layers are stacked with intervening layers of conductive traces that electrically interconnect with devices coupled to the PWB. In some examples, interconnecting conductive vias extend through the dielectric layers to communicate between the conductive traces and devices through one or more layers of the PWB. The devices coupled to the PWB include electronic components such as semiconductors, processors, memories, amplifiers, radio frequency (RF) components, microwave components, power switching devices, or the like. The devices are mechanically coupled to the PWB and electrically (and mechanically) coupled to the conductive traces and conductive vias.

[0004] Devices coupled to a printed wiring board generate heat, which is dissipated from the device and conducted to other devices through the printed wiring board. Devices operate more reliably and more efficiently when cool, and therefore performance decreases with heat. Printed wiring boards, which contain dielectrics (insulators), are generally poor conductors of heat, and heat generated by the devices is retained by the devices.

[0005] In some cases, heat transfer from the device is assisted using fans that pull warm ambient air from around the device and printed wiring board while drawing in cooler (ambient) air. In other cases, a material, such as a thermal interface material (TIM), couples the device to heat transfer enhancing features, such as an array of fins or posts, that increase the surface area of ​​the device to enhance heat transfer from the device.

[0006] In another example, copper metal tabs or 'coins' are embedded in the printed wiring board. The copper coins absorb heat from the devices relatively better than the PWB itself. For example, copper has a specific heat of 0.385 J / g°C, and therefore absorbs 0.385 Joules per gram of copper coin for every 1°C change in temperature. When conductively heated by devices on the printed wiring board, the copper coins absorb this heat and dissipate it over time into the surrounding PWB material. Summary of the Invention

[0007] The inventors have specifically recognized that the problem to be solved involves maximizing the ability to dissipate heat from electronic devices, including those that generate significant heat for short periods of time (e.g., transient modes of operation). These electronic devices, such as high power RF components, amplifiers, or the like, generate significant heat. These heated components operate less efficiently and, in some cases, fail.

[0008] Previous heat absorption and transport mechanisms do not adequately absorb heat from a device. For example, in an example involving a device with a maximum operating temperature of 150°C, a metal coin (e.g., copper) with a specific heat of 0.385 J / g°C has a corresponding sensible heat absorption of 49.67 J / g (relative to room temperature of 21°C). Sensible heat absorption is a measure of the heat absorption ability or heat capacity of a metal coin. The metal coin is embedded in a printed wiring board and overplated with a material (e.g., copper) that is common to the conductive traces and the coin. When absorbing heat from a device, such as an amplifier or other RF component operating in a transient operating mode of 13-30 seconds or more, enough heat is generated within 6 seconds or less to saturate the heat capacity of the metal coin (as shown here). Because the metal coin subsequently absorbs very little heat, the temperature of the device quickly rises above the maximum operating temperature of 150°C, degrading the operation of the device. As shown here, within 10 seconds the device temperature rises to nearly 185° C., sufficient to prevent efficient operation of the device and potentially cause a failure event.

[0009] The present subject matter provides a solution to this problem with shape memory thermal capacitors, which provide (one or more) solid-to-solid (including single or multiple) phase transitions that facilitate heat absorption by utilizing latent heat storage in addition to sensible heat absorption, and correspondingly provide practical specific heat capacities that are superior to metal coins (such as the copper coins mentioned above). As described herein, shape memory thermal capacitors provide enhanced heat absorption, thereby helping associated electronic devices operate for longer at reduced temperatures.

[0010] Shape memory thermal capacitors include a shape memory core, for example comprising a nickel alloy (e.g., a nickel titanium alloy such as Nitinol, a ternary shape memory alloy such as NiTiCu), where the solid-to-solid phase change (e.g., martensite to austenite) absorbs heat in addition to the sensible heat absorption that occurs above and below the phase transition temperature (or phase transition temperatures in the case of a ternary alloy).

[0011] In some examples, the shape memory thermal capacitors described herein provide an effective capacity that is at least an order of magnitude greater than that of metal coins, such as copper coins. For example, the shape memory thermal capacitors described herein provide a latent heat of 28.56 J / g°C over a small temperature range (5-10°C). In comparison, the 0.385 J / g°C of the copper coin example would require a 74.2°C increase in temperature to achieve the same thermal energy storage density (28.56 J / g). Thus, the shape memory thermal capacitors provide a significantly increased heat absorption capacity compared to other embedded coins, such as copper coins. Thus, a device benefiting from a proximate embedded shape memory thermal capacitor can operate in a temporary mode of operation that includes temperatures close to a specified maximum operating temperature for the entire duration of the temporary operation, such as 13-30 seconds, without exceeding this temperature. In other examples, the device operates below the specified maximum operating temperature for a significant portion of the temporary operation, while exceeding the temperature for a smaller portion of the temporary operation compared to previous metal coins, such as copper coins.

[0012] In some instances, the shape memory core of the thermal capacitor is not easily integrated into a printed wiring board. For example, a printed wiring board includes conductive traces or vias, which often include a matching conductive material, such as copper. A copper coin bonds easily with a matching conductive material. However, as described herein, a copper coin does not provide sufficient thermal capacity for many devices, especially those that have relatively high operating temperatures during transient operation.

[0013] The shape memory thermal capacitor includes an interface jacket that couples to both the shape memory core and a conductive component of a printed wiring board. The interface jacket includes a matching conductive material, such as copper, to the conductive material of the printed wiring board. Additionally, the interface jacket isolates the shape memory core from the printed wiring board, thereby facilitating processing of the printed wiring board.

[0014] In another example, the interface jacket reduces the processing complexity of the shape memory material. For example, titanium oxide that grows along the shape memory material prevents the shape memory material from bonding with other components, including copper. The interface jacket includes a seed layer, such as nickel plated using an electroless process, that bonds easily with the shape memory material. This plated nickel acts as a seed layer to facilitate overplating with a variety of other metals. A bond layer encases the seed layer and the shape memory core. The bond layer includes a conductive material that matches (e.g., is the same, includes one or more matching components that bond with each other, or is similar enough to facilitate bonding) the conductive material of the printed wiring board, and therefore bonds easily with the conductive material of the board.

[0015] Optionally, one or more layers are interposed between the shape memory core and the bond layer. One example of another layer is a ductile interface layer interposed between the seed layer and the bond layer. In this example, the ductile interface layer provides a protective layer for the shape memory core and the seed layer, and the seed layer maintains isolation between the ductile interface layer and the shape memory core. For example, electroless plated nickel used in the seed layer is brittle and prone to cracking. The ductile interface layer encapsulates the shape memory core and the seed layer with a protective layer that minimizes cracking and maintains a strong interface between the shape memory core and the surrounding bond layer even in the event of seed layer cracking. Ductile interface layers include, but are not limited to, electrolytically plated materials, such as electrolytically plated nickel.

[0016] The interface jacket allows the shape memory thermal capacitor to be embedded into modern printed circuit boards that contain electrical conductors such as copper, and easily couples with the board's conductive components. Additionally, the shape memory thermal capacitor provides enhanced thermal capacity compared to other embedded heat transfer mechanisms such as previous metal coins.

[0017] This Summary is intended to provide an overview of the subject matter of the present patent application. It is not intended to provide an exclusive or exhaustive description of the invention. The Detailed Description is included to provide further information regarding the present patent application. [Brief description of the drawings]

[0018] The drawings are not necessarily drawn to scale, and in the drawings, like components in different figures may be described with like reference numerals. Different instances of like components may be represented by like reference numerals with different suffixes. The drawings illustrate various embodiments discussed in the present document, generally by way of example, and not by way of limitation. [Figure 1] FIG. 1 is a perspective view of an electronics assembly including an example shape memory thermal capacitor. [Figure 2A] FIG. 2 is a perspective view of an example of the shape memory thermal capacitor shown in FIG. 1. [Figure 2B] FIG. 2B is a cross-sectional view of the shape memory thermal capacitor of FIG. 2A. [Diagram 3] FIG. 1 is a cross-sectional view of an example unitary coin with example stacks of shape memory thermal capacitors. [Figure 4] FIG. 3 is a temperature versus time plot for an example electronics assembly including the shape memory thermal capacitor of FIGS. 2A and 2B. [Figure 5A] FIG. 1 is a perspective view of an electronics assembly including another example shape memory thermal capacitor in an electronics substrate adjacent to a device. [Figure 5B] FIG. 13 is a perspective view of an electronics assembly including an additional example shape memory thermal capacitor having an irregular shape. [Figure 5C] FIG. 1 is a perspective view of an electronics assembly including a shape memory thermal capacitor in interconnect with a device in accordance with one supplemental example. [Figure 6] FIG. 1 is a block diagram illustrating an example of a method for manufacturing an electronics assembly. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] FIG. 1 is a perspective view of an example of an electronics assembly 100 including one or more electronic devices 108 coupled to an electronics substrate 102, such as a printed wiring board (PWB), printed circuit board (PCB), or the like. The electronics substrate 102, in this example, includes one or more conductive layers 106 interposed between insulating layers 104. The insulating layers 104 include dielectrics including, but not limited to, glass-filled epoxy (e.g., FR-4), porcelain, mica, glass, polymers, metal oxides, or the like. The conductive layers 106 include one or more conductive traces, pads, or the like. For example, the conductive layers 106 include patterned copper traces, pads, or vias for interconnecting with devices. Optionally, one or more conductive vias extend between two or more conductive layers 106 to interconnect devices, conductive traces, pads, or the like, for example with plated copper in via recesses.

[0020] The electronic devices 108 shown in FIG. 1 include, but are not limited to, electronic devices that may experience performance degradation or failure at temperatures above a specified operating temperature, a maximum operating temperature, or the like. In other examples, the electronic devices 108 include devices that may experience an operational enhancement for a period of time (e.g., a temporary operating mode lasting 13-30 seconds or more) with a corresponding significant heat generation. At temperatures above a specified or maximum operating temperature, these devices may experience performance degradation or even fail if a performance enhancement is specified for the temporary period of time. The electronic devices 108 include, but are not limited to, high power RF components (e.g., gallium arsenide microwave integrated devices), power switching devices, semiconductors, amplifiers, processors, memories, motherboards, or the like.

[0021] 1 , an electronic device 108 coupled to the electronics substrate 102 generates heat. In some examples, a thermal exhaust cover 112 surrounds the device 108 and, optionally, a portion of the electronics substrate 102. Heat generated by the device 108 is conducted through the electronics substrate 102 to the portion of the thermal exhaust cover 112 coupled to the substrate, and then through the cover 112 to a heat transfer element, such as a cold plate 114 or other element including fins, a fan, or a coolant array.

[0022] The insulating layer 104 is in most instances a poor thermal conductor. Thus, heat generated by the device 108 can easily accumulate in the vicinity of the device 108, causing it to operate at elevated temperatures that can degrade performance or even cause failure. In some instances, metal tabs, such as copper 'coins', are embedded in the electronics substrate 102 in close proximity to the electronic device 108 to absorb heat from the device 108, store the diverted heat, and gradually dissipate the heat through the electronics substrate 102. The metal tabs diverte heat from the electronic device 108, helping the electronic device operate at lower temperatures. However, as described herein, while the metal tabs absorb some heat, in some instances they are unable to diverte, absorb, or store enough heat in an enhanced manner to allow temporary operation of the electronic device 108 without exceeding a specified or maximum operating temperature, allowing for increased performance when needed.

[0023] The shape memory thermal capacitor 110 shown in Figure 1 provides enhanced heat absorption and storage to facilitate enhanced operation of an electronic device below a specified or maximum operating temperature for a temporary period of time. As shown in Figure 1, the shape memory thermal capacitor 110 is in close proximity to the electronic device 108. For example, the shape memory thermal capacitor 110 is embedded in the electronics substrate 102 below the electronic device 108. As shown and described herein, in other examples, a shape memory thermal capacitor having one or more capacitor profiles (e.g., size, shape, or the like) is coupled to the electronics substrate 102 at a location close to or remote from the electronic device (e.g., using an interconnecting thermal duct).

[0024] As described herein, the shape memory thermal capacitor 110 includes a shape memory alloy having one or more phase changes that enhance the heat absorption and storage of the capacitor. The phase changes correspond to a phase change between solid phases of the shape memory alloy caused by heating the capacitor 110. The shape memory thermal capacitor 110 includes a shape memory core including a shape memory material, such as nickel titanium alloys (e.g., NiTi, NiTiCu) or the like. In other examples, the shape memory core includes, but is not limited to, NiTi, NiTiCu, AgCd, AuCd, CoNiAl, CoNiGa, CuAlBeX (X: Zr, B, Cr, Gd), CuAlNi, CuAlNiHf, CuSn, CuZn, CuZnX (X: Si, Al, Sn), FeMnSi, FePt, MnCu, NiFeGa, NiTiHf, NiTiPd, NiMnGa, TiNb, NiTiZr. Shape memory materials include binary and ternary shape memory materials that have two or more phases and therefore have one or more phase changes when heated. The shape memory thermal capacitor 110 thereby provides enhanced heat absorption over a metal tab (e.g., copper) because the specific heat capacity of the capacitor is combined with the latent heat of the capacitor provided by the phase change of the shape memory material. In contrast, the metal tab described herein absorbs heat based on its specific heat capacity, but does not provide additional heat absorption based on the latent heat of a shape memory material with one or more phase changes.

[0025] In operation, the shape memory thermal capacitor 110 absorbs heat emitted from the associated electronic device(s) 108 to minimize the temperature of the device 108, for example, to ensure operation of the electronic device 108 at or below a specified or maximum operating temperature during the temporary operation (including through a portion of the temporary operation). The shape memory thermal capacitor 110 absorbs heat based on the specific heat capacity of the capacitor material (e.g., shape memory core or interface jacket, etc.). As the temperature of the capacitor 110 increases (with further heat absorption), one or more phase change temperatures are reached. The shape memory core continues to absorb heat while undergoing one or more shape memory phase changes. After the phase change(s) are complete, the shape memory core continues to absorb heat based on the specific heat capacity of the capacitor. The specific heat capacity of the capacitor and the latent heat of the shape memory core thereby enhance heat absorption from the electronic device 108.

[0026] The heat absorbed by the shape memory thermal capacitor 110 is then gradually dissipated. For example, heat is conducted away from the capacitor 110 through the electronics substrate 102 (e.g., the insulating and conductive layers 104, 106). In examples that include heat transfer mechanisms, such as a thermal exhaust cover 112 or cold plate 114 (or other elements), the heat is dissipated through these mechanisms. The shape memory thermal capacitor 110 thereby redirects heat away from the electronic device 108, absorbs the redirected heat, and assists in dissipating the heat while minimizing (e.g., reducing or eliminating) operation of the electronic device 108 above a specified or maximum operating temperature.

[0027] Figure 2A is a cross-sectional view of an electronics assembly 100 including an electronic device 108 coupled to an electronics substrate 102. The electronics substrate 102 is shown having insulating and conductive layers 104, 106. Also shown in Figure 2A is a conductive via 200 extending between one or more of the conductive layers 106. The conductive via 200 may interconnect devices, conductive traces, contact pads, or the like.

[0028] A shape memory thermal capacitor 110 is provided in a capacitor recess 207 of the electronics substrate 102. The substrate layer surrounding the capacitor recess 207 has a complementary profile to the shape memory thermal capacitor (e.g., rectangular, square, irregular, or the like). An interface is provided between the shape memory thermal capacitor 110 and the electronics substrate to enhance the bond therebetween and facilitate conductive heat transfer between the capacitor 110 and the substrate 102 (e.g., for heat dissipation). In one example, the interface includes a conductive material, such as, but not limited to, copper, that readily conducts heat (and electricity) from the shape memory thermal capacitor 110 to the electronics substrate 102. The interface is optionally a capacitor plating 205 that matches the material of the conductive layer 106. For example, in a copper conductor layer 106, the capacitor plating 205 includes, but is not limited to, copper, a copper alloy, a resin, or other material that is the same as the material of the conductor layer 106, includes one or more matching components, or is sufficiently similar to facilitate bonding therebetween. In another example, the capacitor plating 206 includes a material that is compatible with the bond layer 208 (shown in FIG. 2B ) of the interface jacket 204 (shown in FIGS. 2A, 2B ). For example, the capacitor plating 206 is compatible with (e.g., is the same as, includes one or more matching components, or is sufficiently similar to facilitate bonding with) the bond layer 208 of the interface jacket 204. In yet another example, the capacitor plating 206 includes a resin, such as a polymer, that bonds the shape memory thermal capacitor 110 to the surrounding electronics substrate 102 to facilitate heat transfer from the capacitor 110 to the substrate 102.

[0029] 2A, the shape memory core 202 is encapsulated with an interface jacket 204. In some instances, the shape memory material of the core 202 may not easily bond with the electronics substrate or with an interface such as, for example, the capacitor plating 205. In other instances, either or both of the electronics substrate 102 or the shape memory material may be difficult to process without adversely affecting the other of the shape memory material or the substrate 102. For example, oxides that are difficult to remove may grow on the shape memory material during processing of the electronics substrate 102. These oxides impede either or both of the heat transfer or bonding between components.

[0030] The interface jacket 204 extends (e.g., continuously or partially) around the shape memory core 202 to isolate the shape memory core 202 during processing of the electronics substrate 102, including, for example, plating of the shape memory thermal capacitor 110 in the capacitor recess 207. Additionally, during operation, the interface jacket 204 delivers heat from the electronic device 108 to the shape memory core 202 for absorption and to induce a phase change in the shape memory material. The interface jacket 204 delivers heat from the capacitor 110 (including the core 202) to the electronics substrate 102 for dissipation of the heat over time. Additionally, the interface jacket 204 provides an interface between the shape memory core 202 and other components of the electronics substrate proximate the capacitor 110 to facilitate bonding therebetween.

[0031] An example of an interface jacket 204 is shown in detail in FIG. 2B. In this example, the interface jacket 204 includes multiple component layers. For example, the interface jacket 204 includes a seed layer 206 coupled to the shape memory core 202, and a bond layer 208 adjacent the electronics substrate 102. Another optional layer, a ductile interface layer 210, is interposed between the bond layer 208 and the seed layer 206.

[0032] 2B, the seed layer 206 is bonded along the shape memory core 202 to provide the first layer of the interface jacket 204. The seed layer 206 bonds readily to the shape memory core 202, while the core 202 itself may not bond readily to the conductive material of the electronics substrate 102, such as copper. In one example, the seed layer 206 is a material that bonds readily with the shape memory core 202, including but not limited to nickel, gold, platinum, or palladium. Optionally, the seed layer 206 is applied to the shape memory core 202 using an electroless process, such as electroless plating.

[0033] As previously discussed, when exposed, shape memory core 202 can grow oxides (e.g., titanium oxide) that are difficult to remove and impede bonding of the core or further processing of capacitor 110. Seed layer 206 surrounds shape memory core 202 to isolate the core and minimize (e.g., reduce or eliminate) the growth of these oxides. Additionally, seed layer 206 acts as an interface (glue layer) to facilitate bonding with other materials, such as layers of interface jacket 204, capacitor plating 205, or the like. Additionally, if oxides do grow along seed layer 206, they are generally easier to remove compared to oxides that may otherwise grow along shape memory core 202.

[0034] As further shown in FIG. 2B, in this example, the interface jacket 204 includes a ductile interface layer 210. In one example, the seed layer 206 includes a material that is brittle and may crack or fracture during processing of the electronics substrate 102 or the capacitor 110 (or a phase change of the capacitor), preventing bonding and heat transfer between the shape memory core 202 and other components. The ductile interface layer 210 is softer (more ductile and therefore less brittle) than the seed layer 206, and is more resistant to spalling or cracking that occurs during processing or operation. Furthermore, even if the seed layer 206 cracks or fractures during operation or processing, the ductile interface layer 210 maintains the bond between the seed layer 206 and the shape memory core 202. The ductile interface layer 210 provides a compliant enclosure around the seed layer 206 that maintains the bond between the seed layer 206 and the shape memory core 202.

[0035] Additionally, in another example, the ductile interface layer 210 minimizes diffusion (which may prevent the maintenance of a robust bond, heat transfer, etc.) between underlying and overlying components of the shape memory thermal capacitor (e.g., the core 202, seed layer 206, and bond layer 208, respectively). Thus, the ductile interface layer 210 is sometimes referred to as a diffusion isolation layer (with or without the ductility properties described herein).

[0036] Ductile interface layer 210 optionally includes a similar material as seed layer 206, such as nickel, gold, platinum, palladium, or the like. In one example, ductile interface layer 210 is applied in a different manner than seed layer 206, such as, for example, using an electrolytic process such as electrolytic plating.

[0037] The interface jacket 204 includes a bond layer 208 along the exterior portion of the shape memory thermal capacitor 110. The bond layer 208 facilitates bonding between the capacitor 110 and the electronics substrate 102. For example, the bond layer bonds with one or more of the seed layer 206 or the ductile interface layer 210, etc. In one example, the bond layer 208 includes a matching conductive material that matches one or more component materials of the electronics substrate 102, such as the conductive layer 106. For example, the bond layer includes a conductive matching material that is the same, includes one or more matching components that bond with the conductive layer, or is sufficiently similar to facilitate bonding with the substrate 102. The bond layer 208 includes copper that extends along one or more of the shape memory core 202 or intervening layers (e.g., the seed layer 206, the ductile interface layer 210), etc. In this example electronics assembly 100, the conductor layer 106 and the capacitor plating 205 include copper, and the bond layer 208 includes copper (e.g., copper plating). These matching conductive materials facilitate bonding between the layer 208 and the components of the electronics substrate 102.

[0038] Thus, the interface jacket 204 facilitates bonding between the shape memory thermal capacitor 110 and the electronics substrate 102. Additionally, the interface jacket 204 allows for both processing of the electronics substrate 102 in which the capacitor 110 resided and operation of the shape memory core 202 to provide enhanced heat absorption, while isolating the shape memory core 202 and the electronics substrate 102 from one another, as described herein.

[0039] FIG. 3 is a cross-sectional view of an example electronics assembly 300 including a shape memory thermal capacitor 110 (dashed line) overlaid on a metal (e.g., copper) tab 302. In this view, both the metal tab 302 and the smaller profile shape memory thermal capacitor 110 provide similar performance in terms of heat absorption and dissipation. For example, the shape memory thermal capacitor 110 has a shape memory capacitor profile 308, while the metal tab 302 has a larger tab profile 306 (exaggerated for illustrative purposes). The shape memory core 202 (see FIGS. 2A, 2B) provides a higher effective specific heat capacity compared to the metal tab 302, which relies on the specific heat of the tab 302 (e.g., copper or the like) due to the latent heat of phase change(s) of the shape memory material. Thus, the profile 306 of the shape memory thermal capacitor 110 is smaller while providing similar performance to the metal tab 302. This small profile 306 of the shape memory thermal capacitor 110 consumes a correspondingly smaller portion of the electronics substrate 102 than the metal tab 302, thereby freeing up available electronics substrate 102 for additional devices, conductive layers 106 (traces or pads), or vias that would not otherwise be available on the metal tab 302.

[0040] In another example, the shape memory thermal capacitor 110 is optionally enlarged to provide enhanced performance relative to the metal tab 302, for example, to match the metal tab profile 306 or between the profiles 306 and 308. As previously described, the shape memory thermal capacitor 110 shown in FIG. 3 provides performance similar to the metal tab 302. Thus, by enlarging the shape memory thermal capacitor 110, enhanced heat absorption (e.g., effective specific heat) is achieved compared to the metal tab 302. The performance enhancement of the shape memory thermal capacitor 110 relative to the metal tab 302 is achieved without enlarging the capacitor 110 to a profile that matches the tab profile 306. Thus, the use of the shape memory thermal capacitor 110 provides enhanced performance while simultaneously freeing up a portion of the electronics substrate 102 (relative to the tab profile 306 of the metal tab 302) for additional conductive components or devices, etc.

[0041] 4 is an example of a temperature versus time plot 400 showing the temperature of the device 108 (or an associated pedestal to which the device 108 is attached). Temperature in degrees Celsius is given along the y-axis and time is given along the x-axis (logarithmic scale). The plot 400 includes temperature responses plotted against time for three device scenarios involving transient operation of the device 108, which includes a specified or maximum operating temperature 410 of 150° C. In one example, the specified operating temperature 410 corresponds to an operating temperature of the device 108 without appreciable performance degradation or failure, and operation above that temperature corresponds to possible degradation or failure of the device 108.

[0042] The first temperature response 402 corresponds to an electronic device 108 that does not have an associated heat absorbing component, such as a metal tab or shape memory thermal capacitor 110. Instead, the device 108 is coupled to an electronics substrate, such as the substrate 102 shown in FIG. 2A, that eliminates these features. As shown in FIG. 4, the temperature response 402 steadily increases with the operating transient, intersecting with the designated operating temperature 410 at a crossing point 412 corresponding to approximately 2.5 seconds. The temperature of the device 108 continues to increase to a maximum temperature of 185° C. as shown (e.g., at approximately 25 seconds).

[0043] The second temperature response 404 corresponds to an electronic device 108 having a metal tab as described herein, for example a copper metal tab embedded in the electronics substrate 102. As shown, the second temperature response 404 has a delayed response relative to the first temperature response 402, corresponding to the absorption of heat from the electronic device 108 by the metal tab. In this example, the intersection 414 of the second temperature response 404 occurs at approximately 6.5 seconds (4 seconds later than the first response 402). Thus, in this example, the electronic device 108 temporarily operates below the specified or maximum operating temperature 410 (150° C.) for a longer period of time than an electronic device without a metal tab having the temperature response 402. In the second temperature response 404, the temperature of the electronic device continues to rise after intersection 414 in a manner similar to the first temperature response, reaching a maximum temperature (185° C.) at approximately 100 seconds. Thus, the metal tab provides an additional four seconds of transient operation of the electronic device 108 compared to the device 108 (and associated response 402) without the metal tab.

[0044] The third temperature response 406 corresponds to an electronic device 108 having one of the example shape memory thermal capacitors described herein (e.g., capacitor 110) embedded in the electronics substrate 102. As shown, the third temperature response 406 has a delayed response relative to each of the first and second temperature responses 402, 404, which maintains operation of the electronic device below the specified or maximum operating temperature (e.g., 150° C.) for a significantly longer period of time. For example, the third temperature response 406 has an intersection point 416 with the specified or maximum operating temperature at approximately 25 seconds, which is 18.5 seconds longer and an order of magnitude greater than the second temperature response 404 (with metal tab).

[0045] 4, the third temperature response 406 includes a planar segment 408 that is not present in the other responses 402, 404. The planar segment 408 corresponds to latent heat associated with one or more phase changes of the shape memory core 202 of the capacitor 110. As shown, the planar segment 408 (and the corresponding phase change) extends the operation of the electronic device 108 below a specified or maximum operating temperature 410, thus supporting a later crossing point 416 (25 seconds) of the third temperature response 406 compared to an earlier crossing point 414 (6.5 seconds) of the second temperature response 404. In one example, the shape memory core 202 delays or pushes the crossing point of the third temperature response 406 beyond the second temperature response, supporting enhanced operation of the electronic device 108 over a longer period of time than would otherwise be available using the first temperature response 402 and the second temperature response 404.

[0046] After the shape memory thermal capacitor 110 undergoes a phase change, the temperature of the device 108 rises toward a maximum temperature of 185° C., which is reached in about 100 seconds. The electronic device 108 with the shape memory thermal capacitor 110 in this example experiences operation at a temperature higher than the specified or maximum operating temperature 410 of 150° C. However, the length of time that it operates above the temperature 410 begins at about 25 seconds, whereas the device 108 with the metal tab begins at about 6.5 seconds. In some examples, the transient operation of the electronic device 108 may last from 13 to 30 seconds. Thus, the shape memory thermal capacitor 110 facilitates the majority of the duration of the transient operation of 30 seconds or less during which it is below the specified or maximum operating temperature 410, whereas the metal tab conversely limits the operation of the electronic device below the temperature 410 to a shorter duration, even at the bottom transient operation example of 13 seconds.

[0047] 5A-5C include examples of electronics assemblies 500, 510, 520 having respective shape memory thermal capacitors 502, 512, 522. FIG. 1, FIG. 5A-5C show examples of shape memory thermal capacitors having various profiles and positions relative to the electronic device 108. As shown in FIG. 1, the shape memory thermal capacitor 110 is proximate to the electronic device 108. For example, the capacitor 110 is embedded in the electronics substrate 102 below the electronic device 108. In the example shown in FIG. 1, the shape memory thermal capacitor 110 includes a similar profile (e.g., one or more of size, shape, or volume, etc.) to the electronic device 108. For example, the capacitor 110 includes a top surface area equivalent to a bottom surface area of ​​the proximate electronic device 108, facilitating heat transfer from the device 108 to the capacitor 110 while minimizing direct heat transfer from the device to the electronics substrate 102.

[0048] 5A, another electronics assembly 500 is shown having a shape memory thermal capacitor 502 embedded in an electronics substrate 102 adjacent to an electronic device 108. In this example, the capacitor 502 has a smaller profile than the electronic device 108. As previously described, the shape memory thermal capacitor 110 (502 in this example) provides enhanced heat absorption and storage relative to a metal tab (e.g., the tab 302 shown in FIG. 3). Thus, the smaller profile shape memory thermal capacitor 502 provides equal or better heat absorption and storage compared to a larger metal tab. The smaller profile of the capacitor 502 provides additional access to the electronic device 108. For example, additional conductive traces or contact pads, etc., are easily routed through the electronics substrate 102 to the device 108 in the space that would otherwise be consumed by the larger profile metal tab 302. In some examples, the electronic device 108 includes a different architecture that utilizes an electronics substrate 102 that is made available with a smaller profile shape memory thermal capacitor 502.

[0049] Additionally, as shown in Figure 5A, the shape memory thermal capacitor 502 is optionally positioned proximate to the electronic device 108, such as underneath the device, to the side of the device, or between them. Although the capacitor could easily be positioned underneath the device 108 as shown in Figure 1, the enhanced performance of the shape memory thermal capacitor (502 in this example) facilitates positioning the capacitor in proximity without requiring incorporation of the capacitor directly underneath the device 108.

[0050] 5B is another example of an electronics assembly 510 including a shape memory thermal capacitor 512. As shown, the shape memory thermal capacitor 512 has an irregular profile, including but not limited to an L-shaped profile (as shown in FIG. 5B), an oval profile, a linear profile, or the like. The capacitor 512 is in proximity to the electronic device 108 and absorbs and stores heat. The irregular profile capacitor 512 facilitates the use of electronic devices 108 having irregular profiles, irregular arrangements of contact pads, or the like. In another example, the irregular profile shape memory thermal capacitor 512 facilitates the incorporation of devices, conductive traces, vias, or the like, into the space beneath the device 108 while still providing the heat absorption and storage of the capacitor 512 in proximity to the device 108.

[0051] 5C illustrates another electronics assembly 520 including a shape memory thermal capacitor 522 embedded in the electronics substrate 102. In this example, the shape memory thermal capacitor 522 is spaced apart from the electronic device 108. In one example, a thermal duct 524 is provided in the electronics substrate 102 and interconnects the capacitor 522 with a location proximate to the electronic device 108. The thermal duct 524 includes one or more materials configured to facilitate heat transfer from the electronic device 108 to the shape memory thermal capacitor 522. For example, the thermal duct 524 includes, but is not limited to, a metal, a shape memory material, a thermally conductive polymer or resin, or the like that preferentially transfers heat from the electronic device 108 to the shape memory thermal capacitor 522 (rather than the electronics substrate 102).

[0052] During operation, the electronic device 108 generates heat, which the thermal duct 524 directs away from the device 108 and adjacent electronics boards toward the shape memory thermal capacitor 522. As shown in FIG. 5C, the shape memory thermal capacitor 522 is spaced apart from the electronic device 108. The thermal duct 524 delivers the heat from the device 108 to the remote capacitor 522 for absorption and storage (and ultimately dissipation). In one example, the capacitor 522 is positioned in proximity to one or more other heat transfer components, such as the heat exhaust cover 112 shown in FIG. 5C (and FIG. 1), an array of fins, a post, a fan, or the like. Thus, the capacitor 522 localizes the absorbed and stored heat and facilitates dissipation of the heat using the associated (e.g., adjacent) heat transfer components. Additionally, spacing the shape memory thermal capacitor 522 away from the electronic device 108 frees up space that would otherwise be dedicated to metal tabs. Instead, devices, conductive traces, vias, contact pads, or the like can be easily included on the electronics substrate in close proximity to the electronic device 108 while providing enhanced heat absorption and storage by the shape memory thermal capacitor 522.

[0053] 6 illustrates an example method 600 for manufacturing an electronics assembly, such as the assembly 100 described herein. In describing the method 600, reference will be made to one or more components, features, functions, steps, etc. described herein, where those components, features, functions, steps, etc. will be referred to for convenience by a reference numeral. The reference numerals provided are exemplary and not exclusive. For example, the features, components, functions, steps, etc. described in the method 600 include, but are not limited to, correspondingly labeled elements, other corresponding features described herein, both labeled and unlabeled, and equivalents thereof.

[0054] The method 600 includes forming 602 a shape memory thermal capacitor 110 having a shape memory material. The forming includes encapsulating 604 a shape memory core 202 with an interface jacket 204. In one example, encapsulating the core 202 includes surrounding 606 the shape memory core 202 with a seed layer 206, such as nickel (e.g., electrolessly applied nickel). The encapsulation includes applying 608 a bond layer 208 around the seed layer 206 and the shape memory core 202. The bond layer 208 includes a conductive material, such as copper. The encapsulation includes isolating 610 the shape memory core 202 from the electronics substrate 102 and electronics substrate processing with the interface jacket 204.

[0055] The method 600 includes, at 612, incorporating the shape memory thermal capacitor 110 into the electronics substrate 102. The incorporating includes, at 614, positioning the shape memory thermal capacitor in the capacitor recess 207 of the electronics substrate 102. At 616, the shape memory thermal capacitor 110 is fixed to the electronics substrate 102, for example, using a conductive material, resin, or the like (e.g., copper, plating, adhesive, polymer, including but not limited to thermally or electrically conductive adhesive or polymer, or the like). Optionally, the conductive material for fixing, for example, plating, includes the conductive material of the element bond layer or conductor layer 106 as a constituent component. At 618, the method 600 includes interconnecting the bond layer 208 having a conductive material with one or more conductive components of the electronics substrate 102 having a matching conductive material. As described herein, a matching material includes materials that are the same, include one or more matching components that bond with each other, or are sufficiently similar to facilitate bonding.

[0056] Some examples of method 600 are as follows: In one example, encapsulating the shape memory core includes applying an interfacial ductile layer 210 over the seed layer 206. In this example, applying the bond layer 208 includes applying the bond layer 208 over the interfacial ductile layer 210. In another example, surrounding the shape memory core 202 with the seed layer 206 includes electrolessly plating the seed layer 206 to the shape memory core 202. The interfacial ductile layer 210 (if included) is optionally applied over the seed layer 206 using electrolytic plating.

[0057] In another example, interconnecting a bond layer 208 having a conductive material with one or more conductive components (e.g., a conductive layer 106 having traces, contact pads, or vias, etc.) of an electronics substrate 102 having a matching conductive material includes the conductive material of the substrate 102 and the matching conductive material of the bond layer 208 being the same.

[0058] Various notes and aspects Aspect 1 can include a subject matter, such as an electronics assembly, including a thermal capacitor, the electronics assembly having an electronics substrate including one or more insulating layers and one or more conductive layers disposed along the one or more insulating layers, the one or more conductive layers including a conductive material, and a shape memory thermal capacitor received within the electronics substrate, the shape memory thermal capacitor including a shape memory core including a shape memory material.

[0059] Aspect 2 can include or can optionally be combined with the subject matter of aspect 1, optionally including that the shape memory material includes a solid-to-solid phase change material having a corresponding phase change latent heat absorption.

[0060] Aspect 3 can include or can optionally be combined with the subject matter of any one or combination of aspects 1 or 2, optionally including that the shape memory material comprises a nickel-titanium alloy.

[0061] Aspect 4 can include or optionally be combined with the subject matter of any one or combination of aspects 1-3, optionally including: the shape memory thermal capacitor includes an interface jacket coupled along the shape memory core, the interface jacket isolating the shape memory core from the one or more conductive layers, the interface jacket including a matching conductive material to the conductive material of the one or more conductive layers.

[0062] Aspect 5 can include or can optionally be combined with the subject matter of any one or combination of aspects 1-4, optionally including that the interface jacket includes multiple component layers.

[0063] Example 6 can include or optionally be combined with the subject matter of any one or combination of Examples 1 to 5, optionally including: the multiple component layers include a seed layer directly bonded to the shape memory core, a seed layer surrounding the shape memory core, and a bond layer encasing the seed layer and the shape memory core, the bond layer including the conductive material, the bond layer being bonded to the one or more conductive layers of the electronics substrate.

[0064] Example 7 can include or optionally be combined with the subject matter of any one or combination of Examples 1 to 6, optionally including that the multiple component layers include a ductile interface layer interposed between the seed layer and the bond layer, the ductile interface layer having greater ductility than the seed layer.

[0065] Example 8 can include or optionally be combined with the subject matter of any one or combination of Examples 1-7, optionally including: the seed layer comprises an electrolessly plated material; and the ductile interface layer comprises an electrolytically plated material.

[0066] Aspect 9 can include or can optionally be combined with the subject matter of any one or combination of aspects 1 to 8, optionally including that the conductive material and the matching conductive material are the same.

[0067] Aspect 10 can include or can optionally be combined with the subject matter of any one or combination of aspects 1 to 9, optionally including that the one or more conductive layers having a conductive material are coupled to the interface jacket having the matching conductive material.

[0068] Example 11 can include or can optionally be combined with the subject matter of any one or combination of Examples 1 to 10, optionally including that the shape memory thermal capacitor is fixed within the electronics substrate with the conductive material.

[0069] Aspect 12 can include or optionally be combined with the subject matter of any one or combination of aspects 1 to 11, optionally including that the electronics assembly includes a heat-generating electronic device coupled to the electronics substrate, and the shape memory thermal capacitor is in close proximity to the heat-generating electronic device.

[0070] A thirteenth aspect is a shape memory thermal capacitor for an electronic device, comprising: a shape memory core including a shape memory material having a solid-to-solid phase change material with a corresponding phase change latent heat absorption; and an interface jacket bonded along the shape memory core, the interface jacket encapsulating the shape memory core, the interface jacket including a seed layer bonded to the shape memory core, the seed layer surrounding the shape memory core, and a bond layer bonded around the seed layer and the shape memory core, the bond layer including a conductive material; and a shape memory thermal capacitor having an interface jacket including:

[0071] Example 14 can include or optionally be combined with the subject matter of any one or combination of Examples 1 to 13, optionally including one or more of the seed layer or the bond layer isolating the shape memory core from the external environment.

[0072] Example 15 can include or optionally be combined with the subject matter of any one or combination of Examples 1 to 14, optionally including one or more of the seed layer or the bond layer completely encapsulating the shape memory core.

[0073] Example 16 can include or optionally be combined with the subject matter of any one or combination of Examples 1 to 15, optionally including that the interface jacket includes a ductile interface layer interposed between the seed layer and the bond layer, the ductile interface layer having greater ductility than the seed layer.

[0074] Example 17 can include or optionally be combined with the subject matter of any one or combination of Examples 1 to 16, optionally including: the seed layer comprises an electrolessly plated material; and the ductile interface layer comprises an electrolytically plated material.

[0075] Example 18 can include or optionally be combined with the subject matter of any one or combination of Examples 1 to 17, optionally including wherein one or both of the seed layer or the ductile interface layer include nickel and the bond layer includes copper.

[0076] Example 19 can include or optionally be combined with the subject matter of any one or combination of Examples 1-18, optionally including: the shape memory material includes a nickel-titanium alloy.

[0077] Aspect 20 may include or be optionally combined with the subject matter of any one or combination of aspects 1 to 19 to optionally include a method of manufacturing an electronics assembly comprising: forming a shape memory thermal capacitor having a shape memory material, the forming including encapsulating a shape memory core with an interface jacket, the encapsulation including surrounding the shape memory core with a seed layer and applying a bond layer around the seed layer and the shape memory core, the bond layer including a conductive material, and isolating the shape memory core from an electronics substrate and processing of the electronics substrate with the interface jacket; and incorporating the shape memory thermal capacitor into the electronics substrate, the incorporating including positioning the shape memory thermal capacitor within a capacitor recess of the electronics substrate, securing the shape memory thermal capacitor to the electronics substrate, and interconnecting the bond layer including the conductive material with one or more conductive components of the electronics substrate having a matching conductive material.

[0078] Example 21 can include or can optionally be combined with the subject matter of any one or combination of Examples 1 to 20, optionally including that fixing the shape memory thermal capacitor includes plating the shape memory thermal capacitor with a conductive plating including the conductive material.

[0079] Example 22 can include or optionally be combined with the subject matter of any one or combination of Examples 1 to 21, optionally including: encapsulating the shape memory core includes applying an interface ductile layer over the seed layer; and applying the bond layer includes applying the bond layer over the interface ductile layer.

[0080] Example 23 may include or optionally be combined with the subject matter of any one or combination of Examples 1 to 22, optionally including: surrounding the shape memory core with the seed layer includes electrolessly plating the seed layer onto the shape memory core; and providing the interface ductile layer includes electrolytically plating the interface ductile layer onto the seed layer.

[0081] Example 24 may include or may optionally be combined with the subject matter of any one or combination of Examples 1 to 23, optionally including that interconnecting the bond layer having the conductive material with the one or more conductive components of the electronics substrate having the matching conductive material includes the conductive material and the matching conductive material being the same.

[0082] Each of these non-limiting aspects can stand alone or can be combined with one or more of the other aspects in various permutations or combinations.

[0083] The above description includes references to the accompanying drawings, which form a part of the detailed description. The drawings show, by way of illustration, specific embodiments in which the invention may be practiced. These embodiments are also referred to herein as "aspects" or "examples." Such aspects or examples may include elements in addition to those shown or described. However, the inventors also contemplate aspects or examples in which only the elements shown or described are provided. The inventors also contemplate aspects or examples that use combinations or permutations of the elements shown or described (or one or more features thereof) either with respect to a particular aspect or example (or one or more features thereof) or with respect to other aspects (or one or more features thereof) shown or described herein.

[0084] In the event of conflicting usage between this document and any incorporated document, the usage in this document will control.

[0085] In this document, the terms "a" or "an" are used to include one or more, as is common in the patent literature, regardless of other instances or usages of "at least one" or "one or more." In this document, the term "or" is used to refer to a non-exclusive nature unless otherwise specified, such that "A or B" includes "A but not B," "B but not A," and "A and B." In this document, the terms "including" and "in which" are used as the plain English equivalents of the terms "comprising" and "wherein," respectively. Also, in the following claims, the terms "including" and "comprising" are open-ended, i.e., systems, apparatus, articles, compositions, formulations, or processes that include elements in addition to those recited after those terms in a claim are still considered to be within the scope of that claim. Also, in the following claims, the terms "first," "second," and "third," etc. are used merely as labels and are not intended to impose numerical requirements on them.

[0086] Geometric terms, such as "parallel," "perpendicular," "circular," "square," and the like, are not intended to require absolute mathematical precision unless the context indicates otherwise. Instead, such geometric terms allow for variations in manufacture or equivalent functionality. For example, if an element is described as "round" or "generally round," components that are not exactly circular (e.g., those that are slightly oval or that are multi-sided polygons) are still included in this description.

[0087] The foregoing description is intended to be illustrative, not limiting. For example, the above-described aspects or examples (or one or more aspects thereof) may be used in combination with each other. Other embodiments may also be used, for example, by one of ordinary skill in the art upon review of the foregoing description. The Abstract is provided to enable the reader to quickly ascertain the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. Also, in the foregoing Detailed Description, various features may be grouped together to streamline the disclosure. This should not be construed as intending that non-claimed disclosed features are essential to any claim. Rather, inventive subject matter may lie in less than all features of a particular disclosed embodiment. Thus, it is contemplated that the following claims may be incorporated into the Detailed Description as an aspect, example, or embodiment, with each claim standing on its own as a separate embodiment, and that such embodiments can be combined with each other in various combinations or permutations. The scope of the invention should be determined with reference to the appended claims, along with the full range of equivalents to which such claims are entitled.

Claims

1. 1. An electronics assembly including a thermal capacitor, It is an electronics board, one or more insulating layers; and one or more conductive layers disposed along the one or more insulating layers, the one or more conductive layers comprising a conductive material; An electronics substrate comprising: a shape memory thermal capacitor received within the electronics substrate; A shape memory core including a shape memory material; and an interface jacket coupled along the shape memory core, the interface jacket isolating the shape memory core from the one or more conductive layers, the interface jacket including a matching conductive material to the conductive material of the one or more conductive layers, the interface jacket including a plurality of component layers; A shape memory thermal capacitor comprising: An electronics assembly having:

2. The electronics assembly of claim 1 , wherein the shape memory material comprises a solid-to-solid phase change material having a corresponding phase change latent heat absorption.

3. The electronics assembly of claim 1 , wherein the shape memory material comprises a nickel-titanium alloy.

4. The plurality of component layers include: a seed layer directly bonded to the shape memory core, the seed layer surrounding the shape memory core; and a bond layer encasing the seed layer and the shape memory core, the bond layer comprising the conductive material, the bond layer being coupled to the one or more conductive layers of the electronics substrate; The electronics assembly of claim 1 , comprising:

5. The electronics assembly of claim 4 , wherein the plurality of component layers includes a ductile interface layer interposed between the seed layer and the bond layer, the ductile interface layer having a greater ductility than the seed layer.

6. The electronics assembly of claim 5 , wherein the seed layer comprises an electrolessly plated material and the ductile interface layer comprises an electrolytically plated material.

7. The electronics assembly of claim 1 , wherein the conductive material and the matching conductive material are the same.

8. The electronics assembly of claim 1 , wherein the one or more conductive layers having a conductive material are coupled to the interface jacket having the matching conductive material.

9. The electronics assembly of claim 1 , wherein the shape memory thermal capacitor is fixed within the electronics substrate with the conductive material.

10. 10. The electronics assembly of claim 1, wherein the electronics assembly includes a heat-generating electronic device coupled to the electronics substrate, the shape memory thermal capacitor being proximate to the heat-generating electronic device.

11. A shape memory thermal capacitor for an electronic device, comprising: a shape memory core including a shape memory material having a solid-to-solid phase change material with a corresponding phase change latent heat absorption; an interface jacket coupled along the shape memory core, the interface jacket encapsulating the shape memory core, the interface jacket comprising: a seed layer coupled to the shape memory core, the seed layer surrounding the shape memory core; and a bond layer coupled about the seed layer and the shape memory core, the bond layer comprising a conductive material; an interface jacket including: A shape memory thermal capacitor having a

12. The shape memory thermal capacitor of claim 11 , wherein one or more of the seed layer or the bond layer isolates the shape memory core from an external environment.

13. The shape memory thermal capacitor of claim 11 , wherein one or more of the seed layer or the bond layer completely encapsulates the shape memory core.

14. 12. The shape memory thermal capacitor of claim 11, wherein the interface jacket includes a ductile interface layer interposed between the seed layer and the bond layer, the ductile interface layer having a greater ductility than the seed layer.

15. The shape memory thermal capacitor of claim 14 , wherein the seed layer comprises an electrolessly plated material and the ductile interface layer comprises an electrolytically plated material.

16. 15. The shape memory thermal capacitor of claim 14, wherein one or both of the seed layer or the ductile interface layer comprises nickel and the bond layer comprises copper.

17. The shape memory thermal capacitor of claim 11 , wherein the shape memory material comprises a nickel-titanium alloy.

18. 1. A method of manufacturing an electronics assembly, comprising: forming a shape memory thermal capacitor having a shape memory material, the forming comprising: The shape memory core is encapsulated with an interface jacket, the encapsulation comprising: Surrounding the shape memory core with a seed layer; providing a bond layer about the seed layer and the shape memory core, the bond layer comprising a conductive material; isolating the shape memory core from the electronics substrate and processing of the electronics substrate with the interface jacket; forming a incorporating the shape memory thermal capacitor into the electronics substrate, the incorporating comprising: Positioning the shape memory thermal capacitor within a capacitor recess of the electronics substrate; affixing the shape memory thermal capacitor to the electronics substrate; interconnecting the bond layer having the conductive material with one or more conductive components of the electronics substrate having a matching conductive material; Including, incorporating, The method according to claim 1,

19. 20. The method of claim 18, wherein fixing the shape memory thermal capacitor comprises plating the shape memory thermal capacitor with a conductive plating that includes the conductive material.

20. encapsulating the shape memory core includes applying an interfacial ductile layer over the seed layer; applying the bond layer includes applying the bond layer over the interface ductile layer.

20. The method of claim 18.

21. Surrounding the shape memory core with the seed layer includes electrolessly plating the seed layer onto the shape memory core; applying the interface ductile layer includes electrolytically plating the interface ductile layer onto the seed layer.

21. The method of claim 20.

22. 20. The method of claim 18, wherein interconnecting the bond layer having the conductive material with the one or more conductive components of the electronics substrate having the matching conductive material includes the conductive material and the matching conductive material being the same.

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