Data register access method, device, computer-readable storage medium and electronic device

Abstract

To disclose a data register access method, an apparatus, a computer readable storage medium, and an electronic device.TECHNICAL MEANS: A method includes the steps of: determining a first virtual machine identifier and first address of a to-be-accessed data register from a register access request generated by a target virtual machine; determining, based on the first virtual machine identifier, a target data register group and target protection register from at least two data register groups and a protection register group; determining an access authority of the target virtual machine to access the target data register group based on the target protection register; and determining, based on the first address, the to-be-accessed data register from the target data register group in response to that the access authority is access permission, and accessing the to-be-accessed data register using the target virtual machine.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present disclosure relates to the field of computer technology, and in particular to a data register access method, an apparatus, a computer-readable storage medium and an electronic device. [Background technology]

[0002] A Virtual Machine (VM) is a complete computer system that has the functionality of a complete hardware system simulated by software and operates in a completely isolated environment. Any operation that can be completed by a real computer can also be accomplished by a virtual machine. Multiple operating systems, such as Windows, DOS, and LINUX, can be run simultaneously on the same computer through virtual machines.

[0003] In order to ensure that software programs in different virtual machines run safely, it is required that hardware resources are in only one software environment or virtual machine at the same time, and registers are important storage resources in hardware systems, so it is very important in virtualization technology to ensure access protection to registers between different virtual machines.

[0004] Current virtualization technologies often solve the problem of register access collision from a software perspective, for example, by setting a flag bit to control the register to be accessed, before a virtual machine accesses a register, it first queries the flag bit to check whether it has the permission to write to the specified register, and only if it has the access permission, it can send a command to access the register, and if it does not have the access permission, it will not send the command. Summary of the Invention [Problem to be solved by the invention]

[0005] The method of accessing registers adopted by current virtualization technology requires software scheduling, which has the disadvantages of being time-consuming, slow access speed, and low work efficiency. How to improve access efficiency in implementing register access protection is currently a problem to be solved. [Means for solving the problem]

[0006] To solve the above technical problems, the embodiments of the present disclosure provide a data register access method, an apparatus, a computer-readable storage medium and an electronic device, which realizes register isolation corresponding to different virtual machines, and has flexible and efficient characteristics.

[0007] An embodiment of the present disclosure provides a data register access method, which includes the steps of: determining a first virtual machine identifier and a first address of an accessed data register from a register access request generated by a target virtual machine, where the first address indicates a position of the accessed data register in a target data register group to which it belongs; determining a target data register group and a target protection register corresponding to the target virtual machine from at least two preset data register groups and a preset protection register group based on the first virtual machine identifier; determining an access permission of the target virtual machine to the target data register group based on the target protection register; and if the access permission is an access permission, determining an accessed data register from the target data register group based on the first address, and allowing the target virtual machine to access the accessed data register.

[0008] According to another aspect of an embodiment of the present disclosure, a data register access device is provided, the device including: a first determination module used to determine a first virtual machine identifier and a first address of an accessed data register from a register access request generated by a target virtual machine, where the first address indicates a position of the accessed data register in a target data register group to which the accessed data register belongs; a second determination module used to determine a target data register group and a target protection register corresponding to the target virtual machine from at least two predetermined data register groups and a predetermined protection register group based on the first virtual machine identifier; a third determination module used to determine an access permission of the target virtual machine to the target data register group based on the target protection register; and an access module used to determine the accessed data register from the target data register group based on the first address if the access permission is an access permission, and to allow the target virtual machine to access the accessed data register.

[0009] According to another aspect of an embodiment of the present disclosure, a computer readable storage medium is provided, the computer readable storage medium including a logic execution device that executes a program to execute the program to the data register. A computer program used to implement the access method is stored.

[0010] According to another aspect of an embodiment of the present disclosure, an electronic device is provided, the electronic device including a logic execution device, a first predetermined number of data registers, a second predetermined number of protection registers, and a command memory, the command memory is used to store executable commands for the logic execution device, and the logic execution device reads the executable commands from the memory and executes the commands to realize the above-mentioned data register access method.

[0011] According to another aspect of an embodiment of the present disclosure, a computer program product is provided, the computer program product including computer program commands that, when executed by a command processor, perform a data register access method provided by the present disclosure. Effect of the Invention

[0012] According to the data register access method, apparatus, computer-readable storage medium, and electronic device provided by the above embodiments of the present disclosure, a group of target data registers dedicated for a target virtual machine is set, and a target protection register is used to control the target virtual machine's access authority to the group of target data registers, so that the target virtual machine can only access the group of target data registers corresponding thereto, thereby allowing different virtual machines to be flexibly controlled to access their corresponding groups of data registers, which realizes isolation between register groups in hardware and avoids the need to set up complex software programs to control the virtual machine's access authority to registers, thereby improving the efficiency of the virtual machine's access to registers. [Brief description of the drawings]

[0013] [Figure 1] FIG. 1 is a system diagram to which the present disclosure is applied. [Diagram 2] 4 is a flowchart of a data register access method provided by one exemplary embodiment of the present disclosure. [Diagram 3] 4 is a flowchart of a data register access method provided by another exemplary embodiment of the present disclosure. [Figure 4] 4 is a flowchart of a data register access method provided by another exemplary embodiment of the present disclosure. [Diagram 5] 4 is a flowchart of a data register access method provided by another exemplary embodiment of the present disclosure. [Figure 6]4 is a flowchart of a data register access method provided by another exemplary embodiment of the present disclosure. [Figure 7] 4 is a flowchart of a data register access method provided by another exemplary embodiment of the present disclosure. [Figure 8] 2 is a structural schematic diagram of a data register access unit provided by one exemplary embodiment of the present disclosure; [Figure 9] FIG. 11 is a structural schematic diagram of a data register access unit provided according to another exemplary embodiment of the present disclosure; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] In order to interpret the present disclosure, exemplary embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. As will be apparent, the described embodiments are merely a part of the embodiments of the present disclosure, and are not all of the embodiments of the present disclosure, and the present disclosure is not limited to the exemplary embodiments.

[0015] Unless otherwise specified, the relative arrangement of components and steps, formulas and numerical values ​​described in these examples do not limit the scope of the present disclosure. Overview of the Application

[0016] In the past, in order to prevent data register access conflicts in a multi-virtual machine scenario, the prior art is often handled from the software perspective, and the software needs to schedule the access rights of different virtual machines to the data register, which consumes a lot of time, has a slow access speed, and has problems of low work efficiency. To solve this problem, the embodiment of the present disclosure provides a data register access method, which realizes setting a dedicated target data register group for a target virtual machine, and controls the access rights of the target virtual machine to the target data register group by a target protection register, and can flexibly control different virtual machines to access their corresponding data register groups, thereby realizing the isolation between register groups on hardware, and does not need to set up a complex software program to control the access rights of virtual machines to the registers, and improves the efficiency of virtual machines accessing registers. Exemplary System

[0017] FIG. 1 is a diagram illustrating an example of a hardware system architecture 100 to which the data register access method or data register access device of the embodiment of the present disclosure can be applied.

[0018] As shown in FIG. 1, hardware system architecture 100 may include a logic execution device 101 , a first predetermined number of data registers 102 , a second predetermined number of protection registers 103 , and a command memory 104 .

[0019] The logic performing device 101 may include various devices for performing logic control functions, such as a dedicated logic circuit designed in a hardware description language, a general-purpose microprocessor, a microcontroller, and / or the like.

[0020] The first predetermined number of data registers 102 is used to provide a data temporary storage function for at least two virtual machines. In general, the first predetermined number of data registers 102 may include a plurality of data register groups, and as shown in FIG. 1, the first predetermined number of data registers 102 includes N data register groups (including data register group 0, data register group 1, ..., data register group N-1), each data register group corresponds to one virtual machine, and the virtual machine uses the corresponding data register group to read and write data. You can write it down.

[0021] The second predetermined number of protected registers 103 are used to store data indicating the correspondence between the virtual machine and the data register group, for example, the identifier of the virtual machine can be stored in the protected register. Each data register group corresponds to one protected register, and as shown in Fig. 1, protected register 0, protected register 1, ..., protected register N-1 each correspond to one data register group. The logic execution device 101 can read data from the protected register and determine whether the virtual machine has the authority to access the data register group to be accessed based on the read data.

[0022] The command memory 104 is used to store executable commands for the logic execution device 101, and the logic execution device 101 reads the executable commands from the memory and executes the executable commands to realize control over access to the data registers of the virtual machine.

[0023] Optionally, the logic execution device 101 may include a processor and an access authority determination module, in which the processor can read executable commands from a memory and realize functions such as establishing a correspondence between a data register group, a protection register, and a virtual machine, and the authority determination module may include a dedicated circuit that performs a logic determination function and realizes functions such as decrypting an access request to a register, reading data indicating the access authority of a target virtual machine from the protection register, and determining whether the target virtual machine meets the access authority to the target register group based on the read data.

[0024] It should be noted that the data register access method provided by the embodiments of the present disclosure is generally performed by a logic executing device 101, and accordingly, the data register access apparatus can be provided in the logic executing device 101. The above system architecture can be provided in the same physical space, for example, in a System on Chip (SOC), or the above system architecture can be provided in different physical spaces, for example, the logic executing device 101, the first predetermined number of data registers 102, the second predetermined number of protection registers 103 and the command memory 104 are provided in different chips.

[0025] 1 are merely examples, and may have any number of logic execution devices 101, a first predetermined number of data registers 102, a second predetermined number of protection registers 103, and a command memory 104 according to the needs of implementation. Exemplary Methods

[0026] 2 is a flow chart of a data register access method provided by an exemplary embodiment of the present disclosure. This embodiment may be applied to an electronic device (logic execution device 101 as shown in FIG. 1), and as shown in FIG. 2, the method includes steps 201 to 204.

[0027] In step 201, a first virtual machine identifier and a first address of a data register to be accessed are determined from a register access request generated by a target virtual machine.

[0028] In this embodiment, the electronic device may determine a first virtual machine identifier and a first address of a data register to be accessed from a register access request generated by a target virtual machine.

[0029] Here, the register access request may be a request generated by the target virtual machine before accessing the data register. Usually, when the target virtual machine needs to write data to or read data from the accessed data register, it needs to generate a register access request, and the electronic device can extract a first virtual machine identifier (VMID) indicating the target virtual machine and a first address of the accessed data register from the register access request. The first virtual machine identifier indicates the target virtual machine, that is, the target virtual machine needs to generate its own virtual machine identifier before accessing the target data register group, and the electronic device can determine the target data register group from at least two data register groups as shown in FIG. 1 based on the first virtual machine identifier. The first virtual machine identifier may be an identifier of any form, for example, it may include at least one of numbers, letters, and symbols.

[0030] The first address indicates the location of the data register to be accessed in the group of target data registers to which it belongs. Optionally, the first address may be a relative address or an absolute address of the data register to be accessed. For example, if the absolute address of the data register to be accessed is m-bit binary data, the first address may be the m-bit binary data or the lower n bits of the m-bit binary data, the lower n bits being the relative address, and the numerical range of the lower n bits may correspond to the number of data registers in the group of target data registers.

[0031] Optionally, the register access request may include an absolute address of the data register to be accessed, and if the absolute address is m-bit binary data, the upper mn bits may be a first register identifier and the lower n bits may be the first address. That is, the upper mn bits of the data correspond to a target data register group consisting of 2n data registers, and the first address is the address of the data register to be accessed in the 2n data registers. Thus, the target data register group can be located in the first predetermined number of data registers 102 based on the first register identifier, and the data register to be accessed can be located in the target data register group based on the first address.

[0032] In step 202, a target data register group and a target protection register group corresponding to a target virtual machine are determined from at least two preset data register groups and a preset protection register group based on a first virtual machine identifier.

[0033] In this embodiment, the electronic device may determine a target data register group and a target protection register group corresponding to the target virtual machine from at least two preset data register groups and a preset protection register group based on the first virtual machine identifier, where the protection register group may be a register group consisting of at least two protection registers in a second predetermined number of protection registers as shown in FIG.

[0034] Each protection register in the protection register group corresponds to one data register group, i.e., one virtual machine. The correspondence between the protection register in the protection register group, the data register group, and the virtual machine may be established in advance. For example, the addresses of the first predetermined number of data registers 102 and the second predetermined number of protection registers shown in FIG. 1 are consecutively arranged, and the address offset corresponding to each data register group can be set sequentially based on the arrangement order of each data register group, and the corresponding protection register can be determined based on the address offset. Also, for example, a correspondence table including the top address of the data register group, the address of the corresponding protection register, and the virtual machine identifier can be established in advance, and the target data register group and the target protection register corresponding to the target virtual machine can be determined based on the correspondence table.

[0035] In step 203, the target virtual machine's access permissions to the target data registers are determined based on the target protection registers.

[0036] In this embodiment, the electronic device can determine the access right of the target virtual machine to the set of target data registers based on the target protection register, where data indicating the access right of the target virtual machine to the set of target data registers can be stored in the target protection register.

[0037] For example, one virtual machine identifier may be stored in the target protection register, and when the virtual machine identifier and the first virtual machine identifier are the same, it is determined that the target virtual machine has the authority to access the target data register group. When the target data register group to be accessed by the target virtual machine is a data register group corresponding to another virtual machine, the target virtual machine needs to include the first virtual machine identifier indicating itself in the register access request generated by the target virtual machine, so the electronic device determines that the first virtual machine identifier and the virtual machine identifier stored in the protection register are different, and determines that the target virtual machine does not have the authority to access the target data register group. Also, for example, the target protection register may store address data indicating the address range of the target data register group (e.g., upper segment data of the address of each data register in the target data register group, and the number of bits of the upper segment data is a predetermined value). When it is determined that the address of the data register to be accessed by the target virtual machine belongs to the address range indicated by the address data stored in the target protection register, it is determined that the target virtual machine has the authority to access the target data register group.

[0038] Optionally, after determining that the target virtual machine has access authority to the target data register group, the electronic device can send an enable signal to the target data register group, thereby causing the target data register to turn on data read and write functions.

[0039] In step 204, if the access permission is an access permission, determine an access target data register from the group of target data registers according to the first address, and allow the target virtual machine to access the access target data register.

[0040] In this embodiment, if the access authority is an access permission, the electronic device can determine an access target data register from the group of target data registers based on the first address.

[0041] Here, the first address may be a relative address of the access target register in the target data register set, and the access target register can be located from the target data register set based on the relative address. For example, the first address may be a number from 0 to A-1, where A is the number of data registers included in the target data register set.

[0042] Then, the electronic device can cause the target virtual machine to access the accessed data register, i.e., the target virtual machine performs data read and write operations on the accessed data register when executing the software.

[0043] The method provided by the above embodiment of the present disclosure provides a dedicated target data register group for the target virtual machine, and uses a target protection register to control the target virtual machine's access authority to the target data register group, so that the target virtual machine can only access the corresponding target data register group, thereby allowing different virtual machines to flexibly control their access to corresponding data register groups, realizing isolation between register groups in hardware and avoiding the need to install complex software programs to control the virtual machine's access authority to registers, thereby improving the efficiency of the virtual machines accessing the registers.

[0044] In some alternative implementations, step 203 includes steps 2031 and 2032, as shown in FIG.

[0045] In step 2031, a pre-stored second virtual machine identifier is obtained from the target protection register.

[0046] Here, the second virtual machine identifier indicates a virtual machine corresponding to the target data register group, i.e., a virtual machine that can access the target data register group. As an example, the second virtual machine identifier may be the upper segment data of each data register included in the target data register group. For example, when the address of the data register is m-bit binary data, i.e., the address range of the first predetermined number of data registers 102 is [m-1:0], and the address range is divided into two segments and expressed as [m-1:n] and [n-1:0], the segment [m-1:n] indicates each data register group, and the segment [n-1:0] indicates a data register in each data register group, the m-1th bit to the nth bit of the address of each data register included in the target data register group are all the same. As a result, the m-1th bit to the nth bit of the address of each data register included in the target data register group can be used as the second virtual machine identifier.

[0047] In step 2032, the target virtual machine's access permissions to the target data registers are determined based on the first virtual machine identifier and the second virtual machine identifier.

[0048] Specifically, if the electronic device determines that the first virtual machine identifier and the second virtual machine identifier are the same, it determines that the target virtual machine has access to the target data register group, and if they are not the same, the target virtual machine does not have access to the target data register group.

[0049] In this embodiment, by comparing a first virtual machine identifier in a register access request with a second virtual machine identifier stored in a target protection register, it is possible to determine whether the target virtual machine has authority to access the target data register group, and quickly and accurately determine the access authority of the target virtual machine requesting access to the target data register group, which helps to improve the efficiency of accessing data registers in a multi-virtual machine environment.

[0050] In some alternative implementations, step 2032 includes steps 20321 and 20322, as shown in FIG.

[0051] In step 20321, an enable signal is generated based on the first virtual machine identifier and the second virtual machine identifier.

[0052] Here, the enable signal may be a level signal (high level or low level) or a digital signal including multiple bits.

[0053] In step 20322, the target virtual machine is given permission to access the target data registers based on the enable signal.

[0054] For example, the enable signal may be a low-level signal, i.e., when the electronic device determines that the target virtual machine has access permission to the target data register group based on the comparison result between the first virtual machine identifier and the second virtual machine identifier (e.g., the first virtual machine identifier and the second virtual machine identifier are the same), it pulls down the level of the enable signal line connected to the target data register group, turning on the read and write function of the target data register group, thereby allowing the target virtual machine to access the target data registers.

[0055] In this embodiment, an enable signal is generated to turn on the target virtual machine's access authority to the target data register group, thereby realizing simple and flexibly controlling the target virtual machine's access authority to the target data register group.

[0056] In some alternative implementations, step 2032 includes: The method further includes generating a prohibition signal in response to determining that the first virtual machine identifier and the second virtual machine identifier do not meet the authority permission condition, and turning off the target virtual machine's access authority to the target data register based on the prohibition signal.

[0057] Continuing with the above example, when the electronic device determines that the first virtual machine identifier and the second virtual machine identifier are different, it can determine that the authority permission condition is not met, at which time it can generate a high level indicating a prohibition signal, raising the level of the enable signal line, and prohibiting the read and write functions of the target data register group, thereby preventing the target virtual machine from accessing the target data registers.

[0058] In this embodiment, if the target virtual machine does not have permission to access the target data register group, the target virtual machine can be prohibited from accessing the target data register group, which helps to realize isolation of the data register group between different virtual machines and prevents conflicts between multiple virtual machines accessing the data registers.

[0059] In some alternative implementations, as shown in FIG. 5, step 201 includes steps 2011 to 2015.

[0060] In step 2011, a second address of the data register to be accessed is extracted from the register access request.

[0061] Here, the second address may be an absolute address of the access target register, and the absolute address is an address indicating the location of the access target data register in the first predetermined number of data registers 102 shown in FIG.

[0062] In step 2012, the first segment data is extracted from the second address.

[0063] Here, the first segment data may be upper segment data in the second address. For example, when the second address is m-bit binary data, that is, the address range of the first predetermined number of data registers 102 is [m-1:0], the address range is divided into two segments, [m-1:n] and [n-1:0], and the first segment data may include data corresponding to the address range [m-1:n].

[0064] In step 2013, a first virtual machine identifier is determined based on the first segment data.

[0065] Generally, the first segment data can be determined as a first virtual machine identifier. Optionally, a correspondence relationship between the first segment data and the first virtual machine identifier can be established in advance, and the first virtual machine identifier can be determined based on the correspondence relationship.

[0066] In step 2014, the second segment data is extracted from the second address.

[0067] Here, the second segment data may be lower segment data at the second address. Continuing with the above example, the second segment data may include data corresponding to the address range [n-1:0].

[0068] In step 2015, a first address of the data register to be accessed is determined based on the second segment data.

[0069] Usually, the second segment data may be determined as the first address. Alternatively, a correspondence relationship between the second segment data and the first address may be established in advance, and the first address may be determined based on the correspondence relationship.

[0070] Continuing with the above example, if the first segment data in the address range [m-1:n] is a first virtual machine identifier, the address range can indicate a set of 2m-n data registers. If the address range [n-1:0] is a second segment data, the address range can indicate 2n data registers included in each set of data registers.

[0071] In this embodiment, the first segment data and the second segment data are extracted from the second address to obtain a first virtual machine identifier and a first address, thereby quickly and accurately locating the target data register group to which the data register to be accessed of the target virtual machine belongs based on the address, and quickly and accurately locating the position of the data register to be accessed in the target data register group, which is helpful in improving the determination of the authority of the virtual machine to access the data register.

[0072] In some alternative implementations, as shown in FIG. 6, step 202 includes steps 2021-2022.

[0073] In step 2021, a target data register set is determined from the at least two data register sets based on the first virtual machine identifier, and an address offset between the target data register set and the target protection register is determined.

[0074] 1 are generally arranged consecutively. Therefore, when a protection register group corresponding to each data register group is assigned in advance, an address offset corresponding to each data register group is provided, and the protection register corresponding to the data register group can be positioned based on the address offset.

[0075] Optionally, the starting address of the address offset may be the first address of the data registers, the last address, etc., and the starting address may be added to the address offset to obtain the address of the corresponding protection register.

[0076] In step 2022, a target protection register is determined from the group of protection registers based on the address offset.

[0077] For example, the address of the target protection register can be obtained by adding the starting address of the target data register group to the address offset, and the target protection register can be determined from the target data register group based on the address of the target protection register.

[0078] This embodiment determines an address offset between the target data register group and the target protection register, and determines the target protection register based on the address offset, thereby realizing fast and accurate location of the target protection register, which is helpful in determining the efficiency of the target virtual machine's access authority to the target data register group.

[0079] In some alternative implementations, as shown in FIG. 7, before step 201, the method further includes steps 701-703.

[0080] In step 701, a first predetermined number of data registers are grouped based on a preset number of at least two virtual machines to obtain a group of data registers corresponding to each virtual machine in the at least two virtual machines.

[0081] Here, the number of data register groups included in the first predetermined number of data registers may be a divided fixed number, which may be equal to or greater than the number of virtual machines, and the electronic device can set a data register group corresponding to each virtual machine, and the number of data register groups may be the same as the number of virtual machines, i.e., the corresponding number of data register groups is divided based on the set number of virtual machines.

[0082] In step 702, in the second predetermined number of protection registers, a protection register corresponding to each data register group in the obtained at least two data register groups is set.

[0083] Specifically, it is possible to set correspondence information between the address range of each data register group and the address of the protection register. For example, the correspondence information includes the top address of each data register group and the corresponding address offset, and it is possible to determine the protection register corresponding to each data register group based on the address offset.

[0084] In step 703, generate a virtual machine identifier corresponding to each data register group based on an address range of each data register group in the at least two data register groups, and store the virtual machine identifier in a corresponding protection register.

[0085] For example, the upper segment data of each address in the address range of each data register group can be stored in the corresponding protection register as a virtual machine identifier, and the virtual machine identifier corresponding to each data register group manually set by the user can be stored in the corresponding protection register.

[0086] Usually, when starting up an electronic device, an initialization operation needs to be performed, and the initialization operation includes the above steps 701 to 703. Note that the hardware that executes the initialization operation is different from the hardware that executes each embodiment corresponding to the above-mentioned Figs. 2 to 6. That is, the electronic device may include a first logic execution device and a second logic execution device, and the first logic execution device may be a dedicated logic circuit designed in a hardware description language, and the second logic execution device may be a general-purpose processor. When the electronic device starts up, the general-purpose processor performs initialization, that is, it arranges the correspondence between the register group, the virtual machine, and the protection register. And the access authority of each virtual machine is controlled by the dedicated logic circuit.

[0087] In this embodiment, a corresponding set of data registers and protection registers are set up in advance for each of multiple virtual machines, and the data registers accessed by different virtual machines are isolated in hardware, avoiding mutual interference caused when different virtual machines access the data registers, eliminating the need to use complex software to manage the data registers, and improving the efficiency of accessing data registers in a multiple virtual machine environment. Exemplary Apparatus

[0088] Fig. 8 is a structural schematic diagram of a data register access device provided by an exemplary embodiment of the present disclosure. This embodiment can be applied to electronic equipment, and as shown in Fig. 8, the data register access device includes: a first determination module 801 used to determine a first virtual machine identifier and a first address of an access target data register from a register access request generated by a target virtual machine, where the first address indicates the location of the access target data register in a target data register group to which the target virtual machine belongs; a second determination module 802 used to determine a target data register group and a target protection register corresponding to the target virtual machine from at least two preset data register groups and a preset protection register group according to the first virtual machine identifier; a third determination module 803 used to determine the access permission of the target virtual machine to the target data register group according to the target protection register; and an access module 804 used to determine an access target data register from the target data register group according to the first address if the access permission is an access permission, and to allow the target virtual machine to access the access target data register.

[0089] In this embodiment, the first determining module 801 may determine a first virtual machine identifier and a first address of a data register to be accessed from a register access request generated by a target virtual machine.

[0090] Here, the register access request may be a request generated by the target virtual machine before accessing the data register. Usually, when the target virtual machine needs to write data to or read data from the data register to be accessed, it needs to generate a register access request, and the first determination module 801 can extract a first virtual machine identifier (VMID) indicating the target virtual machine and a first address of the data register to be accessed from the register access request. The first virtual machine identifier indicates a virtual machine corresponding to the target data register group to which the data register to be accessed belongs, that is, the target virtual machine needs to generate a virtual machine identifier corresponding to the target data register group before accessing the target data register group, and the first determination module 801 can determine the target data register group from at least two data register groups shown in FIG. 1 based on the first virtual machine identifier. The first virtual machine identifier may be an identifier of any form, for example, it may include at least one of numbers, letters, and symbols.

[0091] The first address indicates the location of the data register to be accessed in the group of target data registers to which it belongs. Optionally, the first address may be a relative address or an absolute address of the data register to be accessed. For example, if the absolute address of the data register to be accessed is m-bit binary data, the first address may be the m-bit binary data or the lower n bits of the m-bit binary data, the lower n bits being the relative address, and the numerical range of the lower n bits may correspond to the number of data registers in the group of target data registers.

[0092] Optionally, the register access request may include an absolute address of the data register to be accessed, and if the absolute address is m-bit binary data, the upper mn bits of the absolute address may be a first register identifier and the lower n bits of the absolute address may be the first address. That is, the upper mn bits of the data correspond to a target data register group consisting of 2n data registers, and the first address is the address of the data register to be accessed in the 2n data registers. Thus, the target data register group can be located in the first predetermined number of data registers 102 based on the first register identifier, and the data register to be accessed can be located in the target data register group based on the first address.

[0093] In this embodiment, the second determination module 802 may determine a target data register group and a target protection register group corresponding to the target virtual machine from at least two preset data register groups and a preset protection register group according to the first virtual machine identifier, where the protection register group may be a register group consisting of at least two protection register groups in a second predetermined number of protection registers as shown in FIG.

[0094] Each protection register in the protection register group corresponds to one data register group, i.e., one virtual machine. The correspondence between each protection register in the protection register group and the data register group may be established in advance. For example, the addresses of the first predetermined number of data registers 102 and the second predetermined number of protection registers shown in FIG. 1 are consecutively arranged, and address offsets corresponding to each data register group can be set sequentially based on the arrangement order of each data register group, and the corresponding protection register can be determined based on the address offset. Also, for example, a correspondence table including the top address of the data register group, the address of the corresponding protection register, and the virtual machine identifier can be established in advance, and the target data register group and the target protection register corresponding to the target virtual machine can be determined based on the correspondence table.

[0095] In this embodiment, the third determination module 803 can determine the access right of the target virtual machine to the set of target data registers based on the target protection register, where the target protection register can store data indicating the access right of the target virtual machine to the set of target data registers.

[0096] For example, a virtual machine identifier may be stored in the target protection register, and when the virtual machine identifier is the same as the first virtual machine identifier, it is determined that the target virtual machine has access authority to the target data register group. Also, for example, the target protection register may store address data (e.g., upper segment data of the address of each data register in the target data register group, and the number of bits of the upper segment data is a predetermined value) indicating the address range of the target data register group, and when it is determined that the address of the data register to be accessed by the target virtual machine belongs to the address range indicated by the address data stored in the target protection register, it is determined that the target virtual machine has access authority to the target data register group.

[0097] Optionally, after determining that the target virtual machine has access authority to the target data register group, the third determination module 803 can send an enable signal to the target data register group, thereby causing the target data register to turn on the data read and write function.

[0098] In this embodiment, if the access permission is an access permission, the access module 804 can determine, based on the first address, a data register to be accessed from the group of target data registers.

[0099] Here, the first address may be a relative address of the access target register in the target data register set, and the access target register can be located from the target data register set based on the relative address. For example, the first address may be a number from 0 to A-1, where A is the number of data registers included in the target data register set.

[0100] Subsequently, the access module 804 can allow the target virtual machine to access the accessed data register, i.e., perform data read and write operations on the accessed data register when the target virtual machine executes the software.

[0101] Please refer to FIG. 9, which is a structural schematic diagram of a data register access unit provided according to another exemplary embodiment of the present disclosure.

[0102] In some selectable implementations, the third determination module 803 includes a reading unit 8031 ​​used to obtain a pre-stored second virtual machine identifier from the target protection register, and a first determination unit 8032 used to determine the target virtual machine's access authority to the target data register group based on the first virtual machine identifier and the second virtual machine identifier.

[0103] In some selectable implementations, the first determination unit 8032 includes a generating subunit 80321 used to generate an enable signal based on the first virtual machine identifier and the second virtual machine identifier, and an on subunit 80322 used to turn on the target virtual machine's access permission to the target data register group based on the enable signal.

[0104] In some selectable implementations, the first determination module 801 includes a first extraction unit 8011 used to extract a second address of the data register to be accessed from the register access request, a second extraction unit 8012 used to extract first segment data from the second address, a second determination unit 8013 used to determine a first virtual machine identifier based on the first segment data, a third extraction unit 8014 used to extract the second segment data from the second address, and a third determination unit 8015 used to determine the first address of the data register to be accessed based on the second segment data.

[0105] In some alternative implementations, the first determination unit 8032 includes an off subunit 80323 used to generate a prohibition signal in response to determining that the first virtual machine identifier and the second virtual machine identifier do not meet the authority permission condition, and to turn off the target virtual machine's access authority to the target data register based on the prohibition signal.

[0106] In some selectable implementations, the second determination module 802 includes a fourth determination unit 8021 used to determine a target data register group from the at least two data register groups based on the first virtual machine identifier and to determine an address offset between the target data register group and the target protection register, and a fifth determination unit 8022 used to determine a target protection register from the protection register group based on the address offset.

[0107] In some selectable implementations, the apparatus further includes a grouping module 805 used to group a first predetermined number of data registers based on a preset number of at least two virtual machines and obtain a set of data registers corresponding to each virtual machine in the at least two virtual machines, a setting module 806 used to set protection registers corresponding to each data register group in the obtained at least two data register groups in a second predetermined number of protection registers, and a generation module 807 used to generate a virtual machine identifier corresponding to each data register group based on an address range of each data register group in the at least two data register groups, and store the virtual machine identifier in the corresponding protection register.

[0108] The data register access device provided by the above embodiment of the present disclosure sets a dedicated target data register group for the target virtual machine, and uses a target protection register to control the target virtual machine's access authority to the target data register group, so that the target virtual machine can only access the corresponding target data register group, thereby allowing different virtual machines to flexibly control their access to corresponding data register groups, realizing isolation between register groups in hardware and avoiding the need to set up complex software programs to control the virtual machine's access authority to registers, thereby improving the efficiency of the virtual machine's access to registers. Exemplary Electronic Devices

[0109] An embodiment of the present disclosure further provides an electronic device, which includes a logic execution device 101, a first predetermined number of data registers 102, a second predetermined number of protection registers 103 and a command memory 104 as shown in FIG. 1, and for the functions of the logic execution device 101, the first predetermined number of data registers 102, the second predetermined number of protection registers 103 and the command memory 104, reference may be made to the description of the exemplary architecture shown in FIG. 1 above, and description thereof will be omitted here.

[0110] The electronic device may also include an input device, an output device, and necessary memory. Here, the input device may include, for example, a mouse, a keyboard, a touch panel, a communication network connector, and the like, and is used to input various commands, etc. The output device may include, for example, a display, a printer, a communication network, and remote output devices to which they are connected, and is used to output various data, etc. The memory is used to store data input from the input device and data generated during the operation of the electronic device. The memory may include volatile memory and / or non-volatile memory. Volatile memory includes random access memory (RAM) and / or cache memory, etc. Non-volatile memory may include, for example, read-only memory (ROM), a hard disk, flash memory, etc. Exemplary Computer Program Products and Computer-Readable Storage Media

[0111] In addition to the methods and apparatus described above, an embodiment of the present disclosure may be a computer program product including computer program instructions that, when executed by the logic execution device 101 shown in FIG. 1, cause a processor to perform steps in the data register access methods according to various embodiments of the present disclosure described in the "Exemplary Methods" section above of this specification.

[0112] The computer program product can be program code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages, to perform operations of embodiments of the present disclosure. The program code may run entirely on the user computing device, partially on the user computing device, as a standalone software package, partially on the user computing device, partially on a remote computing device, or entirely on a remote computing device or server.

[0113] Additionally, an embodiment of the present disclosure may be a computer readable storage medium having stored thereon computer program commands that, when executed by the logic execution device 101, cause the logic execution device 101 to perform steps in a data register access method according to various embodiments of the present disclosure described in the "Exemplary Method" section above of this specification.

[0114] The computer readable storage medium may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may include, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples (non-exhaustive list) of readable storage media include an electrical connection having one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0115] Although the basic principles of the present disclosure have been described above with reference to specific embodiments, it should be noted that the advantages, advantages, effects, etc. mentioned in the present disclosure are merely illustrative and not limiting, and it should not be considered that each embodiment of the present disclosure necessarily has them. In addition, the specific details of the above disclosure are merely illustrative and easy to understand functions, and are not limiting, and the above details do not necessarily limit the present disclosure to be realized with the above specific details.

[0116] Those skilled in the art can make various modifications and variations to the present disclosure without departing from the spirit and scope of the present disclosure. Thus, if these modifications and variations of the present disclosure fall within the scope of the claims of the present disclosure and its equivalents, the present disclosure is also intended to include these modifications and variations.

Claims

1. determining a first virtual machine identifier and a first address of a data register to be accessed from a register access request generated by the target virtual machine, the first address indicating a location of the data register to be accessed within a group of target data registers; determining a target data register set and a target protection register set corresponding to the target virtual machine from at least two preset data register sets and a preset protection register set based on the first virtual machine identifier; determining, based on the target protection registers, access permissions of the target virtual machine to the set of target data registers; determining an access target data register from the group of target data registers based on the first address if the access permission is an access permission, and causing the target virtual machine to access the access target data register.

2. determining, based on the target protection registers, access rights of the target virtual machine to the set of target data registers, obtaining a pre-stored second virtual machine identifier from the target protection register; and determining an access right of the target virtual machine to the set of target data registers based on the first virtual machine identifier and the second virtual machine identifier.

3. determining an access right of the target virtual machine to the set of target data registers based on the first virtual machine identifier and the second virtual machine identifier, generating an enable signal based on the first virtual machine identifier and the second virtual machine identifier; 3. The method of claim 2, further comprising: turning on the target virtual machine's access authority to the target data registers based on the enable signal.

4. determining a first virtual machine identifier and a first address of a data register to be accessed from a register access request generated by a target virtual machine, extracting a second address of the data register to be accessed from the register access request; extracting a first segment data from the second address; determining the first virtual machine identifier based on the first segment data; extracting second segment data from the second address; and determining a first address of the data register to be accessed based on the second segment data.

5. determining an access right of the target virtual machine to the set of target data registers based on the first virtual machine identifier and the second virtual machine identifier, 3. The data register access method of claim 2, further comprising: generating a prohibition signal in response to determining that the first virtual machine identifier and the second virtual machine identifier do not meet an authority permission condition; and turning off the target virtual machine's access authority to the target data register group based on the prohibition signal.

6. The step of determining a target data register set and a target protection register set corresponding to the target virtual machine from at least two preset data register sets and a preset protection register set based on the first virtual machine identifier includes: determining a target data register set from the at least two data register sets based on the first virtual machine identifier, and determining an address offset between the target data register set and the target protection register; and determining the target protection register from the set of protection registers based on the address offset.

7. Prior to the step of determining a first virtual machine identifier and a first address of a data register to be accessed from a register access request generated by a target virtual machine, the data register access method further comprises: Grouping a first predetermined number of data registers based on a preset number of at least two virtual machines to obtain a set of data registers corresponding to each virtual machine in the at least two virtual machines; setting, in a second predetermined number of protection registers, protection registers corresponding to each data register group in the at least two data register groups obtained; generating a virtual machine identifier corresponding to each data register group based on an address range of each data register group in the at least two data register groups, and storing the virtual machine identifier in a corresponding protection register.

8. a first determination module used to determine a first virtual machine identifier and a first address of a data register to be accessed from a register access request generated by a target virtual machine, the first address indicating a location of the data register to be accessed in a group of target data registers to which the data register belongs; a second determination module used to determine a target data register set and a target protection register set corresponding to the target virtual machine from at least two preset data register sets and a preset protection register set according to the first virtual machine identifier; a third determination module adapted to determine the target virtual machine's access rights to the target data registers based on the target protection registers; an access module used to determine an access target data register from the group of target data registers based on the first address when the access permission is an access permission, and to cause the target virtual machine to access the access target data register.

9. A computer-readable storage medium having stored thereon a computer program for use in implementing the data register access method according to any one of claims 1 to 7 when executed by a logic execution device.

10. 1. An electronic device comprising: a logic execution device; a first predetermined number of data registers; a second predetermined number of protection registers; and a command memory; the command memory is used to store executable commands for the logic-performing device; The logic execution device is adapted to read the executable command from the memory and execute the command to implement the data register access method according to any one of claims 1 to 7.

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