Current resonant DC / DC converter

The current resonance type DC/DC converter addresses the challenge of accommodating low input voltages by using a controlled boost and resonance circuit, ensuring efficient power output and safe peak current levels.

JP7663491B2Active Publication Date: 2025-04-16NICHICON CORP
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Patent Information

Application Number
JP2021214197
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-12-28
Publication Date
2025-04-16
Estimated Expiration
2041-12-28

AI Technical Summary

Technical Problem

Current resonance type DC/DC converters of the CLLC system face challenges in accommodating a wide range of input voltages, particularly when the input voltage is relatively low, leading to insufficient DC power output and potential peak current exceeding allowable values.

Method used

The proposed current resonance type DC/DC converter includes a primary circuit with a bridge of switching elements, a secondary circuit with a boost circuit and rectifier, a current resonance circuit, a transformer, and a control unit. The control unit manages the switching elements to maintain the boost rate near the optimum and the drive frequency above the lower limit, ensuring the peak current remains below the allowable value and maximum power output is achieved.

Benefits of technology

This configuration enables the DC/DC converter to output the required large DC power even at low input voltages while keeping the peak current within safe limits, effectively addressing the limitations of existing CLLC systems.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a current resonance DC / DC converter capable of outputting required DC power while suppressing peak current below an allowable current value even when input voltage is low.SOLUTION: A current resonance DC / DC converter 10A comprises: a secondary circuit 12 including a boost circuit; and a storage unit 14 for storing a lower limit value of drive frequency and a boosting ratio determined in advance so that a current flowing a primary circuit 11 and the secondary circuit 12 does not exceed an allowable current value and an output power of the secondary circuit 12 is maximized, as a lower limit drive frequency and an optimum boosting ratio for each input voltage V1. A control unit 13 controls the primary circuit 11 and the secondary circuit 12 so that the boosting ratio coincides with an optimum boosting ratio corresponding to the input voltage V1 and the drive frequency does not fall below the lower limit drive frequency corresponding to the DC voltage V1 when stepping up the input voltage V1 by operating the boost circuit, to output from the secondary circuit 12.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] The present invention relates to a current resonant DC / DC converter equipped with a boost function. [Background technology]

[0002] A device called V2H (Vehicle to Home) that extracts DC power from the on-board battery used to drive electric vehicles such as electric vehicles (EVs) and plug-in hybrid vehicles (PHEVs) usually includes a bidirectional DC / DC converter that boosts the DC voltage (hereinafter also referred to as "input voltage") output by the on-board battery, and a bidirectional DC / AC inverter that converts the boosted DC voltage into an AC voltage. Of these, the current-resonant DC / DC converter of the CLLC method, which is suitable for miniaturization and high efficiency, has attracted attention as a bidirectional DC / DC converter.

[0003] V2H devices that comply with the CHAdeMO standard must support a wide range of input voltages from 150V to 450V. However, because a CLLC-type current resonant DC / DC converter must output a certain voltage in both directions, the degree of freedom in the transformer's transformation ratio is low, and the range of voltage that can be boosted is narrower than that of a power supply that combines a LLC-type current resonant DC / DC converter alone with a buck-boost chopper. For this reason, when the input voltage is relatively low, the CLLC-type current resonant DC / DC converter may not be able to output the DC power required by the bidirectional DC / AC inverter. In other words, the CLLC-type current resonant DC / DC converter could not support a wide range of input voltages.

[0004] As one method for solving this problem, it has been considered to provide a boost function to the secondary circuit of the LLC type current resonant DC / DC converter. For example, Non-Patent Document 1 describes a method for providing a boost function to the secondary rectifier circuit of the LLC type current resonant DC / DC converter by adding two switching elements S S2 ,S S3A delay time T D (=T0-T1, T3-T4) is generated to realize a boost (stronger voltage increase). D-N (=one drive period T S Delay time T D The boost ratio M is expressed by a function with the parameters of the ratio of the input current (V) to the drive frequency F of the primary circuit (see Figure 2 in particular). [Prior art documents] [Non-patent literature]

[0005] [Non-Patent Document 1] Yungtaek Jang, et al., “Implementation of 3.3-kW GaN-Based DC-DC Converter for EV On-Board Charger with Series-Resonant Converter that Employs Combination of Variable-Frequency and Delay-Time Control”, Proc. of APEC2016, pp.1292-1299 Summary of the Invention [Problem to be solved by the invention]

[0006] However, in this conventional LLC type current resonant DC / DC converter, in order to obtain the desired boost ratio M, the boost ratio T D-N and drive frequency F from the infinite number of combinations that exist, it has not been determined. For this reason, with this current resonant DC / DC converter, if the boost rate is set too high or the drive frequency F is set too low, the resonant current (peak current) flowing in the primary and secondary circuits may exceed the predetermined allowable current value.

[0007] The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a current resonant DC / DC converter that is compatible with a wide range of input voltages and that is capable of outputting a required large DC power while suppressing the peak current to an allowable current value or less even when the input voltage is relatively low. [Means for solving the problem]

[0008] In order to solve the above problems, a current resonant DC / DC converter according to the present invention includes a primary circuit configured with a bridge circuit including a plurality of switching elements, a secondary circuit configured with a boost circuit and a rectifier circuit including a plurality of switching elements, a current resonant circuit including a resonant coil and a resonant capacitor, a transformer provided between the primary circuit and the secondary circuit, and a control unit that controls on / off of the switching elements that configure the primary circuit and the switching elements that configure the secondary circuit, and is configured such that the current flowing through the primary circuit and the secondary circuit does not exceed a predetermined allowable current value and the power output from the secondary circuit is maximized. The control unit is further provided with a memory unit that stores the determined lower limit value of the drive frequency of the switching elements constituting the primary side circuit and the boost rate of the boost circuit as a lower limit drive frequency and an optimal boost rate for each DC voltage input to the primary side circuit, and the control unit is configured to control on / off of the switching elements constituting the primary side circuit and the switching elements constituting the secondary side circuit so that the boost rate approaches the optimal boost rate corresponding to the DC voltage and the drive frequency does not fall below the lower limit drive frequency corresponding to the DC voltage when the DC voltage input to the primary side circuit is boosted by the boost operation of the boost circuit and output from the secondary side circuit.

[0009] In this configuration, the lower limit of the drive frequency (lower limit drive frequency) and the boost rate (optimum boost rate) that will ensure that the current (peak current) flowing through the primary and secondary circuits does not exceed a predetermined allowable current value and that will maximize the power output from the secondary circuit are determined in advance for each DC voltage input to the primary circuit through simulation, actual machine evaluation, etc., and the control unit controls the primary and secondary circuits accordingly. Therefore, with this configuration, even when the input voltage is low, it is possible to output the required large DC power from the secondary circuit while suppressing the peak current to below the allowable current value.

[0010] In order to reliably output the required DC power from the secondary side circuit, the control unit of the DC / DC converter is preferably configured to boost the DC voltage input to the primary side circuit by increasing the boost rate from zero to an optimum boost rate corresponding to the DC voltage while maintaining the drive frequency at a predetermined upper limit drive frequency, and then decreasing the drive frequency toward the lower limit drive frequency corresponding to the DC voltage.

[0011] The control unit of the DC / DC converter may be configured, when terminating boosting of the DC voltage input to the primary side circuit by the boost operation, to increase the drive frequency to an upper limit drive frequency while maintaining the boost rate at an optimal boost rate, and then to decrease the boost rate to zero.

[0012] Furthermore, the control unit of the DC / DC converter may be configured to change the drive frequency while the boost rate approaches an optimum boost rate corresponding to the DC voltage input to the primary side circuit, and to control the on / off of switching elements constituting the primary side circuit and switching elements constituting the secondary side circuit so that the power output from the secondary side circuit becomes a desired output power. Effect of the Invention

[0013] According to the present invention, it is possible to provide a current resonant DC / DC converter that is compatible with a wide range of input voltages and that is capable of outputting a required large DC power while suppressing the peak current to be equal to or less than the allowable current value even when the input voltage is relatively low. [Brief description of the drawings]

[0014] [Figure 1] 1 is a circuit diagram of a DC / DC converter according to an embodiment of the present invention. [Diagram 2] 1 is a block diagram showing a usage mode of a DC / DC converter according to an embodiment; [Diagram 3] 1A and 1B are diagrams showing control timings of switching elements constituting a DC / DC converter according to an embodiment, in which (A) is a diagram showing an example of the control timing when boosting is not performed, and (B) is a diagram showing an example of the control timing when boosting is performed. [Figure 4] 3A and 3B are diagrams showing current paths of a DC / DC converter according to an embodiment, in which (A) shows the current path during a period 1-1 in FIG. 3B, (B) shows the current path during a period 1-2, and (C) shows the current path during a period 1-3. [Diagram 5] 3A and 3B are diagrams showing current paths of a DC / DC converter according to an embodiment, in which (A) shows the current path during a period 2-1 in FIG. 3B, (B) shows the current path during a period 2-2, and (C) shows the current path during a period 2-3. [Figure 6] FIG. 4 is a diagram showing the relationship between the drive frequency, the output voltage, and the boost rate in the DC / DC converter according to the embodiment. [Figure 7] 4 is a flow chart showing a start-up process executed by a control unit of the DC / DC converter according to the embodiment. FIG. [Figure 8] 4 is a flow diagram showing normal processing and termination processing executed by a control unit of the DC / DC converter according to the embodiment after startup processing; FIG. [Figure 9] 4 is a schematic diagram showing an overview of a start-up process executed by a control unit of the DC / DC converter according to the embodiment; FIG. [Figure 10]FIG. 4 is a circuit diagram of a DC / DC converter according to a first modified example of the present invention. [Figure 11] FIG. 11 is a circuit diagram of a DC / DC converter according to a second modified example of the present invention. [Figure 12] FIG. 11 is a circuit diagram of a DC / DC converter according to a third modified example of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a current resonant DC / DC converter according to the present invention will be described with reference to the accompanying drawings.

[0016] [Example] Fig. 1 shows a current resonant DC / DC converter 10A according to an embodiment of the present invention. The DC / DC converter 10A is a DC / DC converter of the CLLC type that operates bidirectionally, and constitutes a V2H device 110 together with a bidirectional DC / AC inverter 120 as shown in Fig. 2. The V2H device 110 can mainly perform a discharging operation in which the DC power of an on-board battery 100 for driving an electric vehicle is converted into a predetermined AC power and output to a load 130, and a charging operation in which the AC power of a commercial power system 140 is converted into a predetermined DC power and output to the on-board battery 100.

[0017] In a discharging operation, the DC / DC converter 10A boosts the DC voltage output by the in-vehicle battery 100, i.e., the voltage V1 appearing at the primary input / output terminals T1, T1', and outputs the boosted DC voltage, i.e., the voltage V2, from the secondary input / output terminals T2, T2'. On the other hand, in a charging operation, the DC / DC converter 10A lowers the DC voltage output by the bidirectional DC / AC inverter 120, i.e., the voltage V2 appearing at the secondary input / output terminals T2, T2', and outputs the lowered DC voltage, i.e., the voltage V1, from the primary input / output terminals T1, T1'.

[0018] The DC / DC converter 10A includes a primary circuit 11 configured with a bridge circuit including multiple switching elements, a secondary circuit 12 configured with a boost circuit and a rectifier circuit including multiple switching elements, a current resonant circuit including resonant coils L1, L2 and resonant capacitors C9, C10, a transformer TR provided between the primary circuit 11 and the secondary circuit 12, and a control unit 13 that controls the on / off of the switching elements that constitute the primary circuit 11 and the switching elements that constitute the secondary circuit 12.

[0019] The primary side circuit 11 includes a first switching element Q1, a second switching element Q2, a third switching element Q3, and a fourth switching element Q4. The first switching element Q1 constitutes an upper arm of the first leg, and the second switching element Q2 constitutes a lower arm of the first leg. The third switching element Q3 constitutes an upper arm of the second leg, and the fourth switching element Q4 constitutes a lower arm of the second leg. The connection point between the first switching element Q1 and the second switching element Q2 is connected to one end of the primary winding of the transformer TR via a resonant capacitor C9 and a resonant coil L1, and the connection point between the third switching element Q3 and the fourth switching element Q4 is connected to the other end of the primary winding.

[0020] The resonant coil L1 may be a leakage inductance of the transformer TR or may be a separate coil. Also, the resonant coil L1 may be a combination of the leakage inductance and a separate coil.

[0021] The first to fourth switching elements Q1 to Q4 are turned on / off (switched) under the control of the control unit 13. As the first to fourth switching elements Q1 to Q4, power semiconductor elements such as IGBTs (Insulated Gate Bipolar Transistors), silicon power MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), and silicon carbide power MOSFETs can be used.

[0022] First to fourth diodes D1 to D4 are connected in anti-parallel to the first to fourth switching elements Q1 to Q4, respectively. The first to fourth diodes D1 to D4 may be parasitic diodes that are parasitic (built-in) to the first to fourth switching elements Q1 to Q4, respectively, or may be external diodes.

[0023] First to fourth capacitors C1 to C4 are further connected in parallel to the first to fourth switching elements Q1 to Q4, respectively. The first to fourth capacitors C1 to C4 may be parasitic capacitances that are parasitic (built-in) to the first to fourth switching elements Q1 to Q4, respectively, or may be external capacitors.

[0024] The first switching element Q1 and the third switching element Q3 constituting the upper arm are connected to the primary input / output terminal T1 on the high potential side, while the second switching element Q2 and the fourth switching element Q4 constituting the lower arm are connected to the primary input / output terminal T1' on the low potential side.

[0025] The secondary circuit 12 includes a fifth switching element Q5, a sixth switching element Q6, a seventh switching element Q7, and an eighth switching element Q8. The fifth switching element Q5 constitutes an upper arm of the third leg, and the sixth switching element Q6 constitutes a lower arm of the third leg. The seventh switching element Q7 constitutes an upper arm of the fourth leg, and the eighth switching element Q8 constitutes a lower arm of the fourth leg. The connection point between the fifth switching element Q5 and the sixth switching element Q6 is connected to one end of the secondary winding of the transformer TR via a resonant capacitor C10 and a resonant coil L2, and the connection point between the seventh switching element Q7 and the eighth switching element Q8 is connected to the other end of the secondary winding.

[0026] Of the fifth to eighth switching elements Q5 to Q8, the sixth switching element Q6 and the eighth switching element Q8 constituting the "boost circuit" of the present invention are turned on / off (switched) under the control of the control unit 13. On the other hand, the fifth switching element Q5 and the seventh switching element Q7 are kept in the off state under the control of the control unit 13. As the fifth to eighth switching elements Q5 to Q8, power semiconductor elements such as IGBTs, silicon power MOSFETs, and silicon carbide power MOSFETs can be used.

[0027] The fifth to eighth diodes D5 to D8 are connected in anti-parallel to the fifth to eighth switching elements Q5 to Q8, respectively. The fifth to eighth diodes D5 to D8 may be parasitic (built-in) diodes of the fifth to eighth switching elements Q5 to Q8, respectively, or may be external diodes. The fifth to eighth diodes D5 to D8 constitute a "rectifier circuit" of the present invention during a discharging operation.

[0028] Fifth to eighth capacitors C5 to C8 are further connected in parallel to the fifth to eighth switching elements Q5 to Q8, respectively. The fifth to eighth capacitors C5 to C8 may be parasitic capacitances that are parasitic (built-in) to the fifth to eighth switching elements Q5 to Q8, respectively, or may be external capacitors.

[0029] The control unit 13 is composed of a control IC such as a microcomputer or an FPGA (Field-Programmable Gate Array). The control unit 13 controls the first to fourth switching elements Q1 to Q4 constituting the primary side circuit 11 and the fifth to eighth switching elements Q5 to Q8 constituting the secondary side circuit 12 based on commands and feedback information from a higher-level controller. The commands received by the control unit 13 from the higher-level controller include a start command, a stop command, and an output power command value. The feedback information received by the control unit 13 during a discharge operation includes a voltage value of the input voltage V1, a voltage value of the output voltage V2, and a current value of a current (output current) flowing out from the secondary side input / output terminal T2. The feedback information may include a current value of a current (input current) flowing into the primary side input / output terminal T1.

[0030] As shown in Fig. 3(A), the control unit 13 turns on / off the first switching element Q1 and the second switching element Q2 constituting the first leg in opposite phases. At this time, the control unit 13 controls both the second switching element Q2 so that the off time of the first switching element Q2 is slightly longer than the on time of the first switching element Q1, thereby providing a period during which both the first switching element Q1 and the second switching element Q2 are in the off state, i.e., a dead time. The same applies to the third switching element Q3 and the fourth switching element Q4 constituting the second leg.

[0031] Furthermore, when the input voltage V1 is relatively high, the control unit 13 stops the boost circuit by maintaining not only the fifth switching element Q5 and the seventh switching element Q7 but also the sixth switching element Q6 and the eighth switching element Q8 in the off state as shown in Fig. 3(A), thereby causing the fifth to eighth diodes D5 to D8 to perform diode bridge rectification. At this time, the control unit 13 can make the output power follow the command value by changing the drive period TS (=1 / drive frequency).

[0032] On the other hand, when the input voltage V1 is relatively low, the control unit 13 operates the boost circuit by turning on the sixth switching element Q6 and the eighth switching element Q8 for a period TB (hereinafter referred to as the "boost period") in accordance with the turn-on of the first switching element Q1 and the fourth switching element Q4 and the turn-on of the second switching element Q2 and the third switching element Q3, as shown in FIG. 3(B). At this time, the control unit 13 can make the output power follow the command value by changing at least one of the boost period TB and the drive cycle TS. However, since a large current that rises sharply flows during the boost period TB, frequent changes to the boost period TB may cause unexpected situations. For this reason, it is desirable to make the output power follow the command value mainly by changing the drive cycle TS (drive frequency).

[0033] As described later, when the control unit 13 activates the boost circuit, the secondary circuit 12 is short-circuited via the transformer TR, generating a large resonant current. If the resulting large energy is stored in the resonant coil L2 and released at an appropriate timing, a large output current can be obtained.

[0034] When the boost circuit operates, one drive cycle TS is made up of six periods 1-1, 1-2, 1-3, 2-1, 2-2, and 2-3.

[0035] The period 1-1 is a boost period. During this period, the secondary winding of the transformer TR is short-circuited by the sixth switching element Q6 and the eighth diode D8 that are in the ON state, so that a large resonant current flows through the path of "primary side input / output terminal T1 → first switching element Q1 (ON state) → resonant capacitor C9 → resonant coil L1 → primary winding of the transformer TR → fourth switching element Q4 (ON state) → primary side input / output terminal T1'" and the circular path of "secondary winding of the transformer TR → resonant coil L2 → resonant capacitor C10 → sixth switching element Q6 (ON state) → eighth diode D8" as shown in Fig. 4(A), and a large energy is stored in the resonant coils L1 and L2.

[0036] The period 1-2 is a transfer period. During this period, the sixth switching element Q6 is turned off, and the energy stored in the resonant coil L2 is released, and as shown in Fig. 4(B), a current flows through the path "secondary side input / output terminal T2' → eighth diode D8 → secondary winding of the transformer TR → resonant coil L2 → resonant capacitor C10 → fifth diode D5 → secondary side input / output terminal T2", and the output voltage V2 is boosted. The degree of boost depends on the length of the period 1-1 (boost period TB).

[0037] The period 1-3 is a regeneration period. During this period, the first switching element Q1 and the fourth switching element Q4 are turned off, and the energy stored in the resonant coil L1 is released, and as shown in Fig. 4(C), a current flows through the path "primary side input / output terminal T1' → second diode D2 → resonant capacitor C9 → resonant coil L1 → primary winding of transformer TR → third diode D3 → primary side input / output terminal T1", and energy is regenerated to the vehicle battery 100. The current in the primary side circuit 11 and the current in the secondary side circuit 12 that has been flowing since the period 1-2 gradually decrease.

[0038] In period 2-1, a large amount of energy is stored in the resonance coils L1 and L2 due to the resonance current flowing in the opposite direction to that in period 1-1 (see FIG. 5(A)).

[0039] In period 2-2, the energy stored in resonance coil L2 is released via a route different from that in period 1-2, and output voltage V2 is boosted (see FIG. 5(B)).

[0040] In period 2-3, the energy stored in the resonance coil L1 is released through a path different from that in period 1-3, and is regenerated in the in-vehicle battery 100 (see FIG. 5(C)).

[0041] 1, the DC / DC converter 10A further includes a storage unit 14. The storage unit 14 is configured, for example, with a non-volatile memory or the like. The storage unit 14 stores information required when the control unit 13 controls the primary side circuit 11 and the secondary side circuit 12.

[0042] Next, the characteristics of the DC / DC converter 10A according to this embodiment, which are necessary for understanding the significance of the information stored in the storage unit 14, will be described.

[0043] First, when discharging was performed under the condition of an input voltage V1 = 263V and a constant resistive load, the relationship between the drive frequency and boost rate (= boost period TB / drive cycle TS) and the output voltage V2 was simulated and the results are shown in Figure 6. The boost rate was set to 0% (no boost), 10%, 20%, 25% and 30%.

[0044] As shown by this result, the DC / DC converter 10A has the following characteristics: (1) the higher the peak of the output voltage V2, (2) the higher the drive frequency at which the output voltage V2 reaches its peak, and (3) the more sensitive the output voltage V2 is to the drive frequency, the higher the boost rate is. The peak of the current (resonant current) flowing through the primary circuit 11 and the secondary circuit 12 also shows a tendency similar to that of the output voltage V2. For this reason, in the DC / DC converter 10A, when the input voltage V1 is low and the boost rate has to be set relatively high, it is necessary to strictly control the drive frequency in order to suppress the peak current to a predetermined allowable current value or less. In particular, when the drive frequency is reduced from a relatively high frequency in order to make the output power follow a command value, it is necessary to accurately know to what extent the drive frequency can be reduced. The allowable current value is a value determined based on how much current a circuit component (for example, a power semiconductor element used for a switching element) can pass. If a current exceeding the allowable current value passes through a circuit component, problems such as thermal destruction occur.

[0045] Next, Table 1 shows the results of a simulation of how much the drive frequency can be lowered and the output power when discharging under the conditions of input voltage V1 = 150V, output voltage V2 = 450V, allowable current value = 35.5A, and resonant frequency of the resonant circuit = 110kHz. The boost rates were set to 20%, 25%, 30%, 35%, and 40%. [Table 1]

[0046] As these results show, DC / DC converter 10A has the characteristic that the higher the boost rate, the higher the lower limit of the drive frequency (for example, changing the boost rate from 20% to 40% raises the lower limit of the drive frequency from 130kHz to 211kHz), and that the output power when the operating frequency is at the lower limit varies depending on the boost rate (for example, when the boost rate is set to 30%, the output power is the highest, 2.69kW). Note that, as mentioned above, Table 1 is the simulation result under the condition of input voltage V1=150V, and if the condition of input voltage V1 is different, the results will differ from Table 1.

[0047] Taking these characteristics into consideration, in the DC / DC converter 10A of this embodiment, the memory unit 14 stores, as a lower limit drive frequency and an optimal boost rate, which have been determined in advance so that the current (peak current) flowing through the primary side circuit 11 and the secondary side circuit 12 does not exceed a predetermined allowable current value (e.g., 35.5 A) and the power (output power) output from the secondary side circuit 12 is maximized, for each DC voltage (input voltage V1) input to the primary side circuit 11 (see Table 2). [Table 2] For example, the optimum boost rate and the minimum drive frequency corresponding to an input voltage V1=150V are stored as 30% and 189kHz, respectively, according to Table 1. The optimum boost rate and the minimum drive frequency corresponding to other input voltages V1, indicated by ***, can be derived from the results of simulations performed by changing the conditions of the input voltage V1.

[0048] Next, with reference to Figs. 7 to 9, a process executed by the control unit 13 during a discharging operation based on the optimum boost rate and the lower limit drive frequency for each input voltage V1 stored in the storage unit 14 will be described.

[0049] In step S1, the control unit 13 receives an output power command value together with a command to start a discharge operation (start command) from a higher-level controller.

[0050] In step S2, the control unit 13 measures the input voltage V1. In this embodiment, the "measurement" is performed by receiving an electrical signal related to the input voltage V1 output by the voltage sensor as feedback information.

[0051] In step S3, the control unit 13 reads the optimum boost rate and the lower limit drive frequency corresponding to the measured input voltage V1 from the memory unit 14. For example, when the input voltage V1 is 150V, the optimum boost rate is read as 30% and the lower limit drive frequency is read as 189kHz (see Table 2).

[0052] In step S4, the control unit 13 starts turning on / off the first to fourth switching elements Q1 to Q4 constituting the primary side circuit 11 at a predetermined upper limit drive frequency fm (for example, 220 kHz that is twice the resonant frequency). The control unit 13 also starts turning on / off the fifth to eighth switching elements Q5 to Q8 constituting the secondary side circuit 12 at a boost rate of 0%. However, while the boost rate is 0%, the control unit 13 does not turn on the fifth to eighth switching elements Q5 to Q8 (see FIG. 3(A)).

[0053] In step S5, the control unit 13 compares the measured input voltage V1 with a predetermined boost start voltage. If the input voltage V1 is higher than the boost start voltage, it is determined that there is no need to perform boosting, and the process proceeds to step S10. On the other hand, in other cases, the process proceeds to step S6 to perform boosting.

[0054] In step S6, the control unit 13 increases the boost rate by a predetermined amount (for example, 1%). As a result, the fifth to eighth switching elements Q5 to Q8 constituting the secondary side circuit 12 are turned on / off at the increased boost rate. More specifically, the sixth switching element Q6 and the eighth switching element Q8 are turned on / off at the increased boost rate while the fifth switching element Q5 and the seventh switching element Q7 are maintained in the off state. When the boost rate increases, the output power also increases.

[0055] In step S7, the control unit 13 measures the output power. In this embodiment, the control unit 13 receives, as feedback information, an electrical signal relating to the output voltage V2 output by the voltage sensor and an electrical signal relating to the output current output by the current sensor that detects the current flowing out from the secondary side input / output terminal T2, and performs an operation on the received electrical signals to perform the "measurement".

[0056] In step S8, the control unit 13 compares the output power measured in step S7 with the output power command value received in step S1. If the two match, there is no need to further change the operating point (boost rate and drive frequency), so the process proceeds to [A]. This ends the startup process of the DC / DC converter 10A. On the other hand, if the two do not match, that is, if the output power has not reached the output power command value, the process proceeds to step S9 to continue changing the operating point.

[0057] In step S9, the control unit 13 compares the current boost rate with the optimal boost rate read in step S3. If the two match, it is inappropriate to further increase the boost rate, so the process proceeds to step S10. On the other hand, if the two do not match, that is, if the current boost rate has not reached the optimal boost rate, there is room to increase the boost rate to bring the output power closer to the output power command value, so the process returns to step S6.

[0058] The control unit 13 repeatedly executes steps S6 to S9 until the output power matches the output power command value or the boost rate matches the optimal boost rate.

[0059] In step S10, the control unit 13 reduces the drive frequency by a predetermined amount (for example, 1 kHz). As a result, the first to fourth switching elements Q1 to Q4 constituting the primary side circuit 11 and the fifth to eighth switching elements Q5 to Q8 constituting the secondary side circuit 12 are turned on / off at the reduced drive frequency. When the drive frequency is reduced, the output power increases.

[0060] In step S11, the control unit 13 measures the output power in the same manner as in step S7.

[0061] In step S12, the control unit 13 compares the output power measured in step S11 with the output power command value received in step S1. If the two match, there is no need to further change the operating point, so the process proceeds to [A]. This ends the startup process of the DC / DC converter 10A. On the other hand, if the two do not match, that is, if the output power has not reached the output power command value, the process returns to step S10 to continue changing the operating point (drive frequency).

[0062] The control unit 13 repeats steps S10 to S12 until the output power coincides with the output power command value. If the upper controller is functioning normally and there is no error in the information stored in the memory unit 14, the drive frequency will not fall below the lower limit drive frequency before the output power coincides with the output power command value. However, in order to reliably prevent element destruction due to the peak current exceeding the allowable current value, it is preferable that the control unit 13 judges whether the drive frequency falls below the lower limit drive frequency after executing step S10. If this judgment is not made, the reading of the lower limit drive frequency in step S3 can be omitted.

[0063] In this way, the control unit 13 increases the boost rate from 0% to the optimum boost rate corresponding to the DC voltage V1 while maintaining the drive frequency at the upper limit drive frequency fm, and then reduces the drive frequency toward the lower limit drive frequency corresponding to the DC voltage V1 (see the thick solid arrow "Example" in FIG. 9 and the curve C3). This allows the DC / DC converter 10A to reliably output the output power as instructed by the upper controller while reliably preventing the peak current from exceeding the allowable current value. Note that if the drive frequency and the boost rate are changed simultaneously in parallel, the drive frequency may drop to the lower limit drive frequency before the boost rate increases to the optimum boost rate, and the drive frequency may not be able to be reduced any further, making it impossible to output the output power as instructed (see the dashed arrow "Comparative Example" in FIG. 9).

[0064] As can be seen from FIG. 6, the output voltage V2 is very sensitive to a certain degree of boost rate increase. The output current and output power have a similar tendency. For this reason, it is preferable to make the output power follow the command value (especially the final fine adjustment) by changing the drive frequency rather than the boost rate. This is the reason why the boost rate is increased to the optimal boost rate and the drive frequency is reduced toward the lower limit drive frequency while maintaining the boost rate at the optimal boost rate.

[0065] In step S13, which is executed after the start-up process, the control unit 13 judges whether or not a stop command has been received from the upper controller. If a stop command has been received, the process proceeds to the termination process (steps S14 to S18). On the other hand, if a stop command has not been received, the process proceeds to the normal process (steps S19 to S26).

[0066] In steps S14 and S15, the control section 13 increases the drive frequency by a predetermined amount (for example, 1 kHz) until the drive frequency reaches the upper limit drive frequency fm.

[0067] In steps S16 and S17, the control unit 13 reduces the boost rate by a predetermined amount (for example, 1%) until the boost rate becomes 0%.

[0068] In step S18, which is executed after the drive frequency reaches the upper limit drive frequency fm and the boost rate becomes 0%, the control unit 13 stops turning on / off the first to fourth switching elements Q1 to Q4 that constitute the primary side circuit 11. Note that the on / off of the fifth to eighth switching elements Q5 to Q8 that constitute the secondary side circuit 12 (the fifth switching element Q5 and the seventh switching element Q7 are maintained in the off state, so the sixth switching element Q6 and the eighth switching element Q8) can be said to have stopped at the point when the boost rate becomes 0%.

[0069] This termination process enables DC / DC converter 10A to safely end the discharging operation.

[0070] In step S19, the control unit 13 receives an output power command value from a higher-level controller. The control unit 13 may suspend execution of step S19 until the output power command value is changed. In other words, the control unit 13 may execute normal processing only when the output power command value is changed.

[0071] In step S20, the control unit 13 measures the input voltage V1 in the same manner as in step S2.

[0072] In step S21, the control unit 13 reads from the storage unit 14 the optimum boost rate and the lower limit drive frequency corresponding to the measured input voltage V1.

[0073] In step S22, the control unit 13 compares the current boost rate with the optimal boost rate read in step S21. If the two do not match, the process proceeds to step S23, where the boost rate is increased or decreased, and then the process proceeds to step S24. On the other hand, if the two match, the process proceeds to step S24 without passing through step S23.

[0074] In step S23, the control unit 13 increases or decreases the boost rate by a predetermined amount (for example, 1%) so as to approach the optimum boost rate.

[0075] In step S24, the control unit 13 measures the output power in the same manner as in steps S7 and S11.

[0076] In step S25, the control unit 13 compares the output power measured in step S24 with the output power command value received in step S19. If the two match, there is no need to further change the operating point, so proceed to [A]. On the other hand, if the two do not match, there is a need to continue changing the operating point (drive frequency), so proceed to step S26.

[0077] In step S26, the control unit 13 increases or decreases the drive frequency by a predetermined amount (e.g., 1 kHz) so that the output power approaches the output power command value. More specifically, the control unit 13 increases the drive frequency when the output power is greater than the output power command value, and decreases the drive frequency when the output power is less than the output power command value.

[0078] Unless a stop command is received from the upper controller, control unit 13 repeatedly executes normal processing (steps S19 to S26). This allows DC / DC converter 10A to continue outputting output power according to the latest command value issued from the upper controller while preventing the peak current from exceeding the allowable current value.

[0079] In order to more reliably prevent element destruction due to the peak current exceeding the allowable current value, it is preferable that the control unit 13 judges whether the drive frequency is below the lower limit drive frequency after executing step S26. If this judgment is not performed, the reading of the lower limit drive frequency in step S21 can be omitted.

[0080] [Variations] Although the current resonant DC / DC converter according to the present invention has been described above by way of example, the present invention is not limited to this configuration. Representative modified examples of the present invention will now be described.

[0081] 10 shows a current resonant DC / DC converter 10B according to a first modified example of the present invention. The DC / DC converter 10B according to this modified example differs from the DC / DC converter 10A according to the embodiment in that the secondary-side resonant coil L2 and resonant capacitor C10 are omitted. When bidirectional operation is not required, the number of parts can be reduced by adopting the configuration of this modified example.

[0082] 11 shows a current resonant DC / DC converter 10C according to a second modified example of the present invention. The DC / DC converter 10C according to this modified example differs from the DC / DC converter 10A according to the embodiment in that the resonant coil L2 and the resonant capacitor C10 are omitted, and that the secondary circuit 15 is provided with the fifth switching element Q5, the seventh switching element Q7, the fifth capacitor C5, and the seventh capacitor C7 omitted. In the embodiment, the upper arm (Q5, D5, C5) of the third leg and the upper arm (Q7, D7, C7) of the fourth leg are used only as part of the "rectifier circuit". Therefore, when bidirectional operation is not required and the rectification on the secondary side is diode bridge rectification, the configuration of this modified example can be adopted and the switching elements Q5, Q7, and capacitors C5, C7 can be omitted without impeding operation.

[0083] 12 shows a current resonant DC / DC converter 10D according to a third modified example of the present invention. The DC / DC converter 10D according to this modified example differs from the DC / DC converter 10A according to the embodiment in that the resonant coil L2 and the resonant capacitor C10 are omitted, and that a secondary circuit 16 is provided instead of the secondary circuit 15. The secondary circuit 16 includes fifth to eighth diodes D5 to D8, a ninth switching element Q9 and a tenth switching element Q10 as a "boost circuit" connected in series between a connection point (one end of the secondary winding of the transformer TR) of the fifth diode D5 and the sixth diode D6 and a connection point (the other end of the secondary winding of the transformer TR) of the seventh diode D7 and the eighth diode D8, a ninth diode D9 connected in parallel to the ninth switching element Q9, and a tenth diode D10 connected in parallel to the tenth switching element Q10. The control unit 13 turns on / off the ninth switching element Q9 like the sixth switching element Q6, and turns on / off the tenth switching element Q10 like the eighth switching element Q8, thereby causing the secondary side circuit 16 to perform boost operation. The configuration of this modification can be used when bidirectional operation is not required. In this modification, the fifth to tenth diodes D5 to D10 form a "rectifier circuit."

[0084] In the embodiment and the first to third modified examples, the resonant capacitor C9 and the resonant coil L1 are arranged together at one end of the primary winding of the transformer TR, but the resonant capacitor C9 and the resonant coil L1 may be arranged separately at one end and the other end of the primary winding, or may be arranged together at the other end of the primary winding. Also, in the embodiment, the resonant capacitor C10 and the resonant coil L2 are arranged together at one end of the secondary winding of the transformer TR, but the resonant capacitor C10 and the resonant coil L2 may be arranged separately at one end and the other end of the secondary winding, or may be arranged together at the other end of the secondary winding.

[0085] In the embodiment and the first modification, the control unit 13 may perform synchronous rectification by turning on / off the fifth to eighth switching elements Q5 to Q8 when not performing the boost operation. In this case, the fifth to eighth switching elements Q5 to Q8 and the fifth to eighth diode elements D5 to D8 constitute the "rectifier circuit" of the present invention.

[0086] In the start-up process, the control unit 13 of the embodiment (and the first to third modified examples) increases the boost rate from zero to the optimal boost rate corresponding to the input voltage V1, and then starts to decrease the drive frequency toward the lower limit drive frequency corresponding to the input voltage V1, but the order is not limited to this. For example, the control unit 13 may start to decrease the drive frequency after starting to increase the boost rate (before the boost rate reaches the optimal boost rate). Also, the control unit 13 may start to increase the boost rate and start to decrease the drive frequency, and then make the boost rate reach the optimal boost rate before the drive frequency reaches the lower limit drive frequency.

[0087] In the embodiment (and the first to third modified examples), the control unit 13 increases the drive frequency to the upper limit drive frequency fm and then starts decreasing the boost rate toward 0% in the termination process, but the order is not limited to this. For example, the control unit 13 may start increasing the drive frequency and decreasing the boost rate at the same time, or may decrease the boost rate first. [Explanation of symbols]

[0088] 10A, 10B, 10C, 10D Current resonant DC / DC converter 11 Primary side circuit 12 Secondary circuit (embodiment, first modified example) 13 Control section 14 Storage section 15 Secondary circuit (second modification) 16 Secondary circuit (third variant) 100 Car Battery 110 V2H equipment 120 Bidirectional DC / AC inverter 130 Load

Claims

1. A current resonant DC / DC converter comprising: a primary circuit formed of a bridge circuit including a plurality of switching elements; a secondary circuit formed of a boost circuit and a rectifier circuit each including a plurality of switching elements; a current resonant circuit including a resonant coil and a resonant capacitor; a transformer provided between the primary circuit and the secondary circuit; and a control unit that controls on / off of the switching elements constituting the primary circuit and the switching elements constituting the secondary circuit, a storage unit that stores a lower limit value of a drive frequency of a switching element constituting the primary side circuit and a boost rate of the boost circuit, which are determined in advance so that a current flowing through the primary side circuit and the secondary side circuit does not exceed a predetermined allowable current value and a power output from the secondary side circuit is maximized, as a lower limit drive frequency and an optimal boost rate for each DC voltage input to the primary side circuit; The control unit controls on / off of switching elements constituting the primary side circuit and switching elements constituting the secondary side circuit so that, when boosting the DC voltage input to the primary side circuit by the boost operation of the boost circuit and outputting the boosted DC voltage from the secondary side circuit, the boost rate approaches the optimal boost rate corresponding to the DC voltage and the drive frequency does not fall below the lower limit drive frequency corresponding to the DC voltage. A current resonant DC / DC converter comprising:

2. When starting to boost the DC voltage input to the primary side circuit by the boost operation, the control unit increases the boost rate from zero to the optimal boost rate corresponding to the DC voltage while maintaining the drive frequency at a predetermined upper limit drive frequency, and then reduces the drive frequency toward the lower limit drive frequency corresponding to the DC voltage.

2. The current resonance type DC / DC converter according to claim 1.

3. When terminating the boost operation of the DC voltage input to the primary side circuit, the control unit increases the drive frequency to the upper limit drive frequency while maintaining the boost rate at the optimal boost rate, and then reduces the boost rate to zero.

3. The current resonance type DC / DC converter according to claim 2.

4. The control unit changes the drive frequency in a state where the boost rate approaches an optimal boost rate corresponding to the DC voltage input to the primary side circuit, and controls on / off of a switching element constituting the primary side circuit and a switching element constituting the secondary side circuit so that the power output from the secondary side circuit becomes a desired output power.

4. The current resonance type DC / DC converter according to claim 1, wherein the first and second resonant circuits are connected to each other.

Citation Information

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