Method and apparatus for managing overclocking in a data center - Patents.com

Abstract

A method and apparatus for managing overclocking in a data center includes determining a frequency limit for a first processor of a first server in the data center. The voltage of the first processor is reduced and the frequency is reduced to a stable point. The first server is tested for stability. Based on the results of the test, voltage and frequency changes are applied to a second processor of a second server in the data center.

Description

[Technical field]

[0001] (CROSS-REFERENCE TO RELATED APPLICATIONS) This application claims the benefit of U.S. Patent Application No. 16 / 726,167, filed December 23, 2019, the contents of which are incorporated herein by reference. [Background technology]

[0002] As the need for computing and information processing continues to grow, data center applications have become widespread. Data centers contain potentially large numbers of networked computers that can be used to process and store large amounts of data. In many cases, the processors in those computers may be racked and overclocked to increase performance. However, overclocking the processors creates increased heat, which potentially degrades operation.

[0003] A more detailed understanding may be had from the following description, given by way of example in conjunction with the accompanying drawings, in which: [Brief description of the drawings]

[0004] [Figure 1] 1 is a block diagram of an example device capable of implementing one or more features of the disclosure. [Diagram 2] 1 is a schematic diagram of an exemplary data center. [Diagram 3] 3 is a flow chart of an example method for managing overclocking in the example data center of FIG. 2. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0005] Although the method and apparatus are described in detail in further detail below, briefly, a method for determining an optimal operating point for an overclocked system in a data center environment is described. There are several considerations when overclocking a data center, including power delivery, performance per watt, stability, and cooling / thermal. The frequency limit of the processor based on the maximum stable temperature is determined. The voltage is then reduced to a stable point, and then the frequency is reduced to provide a guardband. Once this operating point is determined, a stability tool is run to stress the system above a normal server workload. After stability is confirmed, an automatic application is performed across the data center. Stability testing is then performed on the entire overclocked data center. The application may be the same across the data center, or customized for each server. Once the data center wide application passes the stability test, normal jobs can be performed.

[0006] A method for managing overclocking in a data center includes determining a frequency limit for a first processor of a first server in the data center. The voltage of the first processor is reduced and the frequency is reduced to a stable point. The first server is tested for stability. Based on the results of the test, voltage and frequency changes are applied to a second processor of a second server in the data center.

[0007] An apparatus for managing overclocking in a data center includes a first server including a first processor and a second server including a second processor, where the first processor of the first server determines a frequency limit for the first processor of the first server in the data center, reduces a voltage of the first processor to a stable point, reduces a frequency of the first processor, tests the first server for stability, and applies voltage and frequency changes to a second processor of a second server in the data center based on results of the testing.

[0008] A non-transitory computer readable storage medium for managing overclocking in a data center has instructions that, when executed by a processor, cause the processor to perform operations including determining a frequency limit of a first processor of a first server in the data center, reducing a voltage of the first processor to a stable point, reducing the frequency of the first processor, testing the first server for stability, and applying voltage and frequency changes to a second processor of a second server in the data center based on results of the testing.

[0009] 1 is a block diagram of an example device 100 capable of implementing one or more features of the disclosure. The device 100 may include, for example, a computer, a gaming device, a handheld device, a set-top box, a television, a mobile phone, or a tablet computer. The device 100 includes a processor 102, a memory 104, a storage device 106, one or more input devices 108, and one or more output devices 110. The device 100 may also optionally include an input driver 112 and an output driver 114. Additionally, the device 100 includes a memory controller 115 in communication with the processor 102 and the memory 104, and may also communicate with an external memory 116. It should be understood that the device 100 may include additional components not shown in FIG. 1.

[0010] In various alternatives, the processor 102 may include a central processing unit (CPU), a graphics processing unit (GPU), a CPU and a GPU located on the same die, or one or more processor cores, each of which may be a CPU or a GPU. In various alternatives, the memory 104 may be located on the same die as the processor 102 or may be separate from the processor 102. The memory 104 may include volatile or non-volatile memory (e.g., random access memory (RAM), dynamic RAM, cache).

[0011] The storage devices 106 include fixed or removable storage devices (e.g., hard disk drives, solid state drives, optical disks, flash drives). The input devices 108 include, but are not limited to, a keyboard, a keypad, a touch screen, a touch pad, a detector, a microphone, an accelerometer, a gyroscope, a biometric scanner, or a network connection (e.g., a wireless local area network card for transmitting and / or receiving wireless IEEE 802 signals). The output devices 110 include, but are not limited to, a display, a speaker, a printer, a haptic feedback device, one or more lights, an antenna, or a network connection (e.g., a wireless local area network card for transmitting and / or receiving wireless IEEE 802 signals).

[0012] The input driver 112 communicates with the processor 102 and the input device 108, allowing the processor 102 to receive input from the input device 108. The output driver 114 communicates with the processor 102 and the output device 110, allowing the processor 102 to send output to the output device 110. It should be noted that the input driver 112 and the output driver 114 are optional components and that the device 100 operates similarly without the input driver 112 and the output driver 114 being present.

[0013] The external memory 116 may be similar to the memory 104 or may reside in the form of off-chip memory. Additionally, the external memory may be memory resident on a server with which the memory controller 115 communicates through a network interface to access the memory 116.

[0014] FIG. 2 is a schematic diagram of an exemplary data center 200. The data center 200 includes multiple racks 210 (2101, 2102, ..., 210 nEach of the racks 210 includes a plurality of computer servers (e.g., devices 100). The computer servers collectively perform processing for the data center 200.

[0015] FIG. 3 is a flow chart of an example method 300 for managing overclocking in the example data center of FIG.

[0016] In step 310, the frequency limit of the processor is determined. This determination is performed based on the maximum stable temperature at which the processor can operate. Once the frequency limit is determined, the voltage of the processor is reduced to a stable point (step 320) and the frequency is reduced to provide a guard band (step 330). Thus, reducing the voltage guards against overcurrent or overheating in the processor. Additionally, once the stable point is determined, the voltage can be further reduced (e.g., by 2%) to further protect against overcurrent if all of the systems 100 in the rack 210 are overclocked.

[0017] In step 340, the system is stressed with a stability tool above the normal workload to test system operation. If the system passes the test and is stable (step 350), frequency and voltage settings are applied throughout the data center 200 (step 360), otherwise the method returns to step 320. Stability testing can then be performed on the entire overclocked data center. The application may be the same throughout the data center or customized per server, i.e., some servers change frequency and voltage, while others do not. Once the data center-wide application passes the stability test, normal jobs can be run.

[0018] The modifications that can be implemented may be component and part specific, i.e., a particular part and component from a particular bin of generated parts and components may run cooler at the same voltage as the same part and component from a different bin. Thus, voltage and frequency modifications may be implemented to achieve stability for that particular part bin and not for parts or components from another bin.

[0019] Different approaches may be taken to optimize the data center 200 for different workload types. For example, for lightly threaded jobs, processor cores may be disabled, disabling multi-threading to result in a high operating frequency in the server. For heavily threaded jobs, a higher effective frequency may be maintained to increase throughput. This technique may be applied to reduce the total number of systems 100 required in the data center 200 and to reduce the runtime for long running jobs, both of which can have a positive impact on the total cost of ownership (TCO) of the data center 200.

[0020] Also, time stamp counters (TSC) must be managed so that the servers remain synchronized even when overclocked. Core power management features including turbo, boost and c states may be disabled as needed. Frequency may be remotely monitored to detect thermal throttling or other system anomalies to proactively remove servers from service. The system chassis design for each rack 210 significantly improves cooling performance. This includes space for additional and more powerful fans, increased heat sink thickness, and improved airflow. This allows for lower operating temperatures and higher operating frequencies.

[0021] The provided methods may be implemented in a general purpose computer, processor, or processor core. Suitable processors include, by way of example, general purpose processors, special purpose processors, conventional processors, digital signal processors (DSPs), multiple microprocessors, one or more microprocessors associated with a DSP core, controllers, microcontrollers, application specific integrated circuits (ASICs), field programmable gate array (FPGA) circuits, other types of integrated circuits (ICs), and / or state machines. Such processors may be manufactured by configuring a manufacturing process with the results of processing hardware description language (HDL) instructions or other intermediate data including netlists (such as instructions that may be stored on a computer readable medium). The results of such processing may be maskwork used in a semiconductor manufacturing process to manufacture a processor implementing features of the present disclosure. Additionally, although the methods and apparatus described above are described in the context of controlling and configuring PCIe links and ports, the methods and apparatus may be utilized in any interconnect protocol in which the link width is negotiated.

[0022] The methods or flow charts provided herein may be implemented in a computer program, software, or firmware embodied in a non-transitory computer-readable storage medium for execution by a general purpose computer or processor. Examples of non-transitory computer-readable storage media include read-only memory (ROM), random access memory (RAM), registers, cache memory, semiconductor memory devices, magnetic media such as internal hard disks and removable disks, magneto-optical media, and optical media such as CD-ROM disks and digital versatile disks (DVDs). For example, the methods described above may be implemented in processor 102 or other processors within computer 100.

Claims

1. 1. A method implemented by a device in a data center for managing overclocking, comprising: determining a frequency limit of a first processor of a first server in the data center; changing the voltage of the first processor to a reduced voltage by reducing the voltage of the first processor to a stable point at which the first processor operates without an overcurrent or overtemperature condition; changing a frequency of the first processor to a reduced frequency limit by reducing the frequency limit based on the reduced voltage; testing the stability of the first server; and applying a modification to a second processor of a second server in the data center with the reduced voltage and the reduced frequency limits based on the testing. method.

2. the voltage of the first processor is further reduced from the stable point to a guard band level that protects the first processor from an overcurrent or overtemperature condition.

2. The method of claim 1.

3. the voltage of the first processor is reduced to a level that prevents an overcurrent in the first processor; The method of claim 2.

4. the voltage of the first processor is reduced to a level that prevents over-frequency of the first processor; The method of claim 2.

5. and reducing a voltage of the first processor below the guard band level. The method of claim 2.

6. the voltage and frequency changes are applied to a plurality of servers in the data center.

2. The method of claim 1.

7. a first core of the first processor is disabled; 2. The method of claim 1.

8. and maintaining a higher effective frequency on the third processor compared to the first processor.

2. The method of claim 1.

9. An apparatus for managing overclocking in a data center, comprising: a communication interface communicatively coupled to a first server including a first processor and a second server including a second processor; a processor communicatively coupled to the communication interface; The processor, determining a frequency limit of the first processor of the first server in the data center; changing the voltage of the first processor to a reduced voltage by reducing the voltage of the first processor to a stable point at which the first processor operates without an overcurrent or overtemperature condition; changing a frequency of the first processor to a reduced frequency limit by reducing the frequency limit based on the reduced voltage; testing the stability of the first server to generate a result; applying a modification of the second processor of the second server in the data center with the reduced voltage and the reduced frequency limit based on the result; [0023] Device.

10. the voltage of the first processor is further reduced from the stable point to a guard band level that protects the first processor from an overcurrent or overtemperature condition.

10. The apparatus of claim 9.

11. the voltage of the first processor is reduced to a level that prevents an overcurrent in the first processor; 11. The apparatus of claim 10.

12. the voltage of the first processor is reduced to a level that prevents over-frequency of the first processor; 11. The apparatus of claim 10.

13. the voltage of the first processor is reduced below the guard band level; 11. The apparatus of claim 10.

14. the voltage and frequency changes are applied to a plurality of servers in the data center.

10. The apparatus of claim 9.

15. a first core of the first processor is disabled; 10. The apparatus of claim 9.

16. a higher effective frequency is maintained in the third processor compared to the first processor; 10. The apparatus of claim 9.

17. A computer-readable storage medium storing instructions that, when executed by a processor of a device in a data center, determining a frequency limit of a first processor of a first server in the data center; changing the voltage of the first processor to a reduced voltage by reducing the voltage of the first processor to a stable point at which the first processor operates without an overcurrent or overtemperature condition; changing a frequency of the first processor to a reduced frequency limit by reducing the frequency limit based on the reduced voltage; testing the stability of the first server; applying a modification to a second processor of a second server in the data center with the reduced voltage and the reduced frequency limits based on the testing; and causing the processor to perform operations for managing overclocking, including: A computer-readable storage medium.

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