Optoelectronic devices with light-emitting diodes

Abstract

The present invention relates to an optoelectronic device (10) comprising a support (12), at least a first conductive layer (18) covering the support, and display pixels (Pix) bonded to the first conductive layer and having a first surface (20) and a second surface (22) on opposite sides. The display pixels include an electronic circuit (30) having a first surface bonded to the first conductive layer and a third surface (32) opposite the first surface, and an optoelectronic circuit (40) bonded to the third surface and having at least two light emitting diodes (LEDs), at least one of the electrodes of each LED connected to the electronic circuit at the third surface. The optoelectronic circuit further comprises a photoluminescent block (44) covering the light emitting diodes and a conductive or semiconductive wall (46) surrounding the photoluminescent block, and the optoelectronic device further comprises at least one second conductive layer (26) electrically coupled to at least one of the display pixels.

Description

[Technical field]

[0001] The present disclosure relates to optoelectronic devices, in particular display screens or image projection devices, comprising light emitting diodes based on semiconductor materials, and methods for their manufacture. [Background technology]

[0002] A pixel of an image corresponds to a unit element of an image displayed by an optoelectronic device. When the optoelectronic device is a display screen of a color image, the optoelectronic device generally comprises at least three elements, also called display subpixels, for displaying each pixel of the image, which elements each emit light radiation in a substantially single color (e.g. red, green and blue). The superposition of the radiation emitted by the three display subpixels gives the observer a sense of coloring corresponding to the pixel of the displayed image. In this case, the ensemble formed by the three display subpixels used to display a pixel of the image is called a display pixel of the optoelectronic device.

[0003] Each display subpixel may have a light source, in particular a light emitting diode, for example made of a semiconductor material. A known method for producing optoelectronic devices, in particular display screens or image projection devices, comprising light emitting diodes, referred to as the "pick and place" method, involves producing the light emitting diodes in the form of separate elements and placing each of the light emitting diodes at the desired position on a support which may comprise conductive tracks for electrically connecting the light emitting diodes. Summary of the Invention [Problem to be solved by the invention]

[0004] A disadvantage of such methods is that they generally require precise placement of the light emitting diode on the support, which requires the implementation of more complex alignment techniques due to the small size of the light emitting diode.

[0005] Another disadvantage of such methods is that the higher the resolution of the optoelectronic device, the more times the light emitting diodes need to be transferred onto the support, which in turn increases the manufacturing time of the optoelectronic device, which may be incompatible with industrial-scale manufacturing.

[0006] To form a large light emitting diode display composed of assembled unit light emitting diodes, the light emitting diodes should be assembled with a control circuit that controls many light emitting diodes. Therefore, the cluster with the control circuit and the light emitting diodes is connected together by wires. Such a cluster reduces the amount of data that can be transmitted and it may be difficult to display a video stream.

[0007] Displays with light emitting diodes in the micrometer range, e.g., television, tablet, and smartphone type configurations being developed by several manufacturers, require active arrays to display video streams at high resolution. Currently, active arrays for displays are formed with thin film transistors, or TFTs. TFTs typically use deposition of amorphous silicon or polysilicon over large glass surface areas, which requires the use of complex microelectronic methods over large surface areas.

[0008] In order to form TFT-free active arrays, it would be desirable to be able to form so-called smart pixels in which the control electronics, in particular the light-emitting diodes with dimensions in the micrometer range, are integrated. Since such active arrays are based on electronic circuits arranged under the pixels, the active arrays may be formed over very large surface areas. On the other hand, silicon-based technologies may be used for such electronic circuits.

[0009] It is therefore an object of the embodiments to at least partially overcome the disadvantages of the above-mentioned optoelectronic devices comprising light-emitting diodes.

[0010] Another object of embodiments is to reduce the number of times components are transferred to a support for an optoelectronic device during manufacture of the device.

[0011] Another object of embodiments is to reduce precision constraints in placing components on supports for optoelectronic devices.

[0012] Another object of embodiments is that optoelectronic devices may be manufactured on an industrial scale and at low cost.

[0013] It is another object of an embodiment that the optoelectronic device comprises a TFT-less active array. [Means for solving the problem]

[0014] Accordingly, an embodiment is an optoelectronic device comprising: A support; at least one first conductive layer overlying the substrate; a display pixel circuit bonded to the first conductive layer and having a first surface and a second surface on opposite sides, the display pixel circuit comprising: an electronic circuit having the first surface bonded to the first conductive layer and a third surface opposite the first surface; and an optoelectronic circuit bonded to the third surface, the optoelectronic circuit having at least two light emitting diodes; Equipped with At least one of the electrodes of each light emitting diode is connected to the electronic circuit at the third surface, and the optoelectronic circuit further comprises a photoluminescent block covering the light emitting diode and a conductive or semiconductive wall surrounding the photoluminescent block; The optoelectronic device further comprises at least one second conductive layer electrically coupled to at least one of the display pixel circuits.

[0015] According to an embodiment, the second conductive layer at least partially covers at least one of the display pixel circuits.

[0016] According to an embodiment, the second conductive layer is electrically coupled to at least one wall of the display pixel circuit.

[0017] According to an embodiment, in at least one of the display pixel circuits, the second conductive layer is in contact with a conductive pad of the electronic circuit arranged on a side of the third surface.

[0018] According to an embodiment, the second conductive layer extends onto the support and, in at least one of the display pixel circuits, the second conductive layer contacts a conductive pad of the electronic circuit arranged on the side of the first surface.

[0019] According to an embodiment, the optoelectronic device further comprises a first electrically insulating layer covering the first conductive layer between the display pixel circuits and disposed between the first conductive layer and the second conductive layer.

[0020] According to an embodiment, the optoelectronic device further comprises, for each display pixel circuit, a second electrically insulating layer covering a side surface of the display pixel circuit.

[0021] According to an embodiment, the optoelectronic circuit of the display pixel circuit has, for each display pixel circuit, a first semiconductor layer supporting the wall and the photoluminescent block, and for each light emitting diode, a separate stack having a second semiconductor layer doped with a first conductivity type disposed on the first semiconductor layer opposite the photoluminescent block, an active layer, and a third semiconductor layer doped with a second conductivity type opposite the first conductivity type.

[0022] According to an embodiment, each display pixel circuit comprises, for each said stack, a conductive pad in contact with the first semiconductor layer and bonded to the electronic circuitry of said display pixel circuit.

[0023] According to an embodiment, the optoelectronic device comprises at least two separate first conductive layers covering the support, with some of the display pixel circuits being bonded to the first conductive layers respectively, and the optoelectronic device comprises at least two second conductive layers each electrically connected to the electronic circuitry of some of the display pixel circuits.

[0024] According to an embodiment, the at least two individual first conductive layers and the at least two second conductive layers have the shape of parallel strips.

[0025] An embodiment is a method of manufacturing an optoelectronic device, comprising the steps of: a) manufacturing display pixel circuits having opposed first and second surfaces, each of said display pixel circuits comprising an electronic circuit having said first surface and a third surface opposite said first surface, and an optoelectronic circuit bonded to said third surface and comprising at least two light emitting diodes, at least one of the electrodes of each light emitting diode being connected to said electronic circuit at said third surface, said optoelectronic circuit further comprising a photoluminescent block covering said light emitting diodes and a conductive or semiconductive wall surrounding said photoluminescent block; b) producing a support covered with at least one first conductive layer; c) bonding a first surface of said display pixel circuit electronics to said first conductive layer; and d) forming at least one second conductive layer electrically coupled to at least one of said display pixel circuits. The present invention further provides a method comprising the steps of:

[0026] According to an embodiment, the second conductive layer at least partially covers at least one of the display pixel circuits.

[0027] According to an embodiment, the second conductive layer is electrically coupled to at least one wall of the display pixel circuit.

[0028] According to an embodiment, in at least one of the display pixel circuits, the second conductive layer is in contact with a conductive pad of the electronic circuit arranged on a side of the third surface.

[0029] According to an embodiment, the second conductive layer extends onto the support and, in at least one of the display pixel circuits, the second conductive layer is brought into contact with a conductive pad of the electronic circuit arranged on the side of the first surface.

[0030] According to an embodiment, the method further comprises, between steps c) and d), forming a first electrically insulating layer covering the first conductive layer between the display pixel circuits and disposed between the first conductive layer and the second conductive layer.

[0031] According to an embodiment, the method further comprises, before step c), forming a second electrical insulating layer covering a side surface of the display pixel circuit for each of the display pixel circuits.

[0032] According to an embodiment, in step a), for each light emitting diode, a separate stack is formed having a second semiconductor layer doped with a first conductivity type disposed on a first semiconductor layer, an active layer and a third semiconductor layer doped with a second conductivity type opposite to the first conductivity type. [Brief description of the drawings]

[0033] The above and other features and advantages are explained in detail below with reference to the accompanying drawings, in which: FIG.

[0034] [Figure 1] 1 illustrates a partially simplified cross-sectional side view of an embodiment of an optoelectronic device. [Diagram 2] FIG. 1 illustrates a partially simplified plan view of an embodiment of an optoelectronic device. [Diagram 3] 2 is a cross-sectional view illustrating another embodiment of an optoelectronic device. [Figure 4A]FIG. 4 is an equivalent electrical circuit diagram of a display pixel of the optoelectronic device shown in FIGS. 1 and 3. [Figure 4B] 4B is an electrical circuit diagram similar to FIG. 4A including an embodiment of a control circuit for an optoelectronic device. [Figure 4C] 4B is an electrical circuit diagram similar to FIG. 4A including an embodiment of a control circuit for an optoelectronic device. [Diagram 5] 4 is a partial schematic plan view of the optoelectronic device shown in FIGS. 1 and 3 illustrating advantages of the method of manufacturing an optoelectronic device. [Figure 6] FIG. 4 illustrates the control of the optoelectronic device shown in FIG. 1 or FIG. 3. [Figure 7] 1 is a partial schematic plan view illustrating another embodiment of an optoelectronic device. [Figure 8] 1 is a partial schematic plan view illustrating another embodiment of an optoelectronic device. [Figure 9] 1 is a partial schematic plan view illustrating another embodiment of an optoelectronic device. [Figure 10] 1 is a partial schematic plan view illustrating another embodiment of an optoelectronic device. [Figure 11] 1 is a partial schematic plan view illustrating another embodiment of an optoelectronic device. [Figure 12A] 2A-2C are schematic partial cross-sectional side views illustrating structures obtained in successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 1. [Figure 12B] 2A-2C are schematic partial cross-sectional side views illustrating structures obtained in successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 1. [Figure 12C] 2A-2C are schematic partial cross-sectional side views illustrating structures obtained in successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 1. [Figure 12D] 2A-2C are schematic partial cross-sectional side views illustrating structures obtained in successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 1. [Figure 12E]2A-2C are schematic partial cross-sectional side views illustrating structures obtained in successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 1. [Figure 12F] 2A-2C are schematic partial cross-sectional side views illustrating structures obtained in successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 1. [Figure 12G] 2A-2C are schematic partial cross-sectional side views illustrating structures obtained in successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 1. [Figure 12H] 2A-2C are schematic partial cross-sectional side views illustrating structures obtained in successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 1. [Figure 12I] 2A-2C are schematic partial cross-sectional side views illustrating structures obtained in successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 1. [Figure 12J] 2A-2C are schematic partial cross-sectional side views illustrating structures obtained in successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 1. [Figure 12K] 2A-2C are schematic partial cross-sectional side views illustrating structures obtained in successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 1. [Figure 12L] 2A-2C are schematic partial cross-sectional side views illustrating structures obtained in successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 1. [Figure 13A] 4A-4D are schematic partial cross-sectional side views illustrating structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. [Figure 13B] 4A-4D are schematic partial cross-sectional side views illustrating structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. [Figure 13C] 4A-4D are schematic partial cross-sectional side views illustrating structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. [Figure 13D]4A-4D are schematic partial cross-sectional side views illustrating structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. [Figure 13E] 4A-4D are schematic partial cross-sectional side views illustrating structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. [Figure 14] 5A-5C are cross-sectional views illustrating structures obtained at steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 1 or FIG. 3. [Figure 15] 2 is a cross-sectional view illustrating another embodiment of an optoelectronic device. [Figure 16A] 16A-16C are schematic partial cross-sectional views showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 15. [Figure 16B] 16A-16C are schematic partial cross-sectional views showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 15. [Figure 16C] 16A-16C are schematic partial cross-sectional views showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 15. [Figure 16D] 16A-16C are schematic partial cross-sectional views showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 15. [Figure 16E] 16A-16C are schematic partial cross-sectional views showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 15. [Figure 16F] 16A-16C are schematic partial cross-sectional views showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 15. [Figure 16G] 16A-16C are schematic partial cross-sectional views showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 15. [Figure 16H] 16A-16C are schematic partial cross-sectional views showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 15. [Figure 16I]16A-16C are schematic partial cross-sectional views showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 15. [Figure 16J] 16A-16C are schematic partial cross-sectional views showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 15. [Figure 16K] 16A-16C are schematic partial cross-sectional views showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIG. 15. [Figure 17] 2 is a partially simplified cross-sectional view of another embodiment of an optoelectronic device. [Figure 18A] 2 is a partially simplified plan view of another embodiment of an optoelectronic device. FIG. [Figure 18B] FIG. 18B is a diagram showing a modification of FIG. 18A. [Figure 19A] 17, 18A and 18B. FIG. 18C is a schematic partial cross-sectional side view showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIGS. [Figure 19B] 17, 18A and 18B. FIG. 18C is a schematic partial cross-sectional side view showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIGS. [Figure 19C] 17, 18A and 18B. FIG. 18C is a schematic partial cross-sectional side view showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIGS. [Figure 19D] 17, 18A and 18B. FIG. 18C is a schematic partial cross-sectional side view showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIGS. [Figure 19E] 17, 18A and 18B. FIG. 18C is a schematic partial cross-sectional side view showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIGS. [Figure 19F] 17, 18A and 18B. FIG. 18C is a schematic partial cross-sectional side view showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIGS. [Figure 19G] 17, 18A and 18B. FIG. 18C is a schematic partial cross-sectional side view showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIGS. [Figure 19H] 17, 18A and 18B. FIG. 18C is a schematic partial cross-sectional side view showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIGS. [Figure 19I] 17, 18A and 18B. FIG. 18C is a schematic partial cross-sectional side view showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIGS. [Figure 19J] 17, 18A and 18B. FIG. 18C is a schematic partial cross-sectional side view showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device shown in FIGS. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0035] For clarity, identical elements are designated by the same reference numerals in the various drawings, and further, as is common in the representation of electronic circuits, the various drawings are not drawn to scale. Further, only elements useful for understanding the present specification are shown and described. In particular, the structure of light emitting diodes is well known to those skilled in the art and will not be described in detail.

[0036] In the following description, references to terms specifying relative positions, such as "top," "upper," or "lower," refer to the optoelectronic device in its orientation in the drawing or in its normal position of use. The terms "substantially," "approximately," and "approximately" are used herein to indicate a tolerance of plus or minus 10% of the applicable value, preferably plus or minus 5%, unless otherwise indicated. Furthermore, the "active area" of a light emitting diode refers to the area of ​​the light emitting diode that emits the majority of the electromagnetic radiation by the light emitting diode.

[0037] 1 and 2 show an embodiment of an optoelectronic device 10 with display pixels, corresponding for example to a display screen or an image projection device. Fig. 1 is a cross-sectional view taken along line II in Fig. 2, and Fig. 2 is a cross-sectional view taken along line II-II in Fig. 1.

[0038] The optoelectronic device 10 is shown, from bottom to top in FIG. a support 12 having opposite, preferably parallel, lower and upper surfaces 14 and 16; a first electrode layer 18 having a conductive layer overlying a top surface 16; display pixels Pix (two display pixels Pix are shown in FIG. 1 and three display pixels Pix are shown in FIG. 2 ), disposed on and in contact with the first electrode layer 18, hereinafter also referred to as display pixel circuits, each having a lower surface 20 and an upper surface 22 opposite the lower surface 20, each display pixel circuit having a light emitting diode LED emitting light from the upper surface 22; an electrode layer 18 between the display pixels Pix and an electrical insulating layer 24 covering the side surfaces of the display pixels Pix; a second electrode layer 26 having a conductive layer at least partially transparent to radiation emitted by the light emitting diodes LED, the conductive layer 26 covering each of the display pixels Pix and the insulating layer 24 between the display pixels Pix and in contact with the upper surface 22 of each of the display pixels Pix; It is equipped with:

[0039] Each display pixel Pix is ​​as follows, from bottom to top in FIG. an electronic circuit 30, hereinafter referred to as the control circuit; Photoelectronic circuit 40 and It has.

[0040] The control circuit 30 has a bottom surface 20 and a top surface 32 opposite the bottom surface 20, which are preferably parallel. The bottom surface 20 is bonded to the electrode layer 18 and is defined by, for example, a conductive pad 34 that is electrically coupled to the electrode layer 18. The control circuit 30 further has a conductive pad 36 on the top surface 32.

[0041] The optoelectronic circuit 40 is bonded to the top surface 32 of the control circuit 30. The optoelectronic circuit 40 comprises a stack of semiconductor layers 41 forming a light emitting diode LED, preferably at least three light emitting diodes. The optoelectronic circuit 40 is electrically connected to the electronic circuit 30 by a conductive pad 42 in contact with the conductive pad 36. The optoelectronic circuit 40 comprises a photoluminescent block 44 covering the light emitting diode LED on the side opposite the control circuit 30 and separated laterally by a conductive wall 46. The photoluminescent block 44 preferably faces each of the light emitting diodes LED. The wall 46 contacts the stack 41 and the second electrode layer 26. In FIG. 2, the light emitting diode LED and the photoluminescent block 44 of each display pixel Pix are shown aligned in a row. However, it should be clear that the arrangement of the light emitting diode LED and the photoluminescent block 44 may be different. By way of example, the shape of each display pixel Pix may be substantially square in plan view, and the light emitting diode LED and the photoluminescent block 44 may be arranged at three of the corners of the square.

[0042] A sealing layer (not shown) may cover the second electrode layer 26 .

[0043] The bottom surface 20 of the electronic circuitry 30 may be bonded to the electrode layer 18, preferably by a conductive bonding material.

[0044] Each light emitting diode LED may correspond to a so-called two-dimensional light emitting diode, which has a substantially planar stack of semiconductor layers with a layer as active layer from which the majority of the radiation by the light emitting diode LED is emitted. According to an embodiment, all light emitting diodes LED of the optoelectronic circuit 40 preferably emit optical radiation at substantially the same wavelength.

[0045] According to an embodiment, the stack 41 comprises for each light-emitting diode LED a semiconductor layer 48 doped with a first conductivity type, for example P-type, in contact with a conductive pad 42, an active layer 50 in contact with the semiconductor layer 48, and a semiconductor layer 52 doped with a second conductivity type opposite to the first conductivity type, for example N-type, in contact with the active layer 50. The optoelectronic circuit 40 further comprises a semiconductor layer 54 in contact with the semiconductor layer 52 of the light-emitting diode, on which the wall 46 rests. The semiconductor layer 54 is formed, for example, of the same material as the semiconductor layer 52. According to an embodiment, each optoelectronic circuit 40 comprises for each light-emitting diode a conductive pad 42 connecting the semiconductor layer 48 to the electronic circuit 30 and at least one semiconductor pad 42 connecting the semiconductor layer 54 directly to the electronic circuit 30.

[0046] For each light emitting diode LED, the active layer 50 may comprise a confinement means. By way of example, the active layer 50 may comprise a single quantum well, so that it comprises a semiconductor material that is different from the semiconductor material forming the semiconductor layers 48, 52 and has a smaller band gap than the band gap of the material forming the semiconductor layers 48, 52. The active layer 50 may comprise multiple quantum wells, so that it comprises a stack of semiconductor layers with alternating quantum wells and barrier layers.

[0047] For each display pixel Pix, the optoelectronic circuit 40 may be connected to the control circuit 30 by a connection of the "flip chip" type. Fusible conductive elements (not shown), for example solder balls or indium balls, connecting the optoelectronic circuit 40 to the control circuit 30, ensure the mechanical connection between the optoelectronic circuit 40 and the control circuit 30 and also ensure the electrical connection between each light emitting diode LED of the optoelectronic circuit 40 and the control circuit 30. According to another embodiment, the optoelectronic circuit 40 may be connected to the control circuit 30 by a direct bond. The direct bond may be a heterogeneous direct bond. This means that the metallic elements of the optoelectronic circuit 40 are in contact with the metallic elements of the control circuit 30 and the dielectric elements of the optoelectronic circuit 40 are in contact with the dielectric elements of the control circuit 30.

[0048] According to an embodiment, each photoluminescent block 44 is arranged opposite one of the light emitting diodes LED 1 . Each photoluminescent block 44 comprises a phosphor, which, when excited by the light emitted by the associated light emitting diode LED 1 , is capable of emitting light at a wavelength different from the wavelength of the light emitted by the associated light emitting diode LED 1 . According to an embodiment, each display pixel Pix 1 comprises at least two types of photoluminescent blocks 44. A first type of photoluminescent block 44 is capable of converting radiation by the light emitting diode LED 1 into a first radiation of a first wavelength, and a second type of photoluminescent block 44 is capable of converting radiation by the light emitting diode LED 1 into a second radiation of a second wavelength. According to an embodiment, each display pixel Pix 1 comprises at least three types of photoluminescent blocks 44, and a third type of photoluminescent block 44 is capable of converting radiation by the light emitting diode LED 1 into a third radiation of a third wavelength. The first, second and third wavelengths may be different.

[0049] According to an embodiment, the first wavelength corresponds to blue light and lies in the range of 430 nm to 490 nm. According to an embodiment, the second wavelength corresponds to green light and lies in the range of 510 nm to 570 nm. According to an embodiment, the third wavelength corresponds to red light and lies in the range of 600 nm to 720 nm. The light emitting diode LED can emit radiation, for example, in the ultraviolet range.

[0050] According to an embodiment, each display pixel Pix comprises a fourth type of photoluminescent block 44 capable of converting the radiation by the light emitting diode LED into a fourth radiation of a fourth wavelength. The first, second, third and fourth wavelengths may be different. According to an embodiment, the fourth wavelength corresponds to yellow light and lies in the range of 570 nm to 600 nm. According to another embodiment, the fourth radiation corresponds to radiation in the near infrared range, in particular radiation with a wavelength between 700 nm and 980 nm, ultraviolet light or white light.

[0051] Each control circuit 30 may have electronic components, not shown, used to control the light emitting diodes, in particular transistors. Each control circuit 30 may have a semiconductor substrate, in which and / or on which the electronic components are formed. Thus, the lower surface 20 of the control circuit 30 may correspond to the back surface of the substrate opposite to the front surface of the substrate on which the electronic components are formed. The semiconductor substrate is, for example, a substrate made of silicon, in particular monocrystalline silicon.

[0052] Preferably, the optoelectronic circuit 40 comprises only a number of light emitting diodes and the connection elements of these light emitting diodes, and the control circuit 30 comprises all electronic components necessary to control the light emitting diodes of the optoelectronic circuit 40. Alternatively, the optoelectronic circuit 40 may further comprise other electronic components in addition to the light emitting diodes.

[0053] Optoelectronic Device 10 is 10~10 9 Each display pixel Pix may have a pixel size of 1 μm 2 ~100 mm 2 Each display pixel Pix may occupy a surface area in the range of 1 μm to 6 mm. Each electronic circuit 30 may have a thickness in the range of 0.5 μm to 3,000 μm. Each optoelectronic circuit 40 may have a thickness in the range of 0.2 μm to 3,000 μm.

[0054] The support 12 may be formed of an electrically insulating material, for example a polymer, particularly an epoxy resin, including in particular the FR4 material used in making printed circuits, or a metallic material, for example aluminium. The thickness of the support 12 may be in the range of 10 μm to 10 mm.

[0055] The conductive layer 18 preferably corresponds to a metal layer, for example of aluminum, silver, copper or zinc. The thickness of the conductive layer 18 may be in the range of 0.5 μm to 1,000 μm.

[0056] The insulating layer 24 is made of a dielectric material, such as silicon oxide (SiO2), silicon nitride (Six N y , where x is about 3 and y is about 4, e.g., Si3N4), silicon oxynitride (SiO x N y , where x may be about 1 / 2 and y may be about 1, and may be formed, for example, of Si2ON2, aluminum oxide (Al2O3) or hafnium oxide (HfO2). The maximum thickness of each insulating portion 24 may be in the range of 0.2 μm to 1,000 μm. The insulating layer 24 is preferably opaque to the radiation emitted by the optoelectronic circuit 40. The insulating layer 24 may correspond to a white resin, a black resin, or a transparent resin, in particular filled with particles of titanium oxide.

[0057] Each conductive pad 34, 36, 42 may be formed at least in part from a material selected from the group including copper, titanium, nickel, gold, tin, aluminum, and alloys of at least two of these compounds.

[0058] The conductive layer 26 is transparent to electromagnetic radiation emitted by the optoelectronic circuit 40. The material forming the conductive layer 26 may be a transparent conductive material such as indium tin oxide (ITO), zinc aluminum oxide, zinc gallium oxide or graphene. The minimum thickness of the conductive layer 26 on the display pixel Pix may be in the range of 0.05 μm to 1,000 μm.

[0059] The semiconductor layers 48, 52, 54 are at least partially formed from at least one semiconductor material. The semiconductor material is selected from the group including III-V compounds, such as III-N compounds, II-VI compounds, or IV semiconductors or compounds. Examples of group III elements include gallium (Ga), indium (In) or aluminum (Al). Examples of III-N compounds include GaN, AlN, InN, InGaN, AlGaN or AlInGaN. Other group V elements, such as phosphorus or arsenic, may also be used. Examples of group II elements include group IIA elements, particularly beryllium (Be) and magnesium (Mg), and group IIB elements, particularly zinc (Zn), cadmium (Cd) and mercury (Hg). Examples of group VI elements include group VIA elements, particularly oxygen (O) and tellurium (Te). Examples of II-VI compounds include ZnO, ZnMgO, CdZnO, CdZnMgO, CdHgTe, CdTe, or HgTe. Examples of IV semiconductor materials include silicon (Si), carbon (C), germanium (Ge), silicon carbide (SiC), silicon-germanium (SiGe), or germanium carbide (GeC).

[0060] According to an embodiment, each photoluminescent block 44 includes particles of at least one photoluminescent material. Examples of photoluminescent materials include YAG:Ce or YAG:Ce. 3+ and yttrium aluminum garnet (YAG), activated by trivalent cerium ions, also known as yttrium aluminium garnet. The average particle size of conventional photoluminescent materials is generally greater than 5 μm.

[0061] According to an embodiment, each photoluminescent block 44 comprises a matrix in which are dispersed nanometer-range monocrystalline particles of semiconductor material, hereinafter also referred to as semiconductor nanocrystals or phosphor particles. int The internal quantum efficiency, QY, of semiconductor nanocrystals is equal to the ratio of the number of emitted photons to the number of photons absorbed by the photoluminescent material. intis greater than 5%, preferably greater than 10%, and more preferably greater than 20%.

[0062] According to an embodiment, the average size of the semiconductor nanocrystals is in the range of 0.5 nm to 1,000 nm, preferably 0.5 nm to 500 nm, more preferably 1 nm to 100 nm, in particular 2 nm to 30 nm. At sizes smaller than 50 nm, the light conversion properties of the semiconductor nanocrystals are essentially determined by the quantum confinement phenomenon. Therefore, the semiconductor nanocrystals correspond to quantum dots.

[0063] According to an embodiment, the semiconductor material of the semiconductor crystal is selected from the group comprising cadmium selenide (CdSe), indium phosphide (InP), cadmium sulfide (CdS), zinc sulfide (ZnS), zinc selenide (ZnSe), cadmium telluride (CdTe), zinc telluride (ZnTe), cadmium oxide (CdO), cadmium zinc oxide (ZnCdO), cadmium zinc sulfide (CdZnS), cadmium zinc selenide (CdZnSe), silver indium sulfide (AgInS2), perovskites of the PbScX3 type (where X is a halogen atom, in particular iodine (I), bromine (Br) or chlorine (Cl)) and mixtures of at least two of these compounds. According to an embodiment, the semiconductor material of the semiconductor nanocrystals is selected from the materials described in the publication by Le Blevenec et al., Physica Status Solidi (RRL) - Rapid Research Letters Volume 8, No. 4, p. 349-352, April 2014.

[0064] According to an embodiment, the size of the semiconductor nanocrystals is selected according to the desired wavelength of radiation emitted by the semiconductor nanocrystals. By way of example, CdSe nanocrystals having an average size of about 3.6 nm can convert blue light to red light, and CdSe nanocrystals having an average size of about 1.3 nm can convert blue light to green light. According to another embodiment, the composition of the semiconductor nanocrystals is selected according to the desired wavelength of radiation emitted by the semiconductor nanocrystals.

[0065] The matrix is ​​formed from an at least partially transparent material. The matrix is ​​formed from, for example, silica. The matrix is ​​formed from, for example, any at least partially transparent polymer, in particular silicone or polylactic acid (PLA). The matrix may be formed from an at least partially transparent polymer used with three-dimensional printers, such as PLA. According to an embodiment, the matrix comprises 2-90% by weight, preferably 10-60% by weight, of nanocrystals, for example about 30% by weight of nanocrystals.

[0066] The thickness of the photoluminescent blocks 44 depends on the nanocrystal concentration and type of nanocrystals used. The height of the photoluminescent blocks 44 is preferably equal to or less than the height of the walls 46. Referring to Figure 2, the area of ​​each photoluminescent block 44 corresponds to the area of ​​a square with sides ranging from 1 μm to 100 μm, preferably from 3 μm to 15 μm.

[0067] The walls 46 are at least partially formed from at least one semiconducting or conductive material. The semiconducting or metallic conductive material may be silicon, germanium, silicon carbide, III-V compounds, II-VI compounds, steel, iron, copper, aluminum, tungsten, titanium, hafnium, zirconium or a combination of at least two of these compounds. The walls 46 are preferably formed from a semiconducting material that is compatible with the manufacturing methods practiced in microelectronics. The walls 46 may be highly doped, lightly doped or undoped. The walls 46 are preferably formed from monocrystalline silicon.

[0068] The height of the wall 46 measured in a direction perpendicular to the lower surface 14 is in the range of 300 nm to 200 μm, and preferably in the range of 5 μm to 30 μm. The thickness of the wall 46 measured in a direction parallel to the lower surface 14 is in the range of 100 nm to 50 μm, and preferably in the range of 0.5 μm to 10 μm.

[0069] According to an embodiment, the wall 46 may be formed from a material that is reflective with respect to the wavelength of radiation emitted by the photoluminescent block 44 and / or the light emitting diodes LEDs, or may be covered by a reflective coating.

[0070] Walls 46 preferably surround photoluminescent blocks 44 so that walls 46 reduce crosstalk between adjacent photoluminescent blocks 44.

[0071] The encapsulation layer may be formed of an at least partially transparent insulating material. The encapsulation layer may be formed of an at least partially transparent inorganic material. For example, the inorganic material may be SiO. x (where x is a real number between 1 and 2) or SiO y N z The encapsulation layer may be selected from the group consisting of silicon oxides of the type (where y and z are real numbers between 0 and 1) and aluminum oxides, e.g. Al2O3. The encapsulation layer may be formed of an at least partially transparent organic material. By way of example, the encapsulation layer is a silicone polymer, an epoxide polymer, an acrylic polymer or a polycarbonate.

[0072] According to an embodiment, a metal gate may be formed on and in contact with the transparent conductive layer 26, and the display pixel Pix may be located at the level of the opening of the metal gate, so that the electrical conductivity may be improved without interfering with the radiation emitted by the display pixel Pix.

[0073] According to an embodiment, a metal gate may be formed along and in contact with the transparent conductive layer 26 to favor electrical current conduction without blocking light.

[0074] According to an embodiment, in operation, a voltage V is applied between the electrode layers 26, 18 to the display pixel Pix, and in particular to the light emitting diode of the optoelectronic circuit 40 of the display pixel Pix. E is applied.

[0075] FIG. 3 is a view similar to FIG. 1 of an alternative embodiment of an optoelectronic device 55 with all the elements of the optoelectronic device 10, in which each display pixel Pix further comprises an electrically insulating layer 56 covering the side surfaces of the display pixel Pix. The insulating layer 56 may have a minimum thickness in the range of 2 nm to 1 mm. In addition to covering the top surface 22 of each display pixel Pix, the electrode layer 26 may also cover a portion of the insulating layer 56 of the display pixel Pix. The insulating layer 56 may be made of a material such as silicon oxide (SiO2), silicon nitride (Si x N y , where x is about 3 and y is about 4, e.g., Si3N4), silicon oxynitride (SiO x N y , where x may be about ½ and y may be about 1, and may be formed, for example, of Si2ON2, aluminum oxide (Al2O3), hafnium oxide (HfO2), or zirconium oxide (ZrO2).

[0076] 4A is an equivalent electrical circuit diagram of the display pixel Pix shown in Fig. 1 and Fig. 3. A first electrode, e.g., a cathode, of each light emitting diode LED is connected to a control circuit 30 of the display pixel Pix, while a second electrode, e.g., an anode, of each light emitting diode LED is connected to an electrode layer 26, which is itself connected to a low reference potential source GND, e.g., ground. The control circuit 30 is connected to the electrode layer 18, which is in turn connected to a high reference potential source VCC. The display pixel Pix is ​​connected between the electrode layer 18 and the electrode layer 26, and a voltage V E The control circuit 30 controls the light emitting diode LED of the optoelectronic circuit 40.

[0077] 4B is a view similar to FIG. 4A, in which the control circuit 30 is shown with an active area 53 disposed on the lower surface 20 side. The active area 53 is the area of ​​the control circuit 30 in which and on top of which the electronic components of the control circuit 30 are formed. The control circuit 30 further includes vias 57 extending through the control circuit 30 and laterally insulated from the remainder of the control circuit 30, the vias 57 electrically connecting conductive tracks formed on the lower surface 20 side of the control circuit 30 to conductive pads 36 disposed on the upper surface 32 side of the control circuit 30. In particular, one of the vias 57 may provide a potential from a low reference potential source GND to the active area 53.

[0078] 4C is a view similar to FIG. 4A, in which control circuit 30 is shown with active area 53 disposed on top surface 32. Control circuit 30 further includes at least one via 57 extending therethrough, electrically coupling conductive pad 34 disposed on bottom surface 20 of control circuit 30 to conductive pad 36 disposed on top surface 32 of control circuit 30. Via 57 allows a high reference potential source VCC to be applied to active area 53.

[0079] In this embodiment, the conductive layer 18 contacts all display pixels Pix 1 of the optoelectronic devices 10,55, and the conductive layer 26 contacts all display pixels Pix 1 of the optoelectronic devices 10,55.

[0080] In an embodiment of the method for manufacturing the optoelectronic device 10 or the optoelectronic device 55, the display pixels Pix are manufactured and each of them is individually positioned on the electrode layer 18. According to the embodiment, the electrode layer 18, 26 is common to all the display pixels Pix, simplifying the connection of the display pixels Pix and eliminating the need to place each display pixel Pix on the electrode layer 18 with high precision. This advantageously allows a less expensive and more rapid technique to be implemented for placing the display pixels Pix on the electrode layer 18. Furthermore, the number of transfers during the assembly of the optoelectronic device 10 or the optoelectronic device 55 is reduced, since the light emitting diode of each display pixel Pix is ​​integrated in the optoelectronic circuit 40 of the display pixel Pix. In this embodiment, each display pixel Pix may have a memory in which an identifier of the display pixel is stored. The manufacturing method may include an adjustment step for returning the position of each display pixel Pix to its normal position depending on the identifier of the display pixel Pix. Therefore, during operation, data may be transmitted to the pixel depending on the identifier of the pixel.

[0081] FIG. 5 is a schematic plan view of an optoelectronic device 10 or optoelectronic device 55, illustrating that the display pixels Pix may not be positioned very precisely, e.g. not perfectly aligned with the rows and columns, and that some display pixels Pix may be tilted relative to the row and column direction.

[0082] In the embodiments described above, the electrode layer 18 is connected to all of the display pixels Pix and is provided in the form of a continuous layer extending over most or all of the support 12 .

[0083] For each display pixel Pix, the control circuit 30 receives a control signal and, based on the received control signal, is able to control the light-emitting diode of the display pixel, in particular the brightness, saturation and luminance of the light emitted by the display pixel.

[0084] According to an embodiment, the voltage V E may be modulated to transmit a control signal to the control circuit 30 of the display pixel Pix.

[0085] FIG. 6 very diagrammatically shows a processing unit 58 receiving a control signal COM, which generates a voltage V modulated by the control signal COM for powering the display pixels Pix. E to the optoelectronic device 10, 55. The processing unit 58 may represent a dedicated circuit or may comprise a processor, such as a microprocessor or microcontroller, capable of executing instructions of a computer program stored in a memory.

[0086] The control circuit 30 of each display pixel Pix controls the voltage V E The control signal COM may be retrieved by demodulating the control signal COM so that the control circuit 30 can determine whether the control signal COM is addressed to the control circuit 30. By way of example, an identifier may be associated with each display pixel Pix and the voltage V E The control signal COM obtained by demodulation of may include an identifier of the display pixel to which the control signal is directed.

[0087] Advantageously, active addressing of the display pixels Pix may be performed. Indeed, each control circuit 30 may control the maintenance of the display properties of a display pixel, in particular its lightness, saturation and luminance, until it receives a new control signal.

[0088] Fig. 7 is a schematic plan view of another embodiment of an optoelectronic device 60 comprising all the elements of the optoelectronic device 10 or optoelectronic device 55, in which the electrode layer 18 is divided into parallel conductive strips 62 extending on the support 12, three conductive strips 62 being shown as an example in Fig. 7. At least one row of display pixels Pix are distributed on each conductive strip 62. Preferably, multiple rows of display pixels Pix are distributed on each conductive strip 62, three rows of display pixels Pix are shown as an example in Fig. 7 on the conductive strips 62.

[0089] According to another embodiment, the electrode layer 18 and / or the electrode layer 26 may be divided into separate electrode strips. According to another embodiment, the electrode layer 26 may also be divided into parallel conductive strips. If the electrode layers 18 and 26 are each divided into strips, the size of the strips of the electrode layer 18 is preferably substantially the same as the size of the strips of the electrode layer 26, and each strip of the electrode layer 26 substantially covers one of the strips of the electrode layer 18. According to another embodiment, one of the electrodes 18 or 26 may be common to the display pixels Pix, while the other of the electrodes 18 or 26 is divided into parallel conductive strips. In an embodiment in which the electrode layers 18, 26 are divided into stacked strips sandwiching a group of display pixels, a voltage V E By differently modulating the 1000 Hz to 1000 Hz, various control signals may be transmitted in parallel, thus making it possible to transmit control signals in parallel for each group of display pixels Pix, thereby making it possible to reduce the modulation frequency of the electromagnetic radiation and / or to increase the proportion of transmitted data.

[0090] Fig. 8 is a partial schematic plan view of another embodiment of an optoelectronic device 65, in which the electrode layer 18 is divided into conductive strips 62 extending along a row direction, referred to as row electrodes, and the electrode layer 26 is divided into conductive strips 66 extending along a column direction, referred to as column electrodes. At least one display pixel Pix is ​​arranged at the intersection of each row electrode 62 and each column electrode 66 in plan view and is connected to the row electrode 62 and the column electrode 66. By way of example, in Fig. 8 three display pixels Pix are arranged at the intersection of each row electrode 62 and each column electrode 66 in plan view. According to an embodiment, the display pixels Pix arranged at the intersection of each row electrode 62 and each column electrode 66 may form pixels of a displayed image. This allows redundancy in case one of the display pixels Pix is ​​defective. It should be noted that for each display pixel Pix, the entire bottom surface of the display pixel Pix does not necessarily contact one of the row electrodes 62 and / or the entire top surface of the display pixel Pix does not necessarily contact one of the column electrodes 66. This means that the display pixel Pix may straddle one of the row electrodes 62 and the adjacent area between the strips and / or the display pixel Pix may straddle one of the column electrodes 66 and the adjacent area between the strips.

[0091] According to another embodiment, the transparent strips 66, which may complicate deposition over long lengths / continuous surfaces, may be formed from discontinuous areas where the display pixels are connected, and such discontinuous areas may be connected to each other by metal tracks, which may advantageously facilitate the formation of the top electrode and enhance its electrical conductivity.

[0092] FIG. 9 is a partial schematic plan view showing an embodiment of an optoelectronic device 65 in which one display pixel Pix is ​​provided at the intersection of each row electrode 62 and each column electrode 66.

[0093] 9, in particular to avoid short circuits, the width of each conductive strip 66 is preferably larger than the size of a display pixel Pix measured along the column direction, and the width of each conductive strip 62 is larger than the size of a display pixel Pix measured along the row direction. Therefore, it is possible that the display pixels Pix belonging to each row do not align perfectly from one row to the next. Similarly, it is possible that the display pixels Pix belonging to each column do not align perfectly from one column to the next.

[0094] 10 shows a partial schematic plan view of a variant of an optoelectronic device 65 in which a metal gate 67 is formed on and in contact with the upper transparent conductive strips 66, and the display pixel Pix is ​​located at the level of an opening 68 in the metal gate 67, so that the electrical conductivity can be improved without interfering with the radiation emitted by the display pixel Pix.

[0095] FIG. 11 is a partial schematic plan view of another variation of an optoelectronic device 65 in which metal gates 69 are formed along and in contact with each of the transparent conductive strips 66 to favor the conduction of electrical current without blocking light rays.

[0096] 12A-12L are schematic partial cross-sectional views illustrating structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device 10 shown in FIG.

[0097] 12A shows the structure obtained after forming a stack of semiconductor layers 71 on a support 70, including a semiconductor layer 72, an active layer 74 and a semiconductor layer 76 from bottom to top in FIG. 12A. The composition of the semiconductor layer 72 may be the same as the composition of the semiconductor layers 52, 54 described above. The composition of the active layer 74 may be the same as the composition of the active layer 50 described above. The composition of the semiconductor layer 76 may be the same as the composition of the semiconductor layer 48 described above. A seed layer may be provided between the support 70 and the semiconductor layer 72. It is preferred that no seed layer is provided between the support 70 and the semiconductor layer 72.

[0098] FIG. 12B shows the resulting structure after defining the light emitting diodes LED of the optoelectronic circuit 40 and forming the conductive pads 42. The light emitting diodes LED may be defined by etching the semiconductor layer 72, the active layer 74 and the semiconductor layer 76 to define the semiconductor layer 52, the active layer 50 and the semiconductor layer 48 for each light emitting diode LED of the optoelectronic circuit 40. The etching performed may be a dry etch using, for example, a chlorine- or fluorine-based plasma, or a reactive ion etch (RIE). The unetched portions of the semiconductor layer 72 form the aforementioned semiconductor layer 54. A conductive layer may be deposited over the entire resulting structure to obtain the conductive pads 42 by removing the portions of the conductive layer outside the conductive pads 42. An optoelectronic circuit 78 is obtained having multiple copies of the optoelectronic circuit 40 that are not yet completed, two copies of which are shown in FIG. 12B.

[0099] 12C shows the resulting structure, particularly after fabricating an electronic circuit 80 having multiple less-than-complete copies of the desired control circuit 30 by conventional steps in integrated circuit manufacturing methods, immediately prior to bonding the electronic circuit 80 to an optoelectronic circuit 78. The method of assembling the electronic circuit 80 to the optoelectronic circuit 78 may include a soldering operation or a molecular bonding operation.

[0100] 12D shows the resulting structure after forming walls 46 in support 70. Walls 46 may be formed by etching openings 82 in support 70.

[0101] 12E shows the resulting structure after forming the photoluminescent block 44. For example, the photoluminescent block 44 may be formed by filling certain openings 82 with a colloidal dispersion of semiconductor nanocrystals in a bonding matrix, and optionally by filling certain openings 82 with a resin, by so-called additive processes. So-called additive processes may include direct printing of a colloidal dispersion at the desired locations, for example by inkjet printing, aerosol printing, microprinting, gravure printing, silkscreen printing, flexographic printing, spray coating or drop casting. According to another embodiment, the photoluminescent block 44 may be formed before the walls 46 are manufactured.

[0102] FIG. 12F shows the structure obtained after bonding the structure shown in FIG. 12E to a support 84, also called a handle, using a bonding material 85 on the photoluminescent block 44 side.

[0103] FIG. 12G shows the resulting structure after thinning the substrate of the electronic circuitry 80 on the side opposite the handle 84.

[0104] FIG. 12H shows the resulting structure after conductive pads 34 of control circuitry 30 are formed on electronic circuitry 80 opposite handle 84.

[0105] 12I shows the structure obtained after isolating the control circuitry 30 in the electronic circuitry 80 and the optoelectronic circuitry 40 in the optoelectronic circuitry 78. Thus, while still attached to the handle 84, the display pixels Pix are defined.

[0106] 12J shows the structure obtained after bonding some of the display pixels Pix to the support 12. In this embodiment, two conductive strips 62 are shown on the support 12. The display pixels Pix that are in contact with the conductive strips 62 are bonded to the conductive strips 62. The display pixels Pix that are not in contact with the conductive strips 62 are not bonded to the support 12. By way of example, each display pixel Pix may be bonded to one of the conductive strips 62 by molecular bonding or by using a bonding material, in particular a conductive epoxy adhesive.

[0107] Fig. 12K shows the structure obtained after separation of the handle 84 from the display pixel Pix bonded to the support 12. Such separation may be performed by laser ablation. The embodiment shown in Figs. 12J and 12K allows multiple display pixels Pix to be bonded to the support 12 simultaneously.

[0108] Alternatively, after the step shown in FIG. 12I, the display pixels Pix may be separated from the handle 84 and a “pick and place” method may be performed, which comprises placing each display pixel Pix individually on the support 12.

[0109] 12L shows the resulting structure after forming insulating layer 24 and electrode layer 26. Insulating layer 24 may be deposited by chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), or cathode sputtering. Electrode layer 26 may be deposited by CVD, PECVD, ALD, cathode sputtering, or evaporation.

[0110] 13A-13E are schematic partial cross-sectional views showing structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device 55 shown in FIG.

[0111] FIG. 13A shows the resulting structure after performing the steps described above in relation to FIGS. 12A-12I.

[0112] 13B shows the structure obtained after forming an insulating layer 56 on the side of each display pixel Pix. The insulating layer 56 may be deposited by chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD) or cathodic sputtering. Conformal deposition may be performed followed by selective etching.

[0113] FIG. 13C shows the structure obtained after bonding the display pixel Pix onto the support 12, for example by carrying out the steps described above in relation to FIGS. 12J and 12K.

[0114] FIG. 13D shows the resulting structure after forming insulating layer 24, for example as described above in connection with FIG. 12L.

[0115] Fig. 13E shows the structure obtained after forming the second electrode layer 26, for example as described above in relation to Fig. 12L. The provision of an insulating layer 56 on the side of each display pixel Pix advantageously prevents the formation of electrical contacts between the electrode layer 26 and the conductive elements that would otherwise be exposed at the side of the display pixel Pix. Therefore, the thickness of the insulating layer 24 does not have to be precisely determined.

[0116] Figure 14 shows the structure obtained for a variant of the method for manufacturing the optoelectronic device 10, in which, after the step described above in relation to figure 12H, the handle 84 is removed and a conductive strip 86 is formed at the end of the wall 46 opposite the light emitting diode LED, so that the electrical connection between the wall 46 and the electrode layer 26 can be improved. The conductive strip 86 is at least partially formed, for example, from aluminium, silver, copper or zinc. The thickness of the conductive strip 86 may be in the range of 50 nm to 2 mm.

[0117] Figure 15 is a view similar to Figure 3 of another embodiment of an optoelectronic device 90 with all the elements of the optoelectronic device 55, except that the electrode layer 26 does not cover the display pixels Pix and the conductive pads 36 connected to the semiconductor layer 54 are replaced by connecting elements 92 forming laterally insulated vias across the semiconductor layer 48 and the active layer 50, stopping in the semiconductor layer 54 and extending outside the semiconductor layer 48 into the conductive pads. In addition, each display pixel Pix has an insulating layer 94 covering the photoluminescent block 44 and the end of the wall 46 opposite the semiconductor layer 54, one of the conductive pads 36 of the control circuit 30 is in contact with the second electrode layer 26, and the control circuit 30 has a via 57 connecting the conductive pads 34 to one of the conductive pads 36.

[0118] This embodiment makes it possible to couple the second electrode layer 26 to a high reference potential source VDD and the first electrode layer 18 to a low reference potential source while using a control circuit 30 whose active area is located on the top surface 32 side of the control circuit 30. In fact, the low reference potential GND is provided to the cathode of the light emitting diode LED through the through via 57 connecting the conductive pad 34 to the conductive pad 36 connected to the connection element 92, and the high reference potential VCC is provided to the active area of ​​the control circuit 30 by the conductive pad 36 connected to the electrode layer 26.

[0119] 16A-16K are schematic partial cross-sectional views illustrating structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device 90 shown in FIG.

[0120] The manufacturing method of this embodiment is as follows: - forming semiconductor layers 72, 74, 76 on a support 70 as previously described in relation to FIG. 12A; - forming the light emitting diodes LED and the conductive pads 42 (FIG. 16B) as described above in relation to FIG. 12B to form the connection elements 92; - bonding the electronic circuitry 80 (FIG. 16C) as previously described in relation to FIG. 12C; - forming walls 46 (FIG. 16D) as described above in relation to FIG. 12D to separate the optoelectronic circuits 40; - forming a photoluminescent block 44 (Fig. 16E) as described above in relation to Fig. 12E; - forming an insulating layer 56 on the sidewalls (FIG. 16F) of each optoelectronic circuit 40 as described above in relation to FIG. 13B; - forming an insulating layer 94 covering the photoluminescent block 44 and the walls 46 of each optoelectronic circuit 40 and joining the handle 84 (FIG. 16G) as described above in relation to FIG. 12F; - thinning the substrate of the electronic circuit 80 to form vias 57 and conductive pads 34 (Fig. 16H), as previously described in relation to Figs. 12G and 12H; - isolating the electronic circuits 30 (FIG. 16I) and forming an insulating layer 56 on the sidewalls of the electronic circuits 30 as described above in relation to FIG. 13B; - bonding some of the display pixels Pix to the support 12 as described above in relation to FIG. 12J; and forming an insulating layer 24 and an electrode layer 26 (FIG. 16K) similar to the process described above in relation to FIG. 12L, except that the electrode layer 26 does not cover the optoelectronic circuit 40 of the display pixel Pix; has.

[0121] 17 and 18A are respectively a cross-sectional view and a plan view similar to those of FIGS. 1 and 2 of another embodiment of an optoelectronic device 95. The optoelectronic device 95 comprises all the elements of the optoelectronic device 90, except that the conductive strip 66 is arranged on the substrate 12 in the same manner as the conductive strip 62, and the conductive strips 62, 66 are, for example, parallel. Therefore, the insulating layer 24 may not be provided. For each display pixel Pix, the control circuit 30 of the display pixel Pix has a through via 96 that runs through the control circuit 30 and is laterally insulated from the rest of the control circuit 30, electrically connecting a conductive track 98 formed on the lower surface 20 side of the control circuit 30 to a conductive area 100 arranged on the upper surface 32 side of the control circuit 30 and covered by an insulating layer 102. The through via 96 allows the potential of a high reference potential source VCC to be applied to the upper surface 32 of the control circuit 30.

[0122] Figure 18B shows a variation of Figure 18A in which conductive strips 62 are arranged along the rows of display pixels Pix and conductive strips 66 are arranged along the columns of display pixels Pix. An electrically insulating block 97 is disposed between conductive strips 62 and 66 at the intersections of conductive strips 62, 66.

[0123] 19A-19J are schematic partial cross-sectional views illustrating structures obtained at successive steps of another embodiment of a method for manufacturing the optoelectronic device 95 shown in FIGS. 17, 18A and 18B.

[0124] The manufacturing method of this embodiment is as follows: - forming semiconductor layers 72, 74, 76 on a support 70 (FIG. 19A) as previously described in relation to FIG. 12A; - forming the light emitting diodes LED and the conductive pads 42 (FIG. 19B) as described above in relation to FIG. 12B to form the connection elements 92; - bonding an electronic circuit 80 (FIG. 19C), which in particular comprises conductive areas 100 on the upper face 32, as previously described in relation to FIG. 12C; - forming walls 46 (FIG. 19D) as described above in relation to FIG. 12D to separate the optoelectronic circuits 40; - forming a photoluminescent block 44 (Fig. 19E) as described above in relation to Fig. 12E; - forming an insulating layer 56 on the sidewalls (FIG. 19F) of each optoelectronic circuit 40 as described above in relation to FIG. 13B; - forming an insulating layer 94 covering the photoluminescent block 44 and the walls 46 of each optoelectronic circuit 40 and attaching the handle 84 (FIG. 19G) as described above in relation to FIG. 12F; - thinning the substrate of the electronic circuit 80 to form vias 57, 96 and conductive pads 34, 98 (Fig. 19H), as previously described in relation to Figs. 12G and 12H; - isolating the electronic circuits 30 (FIG. 19I) and forming an insulating layer 56 on the sidewalls of the electronic circuits 30 as described above in relation to FIG. 13B; and - bonding some of the display pixels Pix to the support 12 as described above in relation to Figure 12J, except that the conductive pad 34 contacts the conductive strip 62 and the conductive pad 98 contacts the conductive strip 66. has.

[0125] Specific embodiments have been described. Various modifications and adjustments will occur to those skilled in the art. Various embodiments with various variations have been described above. It should be noted that various elements of these various embodiments and variations may be combined.

[0126] This patent application claims priority from French Patent Application No. 18 / 55718, which is incorporated herein by reference.

Claims

1. 1. An optoelectronic device, comprising: A support; at least one first conductive layer covering some or all of the support; a plurality of display pixel circuits coupled to the first conductive layer, the plurality of display pixel circuits having opposite first and second surfaces, the plurality of display pixel circuits each having electronic circuitry and optoelectronic circuitry; It is equipped with the electronic circuit has a first surface bonded to the first conductive layer and a third surface opposite the first surface, the optoelectronic circuit having at least two light emitting diodes bonded to the third surface, each light emitting diode including an electrode; At least one of the electrodes of each light emitting diode is connected to the electronic circuit at the third surface, and the optoelectronic circuit further includes a photoluminescent block covering the light emitting diode so as to face the light emitting diode, and a conductive or semiconductive wall surrounding the photoluminescent block; The optoelectronic device further comprising at least one second conductive layer electrically coupled to at least one of the plurality of display pixel circuits.

2. 2. An optoelectronic device as recited in claim 1, wherein said second conductive layer at least partially covers at least one of said plurality of display pixel circuits.

3. 3. The optoelectronic device of claim 2, wherein said second conductive layer is electrically coupled to a wall of at least one of said plurality of display pixel circuits.

4. 2. The optoelectronic device of claim 1 , wherein in at least one of the plurality of display pixel circuits, the second conductive layer contacts a conductive pad of the electronic circuit disposed on a side of the third surface.

5. 2. The optoelectronic device of claim 1, wherein the second conductive layer extends over the support, and in at least one of the plurality of display pixel circuits, the second conductive layer contacts a conductive pad of the electronic circuit disposed on a side of the first surface.

6. 5. An optoelectronic device as claimed in any one of claims 1 to 4, further comprising a first electrically insulating layer covering the first conductive layer between the display pixel circuits and disposed between the first conductive layer and the second conductive layer.

7. 7. An optoelectronic device according to claim 1, further comprising a second electrically insulating layer for each of said display pixel circuits, said second electrically insulating layer covering a side surface of said display pixel circuit.

8. 8. The optoelectronic device of claim 1, wherein the optoelectronic circuit of each of the plurality of display pixel circuits comprises, for each of the display pixel circuits, a first semiconductor layer supporting the wall and the photoluminescent block, and, for each of the light emitting diodes, a separate stack having a second semiconductor layer doped with a first conductivity type disposed on the first semiconductor layer opposite the photoluminescent block, an active layer, and a third semiconductor layer doped with a second conductivity type opposite the first conductivity type.

9. 9. An optoelectronic device as claimed in claim 8, wherein each display pixel circuit for each said stack includes a conductive pad in contact with said first semiconductor layer and bonded to electronic circuitry of said display pixel circuit.

10. At least two of the first conductive layers are provided, Some of the display pixel circuits are respectively connected to the first conductive layer; At least two of the second conductive layers are provided, 10. An optoelectronic device as claimed in any one of claims 1 to 9, characterized in that the second conductive layer is electrically connected to electronic circuits of some of the plurality of display pixel circuits, respectively.

11. 11. The optoelectronic device of claim 10, wherein the at least two first conductive layers and the at least two second conductive layers have the shape of parallel strips.

12. 1. A method of manufacturing an optoelectronic device, comprising the steps of: a) manufacturing a plurality of display pixel circuits each having a first surface and a second surface on opposite sides thereof, the plurality of display pixel circuits each having an electronic circuit and an optoelectronic circuit, the electronic circuit having the first surface and a third surface opposite the first surface, the optoelectronic circuit having at least two light emitting diodes bonded to the third surface, each light emitting diode including an electrode, at least one of the electrodes of each light emitting diode being connected to the electronic circuit at the third surface, the optoelectronic circuit further comprising a photoluminescent block covering the light emitting diodes facing the light emitting diodes, and a conductive or semiconductive wall surrounding the photoluminescent block; b) producing a support partially or entirely covered with at least one first conductive layer; c) bonding a first surface of electronic circuitry of each of the plurality of display pixel circuits to the first conductive layer; and d) forming at least one second conductive layer electrically coupled to at least one of said plurality of display pixel circuits. The method according to claim 1, further comprising:

13. 13. The method of claim 12, wherein the second conductive layer at least partially covers at least one of the plurality of display pixel circuits.

14. 14. The method of claim 13, further comprising electrically coupling the second conductive layer to a wall of at least one of the plurality of display pixel circuits.

15. 13. The method of claim 12, wherein in at least one of the plurality of display pixel circuits, the second conductive layer is brought into contact with a conductive pad of the electronic circuit disposed on a side of the third surface.

16. 14. The method of claim 13, wherein the second conductive layer extends over the support and, in at least one of the plurality of display pixel circuits, the second conductive layer is brought into contact with a conductive pad of the electronic circuit disposed on a side of the first surface.

17. 16. The method according to claim 13, further comprising, between steps c) and d), forming a first electrically insulating layer covering the first conductive layer between the display pixel circuits and disposed between the first conductive layer and the second conductive layer.

18. 18. The method according to claim 13, further comprising, before step c), forming a second electrical insulating layer for each of the display pixel circuits, the second electrical insulating layer covering a side surface of the display pixel circuit.

19. 19. The method according to claim 13, characterized in that in step a) a separate stack is formed for each light emitting diode, comprising a second semiconductor layer doped with a first conductivity type deposited on a first semiconductor layer, an active layer and a third semiconductor layer doped with a second conductivity type opposite to the first conductivity type.

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