Electrode tab and method for forming same

By etching the electrode tabs with a dielectric layer on one side, the method prevents burr formation and reduces the thickness of lithium ion pouch battery tabs, improving their reliability and performance.

JP7681578B2Active Publication Date: 2025-05-22HUTCHINSON TECH INC
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Patent Information

Application Number
JP2022516169
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-09-10
Filing Date
2020-09-11
Publication Date
2025-05-22
Estimated Expiration
2040-09-11

AI Technical Summary

Technical Problem

Lithium ion pouch batteries often develop burrs during the manufacture of electrode tabs, which can lead to short circuits and reduce the battery's reliability.

Method used

The method involves disposing a dielectric layer on one side of a substrate, developing it, and then etching the other side to form the electrode tab, thereby preventing burr formation during ultrasonic welding.

Benefits of technology

This approach effectively reduces the thickness of the electrode tabs while maintaining burr prevention, enhancing the reliability and performance of lithium ion pouch batteries.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

An electrode tab and a method for fabricating the same are described. The method includes disposing a dielectric layer on a second surface of a substrate having a first surface and a second surface. The method includes developing the dielectric layer on the second surface of the substrate. The method also includes etching the first surface of the substrate to form the electrode tab.
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Description

[Technical field]

[0001] FIELD OF THE DISCLOSURE Embodiments of the present disclosure relate generally to batteries, such as lithium ion pouch batteries. In particular, embodiments of the present disclosure relate to a process for forming electrode tabs. [Background technology]

[0002] Lithium ion pouch batteries have two electrical terminals, an anode tab and a cathode tab, that extend outside the pouch. The anode tab is attached to the battery's anode foil and the cathode tab is attached to the battery's cathode foil. Both terminals are susceptible to burrs during the manufacture of the tabs and their attachment to the anode and cathode.

[0003] For example, ultrasonic welding is commonly used to secure the anode tab to the anode foil and the cathode tab to the cathode foil, which can result in irregularities or burrs. Such burrs can cause the battery to short out by penetrating the separator membrane and shorting to the other side of the battery. Thus, there is a need for electrode tabs that eliminate or prevent burr formation during ultrasonic welding. Summary of the Invention

[0004] An electrode tab and a method for making the same are described. The method includes disposing a dielectric layer on a second side of a substrate having a first side and a second side. The method includes developing the dielectric layer on the second side of the substrate. The method also includes etching the first side of the substrate to form the electrode tab.

[0005] Other features and advantages of the embodiments of the present disclosure will become apparent from the accompanying drawings and the detailed description which refers thereto. Embodiments of the present disclosure are illustrated by way of example, and not by way of limitation, in the accompanying drawings in which like references indicate similar elements and in which: [Brief description of the drawings]

[0006] [Figure 1] FIG. 1 illustrates a formed anode tab according to some embodiments of the present disclosure. [Diagram 2] FIG. 2 shows a roll of substrate according to some embodiments of the present disclosure. [Diagram 3] FIG. 3 illustrates a tie layer disposed on one side of a substrate according to some embodiments of the present disclosure. [Figure 4] FIG. 4 illustrates a dielectric layer disposed on a bonding layer according to some embodiments of the present disclosure. [Diagram 5] FIG. 5 illustrates an anode tab having an etched pattern according to some embodiments of the present disclosure. [Figure 6] FIG. 6 shows a substrate having rounded edges according to some embodiments of the present disclosure. [Figure 7] FIG. 7 illustrates a microetched tie layer according to some embodiments of the present disclosure. [Figure 8] FIG. 8 shows a nickel layer electroplated onto an anode tab according to some embodiments of the present disclosure. [Figure 9] FIG. 9 illustrates panelized, AOI inspected, and defect marked anode tabs according to some embodiments of the present disclosure. [Figure 10] FIG. 10 illustrates an anode tab where the polyimide coating is cut to form the shape of the anode tab according to some embodiments of the present disclosure. [Figure 11] FIG. 11 illustrates an anode tab having a sealant applied thereon, according to some embodiments of the present disclosure. [Figure 12] FIG. 12 illustrates a cathode tab according to some embodiments of the present disclosure. [Figure 13] FIG. 13 illustrates a roll of substrate according to some embodiments of the present disclosure. [Figure 14] FIG. 14 illustrates a dielectric layer disposed on a second surface of the substrate, according to some embodiments of the present disclosure. [Figure 15]FIG. 15 illustrates a cathode tab having an etched pattern according to some embodiments of the present disclosure. [Figure 16] FIG. 16 shows a substrate having rounded edges according to some embodiments of the present disclosure. [Figure 17] FIG. 17 illustrates a dielectric layer applied to a first side of a cathode tab according to some embodiments of the present disclosure. [Figure 18] FIG. 18 illustrates a panelized, AOI inspected, and defect marked cathode tab according to some embodiments of the present disclosure. [Figure 19] FIG. 19 illustrates a cathode tab where the polyimide coating is cut to form the shape of the cathode tab according to some embodiments of the present disclosure. [Figure 20] FIG. 20 illustrates a cathode tab having a sealant applied thereon according to some embodiments of the present disclosure. [Figure 21] FIG. 21 illustrates a roll of substrate according to some embodiments of the present disclosure. [Figure 22] FIG. 22 illustrates a dielectric layer disposed on a substrate according to some embodiments of the present disclosure. [Diagram 23] FIG. 23 shows an array of anode tabs having a pattern etched thereon according to some embodiments of the present disclosure. [Figure 24] FIG. 24 shows a nickel layer electroplated onto an array of anode tabs according to some embodiments of the present disclosure. [Diagram 25] FIG. 25 illustrates an array of panelized, AOI inspected, and defect marked anode tabs according to some embodiments of the present disclosure. [Figure 26] FIG. 26 illustrates a roll of substrate according to some embodiments of the present disclosure. [Figure 27] FIG. 27 illustrates a dielectric layer disposed on a substrate according to some embodiments of the present disclosure. [Figure 28]FIG. 28 shows an array of cathode tabs having a pattern etched thereon according to some embodiments of the present disclosure. [Figure 29] FIG. 29 shows an array of cathode tabs having a second dielectric layer disposed on the foil side of the substrate according to some embodiments of the present disclosure. [Diagram 30] FIG. 30 shows an array of panelized, AOI inspected, and defect marked cathode tabs according to some embodiments of the present disclosure. [Diagram 31] FIG. 31 illustrates a roll of substrate according to some embodiments of the present disclosure. [Diagram 32] FIG. 32 illustrates a dielectric layer disposed on a substrate according to some embodiments of the present disclosure. [Diagram 33] FIG. 33 shows a dielectric layer disposed on the separator side of a substrate having a pattern etched thereon, according to some embodiments of the present disclosure. [Diagram 34] FIG. 34 shows a pattern etched into the foil side of a substrate according to some embodiments of the present disclosure. [Diagram 35] FIG. 35 illustrates a nickel layer disposed over exposed copper on the foil side of a substrate, according to some embodiments of the present disclosure. [Diagram 36] FIG. 36 illustrates a pattern etched into a nickel layer according to some embodiments of the present disclosure. [Figure 37] FIG. 37 shows a second dielectric layer disposed on top of the foil side having a pattern etched thereon, according to some embodiments of the present disclosure. [Figure 38] FIG. 38 shows an electroplated nickel layer on an array of anode tabs according to some embodiments of the present disclosure. [Figure 39] FIG. 39 shows an array of panelized, AOI inspected, and defect marked anode tabs according to some embodiments of the present disclosure. [Diagram 40] FIG. 40 illustrates an anode tab having a sealant applied thereon according to some embodiments of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Embodiments of electrode tabs and methods of forming the electrode tabs are described. FIG. 1 shows a first side 11a of the anode tab and a second side 11b of the anode tab. Referring to FIG. 1, an anode tab 11 formed by the methods disclosed herein is shown. The anode tab 11 includes a substrate 12, a polyimide coating 13, and a sealant 14 disposed along the minor axis of the anode tab 11.

[0008] 2 through 11 illustrate a method of forming the anode tab 11. Referring to FIG. 2, a roll of substrate 12 is shown. In some embodiments, substrate 12 is a material that has a higher electrical conductivity than nickel. In some embodiments, substrate 12 is copper foil. The copper foil may have a thickness of 20 to 50 microns (μm). In some embodiments, the copper foil may have a thickness of 30 μm.

[0009] FIG. 3 shows a bond layer 15 disposed on one side of the substrate 12. In some embodiments, the bond layer 15 can range in thickness from about 2 nm to about 500 nm and is formed by methods such as vacuum sputtering, vacuum evaporation, chemical vapor deposition, chemical plating, conversion coating (e.g., chromate conversion coating), and other techniques known in the art. The bond layer 15 can be made of chromium (Cr), nickel (Ni), cobalt (Co), molybdenum (Mo), or alloys thereof. The bond layer may be formed of other materials known in the art. In some embodiments, the bond layer 15 is a sputtered chromium seed layer.

[0010] FIG. 4 shows a dielectric layer, such as a polyimide coating 13, disposed on a tie layer 15. Without being bound by theory, a thin tie layer 15 is used to promote adhesion between the substrate 12 and the polyimide coating 13, prevent or minimize corrosion at the interface between the substrate 12 and the polyimide coating 13, and provide a diffusion barrier between the substrate 12 and the polyimide coating 13. In some embodiments, the polyimide coating 13 may be applied at a thickness of 5-10 μm to minimize the thickness of the anode tab 11. The polyimide coating 13 is applied using techniques including, but not limited to, liquid slot die, roller coat, spray, curtain coat, dry film lamination, and screen printing techniques. In some embodiments, the polyimide coating 13 is applied by liquid slot die and then developed. The polyimide coating 13 is developed using a suitable solvent known in the art.

[0011] FIG. 5 shows an anode tab 11 having an etched pattern 17. The resist coating is applied to the substrate 12 using techniques including, but not limited to, liquid slot die, roller coat, spray, curtain coat, dry film lamination, and screen printing techniques. The resist coating is then exposed to ultraviolet light, etched (i.e., etched in areas of the substrate 12 not protected by the resist pattern), and stripped using photolithography and etching techniques including techniques known in the art. In some embodiments, the resist coating is applied to one side, i.e., the substrate 12, and the tie layer 15 acts as an etch barrier to the second side of the anode tab 11.

[0012] 6 illustrates the substrate 12 having an optional rounded edge 18. In some embodiments, the method of forming the anode tab includes rounding the edge 18 of the substrate 12 remaining after etching. Rounding the edge 18 of the substrate 12 may be performed using techniques known in the art. In some embodiments, rounding the edge 18 of the substrate 12 remaining after etching is an optional step in the method of making the anode tab.

[0013] 7 shows a microetched tie layer 15. In some embodiments, the method includes microetching the tie layer 15. The microetching of the tie layer 15 may be performed in the areas where the substrate 12 is etched and between the lanes of the polyimide coating 13 on the second side of the anode tab 11. The microetching of the tie layer 15 may be performed by an oxidation process or other techniques known in the art.

[0014] FIG. 8 shows a nickel layer 19 electroplated onto the anode tab 11. In some embodiments, the method includes electroplating nickel onto the anode tab 11. In some embodiments, the nickel layer 19 is about 1-5 μm thick. Preferably, the nickel layer 19 is about 2 μm thick. Electroplating of nickel onto the anode tab 11 may be performed using techniques including, but not limited to, electrolytic plating, electroless plating, and techniques including those known in the art.

[0015] 9 shows the anode tabs 11 being panelized, automated optical inspection (AOI), and defect marked. Such steps may be performed using techniques known in the art.

[0016] 10 shows an anode tab 11 where the polyimide coating 13 is cut to form the shape of the anode tab 11. In some embodiments, the method includes cutting the polyimide coating 13 around the periphery of the anode tab 11. Cutting the polyimide coating 13 may be performed using a metal stamping or a laser cutting process. Other techniques known in the art may also be used to cut the polyimide coating around the periphery of the anode tab 11.

[0017] 11 shows an anode tab 11 having a sealant 14 applied thereon. In some embodiments, the method includes applying the sealant 14 thereon. The sealant 14 may be applied along a minor axis of the anode tab 11 on a first side and a second side of the anode tab 11. In some embodiments, the sealant 14 is a heat seal tape such as, but not limited to, EVA, polypropylene, PET, and the like. Other sealants known in the art may also be used.

[0018] According to some embodiments, the anode tab 11 includes a dielectric layer, such as a polyimide layer, disposed on one side of an anode tab comprised of nickel-plated copper. The anode tab 11 reduces the overall thickness compared to conventional anode tabs while maintaining burr prevention. For example, a conventional nickel / chrome tab has a thickness of about 80 μm. A conventional tab requires an additional tape, such as a PET film with an acrylic adhesive, having a thickness of about 10 μm for burr prevention. Thus, a conventional anode tab has a thickness of about 90 μm. According to some embodiments of the present disclosure, the anode tab 11 may have a substrate of about 30 μm and a polyimide coating of about 5-10 μm. Thus, according to some embodiments of the present disclosure, the anode tab 11 may have a thickness of about 35-40 μm, whereas a conventional anode tab has a thickness of about 90 μm.

[0019] 12 shows a cathode tab first side 51a and a cathode tab second side 51b. Referring to FIG. 12, a cathode tab 51 formed by the methods disclosed herein is shown. The cathode tab 51 includes a substrate 52, a polyimide coating 53, and a sealant 54 disposed along the minor axis of the cathode tab 51.

[0020] 13 to 20 illustrate a method for manufacturing a cathode tab. Referring to FIG. 13, a roll of substrate 52 is shown. In some embodiments, substrate 52 is aluminum foil. The aluminum foil may have a thickness of 20 to 50 μm. In some embodiments, the aluminum foil may have a thickness of 30 μm.

[0021] FIG. 14 shows a dielectric layer, such as a polyimide coating 53, disposed on a second surface of the substrate 52. In some embodiments, the polyimide coating 53 may be applied at a thickness of 5-10 μm to minimize the thickness of the cathode tab 51. The polyimide coating 53 is applied using techniques including, but not limited to, liquid slot die, roller coat, spray, curtain coat, dry film lamination, and screen printing techniques. In some embodiments, the polyimide coating 53 is applied by liquid slot die and then developed. The polyimide coating 53 is developed using a suitable solvent known in the art.

[0022] 15 shows a cathode tab 51 having an etched pattern 55. The resist coating is applied to the substrate 52 using techniques including, but not limited to, liquid slot die, roller coat, spray, curtain coat, dry film lamination, and screen printing techniques. The resist coating is then exposed to ultraviolet light, etched (i.e., etched in areas of the substrate 52 not protected by the resist pattern), and stripped using photolithography and etching techniques including techniques known in the art. In some embodiments, the resist coating is applied to one side, i.e., the substrate 52.

[0023] 16 shows a substrate 52 having a rounded end 56. In some embodiments, the method of forming a cathode tab includes rounding the end 56 of the substrate 52 remaining after etching. Rounding the end 56 of the substrate 52 may be performed using techniques known in the art. In some embodiments, rounding the end 56 of the substrate 52 remaining after etching is an optional step in the method of making a cathode tab.

[0024] 17 shows a dielectric layer 57 applied to a first side of the cathode tab 51. In some embodiments, the method includes applying the dielectric layer 57 to the first side of the cathode tab 51. In some embodiments, the dielectric layer 57 may be selectively applied along the rounded edge 56 of the substrate 52, for example, by stencil, inkjet, or other similar techniques known in the art. The dielectric layer 57, according to some embodiments, is a non-photosensitive insulator / insulating layer such as, but not limited to, polypropylene, PET, acrylic, polyamide, non-photosensitive polyimide, silicone, or combinations thereof. Other insulating materials known in the art may also be used.

[0025] 18 shows the cathode tabs 51 that have been panelized, automated optically inspected (AOI), and defect marked. Such steps can be performed using techniques known in the art.

[0026] 19 shows a cathode tab 51 where the polyimide coating 53 is cut to form the shape of the cathode tab 51. In some embodiments, the method includes cutting the polyimide coating 53 around the periphery of the cathode tab 51. Cutting the polyimide coating 53 may be performed using a metal stamping or a laser cutting process. Other techniques known in the art may also be used to cut the polyimide coating 53 around the periphery of the cathode tab 51.

[0027] 20 shows a cathode tab 51 having a sealant 54 applied thereon. In some embodiments, the method includes applying the sealant 54 thereon. According to some embodiments, the sealant 54 is applied along the minor axis of the cathode tab 51 on both the first and second sides of the tab. In some embodiments, the sealant 54 is a heat seal tape such as, but not limited to, ethylene vinyl acetate (EVA), polypropylene, polyethylene terephthalate (PET), and the like. Other sealants known in the art may also be used.

[0028] According to some embodiments, the cathode tab 51 includes a dielectric layer 53, such as a polyimide layer, disposed on one side of the cathode tab, which is made of aluminum. The cathode tab 51, according to embodiments described herein, reduces the overall thickness compared to a conventional anode tab while maintaining burr prevention. For example, a conventional cathode tab has a thickness of about 80 μm. A conventional tab requires an additional tape, such as a PET film with an acrylic adhesive, having a thickness of about 10 μm on each side of the conventional tab for burr prevention. Thus, a conventional cathode tab has a thickness of about 100 μm. According to some embodiments of the present disclosure, the cathode tab 51 may have a substrate of about 30 μm and a polyimide coating of about 5-10 μm. Thus, according to some embodiments of the present disclosure, the cathode tab 51 may have a thickness of about 35-40 μm, whereas a conventional anode tab has a thickness of about 100 μm.

[0029] 21 through 25 illustrate an array 21 of anode tabs, according to some embodiments of the present disclosure. Referring to FIG. 21, a roll of substrate 22 is shown. In some embodiments, substrate 22 is a material having a higher electrical conductivity than nickel. In some embodiments, substrate 22 is copper foil. In some embodiments, the copper foil is chromated to form a bond layer to aid in direct bonding of the polyimide coating. According to some embodiments, the copper foil has a thickness of 20-50 μm. In some embodiments, the copper foil may have a thickness of 35 μm.

[0030] Figure 22 shows a dielectric layer / insulating material such as a polyimide coating 23 disposed on a substrate 22. In some embodiments, the polyimide coating 23 is disposed only on the separator side surface 24 of the substrate 22 shown in FIG. 23a and not on the foil side surface 25 of the substrate 22 shown in FIG. 23b. In some embodiments, the polyimide coating 23 can be applied with a thickness of 5-10 μm to minimize the thickness of each anode tab in the array 21 of anode tabs. The polyimide coating 23 is applied using techniques including, but not limited to, liquid slot die, roller coat, spray, curtain coat, dry film lamination, and screen printing techniques. In some embodiments, the polyimide coating 23 is applied by a liquid slot die. According to some embodiments, the polyimide coating 23 is not exposed to or developed by ultraviolet light.

[0031] In some embodiments, the method further includes marking and punching the substrate 22 using techniques as described herein. Marking and punching can be performed using techniques known in the art. Marking and punching can be performed before and after disposing the polyimide coating 23 on the substrate.

[0032] Figure 23 shows an array 21 of anode tabs having a pattern etched thereon. In some embodiments, the method includes micro-etching the exposed substrate 22 not covered by the polyimide coating 23 to remove the chromate treatment. For example, the micro-etching of the substrate 22 can be performed between the lanes of the polyimide coating 23. Micro-etching can be performed by an oxidation treatment or other techniques known in the art.

[0033] In some embodiments, the method further includes coating a resist layer, exposing the resist layer to ultraviolet light, developing the resist layer, etching the substrate, and stripping the resist layer. The resist coating is applied to the substrate 22 using techniques including, but not limited to, liquid slot die, roller coat, spray, curtain coat, dry film lamination, and screen printing techniques. The resist coating is then exposed to ultraviolet light, etched (i.e., the substrate 22 is etched in areas not protected by the resist pattern), and stripped using etching techniques including photolithography and techniques known in the art.

[0034] Figure 24 shows a nickel layer 27 electroplated on an array 21 of anode tabs. In some embodiments, the method includes electroplating nickel on the array 21 of anode tabs. All areas of the substrate having exposed copper can be electroplated with nickel. In some embodiments, the nickel layer 27 has a thickness of about 1 - 5 μm. Preferably, the nickel layer 27 has a thickness of about 2 μm. Electroplating nickel onto each anode tab 11 of the array 21 of anode tabs can be performed using techniques known in the art.

[0035] Figure 25 shows an array 21 of anode tabs that has been panelized, automatically optically inspected (AOI), and defect marked. Such steps can be performed using techniques known in the art. And the anode tabs 11 can be shipped in this form.

[0036] According to some embodiments, each anode tab 11 of the array 21 of anode tabs includes a dielectric layer such as a polyimide layer 23 disposed on one side of the anode tab composed of nickel-plated copper. The anode tab 11 reduces the overall thickness compared to conventional anode tabs while maintaining burr prevention. For example, a conventional nickel / chromium tab has a thickness of about 80 μm. Conventional tabs require an additional tape for burr prevention, such as a film made of PET with an acrylic adhesive, having a thickness of about 10 μm. Thus, conventional anode tabs have a thickness of about 90 μm. In contrast, according to some embodiments of the present disclosure, the anode tab 11 may have a substrate of about 35 μm and a polyimide coating of about 5 - 10 μm. Thus, according to some embodiments of the present disclosure, while conventional anode tabs have a thickness of about 90 μm, the anode tab 11 may have a thickness of about 30 - 45 μm.

[0037] Figures 26 to 30 illustrate an array 61 of cathode tabs according to some embodiments of the present disclosure. Referring to Figure 26, a roll of substrate 62 is shown. In some embodiments, the substrate 62 is an aluminum foil. According to some embodiments, the aluminum foil may have a thickness of 20 - 50 μm. In some embodiments, the aluminum foil may have a thickness of 35 μm.

[0038] FIG. 27 shows a dielectric layer, such as a polyimide coating 63, disposed on a substrate 62. In some embodiments, the polyimide coating 63 is disposed only on the separator side 64 of the substrate 62, and not on the foil side 65 of the substrate 62. In some embodiments, the polyimide coating 63 may be applied at a thickness of 5-10 μm to minimize the thickness of the cathode tab. The polyimide coating 63 is applied using techniques including, but not limited to, liquid slot die, roller coat, spray, curtain coat, dry film lamination, and screen printing techniques. In some embodiments, the polyimide coating 63 is applied by a liquid slot die. The polyimide coating 63 may be applied in five lanes, as shown in FIG. 27. According to some embodiments, the polyimide coating 63 is not exposed to UV light or developed.

[0039] In some embodiments, the method further includes marking and drilling the substrate 62. The marking and drilling may be performed using techniques known in the art. The marking and drilling may also be performed before or after disposing the polyimide coating 63 on the substrate.

[0040] FIG. 28 shows an array 61 of cathode tabs having a pattern etched thereon. In some embodiments, the method includes coating a resist layer, exposing the resist layer to ultraviolet light, developing the resist layer, etching the substrate, and stripping the resist layer. The resist coating is applied to the substrate 62 using techniques including, but not limited to, liquid slot die, roller coat, spray, curtain coat, dry film lamination, and screen printing techniques. The resist coating is then exposed to ultraviolet light, etched (i.e., etched in areas where the substrate 62 is not protected by the resist pattern), and stripped using etching techniques including photolithography and techniques known in the art.

[0041] FIG. 29 shows an array 61 of cathode tabs having a second dielectric layer, such as a polyimide coating 66, disposed on the foil side 65 of the substrate 62. In some embodiments, the second polyimide coating 66 may be applied at a thickness of 5-10 μm to minimize the thickness of the cathode tabs. The second polyimide coating 66 is applied using techniques including, but not limited to, liquid slot die, roller coat, spray, curtain coat, dry film lamination, and screen printing techniques. In some embodiments, the polyimide coating 66 is applied by liquid slot die. According to some embodiments, the polyimide coating 66 is not exposed to UV light or developed.

[0042] As shown in Figure 29, a dielectric layer such as a polyimide coating 66 is applied in five narrow lanes to provide insulation to the foil side 65. In some embodiments, the narrow lanes of polyimide coating 66 are about 4-5 mm wide and occupy about 10%-20% of the surface area covered by the separator side 64, as shown in Figure 27. In some embodiments, the narrow lanes of polyimide coating 66 occupy about 11% of the surface area covered by the separator side 64.

[0043] 30 shows an array 61 of cathode tabs that has been panelized, automated optically inspected (AOI), and defect marked. Such steps can be performed using techniques known in the art, and the array 61 of cathode tabs can be shipped in this form.

[0044] According to some embodiments, the array of cathode tabs 61 includes a dielectric layer, such as a polyimide layer 63, disposed on two sides of the cathode tab 67, which is made of aluminum. The array of cathode tabs 61 reduces the overall thickness compared to a conventional cathode tab while maintaining the prevention of burrs. For example, a conventional cathode tab has a thickness of about 80 μm. A conventional tab requires an additional tape, such as a PET film with an acrylic adhesive, having a thickness of about 10 μm for the prevention of burrs. Thus, a conventional cathode tab has a thickness of about 100 μm. In contrast, according to some embodiments of the present disclosure, each cathode tab 67 of the array of cathode tabs 61 may have a substrate of about 35 μm and two polyimide coatings, each of about 5-10 μm. Thus, according to some embodiments of the present disclosure, the array of cathode tabs 61 may have a thickness of about 45-55 μm, whereas a conventional cathode tab has a thickness of about 100 μm.

[0045] 31-40 illustrate an array 31 of anode tabs, according to some embodiments of the present disclosure. Referring to FIG. 31, a roll of substrate 32 is shown. In some embodiments, substrate 32 is a material having a higher electrical conductivity than nickel. In some embodiments, substrate 32 is copper foil. In some embodiments, the copper foil is chromated to aid in direct bonding of the polyimide coating. The copper foil may have a thickness of 20-50 μm. In some embodiments, the copper foil may have a thickness of 35 μm.

[0046] FIG. 32 shows a dielectric layer, such as a polyimide coating 33, disposed on the substrate 32. In some embodiments, the polyimide coating 33 is disposed only on the separator side 34 of the substrate 32, and not on the foil side 35 of the substrate 32. In some embodiments, the polyimide coating 33 may be applied at a thickness of 5-10 μm to minimize the thickness of the anode tab 61. The polyimide coating 33 is applied using techniques including, but not limited to, liquid slot die, roller coat, spray, curtain coat, dry film lamination, and screen printing techniques. In some embodiments, the polyimide coating 33 is applied by liquid slot die. According to some embodiments, the polyimide coating 33 is a photosensitive polyimide that is exposed to ultraviolet light, developed, and cured.

[0047] 33 shows a polyimide coating 33 disposed on the separator side 34 of a substrate 32 having a pattern 36 etched thereon. The pattern 36 etched into the polyimide coating 33 includes connection points for a reference electrode terminal 37, a resistance temperature detector (RTD) terminal 38, a reference electrode 39, and a main anode terminal 40.

[0048] In some embodiments, a photoresist layer is formed on the polyimide coating 33 to form a pattern 36 thereon. The photoresist layer, according to some embodiments, is exposed using photolithography techniques, including those known in the art, and developed using wet etching techniques, including those known in the art. This patterned photoresist layer then provides a pattern in the polyimide coating 33 during the polyimide removal process (etching), where either wet or dry techniques may be used. The photoresist layer can then be stripped by techniques known in the art. Yet another patterning method is laser ablation of unwanted dielectric.

[0049] 34 shows a pattern 41 etched into the foil side 35 of the substrate 32. In some embodiments, the array of anode tabs 31 after the pattern 41 is etched thereon has a main anode 42, two RTD leads 43, and a reference electrode lead 44.

[0050] In some embodiments, to etch the pattern 41 into the foil side 35 of the substrate 32, the method further includes coating a resist layer, exposing the resist layer to ultraviolet light, developing the resist layer, etching the substrate, and stripping the resist layer. The resist coating is applied to the substrate 32 using techniques including, but not limited to, liquid slot die, roller coat, spray, curtain coat, dry film lamination, and screen printing techniques. The resist coating is then exposed to ultraviolet light, etched (i.e., etched in areas of the substrate 32 not protected by the resist pattern), and stripped using etching techniques including photolithography and techniques known in the art.

[0051] In some embodiments, the method further includes microetching the array of anode tabs 31 to remove the chromate treatment. Microetching can be performed by an oxidation treatment or other techniques known in the art.

[0052] FIG. 35 shows a nickel layer 45 disposed over the copper exposed on the foil side 35 of the substrate 32. In some embodiments, the method includes sputtering nickel onto the foil side 35. In some embodiments, the nickel layer 45 is about 1-5 μm thick. Preferably, the nickel layer 45 is about 2 μm thick. Sputtering of nickel onto the foil side 35 can be performed using techniques known in the art.

[0053] FIG. 36 shows a pattern 46 etched into the nickel layer 45. In some embodiments, to etch the pattern 46 into the nickel layer 45, the method further includes coating a resist layer, exposing the resist layer to ultraviolet light, developing the resist layer, etching the substrate, and stripping the resist layer. The resist coating is applied to the nickel layer 45 using techniques including, but not limited to, liquid slot die, roller coat, spray, curtain coat, dry film lamination, and screen printing techniques. The resist coating is then exposed to ultraviolet light, etched (i.e., the nickel layer 45 is etched in areas not protected by the resist pattern), and stripped using etching techniques including photolithography and techniques known in the art.

[0054] FIG. 37 shows a second dielectric layer, such as a polyimide layer 46, disposed on top of the foil side 35 with a pattern etched thereon. In some embodiments, the polyimide coating 46 may be applied at a thickness of 5-10 μm to minimize the thickness of the array of anode tabs 31. The second polyimide coating 46 is applied using techniques including, but not limited to, liquid slot die, roller coat, spray, curtain coat, dry film lamination, and screen printing techniques. In some embodiments, the second polyimide coating 46 is applied by liquid slot die. According to some embodiments, the second polyimide coating 46 is a photosensitive polyimide that is exposed to ultraviolet light, developed, and cured. The pattern etched into the second polyimide coating 46 includes four pin outs 48 and connection points to the main foil attachment surface 49. The pattern may be etched using techniques discussed in this disclosure or other techniques known in the art.

[0055] FIG. 38 shows an electroplated nickel layer 100 on the array of anode tabs 31. In some embodiments, the method includes electroplating nickel on both sides of the array of anode tabs 31 (i.e., the foil side and the separator side). In some embodiments, the nickel layer 100 is soft nickel and covers all exposed nickel surfaces of the array of anode tabs 31. In some embodiments, the nickel layer 100 is about 1-5 μm thick. Preferably, the nickel layer 100 is about 2-3 μm thick. Electroplating of nickel onto the anode tape may be performed using techniques known in the art without the use of a mask.

[0056] 39 shows an array of anode tabs 31 that has been panelized, automated optically inspected (AOI), and defect marked. Such steps can be performed using techniques known in the art.

[0057] Additionally, the method may include selectively applying the reference electrode material 101. In some embodiments, a thin coating of graphite slurry material is selectively applied to the exposed reference electrode 39 by inkjet, jet, syringe dispense, stencil, and other similar techniques known in the art. The method may further include baking the anode tab 31 after selectively applying the reference electrode material 101. Baking may be performed at conditions known in the art.

[0058] 40 shows an anode tab having a sealant 103 applied thereon at the minor axis of the anode tab. In some embodiments, the method includes singulating the anode tab and applying the sealant 103 thereon. The sealant 103 may be applied along the minor axis of the anode tab 31 on a first side and a second side of the anode tab. In some embodiments, the sealant 103 is a heat seal tape. Other sealants known in the art may also be used.

[0059] The method for forming the cathode tab may be carried out similarly to the method for forming the anode tab. Those skilled in the art will readily understand the modifications for manufacturing the cathode tab based on the method for forming the anode tab. For example, the RTD may be replaced with a reference electrode, and a different slurry material, such as a lithium oxide material, may be applied to the reference electrode.

[0060] Although described with reference to these embodiments, workers skilled in the art will recognize that changes can be made in form and detail without departing from the spirit and scope of the disclosure. [Appendix 1] disposing a tie layer on a second surface of a substrate having a first surface and a second surface; disposing a first dielectric layer on the tie layer on the second side of the substrate; developing the first dielectric layer with a first pattern on the second side of the substrate; Etching at least a portion of the first surface of the substrate to form an electrode tab; microetching the tie layer after etching the first side of the substrate; electroplating the electrode tabs with nickel; and applying a second dielectric layer to at least the portion of the first surface of the substrate that forms the electrode tab. [Appendix 2] The manufacturing method described in Appendix 1 includes rounding an edge of the substrate, and the second dielectric layer is disposed along the rounded edge of the substrate. [Appendix 3] 2. The method of claim 1, further comprising cutting the polyimide coating surrounding the electrode tab. [Appendix 4] 2. The method of claim 1, further comprising disposing a sealant on both sides of the electrode tab. [Appendix 5] The manufacturing method described in Appendix 1, wherein the electrode tab is an anode tab. [Appendix 6] The manufacturing method described in Appendix 1, wherein the electrode tab is a cathode tab. [Appendix 7] 2. The method of claim 1, wherein the tie layer is an organic antioxidant. [Appendix 8] 2. The method of claim 1, wherein the tie layer is a conversion coating. [Appendix 9] 2. The method of claim 1, wherein the tie layer is a vapor-deposited metal selected for its adhesion properties. [Appendix 10] 2. The method of claim 1, wherein the nickel is plated by electrolytic plating or electroless plating. [Appendix 11] disposing a first dielectric layer on a first surface of a substrate as a series of lanes disposed along the first surface of the substrate; Etching at least a portion of the substrate with a pattern to form electrode tabs between the series of lanes of the first dielectric layer; rounding any edges of the etched substrate; applying a second dielectric layer over both a portion of the second surface of the substrate and the rounded end of the etched substrate that forms the electrode tab; and removing a portion of the first dielectric layer and the second dielectric layer present around the substrate to form the electrode tab. [Appendix 12] 12. The method of claim 11, wherein the substrate is a copper foil comprising a chromate layer. [Appendix 13] 12. The method of claim 11, comprising microetching the substrate to expose a copper surface. [Appendix 14] 12. The method of claim 11, comprising plating all exposed copper surfaces with nickel. [Appendix 15] 12. The method of claim 11, wherein the substrate is an aluminum foil. [Appendix 16] 12. The method of claim 11, comprising disposing the second dielectric layer as a series of lanes along the second surface of the substrate and disposed over the rounded edges of each exposed aluminum surface, the second dielectric layer comprising polyimide. [Appendix 17] 17. The method of claim 16, wherein the lanes of the second dielectric layer on the second side of the substrate are narrower than the lanes of the first dielectric layer on the first side of the substrate. [Appendix 18] Providing a substrate including a chromate-treated copper foil on which a chromate layer is formed; disposing a first photosensitive polyimide layer on a separator side of the substrate; developing the first photosensitive polyimide layer with a first pattern; Etching the foil side of the substrate with a second pattern to form an anode tab, the first photosensitive polyimide layer on the separator side of the substrate patterned with the first pattern exposing access points to a main anode, at least two resistance temperature detector leads, and a reference electrode lead; microetching the substrate to remove the chromate layer; disposing a nickel layer on the foil-side of the substrate; Etching the nickel layer to form a resistance temperature detector circuit; disposing a second photosensitive polyimide layer on the foil side of the substrate in a third pattern to provide access points to a pin-out and main foil attachment surface; developing the second photosensitive polyimide layer; plating the foil side and the separator side of the substrate with nickel. [Appendix 19] 19. The method of claim 18, comprising selectively applying a reference electrode material. [Appendix 20] disposing a first photosensitive polyimide layer on a separator side of an aluminum foil substrate; developing the first photosensitive polyimide layer with a first pattern; Etching at least a portion of the foil side of the substrate with a second pattern to form a cathode tab, the first photosensitive polyimide layer on the separator side of the substrate patterned with the first pattern exposing access points to a main cathode, at least two resistance temperature detector leads, and a reference electrode lead; disposing a nickel layer on the foil-side of the substrate; Etching the nickel layer to form a resistance temperature detector circuit; disposing a second photosensitive polyimide layer on the foil side of the substrate; and developing the second photosensitive polyimide layer with a third pattern such that the second photosensitive polyimide layer is disposed on at least a remaining portion of the foil side of the substrate forming the cathode tab. [Appendix 21] 17. The method of claim 16, comprising selectively applying a reference electrode material to a portion of the exposed substrate of the separator side. [Appendix 22] disposing a first photosensitive polyimide layer on a separator side of a substrate including an aluminum foil; developing the first photosensitive polyimide layer with a first pattern; Etching the foil side of the substrate with a second pattern to remove a portion of the foil side of the substrate, the first photosensitive polyimide layer on the separator side of the substrate patterned with the first pattern exposing access points of a cathode tab to a main cathode, at least two resistance temperature detector leads, and a reference electrode lead; disposing a second photosensitive polyimide layer on the foil side of the substrate; developing the second photosensitive polyimide layer such that the second photosensitive polyimide layer is disposed on a remaining portion of the foil side of the substrate; and applying a reference electrode material to a portion of the exposed substrate on the separator side of the substrate. [Appendix 23] disposing a first photosensitive polyimide layer on a separator side of an aluminum foil substrate; developing the first photosensitive polyimide layer; etching the foil side of the substrate to remove a portion of the foil side of the substrate to form a cathode tab, the first photosensitive polyimide layer on the separator side of the substrate exposing access points of the cathode tab to a main cathode, at least two resistance temperature detector leads, and a reference electrode lead; disposing a second layer comprising an insulator or dielectric layer on the foil side of the substrate, the second layer being disposed across the foil side of the substrate and including lanes disposed on a remainder of the foil side of the substrate; and applying a reference electrode material to the exposed substrate portion of the separator side.

Claims

1. disposing a tie layer on a second surface of a substrate having a first surface and a second surface; disposing a first dielectric layer on the tie layer on the second side of the substrate; developing the first dielectric layer with a first pattern on the second side of the substrate; Etching at least a portion of the first surface of the substrate to form an electrode tab; microetching the tie layer after etching the first side of the substrate; electroplating the electrode tabs with nickel; and applying a second dielectric layer to the at least a portion of the first surface of the substrate forming the electrode tab.

2. The method of claim 1 further comprising rounding an edge of the substrate, the second dielectric layer being disposed along the rounded edge of the substrate.

3. The method of claim 1 including disposing a sealant on both sides of the electrode tab.

4. The method of claim 1 , wherein the electrode tab is an anode tab.

5. The method of claim 1 , wherein the electrode tab is a cathode tab.

6. The method of claim 1 , wherein the tie layer is a conversion coating.

7. Disposing a first dielectric layer on a first surface of a substrate; Etching at least a portion of the substrate with a pattern to form an electrode tab; rounding any edges of the etched substrate; applying a second dielectric layer to both a portion of the second surface of the substrate and the rounded end of the etched substrate that forms the electrode tab; and removing a portion of the first dielectric layer and the second dielectric layer present around the substrate to form the electrode tab.

8. The method of claim 7 , wherein the substrate is a copper foil containing a chromate layer.

9. The method of claim 7 , wherein the substrate is an aluminum foil.

10. The method of claim 7 , comprising disposing the second dielectric layer along the second side of the substrate, the second dielectric layer comprising a polyimide.

11. The method of claim 10 , wherein the second dielectric layer on the second side of the substrate is narrower than the first dielectric layer on the first side of the substrate.

Citation Information

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