System and Method for Key Parameter Identification, Process Model Calibration, and Variability Analysis in a Virtual Semiconductor Device Fabrication Environment
The virtual fabrication environment with an analysis module addresses the complexity and inefficiency of semiconductor fabrication by simulating process flows and predicting 3D structures, thereby reducing development time and costs while enhancing process integration.
Patent Information
- Application Number
- JP2023066796
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2018-02-15
- Filing Date
- 2023-04-17
- Publication Date
- 2025-05-26
- Estimated Expiration
- 2038-06-18
AI Technical Summary
The increasing complexity of semiconductor fabrication processes at advanced technology nodes has led to lengthy and costly experimental fabrication runs with negative or invalid characterization results, necessitating a more efficient approach for process development.
A virtual fabrication environment with an analysis module that identifies key parameters, performs process model calibration, and conducts variability analysis, allowing for the simulation of integrated process flows and prediction of 3D device structures without physical experimentation.
This approach reduces the time and cost associated with semiconductor process development by enabling rapid verification of process assumptions and visualization of complex interrelationships between process steps, leading to improved process integration and reduced structural defects.
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Abstract
Description
Technical Field
[0001] [Related Applications] This application claims priority and the benefit of U.S. Provisional Application No. 62 / 521,506, filed Jun. 18, 2017, entitled "System and Method for Analyzing Process Variation in a Virtual Fabrication Environment For Improved Process Integration", and U.S. Provisional Patent Application No. 62 / 631,022, filed Feb. 15, 2018, entitled "System and Method for Process Model Calibration in a Virtual Fabrication Environment". The entire contents of both of these applications are hereby incorporated by reference in their entirety.
Background Art
[0002] Integrated circuits (ICs) implement numerous functions of modern electronic devices. To make the development of ICs more efficient, semiconductor manufacturers regularly develop a common fabrication process, i.e., a "technology" (for the sake of simplicity in this description, the term "technology" may be used to refer to the fabrication process for the semiconductor device structure being developed), for use in the production of their integrated circuits.
[0003] Integrated device manufacturers (IDMs) and independent semiconductor foundries invest a great deal of resources in the development of an integrated series of process steps used to fabricate the chips (ICs) they sell from wafers (a wafer is a thinly sliced semiconductor material, often but not always composed of silicon crystals). The majority of resources are spent on the fabrication of experimental wafers, as well as related measurements, metrology (metrology refers to a special type of measurement performed in the semiconductor industry), and characterization structures, all of which are aimed at ensuring the production of the desired semiconductor device structure by an integrated process. These experimental wafers are used in a trial-and-error fashion to develop individual processes for device structure fabrication and also to develop the overall integrated process flow. Due to the increasing complexity of the process flow at advanced technology nodes, the majority of experimental fabrication runs end with negative or invalid characterization results. These experimental runs are long in duration, ranging from weekly to monthly within the "fab" (fabrication environment), and are also costly. Recent advancements in semiconductor technology, such as FinFET, TriGate, High-K / Metal-Gate, embedded memory, and advanced patterning, have dramatically increased the complexity of integrated semiconductor fabrication processes. The cost and duration of technology development using this trial-and-error experimental approach have also increased simultaneously.
[0004] Attempts have been made to use conventional mechanical computer-aided design (CAD) tools and special technology CAD (TCAD) tools with the aim of reducing the labor required for fabricating experimental wafers. General-purpose mechanical CAD tools have been found to be inappropriate because they do not automatically reproduce the processes of material addition, removal, and modification that occur in an actual fab. On the other hand, TCAD tools are physics-based modeling platforms that simulate changes in material composition that occur during diffusion and implantation processes. However, this platform does not simulate all of the effects of material addition and removal that occur during other processes that make up the integrated process flow. Usually, a 3D device structure is an input to TCAD, not an output. Furthermore, due to the amount of data and calculations required for physics-based process simulation, TCAD simulations are practically limited to very narrow regions on a chip and, in most cases, target only one transistor. In state-of-the-art semiconductor manufacturing technology, most of the challenges in integration involve interactions between processes that would be widely separated throughout the integrated process flow, as well as between various devices and circuits that include a set of technologies (transistors, registers, capacitors, memories, etc.). Structural defects that originate from both systematic and random effects usually limit the productization time of new process technology nodes. Therefore, in order to cover a wider range of issues and to model the entire integrated process flow in a structurally predictable way, modeling platforms and modeling approaches different from mechanical CAD or TCAD are required.
[0005] A virtual fabrication environment for semiconductor device structures provides a platform for performing semiconductor process development at a lower cost and faster speed than is possible with conventional trial-and-error physical experiments. In contrast to conventional CAD and TCAD environments, the virtual fabrication environment can virtually model an integrated process flow and predict the complete 3D structure of all devices and circuits including an entire set of technologies. Virtual fabrication can be described in its simplest form as combining a description of an integrated process sequence with a target design in the form of 2D design data (mask or layout) to create a 3D structure model that predicts the results expected from actual / physical fabrication progress. The 3D structure model includes the geometrically accurate 3D shapes of multiple material layers, implants, diffusions, etc. that make up a chip or a portion of a chip. Virtual fabrication is mainly done in a geometric manner, but the geometric arrangements involved follow the physics of the fabrication process. By performing modeling at an abstracted structural level (rather than a physics-based simulation), the construction of the structural model can be dramatically accelerated, enabling full-technology modeling at the circuit-level area scale. The use of a virtual fabrication environment thus provides rapid verification of process assumptions and visualization of the complex interrelationships between the integrated process sequence and 2D design data.
SUMMARY OF THE INVENTION
[0006] Embodiments of the present invention provide a virtual fabrication environment for semiconductor device fabrication that includes an analysis module for identifying key parameters and performing process model calibration and variability analysis. More specifically, for key parameter identification, the analysis module identifies process steps and / or parameters that most strongly affect the outcome of the fabrication process. In process model calibration, the analysis module adjusts process parameters to match a 3D model created in the virtual fabrication environment to measurements such as transmission electron microscopy (TEM) data from a physical fab, i.e., process targets. For variability analysis, the analysis module helps the user analyze and understand the variability of measurement data obtained for a group of virtual 3D models created in the virtual fabrication environment.
[0007] In one embodiment, a non-transitory computer-readable medium holds computer-executable instructions for identifying key parameters in a virtual semiconductor manufacturing environment. When executed, the instructions cause at least one computing device to receive, in a virtual manufacturing environment created by the computing device, a selection of 2D design data and a process sequence including a plurality of processes for a semiconductor device structure to be virtually fabricated. When executed, the instructions further cause the computing device to perform a virtual manufacturing progression for the semiconductor device structure based on a design of experiments (DOE) using the 2D design data and the process sequence. The virtual manufacturing progression constructs a plurality of 3D models. When executed, the instructions cause at least one computing device to receive one or more target user identifications for the semiconductor device structure and to execute an analysis module in the virtual manufacturing environment to identify one or more outliers among measurement data for the one or more targets in the plurality of 3D models created from the virtual manufacturing progression. When executed, the instructions further receive a user selection for adding or removing one or more of the identified outliers from the measurement data for the one or more targets in the 3D model, the selection being received through a user interface provided in the virtual manufacturing environment. When executed, the instructions further perform a regression analysis on the measurement data for the one or more targets by the analysis module after the addition or removal of the selected outliers from the measurement data, and identify one or more key parameters by the analysis module based on the results of the regression analysis. Identification information of the identified one or more key parameters is displayed or exported.
[0008] In another embodiment, a method for identifying key parameters in a virtual semiconductor manufacturing environment includes receiving, in a virtual manufacturing environment generated by a computing device, a selection of 2D design data and a process sequence including a plurality of processes for a semiconductor device structure virtually fabricated in the virtual manufacturing environment. The method further includes, by the computing device, performing a virtual manufacturing run for the semiconductor device structure based on a design of experiments (DOE) using the 2D design data and the process sequence. The virtual manufacturing run constructs a plurality of 3D models. The method further includes receiving a user identification of one or more targets for the semiconductor device structure and executing an analysis module in the virtual manufacturing environment to identify one or more outliers among measurement data for the one or more targets in the 3D models created from the virtual manufacturing run. The method also includes receiving a user selection for adding or excluding one or more of the one or more identified outliers from the measurement data for the one or more targets in the 3D models. The selection is received through a user interface provided in the virtual manufacturing environment. Further, the method includes, after adding or excluding the selected outliers from the measurement data, performing a regression analysis on the measurement data for the one or more targets by the analysis module and, based on the result of the regression analysis, identifying one or more key parameters by the analysis module. Identification information of the identified one or more key parameters is displayed or exported.
[0009] In one embodiment, the virtual fabrication system includes a computing device configured to form a virtual fabrication environment equipped with a processor and including an analysis module. The virtual fabrication environment receives a selection of 2D design data and a process sequence including a plurality of processes for a semiconductor device structure to be virtually fabricated, and performs virtual fabrication progress for the semiconductor device structure based on the 2D design data and the process sequence and an experiment design (DOE). The virtual fabrication progress constructs a plurality of 3D models. The virtual fabrication environment receives identification of one or more targets for the semiconductor device structure, executes an analysis module in the virtual fabrication environment to identify one or more outliers among measurement data for the one or more targets in the plurality of 3D models created from the virtual fabrication progress, and receives a user selection for adding or excluding one or more of the one or more identified outliers from the measurement data for the one or more targets in the 3D models. The selection is received through a user interface provided to the virtual fabrication environment. The virtual fabrication environment further performs a regression analysis on the measurement data for the one or more targets by the analysis module after adding or excluding the selected outliers from the measurement data, identifies one or more key parameters by the analysis module based on the result of the regression analysis, and displays or exports identification information of the identified one or more key parameters. The virtual fabrication system further includes a display surface communicating with the computing device. The display surface is configured to display a 3D structure model in a 3D view.
Brief Description of the Drawings
[0010] The accompanying drawings, which are incorporated herein and constitute a part hereof, illustrate one or more embodiments of the invention and, together with the description, help to explain the invention.
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[0034] Embodiments of the present invention provide a virtual fabrication environment for semiconductor device fabrication that includes an analysis module for identifying key parameters and performing process model calibration and variability analysis. However, before discussing key parameter identification, process model calibration, optimization, variability analysis, and other features provided by the embodiments, first, a representative 3D design environment / virtual fabrication environment in which the analysis module of the present invention may be incorporated will be described. [Representative Virtual Fabrication Environment]
[0035] FIG. 1 shows a representative virtual fabrication environment 1 suitable for implementing an embodiment of the present invention. The virtual fabrication environment 1 includes a computing device 10 accessed by a user 2. The computing device 10 communicates with a display 120. The display 120 may be a display screen that is part of the computing device, or a separate display device or display screen that communicates with the computing device 10. The computing device 10 may be a PC, laptop computer, tablet-type computing device, server, or any other type of computing device having one or more processors 11 and capable of supporting the operation of a virtual fabrication application 70, a 3D modeling engine 75, and an analysis module 79 (described further below). The (one or more) processors may have one or more cores. The computing device 10 may also include volatile and non-volatile storage such as, but not limited to, a random access memory (RAM) 12, a read-only memory (ROM) 13, and a hard drive 14. The computing device 10 may also include a network interface 15 to enable communication with other computing devices. It can be seen that the computing device 10 may be implemented not as a single computing device but as a computing system including a plurality of computing devices working in parallel or other combinations.
[0036] The computing device 10 may store and execute a virtual fabrication application 70 that includes a 3D modeling engine 75. The 3D modeling engine 75 may include one or more algorithms, such as algorithm 1 (76), algorithm 2 (77), and algorithm 3 (78), that are used to virtually fabricate a semiconductor device structure. The 3D modeling engine 75 may receive input data 20 to perform a virtual fabrication "process" that generates semiconductor device structure model data 90. The virtual fabrication application 70 and the 3D modeling engine 75 may form several user interfaces and views that are used to generate and display the results of the virtual fabrication process. For example, the virtual fabrication application 70 and the 3D modeling engine 75 may display a layout editor 121, a process editor 122, and a virtual fabrication console 123 that are used to initiate the virtual fabrication process. The virtual fabrication application 70 and the 3D modeling engine 75 may also display a table / graphical measurement result view 124 and a 3D view 125, respectively, for displaying the results of the virtual fabrication process and the 3D structure model generated by the 3D modeling engine 75 during the virtual fabrication of the semiconductor device structure. The virtual fabrication application 70 may also include an analysis module 79 for performing an analysis of the 3D model, as will be further discussed later.
[0037] The input data 20 includes both 2D design data 30 and a process sequence 40. The process sequence 40 may be composed of a plurality of process steps 43, 44, 47, 48, and 49. As further described herein, the process sequence 40 may also include one or more virtual metrology process steps 45. The process sequence may further include one or more sub-sequences including one or more of the above process steps or virtual metrology process steps. The 2D design data 30 includes one or more layers such as layer 1 (32), layer 2 (34), and layer 3 (36), which are typically provided in an industry-standard layout format such as GDS II (Graphical Design System version 2) or OASIS (Open Artwork System Interchange Standard).
[0038] The input data 20 may also include a material database 60 that includes records of material types such as material type 1 (62) and material type 2 (64), and the specific materials of each material type. Many of the process steps within the process sequence may refer to one or more materials within the material database. Each material has a name and some attributes such as color rendering. The material database may be stored in a separate data structure. The material database may have a hierarchy where materials may be grouped by type and subtype. Individual steps within the process sequence may refer to individual materials or parent material types. The hierarchy within the material database allows the process sequence that refers to the material database to be more easily modified. For example, in the virtual fabrication of a semiconductor device structure, multiple types of oxide materials may be added to the structure model during the process sequence. After a particular oxide is added, subsequent steps may have to change that material. If there is no hierarchy within the material database and a step to add a new type of oxide material is inserted into an existing process sequence, all subsequent steps that may affect the oxide material will also have to be modified to include that new type of oxide material. With a material database corresponding to the hierarchy, steps that act on materials of a particular class, such as oxides, may refer only to the parent material type rather than a list of materials of the same type. Then, when a step to add a new type of oxide material is inserted into the process sequence, there is no need to modify subsequent steps that refer only to the parent material type of oxide. Therefore, hierarchical materials make it easier to recover the process sequence from modifications. A further advantage of hierarchical materials is that inventories of process steps and process sequences that refer only to the parent material type can be created and reused.
[0039] The 3D modeling engine 75 uses the input data 20 to perform a sequence of operations / steps specified by the process sequence 40. As will be further described later, the process sequence 40 may include one or more virtual measurement steps 45, 49 that indicate points in the process sequence during virtual prototyping where measurements of structural components are to be made. The measurements may be made using locator shapes previously added to a layer in the 2D design data 30. Alternatively, the measurement locations may be specified by alternative means such as (x,y) coordinates in the 2D design data or by some other means of specifying locations within the 2D design data 30 instead of using locator shapes. The execution of the process sequence 40 during virtual prototyping generates virtual measurement data 80 and 3D structural model data 90. The 3D structural model data 90 may be used to generate a 3D view of the structural model of the semiconductor device structure, and this view may be displayed on the 3D viewer 125. The virtual measurement data 80 may be presented to the user 2 in the table / graphical measurement result view 124 after being processed.
[0040] For the success of integration technologies such as semiconductor devices, a large number of structural dimensions are essential, so it is essential to find the relationship between many interrelated process steps used to fabricate the device structure and the structure being formed. A structural modification caused by one step in the process sequence may affect the preceding and subsequent steps in that sequence, and a particular step may affect the structural dimensions in an unclear manner. The virtual prototyping environment enables the automatic extraction of structural measurement values from the device being created. The automatic extraction of measurement values is achieved by specifying the virtual measurement step in the process sequence at a point in the process where that measurement is essential. The locator shape for this virtual measurement can be added to a layer in the design data and specified by the virtual measurement step. The output data from this virtual measurement can be used to provide a quantitative comparison with other modeling results or with physical measurement values. The function of this virtual measurement is provided to extract physical critical dimensions at appropriate points within the integrated process flow during the processing sequence.
[0041] The function of providing virtual metrology measurements at specified locations within the device structure brings about a significant improvement compared to conventional physical fab measurement techniques. Typically, in-fab measurements are made on scribe lines adjacent to product dice, i.e., specific characterize structures fabricated on the cut edges. In most cases, these characterize structures need to be designed to accommodate the limitations of measurement techniques such as the optical spot size. Therefore, the characterize structures do not fully represent the actual structures on the product dice. Due to these differences, users of in-fab measurements generally face the challenge of inferring results regarding the product structure from measurements on the characterize structures. In a virtual fabrication environment, measurements can be added to any design layout at specified points within the process sequence, thereby providing much insight into the impact of interrelated process steps on the virtual structure model being built. In this way, the in-fab challenge of measuring characterize structures and inferring results regarding the product structure is eliminated.
[0042] Figure 2 shows a representative virtual fabrication console 123 for setting up the progress of virtual fabrication in a virtual fabrication environment. The virtual fabrication console 123 enables a user to specify a process sequence 202 and a layout (2D design data) 204 for a virtually fabricated semiconductor device structure. However, the virtual fabrication console may be a text-based script console, and such a console provides a means for the user to input script commands that specify the required inputs to start building the structure model or to start building a group of structure models corresponding to parameter value ranges for specific stages within the process sequence. The latter is regarded as a virtual experiment (to be discussed further later).
[0043] FIG. 3 shows a representative layout editor in a virtual fabrication environment. The layout editor 121 displays the 2D design layout specified by the user in the virtual fabrication console 123. In the layout editor, colors may be used to represent the various layers within the design data. The areas enclosed by shapes or polygons on each layer represent the regions on the wafer where the photoresist coating can be exposed to light or protected from light during the photolithography stage of the integrated process flow. The shapes on one or more layers may be combined (booleaned) to form the masks used in the photolithography stage. The layout editor 121 provides means for inserting, deleting, or modifying polygons on any layer and for inserting, deleting, or modifying layers within the 2D design data. Layers can be inserted for the sole purpose of including shapes or polygons indicating the locations of virtual metrology measurements. Rectangles 302, 304, 306 are added to the inserted layers (shown in different colors) to mark the locations of virtual metrology measurements. As described above, in addition to using locator shapes, other approaches for specifying the locations of virtual metrology measurements may be utilized in the virtual fabrication environment. The design data is used in combination with process data and material databases to construct a 3D structural model.
[0044] The inserted layers within the design data displayed in the layout editor 121 may include the inserted locator shapes. For example, the locator shape may be a rectangle, and its longer side may indicate the direction of measurement in the 3D structural model. For example, in FIG. 3, the first locator shape 302 may mark a double patterning mandrel for virtual metrology measurements, the second locator shape 304 may mark a gate stack for virtual metrology measurements, and the third locator shape 306 may mark the source or drain contact of a transistor for virtual metrology measurements.
[0045] Figure 4 shows a representative process editor 122 in virtual measurement. The user defines a process sequence in the process editor. The process sequence is a list that enumerates the process steps to be taken to virtually fabricate the structure selected by the user in order. The process editor may be a text editor where each line or each group of lines corresponds to one process step, or it may be a dedicated graphical user interface as shown in Figure 4. The process sequence may be hierarchical, which means that the process steps may be grouped into sub-sequences and sub-sub-sequences of sub-sequences. Generally, each step within the process sequence corresponds to an actual step within the fab. For example, a sub-sequence for a reactive ion etching operation may include steps of spin-coating a photoresist, patterning the resist, and performing the etching operation. The user specifies parameters suitable for the operation type for each step or each sub-step. Some of the parameters are references to materials in the material database and to layers in the 2D design data. For example, the parameters for an initial deposition operation are the material being deposited, the nominal thickness of the deposition, and the anisotropy, i.e., the growth ratio in the lateral direction versus the vertical direction. This initial deposition operation can be used to model an actual process such as chemical vapor deposition (CVD). Similarly, the parameters for an initial etching operation are the mask name (from the design data), the list of materials affected by the operation, and the anisotropy.
[0046] The process sequence may have hundreds of steps, and the process sequence may include sub-sequences. For example, as shown in FIG. 4, the process sequence 410 may include a sub-sequence 412 consisting of a plurality of process steps such as the selected step 413. The process steps may be selected from a library 402 of available process steps. For the selected step 413, the process editor 122 enables the user to specify all the required parameters 420. For example, the user may select a material from the material list in the material database 404 and specify the process parameters 406 for the use of that material in the process step 413.
[0047] One or more steps within the process sequence may be virtual measurement steps inserted by the user. For example, when the CD indicates a critical dimension, the insertion (414) of the step 4.17 "Measure the CD" into the process sequence 412 will enable virtual measurement to be made at that point during virtual fabrication using one or more locator shapes pre-inserted on one or more layers in the 2D design data. The direct insertion of virtual measurement steps into the fabrication sequence enables virtual measurement to be made at the significant points of interest during the fabrication process. Since many of the steps in virtual fabrication interact in the formation of the final structure, the function of determining the geometric properties of the structure, such as cross-sectional dimensions and cross-sectional area, at various points within the integrated process flow is of great interest to process developers and structure designers.
[0048] FIG. 5 shows a representative stage sequence in a virtual fabrication environment for generating virtual measurement data. The sequence begins with the user selecting the semiconductor device structure to be fabricated (step 502). The user may select from a plurality of available design data file groups and then select a rectangular region within the design data. For example, the user may select a FinFET or a passive resistor or a memory cell. Following the determination / selection of the structure to be fabricated, the user enters the process sequence into the process editor 122 (step 504a) and selects the 2D design data expected to result in the desired structure (step 504b). Optionally, the user may create or modify the design data in the layout editor 121. In the process editor, the user may insert one or more virtual measurement stages into the process sequence that specify points during virtual fabrication where the user would like virtual measurements to be made at specified locations within the evolving structure (step 506a). The user may insert the locator shape used to perform the measurement by the virtual measurement stage into the 2D design data displayed in the layout editor 121 (step 506b). The importance of the locator shape depends on the type of measurement requested. For example, the longer axis of a rectangle may indicate the direction and extent of a length measurement made with respect to the cross-section of the structure, or the rectangle itself may indicate the region where the contact area between two materials is measured. It can be seen that the steps in the process editor described above may both be performed before the steps in the layout editor in the virtual fabrication environment or vice versa.
[0049] One or more locator shapes are added to one or more layers within the 2D design data (step 506b), and after one or more virtual measurement steps are added to the process sequence (step 506a), the user sets up the virtual fabrication progress using the virtual fabrication console 123 (step 508). During virtual fabrication, the process steps within the process sequence 40 are performed in the order specified by the 3D modeling engine 75. When virtual fabrication reaches the virtual measurement step, a virtual "measurement" of the specified parts within the fabricated structure is performed. The calculations made by the modeling engine depend on the nature of the requested measurement and generally match similar physical measurement techniques within the fab. For example, critical dimension scanning electron microscope (CD-SEM) measurements within the fab find sidewalls by detecting rapid changes in the orientation of the top surface of the structure. Similarly, in the virtual measurement operation, the 3D modeling engine extracts the top surface of the structure within the area specified by the locator rectangle, examines the surface along the portion where it intersects the plane formed by the intersection of the long axis of the rectangle and the perpendicular axis, and searches for where the slope changes beyond a threshold (e.g., 5 degrees). Where the slope changes significantly forms the outer surfaces of features such as the bottom, top, and side surfaces of the ridges within the structure. Once the locations of the bottom, top, and side surfaces are established, the distance between the side surfaces of the feature at the vertical location (bottom, middle, or top) specified by the measurement step is calculated. As the 3D modeling engine constructs the structure model, it generates one or more types of output. One type of output is the structure model itself, which may include its state at one or more points in the process sequence. The 3D model may be displayed to the user in the 3D viewer 125 (step 512a). The 3D modeling engine also performs the export of the virtual measurement data (step 510). The virtual measurement data 80 may be exported to an automated data analysis tool for further processing, or may be displayed to the user through a user interface such as the tabular / graphic measurement result view 124 or other views (step 512b). If, when viewed or analyzed, the structure is satisfactory, the virtual fabrication progress ends (step 514).If the structure formed by the 3D modeling engine is not satisfactory, the user modifies the process sequence and / or the 2D design data (step 516), and a new virtual production run is set up (step 508).
[0050] FIG. 6 shows a representative 3D viewer 125 in a virtual production environment. The 3D viewer 125 may include a 3D view canvas 602 for displaying a 3D model generated by the 3D modeling engine 75. The 3D viewer 75 may display a saved state 604 within the process sequence and enable a particular state 606 to be selected and appear on the 3D view canvas. The 3D viewer provides functions such as zoom in / out, rotation, translation, cross-section, etc. Optionally, the user may activate a cross-sectional view in the 3D view canvas 602 and manipulate the location of the cross-section using a reduced top view 608.
[0051] Another type of output from the 3D modeling engine 75 is data generated by virtual measurement stages included in the process sequence. FIG. 7 shows a display of representative virtual measurement data 80 generated by a plurality of virtual measurement stages in a virtual production environment. The virtual measurement result data 80 may be displayed in tabular or graphical form, such as a two-dimensional X-Y plot or multi-dimensional graphics.
[0052] The techniques used in representative virtual production environments are geometry-based. Therefore, it is advisable to calibrate the process stage input parameters with the actual experimental results from physical production to make the virtual experiments more predictive. Such process stage calibration results in improved modeling accuracy for all structures including a set of techniques. Calibration can be performed for individual process stages from measurements, gaugings, or other physical characterization methods for the characterizing structure or product structure. Calibration can be done by comparing the results of the modeling including virtual measurement data with the corresponding measurements or gaugings performed in the physical fab (for the corresponding characterizing structure or product structure), and then adjusting the modeling parameters so that the virtually produced structure obtained as a result better matches the physically produced structure. With accurate calibration of the modeling process parameters, the virtual production environment becomes more capable of predicting the structures obtained as a result of physical production across the enabled design space.
[0053] FIG. 8 shows a representative sequence of steps for calibrating a process sequence in a virtual fabrication environment. The sequence includes steps that are performed in both the virtual fabrication environment and the corresponding physical fab environment. In the virtual fabrication environment, the user selects a process sequence to be calibrated (for a virtually fabricated structure) and identifies the relevant process parameters (step 802a). In the physical fab, the user identifies a group of characterize structures or product structures to be measured during fabrication progress (step 802b). Returning to the virtual fabrication environment, the user enters the process sequence into a process editor (step 804a), and 2D design data (layout) that defines the characterize structure is selected from the available 2D design data or created in a layout editor 121 for that purpose (step 804b). The same design data is used for virtual fabrication and actual characterization. As described above, the user inserts one or more virtual measurement steps into the process sequence (step 806a) and adds measurement locator shapes to the 2D design data (step 806b). The user sets up the virtual fab progress in a virtual fabrication console (step 808), and a 3D modeling engine constructs a 3D model, generates, and exports virtual measurement data (step 812a). In parallel with or offset from the virtual fabrication progress, the physical fabrication environment creates the characterize structures or product structures (step 810), and in-fab imaging and in-fab measurements are performed on these structures (step 812b). The user then uses a 3D viewer 125The 3D view of the generated virtual model in [description] may be compared with the in-fab image of the physical device structure (step 814a). Further, the set of measured values of the characterized structure may be compared with the virtual measurement values taken as a result of inserting a virtual measurement step into the process sequence (step 814b). In most cases, this comparison may be made by the user. However, alternatively, it may be made by an automatic data analysis tool based on predefined or interactively determined criteria. If a satisfactory match is found between the view and the image and between the virtual measurement results and the actual measurement values (step 815), the process sequence is considered calibrated (step 816). However, if no satisfactory match is found (step 815), the user modifies the value of the process parameter in the process editor (step 818), and a new virtual fabrication run is set up in the virtual fabrication console (step 808). The sequence is then repeated until a satisfactory match is reached and calibration is achieved.
[0054] It can be seen that several different parameters can be calibrated within the sequence. The above description refers to the use of inserting a virtual measurement step into the process sequence for virtual measurement and the use of one or more 2D locator shapes related thereto, but other techniques may also be utilized in the virtual fabrication environment. For example, virtual measurement may be performed on the virtual device structure after fabrication is complete and then compared with the physical measurement values taken for the characterized structure during / after the physical fabrication run.
[0055] Even constructing just one structural model can be beneficial, but virtual fabrication, which constructs multiple models, has further value. The virtual fabrication environment enables the user to create and conduct virtual experiments. In a virtual experiment, the range of values of process parameters can be explored. A virtual experiment may be set up by specifying a set of parameter values (not just one value per parameter) applied to individual processes throughout the process sequence. In this way, one or more process sequences can be specified. The 3D modeling engine 75 operating in virtual experiment mode then constructs multiple models across the entire set of process parameters and, throughout that, uses the virtual metrology operations described above to extract measurement data for each variation. This feature may be used to reproduce two basic types of experiments typically carried out in a physical fab environment. First, the fabrication process naturally varies stochastically (nondeterministically). As described in this book, the basically deterministic approach used for each virtual fabrication run can still predict nondeterministic results by performing multiple runs. The virtual experiment mode enables the virtual fabrication environment to perform modeling over the full statistical range of variation for each process parameter and for each combination of variations of many / all process parameters. Second, experiments conducted within the physical fab may specify a set of parameters that are intentionally varied when fabricating different wafers. The virtual experiment mode enables the virtual fabrication run to reproduce this type of experiment as well by performing multiple virtual fabrication runs for a particular variation of the parameter set.
[0056] Each process within a manufacturing sequence has its own unique variability. Understanding the impact of the collective process variability in complex flows is extremely difficult, especially when considering the statistical probabilities of combinations of variability. When virtual experiments are created, the process sequence is, in principle, described by combinations of numerical process parameters included in the process description. These parameters can each be characterized by their total variability (expressed as a standard deviation or sigma value) and thus by multiple points on a Gaussian or other suitable established distribution. If virtual experiments are designed and executed to examine all combinations of process variability (e.g., multiple points on each Gaussian such as ±3σ, ±2σ, ±1σ, and the nominal value of each parameter), the graphical and numerical outputs obtained from the virtual measurement stages within the sequence cover the full variability space of this technology. Each case in this experimental investigation is deterministically modeled by the virtual manufacturing system, but the collection of virtual measurement results contains a statistical distribution. Simple statistical analyses such as the root sum square (RSS) calculation of statistically uncorrelated parameters can be used to assign a total variability metric to each case of the experiment. Then, all virtual measurement outputs, including both numerical and graphical outputs, can be analyzed in light of the total variability metric.
[0057] In the implementation of normal trial-and-error experiments within a physical fab, the structure measurements resulting from the nominal process are targeted, and due to the total variation in these structure measurements, an overly large (conservative) margin (total structure margin) that must be accounted for in subsequent processes is specified, thereby explaining the process variation. In contrast, virtual experiments in a virtual fabrication environment can quantitatively predict the total variation envelope for structure measurements at any point within the integrated process flow. Then, the total variation envelope rather than the nominal value of the structure measurement can become the development target. This approach can guarantee an acceptable total structure margin throughout the integrated process flow without sacrificing the critical goals of the structure design. This approach of targeting total variation will result in a quasi-optimal (i.e., less aesthetically pleasing) nominal intermediate or final structure compared to the nominal structure that would have been produced by targeting the nominal process. However, since the envelope for total process variation is considered, which is more important in determining the robustness and yield of the integrated process flow, this quasi-optimal nominal process is not significant. This approach represents a paradigm shift in semiconductor technology development from an emphasis on the nominal process to an emphasis on the envelope of total process variation.
[0058] FIG. 9 shows a representative sequence of steps in a virtual fabrication environment for setting up and performing a virtual experiment to generate virtual measurement data for a plurality of semiconductor device structure models. The sequence begins with the user selecting a process sequence (which may be pre-calibrated to make the results more structurally predictable) (step 902a), and identifying / creating 2D design data (step 902b). The user may select process parameter variations to analyze (step 904a) and / or design parameter variations to analyze (step 904b). The user may insert one or more virtual measurement steps into the process sequence as described above (step 906a) and add measurement locator shapes to the 2D design data (step 906b). The user may set up the virtual experiment with the aid of an automatic parameter explorer 126, which is a dedicated user interface (step 908). A representative automatic parameter explorer is shown in FIG. 10, which displays a list of process parameters 1002, 1004, 1006 and the 3D models to be constructed along with their corresponding various parameter values 1008 and enables the user to vary them. The parameter ranges for the virtual experiment can be specified in tabular form. A 3D modeling engine 75 constructs the 3D model and exports virtual measurement data for review (step 910). The virtual experiment mode provides output data processing from all virtual measurement / measurement operations. Output data from the virtual measurement measurements may be aggregated into a useful form through syntactic analysis (step 912).
[0059] Through syntactic analysis and aggregation, subsequent quantitative and statistical analyses can be performed. A separate output data collector module 110 may be used to collect 3D model data and virtual measurement results from a series of virtual fabrication progressions that make up the virtual experiment and present them in the form of graphs and tables. FIG. 11 shows a representative tabular display of virtual measurement data generated by a virtual experiment in a virtual fabrication environment. The tabular display may show virtual measurement data 1102 collected during the virtual experiment and a list 1104 of the virtual fabrication progressions.
[0060] FIG. 12 shows a plot display of a representative two-dimensional X-Y graph of virtual measurement data generated by virtual experiments in the course of virtual fabrication. In the example shown in FIG. 10, the total variation of the shallow trench isolation (STI) step height due to changing three parameters in a previous stage within the process sequence is shown. Each diamond mark 1202 represents the progress of virtual fabrication. A variation envelope 1204 is also shown, and a conclusion 1206 is also illustrated that the downstream process module must accommodate a total variation of approximately 10.5 nm in the STI step height in order to achieve robustness through the incoming 6σ variation. The virtual experiment results can also be displayed in a multi-dimensional graph format.
[0061] Once the results of the virtual experiments are aggregated, the user can review the generated 3D model in a 3D viewer (step 914a) and review the data and metrics of the virtual measurement presented for each virtual fabrication progress (step 914b). Depending on the purpose of the virtual experiment, the user can analyze the output from the 3D modeling engine for the purpose of developing a process sequence that realizes a desired nominal structural model, or for further calibrating the process stage input parameters, or for optimizing the process sequence to achieve a desired process window.
[0062] The task of the 3D modeling engine 75 to construct a plurality of structural models corresponding to a range of parameter values (constituting one virtual experiment) requires a large number of numerical calculations and thus, if carried out on a single computing device, would take a very long time (days or weeks). To provide virtual fabrication of the intended values, the model construction for virtual experiments must be done several times faster than physical experiments. To achieve this goal with today's computers, it is necessary to utilize every opportunity for parallel processing. The 3D modeling engine 75 uses a plurality of cores and / or processors to carry out the individual modeling stages. Also, the structural models corresponding to different parameter values within the same group are completely independent and thus can be constructed in parallel using a plurality of cores, a plurality of processors, or a plurality of systems.
[0063] The 3D modeling engine 75 in the virtual fabrication environment may represent the structural model in the form of voxels. A voxel is basically a 3D pixel. Each voxel is a cube of the same size and may or may not contain one or more types of materials. Those skilled in the art will understand that the 3D modeling engine 75 may represent the structural model in other forms. For example, the 3D modeling engine may use a conventional NURBS-based solid modeling kernel as used in 3D mechanical CAD tools, provided that the modeling operations based on digital voxel representation are much more robust than conventional analog solid modeling kernels. Such solid modeling kernels generally rely on a number of heuristic rules to handle various geometric situations and the modeling operations may fail when the heuristic rules do not accurately anticipate the situation. Aspects of semiconductor structure modeling that cause problems for NURBS-based solid modeling kernels include ultrathin layers formed by deposition processes and the propagation of etching fronts that result in surface merging and / or fragmentation of geometric shapes.
[0064] The virtual fabrication environment enables the implementation of a multi-etching process that allows a 3D modeling engine 75 included in a process sequence to model a wide range of etching behaviors specific to the process and materials. The patterning operations in the process flow for high-density semiconductor devices are often carried out using plasma etching. Plasma etching is known by many different names such as dry etching, reactive ion etching (RIE), inductively coupled plasma (ICP) etching, etc. A wide range of operating conditions and chemicals enable the process engineer to finely tune the plasma etching behavior and selectively realize diverse etching physics in multiple different material classes. This behavioral flexibility is the key to realizing the desired 3D structure during patterning across several material layers. Usually, several different types of physics are involved including but not limited to chemical etching, sputtering, deposition or redeposition of polymer materials, electrostatic charging, electrostatic focusing, and shadowing. This diverse range of physics produces an equivalent range of etching behaviors and thus structural shapes.
[0065] Directly simulating the physics involved in plasma etching with sufficient accuracy is very difficult and slow. The multi-etching process stage avoids the physics-based simulation problem by simulating plasma etching using a reduced set of parameter groups of etching type and behavior parameters specific to the material being etched. This enables capturing a wide range of physical etching behaviors without the need to directly simulate the physics of the etching process. For example, three major types of etching behaviors, namely isotropic, tapered, and sputtering, can be simulated. Optionally, a fourth type of etching behavior, namely shadowing, can also be simulated.
[0066] The basic (isotropic) behavior is caused (physically) by chemical etching, as a result of which the material is etched at the same rate in all directions regardless of the local orientation of the etchable surface from a point on that etchable surface. The basic behavior may be modeled by a single input parameter, the "side ratio", which controls the ratio of the lateral direction to the vertical direction. For example, a side ratio value of 1 (1.0) indicates that the etching rate is uniform in all directions. A side ratio less than 1 indicates that the etching rate in the lateral direction (on a vertical surface) is slower than the etching rate in the vertical direction (on a horizontal surface).
[0067] The tapering behavior is caused (physically) by a combination of directional etching behavior and polymer deposition. Polymer deposition occurs as a secondary effect of the directional etching process. During a directional etching process that etches a horizontal surface much faster than a vertical surface, polymer can accumulate on surfaces that are close to vertical. This competition between etching and deposition results in a tapered sidewall profile. The tapering behavior may be modeled by a single input parameter, the tapering angle. The tapering angle describes the critical angle at which the balance between the deposition rate and the etching rate is maintained. An optional second parameter, the side ratio, has the same meaning as defined above for the basic behavior.
[0068] The sputtering behavior refers to the direct physical removal of material through the impact of energetic ions, as a result of which protruding edges (convex edges) and in some cases corners are preferentially removed. Sputtering may be modeled by two parameters, namely the angle of maximum sputtering yield and the sputtering rate relative to the vertical etching rate.
[0069] Shadowing refers to the reduction of the directional ion beam caused by local height variations, and in some structures effectively reduces the etching rate. This effect can sometimes be significant, resulting in varying etching rates for each cell location. Shadowing may be modeled using a single parameter to describe the incident angle of energetic ions relative to the vertical axis.
[0070] For the modeling of multi-material and multi-physics etching, the input parameters described above need to be formulated into appropriate numerical modeling algorithms in a virtual fabrication environment. The numerical modeling algorithms include single-material velocity functions and multi-material velocity functions, and surface evolution techniques. The single-material velocity function defines the etching rate as a function of the local surface orientation (i.e., the surface normal direction) and is empirically determined to produce the desired etching behavior. It should also be noted that the single-material velocity function may combine multiple types of etching behaviors. For example, tapered etching and sputter etching may both include parameters related to basic (isotropic) etching. The multi-material velocity function is a combination of single-material velocity functions and calculates the local etching rate as a function of both the local surface orientation and the local material type. The etching ratio parameter defines the relative etching rate of the etchable materials and is a multiplier for the single-material velocity.
[0071] Once the velocity function is defined, an appropriate surface evolution technique may be used to find and evolve the position of the etchable surface in three dimensions. The etchable surface is advected or moved in its local normal direction according to the local scalar velocity determined by evaluating the velocity function. The scalar velocity must be calculated at the point of interest on the etchable surface and must be recalculated periodically as the geometry of the etchable surface evolves.
[0072] Multiple different types of surface evolution techniques may be utilized by a numerical algorithm for simulating a multi-etching process in a virtual fabrication environment. The moving surface may be represented using any suitable numerical spatial discretization. An explicit front-tracking method may be used, examples of which include the string method, the point-and-line method (2D), and the polygonal surface (3D). Alternative implicit surface representations such as distance fields, liquid volumes, or voxels may also be used. Any suitable time-dependent numerical technique may be used to advance the moving surface over time.
[0073] A selective epitaxial process may be included in the process sequence used to virtually fabricate a semiconductor device structure. The selective epitaxial process virtually models the epitaxial growth of a layer of crystalline material on the surface of a crystalline substrate of the semiconductor device structure. Selective epitaxy is widely used in current semiconductor process flows, often for the purpose of applying mechanical stress to transistor channels to improve performance. A key characteristic of epitaxial growth is its dependence on crystal orientation. Semiconductor devices are typically fabricated on single-crystalline silicon wafers, i.e., on silicon material in which atoms are arranged in the form of a repeating crystal lattice structure that covers most of the wafer without interruption. The silicon crystal structure is anisotropic (i.e., not symmetric in all directions), and the silicon surface is more stable in several specific crystal directions. These directions are defined by the major crystal plane groups identified as <100>, <110>, and <111> using Miller indices and have the strongest influence on growth characteristics. By varying the pressure, temperature, and chemical precursors in the epitaxial process, engineers can control the relative growth rates of the three major planes. For example, the growth rates on non-major planes such as <211>, <311>, <411>, etc. also change, but such changes often have little influence on determining the final shape of the epitaxially grown structure.
[0074] A virtual fabrication environment can use a surface evolution algorithm to model epitaxial growth. A surface where epitaxial growth is occurring (the growth surface) is advected or moved according to a scalar advection velocity. The growth rate is calculated at a selected point based on the local surface normal direction and fixed input parameters, and is local in both distance and time, moving the surface in its normal direction. The growth surface may be represented using any suitable numerical spatial discretization. An explicit front-tracking method may be used, examples of which include the string method, the point-and-line method (2D), and polygonal surfaces (3D). Alternative implicit surface representations such as distance functions, volume fractions, or voxels may also be used. Any suitable time-dependent numerical technique may be used to advance the moving surface over time.
[0075] The selective epitaxial process in a virtual fabrication environment uses the growth rates of three major plane groups <100>, <110>, and <111> as fixed input parameters. These input parameters define the growth rate at a surface that matches any of the relevant planes. Further input parameters include the growth rate on adjacent amorphous materials. The relationship between the 3D modeling coordinate system and the crystal lattice of the wafer may also be considered when calculating the epitaxial growth rate. The 3D modeling coordinate system typically uses the same X and Y axes as the 2D design data, and the Z axis is typically perpendicular to the surface of the wafer. Alternative coordinate systems may be utilized. On an actual wafer, the orientation of the crystal lattice is indicated by a "flat" or "notch" on the edge of the wafer, which is otherwise circular. The notch is used as a reference for orienting the 2D design data in a desired direction relative to the crystal lattice. Input parameters specifying the notch (or flat) type and direction can define the orientation of the crystal lattice and the associated crystal planes of the wafer relative to the 2D design data. It should be noted that this relationship can be described as a coordinate transformation between the 3D model coordinate system and the coordinate system of the crystal lattice.
[0076] By using the growth rate in the main plane group and knowing the orientation of the crystal lattice, the epitaxial growth rate can be calculated at any location on the growth surface. Among the growth surfaces, the regions where the normal direction matches the main plane direction are assigned the velocity of that main plane. In the case of regions on the growth surface that do not match the main plane direction, it is necessary to find an appropriate velocity by interpolating between adjacent main plane directions. Furthermore, the behavior of epitaxial growth at the boundaries of the crystal material can also be important. Epitaxial growth is often carried out after several preprocessing steps in which the amorphous material is deposited and patterned. These amorphous materials may be adjacent to the crystal material and, therefore, may be very close to the epitaxial growth. Examples of adjacent amorphous materials include silicon dioxide, silicon nitride, or any other material common in semiconductor processing. Epitaxial growth may, in some cases, slowly creep along (overgrow) the adjacent amorphous material, or it may not. The overgrowth behavior may be modeled by a fixed input parameter that defines the group of adjacent materials (overgrowth materials) where overgrowth occurs and the rate at which the growth surface creeps along the overgrowth material. The overgrowth rate modifies the epitaxial growth rate on the surface of the overgrowth material so that the growth surface moves at a specified rate along the overgrowth material. Also, the rate at which the growth surface moves along the overgrowth material may depend on the angle between the overgrowth material surface and the growth surface. If the angle between the two surfaces is greater than the threshold angle, the overgrowth rate may be ignored.
[0077] Design rule checking (DRC) or optical rule checking (ORC) may be performed in a virtual fabrication environment. DRC and ORC have typically been performed on 2D design data by dedicated software as part of the process of preparing 2D design data for conversion to a photolithography mask. Such checks are performed for the purpose of identifying layout errors that would result in non-functional or poorly functioning chips. The checks are also performed after adding compensation for optical effects such as optical proximity correction (OPC). Normal design rules (published in design manuals, codified and entered into the DRC deck) are basically intended to prevent problems of a 3D nature. However, as the complexity of semiconductor process technology increases, design manuals have grown to thousands of pages in length, with thousands of 2D design rules to systematize and explain. In many cases, one 3D failure mechanism / concern can activate hundreds of 2D design rules. The development of these 2D design rules requires significant assumptions regarding the 3D characteristics of the integrated process flow and the resulting structure.
[0078] 2D DRC is developed from relatively simple calculations that can make the design overly conservative. For example, consider a 2D design rule that requires ensuring a minimum contact area between a line on a metal interconnect layer and a lower via. A via is a vertical conductive connector between two interconnect layers, also called metal layers, or a vertical connector between an interconnect layer and a device such as a transistor, resistor, or capacitor.
[0079] To meet the very simple criterion, described in 3D, that the contact area between the metal wiring and the via must not exceed a specified threshold, many additional 2D DRCs are required. The situation of 2D DRC becomes even more complex when considering multiple manufacturing variations that can affect the contact area, such as excessive or insufficient exposure during the lithography stage, misregistration of the mask, planarization of the via layer (through chemical mechanical polishing (CMP)), and tapering of the sidewalls caused by plasma etching. It is impossible to include all of these statistical variations in the simple formula that drives 2D DRC, and thus the DRC becomes more stringent than necessary to prevent manufacturing variations. These overly stringent 2D DRCs risk making the design sub-optimal with wasted areas on the die.
[0080] In contrast to the 2D DRC environment, the virtual manufacturing environment can perform checks such as minimum line width, minimum space between features, and minimum contact area directly in 3D without making assumptions about the 2D-to-3D conversion. The checks performed directly in 3D are referred to in this book as "3D DRC". One advantage of 3D DRC is that the number of checks required is significantly less than that required in a 2D environment. As a result, the checks are more robust and easier than 2D checks. Furthermore, due to the significantly smaller number of rules that make up the 3D rule set, the virtual fabrication environment can perform checks for a certain range of statistical variations in process parameters.
[0081] 3D-DRC is also distinguished from virtual measurement / gauging operations that can be performed in a virtual fabrication environment. Virtual measurement gauging operations mimic the actual measurement and gauging operations in the fab, and by doing so, a measurement location is specified and a metric such as a distance value or area is output. On the other hand, in the case of 3D DRC, geometric criteria are specified and the location and value of the criteria are sought. In short, the location is an output rather than an input of the 3D DRC operation. For example, while a virtual measurement operation can specify an oxide film thickness measurement at a specific location indicated by a locator in 2D design data, 3D DRC for minimum layer thickness can request any (one or more) locations in the 3D model where the oxide film thickness is less than a specified threshold. The 3D structure model may then be searched to examine locations where the specified minimum dimension criteria are met. Similarly, in 3D DRC, the structure model may be searched to examine whether the maximum dimension criteria are met. This type of 3D DRC thus provides the advantage of identifying the cause of an unexpected failure, which could not be obtained with virtual measurement / gauging operations.
[0082] Examples of 3D-DRC are as follows. · Electrical net shielding: Find the shortest distance between selected conductors. A conductor is an aggregate made of one or more conductive materials (an "aggregate" is a (technically three-dimensional) discontinuous volume region in the 3D structure model. The aggregate may be made of a single material or multiple materials). · Shortest separation: Find the shortest distance between any one pair of aggregates within a selected group of aggregates. · Minimum line width: Find the shortest distance that cuts through any aggregate within a selected group of aggregates. · Minimum layer thickness: Find the shortest distance that cuts through any aggregate within an aggregate collection that makes up a material layer. · Minimum contact area: Find the minimum contact area between all pairs of selected aggregates.
[0083] The assembly may be selected based on (one or more types of) constituent materials, electrical conductivity, or other properties. Each check of the 3D DRC check can be extended by specifying a threshold value. For example, by specifying a threshold value for the minimum line width check, a list of locations where the minimum line width is less than the threshold value is generated. Those skilled in the art will understand that other checks of this nature may be defined. [Analysis Module]
[0084] In one embodiment, the virtual fabrication environment includes an analysis module. The analysis module is designed to mimic the workflow in the use cases encountered by semiconductor process integrators. Representative use cases encountered by semiconductor process integrators and addressed by the analysis module include, but are not limited to, key parameter identification, process model calibration, and variability analysis. In key parameter identification, the analysis module may find the process steps / parameters that most strongly affect the output (such as calibration and defect modes). In process model calibration, the process parameters may be adjusted to match the 3D model to measurement results from a physical fab including, but not limited to, transmission electron microscopy (TEM) data or process targets. In variability analysis, the analysis module may assist the user in analyzing and understanding the variability of the measurement data obtained for a group of virtual 3D models in ways including, but not limited to, estimating the variability of structural or electrical parameters for specification limit setting.
[0085] The analysis module described in this document may generate process variations through an experimental design or Monte Carlo simulation applied to parameters and settings in a semiconductor manufacturing environment, and then perform automated statistical analysis, optimization, and visualization for the user. The data being analyzed includes the settings of the input process parameters, as well as the measurements and structures evaluated on the 3D virtual semiconductor structures created in the virtual fabrication environment. Exploration, including, but not limited to, DTC checks and electrical analysis. Embodiments utilize statistical methods selected and customized to address and solve problems characteristic of virtual semiconductor fabrication, correcting errors that can occur when exporting result data to conventional third - party statistical tools.
[0086] The unique way in which the virtual semiconductor fabrication environment of the present invention constructs a 3D model does not give rise to certain common problems that other experimental design methods have to address. Thus, embodiments also provide a more efficient technique for experimental design. For example, if the deck and parameter settings are not changed, the same 3D model is generated every time in the virtual semiconductor fabrication environment. Therefore, there is no random element in the 3D model output, and the three common tasks of randomization, replication, and blocking in experimental design do not need to be performed.
[0087] In one embodiment, an analysis module is incorporated into the virtual fabrication environment, obtaining enhanced new functionality not available with third - party statistical solutions. In one embodiment, the UI and algorithms are organized by use case, and the user may follow a step - by - step UI flow from the left for each use case. This design can strongly guide the user (who may not have received statistical training) to follow the appropriate analysis steps without making mistakes in the analysis. The analysis module may also include a statistical analysis engine that utilizes a series of analysis algorithms to appropriately analyze each specific use case. The analysis module can solve problems such as multicollinearity and outliers (described later) that are not appropriately addressed by third - party statistical software, and avoid the use of unnecessary methods such as randomization during experimental design, as described above. The results of the analysis may be provided to the user or to third - party software in several formats.
[0088] Figure 13 shows a representative analysis flow in a representative embodiment. Inputs to the analysis module include, but are not limited to, the selection of an analysis type that can be compiled by a use case (e.g., key parameter identification, optimization, calibration, variability analysis). Further representative inputs include the process parameters of interest (e.g., specified as nominal values and / or ranges), and the targets of interest (e.g., measured values, structure Exploration , DTC check, electrical analysis values). In one embodiment, the input values may be references to 3D model files. The analysis module may create a progress list to set up an experimental design of experiments (DOE) (e.g., screening DOE, full factorial DOE, Monte Carlo simulation), and subsequently execute the progress list, and may use cluster computing to enhance efficiency during execution. The output from the execution may include outlier detection results and statistical analysis results, such as determining the significance / ranking of parameters. The output may also include investigation graphs (e.g., bivariate plots, response surfaces) and indirect optimization. In one embodiment, the results may be exported to a third-party tool for further analysis. [Key Parameter Identification]
[0089] A representative use case of one embodiment using the analysis module described in this document is key parameter identification. In key parameter identification, the analysis module receives a user selection of a deck containing a 2D layout and process steps. The purpose of the key parameter identification use case is to determine which parameters are related to and affect the target. These parameters are then ranked to indicate their relative importance. In one embodiment, the use case has seven steps.
[0090] 1) Select an experimental design.
[0091] 2) Select the parameters to vary and input the levels selected by the user into the plan.
[0092] 3) Create and proceed with the plan (export if necessary).
[0093] 4) Select the measurement target.
[0094] 5) Set the regression options.
[0095] 6) Select the identified outliers for addition to or exclusion from the DOE result data.
[0096] 7) Proceed with the regression and view the results. Identify important / key parameters.
[0097] In this embodiment, the first step is to select an experiment plan (DOE), also called an experimental design. DOE is a method for calculating the number of experiments with specific combinations of parameter settings so that more information can be obtained from fewer experimental operations. The analysis module provides three ways: a full factorial plan, a definitive screening design (DSD), and a Monte Carlo simulation, as ways to create an experiment plan for sampling the parameter space. FIG. 14A shows a representative UI 1400 provided in a virtual manufacturing environment for performing a selection 1402 of the type of experiment plan.
[0098] The full factorial plan is the most typical experiment plan. All possible combinations are created. The full factorial plan is optimally used when the number of parameters is small, such as approximately 2 to 7. For each selected parameter setting, the user inputs the number of levels and the values for these levels through the UI. In one embodiment, up to 10 levels can be input for each parameter setting.
[0099] A Deterministic Screening Design (DSD) is used when the number of parameters is large or the cost (time) of progression is high (long). This design has far fewer runs than a full factorial design for the same number of parameters. Embodiments employ this method augmented by DSD only when the variables are continuous. In one embodiment, only three levels are specified for each parameter for DSD.
[0100] Monte Carlo simulation is a DOE option that enables generation of random parameter settings using a normal distribution or a uniform distribution. In one embodiment, the UI enables the user to input the mean and standard deviation for normal distribution parameters or the minimum and maximum values for uniform distribution parameters, and random values are generated accordingly. In one embodiment, the user may also input the desired number of runs.
[0101] FIG. 14B shows a representative UI 1410 in one embodiment where the user can specify the variable levels for each parameter in the design. FIG. 14B shows a screen for parameter selection in a full factorial design. The left pane includes a list 1412 of the parameters in the deck. Each parameter can be selected and added to the right pane. On the right, the user inputs the desired number of levels 1414 and the values 1416 for each level. For example, if three parameters are selected and each parameter has three levels, two levels, and four levels respectively, then 3×2×4 = 24 runs can occur.
[0102] In one embodiment, a DOE created in a previous stage is run in batch mode by a virtual semiconductor manufacturing environment, and a 3D model is generated for each run in the DOE. The DOE may be exported to a csv or other type of file.
[0103] In the fourth stage of the key parameter identification workflow, a measurement target may be selected by the user in order to obtain measurement results for the 3D model generated by the DOE. A representative UI 1420 for performing the selection 1422 of the measurement target is shown in FIG. 14C.
[0104] To perform key parameter identification, a regression model is constructed in the fifth stage of the workflow. In a representative embodiment, in FIG. 14D, the UI 1430 enables the user to select 1432 whether to construct a regression model with only the main effects (first parameters) or a full quadratic model. In another embodiment, the type of regression model is automatically selected. In one embodiment, any type of regression model is provided as a default option and may be changed by the user. In another embodiment, additional options may be provided for more knowledgeable users. These additional options 1434 include rounding for collinearity testing and two entry / exit p-value roundings for stepwise linear regression. Collinearity testing enables the proper handling of multicollinear variables and the proper identification and elimination of outliers from statistical analyses performed within a virtual semiconductor manufacturing environment. Multicollinearity occurs when two or more predictors / independent variables in a multiple regression model are highly correlated such that one can be predicted from the other with high accuracy. Fitting a quadratic model often results in multicollinear variables, and the embodiments address this issue, as further described below.
[0105] One or more 3D models among the group of 3D models created from the experimental plan may have a target (such as a metric or CD) that contains data values that are not normal from some perspective and can have an adverse effect or interference on proper statistical analysis. The analysis module identifies outliers for the user. In a representative embodiment, in FIG. 14E, the UI 1440 enables the user to make a selection from among the identified 1442 to determine which should be omitted from the target data when performing statistical analysis. There are four types of outliers tested for the target at this stage. Empty cell - If the process fails (if there is no 3D model that can be constructed), an empty data cell is returned for that target. This type of process is automatically displayed as an outlier to be excluded during statistical analysis and cannot be restored by the user. NOVAL - If the process is completed but the target measurement result cannot be calculated, the literal value "NOVAL" is returned. This type of process is automatically displayed as an outlier to be excluded during statistical analysis and cannot be restored by the user. Constant value - Multiple values for a certain target may be the same. If many results for a certain target are the same, this interferes with or distorts statistical modeling. The target data is tested by comparison with the median to check if a certain amount of data, such as 50% or more of the data, is the same / constant. These processes are excluded. If all target data is the same, an error is reported. Statistical outliers - These are data points that are sufficiently far from the center of the data and would need to be excluded from the analysis. To statistically test whether each data point is an outlier, the Median Absolute Deviation (MAD) method may be used. Assuming MAD = Median(|x - Median(x)|), a robust equivalent to the standard deviation can be calculated as SM = 1.4826 × MAD. (By default, when K = 3, corresponding to 3 standard deviations), data values exceeding MAD ± K × SM are considered outliers and may be displayed as such for the user to view. In one embodiment, the user may return any of these outliers back into the analysis. Note that the measured data may also have outliers that are not a problem when using the types of plans discussed in this document, i.e., DSD, full factorial plans, or Monte Carlo simulations. This is because, by definition, these data points are within the range unless the user made an input error or other mistake when setting the levels / ranges.
[0106] Following the exclusion of outliers, several types of statistical analysis may be performed on the data for the target. For example, in one embodiment, the analysis module may create input parameters for a regression model (quadratic / cross terms as selected). This enables fitting a basic curvilinear relationship between x parameters and the target y. A set of variables X fits a linear regression model, and the equation can be expressed in linear algebra notation as X × b = y when X is an n-row (progress) × k-column (variables) matrix. In one embodiment, the analysis module may also perform a multicollinearity check for every possible pair of input variables, calculate the correlation coefficient r, and can exclude one parameter with |r| > 0.9 for each pair (this cut-off can be adjusted by the user). This corrects the multicollinearity problem in most cases.
[0107] In one embodiment, the analysis module can also perform an indeterminate matrix check to check whether X is underdetermined (k > n). If there are more variables than data points (progress), there is not enough data to find a unique regression solution using the normal equations (the algorithm fails to return an answer). There are two solutions: 1) remove variables (use only the main effects instead of the full quadratic model), or 2) use a method such as principal component analysis. In one embodiment, the first type of solution is applied by the analysis module to remove variables. If k > p, the quadratic and interaction terms are excluded and checked again. If X is still column determined, regression cannot be performed and an error is returned to the user.
[0108] The analysis module may further perform several checks on the data. After outlier removal, depending on the plan and its size selected by the user, there may not be enough progress left to impede regression. In one embodiment, the check is to determine whether the number of progressions n is < 10. If n < 10, there is not enough data and an error is returned to the user.
[0109] In one embodiment, the analysis module may perform stepwise linear regression. A forward approach may be used, in which the initial model contains only the intercept (weight β 0 ), and all variables are tested for statistical significance to see if any should enter the model. For example, if a variable such as variable x 3 is selected, all the remaining variables are tested to see if they should be incorporated into the new model. This process continues until there are no variables that meet the inclusion criterion (p-value < 0.05, user adjustable). Variables within the model are also tested to see if they should be excluded (p-value > 0.10, user adjustable).
[0110] In one embodiment, the analysis module may also perform a calculation of relative importance in order to identify key parameters. If a model is generated by two or more statistically significant parameters, a new linear regression is calculated using only these variables, but after automatic scaling. To automatically scale the variables, the mean of the variables is subtracted from all data points, and then the resulting value is divided by the original standard deviation of the variable. This makes all variables have a mean of 0 and a standard deviation of 1. The reason for doing this is the scale variation. One variable may be in the range from 0 to 1, while another variable may be in the range from 50 to 80. The importance (weight magnitude, β value) in the regression is affected by the scale variation. If one wants to know which variable is more important by examining the β value, the variables in the regression model need to be transformed so that they have the same variance, which is achieved by automatic scaling.
[0111] The results may be presented to the user through the user interface 1450 in a number of different formats including, but not limited to, the annotated plot 1452 and table 1454 shown in FIG. 14F. The plot is a plot of predicted target vs. actual target. In one embodiment, the plot may be annotated with r2 (the coefficient of determination, which ranges from 0 to 1 and indicates the proportion of target variance explained by the model), root mean square error (RMSE, a measure of prediction accuracy), and n (the number of data points / actual runs used in the regression model). In one embodiment, the output table 1454 of the regression results may have five columns, as shown in greater form in FIG. 14G. Column 1 is the parameter name, which are the names of the first variables, and also the names of the quadratic and interaction terms if any. Column 2 is the p-value for the significant variables, column 3 is the regression weight (β), column 4 is the relative weight. The regression weight (β) for the regression is calculated by the variables that have been auto-scaled. These can be used to rank the significant parameters. For example, the aspect ratio, which is parameter Etch4, will be determined to be more important than the etch rate, which is Etch1, when the relative importance is calculated. Column 5 is the status. In one embodiment, there are four possible results, namely, not significant, significant, highly collinear and excluded, and underdetermined and excluded. In one embodiment, significant parameters have a non-zero weight and a scaled importance indicating how important a given process parameter is for the selected measurement.
[0112] This approach to key parameter identification is further summarized in FIG. 15. FIG. 15 shows the sequence of steps implemented to identify key parameters in a representative embodiment. The sequence begins with the receipt of user identification of a deck (layout data and process steps) by a virtual fabrication environment (step 1500). Next, multiple virtual fabrication runs are performed for a DOE for the semiconductor device of interest (step 1502). In one embodiment, the user selection of the type of DOE and the selection of further DOE-related inputs are received through a user interface provided in the virtual fabrication environment. Alternatively, in another embodiment, the type of DOE and the DOE parameters are automatically selected by the virtual fabrication environment. A user selection of a target (e.g., measurement measurement, structure Exploration , DTC check, and / or electrical analysis) is received (step 1504), and the analysis module identifies outliers in the target data generated by the virtual fabrication runs as described above (step 1506). The identified outliers are displayed for the user to see, and then a user selection to return one or more of the outliers to the target data or to exclude the outliers from the target data is received through the provided user interface (step 1508). The adjusted target data after the determination of the outliers is then used by the analysis module to perform a regression analysis to identify one or more key parameters for the DOE (step 1510). The display of the identified key parameters (e.g., list, plot, chart) is then shown to the user, or the identified key parameters may be exported to a third-party application for further processing (step 1512).
[0113] The parsing module may also perform process model calibration. In process model calibration, in order to match the virtual 3D model created from the virtual fabrication progress with the physical semiconductor created in the physical fabrication environment, the stage parameters and settings in the virtual fabrication environment are adjusted. Once calibration is done, the parameters and their settings in the virtual semiconductor fabrication environment may be changed to introduce changes to the 3D model and to provide insights into which process changes improve various semiconductor characteristics. In one embodiment, a wizard user interface is provided to guide the user all the way through the process of optimizing the virtual 3D model to match the physical semiconductor. The user selects the (one or more) measurement targets and their (one or more) desired values, weights the importance of the targets if there are multiple targets, sets the boundaries of the parameters, conducts one or more trials, and receives the optimized parameter values and the corresponding measurement target results.
[0114] Conventional virtual fabrication environments that attempt to calibrate and adjust process parameters lack the system-level elements that enable proper process model calibration. Further, many semiconductor process integration engineers have little or no knowledge of statistics. As a result, these engineers perform process model calibration by adjusting parameters in a primitive trial-and-error fashion, typically using a one-factor-at-a-time (OFAT) approach. This approach is time-consuming and of low quality even if some solution is found. The OFAT approach is a gamble that the optimal parameter set will not be found because it does not take into account the effects of interactions between parameters.
[0115] To address these issues, embodiments use an analysis module incorporated in a virtual fabrication environment to provide automated statistical analysis, optimization, and visualization for users (e.g., semiconductor process integrators who may have limited or no knowledge of statistics). More specifically, embodiments provide a programmed approach to solve calibration problems without confusing engineers inexperienced in statistics. The statistical analysis engine within the analysis module uses a set of analysis algorithms to analyze each specific use case with minimal user input. In one embodiment, the user interface (UI) is a wizard designed to strongly guide the user through the appropriate analysis steps. The wizard is organized by use case and may follow a step-by-step UI flow from left to right for each use case.
[0116] An example of a workflow for process model calibration implemented in a representative embodiment is shown in FIG. 16. The sequence begins with the virtual fabrication environment receiving an identification of a deck (layout data and process steps) that serves as the basis for creating a virtual 3D model of the semiconductor device under consideration. In most cases, the deck is read according to user selection / specification provided through the UI provided to the virtual fabrication environment. The UI receives user identification for one or more measurement targets on the 3D model that the user desires to match with measurement targets on the corresponding physical semiconductor (step 1602). Targets include, but are not limited to, values related to measurements, structures, DTC checks, electrical analysis, etc. that are evaluated on the virtual semiconductor structure. In another embodiment, the deck may be programmatically selected without user input. Exploration Next, parameters (key parameters) that are important and should be adjusted to match the 3D model target values to the experimental data are determined (step
[0117] 1604). 1604)。In one embodiment, this determination is made through the key parameter identification process performed by the analysis module as described above. Alternatively, in another embodiment, the key parameters may be manually selected by the user through the UI.
[0118] The sequence continues by receiving (step 1606) user specifications of desired values (DVs) for each target through the UI. The DVs may be the distance obtained from the TEM, or the quality of the match between the cut-out 3D model and the overall TEM, or the optical spectrum, but are not limited thereto. Relative weights are applied either by default or as indicated by the user. For example, in the case of two targets A and B, target A may be weighted as being twice as important as target B if the user desires.
[0119] The sequence continues by receiving (step 1608) user specifications of each parameter to be adjusted in the calibration by the user setting lower and upper limits. The optimization algorithm provided to the analysis module maintains the parameters within these boundaries while it is repeatedly applied towards the solution.
[0120] The analysis module then executes the optimization algorithm (step 1610). The optimization algorithm may perform indirect or direct optimization, both of which are further described below. In one embodiment, the user may have options to select or specify the number of iterations, the convergence tolerance, the type of scoring function (L-2 or L-1), the number of trials, etc. In some embodiments, for multiple trials, random parameter starting values within a pre-specified upper and lower limit range may be created.
[0121] The result of the optimization algorithm is displayed and shown to the user (step 1612). In one embodiment, the user can select (step 1614) one trial through the UI from among the displayed results to trigger the construction of the 3D model in the virtual fabrication environment.
[0122] The parsing module may use two different types of optimization algorithms. Indirect optimization applies the optimization algorithm to the regression equation created during the key parameter identification process. Indirect optimization has the advantage of being very fast because it does not call the virtual manufacturing environment to build additional 3D models and generally avoids local minima since the regression equation provides a series of surfaces that form the response surface (the response surface shows the relationship between the 3D model target and the desired value in terms of parameters and errors). Trials starting from random starting points within the parameter space tend to converge to similar results, so the user only needs to use a small number of trials to perform those optimization tasks. It should also be noted that indirect optimization has the drawback that the results are of low quality when the (one or more) response equations cannot predict the (one or more) targets well, for example, when the response surface is highly non-linear.
[0123] Direct optimization is significantly slower compared to indirect optimization and may be used in one embodiment that does not follow the above key parameter identification process. In this method, the optimization algorithm calls the virtual manufacturing environment in each iteration, which generates a new 3D model and related measurements to update the optimization algorithm, and then the optimization algorithm adjusts the parameter values. This is a sequential optimization process. Direct optimization has the advantages of being the most realistic method and functioning better for non-linear response surfaces, and not necessarily requiring the above key parameter identification process to be executed first (no regression equation is required, and the user only needs to pick up the parameters to be optimized). Direct optimization has the drawback of being slow because it calls the virtual manufacturing environment to build a 3D model for each iteration of the trial and may get trapped in local minima. These drawbacks can be mitigated by using multiple licenses (speeds) and additional trials to provide a wider parameter space sampling and avoid situations where the algorithm gets trapped in local minima.
[0124] A variety of optimization algorithms can be used to perform direct and indirect optimizations. As a non-limiting example, in one embodiment, an interior point algorithm with parameter bounds may be utilized for indirect optimization, although other algorithms may be used. For direct optimization, as a non-limiting example, a genetic algorithm may be used because it can handle complex response surfaces with discontinuous and binary targets (present / absent).
[0125] As a non-limiting example of performing process model calibration by indirect optimization, in one embodiment, the user first completes the key parameter identification process through the analysis module as described in this document. More specifically, the user has a set of parameters and targets (measurements, structures evaluated on a virtual semiconductor structure Exploration, perform experimental design and regression for DTC checks, electrical analysis). This involves, for each target, identifying statistically significant parameters and creating a regression equation using these statistically significant parameters to predict each target. As described above, the user selects one or more targets, enters the desired value (DV) for each target, and assigns weights to their importance. A default weight of 1 may be provided for each target. For calibration options, the user may take up whether the mean squared error is used (default), and can set detailed options including, but not limited to, the number of optimization trials, the number of iterations, and the convergence tolerance. Default values may be provided for each option. For example, the number of optimization trials may be set to a default value of 10, the number of iterations per trial may be set to a default value of 100, and the convergence tolerance may be set to a default value of 1e-6. Following the setting of detailed options, the user may set the lower and upper bounds allowed for each parameter being optimized through the provided UI. The parameter values are maintained within these bounds during optimization by the analysis module. The user starts the calibration process through the UI and optimization begins. In one embodiment, the underlying computational engine may use an interior point algorithm. Once the optimization trial(s) (one or more times) are complete, the optimized parameter and target values are displayed for each trial along with a completion / error message, and the user can select one trial for construction in a virtual manufacturing environment to evaluate the resulting 3D model.
[0126] As described above, in one embodiment, the process model calibration sequence may be guided through a UI wizard. FIG. 17 shows the selection of measurement targets for the process model calibration sequence described above, where the user is guided to select a target from among the targets for which regression data was previously generated during the key parameter identification process. As will be further described below, the regression data is subsequently used when performing indirect optimization. In one embodiment, the UI 1700 presents a list 1702 of selectable targets, but restricts the user to selecting from measurement targets that already have a regression model. In one embodiment, no other parameters and no other measurement data are provided. FIG. 17 also shows a table 1704 within the UI that enables the user to select a DV for the selected target. In the table within the right pane, the user enters DVs (these columns may initially be blank) and weights, and these values may default to 1 and be changed by the user.
[0127] FIG. 18 shows a representative user interface 1800 that enables the selection of calibration options 1802 that may be provided by a process model calibration wizard. As shown in the figure, in one embodiment, an optimization technique (indirect vs. direct) may be selected 1804, and detailed option checkboxes 1806 are provided by a virtual fabrication environment to enable the user to specify options such as the number of optimization trials, the number of iterations per trial, and the tolerance that the user desires. Default values may initially be provided, and these values may be changed by the user in one embodiment.
[0128] The process model calibration wizard may also provide a user interface 1900 that allows the user to select parameter boundaries, as shown in FIG. 19. A list of all statistically significant parameters in the regression, selected by the user, may be created by the analysis module and displayed in tabular form 1902. For each parameter, associated targets 1904 are listed. For example, in the table shown in FIG. 19, the parameter 2.1.15: thickness is significant for three regression targets, FinCD_Top, FinCD_Bot, and GapCD_Top. The user enters the desired lower and upper limits for each parameter.
[0129] The process model calibration wizard may then provide a progress button to initiate the calibration, and the results may be displayed to the user through a user interface 2000 as shown in FIG. 20. For example, the results 2002 may be displayed in tabular form from an internal or external simulation environment, showing the number of trials, optimization results, predicted target results, and values for the parameters 2004. In one embodiment, the displayed view may allow the user to select columns in the table and export the model to a 3D view of a virtual manufacturing environment using parameters from specific successful trials or automatically construct the model within the 3D view of the virtual manufacturing environment. [Variability Analysis]
[0130] Variability analysis helps users analyze and understand the variability of measurement data obtained from a group of virtual 3D models. In one embodiment, an analysis module in a virtual prototyping environment performs variability analysis and displays a table of calculated information regarding a target distribution, as well as plots of a target data histogram and a normal quantile plot, and provides a user interface that enables switching to a second plot window, selection of up to four targets, and plotting / comparing of their empirical cumulative distribution functions. Further, variability analysis as described herein provides an estimated value of the accuracy of the standard deviation (sigma) and its correlation with the sample size, a method of assessment when the target data is normally distributed, and a consistent method for visual comparison.
[0131] Variability analysis is a task for users to assess the distribution of values for targets (measurement, structure Exploration , DTC check, electrical analysis, etc.) obtained from a plurality of virtual semiconductor structures formed in a virtual prototyping environment. The purpose is to determine the nominal value, range, specification limits, etc. for that target. Conventional virtual prototyping environments for semiconductor device structures lack system-level elements that enable proper variability analysis. Many semiconductor process integration engineers have little or no knowledge of statistics, and as a result, these engineers perform variability analysis in an incomplete and / or incorrect manner. Target data may be assumed to be normally distributed, and if not, the mean and sigma values can be misleading. Even if the target data is normally distributed, the appropriate sample size required to obtain a useful accuracy of sigma is generally not addressable by Monte Carlo simulation / experimental design. Users often overestimate or underestimate the sample size, which wastes time and / or degrades the quality of the answer. Further, visualization and comparison of distributions are done in different ways or not at all in different software packages, which causes confusion among users.
[0132] To address this issue, in one embodiment, the analysis module is designed to perform variability analysis to provide automated statistical analysis, optimization, and visualization for a user (e.g., a semiconductor process integrator with limited or no knowledge of statistics) in a virtual fabrication environment.
[0133] FIG. 21 shows a step sequence for performing variability analysis in a representative embodiment. The sequence begins with the receipt of user identification of a deck (layout data and process steps) used by the virtual fabrication environment to create a virtual 3D model of the semiconductor device structure of interest (step 2100). The user creates a Monte Carlo DOE and identifies targets for the 3D model (step 2102). Next, a plurality of virtual fabrication runs are performed for the Monte Carlo DOE (step 2104). In one embodiment, as further discussed below, a reduced set of approximately 200 runs is performed. The analysis module identifies outliers in the target data generated by the virtual fabrication runs in the manner described above (step 2106). The identified outliers are displayed for the user to see, and then a user selection to return one or more of the outliers to the target data or to exclude the outliers from the target data for each target is received through the provided user interface (step 2108). The user selects variability analysis options through the user interface and selects one or more targets for the analysis (step 2110). The variability analysis results are then displayed for the user to see in various forms including, but not limited to, a table of distribution data, a plot of the target data histogram, and a plot of the normal quantiles, or the results may be exported to a third-party application for further processing (step 2112). Optionally, the user can switch to a second plot window, i.e., an empirical cumulative distribution function (ECDF) window, and select up to four targets, and the analysis module plots / compares their empirical distribution functions.
[0134] FIG. 22 shows a representative user interface displaying a variable analysis result window 2200 in a representative embodiment. For a selected target, the variability analysis main window shows a table 2202 and two plots, namely a histogram plot 2204 and a normal quantile plot 2206. Table 2202 includes, for example, a plurality of calculated information for the selected target, for example, as follows.
[0135] n is the number of data points used in the calculation (the user may add / remove outliers, and thus, the actual number of data points used is shown here).
[0136] Average, and 95% CI (confidence interval) of the average.
[0137] Standard deviation, and 95% confidence interval of the standard deviation. Since the 95% CI is an estimate of the accuracy of the standard deviation (sigma), it is very important for the user to know. If n = 200, the 95% CI is approximately ±10%, which has been found to be very useful for estimating specification limits. The sample size of 200 is significantly smaller than that generally recommended for Monte Carlo simulations (usually 10,000 is recommended), but provides an acceptable accuracy of ±10% depending on the use case. The user can adjust the sample size (n) to improve the accuracy (CI) of sigma and the average as needed. In another embodiment, the sample size for Monte Carlo simulation is less than 500.
[0138] Normality test: The result of applying the ReliefF normality test to the selected target, reported as the p-value and whether it is statistically significant (yes / no). This is the first of a plurality of methods used by the analysis module to assess whether the target data is normally distributed.
[0139] Percentage: Minimum, 0.5%, 2.5%, 5%, 25%, 50% (center), 75%, 95%, 97.5%, 99.5%, Maximum for selected target.
[0140] The variability analysis main window may also display a histogram plot, which is a histogram of the data for the selected target, with the normal pdf overlaid for visual comparison of normality. If the bars of the histogram follow the normal pdf, it can be said that the target data is normally distributed. This is the second method provided by the analysis module to test the normality of the target data.
[0141] The variability analysis main window may further display a normal quantile plot of the selected target data. If the points come near or on the line, it can be said that the target data is normally distributed. This is the third method provided by the analysis module to test the normality of the target data. It can be seen that additional methods for testing the normality of target data not explicitly discussed in this document may also be implemented by the analysis module and should be considered within the scope of the present invention.
[0142] The analysis module may also generate the display of a second window for displaying the variability analysis results. FIG. 23 shows a representative user interface 2300 that displays a comparison of the empirical cumulative distribution functions 2302, 2304 of two separate targets in a representative embodiment. For example, the user may click on tab 2306 for the ECDF window and select up to four targets to plot and compare the empirical cumulative distribution functions. The x-axis is the target data scaled to range from 0 to 1, and the y-axis is the cumulative probability from 0 to 1. This enables the user to compare the target distributions in an equivalent manner and examine important tail effects in specification limit setting.
[0143] Multiple methods enabled by the parsing module for assessing normality enable a user to determine whether target data should be treated as being normally distributed. If the target data is normally distributed, the user can use the mean and standard deviation to estimate the three or four sigma points commonly used to set specification limits. If the data is not normally distributed, the user may estimate useful specification limit points from the percentages and minimum / maximum shown in the table, as well as from the tails of the ECDF plot. In another embodiment, the target data may be automatically fitted to a Gaussian mixture model and thus used to estimate useful points for setting specification limits. In one embodiment, a variant of this approach features enabling the user to fit the data to other known distributions, such as the F-distribution or t-distribution, for example, and thereby estimate useful points for setting specification limits.
[0144] Some or all of the embodiments of the present invention may be provided as one or more computer-readable programs or computer-readable codes embodied in one or more non-transitory media. Examples of such media include, but are not limited to, hard disks, compact disks, digital versatile disks, flash memories, PROMs, RAMs, ROMs, or magnetic tapes. Generally, the computer-readable programs or codes may be implemented in any computer language.
[0145] It is intended that matters included in the above description or shown in the accompanying drawings be construed as illustrative rather than literal, since specific changes may be made without departing from the scope of the present invention. Those skilled in the art will appreciate that the step sequences and architectures shown in the figures may be changed without departing from the scope of the present invention, and that the examples included in this document are one example of the possible descriptions of the present invention.
[0146] Having described examples of embodiments of the present invention, the above description has provided illustration and explanation, but is not intended to be exclusive or to limit the invention to the precise form disclosed. Modifications and variations are possible in light of the above teachings or may be acquired from practice of the invention. For example, although a series of acts has been described, the order of these acts may be changed in other implementations consistent with the principles of the invention. Further, non-dependent acts may be performed in parallel. The present invention can also be realized as the following application examples. [Application Example 1] A non - transitory computer - readable medium storing computer - executable instructions for identifying key parameters in a virtual semiconductor manufacturing environment, wherein when the instructions are executed, they cause at least one computer device to receive a selection of 2D design data and a process sequence including a plurality of processes for a semiconductor device structure virtually fabricated in a virtual manufacturing environment created by the computer device, cause the computer device to perform a plurality of virtual manufacturing runs for the semiconductor device structure based on a design of experiments (DOE) using the 2D design data and the process sequence, the plurality of virtual manufacturing runs including constructing a plurality of 3D models, receive one or more target user identifications for the semiconductor device structure, execute an analysis module in the virtual manufacturing environment to identify one or more outliers among measurement data for the one or more targets in the plurality of 3D models created from the virtual manufacturing runs, receive a user selection for adding or excluding one or more of the identified outliers from the measurement data for the one or more targets in the plurality of 3D models, the selection being received through a user interface provided in the virtual manufacturing environment, after the addition or exclusion of the selected outliers from the measurement data, cause the analysis module to perform a regression analysis on the measurement data for the one or more targets, cause the analysis module to identify one or more key parameters based on the results of the regression analysis, and display or export identification information of the identified one or more key parameters. A medium. [Application Example 2] The medium according to Application Example 1, wherein when the instructions are executed, they cause the at least one computer device to further rank the identified one or more key parameters programmatically. A medium. [Application Example 3] The medium according to Application Example 1, wherein when executed, the instruction further causes the at least one computer device to receive at least one user selection among the type of DOE, the parameters to be varied in the DOE, the number of levels, and the values for the levels for the DOE, and provide a user interface for this to the virtual manufacturing environment. A medium [Application Example 4] The medium according to Application Example 1, wherein the selected target is at least one of measurement measurement, structural search, DTC check, and electrical analysis. A medium [Application Example 5] The medium according to Application Example 1, wherein when executed, the instruction further causes the at least one computer device to perform a multicollinearity check on the target data for the plurality of 3D models. A medium [Application Example 6] The medium according to Application Example 1, wherein when executed, the instruction further causes the at least one computer device to receive a user selection of a desired value for the selected target through the user interface in the virtual manufacturing environment, the selected target being created from a group of targets associated with key parameters, receive a user selection of an upper limit and a lower limit for each identified key parameter through the user interface in the virtual manufacturing environment, use the identified key parameters, the desired value, and the upper and lower limits to execute an optimization algorithm for the plurality of 3D models, display or export the results from the optimization algorithm. A medium [Application Example 7] The medium according to Application Example 6, wherein the selected target from the group of targets is a target associated with a key parameter previously identified by the analysis module and for which regression data exists, and the optimization algorithm performs indirect optimization using the regression data. A medium [Application Example 8] The medium according to Application Example 6, wherein the key parameters are manually identified by the user, and the optimization algorithm performs direct optimization. A medium [Application Example 9] The medium according to Application Example 1, wherein when executed, the instruction further causes the at least one computer device to Receiving calibration options for the optimization algorithm from a user through the user interface, the calibration options including one or more of the number of iterations, convergence tolerance, number of trials, and type of scoring function, medium. [Application Example 10] The medium according to Application Example 1, wherein the DOE is a Monte Carlo simulation, and when the instructions are executed, the at least one computing device is further caused to receive a user selection for performing a variability analysis on the plurality of virtual fabrication runs, perform the plurality of virtual fabrication runs, provide results to enable a sigma accuracy assessment, medium. [Application Example 11] The medium according to Application Example 1, wherein the DOE is a Monte Carlo simulation, and when the instructions are executed, the at least one computing device is further caused to receive a user selection for performing a variability analysis on the plurality of virtual fabrication runs, perform the plurality of virtual fabrication runs, provide results to enable a normality assessment of target data, medium. [Application Example 12] The medium according to Application Example 1, wherein the DOE is a Monte Carlo simulation and the number of virtual fabrication runs is approximately 200, medium. [Application Example 13] The medium according to Application Example 1, wherein the DOE is a Monte Carlo simulation and the number of virtual fabrication runs can be adjusted by the user to achieve a desired sigma accuracy (CI), medium. [Application Example 14] The medium according to Application Example 1, wherein the DOE is a Monte Carlo simulation, and when the instructions are executed, the at least one computing device is further caused to receive a user selection for performing a variability analysis on the plurality of virtual fabrication runs, perform the plurality of virtual fabrication runs, simultaneously display results for a plurality of selected targets, medium. [Application Example 15] A method for identifying key parameters in a virtual semiconductor manufacturing environment, the method comprising: receiving a selection of 2D design data and a process sequence including a plurality of processes for a semiconductor device structure virtually fabricated in a virtual fabrication environment generated by a computing device, The computing machine uses the 2D design data and the process sequence to perform multiple virtual fabrication runs for the semiconductor device structure based on a design of experiments (DOE), and the multiple virtual fabrication runs construct multiple 3D models. Receive one or more target user identifications for the semiconductor device structure. Execute an analysis module in the virtual fabrication environment to identify one or more outliers among the measurement data for the one or more targets in the multiple 3D models created from the virtual fabrication runs. Receive a user selection for adding or removing one or more of the identified outliers from the measurement data for the one or more targets in the multiple 3D models, and the selection is received through a user interface provided in the virtual fabrication environment. After the addition or removal of the selected outliers from the measurement data, perform a regression analysis on the measurement data for the one or more targets by the analysis module. Based on the results of the regression analysis, identify one or more key parameters by the analysis module. Display or export the identification information of the identified one or more key parameters. A method comprising the above. [Application Example 16] The method according to Application Example 15, further comprising: Ranking the identified one or more key parameters by a program. [Application Example 17] The method according to Application Example 15, further comprising: Providing a user interface in the virtual fabrication environment for receiving a user selection of at least one of the type of DOE, the parameters to vary in the DOE, the number of levels, and the values for the levels for the DOE. [Application Example 18] The method according to Application Example 15, further comprising: Performing a multicollinearity check on the target data for the multiple 3D models. [Application Example 19] The method according to Application Example 15, further comprising: Receiving, through the user interface in the virtual fabrication environment, a user selection of a desired value for a selected target, and the selected target is created from a group of targets associated with key parameters. Receive user selections of upper and lower limits for each identified key parameter through the user interface in the virtual production environment, Execute an optimization algorithm for the plurality of 3D models using the identified key parameters, a desired value, and the upper and lower limits, Display or export the results from the optimization algorithm, A method comprising the above. [Application Example 20] The method according to Application Example 15, further comprising: Receiving calibration options for the optimization algorithm from the user through the user interface, the calibration options including one or more of the number of iterations, convergence tolerance, number of trials, and type of scoring function. [Application Example 21] The method according to Application Example 15, wherein the DOE is a Monte Carlo simulation, and the method further comprises: Receiving a user selection for performing variability analysis on the plurality of virtual production runs, Performing the plurality of virtual production runs, Providing results to enable the assessment of sigma accuracy. A method comprising the above. [Application Example 22] The method according to Application Example 15, wherein the DOE is a Monte Carlo simulation, and the method further comprises: Receiving a user selection for performing variability analysis on the plurality of virtual production runs, Performing the plurality of virtual production runs, Providing results to enable the assessment of the normality of target data. A method comprising the above. [Application Example 23] The method according to Application Example 15, wherein the DOE is a Monte Carlo simulation, and the method further comprises: Receiving a user selection for performing variability analysis on the plurality of virtual production runs, Performing the plurality of virtual production runs, Simultaneously displaying the results for a plurality of selected targets. A method comprising the above. [Application Example 24] A virtual production system, A computing device equipped with a processor, configured to form a virtual production environment including an analysis module, the virtual production environment Receiving a selection of 2D design data and a process sequence including a plurality of processes for a semiconductor device structure virtually fabricated in a virtual production environment generated by the computing device, The computing machine uses the 2D design data and the process sequence to perform a plurality of virtual fabrication runs for the semiconductor device structure based on a design of experiments (DOE), and the plurality of virtual fabrication runs constructs a plurality of 3D models. Receive one or more target user identifications for the semiconductor device structure. Execute an analysis module in the virtual fabrication environment to identify one or more outliers among the measurement data for the one or more targets in the plurality of 3D models created from the virtual fabrication runs. Receive a user selection to add or exclude one or more of the identified outliers from the measurement data for the one or more targets in the plurality of 3D models, the selection being received through a user interface provided in the virtual fabrication environment. After the addition or exclusion of the selected outliers from the measurement data, perform a regression analysis on the measurement data for the one or more targets by the analysis module. Based on the results of the regression analysis, identify one or more key parameters by the analysis module. A computing machine that displays or exports identification information of the identified one or more key parameters. A display surface that communicates with the computing machine and is configured to display the 3D structure model in a 3D view. A virtual fabrication system comprising the above. [Application Example 25] The virtual fabrication system according to Application Example 24, wherein the virtual fabrication environment ranks the identified one or more key parameters programmatically. [Application Example 26] The virtual fabrication system according to Application Example 24, wherein the virtual fabrication environment receives a user selection of a desired value for a selected target through the user interface, the selected target being created from a group of targets associated with key parameters, receives a user selection of upper and lower limits for each identified key parameter through the user interface, uses the identified key parameters, the desired value, and the upper and lower limits to execute an optimization algorithm for the plurality of 3D models, displays or exports the results from the optimization algorithm. A virtual fabrication system. [Application Example 27] The virtual production system according to Application Example 24, wherein the virtual production environment receives, through the user interface, a user selection of a desired value for a selected target, the selected target being created from a group of targets associated with key parameters, receives, through the user interface, a user selection of upper and lower limits for each identified key parameter, executes an optimization algorithm for the plurality of 3D models using the identified key parameters, the desired value, and the upper and lower limits, and displays or exports the results from the optimization algorithm. A virtual production system.
Claims
1. A non - transitory computer - readable medium holding computer - executable instructions for performing variability analysis, wherein when the instructions are executed, at least one computer device equipped with at least one processor is caused to, using 2D design data and a process sequence, perform a plurality of virtual fabrication runs in a virtual fabrication environment for a semiconductor device based on a design of experiments (DOE), the plurality of virtual fabrication runs constructing a plurality of 3D models, receive a user selection of one or more targets in the plurality of 3D models on which the variability analysis is to be performed, display or export the results from the variability analysis, wherein the variability analysis includes displaying an empirical cumulative distribution function related to at least one of the one or more targets.
2. The medium of claim 1, wherein the DOE is a Monte Carlo simulation.
3. The medium of claim 1, wherein the number of the plurality of virtual fabrication runs is approximately 200.
4. The medium of claim 1, wherein the results from the variability analysis enable a sigma - level accuracy assessment.
5. The medium of claim 1, wherein the results from the variability analysis enable a normality assessment of target data.
6. The medium of claim 1, wherein the results from the variability analysis are displayed simultaneously for a plurality of targets.
7. The medium of claim 1, wherein the selected target is one or more of a metrology measurement target, a structure exploration target, and an electrical analysis target.
8. A method executed by a computer device, wherein the computer device is equipped with at least one processor, and the method includes, using 2D design data and a process sequence, performing a plurality of virtual fabrication runs in a virtual creation environment for a semiconductor device based on a design of experiments (DOE), the plurality of virtual fabrication runs constructing a plurality of 3D models, receiving a user selection of one or more targets in the plurality of 3D models on which the variability analysis is to be performed, displaying or exporting the results from the variability analysis, and wherein the variability analysis includes displaying an empirical cumulative distribution function related to at least one of the one or more targets.
9. The method according to claim 8, wherein the DOE is a Monte Carlo simulation, the method.
10. The method according to claim 8, wherein the number of times of the plurality of virtual fabrication progresses is approximately 200, the method.
11. The method according to claim 8, wherein the result from the variability analysis enables the assessment of sigma accuracy, the method.
12. The method according to claim 8, wherein the result from the variability analysis enables the assessment of the normality of target data, the method.
13. The method according to claim 8, wherein the result from the variability analysis is simultaneously displayed for a plurality of targets, the method.
14. The method according to claim 8, wherein the selected target is one or more of a measurement target, a structure exploration target, and an electrical analysis target, the method.
15. A virtual fabrication system, comprising a computing device equipped with a processor and configured to form a virtual fabrication environment, wherein the virtual fabrication environment performs a plurality of virtual fabrication progresses for a semiconductor device based on an experiment design (DOE) using 2D design data and a process sequence, and the plurality of virtual fabrication progresses constructs a plurality of 3D models, receives a user selection of one or more targets in the plurality of 3D models before variability analysis is performed, identifies one or more outliers of the one or more targets in the plurality of 3D models, and one or more of the identified one or more outliers are added to or excluded from the one or more targets, the computing device; a display configured to display the result from the variability analysis; and comprising wherein the variability analysis includes an empirical cumulative distribution function related to at least one of the one or more targets, the virtual fabrication system.
16. The system according to claim 15, further comprising a network interface configured to export the result from the variability analysis, the system.
17. The system according to claim 15, wherein the number of times of the plurality of virtual fabrication progresses is approximately 200, the system.
18. The system according to claim 15, wherein the result from the variability analysis enables the assessment of sigma accuracy and / or the normality of target data, the system.
19. The system according to claim 15, wherein The system in which the results from the variability analysis are simultaneously displayed for a plurality of targets.
20. The system according to claim 15, wherein the selected target is one or more of a measurement target, a structure exploration target, and an electrical analysis target.
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