Method for evaluating silicon single crystal ingot, method for evaluating silicon epitaxial wafer, method for manufacturing silicon epitaxial wafer, and method for evaluating silicon mirror wafer

Abstract

To provide a novel evaluation method for a silicon single crystal ingot that can perform evaluation related to a twin crystal generation region.SOLUTION: An evaluation method for a silicon single crystal ingot includes: cutting a plurality of three or more silicon wafers out of the silicon single crystal ingot to be evaluated; processing the plurality of silicon wafers into silicon mirror surface wafers through mirror surface processing; forming epitaxial layers on mirror-surface processed surfaces of the plurality of silicon mirror surface wafers to obtain silicon epitaxial wafers; acquiring bright point maps of epitaxial layer surfaces of the plurality of silicon epitaxial wafers by a laser surface inspection device; and generating an overlaid map by overlaying the bright point maps obtained for the epitaxial layer surfaces of the plurality of silicon epitaxial wafers. When a bright point group of a plurality of three or more bright points distributed linearly on the overlaid map is not confirmed, it is estimated that a region of the silicon single crystal ingot to be evaluated where the plurality of silicon wafers are cut is not a twin crystal generation region, and when a bright point group of bright points distributed linearly on the overlaid map is confirmed, it is estimated that the region of the silicon single crystal ingot to be evaluated where the plurality of silicon wafers having bright points included in the bright point group confirmed are cut is a twin crystal generation region.SELECTED DRAWING: None

Description

Technical Field

[0001] The present invention relates to a method for evaluating a silicon single crystal ingot, a method for evaluating a silicon epitaxial wafer, a method for manufacturing a silicon epitaxial wafer, and a method for evaluating a silicon mirror wafer.

Background Art

[0002] A silicon wafer widely used as a semiconductor substrate is manufactured by subjecting a wafer cut from a silicon single crystal ingot to various processes such as polishing and film formation. The inclusion of crystal defects in a silicon wafer causes deterioration of the device characteristics of a semiconductor device. Such crystal defects include twins (see Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] As described in paragraph 0002 of Patent Document 1, a twin is a surface defect that occurs when plastic deformation of a regular atomic arrangement occurs in a certain direction during the growth of a silicon single crystal, and one of adjacent portions becomes a mirror image of the other due to stress applied in that direction. Identifying a region in a silicon single crystal ingot where the occurrence of twins is estimated and excluding such a region from the wafer cutting region is desirable because it leads to the provision of a semiconductor device exhibiting excellent device characteristics.

[0005] One aspect of the present invention aims to provide a new method for evaluating a silicon single crystal ingot capable of evaluating a twin generation region.

Means for Solving the Problems

[0006] One aspect of the present invention is cutting out a plurality of three or more silicon wafers from a silicon single crystal ingot to be evaluated, processing the plurality of silicon wafers into silicon mirror wafers by performing mirror finishing, processing the plurality of silicon mirror wafers into silicon epitaxial wafers by forming an epitaxial layer on the mirror-finished surface, acquiring a bright point map for the epitaxial layer surface of the plurality of silicon epitaxial wafers by a laser surface inspection device, and creating an overlay map by overlaying the bright point maps acquired for the epitaxial layer surfaces of the plurality of silicon epitaxial wafers, including when no group of bright points linearly distributed at three or more points is confirmed in the overlay map, it is presumed that the region from which the plurality of silicon wafers are cut out in the silicon single crystal ingot to be evaluated is not a twin generation region, when a group of bright points linearly distributed is confirmed in the overlay map, it is presumed that the region from which the plurality of silicon wafers in which the bright points included in the group of bright points are confirmed are cut out in the silicon single crystal ingot to be evaluated is a twin generation region, A method for evaluating a silicon single crystal ingot, relates to.

[0007] In one form, in the method for evaluating a silicon single crystal ingot, the group of bright points linearly distributed can be a group of bright points linearly distributed with a length of 2 mm or more.

[0008] In one form, the epitaxial layer formed in the method for evaluating a silicon single crystal ingot can be an epitaxial layer with a film thickness of 0.5 μm or more.

[0009] In one embodiment, in the method for evaluating the silicon single crystal ingot, when a group of bright spots in which three or more bright spots are linearly distributed is confirmed in the superimposed map, for a plurality of silicon wafers in which the bright spots included in the group of bright spots are confirmed, a proportional relationship is established between the position coordinates of the bright spots and the cutting position in the axial direction of the silicon single crystal ingot. It can be further adopted as an estimation criterion for estimating the region from which the plurality of silicon wafers in which the bright spots included in the group of bright spots are confirmed are cut out as a twin generation region.

[0010] In one embodiment, the plane orientation of the silicon single crystal ingot to be evaluated can be <100>, and in this silicon single crystal ingot, two regions where the {111} plane exists can be further estimated as twin generation regions.

[0011] In one embodiment, the plane orientation of the silicon single crystal ingot to be evaluated can be <100>. When a group of bright spots in which three or more bright spots are linearly distributed is confirmed in the superimposed map, for at least one of the plurality of bright spots, a defect existing at the position where the bright spot is confirmed is observed with an atomic force microscope, and based on the shape of the observed defect, either one of the two regions where the {111} plane exists in the silicon single crystal ingot to be evaluated can be further estimated as a twin generation region.

[0012] One aspect of the present invention is A method for evaluating a silicon epitaxial wafer, comprising: The silicon epitaxial wafer to be evaluated is three or more silicon epitaxial wafers in which an epitaxial layer is formed on the polished surface of a silicon mirror wafer that is cut from the same silicon single crystal ingot and polished, Obtaining a bright spot map for the epitaxial layer surfaces of the plurality of silicon epitaxial wafers by a laser surface inspection device, and Creating a superimposed map by superimposing the bright point maps obtained for the surfaces of the epitaxial layers of the plurality of silicon epitaxial wafers, including When no group of bright points in which a plurality of three or more bright points are linearly distributed is confirmed in the superimposed map, it is estimated that there are no twin-induced defects in the silicon epitaxial wafer to be evaluated, When a group of bright points linearly distributed is confirmed, it is estimated that twin-induced defects exist in the plurality of silicon epitaxial wafers in which the bright points included in this group of bright points are confirmed. A method for evaluating a silicon epitaxial wafer, relates to

[0013] In one form, in the method for evaluating a silicon epitaxial wafer, the group of bright points linearly distributed can be a group of bright points linearly distributed with a length of 2 mm or more.

[0014] In one form, in the method for evaluating a silicon epitaxial wafer, the epitaxial layer can be an epitaxial layer with a film thickness of 0.5 μm or more.

[0015] In one form, in the method for evaluating a silicon epitaxial wafer, when a group of bright points in which a plurality of three or more bright points are linearly distributed is confirmed in the superimposed map, for the plurality of silicon epitaxial wafers in which the bright points included in the group of bright points are confirmed, it can be further adopted as an estimation criterion for estimating that twin-induced defects exist in the plurality of silicon epitaxial wafers in which the bright points included in the group of bright points are confirmed that a proportional relationship holds between the position coordinates of the bright points and the cutting position in the axial direction of the silicon single crystal ingot.

[0016] One aspect of the present invention is A method for manufacturing a silicon epitaxial wafer, comprising Cutting out three or more silicon wafers from the same silicon single crystal ingot, Processing the plurality of silicon wafers into silicon mirror wafers by performing mirror finishing; Processing the plurality of silicon mirror wafers into silicon epitaxial wafers by forming an epitaxial layer on the mirror-finished surface; Evaluating the plurality of silicon epitaxial wafers by the evaluation method of the silicon epitaxial wafers, and Subjecting the silicon epitaxial wafers, for which it is estimated that there are no twin-induced defects as a result of the above evaluation, to one or more steps for shipping them as product silicon epitaxial wafers; A method for manufacturing a silicon epitaxial wafer, comprising: relates to.

[0017] One aspect of the present invention is A method for evaluating a silicon mirror wafer, comprising: The silicon mirror wafer to be evaluated is a silicon mirror wafer that is cut out from the same single-crystalline silicon ingot and has been subjected to mirror finishing, Processing the plurality of silicon mirror wafers into silicon epitaxial wafers by forming an epitaxial layer on the mirror-finished surface; Obtaining a bright point map for the epitaxial layer surface of the plurality of silicon epitaxial wafers by a laser surface inspection device, and Creating an overlapping map by overlapping the bright point maps obtained for the epitaxial layer surfaces of the plurality of silicon epitaxial wafers, including: When no group of bright points in which a plurality of three or more bright points are linearly distributed is confirmed in the overlapping map, it is presumed that there is no twin in the silicon mirror wafer to be evaluated, When a group of bright points linearly distributed is confirmed, it is presumed that there is a twin in the silicon mirror wafers included in the plurality of silicon epitaxial wafers in which the bright points included in this group of bright points are confirmed. A method for evaluating a silicon mirror wafer. relates to.

[0018] In one form, in the method for evaluating the silicon mirror wafer, the group of bright spots distributed in a line shape can be a group of bright spots distributed in a line shape with a length of 2 mm or more.

[0019] In one form, in the method for evaluating the silicon mirror wafer, the epitaxial layer can be an epitaxial layer with a film thickness of 0.5 μm or more.

[0020] In one form, in the method for evaluating the silicon mirror wafer, when a group of bright spots in which a plurality of bright spots at three or more points are distributed in a line shape is confirmed in the superposition map, for the plurality of silicon epitaxial wafers in which the bright spots included in the group of bright spots are confirmed, a proportional relationship is established between the position coordinates of the bright spots and the cutting position in the axial direction of the silicon single crystal ingot. It can be further adopted as an estimation criterion for estimating that twins are present in the silicon mirror wafer included in the plurality of silicon epitaxial wafers in which the bright spots included in the group of bright spots are confirmed.

Effect of the Invention

[0021] According to one aspect of the present invention, it is possible to provide a new evaluation method for a silicon single crystal ingot capable of evaluating a twin generation region.

Brief Description of the Drawings

[0022]

Figure 1

Figure 2

Figure 3

Figure 4

Embodiments for Carrying Out the Invention

[0023] [Evaluation Method for Silicon Single Crystal Ingot] The evaluation method for a silicon single crystal ingot according to one aspect of the present invention includes cutting out three or more silicon wafers from the silicon single crystal ingot to be evaluated, processing the plurality of silicon wafers into silicon mirror wafers by performing mirror finishing, processing the plurality of silicon mirror wafers into silicon epitaxial wafers by forming an epitaxial layer on the mirror-finished surface, obtaining a bright spot map for the epitaxial layer surfaces of the plurality of silicon epitaxial wafers by a laser surface inspection device, and creating an overlay map by overlaying the bright spot maps obtained for the epitaxial layer surfaces of the plurality of silicon epitaxial wafers. In the evaluation method for the silicon single crystal ingot, when no group of bright spots in which three or more bright spots are linearly distributed is confirmed in the overlay map, it is presumed that the region from which the plurality of silicon wafers are cut out in the silicon single crystal ingot to be evaluated is not a twin generation region, and when the group of bright spots linearly distributed is confirmed in the overlay map, the region from which the plurality of silicon wafers in which the bright spots included in the group of bright spots are confirmed are cut out in the silicon single crystal ingot to be evaluated is presumed to be a twin generation region.

[0024] In order to provide a new evaluation method for a silicon single crystal ingot capable of evaluating the twin generation region, the present inventor repeated studies and obtained the following new findings. (1) When a silicon wafer containing twins is mirror-polished and an epitaxial layer is formed on the polished surface, surface defects that are recessed in a cleft shape are formed in the formed epitaxial layer. It is presumed that this is because there is a difference in the epitaxial growth rate between the portion directly above the twin and the other portions, and surface defects that are recessed in a cleft shape are formed in the portion directly above the twin in the formed epitaxial layer. Therefore, the surface defects thus formed can be presumed to be twin-induced defects. (2) The above surface defects can be detected as light point defects (LPD) by a laser surface inspection device. (3) Twins occur in a certain direction in a silicon single crystal ingot. Therefore, when three or more silicon wafers cut from the same silicon single crystal ingot are processed into silicon mirror wafers, an epitaxial layer is formed on the polished surface, and a light point map is obtained for the epitaxial layer surface by a laser surface inspection device, and a map obtained by overlapping these multiple light point maps is created. In this overlapping map, the light points corresponding to the surface defects presumed to be twin-induced defects can be confirmed as a group of light points distributed in a line. Then, as a result of further intensive studies based on such findings, the present inventor has completed the above-described new method for evaluating a silicon single crystal ingot.

[0025] Hereinafter, the method for evaluating the silicon single crystal ingot will be described in more detail.

[0026] <Silicon single crystal ingot to be evaluated> The silicon single crystal ingot to be evaluated in the above-described method for evaluating a silicon single crystal ingot can be, for example, a silicon single crystal ingot grown by the Czochralski (CZ) method. As described above, twins are surface defects that occur when plastic deformation of a regular atomic arrangement occurs during the growth of a silicon single crystal, with stress applied in a certain direction and one of the adjacent parts becoming a mirror image of the other. Twins are known as surface defects that can occur in silicon single crystal ingots grown by the Czochralski (CZ) method. Regarding the growth of silicon single crystal ingots, known techniques related to the CZ method can be applied.

[0027] <Cutting out of silicon wafers, processing into silicon mirror wafers> In the method for evaluating the silicon single crystal ingot, in order to evaluate the twin generation region in the silicon single crystal ingot, three or more silicon wafers are cut out from the silicon single crystal ingot to be evaluated. The cutting out of these silicon wafers can be performed, for example, as follows. The silicon single crystal ingot to be evaluated is cut to obtain a block. The obtained block is sliced to obtain wafers. For a silicon single crystal ingot grown by the CZ method, when the pulling direction during growth is called upward and the other is called downward in the axial direction, there is a cylindrical portion called a straight body portion between the upper conical portion (referred to as the "shoulder") and the lower conical portion (referred to as the "tail portion"). The above block can be, for example, a cylindrical block obtained by cutting out a partial region of the straight body portion. Further, in one form, the three or more silicon wafers can be silicon wafers cut out from a continuous region in the silicon single crystal ingot to be evaluated, that is, silicon wafers obtained by so-called continuous sampling. Further, in another form, the three or more silicon wafers can be silicon wafers cut out from spaced regions in the silicon single crystal ingot to be evaluated, that is, silicon wafers obtained by so-called extraction sampling. When extraction sampling is performed, it is not possible to evaluate the twins included in the region located between the regions where the extraction sampling is performed. Therefore, from the viewpoint of enhancing the reliability of the estimation result of the twin generation region in the silicon single crystal ingot to be evaluated, it is preferable to obtain the three or more silicon wafers by continuous sampling. The thickness of each of the above silicon wafers can be, for example, 750 μm to 1 mm. Further, the region where continuous sampling is performed can be a region spanning 80 mm or more in the axial direction of the silicon single crystal ingot, and the length of such a region can be, for example, 440 mm or less, but may be longer in some cases.The total number of the plurality of silicon wafers described above can be, for example, 10 or more, 50 or more, 70 or more, or 100 or more, and can also be, for example, 500 or less, 300 or less, or 200 or less, and can also be a total number exceeding the values exemplified herein.

[0028] Three or more silicon wafers cut out from a silicon single crystal ingot to be evaluated are processed into silicon mirror wafers by mirror finishing one or both of the two main surfaces. In the present invention and this specification, the "silicon mirror wafer" shall mean a silicon single crystal wafer having mirror finishing on one or both of the two main surfaces. The mirror finishing can be performed by a known method. In addition, various processes usually performed to obtain a silicon mirror wafer, such as chamfering, lapping, grinding, and rough polishing, can be performed on the silicon wafer before mirror finishing by a known method. Thus, three or more silicon mirror wafers are obtained.

[0029] <Processing into Silicon Epitaxial Wafers> The three or more silicon mirror-finished wafers obtained above are each processed into silicon epitaxial wafers. A silicon epitaxial wafer is a wafer that has a silicon single crystal wafer as a substrate and an epitaxial layer on this substrate. In the present invention and this specification, the epitaxial layer shall refer to an epitaxial layer of a silicon single crystal. The formation of the epitaxial layer on the three or more silicon mirror-finished wafers obtained above can be performed by using each silicon mirror-finished wafer as a substrate and epitaxially growing a silicon single crystal on the mirror-finished surface of this substrate. Regarding the formation of the epitaxial layer here, known techniques related to silicon epitaxial wafers can be applied. When the silicon mirror-finished wafer is a wafer obtained by subjecting a silicon wafer cut out from a twin generation region to mirror finishing, as described above, when an epitaxial layer is formed on the mirror-finished surface, the inventor speculates that surface defects recessed in a crevice shape are formed in the portion directly above the twin in the formed epitaxial layer. Therefore, such surface defects can be presumed to be twin-induced defects. In the above-described method for evaluating the silicon single crystal ingot, based on the presence or absence and the state of existence of such surface defects, an estimation regarding the twin generation region is performed as described in detail below. From the viewpoint of making the surface defects caused by twins on the epitaxial layer surface more conspicuous and facilitating detection by a laser surface inspection device, it is preferable to form an epitaxial layer with a film thickness of 0.5 μm or more on each silicon mirror-finished wafer. The film thickness of the epitaxial layer to be formed can be, for example, 1.0 μm or less, or can also be more than 1.0 μm.

[0030] <Acquisition of a bright point map by a laser surface inspection device> In the method for evaluating the silicon single crystal ingot, on the plurality of three or more silicon epitaxial wafers obtained above, a bright point map is acquired for the surface of each epitaxial layer by a laser surface inspection apparatus. As the laser surface inspection apparatus, a laser surface inspection apparatus having a known configuration as an apparatus for inspecting the surface of a semiconductor wafer, also called a light scattering type surface inspection apparatus, a surface inspection machine, etc., can be used without any limitation. The laser surface inspection apparatus usually scans the surface of the semiconductor wafer to be evaluated with laser light, and detects minute recesses or minute projections (for example, concave surface defects or convex surface foreign substances) on the surface of the wafer to be evaluated as bright points (LPD; Light Point Defects) by the emitted light (scattered light or reflected light). Further, by measuring the emitted light from the bright points, the position and / or size of the minute recesses or minute projections on the surface of the semiconductor wafer to be evaluated can be recognized. As the laser light, ultraviolet light, visible light, etc. can be used, and its wavelength is not particularly limited. Ultraviolet light refers to light in a wavelength range of less than 400 nm, and visible light refers to light in a wavelength range of 400 to 600 nm. The analysis unit of the laser surface inspection apparatus usually acquires information on two-dimensional position coordinates (X coordinate and Y coordinate) on the surface to be evaluated for each of the plurality of detected bright points, and creates a bright point map showing the in-plane bright point distribution state on the surface to be evaluated from the acquired information on the two-dimensional position coordinates. Specific examples of commercially available laser surface inspection apparatuses include Surfscan series SP1, SP2, SP3, SP5, SP7, etc. manufactured by KLA TENCOR Corporation. However, these apparatuses are examples, and other laser surface inspection apparatuses can also be used.

[0031] <Estimation regarding the twin generation region> As described above, when a silicon wafer obtained by cutting a silicon mirror wafer from a twin generation region is a wafer subjected to mirror processing, when an epitaxial layer is formed on the mirror-processed surface, the present inventors presume that surface defects recessed in a crevice shape are formed in a portion directly above the twin in the formed epitaxial layer. According to a laser surface inspection apparatus, since minute recesses on the surface to be evaluated can be detected as bright spots, such surface defects can be detected as bright spots by the laser surface inspection apparatus. However, minute recesses or minute protrusions detected as bright spots by the laser surface inspection apparatus on the surface of each epitaxial layer of the plurality of silicon epitaxial wafers described above may not be only surface defects caused by twins. Therefore, in the method for evaluating the silicon single crystal ingot, an estimation regarding the twin generation region is performed on the silicon single crystal ingot to be evaluated by utilizing the fact that twins are plane defects that occur in a certain direction in the silicon single crystal ingot. Specifically, since twins occur in a certain direction in the silicon single crystal ingot, as described above, for each epitaxial layer surface of the silicon epitaxial wafers cut from the same silicon single crystal ingot and processed as described above, a bright spot map is acquired by the laser surface inspection apparatus, and when a map obtained by overlapping these plurality of bright spot maps is created, in this overlapping map, bright spots corresponding to surface defects presumed to be twin-caused defects can be confirmed as a group of bright spots distributed in a line shape. Therefore, in the method for evaluating the silicon single crystal ingot, as follows, an evaluation regarding the twin generation region is performed on the silicon single crystal ingot to be evaluated. Create an overlapping map by overlapping the bright spot maps obtained for the epitaxial layer surfaces of the plurality of silicon epitaxial wafers. The creation of the overlapping map can be performed in the analysis unit of the laser surface inspection apparatus or by known analysis software. Then, the following estimation criterion A is adopted to perform an estimation regarding the twin generation region.

[0032] (Estimation criterion A) If no cluster of bright spots in which multiple bright spots of three or more points are linearly distributed is confirmed in the created overlay map, it is presumed that the region from which the plurality of silicon wafers are cut out in the silicon single crystal ingot to be evaluated is not a twin generation region. On the other hand, if a cluster of bright spots in which multiple bright spots of three or more points are linearly distributed is confirmed in the overlay map, in the silicon single crystal ingot to be evaluated, the region from which the plurality of silicon wafers in which the bright spots included in the cluster of bright spots are confirmed are cut out is presumed to be a twin generation region.

[0033] As an example, FIG. 1 shows a specific example of an overlay map. The overlay map shown in FIG. 1 is an overlay map created by the following method. A silicon single crystal ingot with a plane orientation of <100> was grown by the Czochralski method. A region having an axial length of about 110 mm was cut from the straight body portion of the grown silicon single crystal ingot to obtain a block. Wafers with a thickness of 1 mm were continuously sliced from the obtained block, and a total of 78 silicon wafers were obtained by continuous sampling. The plurality of silicon wafers obtained above were each processed into silicon mirror wafers by a known method. For the plurality of silicon mirror wafers obtained above, silicon single crystals were epitaxially grown on the mirror-finished surfaces thereof by a known method to form an epitaxial layer with a thickness of 0.5 μm, and processing into silicon epitaxial wafers was performed. For the surfaces of the epitaxial layers of the plurality of silicon epitaxial wafers (diameter 300 mm) obtained above, a bright spot map of the epitaxial layer surface was acquired using a Surfscan series SP5 manufactured by KLA TENCOR as a laser surface inspection device. The overlay map obtained by overlaying the bright spot maps obtained for the plurality of silicon epitaxial wafers in the analysis unit of the same laser surface inspection device is the overlay map shown in FIG. 1.

[0034] In the overlay map shown in FIG. 1, a group of bright spots distributed linearly with a length of about 60 mm can be confirmed in the portion surrounded by the dotted line in FIG. 1. In the present invention and this specification, the "group of bright spots distributed linearly" refers to a group of bright spots whose distribution shape is linear. The linear shape described here is not limited to a perfect straight line, but also includes a shape that can be generally recognized as a substantially straight line. Further, in the group of bright spots distributed linearly, it is not essential that adjacent bright spots are in contact with each other, and adjacent bright spots may be in contact or separated from each other. Further, the length of the group of bright spots distributed linearly refers to the actual size, that is, the actual size on the surface of the epitaxial layer. The length of the group of bright spots distributed linearly refers to the distance between the bright spot at one end and the bright spot at the other end in the group of bright spots distributed linearly, and can be, for example, 2 mm or more, and can be, for example, 100 mm or less, but may be longer. The overlay map shown in FIG. 1 was obtained using the Surfscan series SP5 manufactured by KLA TENCOR as a laser surface inspection device, but it was confirmed that similar overlay maps can be obtained using SP1, SP2, SP3, SP5, and SP7 of the same series.

[0035] In one form, in addition to the estimation criterion A, by utilizing the fact that twins are plane defects generated in a certain direction in a silicon single crystal ingot, one, two, or three of the following additional estimation criteria 1A to 3A can be further adopted.

[0036] (Additional Estimation Criterion 1A) When a group of bright spots in which three or more bright spots are distributed linearly is confirmed in the above overlay map, for a plurality of silicon wafers in which the bright spots included in such a group of bright spots are confirmed, a proportional relationship is established between the position coordinates of the bright spots and the cutting position in the axial direction of the silicon single crystal ingot. The region from which the plurality of silicon wafers in which the bright spots included in the above group of bright spots are confirmed are cut out is estimated as the twin generation region.

[0037] Figure 2 is a graph in which the position coordinates (X coordinate or Y coordinate) of each bright point included in the group of bright points distributed linearly in the overlay map shown in Figure 1 are plotted against the cutting position of each silicon wafer in the axial direction of the silicon single crystal ingot to be evaluated. In the graph shown in Figure 2, the horizontal axis indicates the axial position with the position of the top on the shoulder side of the silicon single crystal ingot being set to 0 mm. Regarding additional estimation criterion 1A, "a proportional relationship holds" means that a straight line with a square of the correlation coefficient R 2 of 0.80 or more and 1.00 or less can be created by fitting by the least squares method for the vertical axis y and the horizontal axis x. In the graph shown in Figure 2, for both the X coordinate and the Y coordinate, by fitting by the least squares method for the vertical axis y and the horizontal axis x, R 2 = 0.80 or more Upper 1 .00 or less of a straight line could be created. The proportional relationship described for additional estimation criterion 1 A shall hold for at least one of the X coordinate and the Y coordinate among the position coordinates of the bright points, and it is preferable that it holds for both.

[0038] (Additional Estimation Criterion 2A) The plane orientation of the silicon single crystal ingot to be evaluated is <100>, and in this silicon single crystal ingot Two {111} Surfaces twinning is Surfaces through which propagation occurs further estimated.

[0039] (Additional Estimation Criterion 3A) The plane orientation of the silicon single crystal ingot to be evaluated is <100>. When a group of bright points in which three or more bright points are distributed linearly is confirmed in the above-mentioned overlay map, for at least one of such a plurality of bright points, the defect existing at the position where the bright point is confirmed is observed with an atomic force microscope, and based on the shape of the observed defect, in the silicon single crystal ingot to be evaluated Two {111} Of the surfaces either one is twinning Surfaces through which propagation occurs and further estimated.

[0040] The above additional estimation criteria 2A and 3A are based on the following crystallographic findings. Finding 1: In a silicon single crystal with a plane orientation of <100>, twins propagate on the {111} plane. Finding 2: FIG. 3 is an explanatory diagram of the crystal lattice of a silicon single crystal with a plane orientation of <100>. For a silicon single crystal ingot with a plane orientation of <100>, in the overlay map created as described above, the distribution lines of the group of bright spots linearly distributed appear on the boundary line between the {111} plane and the {110} plane. Such boundary lines are the solid line and the dotted line shown in FIG. 3.

[0041] According to the additional estimation criterion 2A, based on Finding 1 and Finding 2, from the inclination with respect to the crystal growth direction (axial direction of the silicon single crystal ingot), the {111} of Maru 1, Maru 2, Maru 3, and Maru 4 in FIG. 3 Of the surface Among them, the {111} of Maru 3 and Maru 4 Surfaces twin Surfaces through which propagation occurs can be estimated.

[0042] In the additional estimation criterion 3A, when a group of bright spots in which a plurality of bright spots are linearly distributed is confirmed in the overlay map, for at least one of such a plurality of bright spots, the defect existing at the position where the bright spot is confirmed is observed by an atomic force microscope. FIG. 4 is an AFM image obtained by observing one of the bright spots included in the group of bright spots linearly distributed in the overlay map shown in FIG. 1 by an atomic force microscope (AFM). In the AFM image shown in FIG. 4, it can be estimated that twins occur in the direction marked with a solid line. Also, in the AFM image shown in FIG. 4, it can be estimated that partial dislocations occur in the direction marked with a dotted line. The direction marked with a dotted line in FIG. 4 coincides with the direction of the boundary line shown by the dotted line in the crystal lattice shown in FIG. 3. As described above, in the additional estimation criterion 2A, the Two {111} Surfaces twin Surfaces through which propagation occursIt can be presumed. On the other hand, according to the additional presumption criterion 3A, from the inclination with respect to the crystal growth direction (axial direction of the silicon single crystal ingot) and the direction in which twins are presumed to occur in the AFM image (for example, the direction marked with a solid line in FIG. 4), the {111} of the mark 3 in FIG. 3 Surfaces twin Surfaces through which propagation occurs can be presumed.

[0043] According to the method for evaluating the silicon single crystal ingot as described above, it is possible to evaluate the twin generation region in the silicon single crystal ingot as described above.

[0044] [Method for Evaluating Silicon Epitaxial Wafer] The method for evaluating a silicon epitaxial wafer according to one aspect of the present invention is such that the silicon epitaxial wafers to be evaluated are three or more silicon epitaxial wafers in which an epitaxial layer is formed on the polished surface of a silicon mirror wafer that is cut out from the same silicon single crystal ingot and polished, obtaining a bright point map for the epitaxial layer surfaces of the plurality of silicon epitaxial wafers by a laser surface inspection device, and creating an overlapping map by overlapping the bright point maps obtained for the epitaxial layer surfaces of the plurality of silicon epitaxial wafers. Then, when no bright point group in which a plurality of bright points are linearly distributed is confirmed in the overlapping map, it is presumed that there are no twin-induced defects in the silicon epitaxial wafers to be evaluated, and when the bright point group linearly distributed is confirmed, it is presumed that twin-induced defects exist in the plurality of silicon epitaxial wafers in which the bright points included in this bright point group are confirmed. Multiple silicon epitaxial wafer

[0045] Regarding the method for evaluating the above silicon epitaxial wafer, for the silicon single crystal ingot, silicon mirror wafer, silicon epitaxial wafer, acquisition of the bright point map, and creation of the overlay map, reference can be made to the previous description regarding the method for evaluating the above silicon single crystal ingot. And in the method for evaluating the above silicon epitaxial wafer, the following estimation criterion B is adopted to evaluate the twin-induced defects. The twin-induced defects refer to the surface defects that appear on the surface of the silicon epitaxial wafer due to twins contained in the substrate (i.e., the silicon mirror wafer) on which the epitaxial layer is provided in the silicon epitaxial wafer. Such surface defects can be, as described previously, surface defects that are recessed in a crevice shape. Regarding the estimation criterion B, reference can be made to the previous description regarding the estimation criterion A.

[0046] (Estimation criterion B) If no bright point group in which a plurality of three or more bright points are linearly distributed is confirmed in the created overlay map, it is estimated that there are no twin-induced defects in the silicon epitaxial wafer to be evaluated. On the other hand, if a bright point group in which a plurality of three or more bright points are linearly distributed is confirmed in the above overlay map, it is estimated that twin-induced defects exist in the plurality of silicon epitaxial wafers in which the bright points included in this bright point group are confirmed.

[0047] Furthermore, in the method for evaluating the above silicon epitaxial wafer, in addition to the estimation criterion B, by utilizing the fact that twins are plane defects that occur in a certain direction in the silicon single crystal ingot, the following additional estimation criterion 1B can be further adopted. Regarding the additional estimation criterion 1B, reference can be made to the previous description regarding the additional estimation criterion 1A.

[0048] (Additional estimation criterion 1B) When a group of bright spots in which a plurality of three or more bright spots are linearly distributed is confirmed in the above-mentioned superposed map, for a plurality of silicon epitaxial wafers in which the bright spots included in this group of bright spots are confirmed, a proportional relationship is established between the position coordinates of the bright spots and the cutting position in the axial direction of the silicon single crystal ingot. It is presumed that twin-induced defects exist in the plurality of silicon epitaxial wafers in which the bright spots included in the group of bright spots are confirmed.

[0049] [Method for manufacturing silicon epitaxial wafer] The method for manufacturing a silicon epitaxial wafer according to one aspect of the present invention includes cutting out three or more silicon wafers from the same silicon single crystal ingot, processing the plurality of silicon wafers into silicon mirror wafers by performing mirror finishing, and forming an epitaxial layer on the surface of the plurality of silicon mirror wafers that has been mirror-finished to process the silicon epitaxial wafers, evaluating the plurality of silicon epitaxial wafers by the evaluation method of the silicon epitaxial wafers, and, as a result of the evaluation, subjecting the silicon epitaxial wafers presumed to have no twin-induced defects to one or more steps for shipping as product silicon epitaxial wafers. Specific examples of the steps for shipping as product silicon epitaxial wafers can include a packing step and the like.

[0050] According to the method for manufacturing a silicon epitaxial wafer, it is possible to ship as a product silicon epitaxial wafer a silicon epitaxial wafer in which it is presumed that there are no twin-induced defects, that is, surface defects that appear on the surface of the silicon epitaxial wafer due to twins included in the substrate (silicon mirror wafer) of the silicon epitaxial wafer. Fabricating a semiconductor device using the product silicon epitaxial wafer thus shipped can contribute to providing a semiconductor device that can exhibit excellent device characteristics.

[0051] For details of the method for manufacturing the silicon epitaxial wafer, reference can be made to the previous description regarding the method for evaluating the silicon single crystal ingot and the previous description regarding the method for evaluating the silicon epitaxial wafer.

[0052] [Method for Evaluating Silicon Mirror Wafer] The method for evaluating a silicon mirror wafer according to one aspect of the present invention is such that the silicon mirror wafers to be evaluated are cut from the same silicon single crystal ingot and subjected to mirror finishing Three or more multiple silicon mirror wafers, processing the plurality of silicon mirror wafers into silicon epitaxial wafers by forming an epitaxial layer on the surface subjected to mirror finishing, obtaining a bright point map for the epitaxial layer surface of the plurality of silicon epitaxial wafers using a laser surface inspection device, and creating an overlay map by overlaying the bright point maps obtained for the epitaxial layer surfaces of the plurality of silicon epitaxial wafers. Regarding the method for evaluating the silicon mirror wafer, reference can be made to the previous description regarding the method for evaluating the silicon single crystal ingot for the silicon single crystal ingot, silicon mirror wafer, silicon epitaxial wafer, acquisition of the bright point map, and creation of the overlay map. And in the method for evaluating the silicon mirror wafer, the following estimation criterion C is adopted to evaluate the silicon mirror wafer for twins. For estimation criterion C, reference can be made to the previous description regarding estimation criterion A.

[0053] (Estimation Criterion C) When no bright point group in which a plurality of three or more bright points are linearly distributed is confirmed in the overlay map, it is presumed that no twins exist in the silicon mirror wafer to be evaluated. On the other hand, when a bright point group in which a plurality of three or more bright points are linearly distributed is confirmed in the overlay map, it is presumed that twins exist in the silicon mirror wafers included in the plurality of silicon epitaxial wafers in which the bright points included in this bright point group are confirmed.

[0054] Furthermore, in the method for evaluating the silicon mirror wafer, in addition to the estimation criterion C, the following additional estimation criterion 1C can be further adopted by utilizing the fact that twins are plane defects that occur in a certain direction in the silicon single crystal ingot. Regarding the additional estimation criterion 1C, reference can be made to the previous description regarding the additional estimation criterion 1A.

[0055] (Additional Estimation Criterion 1C) When a group of bright spots in which three or more bright spots are linearly distributed is confirmed in the above-mentioned superposition map, for the plurality of silicon epitaxial wafers in which the bright spots included in this group of bright spots are confirmed, a proportional relationship is established between the position coordinates of the bright spots and the cutting position in the axial direction of the above-mentioned silicon single crystal ingot. It is presumed that twins exist in the silicon mirror wafers included in the plurality of silicon epitaxial wafers in which the bright spots included in the above-mentioned group of bright spots are confirmed.

[0056] As described above, twins occur in a certain direction in the silicon single crystal ingot. Therefore, for example, by evaluating a part of a plurality of silicon mirror wafers cut from the same silicon single crystal ingot and processed into silicon mirror wafers by the method for evaluating the silicon mirror wafer, it is possible to estimate the presence or absence of the twin generation region and the position of the twin generation region for the above-mentioned silicon single crystal ingot. As a result of such estimation, it is possible to specify a region where it is presumed that no twins have occurred for the above-mentioned silicon single crystal ingot. Furthermore, the silicon mirror wafer obtained by processing the wafer cut from the region thus specified can be subjected to one or more steps for shipping as a product wafer. For example, determining the silicon mirror wafer to be shipped as a product wafer as described above can contribute to shipping a silicon mirror wafer not containing twins as a product wafer.

Industrial Applicability

[0057] One aspect of the present invention is useful in the fields of manufacturing silicon single crystal ingots, manufacturing silicon epitaxial wafers, and manufacturing silicon mirror wafers.

Claims

1. cutting out a plurality of three or more silicon wafers from a silicon single crystal ingot to be evaluated; processing the plurality of silicon wafers into silicon mirror wafers by performing mirror finishing; processing the plurality of silicon mirror wafers obtained by processing the silicon wafers into silicon epitaxial wafers by forming an epitaxial layer on the mirror-finished surface; obtaining a bright point map for the surface of the epitaxial layer of the plurality of silicon epitaxial wafers obtained by processing the silicon wafers into silicon epitaxial wafers by means of a laser surface inspection device, and creating a superimposed map by superimposing the bright point maps obtained for the surfaces of the epitaxial layers of the plurality of silicon epitaxial wafers; including when no group of bright points linearly distributed at three or more points is confirmed in the superimposed map, presuming that the region from which the plurality of silicon wafers in the silicon single crystal ingot to be evaluated were cut out is not a twin generation region; when a group of bright points linearly distributed is confirmed in the superimposed map, presuming that the region from which the plurality of silicon wafers in which the bright points included in the group of bright points were confirmed in the silicon single crystal ingot to be evaluated were cut out is a twin generation region; A method for evaluating a silicon single crystal ingot.

2. The method for evaluating a silicon single crystal ingot according to claim 1, wherein the group of bright points linearly distributed is a group of bright points linearly distributed with a length of 2 mm or more.

3. The method for evaluating a silicon single crystal ingot according to claim 1 or 2, wherein the formation of the epitaxial layer is to form an epitaxial layer with a film thickness of 0.5 μm or more.

4. When a group of bright spots in which a plurality of three or more bright spots are linearly distributed is confirmed in the superposition map, for the plurality of silicon wafers on which the bright spots included in the group of bright spots are confirmed, a proportional relationship is established between the position coordinates of the bright spots and the cutting position in the axial direction of the silicon single crystal ingot. The method for evaluating a silicon single crystal ingot according to any one of claims 1 to 3, further adopting as an estimation criterion for estimating the region where the plurality of silicon wafers on which the bright spots included in the group of bright spots are confirmed are cut out as a twin generation region.

5. The plane orientation of the silicon single crystal ingot to be evaluated is <100>, and it is further estimated that in the silicon single crystal ingot, two {111} planes are planes in which twins are propagating. The method for evaluating a silicon single crystal ingot according to any one of claims 1 to 4.

6. The plane orientation of the silicon single crystal ingot to be evaluated is <100>, When a group of bright spots in which a plurality of three or more bright spots are linearly distributed is confirmed in the superposition map, for at least one of the plurality of bright spots, defects existing at the position where the bright spots are confirmed are observed with an atomic force microscope, and based on the shape of the observed defects, it is further estimated that in the silicon single crystal ingot to be evaluated, one of the two {111} planes is a plane in which twins are propagating. The method for evaluating a silicon single crystal ingot according to any one of claims 1 to 4.

7. A method for evaluating a silicon epitaxial wafer, The silicon epitaxial wafer to be evaluated is a plurality of three or more silicon epitaxial wafers in which an epitaxial layer is formed on the polished surface of a silicon mirror wafer that is cut from the same silicon single crystal ingot and polished, Obtaining a bright spot map for the epitaxial layer surfaces of the plurality of silicon epitaxial wafers by a laser surface inspection device, and, Creating a superimposed map by superimposing the bright point maps obtained for the surfaces of the epitaxial layers of the plurality of silicon epitaxial wafers, including, when no group of bright points in which a plurality of three or more bright points are linearly distributed is confirmed in the superimposed map, it is presumed that there are no twin-induced defects in the silicon epitaxial wafer to be evaluated, when a group of bright points linearly distributed is confirmed, it is presumed that twin-induced defects exist in the plurality of silicon epitaxial wafers in which the bright points included in the group of bright points are confirmed. A method for evaluating a silicon epitaxial wafer.

8. The group of bright points linearly distributed is a group of bright points linearly distributed with a length of 2 mm or more. The method for evaluating a silicon epitaxial wafer according to claim 7.

9. The epitaxial layer is an epitaxial layer having a film thickness of 0.5 μm or more. The method for evaluating a silicon epitaxial wafer according to claim 7 or 8.

10. When a group of bright points in which a plurality of three or more bright points are linearly distributed is confirmed in the superimposed map, for the plurality of silicon epitaxial wafers in which the bright points included in the group of bright points are confirmed, a proportional relationship is established between the position coordinates of the bright points and the cutting position in the axial direction of the silicon single crystal ingot. Further adopted as a presumption criterion for presuming that twin-induced defects exist in the plurality of silicon epitaxial wafers in which the bright points included in the group of bright points are confirmed. The method for evaluating a silicon epitaxial wafer according to any one of claims 7 to 9.

11. A method for manufacturing a silicon epitaxial wafer, Cutting out three or more silicon wafers from the same silicon single crystal ingot, Processing the plurality of silicon wafers into silicon mirror wafers by performing mirror finishing, Processing a plurality of silicon mirror wafers obtained by processing the silicon mirror wafer to form an epitaxial layer on the mirror-finished surface to obtain a silicon epitaxial wafer, Evaluating a plurality of silicon epitaxial wafers obtained by processing the silicon epitaxial wafer by the evaluation method according to any one of claims 7 to 10, and, Subjecting the silicon epitaxial wafer, for which it is presumed as a result of the evaluation that there are no twins-induced defects, to one or more steps for shipping as a product silicon epitaxial wafer, A method for manufacturing a silicon epitaxial wafer, comprising:

12. An evaluation method for a silicon mirror wafer, comprising: The silicon mirror wafer to be evaluated is a plurality of three or more silicon mirror wafers cut from the same silicon single crystal ingot and subjected to mirror finishing, Processing the plurality of silicon mirror wafers to form an epitaxial layer on the mirror-finished surface to obtain a silicon epitaxial wafer, Obtaining a bright point map for the surface of the epitaxial layer of a plurality of silicon epitaxial wafers obtained by processing the silicon mirror wafer with a laser surface inspection device, and, Creating an overlay map by overlaying the bright point maps obtained for the surfaces of the epitaxial layers of the plurality of silicon epitaxial wafers, Including: When no group of bright points in which a plurality of three or more bright points are linearly distributed is confirmed in the overlay map, it is presumed that there are no twins in the silicon mirror wafer to be evaluated, When the group of bright points linearly distributed is confirmed, it is presumed that there are twins in the silicon mirror wafers included in the plurality of silicon epitaxial wafers in which the bright points included in the group of bright points are confirmed. An evaluation method for a silicon mirror wafer.

13. The method for evaluating a silicon mirror wafer according to claim 12, wherein the group of bright spots distributed in a line shape is a group of bright spots distributed in a line shape having a length of 2 mm or more.

14. The method for evaluating a silicon mirror wafer according to claim 12 or 13, wherein the epitaxial layer is an epitaxial layer having a film thickness of 0.5 μm or more.

15. When a group of bright spots in which a plurality of bright spots at three or more points are distributed in a line shape is confirmed in the superposition map, for the plurality of silicon epitaxial wafers in which the bright spots included in the group of bright spots are confirmed, a proportional relationship is established between the position coordinates of the bright spots and the cutting position in the axial direction of the silicon single crystal ingot. Further adopted as an estimation criterion for estimating that twins are present in the silicon mirror wafer included in the plurality of silicon epitaxial wafers in which the bright spots included in the group of bright spots are confirmed. The method for evaluating a silicon mirror wafer according to any one of claims 12 to 14.

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