Protection Circuit and Receiver
The protection circuit in the HDMI receiver addresses the issue of out-of-spec voltages due to reflection or resonance by setting and enforcing voltage limits on the control signal, thereby ensuring reliable operation and protecting the device from voltage-related malfunctions.
Patent Information
- Application Number
- JP2021155680
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-09-24
- Publication Date
- 2025-06-24
- Estimated Expiration
- 2041-09-24
AI Technical Summary
HDMI receivers face protection challenges due to out-of-spec voltages caused by reflection or resonance during HDMI connection, which existing technologies, such as those described in Patent Document 1, fail to adequately address.
A protection circuit is implemented in the receiving device, comprising a receiving unit for DC voltage, lower and upper limit voltage setting units, and a switching unit that only allows the control signal to pass through to the data reception processing unit if the voltage is within the predetermined range.
This solution effectively protects the HDMI receiver from malfunctioning due to out-of-spec voltages caused by reflection or resonance, ensuring reliable operation by only allowing signals within the specified voltage range to be processed.
Smart Images

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Abstract
Description
Technical Field
[0001] The present invention relates to a protection circuit and a receiving device.
Background Art
[0002] In recent years, as one of the interfaces for connecting AV (Audio Visual) devices to each other and transmitting video data and audio data, HDMI (High Definition Multimedia Interface) (registered trademark) has become widespread. With HDMI, video data and audio data can be transmitted at high speed through a single cable.
[0003] In such input / output circuits for interface connection, a protection circuit is used to prevent malfunction and failure due to external disturbances such as noise. As a related technology, for example, Patent Document 1 is known. Patent Document 1 describes a limiter circuit that cuts off voltage components higher than the upper limit voltage and lower than the lower limit voltage from the input voltage.
Prior Art Documents
Patent Documents
[0004]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0005] An HDMI cable for HDMI connection includes a data line for transmitting video data and audio data, and a control line for transmitting various control signals. This control line includes a DC 5V power supply line for supplying DC (direct current) 5V. In an interface including such signal lines, when connecting a cable connected to a transmitter to a receiver, an out-of-spec voltage may be supplied to the receiver due to reflection or resonance. Note that in Patent Document 1, the effects of reflection and resonance are not considered, so there is a risk that the receiver cannot be reliably protected. For this reason, in related technologies, there is a problem that it may be difficult to protect a device when a control signal of an out-of-spec voltage is input due to reflection or resonance.
Means for Solving the Problem
[0006] The present invention provides a protection circuit including: a receiving unit that receives a control signal of a predetermined DC voltage supplied from a transmitting device via a data transmission interface; a lower limit voltage setting unit that sets a lower limit voltage of the control signal; an upper limit voltage setting unit that sets an upper limit voltage of the control signal; and a switching unit that passes the control signal to a data reception processing unit of the data transmission interface when the voltage of the control signal is within the range of the lower limit voltage and the upper limit voltage, and does not pass the control signal to the data reception processing unit when the voltage of the control signal is outside the range of the lower limit voltage and the upper limit voltage.
[0007] The present invention also provides a receiving device including the above protection circuit, and further including a data reception processing unit of the data transmission interface.
Effects of the Invention
[0008] According to the present invention, it is possible to provide a protection circuit and a receiving device capable of protecting a device when a signal of an out-of-spec voltage is input due to reflection or resonance.
Brief Description of the Drawings
[0009]
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
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Figure 8
Figure 9
Figure 10
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Figure 12
Embodiments for Carrying Out the Invention
[0010] Hereinafter, embodiments will be described with reference to the drawings. In each drawing, the same elements are denoted by the same reference numerals, and redundant explanations are omitted as necessary.
[0011] (Overview of the Embodiment) First, examine the related technologies before applying the embodiments. As described above, the HDMI cable includes a DC5V power supply line. When connecting a transmitter and a receiver with the HDMI cable, first, DC5V is supplied from the transmitter to the receiver through the DC5V power supply line. Since this DC5V is a DC signal, no special circuits such as protection circuits are installed in the related technologies. However, reflection and resonance may occur at the termination inside the receiver at the moment when DC5V is input to the receiver side, which may cause the receiver to malfunction depending on the state of the device and the cable.
[0012] FIG. 1 shows a normal usage example of HDMI in the related technology. In FIG. 1, a transmitter 2 as a source device and a receiver 1 as a sink device are arranged in a state connected via an HDMI cable 3. By turning on the power of the transmitter 2 and the receiver 1 from that state, the use of the transmitter 2 and the receiver 1 is started. Then, a DC voltage is supplied from the DC5V terminal on the transmitter 2 side, and the DC voltage is transmitted to the DC5V terminal on the receiver 1 side through the DC5V power supply line of the HDMI cable 3.
[0013] FIG. 2 shows the voltage waveforms observed at the DC5V terminal on the transmitter 2 side and the DC5V terminal on the receiver 1 side at this time. As shown in FIG. 2, in normal use as in FIG. 1, the voltage rise time is long, and the influence due to reflection on the receiver 1 side ends during the voltage rise period. Therefore, the waveforms of the DC5V signals on both the transmitter 2 side and the receiver 1 side become stable and normal waveforms. That is, as shown in FIG. 2(a), at the DC5V terminal on the transmitter 2 side, it gradually rises in a ramp shape from 0V to 5V, and a constant voltage of 5V is output. As shown in FIG. 2(b), at the DC5V terminal on the receiver 1 side, it also rises from 0V to 5V in the same way, and a constant voltage of 5V is input.
[0014] FIG. 3 shows another usage example of HDMI in related technologies. In FIG. 3, the HDMI cable 3 is connected only to the transmitter 2 side. When the power of the transmitter 2 is turned on with the HDMI cable 3 not connected to the receiver 1 side as shown in FIG. 3, DC5V is output from the DC5V terminal on the transmitter 2 side to the tip (open end) of the HDMI cable 3. In that state, the HDMI cable 3 may be inserted into the HDMI terminal of the receiver 1 to start use.
[0015] FIG. 4 shows the voltage waveforms observed at the DC5V terminal on the transmitter 2 side and the DC5V terminal on the receiver 1 side when the HDMI cable 3 is connected to the receiver 1 in the state of FIG. 3. As shown in FIG. 4, when the HDMI cable 3 is connected with 5V being output on the transmitter 2 side, the waveform of the DC5V terminal on the receiver 1 side rises steeply. For this reason, reflection occurs, and due to its influence, there may be a period during which the terminal voltage on the receiver 1 side greatly exceeds 5V. That is, as shown in FIG. 4(a), a constant voltage of DC5V is output at the DC5V terminal on the transmitter 2 side, but as shown in FIG. 4(b), at the DC5V terminal on the receiver 1 side, it rises steeply from 0V and greatly exceeds 5V. Then, the voltage fluctuates greatly, once drops below 5V, and then stabilizes at 5V. Overvoltage also occurs when static noise is applied, but in the case of reflection, it is a fluctuation of a frequency component lower than that of static noise.
[0016] The cause of such reflection will be further explained. The HDMI cable 3 connected to the powered-on transmitter 2 has DC5V applied from the transmitter 2 and is in a state where the charge is charged. When the receiver 1 is connected to the HDMI cable 3 from that state, the charge charged in the HDMI cable 3 flows out toward the receiver 1. At that time, due to the influence of the parasitic LC components in the wiring up to the HDMI cable 3 and the receiver 1 (the load to which DC5V is applied), the current may not flow uniformly and constantly. At this time, in the interior of the HDMI cable 3, areas with a large amount of charge and areas with a small amount of charge (density) occur. As a result, when the voltage reaches the receiver 1 while fluctuating, a reflection phenomenon occurs in the same way as in a high-frequency circuit.
[0017] After the charge replenishment for the insufficient amount from the transmitter 2 is completed, it stabilizes at DC 5V and this phenomenon ends. Therefore, the longer the HDMI cable, the greater the influence of reflection and the longer the period until it ends. For example, an HDMI optical cable for long-distance transmission may be used. In an HDMI optical cable, the data line is an optical fiber, but the control line is a metal wire, so the influence of reflection increases according to the cable length.
[0018] Figure 5 shows an overview of the receiver 10 according to the embodiment. In the embodiment, in order to prevent the failure of the receiver 10 due to the influence such as reflection as described above, a protection circuit 11 is added. The protection circuit 11 is not an electrostatic (ESD) protection component, but a protection circuit dedicated to countermeasures against reflection, that is, a reflection suppression circuit. In this way, by mounting a reflection countermeasure circuit on the DC 5V input part on the HDMI receiver side, it is possible to prevent the failure of the device due to reflection generated on the receiver side when connecting to the transmitter.
[0019] (Embodiment 1) Next, Embodiment 1 will be described with reference to the drawings. Figure 6 shows a configuration example of the receiver according to this embodiment. The receiver 10 according to this embodiment is a receiving device that receives video data and audio data from the transmitter 2 via the HDMI cable 3. The receiver 10 is, for example, a projector device, but may also be various display devices or other receiving devices. In the case of a device installed at a location far from the transmitter 2 such as a projector device, the length of the HDMI cable 3 becomes long, so it is easily affected by reflection. Note that HDMI is an example of a data transmission interface, and other interfaces that transmit and receive data and control signals in the same way as HDMI may also be used.
[0020] As shown in FIG. 6, the receiver 10 includes a protection circuit 11, an input / output circuit 12, and an HDMI receiving LSI (Large Scale Integration) 13. The input / output circuit 12 is provided with terminals for inserting and removing the HDMI cable 3, and inputs and outputs data and control signals via the HDMI cable 3. The input / output circuit 12 outputs a DC 5V signal, which is one of the control signals from the HDMI cable 3, to the protection circuit 11, and inputs and outputs other control signals and data signals to and from the HDMI receiving LSI 13.
[0021] The protection circuit 11 supplies only the DC 5V signal with a normal voltage to the HDMI receiving LSI 13 and protects the HDMI receiving LSI 13 from the DC 5V signal with an abnormal voltage. When the voltage of the DC 5V signal input from the input / output circuit 12 is within a predetermined range, the protection circuit 11 passes the DC 5V signal to the HDMI receiving LSI 13. When the voltage of the input DC 5V signal is outside the predetermined range, the protection circuit 11 cuts off the output of the DC 5V signal and does not pass it to the HDMI receiving LSI 13. For example, the protection circuit 11 sets the upper limit voltage and the lower limit voltage of the DC 5V signal and passes only the DC 5V signal within the range of the set upper limit voltage and lower limit voltage. By blocking at least a signal higher than a predetermined upper limit voltage, the HDMI receiving LSI 13 can be protected from overvoltage. Also, by blocking a signal lower than a predetermined lower limit voltage, malfunction of the HDMI receiving LSI 13 can be prevented.
[0022] The HDMI receiving LSI 13 is an HDMI data receiving processing unit that processes data and control signals received from the transmitter 2 via the HDMI cable 3. The HDMI receiving LSI 13 receives the DC 5V signal from the protection circuit 11 and inputs and outputs other control signals and data to and from the input / output circuit 12. When the HDMI receiving LSI 13 detects the DC 5V signal from the protection circuit 11, it generates an HPD (Hot Plug Detect) signal and responds to the transmitter 2 via the input / output circuit 12 with the generated HPD signal. Also, it outputs receiver information to the transmitter 2 by a DDC (Display Data Channel) signal.
[0023] FIG. 7 shows a configuration example of the input / output circuit 12 according to the present embodiment. As shown in FIG. 7, the input / output circuit 12 includes a terminal portion 121, a DC 5V output portion 122, and an electrostatic protection portion 123.
[0024] The terminal portion 121 is an HDMI connector for inserting and removing the HDMI cable 3, and includes a plurality of terminals corresponding to each wire of the HDMI cable 3 to be inserted. For example, the terminal portion 121 includes a DC 5V terminal T21 connected to the DC 5V power supply line, an HPD terminal T22 connected to the HPD line, a DDC terminal T23 connected to the DDC line, a data terminal T24 connected to the data line, and the like. The DC 5V terminal T21 is connected to the DC 5V output portion 122, and the HPD terminal T22, the DDC terminal T23, and the data terminal T24 are connected to the HDMI receiving LSI 13. Note that the DC 5V power supply line, the HPD line, and the DDC line are examples of control signals, and the control lines further include a CEC line (Consumer Electronics Control) and the like. The data signal is a differential signal. For example, the data line and the data terminal T24 include a data transmission line, a clock transmission line, and each terminal for transmitting three differential signals.
[0025] The DC 5V output portion 122 outputs the DC 5V signal input from the HDMI cable 3 to the DC 5V terminal T21 to the protection circuit 11. The DC 5V output portion 122 includes an output terminal T20 connected to the DC 5V terminal T21, and outputs the DC 5V signal from the output terminal T20.
[0026] The electrostatic protection unit 123 blocks the electrostatic noise of the data signal input to the data terminal T24 and protects the HDMI receiving LSI 13. In this example, the electrostatic protection unit 123 includes a bidirectional Zener diode D21 as an electrostatic protection element. The bidirectional Zener diode D21 is connected between the data terminal T24 and the ground GND. When a voltage exceeding a predetermined voltage is applied to the bidirectional Zener diode D21, it enters the short-circuit mode and current starts to flow. Therefore, when an overvoltage is input from the data line, the current flows to the ground GND through the bidirectional Zener diode D21, preventing a signal of a voltage equal to or higher than the predetermined voltage from being input to the HDMI receiving LSI 13. Also, since the bidirectional Zener diode D21 has the same characteristics in both directions, it can be similarly protected against negative overvoltage.
[0027] In this way, a receiver can be protected from steep electrostatic noise by an electrostatic protection element such as a Zener diode. However, in the case of reflection, it is a fluctuation of a lower frequency component that rises and falls more gently than electrostatic noise, so it cannot be sufficiently protected by an electrostatic protection element. Therefore, in this embodiment, a dedicated protection circuit protects the device from the influence of reflection.
[0028] FIG. 8 shows a configuration example of the protection circuit 11 according to this embodiment. As shown in FIG. 8, the protection circuit 11 includes a DC 5V input unit 111, a lower voltage setting unit 112, an upper voltage setting unit 113, and a DC 5V output switching unit 114.
[0029] The DC 5V input unit 111 is a receiving unit that receives DC 5V supplied from the transmitter 2 via the HDMI cable 3. The DC 5V input unit 111 outputs the DC 5V signal input from the input / output circuit 12 to the lower voltage setting unit 112, the upper voltage setting unit 113, and the DC 5V output switching unit 114. The DC 5V input unit 111 includes an input terminal T11 connected to the output terminal T20 of the input / output circuit 12, and the DC 5V signal from the HDMI cable 3 is input to the input terminal T11.
[0030] A capacitor C1 and a capacitor C2 are connected in parallel between an input terminal T11 and a ground GND. An inductor L1 is connected between a node between the input terminal T11 and the capacitors C1 and C2, a lower voltage setting unit 112, an upper voltage setting unit 113, and a DC 5V output switching unit 114. The capacitors C1 and C2 and the inductor L1 constitute a low-pass filter to remove high-frequency noise of the DC 5V signal.
[0031] The lower voltage setting unit 112 sets a lower voltage for passing the DC 5V signal. When the voltage of the DC 5V signal from the DC 5V input unit 111 is higher than the set lower voltage, the lower voltage setting unit 112 controls the DC 5V output switching unit 114 to pass the DC 5V signal. When the voltage of the DC 5V signal from the DC 5V input unit 111 is lower than the set lower voltage, the lower voltage setting unit 112 controls the DC 5V output switching unit 114 not to pass the DC 5V signal.
[0032] The lower voltage setting unit 112 includes a Zener diode D1, resistors R1 to R3, a capacitor C3, and an NPN transistor TR1. A Zener diode D1 and a resistor R2 are connected in series between the inductor L1 of the DC 5V input unit 111 and the base (control terminal) of the NPN transistor TR1. The inductor L1 is connected to the cathode of the Zener diode D1, and the resistor R2 is connected to the anode of the Zener diode D1.
[0033] A resistor R1 is connected between the node between the Zener diode D1 and the resistor R2 and the emitter (ground GND) of the NPN transistor TR1. A resistor R3 and a capacitor C3 are connected in parallel between the node between the resistor R2 and the base of the NPN transistor TR1 and the emitter (ground GND) of the NPN transistor TR1. The collector (first terminal) of the NPN transistor TR1 is connected to the control terminal of the DC 5V output switching unit 114, and the emitter (second terminal) of the NPN transistor TR1 is connected to the ground GND.
[0034] The Zener diode D1, resistors R2 and R3 are lower voltage setting elements for setting the lower limit voltage. The Zener diode D1 passes a preset constant voltage (Zener voltage) according to the DC 5V signal supplied via the inductor L1. The constant voltage generated by the Zener diode D1 is, for example, 3.3V. The resistor R1 is connected in series to the Zener diode D1 and is a resistor for operating the Zener diode D1 at a constant voltage. The resistors R2 and R3 are voltage dividing resistors connected in series to the Zener diode D1 and generate a divided voltage according to the signal passing through the Zener diode D1. The divided voltage generated by the voltage dividing resistors R2 and R3 is, for example, 1.0V. The lower limit voltage is set to 4.3V by the constant voltage of 3.3V of the Zener diode D1 and the divided voltage of 1.0V of the voltage dividing resistors R2 and R3. Note that the voltages set by the Zener diode D1, the voltage dividing resistors R2 and R3 are just an example, and other voltages may be used.
[0035] The NPN transistor TR1 is a first switching element that turns on / off according to the DC 5V signal. The NPN transistor TR1 is an NPN type bipolar transistor, but other switching elements may be used as long as the same operation is possible. When the DC 5V signal is higher than the lower limit voltage set by the Zener diode D1 and the resistors R2 and R3, the NPN transistor TR1 switches the signal supplied to the control terminal of the DC 5V output switching unit 114. That is, when a voltage higher than the lower limit voltage is applied between the base and emitter of the NPN transistor TR1, the NPN transistor TR1 turns on and the collector-emitter of the NPN transistor TR1 conducts. Thereby, the control terminal of the DC 5V output switching unit 114 and the ground GND are connected, and the DC 5V output switching unit 114 turns on, so that the DC 5V signal passes through the DC 5V output switching unit 114.
[0036] The capacitor C3 is a delay element for delaying the DC5V signal that has passed through the Zener diode D1. The NPN transistor TR1 performs a switching operation in response to the DC5V signal delayed by the capacitor C3. By delaying the rising edge of the signal with the capacitor C3, the on / off operation of the NPN transistor TR1 can be stabilized.
[0037] The upper voltage setting unit 113 sets the upper limit voltage for passing the DC5V signal. The upper limit voltage is higher than the lower limit voltage set by the lower voltage setting unit 112 and is a voltage defined as the DC5V signal or a voltage within the allowable voltage range of the HDMI receiving LSI. When the voltage of the DC5V signal from the DC5V input unit 111 is higher than the set upper limit voltage, the DC5V output switching unit 114 is controlled not to pass the DC5V signal. That is, when the DC5V signal exceeds the upper limit voltage while a DC5V signal higher than the lower limit voltage is passing, the output of the DC5V signal from the DC5V output switching unit 114 is cut off. In this example, by turning off the NPN transistor TR1 of the lower voltage setting unit 112, the DC5V output switching unit 114 is controlled not to pass the DC5V signal.
[0038] The upper voltage setting unit 113 has the same circuit configuration as the lower voltage setting unit 112 except for the capacitor C3. Specifically, the upper voltage setting unit 113 includes a Zener diode D2, resistors R4 to R7, and an NPN transistor TR2. A Zener diode D2 and a resistor R5 are connected in series between the inductor L1 of the DC5V input unit 111 and the base of the NPN transistor TR2. The inductor L1 is connected to the cathode of the Zener diode D2, and the resistor R5 is connected to the anode of the Zener diode D2.
[0039] A resistor R4 is connected between the node between the Zener diode D2 and the resistor R5 and the emitter (ground GND) of the NPN transistor TR2. A resistor R6 is connected between the node between the resistor R5 and the base of the NPN transistor TR2 and the emitter (ground GND) of the NPN transistor TR2. The collector of the NPN transistor TR2 is connected to the base of the NPN transistor TR1 via a resistor R7, and the emitter of the NPN transistor TR2 is connected to the ground GND.
[0040] The Zener diode D2 and the resistors R5 and R6 are upper voltage setting elements for setting the upper limit voltage. The Zener diode D2 passes a preset constant voltage (Zener voltage) in response to the DC5V signal supplied via the inductor L1. The constant voltage generated by the Zener diode D2 is, for example, 5.1V. The resistor R4 is connected in series with the Zener diode D2 and is a resistor for operating the Zener diode D2 at a constant voltage. The resistors R5 and R6 are voltage dividing resistors connected in series with the Zener diode D2 and generate a voltage-divided voltage in response to the signal passing through the Zener diode D2. The voltage-divided voltage generated by the voltage dividing resistors R5 and R6 is, for example, 1.0V. The upper limit voltage is set to 6.1V by the constant voltage of 5.1V of the Zener diode D2 and the voltage-divided voltage of 1.0V of the voltage dividing resistors R5 and R6. Note that the voltages set by the Zener diode D2, the voltage dividing resistors R5 and R6 are an example, and other voltages may be used.
[0041] The NPN transistor TR2 is a second switching element that turns on and off in response to a DC5V signal. The NPN transistor TR2 is an NPN-type bipolar transistor, but other switching elements may be used as long as they can perform similar operations. When the voltage of the DC5V signal is higher than the upper limit voltage set by the Zener diode D2, resistors R5, and R6, the NPN transistor TR2 switches the signal supplied to the base of the NPN transistor TR1. That is, when a voltage higher than the upper limit voltage is applied between the base and emitter of the NPN transistor TR2, the NPN transistor TR2 turns on, and conduction occurs between the collector and emitter of the NPN transistor TR2. As a result, the base of the NPN transistor TR1 is connected to the ground GND, and the NPN transistor TR1 turns off. Then, the connection between the control terminal of the DC5V output switching unit 114 and the ground GND is cut off, and the DC5V output switching unit 114 turns off, so the output of the DC5V signal from the DC5V output switching unit 114 is blocked.
[0042] Note that it is preferable not to provide a delay element for signal delay, such as the capacitor C3 of the lower voltage setting unit 112, in the upper limit voltage setting unit 113. Thereby, when the voltage of the DC5V signal exceeds the upper limit, the passage of the DC5V signal can be blocked immediately.
[0043] The DC5V output switching unit 114 switches the passage / blockage of the DC5V signal according to the voltage of the DC5V signal. In this example, the state of passing the DC5V signal to the HDMI receiving LSI13 and the state of not passing it are switched. When the voltage of the DC5V signal is within the range of the lower limit voltage set by the lower voltage setting unit 112 and the upper limit voltage set by the upper limit voltage setting unit 113, the DC5V output switching unit 114 passes the DC5V signal to the HDMI receiving LSI13. When the voltage of the DC5V signal is outside the range of the lower limit voltage set by the lower voltage setting unit 112 and the upper limit voltage set by the upper limit voltage setting unit 113, the output of the DC5V signal to the HDMI receiving LSI13 is blocked.
[0044] The DC5V output switching unit 114 includes a PMOS transistor M1, resistors R8 and R9, and an output terminal T12 connected to the HDMI receiving LSI 13. The gate (control terminal) of the PMOS transistor M1 is connected to the collector of the NPN transistor TR1 of the lower limit voltage setting unit 112 via the resistor R8. A resistor R9 is connected between the gate and the source (first terminal) of the PMOS transistor M1. The source of the PMOS transistor M1 is connected to the inductor L1 of the DC5V input unit 111. The drain (second terminal) of the PMOS transistor M1 is connected to the output terminal T12.
[0045] The PMOS transistor M1 is a third switching element that turns on and off according to the on / off state of the NPN transistor TR1. The PMOS transistor M1 is a P-channel type MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor), but other switching elements may be used as long as they can perform a similar operation. When the NPN transistor TR1 is off while a DC5V signal is supplied to the source of the PMOS transistor M1 via the inductor L1, the gate and the source of the PMOS transistor M1 have the same potential due to the resistor R9, so the PMOS transistor M1 turns off. Therefore, the DC5V signal is blocked. When the NPN transistor TR1 is on while a DC5V signal is supplied to the source of the PMOS transistor M1 via the inductor L1, the gate potential of the PMOS transistor M1 drops, so the PMOS transistor M1 turns on. Therefore, the DC5V signal is output from the output terminal T12.
[0046] FIG. 9 shows an example of the signal waveforms of the protection circuit 11. FIG. 9(a) is an example of the DC5V signal input to the protection circuit 11, and FIG. 9(b) is an example of the output signal output from the protection circuit 11.
[0047] When an HDMI cable 3 connected to a transmitter 2 and supplied with a DC 5V signal is connected to a receiver 10, at t0, the DC 5V signal starts to rise from 0V. From t0 to t1, since the DC 5V signal is lower than the lower limit voltage 4.3V of the lower limit voltage setting unit 112, the NPN transistor TR1 is off, and since the PMOS transistor M1 is also off, the output signal remains at 0V.
[0048] At t1, when the DC 5V signal exceeds the lower limit voltage 4.3V, after a delay by the capacitor C3, the NPN transistor TR1 turns on, so the PMOS transistor M1 turns on, and the input DC 5V signal is output as the output signal. From t1 to t2, since the DC 5V signal is within the range of the lower limit voltage 4.3V to the upper limit voltage 6.1V, the same voltage as the DC 5V signal is output.
[0049] At t2, when the DC 5V signal exceeds the upper limit voltage 6.1V of the upper limit voltage setting unit 113, the NPN transistor TR2 turns on, so the NPN transistor TR1 turns off. Then, since the PMOS transistor M1 turns off, the DC 5V signal is cut off and the output signal becomes 0V. From t2 to t3, since the DC 5V signal is higher than the upper limit voltage 6.1V, the output signal remains at 0V.
[0050] At t3, when the DC 5V signal drops below the upper limit voltage 6.1V, the NPN transistor TR2 turns off and the NPN transistor TR1 turns on. Then, since the PMOS transistor M1 turns on, the input DC 5V signal is output as the output signal. After t3, since it fluctuates within the range of the lower limit voltage 4.3V to the upper limit voltage 6.1V and stabilizes at 5V, the same voltage as the DC 5V signal is output.
[0051] FIG. 10 shows a connection example of the HDMI receiving LSI 13 according to the present embodiment. As shown in FIG. 10, the input terminal T30 is connected to the output terminal T12 of the protection circuit 11, and the DC 5V signal that has passed through the protection circuit 11 is input. The input terminal T30 is connected to the DC 5V input terminal T31 of the HDMI receiving LSI 13 via a resistor R31 which is a pull-up resistor. The DC 5V signal that has passed through the protection circuit 11 is input from the input terminal T30 to the DC 5V input terminal T31.
[0052] For example, when the receiving LSI 13 monitors the voltage of the DC 5V input terminal T31 and detects the supply of DC 5V, it outputs an HPD signal from the HPD terminal T32. The HPD signal is transmitted to the transmitter 2 via the HPD terminal T22 of the input / output circuit 12 and the HPD line of the HDMI cable 3. The transmitter 2 recognizes the connection of the receiver 10 by detecting the HPD signal, and reads receiver information from the DDC terminal T33 of the HDMI receiving LSI 13 via the DDC line of the HDMI cable 3 and the DDC terminal T23 of the input / output circuit 12.
[0053] As described above, in the present embodiment, a protection circuit for reflection countermeasures is mounted in the DC 5V input section of the HDMI receiver. In the protection circuit, an upper limit voltage and a lower limit voltage are set as the normal DC 5V range, and control is performed to supply DC 5V to the HDMI receiving LSI only when the input DC 5V is within the range of the upper limit voltage and the lower limit voltage. Thereby, it is possible to prevent a failure of the device due to reflection generated on the receiver side when the HDMI cable is connected to the receiver side while the HDMI cable is connected only to the transmitter side and DC 5V is being output.
[0054] (Embodiment 2) Next, Embodiment 2 will be described with reference to the drawings. FIG. 11 shows a configuration example of the receiver according to the present embodiment. As shown in FIG. 11, the receiver 10 according to the present embodiment includes a protection circuit 11, an input / output circuit 12, an HDMI receiving LSI 13 similar to those in Embodiment 1, and a step-down circuit 14.
[0055] The step-down circuit 14 is a voltage conversion circuit that converts the input DC voltage into a predetermined DC voltage lower than the input voltage. The step-down circuit 14 is arranged between the protection circuit 11 and the HDMI receiving LSI 13, steps down the DC 5V that has passed through the protection circuit 11 to a voltage at which the HDMI receiving LSI 13 can operate, and outputs the stepped-down voltage to the HDMI receiving LSI 13.
[0056] FIG. 12 shows a configuration example of the step-down circuit 14 according to the present embodiment. As shown in FIG. 12, the step-down circuit 14 includes a step-down regulator 141. The step-down regulator 141 is an LDO (Low Dropout) regulator and is a step-down element that can operate with a low potential difference. For example, the step-down regulator 141 converts the input DC 5V into DC 3.3V and outputs stable DC 3.3V.
[0057] On the input side of the step-down regulator 141, a resistor R41 and a capacitor C41 are connected in series between the input terminal T41 and the ground GND, and a capacitor C42 is connected in parallel with the resistor R41 and the capacitor C41. The input terminal (Vin) of the step-down regulator 141 is connected between the input terminal T41 and the resistor R41 and the capacitor C42. The ground terminal (GND) of the step-down regulator 141 is connected to the ground GND. The node between the resistor R41 and the capacitor C41 is connected to the control terminal (Cont) of the step-down regulator 141.
[0058] On the output side of the step-down regulator 141, an inductor L41 and a capacitor C43 are connected in series between the output terminal T42 and the ground GND, and a resistor R42 is connected in parallel with the inductor L41 and the capacitor C43. The node between the inductor L41 and the capacitor C43 is connected to the output terminal (Vout) of the step-down regulator 141.
[0059] The input terminal T41 is connected to the output terminal T12 of the protection circuit 11, and a DC 5V signal that has passed through the protection circuit 11 is input. When a DC 5V signal is input to the input terminal T41, the level of the control terminal of the step-down regulator 141 becomes high via the resistor R41, so that the step-down regulator 141 enters an operating state. Then, the step-down regulator 141 converts the voltage of the DC 5V signal input to the input terminal T41 to 3.3V and outputs the converted 3.3V signal via the inductor L41.
[0060] The output terminal T42 is connected to the input terminal T30 on the input side of the HDMI receiving LSI 13, and outputs the 3.3V generated by the step-down regulator 141 to the HDMI receiving LSI 13. Note that DC 3.3V is an example of a voltage that can be detected by the HDMI receiving LSI 13 at the DC 5V input terminal T31, and other detectable voltages may also be used. When the HDMI receiving LSI 13 detects the supply of DC 3.3V, it outputs an HPD signal from the HPD terminal, just as when DC 5V is supplied.
[0061] As described above, in this embodiment, in the receiver of Embodiment 1, a step-down circuit for stepping down the DC 5V that has passed through the protection circuit to a predetermined stable voltage is added. The HDMI receiving LSI uses the DC voltage supplied to the DC 5V terminal for inputs and outputs such as the DDC terminal. Therefore, it is preferable to supply a low and stable voltage within the operable range of the HDMI receiving LSI. In this embodiment, the step-down circuit converts DC 5V to stable DC 3.3V and supplies the converted DC 3.3V to the HDMI receiving LSI. Thereby, the operations of the control terminals and data terminals that perform inputs and outputs using the power supply of the DC 5V terminal can be stabilized.
[0062] Note that the present invention is not limited to the above-described embodiments, and can be appropriately modified without departing from the spirit thereof. In the above embodiment, the device was protected from a DC 5V signal having an out-of-spec voltage. However, not only the DC 5V signal but also the device may be protected from abnormal voltages of other control signals. Further, in the above embodiment, the protection circuit was mounted inside the receiver. However, not only the receiver but also the above protection circuit may be mounted on an HDMI cable, an HDMI switcher, or the like.
Explanation of Signs
[0063] 1, 10 Receiver 2 Transmitter 3 HDMI Cable 11 Protection Circuit 12 Input / Output Circuit 13 HDMI Receiver LSI 14 Step-Down Circuit 111 DC 5V Input Section 112 Lower Voltage Setting Section 113 Upper Voltage Setting Section 114 DC 5V Output Switching Section 121 Terminal Section 122 DC 5V Output Section 123 Electrostatic Protection Section 141 Step-Down Regulator C1 - C3, C41 - C43 Capacitor D1, D2 Zener Diode D21 Bidirectional Zener Diode L1, L41 Inductor M1 PMOS Transistor R1 - R9, R31, R41, R42 Resistor TR1, TR2 NPN Transistor T11, T12, T20 - T24, T30 - T33, T41, T42 Terminal
Claims
1. A receiving unit that receives a control signal of a predetermined DC voltage supplied from a transmitting device via a data transmission interface; A lower voltage setting unit that sets a lower limit voltage of the control signal; An upper voltage setting unit that sets an upper limit voltage of the control signal; A switching unit that passes the control signal to the data reception processing unit of the data transmission interface when the voltage of the control signal is within the range of the lower limit voltage and the upper limit voltage, and does not pass the control signal to the data reception processing unit when the voltage of the control signal is outside the range of the lower limit voltage and the upper limit voltage; Comprising: The lower voltage setting unit includes a first switching element that controls the switching unit to pass the control signal by switching a signal supplied to a control terminal of the switching unit when the voltage of the control signal is higher than the lower limit voltage; The upper voltage setting unit includes a second switching element that controls the switching unit not to pass the control signal by switching a signal supplied to a control terminal of the first switching element when the voltage of the control signal is higher than the upper limit voltage; The lower voltage setting unit includes a delay element that delays the control signal from the data transmission interface; The first switching element performs a switching operation according to the delayed control signal; A protection circuit.
2. A receiving unit that receives a control signal of a predetermined DC voltage supplied from a transmitting device via a data transmission interface; A lower voltage setting unit that sets a lower limit voltage of the control signal; An upper voltage setting unit that sets an upper limit voltage of the control signal; A switching unit that passes the control signal to the data reception processing unit of the data transmission interface when the voltage of the control signal is within the range of the lower limit voltage and the upper limit voltage, and does not pass the control signal to the data reception processing unit when the voltage of the control signal is outside the range of the lower limit voltage and the upper limit voltage; A protection circuit comprising: The data reception processing unit of the data transmission interface; A step-down circuit that steps down the voltage of the control signal that has passed through the protection circuit and supplies the stepped-down control signal to the data reception processing unit; A receiving device comprising:
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