Multilayer Ceramic Capacitor

By employing internal electrodes of varying sizes with specific margin ratios in multilayer ceramic capacitors, the issue of crosstalk-induced electric field characteristic deterioration and noise is mitigated, improving the capacitors' performance in integrated chip applications.

JP7697617B2Active Publication Date: 2025-06-24SAMSUNG ELECTRO MECHANICS CO LTD
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Patent Information

Application Number
JP2020016623
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2019-07-17
Filing Date
2020-02-03
Publication Date
2025-06-24
Estimated Expiration
2040-02-03

AI Technical Summary

Technical Problem

Multilayer ceramic capacitors (MLCCs) experience deterioration of electric field characteristics due to crosstalk, especially when chip components are integrated, leading to noise issues from undesired electric field signals.

Method used

The design incorporates internal electrodes of different sizes, with specific ratios of their margins, to act as compensation patterns, reducing the fringe electric field and minimizing crosstalk.

Benefits of technology

This approach effectively prevents the deterioration of electric field characteristics and reduces noise caused by undesired electric field signals, enhancing the performance of MLCCs in integrated chip configurations.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To provide a multilayer ceramic capacitor capable of preventing deterioration of electric field characteristics due to cross talk.SOLUTION: A multilayer ceramic capacitor includes: a body including first and second internal electrodes 121, 122 having different sizes to each other, and having first and second surfaces opposing each other in a stacking direction of the first and second internal electrodes, third and fourth surfaces connected to the first and second surfaces and opposing each other, and fifth and sixth surfaces connected to the first and second surfaces, connected to the third and fourth surfaces, and opposing each other; and first and second external electrodes 131, 132. When a margin of the first internal electrode 121 in a longitudinal direction is b, and a margin of the first internal electrode in a width direction is d, a margin of the second internal electrode 122 in a longitudinal direction is a, and a margin of the second internal electrode in a width direction is c, a ratio (a / b) of the margin a of the second internal electrode in the longitudinal direction to the margin b of the first internal electrode in the longitudinal direction is 0.33 or more, or a ratio (c / d) of the margin c of the second internal electrode in the width direction to the margin d of the first internal electrode in the width direction is 0.33 or more.SELECTED DRAWING: Figure 5
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Description

Technical Field

[0001] The present invention relates to a multilayer ceramic capacitor.

Background Art

[0002] A multilayer ceramic capacitor (MLCC) is one of the passive component parts and plays a role in controlling electrical signals on a circuit. The multilayer ceramic capacitor mainly accumulates charges in the electrodes and serves as a filter that blocks direct current (DC) signals and passes alternating current (AC) signals. That is, it can be said that the multilayer ceramic capacitor plays a role in bypassing and removing AC noise on the power line and stabilizing the operation of the IC.

[0003] In such an MLCC element, the closer the electromagnetic distance between each layer is, the more likely it is that the characteristics deteriorate due to crosstalk. In particular, there is a problem that when using a chip combined into one compared to simply connecting individual single elements in parallel, the electric field characteristics are more likely to deteriorate.

Summary of the Invention

Problems to be Solved by the Invention

[0004] An object of the present invention is to prevent the deterioration of electric field characteristics due to crosstalk.

[0005] Another object of the present invention is to minimize the influence of the fringe electric field applied to the internal electrodes.

[0006] Still another object of the present invention is to reduce noise caused by undesired electric field signals.

Means for Solving the Problems

[0007] According to an embodiment of the present invention, there is provided a multilayer ceramic capacitor including a dielectric layer and first and second internal electrodes having different sizes, first and second surfaces facing each other in the stacking direction of the first and second internal electrodes, third and fourth surfaces connected to the first and second surfaces and facing each other, and fifth and sixth surfaces connected to the first and second surfaces and also connected to the third and fourth surfaces and facing each other, and first and second external electrodes. When the margin in the length direction of the first internal electrode is b and the margin in the length direction of the second internal electrode is a, the ratio (a / b) of the margin a in the length direction of the second internal electrode to the margin b in the length direction of the first internal electrode is 0.33 or more (where a > 0, b > 0).

[0008] According to another embodiment of the present invention, there is provided a multilayer ceramic capacitor including a dielectric layer and first and second internal electrodes having different sizes, first and second surfaces facing each other in the stacking direction of the first and second internal electrodes, third and fourth surfaces connected to the first and second surfaces and facing each other, and fifth and sixth surfaces connected to the first and second surfaces and also connected to the third and fourth surfaces and facing each other, and first and second external electrodes. When the margin in the width direction of the first internal electrode is d and the margin in the width direction of the second internal electrode is c, the ratio (c / d) of the margin c in the width direction of the second internal electrode to the margin d in the width direction of the first internal electrode is 0.33 or more (where c > 0, d > 0).

Advantages of the Invention

[0009] According to an embodiment of the present invention, deterioration of electric field characteristics due to crosstalk can be prevented.

[0010] According to another embodiment of the present invention, the influence of the fringe electric field applied to the ends of the internal electrodes can be minimized.

[0011] According to still another embodiment of the present invention, there can be provided a multilayer ceramic capacitor capable of reducing noise caused by an undesired electric field signal.

[0012] However, the various beneficial advantages and effects of the present invention are not limited to the above description, and can be more easily understood during the process of describing the specific embodiments of the present invention.

Brief Description of the Drawings

[0013]

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Embodiments for Carrying Out the Invention

[0014] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Also, the embodiments of the present invention are provided to more fully explain the present invention to those with average knowledge in the technical field. Therefore, the shapes and sizes of elements in the drawings may be enlarged or reduced (or emphasized or simplified) for clearer explanation, and elements denoted by the same reference numerals in the drawings are the same elements.

[0015] And, in order to clearly explain the present invention, parts not related to the explanation in the drawings are omitted, the thickness is enlarged to clearly show multiple layers and regions, and for components with the same function within the scope of the same concept, they are described using the same reference numerals. Further, throughout the specification, when a certain part "includes" a certain component, it does not mean excluding other components, but rather means that other components can be further included, unless otherwise stated to the contrary.

[0016] Hereinafter, in order to clearly describe the embodiments of the present invention, when defining the direction of the capacitor body 110, X, Y, and Z shown in the drawings respectively indicate the length direction (second direction), width direction (third direction), and thickness direction (first direction) of the capacitor body 110. Also, in the present embodiment, the Z direction can be used with the same concept as the stacking direction in which the dielectric layers 111, 211, 311, and 411 are stacked.

[0017] FIG. 1 is a perspective view schematically showing a multilayer ceramic capacitor according to an embodiment of the present invention, FIGS. 3 and 4 are plan views respectively showing first and second internal electrodes applied to the multilayer ceramic capacitor of FIG. 1, and FIG. 5 is a plan view showing the first and second internal electrodes applied to the multilayer ceramic capacitor of FIG. 1 overlapped.

[0018] Referring to FIGS. 1 to 5, a multilayer ceramic capacitor 100 according to an embodiment of the present invention includes a dielectric layer 111 and first and second internal electrodes 121 and 122 having different sizes, and first and second surfaces S1 and S2 facing each other in the stacking direction of the first and second internal electrodes 121 and 122, third and fourth surfaces S3 and S4 connected to the first and second surfaces S1 and S2 and facing each other, and fifth and sixth surfaces S5 and S6 connected to the first and second surfaces S1 and S2 and also connected to the third and fourth surfaces S3 and S4 and facing each other, and a main body 110 including the same, and first and second external electrodes 131 and 132.

[0019] At this time, when the margin in the length direction of the first internal electrode 121 is b and the margin in the length direction of the second internal electrode 122 is a, the ratio (a / b) of the margin a in the length direction of the second internal electrode 122 to the margin b in the length direction of the first internal electrode 121 can satisfy a range of 0.33 or more (however, a > 0, b > 0).

[0020] In the multilayer ceramic capacitor according to the present invention, when the ratio (a / b) of the margin in the length direction and / or the ratio (c / d) of the margin in the width direction, which will be described later, fall within a predetermined range, as will be described later, crosstalk that may occur due to the fringing effect can be prevented, and deterioration of the electric field characteristics can be prevented. The fringing effect means an effect generated by electric lines of force that diverge and converge circularly at the electrode ends of a parallel-plate capacitor. As a result, crosstalk may occur when an undesired electric field signal moves to another port. Such a phenomenon is likely to occur when a plurality of small-sized chips are mounted within a narrow area or when a plurality of components are integrated into one chip. The multilayer ceramic capacitor of the present invention can solve such problems. By having a plurality of internal electrodes act as compensation patterns for each other, the magnitude of the fringing electric field can be reduced, thereby preventing deterioration of the electric field characteristics and generation of noise, etc.

[0021] In this specification, "margin" can mean the difference in size between the dielectric layer and the internal electrode, and can mean the distance between the end of the internal electrode and the end of the dielectric layer. Also, in this specification, "margin in the length direction" can mean the shortest distance and / or the perpendicular distance from the end in the length direction (second direction, X direction) of the internal electrode to the end in the length direction (second direction, X direction) of the dielectric layer, and can mean the shortest distance and / or the perpendicular distance to the third surface S3 or the fourth surface S4 of the main body described above. Further, in this specification, "margin in the width direction" can mean the distance from the end in the width direction (third direction, Y direction) of the internal electrode to the end in the width direction (third direction, Y direction) of the dielectric layer, and can mean the shortest distance and / or the perpendicular distance to the fifth surface S5 or the sixth surface S6 of the main body described above.

[0022] FIG. 12 is a cross-sectional view of a multilayer ceramic capacitor in which a first internal electrode 321 and a second internal electrode 322 are arranged. Referring to FIG. 12, the margin b in the length direction of the first internal electrode 321 is from the position of JPEG0007697617000001.jpg431 It means the shortest vertical distance to the position of 433 in JPEG0007697617000002.jpg, and the margin a in the longitudinal direction of the second internal electrode 322 is from the position of 432 in JPEG0007697617000003.jpg It means the shortest vertical distance to the position of 433 in JPEG0007697617000004.jpg. Also, the margin d in the width direction of the first internal electrode 321 means the shortest vertical distance from the position of w1 to the position of w3, and the margin c in the width direction of the second internal electrode 322 means the shortest vertical distance from the position of w2 to the position of w3.

[0023] The capacitor body 110 is formed by laminating a plurality of dielectric layers 111 in the Z direction and then firing them. The boundary between the adjacent dielectric layers 111 of the capacitor body 110 can be integrated so difficult to confirm without using a scanning electron microscope (SEM).

[0024] There is no particular limitation on the specific shape of the above-mentioned body. As shown in the figure, the body can be formed in a hexahedron shape or a shape similar thereto. Due to the shrinkage of the ceramic powder contained in the body during the firing process, the body is not a hexahedron with a perfect straight line, but can have a substantially hexahedron shape. Also, the shape, dimensions, and the number of laminated dielectric layers 111 of the capacitor body 110 are not limited to those shown in the drawings of this embodiment.

[0025] In this embodiment, for the convenience of explanation, both surfaces facing each other in the Z direction of the capacitor body 110 are defined as the first and second surfaces S1, S2, which are connected to the first and second surfaces S1, S2, both surfaces facing each other in the X direction are defined as the third and fourth surfaces S3, S4, which are connected to the first and second surfaces S1, S2 and also connected to the third and fourth surfaces S3, S4, and both surfaces facing each other in the Y direction are defined as the fifth and sixth surfaces S5, S6.

[0026] According to an embodiment of the present invention, the raw material for forming the dielectric layer 111 is not particularly limited as long as sufficient capacitance can be obtained. For example, a barium titanate-based material, a lead composite perovskite-based material, a strontium titanate-based material, or the like can be used.

[0027] In addition, various ceramic additives, organic solvents, plasticizers, binders, dispersants, etc. can be added to the powder such as barium titanate (BaTiO3) for the material forming the dielectric layer 111 according to the purpose of the present invention.

[0028] As the ceramic additive, for example, a transition metal oxide or transition metal carbide, a rare earth element, magnesium (Mg), aluminum (Al), or the like can be used.

[0029] In an example of the present invention, a plurality of internal electrodes 121 and 122 having different sizes can be alternately arranged with the dielectric layer 111 interposed therebetween. At this time, the first and second internal electrodes 121 and 122 can be electrically separated from each other by the dielectric layer 111 disposed in the middle.

[0030] The materials for forming the first and second internal electrodes 121 and 122 are not particularly limited. For example, a conductive paste containing one or more substances among silver (Ag), gold (Au), platinum (Pt), nickel (Ni), copper (Cu), tin (Sn), tungsten (W), palladium (Pd), titanium (Ti), and their alloys can be used to form them. As the printing method of the conductive paste, a screen printing method, a gravure printing method, or the like can be used, but the present invention is not limited thereto.

[0031] The average thickness of the first and second internal electrodes 121 and 122 can be 0.4 μm or less. The average thickness of the internal electrodes can be the average of values measured at five different positions of the fired internal electrodes. The lower limit of the average thickness of the first and second internal electrodes is not particularly limited, but can be, for example, 0.01 μm or more.

[0032] In one embodiment of the present invention, the ratio (a / b) of the margin a in the length direction of the second internal electrode 122 to the margin b in the length direction of the first internal electrode 121 can be 0.33 or more. When the ratio (a / b) of the margin a in the length direction of the second internal electrode 122 to the margin b in the length direction of the first internal electrode 121 is in the range of 0.33 or more, the second internal electrode can sufficiently function as a compensation pattern and crosstalk can be reduced. When the ratio (a / b) is less than 0.33, the distance from the external electrode becomes excessively close and a short circuit may occur.

[0033] In an example of the present invention, the upper limit of the ratio (a / b) of the margin a in the length direction of the second internal electrode 122 to the margin b in the length direction of the first internal electrode 121 is not particularly limited, but can be, for example, less than 1. When the ratio (a / b) is 1, the second internal electrode 122 cannot function as a compensation pattern. The ratio (a / b) of the margin a in the length direction of the second internal electrode to the margin b in the length direction of the first internal electrode can be less than 1, 0.95 or less, 0.90 or less, 0.85 or less, 0.80 or less, 0.75 or less, 0.70 or less, or 0.67 or less. By satisfying the above range for the ratio (a / b) of the margin a in the length direction of the second internal electrode to the margin b in the length direction of the first internal electrode, the influence of the fringe electric field applied to the ends of the internal electrodes can be minimized, and crosstalk can be minimized.

[0034] In one embodiment according to the present invention, the difference (b - a) between the margin b in the length direction of the first internal electrode and the margin a in the length direction of the second internal electrode can be 10 μm or more. The difference (b - a) between the margin b in the length direction of the first internal electrode and the margin a in the length direction of the second internal electrode can mean the difference between the length of the margin b in the length direction of the first internal electrode and the length of the margin a in the length direction of the second internal electrode, and can mean the difference in the length in the X direction. By making the difference (b - a) between the margin b in the length direction of the first internal electrode and the margin a in the length direction of the second internal electrode 10 μm or more, the noise of the multilayer ceramic capacitor can be effectively reduced.

[0035] The difference (b - a) between the margin b in the length direction of the first internal electrode and the margin a in the length direction of the second internal electrode can be, for example, 10 μm or more, 14 μm or more, 18 μm or more, 22 μm or more, 26 μm or more, or 30 μm or more, and the upper limit is not particularly limited, but can be, for example, 500 μm or less. When the difference (b - a) between the margin b in the length direction of the first internal electrode and the margin a in the length direction of the second internal electrode satisfies the above range, the noise removal effect can be maximized.

[0036] In another embodiment of the present invention, when the margin in the width direction of the first internal electrode is d and the margin in the width direction of the second internal electrode is c, the ratio (c / d) of the margin c in the width direction of the second internal electrode to the margin d in the width direction of the first internal electrode can be 0.33 or more (provided that c > 0, d > 0). In the range where the ratio (c / d) of the margin c in the width direction of the second internal electrode to the margin d in the width direction of the first internal electrode is 0.33 or more, crosstalk can be reduced. When the ratio (c / d) is less than 0.33, the distance to the external electrode becomes excessively close and a short circuit may occur.

[0037] In an example of the present invention, the upper limit of the ratio (c / d) of the margin c in the width direction of the second internal electrode to the margin d in the width direction of the first internal electrode is not particularly limited, but can be less than 1, for example. When the ratio (c / d) is 1, the second internal electrode cannot function as a compensation pattern. The ratio (c / d) of the margin c in the width direction of the second internal electrode to the margin d in the width direction of the first internal electrode can be less than 1, 0.95 or less, 0.90 or less, 0.85 or less, 0.80 or less, 0.75 or less, 0.70 or less, or 0.67 or less. By satisfying the above range for the ratio (c / d) of the margin c in the width direction of the second internal electrode to the margin d in the width direction of the first internal electrode, the influence of the fringe electric field applied to the end of the internal electrode can be minimized, and crosstalk can be minimized.

[0038] In one embodiment according to the present invention, the difference (d - c) between the margin d in the width direction of the first internal electrode and the margin c in the width direction of the second internal electrode can be 10 μm or more. The difference (d - c) between the margin d in the width direction of the first internal electrode and the margin c in the width direction of the second internal electrode can mean the difference between the width of the margin d in the width direction of the first internal electrode and the width of the margin c in the width direction of the second internal electrode, and can mean the difference in width in the Y direction. By making the difference (d - c) between the margin d in the width direction of the first internal electrode and the margin c in the width direction of the second internal electrode 10 μm or more, the noise of the multilayer ceramic capacitor can be effectively reduced.

[0039] The difference (d - c) between the margin d in the width direction of the first internal electrode and the margin c in the width direction of the second internal electrode can be, for example, 10 μm or more, 14 μm or more, 18 μm or more, 22 μm or more, 26 μm or more, or 30 μm or more, and the upper limit is not particularly limited, but can be 500 μm or less, for example. When the difference (d - c) between the margin d in the width direction of the first internal electrode and the margin c in the width direction of the second internal electrode satisfies the above range, the noise removal effect can be maximized.

[0040] The first and second external electrodes 131 and 132 can each be arranged in contact with the first and second internal electrodes. The fact that the first and second external electrodes are in contact with the first and second internal electrodes respectively can mean that the first internal electrode is electrically connected to the first external electrode through a portion exposed outside the main body, and the second internal electrode is electrically connected to the second external electrode through a portion exposed outside the main body. The first and second external electrodes 131 and 132 can be arranged to extend to a part of the four surfaces in contact with the surfaces where the first and second internal electrodes are exposed.

[0041] The method for forming the first and second external electrodes 131 and 132 does not need to be particularly limited. For example, it can be formed by dipping the main body into a paste containing a conductive metal and glass, or by transferring a dried film of a metal paste onto the main body.

[0042] In one embodiment according to the present invention, the first and second external electrodes 131 and 132 can use one or more of silver (Ag), gold (Au), platinum (Pt), nickel (Ni), copper (Cu), tin (Sn), tungsten (W), palladium (Pd), titanium (Ti), and their alloys. Also, in order to improve the mountability with the substrate, a plating layer can be formed on the first and second external electrodes 131 and 132.

[0043] In one embodiment of the present invention, the first and second internal electrodes can be arranged to be exposed on the third and fourth surfaces of the main body respectively. The fact that the first and second internal electrodes are exposed on the third and fourth surfaces of the main body can mean that the first internal electrode and the second internal electrode are arranged to face each other in the X direction, and can mean that the first and second internal electrodes are arranged in the length direction. At this time, the first external electrode 131 and the second external electrode 132 can be respectively arranged on the third and fourth surfaces of the main body so as to be in contact with the first internal electrode 121 and the second internal electrode 122.

[0044] Figures 1 to 5 show the multilayer ceramic capacitor according to the above embodiment. Referring to Figures 1 to 5, in the multilayer ceramic capacitor 100 according to this embodiment, the first internal electrode 121 and the second internal electrode 122 facing each other in the X direction (length direction, second direction) can be respectively arranged on the third surface S3 and the fourth surface S4 of the main body 110. Also, the first external electrode 131 and the second external electrode 132 can be respectively arranged on the third surface S3 and the fourth surface S4 of the main body 110 and can be electrically connected to the first internal electrode 121 and the second internal electrode 122 respectively. When the multilayer ceramic capacitor according to this embodiment has the above structure, it will have an appearance similar to that of a normal MLCC.

[0045] In another embodiment of the present invention, the first and second internal electrodes can be arranged so as to be exposed on the fifth and sixth surfaces of the main body. The fact that the first and second internal electrodes are exposed on the fifth and sixth surfaces of the main body can mean that the first internal electrode and the second internal electrode are arranged so as to face each other in the Y direction, and can mean that the first and second internal electrodes are arranged in the width direction. At this time, the first external electrode and the second external electrode can be respectively arranged on the fifth and sixth surfaces of the main body. Also, the first external electrode and the second external electrode can be respectively arranged on the fifth and sixth surfaces of the main body so as to be in contact with the first internal electrode and the second internal electrode.

[0046] Figures 6 to 8 show the multilayer ceramic capacitor according to the above embodiment. Referring to Figures 6 to 8, in the multilayer ceramic capacitor 200 according to this embodiment, the first internal electrode 221 and the second internal electrode 222 facing each other in the Y direction (width direction, third direction) can be respectively arranged on the fifth surface S5 and the sixth surface S6 of the main body 210. Also, the first external electrode 231 and the second external electrode 232 can be respectively arranged on the fifth surface S5 and the sixth surface S6 of the main body 210 and can be electrically connected to the first internal electrode 221 and the second internal electrode 222 respectively. When the multilayer ceramic capacitor according to this embodiment has the above structure, it will have an appearance similar to that of an LICC (Low Inductance Chip Capacitor).

[0047] In still another embodiment of the present invention, the multilayer ceramic capacitor of the present invention further includes a third external electrode, the first internal electrode is exposed on the third or fourth surface of the body, and the second internal electrode can be arranged to be exposed on the fifth and sixth surfaces of the body. At this time, the first external electrode is arranged on the third surface of the body, the second external electrode is arranged on the fourth surface of the body, and the third external electrode is electrically connected to the second internal electrode and can be arranged on the first, second, fifth, and sixth surfaces of the body.

[0048] Figs. 9 to 14 show the multilayer ceramic capacitor according to this embodiment. Referring to Figs. 9 to 13, in the multilayer ceramic capacitor 300 according to this embodiment, the first internal electrode 321 is exposed on the third surface S3 or the fourth surface S4 of the body 310, and the second internal electrode 322 can be arranged to be exposed on the fifth surface S5 and the sixth surface S6 of the body 310. Also, the first external electrode 331 and the second external electrode 332 are respectively arranged on the third surface S3 and the fourth surface S4 of the body 310 and can be electrically connected to the first internal electrode 321. And the third external electrode 333 can be arranged on the first surface S1, the second surface S2, the fifth surface S5, and the sixth surface S6 of the body 310. At this time, the second internal electrode 322 arranged to be exposed on the fifth surface S5 and the sixth surface S6 of the body 310 can have a shape as shown in Fig. 13, for example, it can be in a + shape.

[0049] As shown in Fig. 9, the third external electrode 333 can be arranged to connect the first surface S1, the second surface S2, the fifth surface S5, and the sixth surface S6 of the body 310. As shown in Fig. 10, it can include a disconnection part on the first surface S1 and the second surface S2, or it can not be arranged on the first surface S1 and the second surface S2 of the body 310, but it is not limited thereto.

[0050] In an example of the present invention, the multilayer ceramic capacitor according to the present invention can further include a third internal electrode. At this time, the first internal electrode is exposed on the third surface of the main body and is arranged to be in contact with the first external electrode, and the third internal electrode can be exposed on the fourth surface of the main body and arranged to be in contact with the second external electrode.

[0051] Referring to FIGS. 9 to 14, in the case of the above embodiment, the multilayer ceramic capacitor 310 can have a multilayer structure according to the positions of the first internal electrode 321 and the third internal electrode 323. For example, the multilayer ceramic capacitor 310 according to the present embodiment can have a structure in which a plurality of layers of the first internal electrode 321 and the second internal electrode 322 are alternately stacked as shown in FIG. 12, and a plurality of layers of the second internal electrode 322 and the third internal electrode 323 are stacked on the multilayer structure as shown in FIG. 13. At this time, the number of stacked layers of the structure in FIG. 12 and the number of stacked layers of the structure in FIG. 13 can be appropriately adjusted according to the purpose of use of the capacitor.

[0052] In the above embodiment, the case where the stacked structure of the first internal electrode 321 in FIG. 12 is arranged at the lower part and the stacked structure of the third internal electrode 323 in FIG. 13 is arranged at the upper part is taken as an example. Conversely, the structure in which the stacked structure of the first internal electrode 321 in FIG. 12 is arranged at the upper part and the stacked structure of the third internal electrode 323 in FIG. 13 is arranged at the lower part can also be naturally included in the above embodiment. When the multilayer ceramic capacitor according to the present embodiment has the above structure, it can have the shape of a three-terminal capacitor, and one of the external electrodes can function as a ground electrode.

[0053] In still another embodiment of the present invention, the multilayer ceramic capacitor according to the present invention further includes a third external electrode. The first internal electrode is exposed on the third and fourth surfaces of the main body, and the second internal electrode can be arranged to be exposed on the fifth and sixth surfaces of the main body. At this time, the first external electrode is arranged on the third surface of the main body, the second external electrode is arranged on the fourth surface of the main body, and the third external electrode is electrically connected to the second internal electrode and can be arranged on the first, second, fifth, and sixth surfaces of the main body.

[0054] FIG. 15 is a cross-sectional view of the multilayer ceramic capacitor according to the above embodiment. Referring to FIG. 15, the first internal electrode 421 is exposed on the third surface S3 and the fourth surface S4 of the main body and can be in contact with the first external electrode 431 and the second external electrode 432. Further, the second internal electrode 422 is exposed on the fifth surface S5 and the sixth surface S6 of the main body and can be in contact with the third external electrode 433.

[0055] When the multilayer ceramic capacitor includes a third internal electrode and a third external electrode, since the thickness and formation method of the third internal electrode and the third external electrode are the same as those of the above-described first and second internal electrodes and first and second external electrodes, they are omitted.

[0056] Table 1 below and FIG. 16 show the scattering coefficient (S21-parameter) according to the ratio of a / b or the ratio of c / d.

[0057] [Table 1]

[0058] Referring to Table 1, it can be confirmed that when the ratio of a / b or c / d is 1, the same result as the case where no compensation pattern is applied is shown, and it can be confirmed that the reduction rate tends to increase as the above ratio (a / b or c / d) decreases. In particular, it can be confirmed that a sharp numerical change is shown based on 0.667. Further, when the above ratio (a / b or c / d) is 0.33, it can be confirmed that a very high reduction rate is shown.

[0059] From Table 1 above, it can be confirmed that the multilayer ceramic capacitor according to the present invention can minimize the influence of the fringe electric field applied to the end of the internal electrode by using the second internal electrode as a compensation pattern, can prevent the deterioration of the electric field characteristics due to crosstalk, and can reduce the noise due to an undesired electric field signal.

[0060] Although the embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and it is obvious to those skilled in the art that various modifications and variations are possible within the scope not departing from the technical idea of the present invention described in the claims.

Explanation of Reference Numerals

[0061] 100, 200, 300 Multilayer ceramic capacitor 110, 210, 310 Body 111, 211, 311, 411 Dielectric layer 121, 221, 321, 421 First internal electrode 122, 222, 322, 422 Second internal electrode 323 Third internal electrode 131, 231, 331, 431 First external electrode 132, 232, 332, 432 Second external electrode 333, 433 Third external electrode

Claims

1. A body including a dielectric layer and first and second internal electrodes having different sizes from each other, first and second surfaces facing each other in the stacking direction of the first and second internal electrodes, third and fourth surfaces connected to the first and second surfaces and facing each other, and fifth and sixth surfaces connected to the first and second surfaces and also connected to the third and fourth surfaces and facing each other, and first and second external electrodes, wherein the sides of the fifth and sixth surfaces connected to the first and second surfaces are longer than the sides of the third and fourth surfaces connected to the first and second surfaces, wherein the first and second internal electrodes are respectively exposed on the fifth and sixth surfaces of the body, wherein the first and second external electrodes are respectively arranged to extend from at least the fifth and sixth surfaces of the body to a part of the third and fourth surfaces so as to be in contact with the first and second internal electrodes, taking the direction in which the third and fourth surfaces face each other as the length direction, and taking the shortest distance and / or the perpendicular distance from the end of the first internal electrode or the second internal electrode in the length direction to the end of the dielectric layer in the length direction as the margin in the length direction, when the margin in the length direction of the first internal electrode is b and the margin in the length direction of the second internal electrode is a, the ratio (a / b) of the margin in the length direction of the second internal electrode to the margin in the length direction of the first internal electrode is 0.33 or more and less than 1 (however, a>0, b>0), taking the direction in which the fifth and sixth surfaces face each other as the width direction, and taking the shortest distance and / or the perpendicular distance from the end of the first internal electrode or the second internal electrode in the width direction to the end of the dielectric layer in the width direction as the margin in the width direction, when the margin in the width direction of the first internal electrode is d and the margin in the width direction of the second internal electrode is c, the ratio (c / d) of the margin in the width direction of the second internal electrode to the margin in the width direction of the first internal electrode is 0.33 or more and less than 1 (however, c>0, d>0), a multilayer ceramic capacitor.

2. The multilayer ceramic capacitor according to claim 1, wherein the ratio (a / b) is 0.67 or less.

3. The multilayer ceramic capacitor according to claim 1 or 2, wherein the difference (b - a) between the margin b in the length direction of the first internal electrode and the margin a in the length direction of the second internal electrode is 10 μm or more.

4. It includes a dielectric layer and first and second internal electrodes with different sizes, first and second surfaces facing each other in the stacking direction of the first and second internal electrodes, third and fourth surfaces connected to the first and second surfaces and facing each other, and fifth and sixth surfaces connected to the first and second surfaces and also connected to the third and fourth surfaces and facing each other, and first and second external electrodes. The sides connecting the fifth and sixth surfaces to the first and second surfaces are longer than the sides connecting the third and fourth surfaces to the first and second surfaces. The first and second internal electrodes are respectively exposed on the third and fourth surfaces of the body. The first and second external electrodes are respectively arranged to extend at least from the third and fourth surfaces of the body to a part of the fifth and sixth surfaces so as to be in contact with the first and second internal electrodes. Taking the direction in which the fifth and sixth surfaces face each other as the width direction, and taking the shortest distance and / or vertical distance from the end in the width direction of the first internal electrode or the second internal electrode to the end in the width direction of the dielectric layer as the margin in the width direction, when the margin in the width direction of the first internal electrode is d and the margin in the width direction of the second internal electrode is c, the ratio (c / d) of the margin c in the width direction of the second internal electrode to the margin d in the width direction of the first internal electrode is 0.33 or more and less than 1 (however, c>0, d>0). Taking the direction in which the third and fourth surfaces face each other as the length direction, and taking the shortest distance and / or vertical distance from the end in the length direction of the first internal electrode or the second internal electrode to the end in the length direction of the dielectric layer as the margin in the length direction, when the margin in the length direction of the first internal electrode is b and the margin in the length direction of the second internal electrode is a, the ratio (a / b) of the margin a in the length direction of the second internal electrode to the margin b in the length direction of the first internal electrode is 0.33 or more and 0.667 or less (however, a>0, b>0). A multilayer ceramic capacitor, wherein the difference (b - a) between the margin b in the length direction of the first internal electrode and the margin a in the length direction of the second internal electrode is 10 μm or more, and the difference (d - c) between the margin d in the width direction of the first internal electrode and the margin c in the width direction of the second internal electrode is 10 μm or more.

5. The multilayer ceramic capacitor according to claim 4, wherein the ratio (c / d) is 0.67 or less.

6. The multilayer ceramic capacitor according to any one of claims 1 to 5, wherein an average thickness of the first and second internal electrodes is 0.4 µm or less.

7. A body including a dielectric layer and first and second internal electrodes having different sizes, first and second surfaces facing each other in a stacking direction of the first and second internal electrodes, third and fourth surfaces connected to the first and second surfaces and facing each other, and fifth and sixth surfaces connected to the first and second surfaces and also connected to the third and fourth surfaces and facing each other, and first and second external electrodes. Further including a third external electrode. The first internal electrode is exposed on a third surface or a fourth surface of the body. The second internal electrode is arranged to be exposed on the fifth surface and the sixth surface of the body. The first external electrode is arranged on the third surface of the body. The second external electrode is arranged on the fourth surface of the body. The third external electrode is electrically connected to the second internal electrode and is arranged on the first surface, the second surface, the fifth surface, and the sixth surface of the body. Taking a direction in which the fifth surface and the sixth surface face each other as a width direction, and taking a shortest distance and / or a perpendicular distance from an end of the first internal electrode or the second internal electrode in the width direction to an end of the dielectric layer in the width direction as a margin in the width direction. When the margin in the width direction of the first internal electrode is d and the margin in the width direction of the second internal electrode is c. A ratio (c / d) of the margin c in the width direction of the second internal electrode to the margin d in the width direction of the first internal electrode is 0.33 or more and less than 1 (however, c > 0, d > 0). Taking a direction in which the third surface and the fourth surface face each other as a length direction, and taking a shortest distance and / or a perpendicular distance from an end of the first internal electrode or the second internal electrode in the length direction to an end of the dielectric layer in the length direction as a margin in the length direction. When the margin in the length direction of the first internal electrode is b and the margin in the length direction of the second internal electrode is a. A difference (b - a) between the margin b in the length direction of the first internal electrode and the margin a in the length direction of the second internal electrode is 10 µm or more, and a difference (d - c) between the margin d in the width direction of the first internal electrode and the margin c in the width direction of the second internal electrode is 10 µm or more. The multilayer ceramic capacitor.

8. Further including a third internal electrode. The first internal electrode is exposed on the third surface of the body and is arranged to be in contact with the first external electrode. The multilayer ceramic capacitor according to claim 7, wherein the third internal electrode is exposed on the fourth surface of the main body and is arranged to be in contact with the second external electrode.

9. The multilayer ceramic capacitor according to claim 7 or 8, wherein the ratio (a / b) of the margin a in the length direction of the second internal electrode to the margin b in the length direction of the first internal electrode is 0.33 or more and 0.67 or less (where a > 0, b > 0).

10. A main body including a dielectric layer and first and second internal electrodes having different sizes, first and second surfaces facing each other in the stacking direction of the first and second internal electrodes, third and fourth surfaces connected to the first and second surfaces and facing each other, and fifth and sixth surfaces connected to the first and second surfaces and also connected to the third and fourth surfaces and facing each other, and first and second external electrodes, further including a third external electrode, wherein the first internal electrode is exposed on the third and fourth surfaces of the main body, the second internal electrode is arranged to be exposed on the fifth and sixth surfaces of the main body, the first and second external electrodes are respectively arranged on the third and fourth surfaces of the main body and are electrically connected to the first internal electrode, the third external electrode is electrically connected to the second internal electrode and is arranged on the first, second, fifth, and sixth surfaces of the main body, taking the direction in which the fifth and sixth surfaces face each other as the width direction, and taking the shortest distance and / or perpendicular distance from the end in the width direction of the first internal electrode or the second internal electrode to the end in the width direction of the dielectric layer as the margin in the width direction, when the margin in the width direction of the first internal electrode is d and the margin in the width direction of the second internal electrode is c, the ratio (c / d) of the margin c in the width direction of the second internal electrode to the margin d in the width direction of the first internal electrode is 0.33 or more and less than 1 (where c > 0, d > 0), for the multilayer ceramic capacitor.

11. A main body including a dielectric layer and first and second internal electrodes having different sizes, first and second surfaces facing each other in the stacking direction of the first and second internal electrodes, third and fourth surfaces connected to the first and second surfaces and facing each other, and fifth and sixth surfaces connected to the first and second surfaces and also connected to the third and fourth surfaces and facing each other, and first and second external electrodes, wherein the sides connecting the fifth and sixth surfaces to the first and second surfaces are longer than the sides connecting the third and fourth surfaces to the first and second surfaces, The first and second internal electrodes are exposed on the third and fourth surfaces of the main body, respectively. The first and second external electrodes are each arranged to extend from at least the third and fourth surfaces of the main body to a part of the fifth and sixth surfaces so as to be in contact with the first and second internal electrodes. With the direction in which the fifth and sixth surfaces face each other as the width direction, and the shortest distance and / or perpendicular distance from the end in the width direction of the first internal electrode or the second internal electrode to the end in the width direction of the dielectric layer as the margin in the width direction, when the margin in the width direction of the first internal electrode is d and the margin in the width direction of the second internal electrode is c, the ratio (c / d) of the margin c in the width direction of the second internal electrode to the margin d in the width direction of the first internal electrode is 0.33 or more and 0.67 or less (provided that c>0, d>0). With the direction in which the third and fourth surfaces face each other as the length direction, and the shortest distance and / or perpendicular distance from the end in the length direction of the first internal electrode or the second internal electrode to the end in the length direction of the dielectric layer as the margin in the length direction, when the margin in the length direction of the first internal electrode is b and the margin in the length direction of the second internal electrode is a, the ratio (a / b) of the margin a in the length direction of the second internal electrode to the margin b in the length direction of the first internal electrode is 0.33 or more and 0.667 or less (provided that a>0, b>0). A multilayer ceramic capacitor.

12. The multilayer ceramic capacitor according to claim 11, wherein the difference (d - c) between the margin d in the width direction of the first internal electrode and the margin c in the width direction of the second internal electrode is 10 μm or more and 500 μm or less.

13. The multilayer ceramic capacitor according to claim 11 or 12, wherein the average thickness of the first and second internal electrodes is 0.4 μm or less.

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