Cover tape for electronic component packaging
The cover tape for electronic components balances adhesiveness and peelability while reducing static electricity using lindop tin, carbon nanotubes, or polythiophene derivatives, addressing environmental concerns and performance stability.
Patent Information
- Application Number
- JP2020192491
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2020-11-19
- Publication Date
- 2025-07-15
- Estimated Expiration
- 2040-11-19
AI Technical Summary
Conventional cover tapes for electronic components face challenges in achieving a balance between adhesiveness and peelability while effectively suppressing static electricity, particularly with the reduction of antimony due to environmental concerns.
A cover tape design incorporating a base material layer, intermediate layer, and sealant layer, utilizing lindop tin, carbon nanotubes, or polythiophene derivatives as antistatic agents, ensuring a balance between adhesiveness and peelability and reducing static electricity generation.
The cover tape maintains excellent adhesiveness and peelability while effectively suppressing static electricity, even with reduced antimony content, ensuring stable performance under varying environmental conditions.
Smart Images

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Abstract
Description
Technical Field
[0001] The present invention relates to a cover tape for packaging electronic components.
Background Art
[0002] Conventionally, electronic components such as transistors, diodes, capacitors, piezoelectric element resistors, etc. are, at the manufacturing site of electronic devices, housed in a package composed of a carrier tape in which pockets capable of storing the electronic components are continuously formed and a cover tape sealed to the carrier tape, and after being subjected to a heat sealing process, they are wound around a reel made of paper or plastic and transported to a work area where surface mounting is performed on an electronic circuit board or the like. Then, such electronic components are taken out from the pockets formed in the carrier tape after peeling off the cover tape of the above package within the above-described work area and are surface-mounted on an electronic circuit board or the like. Regarding the above electronic components, with the recent miniaturization of electronic devices, further miniaturization and high-density mounting have been required. Therefore, in recent years, electronic components tend to be more easily affected by static electricity than before.
[0003] In view of such circumstances, in recent years, there has been a demand for improving various characteristics of the cover tape used for transporting electronic components, which will be described later. First, the characteristics required for the cover tape are excellent balance between sufficient adhesive strength to the carrier tape and peelability to be smoothly peeled from the carrier tape in the mounting process. In the process of peeling the cover tape from the carrier tape, if the peel strength, which is the strength required to peel the cover tape from the carrier tape, is too high, the carrier tape vibrates when the cover tape is peeled, and a phenomenon occurs in which the electronic component jumps out of the storage pocket. On the other hand, if the adhesive strength between the carrier tape and the cover tape is low, the cover tape may peel off during transportation of the package, and the packaged electronic component may fall. Second, the characteristics required for the cover tape are antistatic properties necessary to the extent that they can suppress the failure (electrostatic breakdown) of electronic components housed in the package due to static electricity generated by friction between the cover tape and the electronic components during conveyance, static electricity generated when peeling the cover tape from the carrier tape, static electricity generated from adhered dust or contents, etc. In particular, regarding the technology for improving the antistatic properties of the cover tape, various studies have been made from the viewpoint of suppressing the influence received by static electricity generated by friction between the cover tape and the electronic components during conveyance or static electricity generated when peeling the cover tape from the carrier tape.
[0004] For example, Patent Document 1 describes a cover tape for packaging electronic components that uses acicular particles of antimony-doped tin oxide in an antistatic heat-sealing layer.
Prior Art Documents
Patent Documents
[0005]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0006] As described in the above background art section, various studies have been made on improving the above-described characteristics even in conventional cover tapes. However, antimony, which has been used as a good antistatic agent, has recently been desired to reduce its use from the viewpoint of environmental protection. In view of the above circumstances, the present inventor has been working on the development of a cover tape for packaging electronic components that has a good balance between adhesiveness and peelability when peeling the carrier tape and the cover tape and can suppress the generation of static electricity during peeling even when antimony is reduced.
[0007] The present invention provides a cover tape for packaging electronic components, which has an excellent balance between adhesiveness and peelability to a carrier tape and excellent antistatic properties accompanying the peeling of the carrier tape when antimony is reduced.
Means for Solving the Problems
[0008] As a result of further studies, the present inventor has found that, as an antistatic agent contained in the sealant layer of the cover tape for packaging electronic components, by including one or more selected from the group consisting of (A) lindop tin, (B) carbon nanotube, or (C) polythiophene or polythiophene derivative, when antimony is reduced, a cover tape for packaging electronic components can be realized in which the balance between adhesiveness and peelability to a carrier tape is good and the generation of static electricity accompanying peeling can be suppressed, and the present invention has been completed.
[0009] A base material layer, An intermediate layer, A sealant layer, A cover tape for packaging electronic components having these in this order, wherein the sealant layer contains an adhesive resin and an antistatic agent, The antistatic agent, (A) Lindop tin (B) Carbon nanotube (C) Polythiophene or polythiophene derivative contains one or more selected from the group consisting of, The peel strength with respect to a polystyrene film measured by <Measurement of Peel Strength> below is 0.3 N or more and 0.9 N or less, The antimony content measured for the entire cover tape for packaging electronic components is 0 ppm or more and 150 ppm or less with respect to the entire cover tape for packaging electronic components. A cover tape for packaging electronic components. <Measurement of Peel Strength> The peel strength of the cover tape for electronic component packaging against the polystyrene film is measured under the conditions of a peeling speed of 300 mm / min, a measurement temperature of 25°C, and a peeling angle of 170°, when the cover tape for electronic component packaging is made to have a width of 5.5 mm, the sealant layer side of the cover tape is combined with the uneven surface side of a polystyrene film having a width of 8 mm and an average surface roughness (Ra) of the uneven surface of 0.25 μm, and heat sealing is performed using a double-edge iron with a single-edge width of 0.5 mm and a length of 28 mm under the conditions of a sealing temperature of 160°C, a load of 5 kgf, a sealing time of 60 milliseconds, and a carrier tape feed pitch of 4 mm.
Advantages of the Invention
[0010] According to the present invention, when antimony is reduced, it is possible to provide a cover tape for electronic component packaging that is excellent in the balance between adhesiveness and peelability with respect to a carrier tape and can suppress the generation of static electricity during peeling.
Brief Description of the Drawings
[0011]
Figure 1
Figure 2
Embodiments for Carrying Out the Invention
[0012] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In all the drawings, the same reference numerals are given to the same components, and the description will be omitted as appropriate. Also, the drawings are schematic views and do not match the actual dimensional ratios.
[0013] <Cover Tape for Electronic Component Packaging> FIG. 1 schematically shows an example of the cover tape for electronic component packaging of the present embodiment. The cover tape for electronic component packaging according to this embodiment is a cover tape for electronic component packaging that includes a base material layer 1, an intermediate layer 2, and a sealant layer 3 in this order. For the cover tape 10 for electronic component packaging, usually, the sealant layer 3 is adhered to the carrier tape. In other words, usually, the upper surface side in FIG. 1 is adhered to the carrier tape. Also, each layer may be composed of a plurality of layers.
[0014] <Other Layers> For the cover tape 10 for electronic component packaging, an adhesive layer (not shown) may be provided between the layers. According to this adhesive layer, the adhesiveness between the layers can be improved. Examples of the material for forming the adhesive layer include urethane-based adhesive resins for dry lamination or adhesive resins for anchor coating. Generally, those obtained by combining polyester compositions such as polyester polyol and polyether polyol with isocyanate compounds can be mentioned. Also, layers other than the adhesive layer may be provided. For example, a layer for improving the strength of the entire film, a water vapor barrier layer, etc. may be provided.
[0015] <Base Material Layer> For the base material layer 1, when processing the cover tape 10 for electronic component packaging, when heat-sealing to the carrier tape, when in use, etc., as long as it has mechanical strength that can withstand the external force applied and heat resistance that can withstand the heat during heat-sealing, films processed from various materials can be used.
[0016] Specific examples of the material constituting the base material layer 1 include polyester resins, polyamide resins, polyolefin resins, polyacrylate resins, polymethacrylate resins, polyimide resins, polycarbonate resins, ABS resins, and the like. Among these, as the material constituting the base material layer 1, polyester resins and polyolefin resins are preferred, and polyethylene terephthalate and polyethylene, which can improve mechanical strength, are particularly preferred. Further, when a polyamide resin is selected as the material constituting the base material layer 1, it is preferable to use nylon, which can improve mechanical strength and flexibility.
[0017] As the form of the film used to form the base material layer 1, it may be a stretched film or a film stretched in a uniaxial direction or a biaxial direction. However, from the viewpoint of improving the mechanical strength of the cover tape for electronic component packaging, it is preferably a film stretched in a uniaxial direction or a biaxial direction.
[0018] The base material layer 1 may be formed of a single-layer film containing the above-described material, or may be formed using a multi-layer film containing the above-described material in each layer. From the viewpoint of reducing the charge amount generated when the carrier tape is peeled off, the base material layer 1 may contain an antistatic agent, or an antistatic layer may be provided as one of the layers of the base material layer on the surface opposite to the surface where the intermediate layer 2 is provided in the base material layer 1. The surface of the base material layer 1 containing such an antistatic agent or the antistatic layer has a possibility of coming into contact with the bottom surface of the carrier tape of the package stacked on top when a plurality of packages are stacked and transported when accommodating and transporting electronic components in a package composed of the carrier tape and the cover tape 10 for electronic component packaging.
[0019] The thickness of the base material layer 1 is preferably, for example, 6 μm or more, preferably 7 μm or more, and more preferably 8 μm or more. Also, the thickness of the base material layer 1 is preferably, for example, 35 μm or less, preferably 33 μm or less, and more preferably 30 μm or less. If the thickness of the base material layer 1 is below the above upper limit value, the rigidity of the cover tape for electronic component packaging will not become too high, and even if torsional stress is applied to the carrier tape after sealing, the cover tape 10 for electronic component packaging can follow the deformation of the carrier tape and the possibility of peeling off can be reduced. Also, if the thickness of the base material layer 1 is above the above lower limit value, the mechanical strength of the cover tape 10 for electronic component packaging will be suitable, and even when peeling the cover tape 10 for electronic component packaging from the carrier tape at high speed, the possibility of the cover tape 10 for electronic component packaging breaking can be reduced. Note that the base material layer 1 may have a two-layer structure of a first base material layer and a second base material layer, or a three-layer or more structure having additional layers. In this case, for example, the material used for the base material layer 1 can be used. Also, it is preferable that the total thickness of the first base material layer, the second base material layer, etc. is the "thickness of the base material layer 1".
[0020] <Intermediate layer> The intermediate layer 2 is a layer provided for the purpose of imparting cushioning properties to the cover tape 10 for electronic component packaging according to the present embodiment. Thereby, the adhesion between the cover tape 10 for electronic component packaging and the carrier tape during sealing can be improved.
[0021] The material of the intermediate layer 2 is not particularly limited as long as it can impart cushioning properties to the cover tape 10 for electronic component packaging. Examples include one or more selected from polyacrylic acid derivatives, polyacrylate esters derivatives, polyvinyl acetate derivatives, styrene resins, olefin resins, cyclic olefin resins, and copolymers thereof. Among these, olefin resins are preferable, and more preferably ethylene resins can be suitably used.
[0022] The thickness of the intermediate layer 2 is typically 10 μm or more and 50 μm or less, preferably 15 μm or more and 45 μm or less, from the viewpoint of improving the adhesion between the cover tape 10 for electronic component packaging and the carrier tape during sealing.
[0023] <Sealant layer> The sealant layer 3 contains an adhesive resin and an antistatic agent, and is a layer provided on the surface side opposite to the surface in contact with the base material layer 1 of the intermediate layer 2. When the cover tape 10 for electronic component packaging is sealed (e.g., heat-sealed) to the carrier tape, it is the layer in contact with the carrier tape. The sealant layer 3 has heat-sealability and can be adhered to the carrier tape, showing easy peelability that can be easily peeled off during use. In the sealant layer 3, the antistatic agent is dissolved or dispersed in the resin. That is, good compatibility is obtained between the adhesive resin and the antistatic agent, and the antistatic agent is uniformly dispersed throughout the sealant layer 3 in the adhesive resin as the matrix resin. Note that the sealant layer 3 may be a laminate of an adhesive resin layer and an antistatic layer in this order on the side opposite to the surface in contact with the intermediate layer 2.
[0024] Specific examples of the material of the above adhesive resin of the sealant layer 3 include one or more selected from polyacrylic acid derivatives, polyacrylate esters derivatives, styrene-based polymers, olefin-based resins, urethane-based resins, ester-based resins, and copolymers thereof. Among these, from the viewpoint of dissolving or dispersing the antistatic agent well, polyacrylic acid derivatives and styrene-based polymers are preferred.
[0025] The sealant layer 3 preferably contains one or more selected from the group consisting of (A) indium tin oxide, (B) carbon nanotubes, and (C) polythiophene or polythiophene derivatives as the above antistatic agent. Thereby, the surface resistance value of the sealant layer 3 can be reduced to suppress the generation of static electricity accompanying peeling, the adhesiveness can be maintained, and good compatibility with the above adhesive resin used for the sealant layer 3 can be obtained. Moreover, by using an antistatic agent as (A) lindau stannum or (C) polythiophene or a polythiophene derivative, the effect of suppressing static electricity during peeling can be obtained more reliably.
[0026] Examples of the above (C) polythiophene or a derivative of polythiophene include polythiophene, poly(3,4)-ethylenedioxythiophene, and poly(3-thiophene-β-ethanesulfonic acid). Among these, from the viewpoint of maintaining better antistatic properties and sealing properties, it is preferably poly(3,4)-ethylenedioxythiophene or a derivative thereof.
[0027] The sealant layer 3 may contain, as other additives, a dispersant for improving the dispersibility of the antistatic agent, silica sol, a leveling agent, a conductive aid, and the like.
[0028] From the viewpoint of suitably performing the sealing operation and the peeling operation, the thickness of the sealant layer 3 is typically preferably 0.02 μm or more and 20 μm or less, and more preferably 0.03 μm or more and 15 μm or less.
[0029] From the viewpoint of ensuring film strength, the thickness of the cover tape for packaging electronic components according to this embodiment is preferably 40 μm or more and 65 μm or less, and more preferably 45 μm or more and 60 μm or less.
[0030] Hereinafter, the characteristics of the cover tape for packaging electronic components according to this embodiment will be described.
[0031] In the cover tape for electronic component packaging according to the present embodiment, the upper limit value of the antimony content measured for the entire cover tape for electronic component packaging is 150 ppm or less, preferably 140 ppm or less, and more preferably 130 ppm or less, with respect to the entire cover tape for electronic component packaging. The lower limit value of the antimony content measured for the entire cover tape for electronic component packaging is not particularly limited, but is 0 ppm or more. By setting the antimony content measured for the entire cover tape for electronic component packaging within the above range, it becomes possible to meet the demand for antimony reduction.
[0032] In the cover tape for electronic component packaging according to the present embodiment, when the cover tape for electronic component packaging is made to have a width of 5.5 mm, and the sealant layer side of the cover tape for electronic component packaging is combined with the uneven surface side of a polystyrene film having a width of 8 mm and an average surface roughness (Ra) of the uneven surface of 0.25 μm, and a double-edged iron with a single-edge width of 0.5 mm and a length of 28 mm is used for heat sealing under the conditions of a seal temperature of 160 °C, a load of 5 kgf, a seal time of 60 milliseconds, and a carrier tape feed pitch of 4 mm, the lower limit value of the peel strength of the cover tape for electronic component packaging with respect to the polystyrene film under the conditions of a peel rate of 300 mm / min, a measurement temperature of 25 °C, and a peel angle of 170 ° is 0.3 N or more, preferably 0.35 N or more, and more preferably 0.4 N or more. Also, the upper limit value of the 170° peel strength of the cover tape for electronic component packaging with respect to the polystyrene film is 0.9 N or less, preferably 0.8 N or less, and more preferably 0.7 N or less. By setting the 170° peel strength of the cover tape for electronic component packaging with respect to the polystyrene film within the above range, it is possible to obtain a good balance between adhesiveness and peelability with respect to the carrier tape.
[0033] In the cover tape for packaging electronic components according to the present embodiment, the 170° peel strength of the cover tape for packaging electronic components with respect to the polystyrene film is defined as P1. After the cover tape for packaging electronic components is placed at 40°C and 90% RH for 14 days, when the 170° peel strength of the cover tape for packaging electronic components with respect to the polystyrene film measured in the same manner as P1 is defined as P2, the value of (P2 / P1)×100 is preferably 50% or more, more preferably 60% or more, still more preferably 70% or more, and preferably 150% or less, more preferably 140% or less, still more preferably 130% or less. By setting the value of (P2 / P1)×100 within the above range, stable peel strength can be maintained even after environmental changes during transportation or storage.
[0034] The surface resistance value on the surface of the base material layer of the cover tape for packaging electronic components according to the present embodiment, measured at 25°C and 50% RH, is preferably 1.0×10 3 Ω or more, more preferably 1.0×10 4 Ω or more, still more preferably 1.0×10 5 Ω or more, and preferably 1.0×10 13 Ω or less, more preferably 1.0×10 12 Ω or less, still more preferably 1.0×10 11 Ω or less. By setting the surface resistance value of the base material layer of the cover tape for packaging electronic components within the above range, static electricity generated due to various factors can be efficiently discharged to the outside. Note that the surface of the base material layer refers to the exposed surface side of the base material layer in the cover tape for packaging electronic components (that is, the surface that does not contact the intermediate layer in the base material layer).
[0035] The surface resistance value on the surface of the sealant layer of the cover tape for packaging electronic components according to the present embodiment, measured at 25°C and 50% RH, is preferably 1.0×10 3 Ω or more, more preferably 1.0×10 4 Ω or more, still more preferably 1.0×10 5 Ω or more, and preferably 1.0×1012 is Ω or less, more preferably 1.0×10 11 Ω or less, even more preferably 1.0×10 10 Ω or less. By setting the surface resistance value on the surface of the sealant layer measured at 25 °C and 50% RH of the cover tape for electronic component packaging within the above range, it is possible to obtain a cover tape for electronic component packaging with even better antistatic properties due to the antistatic property accompanying the peeling of the carrier tape. Note that the surface of the sealant layer refers to the exposed surface side of the sealant layer in the cover tape for electronic component packaging (that is, the surface that does not contact the intermediate layer in the sealant layer).
[0036] In the cover tape for electronic component packaging according to this embodiment, under the conditions of 25 °C and 50% RH, resin pellets were put into a bag made using the cover tape and vibrated, and then the amount of triboelectric charge on the surface of the resin pellets was measured by a predetermined method. The lower limit value of the absolute value of the amount of triboelectric charge on the surface of the resin pellets is preferably 0.0 nC or more. Also preferably, the upper limit value of the absolute value of the amount of triboelectric charge on the surface of the resin pellets is 1.0 nC or less, more preferably 0.8 nC or less, and even more preferably 0.6 nC or less. By doing so, the antistatic property accompanying the peeling of the carrier tape can be further improved. Specifically, when the value of the triboelectric charge satisfies the above numerical range, even when the working environment at the manufacturing site of electronic devices is in a dry state with a humidity of about 30% RH, static electricity generated by friction between the cover tape and electronic components during transportation, static electricity generated when peeling the cover tape from the carrier tape, static electricity generated from attached dust and contents, etc., it is possible to realize a cover tape with excellent charging characteristics. Note that the resin pellets used for measuring the triboelectric charge are composed of 85% by mass of silica and 15% by mass of epoxy resin, and those with dimensions of 3 mm × 1.5 mm × 1 mm are used. As the silica, those with an average particle size of 1 to 10 μm and those with an average particle size of 0.5 to 1 μm can be mixed and used. As the epoxy resin, a phenol novolak-based resin can be used. Note that if the blending ratio of silica and epoxy resin is the above blending ratio, even if the type of epoxy resin and the average particle size of silica are somewhat different, it does not significantly affect the result of the triboelectric charge.
[0037] The total light transmittance of the cover tape for electronic component packaging according to this embodiment, measured with a light source D65 in accordance with JIS K7361-1 (1997), is preferably 70% or more, more preferably 75% or more, still more preferably 80% or more, preferably 95% or less, more preferably 94% or less, and still more preferably 93% or less. By doing so, in the package 100 composed of the cover tape 10 for electronic component packaging and the carrier tape, transparency can be imparted to such an extent that it is possible to inspect whether the electronic components are correctly accommodated in the pockets of the carrier tape. That is, by setting the total light transmittance of the cover tape for electronic component packaging to be equal to or higher than the above lower limit value, it becomes possible to visually confirm and check the electronic components accommodated inside the package 100 composed of the cover tape 10 for electronic component packaging and the carrier tape from the outside of the package 100.
[0038] The external haze of the cover tape for electronic component packaging according to this embodiment, measured with a light source D65 in accordance with JIS K7136 (2000), is preferably 5% or more, more preferably 6% or more, most preferably 7% or more, and preferably 50% or less, more preferably 45% or less, and most preferably 40% or less. By setting the external haze of the cover tape for electronic component packaging to be equal to or lower than the above upper limit value, transparency can be imparted to such an extent that it is possible to inspect whether the electronic components are correctly accommodated in the pockets of the carrier tape in the package composed of the cover tape 10 for electronic component packaging and the carrier tape.
[0039] In this embodiment, for example, by appropriately selecting the types and blending amounts of the respective components included in the base material layer 1, the intermediate layer 2, and the sealant layer 3 that constitute the cover tape for electronic component packaging, the preparation method of the coating liquid for forming the sealant layer, the manufacturing method of the cover tape for electronic component packaging, and other conditions, it becomes possible to control the 170° peel strength with respect to the above-mentioned polystyrene film and the antimony content with respect to the entire cover tape for electronic component packaging. As a result, even in the cover tape for electronic component packaging with reduced antimony, the balance between adhesiveness and peelability with respect to the carrier tape is excellent, and the generation of static electricity accompanying peeling can be suppressed. Also, in this embodiment, by appropriately selecting the above conditions, when the 170° peel strength with respect to the above-mentioned polystyrene film is defined as P1, and the 170° peel strength with respect to the above-mentioned polystyrene film measured after placing the cover tape for electronic component packaging at 40°C and 90% RH for 14 days is defined as P2, the value of (P2 / P1)×100, the surface resistance value of the base material layer 1, the surface resistance value of the sealant layer 3, the triboelectric charge amount, the total light transmittance, and the haze can be controlled. In the cover tape for electronic component packaging with reduced antimony, the peel strength can be made stable even after experiencing environmental changes, the effect of suppressing static electricity during peeling can be made more reliable, and furthermore, transparency sufficient to visually recognize electronic components from the outside can be imparted.
[0040] <Manufacturing Method of Cover Tape for Electronic Component Packaging> An example of the manufacturing method of the cover tape for electronic component packaging according to this embodiment will be described. First, the intermediate layer 2 is formed on the surface of the base material layer 1. The intermediate layer 2 can be formed, for example, by an extrusion lamination method or a dry lamination method. Next, the sealant layer 3 is formed by applying a predetermined material onto the intermediate layer 2 by a coating method and drying it, or by laminating it by an extrusion lamination method.
[0041] Also, when forming the above-mentioned adhesive layer, the material of the adhesive layer may be applied to the surface of the target layer by a conventionally known coating method.
[0042] The cover tape for electronic component packaging according to this embodiment can be used as a package attached to a carrier tape. That is, it is preferable to form a package including a carrier tape having a plurality of storage portions for storing electronic components, the electronic components stored in the storage portions, and the cover tape for electronic component packaging disposed so as to cover the storage portions. With such a package, generation of static electricity can be suppressed, and the electronic components stored in the storage portions can be more reliably protected from static electricity.
[0043] <Electronic component package> An electronic component package can be obtained from the cover tape for electronic component packaging of this embodiment described above and a carrier tape in which electronic components are housed in recesses. This will be described with reference to FIG. 2.
[0044] In FIG. 2, the cover tape 10 for electronic component packaging is used as a lid material for a belt-shaped carrier tape 20 in which concave pockets 21 are continuously provided according to the shape of the electronic components. Specifically, the cover tape 10 for electronic component packaging is adhered (usually, heat-sealed) to the surface of the carrier tape 20 so as to cover the entire opening surface of the pocket 21 of the carrier tape 20. Hereinafter, the structure obtained by adhering the cover tape 10 for electronic component packaging and the carrier tape 20 will be referred to as an electronic component package 100.
[0045] The electronic component package 100 can be manufactured, for example, by the following procedure. First, electronic components are housed in the pockets 21 of the carrier tape 20. Next, the cover tape 10 for electronic component packaging is heat-sealed and adhered to the surface of the carrier tape 20 so as to cover the entire opening surface of the pocket 21 of the carrier tape 20. At this time, the sealant layer 3 in the cover tape 10 for electronic component packaging is brought into contact with the carrier tape 20 (that is, heat-sealing is performed so that the "back surface" of the cover tape 10 for electronic component packaging in FIG. 2 becomes the sealant layer 3). The specific method and conditions of heat sealing are not particularly limited as long as the electronic component packaging cover tape 10 adheres sufficiently strongly to the carrier tape 20. Typically, it can be performed within the range of a temperature of 100 to 240 °C, a load of 0.1 to 10 kgf, and a time of 0.0001 to 1 second using a known heat sealing machine.
[0046] As described above, a structure (electronic component package 100) in which electronic components are hermetically housed is obtained. This structure (electronic component package 100) is wound around a reel, for example, and then conveyed to a work area where the electronic components are mounted on an electronic circuit board or the like. The material of the reel can be made of metal, paper, plastic, or the like.
[0047] After the electronic component package 100 is conveyed to the work area, the electronic component packaging cover tape 10 is peeled off from the carrier tape 20, and the housed electronic components are taken out.
[0048] Note that the electronic components housed in the electronic component package 100 are not particularly limited. Examples include all components used in the manufacture of electrical and electronic devices, such as semiconductor chips, transistors, diodes, capacitors, piezoelectric elements, optical elements, LED-related members, connectors, and electrodes.
[0049] Although the embodiments of the present invention have been described in detail above, these are examples of the present invention. In addition, various configurations other than the above can be adopted. Further, the present invention is not limited to the above-described embodiments.
Examples
[0050] The embodiments of the present invention will be described in detail based on examples and comparative examples, but the present invention is not limited thereto.
[0051] Each constituent material of the sealant layer shown in Table 1 is as follows. (Adhesive resin) · Resin 1: Poly(meth)acrylic acid derivative (manufactured by Dainippon Ink and Chemicals, Inc., "A450A") · Resin 2: Styrene polymer (manufactured by Nippon Zeon Co., Ltd., "Nipol 2507H") · Resin 3: Polyacrylic acid derivative (manufactured by Mitsui Dow Polychemical Co., Ltd., "Elvaloy AC1820") · Resin 4: Styrene polymer (manufactured by Nippon Steel Chemical Co., Ltd., "Estyrene MS-600") (Antistatic agent) · Antistatic agent 1: Tin oxide doped with indium (manufactured by Mitsubishi Materials Corporation, "SP-2") · Antistatic agent 2: Carbon nanotubes (manufactured by Sigmaaldrich, "isoNanotubes-M (registered trademark) 750530") · Antistatic agent 3: Polythiophene derivative (manufactured by Sigmaaldrich, "Aedotron (registered trademark) C3-NM") · Antistatic agent 4: Polythiophene derivative (PEDOT:PSS) (manufactured by Heraeus, "Clevios P1000") · Antistatic agent 5: Antimony-doped tin oxide (manufactured by Mitsubishi Materials Corporation, "T-1") · Antistatic agent 6: Polypropylene / polyethylene glycol (manufactured by Sanyo Chemical Industries, Ltd., "Perezstat 212")
[0052] <Example 1> [Production of base layer and intermediate layer] An anchor coating agent was wet-coated at 4 μm by gravure coating on an antistatic polyethylene terephthalate (PET) film (manufactured by Toyobo Co., Ltd., "E7455") with a thickness of 12 μm. After drying at 100 °C, low-density polyethylene (manufactured by Sumitomo Chemical Co., Ltd., "Sumicasen L705", 37 μm thick) was extrusion laminated and cooled with a cooling roll (surface temperature 20 °C) to produce a laminated film composed of a base layer and an intermediate layer.
[0053] On the surface of the obtained laminated film on the intermediate layer side, a sealant layer composed of the components shown in Table 1 was formed into a film with a thickness of 0.5 μm by the gravure coating method. The total thickness of the cover tape is shown in Table 1.
[0054] <Examples 2 to 4, Comparative Examples 1 to 4> According to the formulation described in Table 1, a cover tape for electronic component packaging was prepared in the same manner as in Example 1.
[0055] <170° Peel Strength against Polystyrene Film> Each of the cover tapes for electronic component packaging obtained above was made to have a width of 5.5 mm, and the sealant layer side of the cover tape for electronic component packaging was combined with the uneven surface side of a polystyrene film (manufactured by Sumitomo Bakelite Co., Ltd., "CEL-E980A") having a width of 8 mm and an average surface roughness (Ra) of the uneven surface of 0.25 μm. Using a double-edged iron with a single-edge width of 0.5 mm and a length of 28 mm, heat sealing was performed using a heat sealer (manufactured by Tokyo Wells Co., Ltd., "TWA-6621") under the conditions of a seal temperature of 160 °C, a load of 5 kgf, a seal time of 60 milliseconds, a carrier tape feed pitch of 4 mm, and 2 rows and 7 strikes to adjust the sample. The peel strength (N) immediately after heat sealing was measured. Let the peel strength immediately after heat sealing be P1 (N). The measurement of the peel strength was performed using a peel tester (manufactured by EPI Co., Ltd., "PTS-5000") under the conditions of a peel speed of 300 mm / min, a peel angle of 170°, and a measurement temperature of 25 °C. The surface roughness (Ra) of the polystyrene film was measured using a surface roughness measuring instrument (manufactured by Mitutoyo Co., Ltd., "SJ-210") in accordance with JIS B 0601 (2001) for the portion of the polystyrene film used above that was bonded to the cover tape for electronic component packaging before bonding the cover tape for electronic component packaging. The unit is μm. In addition, after leaving the cover tape for electronic component packaging obtained above in an environment of 40 °C and 90% RH for 14 days, the 170° peel strength (N) of the cover tape for electronic component packaging against the polystyrene film was measured in the same manner as above. Let the peel strength immediately after heat sealing of the cover tape for electronic component packaging after being left in an environment of 40 °C and 90% RH for 14 days be P2 (N). From the obtained values of P1 and P2, the value of (P2 / P1) × 100 was calculated. The values of P1, P2, and (P2 / P1)×100 are shown in Table 1.
[0056] <Antimony content> The cover tape for electronic component packaging obtained above was completely dissolved in a nitric acid / hydrochloric acid / hydrofluoric acid solution using microwaves, and the antimony content (ppm) with respect to the entire cover tape for electronic component packaging was measured by inductively coupled plasma-atomic emission spectrometry (ICP). The results are shown in Table 1.
[0057] <Surface resistance value of the base material layer> The surface resistance value (Ω) on the surface of the base material layer of the cover tape for electronic component packaging obtained above was measured at 25°C and 50% RH using a surface resistance measuring instrument manufactured by SIMCO (SIMCO "ST-3"). The results are shown in Table 1. Note that "5.E+10" in Example 1 described in Table 1 represents "5×10 10 ".
[0058] <Surface resistance value of the sealant layer> The surface resistance value (Ω) on the surface of the sealant layer of the cover tape for electronic component packaging obtained above was measured at 25°C and 50% RH using a surface resistance measuring instrument manufactured by SIMCO (SIMCO "ST-3"). The results are shown in Table 1. Note that "2.E+09" in Example 1 described in Table 1 represents "2×10 9 ".
[0059] <Amount of triboelectrification> In the cover tape for electronic component packaging obtained above, the amount of triboelectrification under the conditions of 25°C and 50% RH on the surface of the resin pellets was measured according to the following procedures (a) to (e). (a) The cover tape for electronic component packaging was cut into dimensions of 25 mm in width and 200 mm in length, bent in half in the length direction so that the surface of the sealant layer faced inward, and both sides were fastened with tape to create a bag with a width of 25 mm and a length of 100 mm. (b) Resin pellets with dimensions of 3 mm × 1.5 mm × 1 mm, consisting of 85% by mass of silica and 15% by mass of epoxy resin, were prepared. (c) After discharging the bag and the resin pellets, 5 of the resin pellets were placed into the bag, the opening was fastened with tape, and it was sealed. (d) The bag containing the resin pellets sealed in (c) was fixed to a vortex mixer (Model "G-560E" manufactured by SCIENTIFIC INDUSTRIES) and vibrated under the conditions of 600 rpm for 5 minutes. (e) Five of the resin pellets were taken out from inside the bag and all were transferred to a Faraday cup (Model 231 manufactured by Electro-Tech Systems). Using a nanocoulomb meter (Model 230 manufactured by Electro-Tech Systems), the charge amount of the five resin pellets was measured under the conditions of 25°C and 50% RH. The absolute value of the measured value was taken as the triboelectric charge amount. The results are shown in Table 1.
[0060] Next, the measured triboelectric charge amounts were evaluated according to the following evaluation criteria. The results are shown in Table 1. Evaluation criteria for antistatic property: ◎: Triboelectric charge amount is 0.0 nC or more and 0.2 nC or less 〇: Triboelectric charge amount is greater than 0.2 nC and 1.0 nC or less ×: Triboelectric charge amount is greater than 1.0 nC
[0061] <Total light transmittance> The total light transmittance (%) of the cover tape for electronic component packaging obtained above was measured at a light source D65 using a Haze Meter NDH 2000 manufactured by Nippon Denshoku Kogyo Co., Ltd. in accordance with JIS K7361-1 (1997). The results are shown in Table 1.
[0062] <External haze> The external haze (%) of the cover tape for electronic component packaging obtained above was measured at a light source D65 using a Haze Meter NDH 2000 manufactured by Nippon Denshoku Industries Co., Ltd. in accordance with JIS K7136 (2000). The results are shown in Table 1.
[0063] [Table 1]
[0064] In Examples 1 to 4, while reducing the antimony content, the 170° peel strength with respect to the polystyrene film, the surface resistance value of the sealant layer surface, the surface resistance value of the base material layer surface, the triboelectric charge amount, the total light transmittance and haze of the entire cover tape for electronic component packaging were within an appropriate range, and a cover tape for electronic component packaging was obtained. Examples 1 to 4 showed comparable peel strength and the like even when compared with Comparative Example 1 where the antimony content was not reduced. Further, in Comparative Example 2, although the antimony content was reduced, the 170° peel strength with respect to the polystyrene film did not fall within an appropriate range. In addition, in Comparative Example 4, since the sealant layer did not contain an antistatic agent, a sufficient resistance value of the sealant surface could not be obtained. In Comparative Example 3, since the structure of the base material layer, the intermediate layer, and the sealant layer was not satisfied, the 170° peel strength with respect to the polystyrene film did not fall within an appropriate range. [Explanation of Reference Numerals]
[0065] 1 Base material layer 2 Intermediate layer 3 Sealant layer 10 Cover tape 20 Carrier tape 21 Pocket 100 Electronic component package
Claims
1. A cover tape for packaging electronic components having a base material layer, an intermediate layer, and a sealant layer, in this order, wherein the sealant layer contains an adhesive resin and an antistatic agent, the antistatic agent contains (A) lindop tin or a carbon nanotube or (C) polythiophene or a polythiophene derivative, and is selected from the group consisting of one or more of them, the peel strength against a polystyrene film measured by <Measurement of Peel Strength> below is 0.3 N or more and 0.9 N or less, the antimony content measured for the entire cover tape for packaging electronic components is 0 ppm or more and 150 ppm or less with respect to the entire cover tape for packaging electronic components, the thickness of the sealant layer is 0.02 μm or more and 15 μm or less, and the thickness of the intermediate layer is 15 μm or more and 50 μm or less. A cover tape for packaging electronic components. <Measurement of Peel Strength> The cover tape for packaging electronic components is made to have a width of 5.5 mm, and the sealant layer side of the cover tape is combined with the uneven surface side of a polystyrene film having a width of 8 mm and an average surface roughness (Ra) of the uneven surface of 0.25 μm. Using a double-edged iron with a single-edge width of 0.5 mm and a length of 28 mm, when heat-sealing is performed under the conditions of a seal temperature of 160 °C, a load of 5 kgf, a seal time of 60 milliseconds, and a carrier tape feed pitch of 4 mm, the peel strength of the cover tape for packaging electronic components against the polystyrene film is measured under the conditions of a peeling speed of 300 mm / min, a measurement temperature of 25 °C, and a peeling angle of 170 °.
2. The surface resistance value on the surface of the base material layer measured at 25°C and 50% RH is 1.0×10 13 Ω or less, a cover tape for packaging electronic components. The cover tape for packaging electronic components according to Claim 1,
3. The surface resistivity on the surface of the sealant layer measured at 25°C and 50% RH is 1.0×10 3 Ω or more and 1.0×10 12 Ω or less, a cover tape for electronic component packaging. The cover tape for packaging electronic components according to Claim 1 or 2,
4. The cover tape for packaging electronic components according to any one of Claims 1 to 3, wherein when the 170° peel strength against the polystyrene film of the cover tape for packaging electronic components is defined as P1, and the 170° peel strength against the polystyrene film measured by <Measurement of Peel Strength> after the cover tape for packaging electronic components is placed at 40 °C and 90% RH for 14 days is defined as P2, the value of (P2 / P1)×100 is 50% or more and 150% or less. A cover tape for packaging electronic components.
5. The cover tape for packaging electronic components according to any one of Claims 1 to 4, A cover tape for electronic component packaging, wherein the amount of triboelectrification on the surface of resin pellets measured at 25°C and 50% RH is 0.0 nC or more and 1.0 nC or less, according to the following procedures (a) to (e). (a) Cut the cover tape for electronic component packaging into a size of 25 mm in width and 200 mm in length, fold it in half in the length direction so that the surface of the sealant layer faces inward, and fasten both sides with tape to create a bag with a width of 25 mm and a length of 100 mm. (b) Prepare resin pellets composed of 85% by mass of silica and 15% by mass of epoxy resin, with dimensions of 3 mm × 1.5 mm × 1 mm. (c) After discharging the electricity of the bag and the resin pellets, put 5 of the resin pellets into the bag, fasten the opening with tape, and seal it. (d) Fix the bag containing the resin pellets sealed in step (c) to a vortex mixer and vibrate it under the conditions of 600 rpm for 5 minutes. (e) After taking out 5 of the resin pellets from inside the bag, transfer all of them to a Faraday cup, and use a nano coulomb meter to measure the charging amount of the resin pellets under the conditions of 25°C and 50% RH. The absolute value of the measured value is taken as the amount of triboelectrification.
6. The cover tape for electronic component packaging according to any one of Claims 1 to 5, The cover tape for electronic component packaging, wherein the total light transmittance measured with a light source D65 in accordance with JIS K7361-1 (1997) is 70% or more and 95% or less.
7. The cover tape for electronic component packaging according to any one of Claims 1 to 6, The cover tape for electronic component packaging, wherein the external haze measured with a light source D65 in accordance with JIS K7136 (2000) is 5% or more and 50% or less.
8. The cover tape for electronic component packaging according to any one of Claims 1 to 7, The cover tape for electronic component packaging, wherein the (C) polythiophene or polythiophene derivative is poly(3,4-ethylenedioxythiophene) or a derivative thereof.
9. The cover tape for electronic component packaging according to any one of Claims 1 to 8, The cover tape for electronic component packaging, wherein the sealant layer contains one or two selected from polyacrylic acid derivatives and styrene-based polymers.
Citation Information
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