Light emitting element driving device

Abstract

To provide a light emitting element driving device that can operate in synchronization with another light emitting element driving device without using a clock signal common to the other light emitting element driving device.SOLUTION: An LED dimming control device (4A) includes a receiver (41) configured to receive a predetermined communication signal transmitted over a communication line (3), and is configured to perform programmable PWM dimming of individual LEDs using an internal PWM clock signal. The predetermined communication signal is a UART communication signal, and each UART frame of a serial interface is composed of one start bit and data bits. The internal PWM clock signal is adjusted by the predetermined communication signal. The predetermined communication signal is a signal in which the start bit having a first logic level is transmitted from a transmitting unit at a predetermined period, and a signal in which the data bits succeeding each start bit have a second logic level is transmitted a predetermined number of times in succession.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a light emitting element driving device. [Background technology]

[0002] Conventionally, a light emitting element driving device having multiple channels is known (see, for example, Patent Document 1). When a single light emitting element driving device alone cannot achieve the desired number of channels, a light emitting system is constructed using multiple light emitting element driving devices. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-107259 Summary of the Invention [Problem to be solved by the invention]

[0004] Here, when on / off control or dimming control for each channel is performed, if the plurality of light emitting element driving devices do not operate in synchronization, the light emitting pattern of the light emitting system will differ from the desired light emitting pattern.

[0005] For example, a common clock signal may be supplied to each light-emitting element driving device, and each light-emitting element driving device may operate based on the clock signal, thereby allowing the plurality of light-emitting element driving devices to operate in synchronization. However, when a common clock signal is supplied to each light-emitting element driving device, it is necessary to provide a port for inputting the clock signal to each light-emitting element driving device, which results in an increase in the size and cost of the light-emitting element driving device.

[0006] In view of the above circumstances, an object of the present invention is to provide a light emitting element driving device that can operate in synchronization with other light emitting element driving devices without using a clock signal common to the other light emitting element driving devices. [Means for solving the problem]

[0007] The light-emitting element driving device disclosed in this specification comprises a receiving unit that receives a predetermined communication signal transmitted over a communication line, a generating unit that generates a reference signal based on the start timing of a start bit in the predetermined communication signal, and a determining unit that determines the timing of switching a light-emitting element from off to on based on the reference signal, wherein the predetermined communication signal is configured (first configuration) such that the start bit, which is at a first logic level, is transmitted from a transmitter at regular intervals, and the data bits following each start bit do not become at a second logic level more than a predetermined number of times in succession.

[0008] In the light-emitting element driving device of the first configuration described above, the generation unit may be configured (second configuration) to include a first detection unit that detects that the period during which the communication line is at the second logic level has continued for a first predetermined time, and a second detection unit that detects the timing of the appearance of the first logic level that appears on the communication line for the first time after the period during which the communication line is at the second logic level has continued for the first predetermined time.

[0009] In the light-emitting element driving device of the second configuration described above, the second detection unit may be configured (third configuration) to exceptionally not detect the appearance timing as the start timing of the start bit if the period during which the communication line is at the first logic level does not continue for a second predetermined time from the appearance timing.

[0010] In the light emitting element driving device of the third configuration, the second predetermined time may be shorter than the first predetermined time (fourth configuration).

[0011] In the light emitting element driving device of any one of the first to fourth configurations, the predetermined communication signal may include dimming information for the light emitting element (fifth configuration).

[0012] In the light-emitting element driving device of any one of the first to fifth configurations, the predetermined communication signal may be a UART (Universal Asynchronous Receiver / Transmitter) communication signal (sixth configuration).

[0013] The light-emitting system disclosed in this specification has a configuration (seventh configuration) that includes a plurality of light-emitting element driving devices of any one of the first to sixth configurations, and further includes the communication line, the transmitter, and at least the same number of light-emitting elements as the light-emitting element driving devices.

[0014] The vehicle disclosed in this specification has a configuration (eighth configuration) that includes the lighting system of the seventh configuration. [Effects of the Invention]

[0015] According to the present invention, it is possible to provide a light emitting element driving device that can operate in synchronization with other light emitting element driving devices without using a clock signal common to the other light emitting element driving devices. [Brief explanation of the drawings]

[0016] [Figure 1] 1 illustrates a light-emitting system according to an embodiment; [Figure 2] FIG. 1 is a diagram showing an example of the configuration of a light-emitting element driving device; [Figure 3] Time chart for explaining the operation of the light emitting element driving device [Figure 4] Another time chart for explaining the operation of the light emitting element driving device [Figure 5] Further time chart for explaining the operation of the light emitting element driving device [Figure 6] FIG. 10 is a diagram showing an example of the arrangement of light-emitting element circuits; [Figure 7] Vehicle exterior view DETAILED DESCRIPTION OF THE INVENTION

[0017] Fig. 1 is a diagram showing a light-emitting system according to one embodiment. The light-emitting system 1 shown in Fig. 1 includes a microcomputer 2, a communication bus 3, light-emitting element driving devices 4A to 4D, light-emitting element circuits 5A_1 to 5A_8, 5B_1 to 5B_8, 5C_1 to 5C_8, and 5D_1 to 5D_8, and DC / DC converters 6A to 6D.

[0018] The microcomputer 2 controls the dimming of each ch (channel) of the light-emitting element driving devices 4A to 4D via the communication bus 3. The microcomputer 2 distinguishes and controls the light-emitting element driving devices 4A to 4D by specifying addresses. For example, when a 2-bit address is used, the microcomputer 2 can distinguish and control up to four light-emitting element driving devices. Furthermore, when a 3-bit address is used, the microcomputer 2 can distinguish and control up to eight light-emitting element driving devices.

[0019] The microcomputer 2 controls the dimming of each channel of the light-emitting element driving devices 4A to 4D by the on-duty of PWM (Pulse Width Modulation). Note that, unlike this embodiment, dimming control other than PWM dimming control may be used. For example, the microcomputer 2 may control the dimming by the value of the DC current flowing through each channel of the light-emitting element driving devices 4A to 4D.

[0020] The communication bus 3 is a communication line that transmits a predetermined communication signal. The predetermined communication signal is a signal in which a start bit at a first logic level is transmitted at a constant period from the microcomputer 2 functioning as a transmitter, and the data bits following each start bit do not become a second logic level a predetermined number of times in succession. For example, a UART communication signal can be used as the predetermined communication signal. In the following description, the UART communication signal is used as the predetermined communication signal. In the UART communication signal, the first logic level is a low level, and the second logic level is a high level.

[0021] The communication bus 3 may be, for example, a CAN (Controller Area Network) bus.

[0022] The light-emitting element driving device 4A has 1ch to 8ch, and drives the light-emitting element circuits connected to 1ch to 8ch for each channel according to dimming control by the microcomputer 2. The cathode of the light-emitting element circuit 5A_k is connected to the kch of the light-emitting element driving device 4A (k is a natural number between 1 and 8).

[0023] The light emitting element driving devices 4B to 4D have the same configuration as the light emitting element driving device 4A, except that the addresses assigned to them are different.

[0024] Each of the light-emitting element circuits 5A_k to 5D_k is a series circuit of a plurality of LEDs (Light Emitting Diodes). Unlike the present embodiment, each of the light-emitting element circuits 5A_k to 5D_k may be a single LED. Furthermore, instead of an LED, other light-emitting elements such as an organic EL (Electro Luminescence) may be used.

[0025] The DC / DC converter 6A converts the input voltage VIN to an output voltage VOUT1 and supplies the output voltage VOUT1 to the anode of the light-emitting element circuit 5A_k. The DC / DC converter 6B converts the input voltage VIN to an output voltage VOUT2 and supplies the output voltage VOUT2 to the anode of the light-emitting element circuit 5B_k. The DC / DC converter 6C converts the input voltage VIN to an output voltage VOUT3 and supplies the output voltage VOUT3 to the anode of the light-emitting element circuit 5C_k. The DC / DC converter 6D converts the input voltage VIN to an output voltage VOUT4 and supplies the output voltage VOUT4 to the anode of the light-emitting element circuit 5C_k. The output voltages VOUT1 to VOUT4 are basically assumed to have the same value. However, for example, if the number of light-emitting elements constituting the light-emitting element circuit 5A_k is different from the number of light-emitting elements constituting the light-emitting element circuit 5B_k, the output voltages VOUT1 and VOUT2 may be set to different values. Unlike this embodiment, at least two of the DC / DC converters 6A to 6D may be integrated.

[0026] Next, the light emitting element driving device 4A will be described with reference to Fig. 2 and Fig. 3. Fig. 2 is a diagram showing an example of the configuration of the light emitting element driving device 4A. Fig. 3 is a time chart for explaining the operation of the light emitting element driving device 4A.

[0027] The light emitting element driving device 4A includes a terminal 40, a receiving section 41, a generating section 42, a determining section 43, and current sources 44_1 to 44_8.

[0028] The terminal 40 is connected to the communication bus 3 (see FIG. 1).

[0029] The receiving unit 41 receives a UART communication signal transmitted via the communication bus 3 (see FIG. 1). The receiving unit 41 stores the address of the light-emitting element driving device 4A in a non-volatile manner, extracts information related to the light-emitting element driving device 4A from the UART communication signal based on the address of the light-emitting element driving device 4A, and stores the extracted information in a register 431 in the determining unit 43. In this embodiment, the receiving unit 41 extracts the on-duty of PWM dimming for each channel of the light-emitting element driving device 4A.

[0030] In addition, the receiving unit 41 of the light-emitting element driving device 4B stores the address of the light-emitting element driving device 4B in a non-volatile manner, the receiving unit 41 of the light-emitting element driving device 4C stores the address of the light-emitting element driving device 4C in a non-volatile manner, and the receiving unit 41 of the light-emitting element driving device 4D stores the address of the light-emitting element driving device 4D in a non-volatile manner.

[0031] The generating unit 42 generates a reference signal based on the start timing of the start bit in the UART communication signal. The generating unit 42 includes a counter 421 and a falling edge detecting unit 422.

[0032] The counter 421 continues counting as long as the communication bus 3 (see FIG. 1) is at high level, and stops counting and resets the count value when the communication bus 3 (see FIG. 1) goes to low level.

[0033] The counter 421 detects that the communication bus 3 (see FIG. 1) has been at a high level for a first predetermined time PT1. Since a UART communication signal does not have nine or more consecutive data bits at a high level, the first predetermined time PT1 is set to the period during which nine consecutive bits are at a high level, and the value obtained by dividing the first predetermined time PT1 by the period of the internal clock signal of the light-emitting element driver 4A is used as the threshold value for the count value. This allows the counter 421 to detect that UART communication has ended.

[0034] When the counter 421 detects that the period during which the communication bus 3 (see FIG. 1) is at a high level has continued for the first predetermined time PT1, the counter 421 sets the enable signal to be output to the falling edge detection unit 422 to a high level.

[0035] The falling edge detection unit 422 detects a falling edge, which is the timing of a Low level appearing on the communication bus 3 (see FIG. 1), only while the enable signal is at High level, as the start timing of the start bit of UART communication. In other words, the falling edge detection unit 422 detects the timing of a Low level appearing on the communication bus 3 (see FIG. 1) for the first time after the communication bus 3 (see FIG. 1) has been at High level for a first predetermined time PT1, as the start timing of the start bit of UART communication.

[0036] Then, immediately after the falling edge detector 422 detects the falling edge, the counter 421 switches the enable signal from high level to low level.

[0037] The falling edge detection unit 422 outputs a reference signal SREF, which is a pulse signal generated at the start timing of the start bit of UART communication, to the PWM signal generation unit 432 in the determination unit 43.

[0038] The determining unit 43 determines the timing of switching the light-emitting element circuits 5A_1 to 5A_8 from off to on based on the reference signal SREF. The determining unit 43 includes a register 431 and a PWM signal generating unit 432.

[0039] As described above, the register 431 stores the on-duty of PWM dimming for each channel of the light-emitting element driving device 4A. In this embodiment, the on-duty of PWM dimming is expressed by an arbitrary integer (8-bit data) having a set value between 0 and 255.

[0040] The PWM signal generation unit 432 generates a PWM signal SPWMk (k is a natural number between 1 and 8) based on the on-duty of PWM dimming for the kth channel stored in the register 431 and the reference signal SREF. For example, during the period from time t1 to time T2, the PWM signal generation unit 432 calculates the on-duty of PWM dimming for each channel of the light-emitting element drive device 4A using the on-duty of PWM dimming for each channel transmitted by the UART signal S1, and reflects the calculation result from the timing (time t3) when the next pulse of the reference signal SREF appears. Specifically, the on-duty may be shifted to the off-duty after time t3 (the time obtained by subtracting the on-duty from the known UART communication period). The on-duty can be calculated by multiplying the UART communication period by the above-mentioned set value and dividing the result by 255.

[0041] The current source 44_k is connected to the cathode of the light-emitting element circuit 5A_k (see FIG. 1) and is PWM-driven by a PWM signal SPWMk (k is a natural number between 1 and 8). When the PWM signal SPWMk is at a high level, the current source 44_k is turned on and drives the light-emitting element circuit 5A_k. On the other hand, when the PWM signal SPWMk is at a low level, the current source 44_k is turned off and does not drive the light-emitting element circuit 5A_k.

[0042] When the light emitting element driving device 4A operates as described above, and the light emitting element driving devices 4B to 4D also operate in the same manner as the light emitting element driving device 4A, all of the light emitting element driving devices 4A to 4D operate in synchronization with the reference signal SREF. Therefore, without using a common clock signal among the light emitting element driving devices 4A to 4D, the light emitting pattern of the light emitting system 1 shown in Figure 1 can be made to match the desired light emitting pattern (the light emitting pattern as instructed by the microcomputer 2 to the light emitting element driving devices 4A to 4D).

[0043] Note that even if the on-duty of PWM dimming is the same for each channel, the timing of turning the lights on and off does not necessarily have to be the same; for example, as shown in Figure 4, the timing of turning the lights on and off between adjacent channels may be shifted by a predetermined shift time Δ. Also, although the on-duty of PWM dimming is the same for each channel in Figures 3 and 4, it goes without saying that the on-duty of PWM dimming for each channel may be different. Also, the on-duty of PWM dimming for each channel can be changed for each PWM cycle.

[0044] The above explanation has been given for the case where there is no abnormality in the voltage level of the communication bus 3 (see Figure 1), but there are cases where an abnormality occurs in the voltage level of the communication bus 3 (see Figure 1) due to an abnormality in the microcomputer 2 or the influence of noise, etc.

[0045] For example, if a period L1 occurs during which the communication bus 3 (see Figure 1) is at a low level before the first predetermined time PT1 has elapsed from the end of communication of the UART signal S1, the generation unit 42 will not mistakenly recognize the start of the period L1 as the start timing of the start bit of the UART signal (see Figure 5).

[0046] However, if a period L1 occurs in which the communication bus 3 (see Figure 1) is at a low level after the first predetermined time PT1 has elapsed since the end of communication of the UART signal S1, the generation unit 42 will mistakenly recognize the start of the period L1 as the start timing of the start bit of the UART signal.

[0047] To prevent the above-mentioned erroneous recognition, the falling edge detection unit 422 may exceptionally not detect the timing of the appearance of a low level on the communication bus 3 (see FIG. 1) as the start timing of the start bit of UART communication if the period during which the communication bus 3 (see FIG. 1) is at a low level does not continue for a second predetermined time from the timing of the appearance of a low level on the communication bus 3 (see FIG. 1). For example, the falling edge detection unit 422 may be provided with a filter circuit that can remove low-level signals whose duration is equal to or shorter than the second predetermined time.

[0048] The second predetermined time is set to be shorter than the first predetermined time PT1 described above. More specifically, it is set to be shorter than the low-level period of the communication bus 3 (see FIG. 1) that corresponds to the start bit of UART communication. If it is not set in this way, the start timing of the start bit of UART communication cannot be correctly detected.

[0049] The arrangement of the light-emitting element circuits 5A_1 to 5A_8, 5B_1 to 5B_8, 5C_1 to 5C_8, and 5D_1 to 5D_8 is not particularly limited, but by using a matrix arrangement such as that shown in Figure 6, for example, the light-emitting system 1 shown in Figure 1 can display an 8x4 dot picture animation.

[0050] The use of the light-emitting system shown in Fig. 1 is not particularly limited, and can be applied to, for example, a vehicle X10 shown in Fig. 7. The vehicle X10 includes display units X11 to X13. The display unit X11 is provided at the rear left end of the vehicle X10, the display unit X12 is provided below a hatchback door X14 of the vehicle X10, and the display unit X13 is provided at the rear right end of the vehicle X10. For example, by using light-emitting element circuits 5A_1 to 5A_8 as the display unit X11, light-emitting element circuits 5B_1 to 5B_8 and 5C_1 to 5C_8 as the display unit X12, and light-emitting element circuits 5D_1 to 5D_8 as the display unit X13, it is possible to provide an integrated display on the display units X11 to X13, even though the display units X11 and X12 are physically separated by the hatchback door X14 and the display units X12 and X13 are physically separated by the hatchback door X14.

[0051] In addition to the above-described embodiments, various modifications can be made to the configuration of the present invention without departing from the spirit of the invention. The above-described embodiments are illustrative in all respects and should be considered not to be limiting. The technical scope of the present invention is defined by the claims, not by the description of the above-described embodiments, and should be understood to include all modifications that fall within the meaning and scope of the claims. [Explanation of symbols]

[0052] 1 Lighting system 2. Microcomputer 3 Communication Bus 4A to 4D Light-emitting element driving device 5A_1~5A_8 Light emitting element circuit 5B_1~5B_8 Light emitting element circuit 5C_1~5C_8 Light emitting element circuit 5D_1~5D_8 Light-emitting element circuit 6A~6D DC / DC converter 40 terminals 41 Receiving unit 42 Generation part 421 Counter 422 Falling edge detector X10 vehicle X11~X13 Display section X14 hatchback door

Claims

1. a receiver configured to receive a predetermined communication signal transmitted over a communication line; 1. An LED dimming controller configured for programmable PWM dimming of individual LEDs using an internal PWM clock signal, comprising: The predetermined communication signal is a UART communication signal, and each UART frame of the serial interface is composed of one start bit and one data bit; the internal PWM clock signal is adjusted by the predetermined communication signal; the predetermined communication signal is a signal in which a start bit having a first logic level is transmitted from a transmitter at a predetermined cycle, and a signal in which a data bit following each start bit has a second logic level is not transmitted a predetermined number of times in succession; An LED dimming control device configured to exceptionally not detect the appearance timing of the first logic level as the start timing of the start bit if the period of time at the first logic level does not continue for a predetermined time from the appearance timing of the first logic level.

2. a first terminal configured to be connected to a cathode of an external first LED; a second terminal configured to connect to a cathode of a second external LED; a third terminal configured to be connected to a cathode of an external third LED; The LED dimming control device of claim 1 , comprising:

3. The LED dimming control device according to claim 2 , wherein the first LED, the second LED, and the third LED are individually dimmed.

4. The LED dimming control device according to any one of claims 1 to 3, further comprising a register configured to set an on-duty of the LED.

5. 5. The LED dimming control device according to claim 1, wherein the on-timing of the internal PWM clock signal is changed every predetermined period.

6. the communication line is a CAN, The LED dimming control device according to claim 1 , further comprising a terminal configured to be connected to the CAN bus.

7. The LED dimming control device according to any one of claims 1 to 6, The LED; An LED system comprising:

8. A vehicle comprising the LED system of claim 7.

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