Emitter, selective emitter battery manufacturing method, and selective emitter battery

Abstract

The present application provides an emitter, a method for producing a selective emitter cell, and a selective emitter cell, the method for producing an emitter including the steps of sequentially irradiating a boron-rich layer with at least two lasers of different wavelengths to sequentially laser dope boron atoms in the boron-rich layer in the same region of a silicon wafer to obtain an emitter.

Description

[Technical Field]

[0001] The present application is in the technical field of solar cells, and relates to, for example, emitters, methods for manufacturing selective emitter cells, and selective emitter cells. [Background technology]

[0002] This application claims priority to a Chinese patent application bearing application number 202111238759.X, filed with the State Intellectual Property Office of China on October 25, 2021, the entire contents of which are incorporated herein by reference.

[0003] A selective emitter in a solar cell is a structure in which the contact area between the metal gridline and the silicon wafer is heavily doped and the non-metallic contact area of ​​the silicon wafer is lightly doped. This structure reduces the contact resistance of the metal contact area and reduces the series resistance of the cell, and the lightly doped area effectively reduces carrier recombination and improves surface passivation. Therefore, the fabrication of a selective emitter structure improves the cell's fill factor and shortwave spectral response, ultimately improving the cell's efficiency.

[0004] N-type TOPCon cells are considered an upgraded next-generation product of passivated emitter and rear cell (PERC) cells, and can improve solar cell efficiency. Front-side boron-diffused selective emitter structures are essential processes for improving TOPCon cell efficiency, but there is no mature process in related technologies that can be mass-produced at low cost. Related technologies often fabricate selective emitters in TOPCon cells using two-step diffusion, reverse etching, or pre-deposition of a patterned boron source, but these processes are not economical. Related technologies' laser doping processes have difficulty doping boron atoms into silicon in borosilicate glass. Furthermore, due to the difference in the solid solubility of boron atoms in silicon oxide and silicon, the surface concentration after laser processing is significantly reduced. While this process can deepen junction depth, it fails to form a good ohmic contact.

[0005] CN109742172A discloses a method for manufacturing an N-type selective emitter bifacial cell by boron source spin coating and laser doping, which includes: texturing an N-type silicon wafer; spin-coating an organic boron source on the front side by spin coating and then drying; diffusing it in a diffusion furnace to form a front lightly doped emitter; laser doping it to form a heavily doped selective emitter in the front borosilicate glass (BSG); cleaning the back side to remove the silica glass (PSG); diffusing phosphorus on the back side to form a phosphorus back surface field; depositing anti-reflective passivation films on the front and back sides; and printing metal electrodes on the front and back sides to complete the cell fabrication.

[0006] CN112670353A discloses a boron-doped selective emitter cell and its manufacturing method, which includes N-type crystalline silicon, two positive electrodes on the front side of the N-type crystalline silicon, and two negative electrodes on the rear side of the N-type crystalline silicon. The rear side of the N-type crystalline silicon is provided with an SiO2 layer, and a P-type doped polycrystalline silicon layer is provided on the SiO2 layer. At the same time, the selective boron SE structure is fabricated by boron slurry printing and laser embedding.

[0007] CN113035976A discloses a boron-doped selective emitter and a manufacturing method thereof, and a boron-doped selective emitter cell. The manufacturing method includes forming a heavily doped region and a lightly doped region on the surface of a textured silicon wafer. Specifically, the surface of the silicon wafer is first coated with a layer of boron dopant, and the boron dopant coated region is equal to or larger than the size of the heavily doped region. Next, the boron dopant located in the heavily doped region is laser doped to form silicon boride. Next, the silicon boride is buried at high temperature to form a heavily doped region. Next, a lightly doped region is formed on the surface of the silicon wafer to obtain a boron-doped selective emitter.

[0008] Although the above documents improve the manufacturing process of selective emitters from different aspects, it is still difficult to dope the boron source into the P+ layer in the BSG using the laser doping process. After using laser doping, the surface concentration and junction depth of the original silicon wafer are simultaneously changed, i.e., the surface concentration is reduced and the junction depth is increased. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] Chinese Patent Application Publication No. 109742172 [Patent Document 2] Chinese Patent Application Publication No. 112670353 [Patent Document 3] Chinese Patent Application Publication No. 113035976 Summary of the Invention [Problem to be solved by the invention]

[0010] The present application provides an emitter, a selective emitter cell manufacturing method, and a selective emitter cell that can effectively adjust the boron doping concentration and depth on the surface of a silicon wafer by doping the surface of the silicon wafer with boron using lasers of at least two wavelengths. [Means for solving the problem]

[0011] In a first aspect, the present application provides a method for manufacturing an emitter, comprising the step of sequentially irradiating a boron-rich layer with lasers of at least two different wavelengths so as to sequentially dope boron atoms in the boron-rich layer into the same region of a silicon wafer to obtain an emitter.

[0012] In a second aspect, the present application provides a method for producing a selective emitter cell, comprising the steps of texturing a silicon wafer, producing a lightly doped emitter and a boron-rich layer, and producing a heavily doped selective emitter and a metal electrode to obtain a selective emitter cell, wherein the heavily doped selective emitter is produced by the method for producing an emitter according to the first aspect, and the heavily doped selective emitter is obtained by sequentially and pattern-doping boron atoms in the boron-rich layer into the same region of the surface of the lightly doped emitter by a first laser doping and a second laser doping, and the heavily doped selective emitter is embedded in the lightly doped emitter.

[0013] In a third aspect, the present application provides a selective emitter battery produced by the method for producing a selective emitter battery according to the second aspect. [Brief explanation of the drawings]

[0014] [Figure 1]1 is a schematic structural diagram of a selective emitter battery according to the present application; DETAILED DESCRIPTION OF THE INVENTION

[0015] In the description of this application, orientations or positional relationships indicated by terms such as "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are those shown in the drawings and are used solely for the purpose of facilitating or simplifying the description of this application. They do not represent or imply that the depicted devices or components necessarily have a specific orientation or a specific oriented structure and operation. Furthermore, terms such as "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or the quantity of depicted technical features. Therefore, a feature qualified by "first" or "second" may explicitly or implicitly include one or more of the feature. In the description of this application, unless otherwise specified, "plurality" means two or more.

[0016] In the description of this application, unless otherwise specified, the meanings of the terms "installed," "connected," "connected," etc. should be understood in a broad sense, and may refer to, for example, a fixed connection, a detachable connection, an integral connection, a mechanical connection, an electrical connection, a direct connection, an indirect connection via an intermediate medium, or internal communication between two components. Those skilled in the art can understand the specific meanings of the above terms in this application according to specific circumstances.

[0017] Hereinafter, the present invention will be described with reference to specific embodiments with reference to the drawings.

[0018] The present application provides an emitter, a method for manufacturing a selective emitter cell, and a selective emitter cell. Taking advantage of the fact that the surface of a boron-rich layer responds differently to lasers of different wavelengths and the depth of thermal action of different wavelengths on silicon, boron doping of the surface of a silicon wafer with lasers of at least two wavelengths can be performed. This allows for effective control of the boron doping concentration and depth of the silicon wafer surface. At the same time, during the selective emitter cell manufacturing process, patterned laser doping can be performed sequentially with lasers of two or more wavelengths to precisely adjust the surface concentration and junction depth of the laser region, thereby achieving a highly doped selective emitter. This improves the surface concentration of the highly doped selective emitter and increases the junction depth. Furthermore, the selective emitter cell manufacturing method of the present application is simple and easy to operate, reduces production time and costs, widens the process window, and promotes the development of efficient solar cell manufacturing technology.

[0019] In a first aspect, the present application provides a method for manufacturing an emitter, comprising the step of sequentially irradiating a boron-rich layer with lasers of at least two different wavelengths so as to sequentially dope boron atoms in the boron-rich layer into the same region of a silicon wafer to obtain an emitter.

[0020] The emitter manufacturing method according to the present application utilizes the characteristics that the surface of a boron-rich layer responds differently to lasers of different wavelength bands and that the depth of thermal action of lasers of different wavelengths on silicon differs, and by doping the surface of a silicon wafer with boron using lasers of at least two wavelengths, it is possible to effectively adjust the boron doping concentration and depth on the surface of the silicon wafer.

[0021] Preferably, the step of sequentially irradiating the boron-rich layer with at least two lasers having different wavelengths includes the step of irradiating the boron-rich layer with a first laser and then irradiating the boron-rich layer with a second laser.

[0022] Preferably, the wavelength of the first laser is smaller than 450 nm, for example, 440 nm, 420 nm, 400 nm, 380 nm, 350 nm, 320 nm, 300 nm, 280 nm, 250 nm, 220 nm, 200 nm, 180 nm, 150 nm, or 100 nm, and the wavelength of the second laser is larger than 450 nm, for example, 460 nm, 500 nm, 550 nm, 600 nm, 650 nm, 700 nm, 750 nm, 800 nm, 850 nm, 900 nm, 950 nm, 1000 nm, or 1200 nm, although other values ​​within the ranges not listed above also apply.

[0023] Preferably, the step of sequentially irradiating the boron-rich layer with at least two lasers having different wavelengths includes the step of irradiating the boron-rich layer with a first laser and then irradiating the boron-rich layer with a second laser.

[0024] Preferably, the wavelength of the first laser is greater than 450 nm, for example, 460 nm, 500 nm, 550 nm, 600 nm, 650 nm, 700 nm, 750 nm, 800 nm, 850 nm, 900 nm, 950 nm, 1000 nm, or 1200 nm, and the wavelength of the second laser is less than 450 nm, for example, 440 nm, 420 nm, 400 nm, 380 nm, 350 nm, 320 nm, 300 nm, 280 nm, 250 nm, 220 nm, 200 nm, 180 nm, 150 nm, or 100 nm, and other values ​​within the ranges not listed above also apply.

[0025] The present invention provides a method for manufacturing an emitter using two laser doping methods: (1) sequentially doping boron atoms in a boron-rich layer into the same region on the surface of a silicon wafer with a laser having a wavelength of less than 450 nm and a laser having a wavelength of more than 450 nm, and (2) sequentially doping boron atoms in a boron-rich layer into the same region on the surface of a silicon wafer with a laser having a wavelength of more than 450 nm and a laser having a wavelength of less than 450 nm.

[0026] In a second aspect, the present application provides a method for fabricating a selective emitter cell, comprising the steps of texturing a silicon wafer, fabricating a lightly doped emitter and a boron-rich layer, and fabricating a heavily doped selective emitter and a metal electrode to obtain a selective emitter cell.

[0027] The heavily doped selective emitter is manufactured by the emitter manufacturing method according to the first aspect, and the heavily doped selective emitter is obtained by sequentially and pattern-doping boron atoms in the boron-rich layer into the same region on the surface of the lightly doped emitter by a first laser doping and a second laser doping, and the heavily doped selective emitter is embedded in the lightly doped emitter.

[0028] This application provides a method for fabricating a heavily doped selective emitter by two laser doping methods: (1) sequentially pattern-doping boron atoms in a boron-rich layer into the same region on the surface of a lightly doped emitter with a laser having a wavelength less than 450 nm and a laser having a wavelength greater than 450 nm, and (2) sequentially pattern-doping boron atoms in a boron-rich layer into the same region on the surface of a lightly doped emitter with a laser having a wavelength greater than 450 nm and a laser having a wavelength less than 450 nm.

[0029] The selective emitter manufacturing method according to the present application utilizes the characteristic that lasers with different wavelengths have different thermal action depths on silicon. By sequentially and pattern-wise doping the same region of a lightly doped emitter with boron atoms using lasers with two or more wavelengths, the surface concentration and junction depth of the region can be precisely adjusted to obtain a heavily doped selective emitter. The surface concentration of the heavily doped selective emitter is improved, and the junction depth is increased, thereby forming a selective emitter structure in which the laser region has a high doping concentration and a deep junction depth, and the non-laser region has a low surface concentration and a shallow junction depth.

[0030] Preferably, the surface of the silicon wafer is subjected to a texturing treatment before obtaining a silicon wafer substrate.

[0031] Preferably, the silicon wafer comprises an N-type silicon wafer.

[0032] Preferably, the step of fabricating a lightly doped emitter comprises the step of diffusing said silicon wafer substrate to form said lightly doped emitter on the front side of said silicon wafer substrate.

[0033] Preferably, the surface concentration of the lightly doped emitter is (1E18 to 2E20) cm -3 For example, 1E18cm -3 , 2E18cm -3 , 5E18cm -3 , 8E18cm -3 , 1E19cm -3 , 2E19cm -3 , 5E19cm -3 , 8E19cm -3 , 1E20cm -3 or 2E20cm -3 and other values ​​within the range not listed apply as well.

[0034] In this application, "E" indicates scientific notation. For example, "1E18" is 1 x 10 18 Refers to...

[0035] Preferably, the junction depth of the lightly doped emitter is 0.1 to 2 μm, and may be, for example, 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm, 1 μm, 1.1 μm, 1.2 μm, 1.3 μm, 1.4 μm, 1.5 μm, 1.6 μm, 1.7 μm, 1.8 μm, 1.9 μm, or 2 μm, and other values ​​within the range not listed above also apply.

[0036] Preferably, the sheet resistance of the lightly doped emitter is 100 to 500 Ω / sq, and may be, for example, 100 Ω / sq, 120 Ω / sq, 150 Ω / sq, 180 Ω / sq, 200 Ω / sq, 220 Ω / sq, 250 Ω / sq, 280 Ω / sq, 300 Ω / sq, 320 Ω / sq, 350 Ω / sq, 380 Ω / sq, 400 Ω / sq, 420 Ω / sq, 450 Ω / sq, 480 Ω / sq, or 500 Ω / sq, and other values ​​within the range not listed above also apply.

[0037] Preferably, the surface of the lightly doped emitter is covered with the boron-rich layer.

[0038] Preferably, the thickness of the boron-rich layer is 0.01 to 2 μm, and may be, for example, 0.01 μm, 0.1 μm, 0.2 μm, 0.3 μm, 0.4 μm, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm, 1 μm, 1.1 μm, 1.2 μm, 1.3 μm, 1.4 μm, 1.5 μm, 1.6 μm, 1.7 μm, 1.8 μm, 1.9 μm, or 2 μm, and other values ​​within the numerical ranges not listed above also apply.

[0039] In this application, a silicon wafer substrate is placed in a diffusion furnace for diffusion to produce a lightly doped selective emitter. At the same time, a boron source is supplied to the diffusion furnace to coat a boron-rich layer on the surface of the lightly doped selective emitter. The boron-rich layer on the surface of the lightly doped selective emitter can also be obtained by spin coating or screen printing. The boron-rich layer can also be formed by reactive deposition using chemical vapor deposition methods such as atmospheric pressure chemical vapor deposition (APCVD), low pressure chemical vapor deposition (LPCVD), and plasma enhanced chemical vapor deposition (PECVD).

[0040] In addition, the present application does not require any specific structures for the diffusion furnace, spin coater, and vapor deposition apparatus, so different types of diffusion furnace, spin coater, and vapor deposition apparatus can be selected according to the application scenario, or the structures of the diffusion furnace, spin coater, and vapor deposition apparatus can be adaptively adjusted.

[0041] Preferably, the surface concentration of the highly doped selective emitter is between (3E18 and 1E22) cm -3 For example, 3E18cm -3 , 5E18cm -3 , 8E18cm -3 , 1E19cm -3 , 2E19cm -3 , 5E19cm -3 , 8E19cm -3 , 1E20cm -3 , 5E20cm -3 , 8E20cm -3 , 1E21cm -3 , 2E21cm -3 , 5E21cm -3 , 8E21cm -3 or 1E22cm -3 and other values ​​within the range not listed apply as well.

[0042] Preferably, the junction depth of the heavily doped selective emitter is 0.2 to 5 μm, and may be, for example, 0.2 μm, 0.5 μm, 0.8 μm, 1 μm, 1.2 μm, 1.5 μm, 1.8 μm, 2 μm, 2.3 μm, 2.5 μm, 2.8 μm, 3 μm, 3.2 μm, 3.5 μm, 3.8 μm, 4 μm, 4.2 μm, 4.5 μm, 4.8 μm, or 5 μm, and other values ​​within the range not listed above also apply.

[0043] Preferably, the sheet resistance of the heavily doped selective emitter is 20 to 200 Ω / sq, for example, 20 Ω / sq, 40 Ω / sq, 60 Ω / sq, 80 Ω / sq, 100 Ω / sq, 120 Ω / sq, 140 Ω / sq, 160 Ω / sq, 180 Ω / sq, or 200 Ω / sq, and other values ​​within the range not listed above also apply.

[0044] Preferably, after fabricating the heavily doped selective emitter, the backside of the silicon wafer substrate is sequentially subjected to etching cleaning, deposition of a tunnel layer and a doped polycrystalline silicon layer, wet chemical cleaning, deposition of a front aluminum oxide layer, deposition of a double-sided passivation film layer, and fabrication of double-sided metal electrodes.

[0045] In this case, wet chemical cleaning is used to remove the polycrystalline silicon layer and the boron-rich layer plated around the front side of the silicon wafer substrate.

[0046] Preferably, after the lightly doped selective emitter is fabricated, the back surface of the silicon wafer substrate is sequentially subjected to etching cleaning, deposition of a tunnel layer, deposition of a doped polycrystalline silicon layer, and primary wet chemical cleaning, and then the following steps are sequentially performed: fabrication of a heavily doped selective emitter, secondary wet chemical cleaning, deposition of a front aluminum oxide layer, deposition of a double-sided passivation film layer, and fabrication of double-sided metal electrodes.

[0047] In this case, a primary wet chemical clean is used to remove the polycrystalline silicon layer on the front side of the silicon wafer substrate, and a secondary wet chemical clean is used to remove the boron-rich layer and the laser-damaged layer on the front side of the silicon wafer substrate.

[0048] In the present application, the step of manufacturing a heavily doped selective emitter can be adjusted according to the actual situation, and the manufacturing of a heavily doped selective emitter by laser doping can be performed after manufacturing a lightly doped emitter, or the manufacturing of a heavily doped selective emitter by laser doping can be performed after completing the manufacturing of the tunnel layer and the doped polycrystalline silicon layer.

[0049] In the present invention, the tunnel layer includes any one of a silicon oxide layer, a silicon oxynitride layer, a silicon nitride layer, and an aluminum oxide layer, and is deposited on the back surface of the silicon wafer substrate by a method such as thermal oxidation or chemical vapor deposition.

[0050] Preferably, the step of depositing a doped polycrystalline silicon layer includes the steps of depositing an intrinsic amorphous silicon layer on the surface of the tunnel layer by chemical vapor deposition and doping phosphorus into the intrinsic amorphous silicon layer by diffusion to obtain the doped amorphous silicon layer, or depositing a doped amorphous silicon layer on the surface of the tunnel layer by chemical vapor deposition and annealing to activate it to obtain the doped polycrystalline silicon layer.

[0051] In this application, an intrinsic amorphous silicon layer is deposited on the surface of the tunnel layer by low pressure chemical vapor deposition or plasma enhanced chemical vapor deposition, and then phosphorus is doped into the intrinsic amorphous silicon layer by diffusion and activated by high temperature annealing to form the intrinsic amorphous silicon layer. doped polycrystalline silicon layer a doped amorphous silicon layer may be deposited on the surface of the tunnel layer by low pressure chemical vapor deposition or plasma enhanced chemical vapor deposition and activated by high temperature annealing to obtain said doped polycrystalline silicon layer may be obtained.

[0052] Preferably, said frontal aluminium oxide layer is produced by atomic layer deposition.

[0053] Preferably, the double-sided passivation film layer includes a front passivation film layer and a back passivation film layer.

[0054] Preferably, the front passivation film layer and the back passivation film layer are both fabricated by plasma enhanced chemical vapor deposition.

[0055] Preferably, said front passivation film layer is deposited on the surface of said front aluminium oxide layer.

[0056] In the present application, the front passivation film layer includes any one or a combination of at least two of a SiNx passivation film layer, a silicon oxide passivation film layer, or a SiOxNy passivation film layer.

[0057] Preferably, the backside passivation layer is deposited on the surface of the doped polycrystalline silicon layer.

[0058] In the present application, the back surface passivation film layer includes any one or a combination of at least two of a SiNx passivation film layer, a silicon oxide passivation film layer, or a SiOxNy passivation film layer.

[0059] Preferably, the metal electrodes are fabricated by sequential printing and sintering.

[0060] Preferably, the metal electrodes include a front metal electrode and a back metal electrode.

[0061] Preferably, the front metal electrode penetrates the front passivation layer and the front aluminum oxide layer, and the front metal electrode forms an ohmic contact with the highly doped selective emitter.

[0062] Preferably, the width of the electrode grid lines of the front metal electrode is smaller than the width of the heavily doped selective emitter.

[0063] Preferably, the front metal electrode is manufactured by silver paste printing or silver-aluminum paste printing.

[0064] Preferably, the rear metal electrode is manufactured by silver paste printing.

[0065] Preferably, the back metal electrode penetrates the back surface passivation film layer to form an ohmic contact with the back surface doped polycrystalline silicon layer.

[0066] In a third aspect, the present application provides a selective emitter battery produced by the method for producing a selective emitter battery according to the second aspect. [Example]

[0067] This example provides a method for manufacturing a selective emitter battery shown in FIG. 1, which includes the following steps (1) to (8).

[0068] In step (1), a silicon wafer substrate 1 was obtained by performing a texturing cleaning process on the surface of an N-type silicon wafer.

[0069] In step (2), a boron source is added when the silicon wafer substrate 1 is subjected to a diffusion process, so that a surface concentration of 1E19 cm 3 is formed on the front surface of the silicon wafer substrate 1. -3 A lightly doped emitter 2 having a junction depth of 1 μm and a sheet resistance of 300 Ω / sq was formed, and a boron-rich layer having a thickness of 0.1 μm was formed on the surface of the lightly doped emitter 2 .

[0070] In step (3), first, boron atoms in the boron-rich layer are patterned and doped into the lightly doped emitter 2 using an ultraviolet laser having a wavelength of 325 nm, and then boron atoms in the boron-rich layer are patterned and doped into the same region of the lightly doped emitter 2 using a green laser having a wavelength of 532 nm, resulting in a surface concentration of 2E20 cm -3 A highly doped selective emitter 3 having a junction depth of 3 μm and a sheet resistance of 90 Ω / sq was obtained.

[0071] In step (4), the backside of the silicon wafer substrate 1 was etched to remove the peripheral plating on the backside, polished again to texture, and the front side was cleaned.

[0072] In step (5), a silicon oxide tunnel layer 7 is grown on the back surface of the silicon wafer substrate 1 by thermal oxidation, and then a 120 nm thick intrinsic amorphous silicon layer is deposited on the surface of the silicon oxide tunnel layer 7 by chemical vapor deposition at a deposition temperature of 600°C. Next, phosphorus is doped into the intrinsic amorphous silicon layer by diffusion, and activated by annealing at a temperature of 950°C to obtain a doped polycrystalline silicon layer 8. Next, wet chemical cleaning is performed to remove the front polycrystalline silicon layer and the front boron-rich layer of the silicon wafer substrate 1.

[0073] In step (6), a front aluminum oxide layer 4 and a front passivation film layer 5 are sequentially deposited on the surface of the lightly doped emitter 2 by plasma enhanced chemical vapor deposition, the front passivation film layer 5 being a SiNx passivation film layer, and the total thickness of the front aluminum oxide layer 4 and the SiNx passivation film layer is 80 nm.

[0074] In step (7), a back surface passivation film layer 9 having a thickness of 75 nm is deposited on the surface of the doped polycrystalline silicon layer 8 by plasma enhanced chemical vapor deposition, and the back surface passivation film layer 9 is a SiNx passivation film layer.

[0075] In step (8), a silver-aluminum paste is sequentially printed and sintered to obtain a front metal electrode 6, the width of the electrode grid lines of which is smaller than the width of the heavily doped selective emitter 3, and a silver paste is sequentially printed and sintered to obtain a back metal electrode 10, thereby obtaining the selective emitter battery. [Example]

[0076] This example provides a method for manufacturing a selective emitter battery shown in FIG. 1, which includes the following steps (1) to (8).

[0077] In step (1), a silicon wafer substrate 1 was obtained by performing a texturing cleaning process on the surface of an N-type silicon wafer.

[0078] In step (2), a diffusion process is performed on the silicon wafer substrate 1 to form a surface concentration of 1E18 cm on the front surface of the silicon wafer substrate 1. -3 A lightly doped emitter 2 with a junction depth of 2 μm and a sheet resistance of 500 Ω / sq was formed. Next, a boron source was applied to the surface of the lightly doped emitter 2 by spin coating, and after drying, a boron-rich layer with a thickness of 2 μm was formed.

[0079] In step (3), first, boron atoms in the boron-rich layer are patterned and doped into the lightly doped emitter 2 using an infrared laser having a wavelength of 1064 nm, and then boron atoms in the boron-rich layer are patterned and doped into the same region of the lightly doped emitter 2 using an ultraviolet laser having a wavelength of 325 nm, resulting in a surface concentration of 3E18 cm -3 A highly doped selective emitter 3 having a junction depth of 5 μm and a sheet resistance of 200 Ω / sq was obtained.

[0080] In step (4), the backside of the silicon wafer substrate 1 was etched to remove the peripheral plating on the backside, polished again to texture, and the front side was cleaned.

[0081] In step (5), a silicon oxide tunnel layer 7 and a doped amorphous silicon layer having a thickness of 100 nm are sequentially stacked on the back surface of the silicon wafer substrate 1 by chemical vapor deposition at a temperature of 450°C, and then activated by annealing at a temperature of 900°C to obtain a doped polycrystalline silicon layer 8. Then, wet chemical cleaning is performed to remove the front polycrystalline silicon layer and the front boron-rich layer of the silicon wafer substrate 1.

[0082] In step (6), an aluminum oxide layer and a front passivation film layer 5 are sequentially deposited on the surface of the lightly doped emitter 2 by plasma enhanced chemical vapor deposition, the front passivation film layer 5 being a SiNx passivation film layer, and the total thickness of the aluminum oxide layer and the SiNx passivation film layer is 85 nm.

[0083] In step (7), a back surface passivation film layer 9 having a thickness of 65 nm is deposited on the surface of the doped polycrystalline silicon layer 8 by plasma enhanced chemical vapor deposition, and the back surface passivation film layer 9 is a SiNx passivation film layer.

[0084] In step (8), a silver-aluminum paste is sequentially printed and sintered to obtain a front metal electrode 6, the width of the electrode grid lines of which is smaller than the width of the heavily doped selective emitter 3, and a silver paste is sequentially printed and sintered to obtain a back metal electrode 10, thereby obtaining the selective emitter battery. [Example]

[0085] This example provides a method for manufacturing a selective emitter battery shown in FIG. 1, which includes the following steps (1) to (8).

[0086] In step (1), a silicon wafer substrate 1 was obtained by performing a texturing cleaning process on the surface of an N-type silicon wafer.

[0087] In step (2), a boron source is added when the silicon wafer substrate 1 is subjected to a diffusion process, so that a surface concentration of 2E20 cm 3 is formed on the front surface of the silicon wafer substrate 1. -3 A lightly doped emitter 2 having a junction depth of 0.1 μm and a sheet resistance of 100 Ω / sq was formed, and a boron-rich layer having a thickness of 0.01 μm was formed on the surface of the lightly doped emitter 2 .

[0088] In step (3), the backside of the silicon wafer substrate 1 was etched to remove the peripheral plating on the backside, polished again to texture, and the front side was cleaned.

[0089] In step (4), a silicon oxide tunnel layer 7 is grown on the backside of the silicon wafer substrate 1 by thermal oxidation, and then a 120 nm thick intrinsic amorphous silicon layer is deposited on the surface of the silicon oxide tunnel layer 7 by chemical vapor deposition at a deposition temperature of 600°C. Then, phosphorus is doped into the intrinsic amorphous silicon layer by diffusion, and activated by annealing at a temperature of 900°C to obtain a doped polycrystalline silicon layer 8. Then, wet chemical cleaning is performed to remove the polycrystalline silicon on the front side of the silicon wafer substrate 1. Layer Removed.

[0090] In step (5), boron atoms in the boron-rich layer are patterned and doped into the lightly doped emitter 2 using an ultraviolet laser with a wavelength of 325 nm, and then boron atoms in the boron-rich layer are patterned and doped into the same region of the lightly doped emitter 2 using an infrared laser with a wavelength of 1064 nm, resulting in a surface concentration of 1E22 cm -3 A heavily doped selective emitter 3 with a junction depth of 0.2 μm and a sheet resistance of 20 Ω / sq was obtained, and then wet chemical cleaning was performed to remove the boron-rich layer and laser damage layer on the front side of the silicon wafer substrate 1.

[0091] In step (6), an aluminum oxide layer and a front passivation film layer 5 are sequentially deposited on the surface of the lightly doped emitter 2 by plasma enhanced chemical vapor deposition, the front passivation film layer 5 being a SiNx-silicon oxide passivation film layer, and the total thickness of the aluminum oxide layer and the SiNx-silicon oxide passivation film layer is 130 nm.

[0092] In step (7), a back surface passivation film layer 9 having a thickness of 65 nm is deposited on the surface of the doped polycrystalline silicon layer 8 by plasma enhanced chemical vapor deposition, and the back surface passivation film layer 9 is a SiNx passivation film layer.

[0093] In step (8), a silver-aluminum paste is sequentially printed and sintered to obtain a front metal electrode 6, the width of the electrode grid lines of which is smaller than the width of the heavily doped selective emitter 3, and a silver paste is sequentially printed and sintered to obtain a back metal electrode 10, thereby obtaining the selective emitter battery.

[0094] In Examples 1 to 3, boron atoms in the boron-rich layer are sequentially and pattern-doped into the same surface region of the lightly doped emitter 2 using two lasers with different wavelengths. In both Examples 1 and 3, boron atoms in the boron-rich layer are sequentially and pattern-doped into the same surface region of the lightly doped emitter 2 using a laser with a wavelength of less than 450 nm and a laser with a wavelength of more than 450 nm. In Example 2, boron atoms in the boron-rich layer are sequentially and pattern-doped into the same surface region of the lightly doped emitter 2 using a laser with a wavelength of more than 450 nm and a laser with a wavelength of less than 450 nm. In all of Examples 1 to 3, the surface concentration and junction depth of the laser region can be precisely controlled to obtain a heavily doped selective emitter 3, thereby achieving the effects of improving the surface concentration of the heavily doped selective emitter 3 and increasing the junction depth. Therefore, the present invention utilizes the characteristic that the surface of the boron-rich layer responds differently to lasers of different wavelength bands, and sequentially and pattern-wise dopes the same region of the lightly doped emitter 2 with boron atoms using lasers of two or more wavelengths, thereby enabling the surface concentration and junction depth of the laser region to be precisely adjusted to obtain a heavily doped selective emitter 3, thereby improving the surface concentration of the heavily doped selective emitter 3 and increasing the junction depth.

[0095] The emitter, selective emitter cell manufacturing method, and selective emitter cell disclosed herein utilize the characteristics that the surface of a boron-rich layer responds differently to lasers of different wavelengths and that the thermal action depth of different wavelengths on silicon varies. By doping the surface of a silicon wafer with boron using lasers of at least two wavelengths, the boron doping concentration and depth of the silicon wafer surface can be effectively adjusted. At the same time, during the selective emitter cell manufacturing process, patterned laser doping can be performed sequentially using lasers of two or more wavelengths to precisely adjust the surface concentration and junction depth of the laser region to obtain a highly doped selective emitter. This improves the surface concentration of the highly doped selective emitter and increases the junction depth. Furthermore, the selective emitter cell manufacturing method disclosed herein is simple and easy to operate, reduces production time and costs, widens the process window, and promotes the development of efficient solar cell manufacturing technology.

Claims

1. sequentially irradiating the boron-rich layer with lasers of at least two different wavelengths so as to sequentially pattern-dope boron atoms in the boron-rich layer into the same region of the silicon wafer to obtain an emitter; the step of sequentially irradiating the boron-rich layer with at least two lasers having different wavelengths includes the step of irradiating the boron-rich layer with a first laser and then irradiating the boron-rich layer with a second laser; The wavelength of the first laser is less than 450 nm, and the wavelength of the second laser is greater than 450 nm; Alternatively, the wavelength of the first laser is greater than 450 nm, and the wavelength of the second laser is less than 450 nm.

2. texturing a silicon wafer to produce a lightly doped selective emitter and a boron-rich layer, and producing a heavily doped selective emitter and a metal electrode to obtain a selective emitter cell; 2. The method for manufacturing a selective emitter battery, wherein the heavily doped selective emitter is manufactured by the method for manufacturing an emitter according to claim 1, wherein the heavily doped selective emitter is obtained by sequentially pattern-doping boron atoms in the boron-rich layer into the same region on the surface of the lightly doped selective emitter by a first laser doping and a second laser doping, and the heavily doped selective emitter is embedded in the lightly doped selective emitter.

3. texturing the surface of the silicon wafer to obtain a silicon wafer substrate; and / or the silicon wafer includes an N-type silicon wafer; and / or the step of fabricating a lightly doped selective emitter comprises a step of diffusing the silicon wafer substrate to form the lightly doped selective emitter on the front side of the silicon wafer substrate; and / or the surface concentration of the lightly doped selective emitter is (1E18-2E20) cm －３ and and / or the junction depth of the lightly doped selective emitter is 0.1 to 2 μm; and / or the sheet resistance of the lightly doped selective emitter is 100 to 500 Ω / sq; and / or the surface of the lightly doped selective emitter is covered with the boron-rich layer; the boron-rich layer has a thickness of 0.01 to 2 μm; and / or the surface concentration of the highly doped selective emitter is (3E18 to 1E22) cm －３ and and / or the junction depth of the heavily doped selective emitter is 0.2 to 5 μm; The method for manufacturing a selective emitter battery according to claim 2, wherein the sheet resistance of the highly doped selective emitter is 20 to 200 Ω / sq.

4. After fabricating the heavily doped selective emitter, the method includes:

3. The method for manufacturing a selective emitter cell according to claim 2, further comprising the steps of sequentially performing etching cleaning, depositing a tunnel layer and a doped polycrystalline silicon layer on the back side of the silicon wafer, wet chemical cleaning, depositing a front aluminum oxide layer, depositing a double-sided passivation film layer, and fabricating double-sided metal electrodes.

5. After fabricating the lightly doped selective emitter, the method includes:

3. The method for manufacturing a selective emitter battery according to claim 2, further comprising the steps of sequentially performing etching cleaning, depositing a tunnel layer, depositing a doped polycrystalline silicon layer, and primary wet chemical cleaning on the back surface of the silicon wafer to fabricate a heavily doped selective emitter, secondary wet chemical cleaning, depositing a front aluminum oxide layer, depositing a double-sided passivation film layer, and fabricating double-sided metal electrodes.

6. The step of depositing a doped polycrystalline silicon layer comprises: depositing an intrinsic amorphous silicon layer on the surface of the tunnel layer by chemical vapor deposition, and doping phosphorus into the intrinsic amorphous silicon layer by diffusion to obtain a doped amorphous silicon layer; or depositing a doped amorphous silicon layer on the surface of the tunnel layer by chemical vapor deposition, and annealing to activate the doped amorphous silicon layer to obtain the doped polycrystalline silicon layer; and / or the front aluminum oxide layer is produced by atomic layer deposition, and / or the double-sided passivation film layer includes a front passivation film layer and a back passivation film layer; The front passivation film layer and the back passivation film layer are both manufactured by plasma enhanced chemical vapor deposition; and / or the front passivation film layer is deposited on the surface of the front aluminum oxide layer; 6. The method for manufacturing a selective emitter cell according to claim 4 or 5, and / or wherein the backside passivation layer is deposited on the surface of the doped polycrystalline silicon layer.

7. The metal electrodes are fabricated by sequential printing and sintering; and / or the metal electrodes include a front metal electrode and a back metal electrode; the front metal electrode penetrates the front passivation layer and the front aluminum oxide layer, the front metal electrode forming an ohmic contact with the heavily doped selective emitter; and / or the width of the electrode grid lines of the front metal electrode is smaller than the width of the heavily doped selective emitter; And / or the front metal electrode is manufactured by silver paste printing or silver-aluminum paste printing; And / or the back metal electrode is manufactured by silver paste printing method; 7. The method of claim 6, wherein the back metal electrode penetrates the back passivation film layer to form an ohmic contact with the doped polycrystalline silicon layer on the back side.

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