Measurement device, measurement method, and program
The measurement apparatus addresses accuracy and cost issues in MEMS device testing by using a binary digital signal with a multi-tone waveform and low-pass filter to improve frequency characteristic calculations, reducing noise and reflections for efficient, accurate testing.
Patent Information
- Application Number
- JP2021130511
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-08-10
- Publication Date
- 2025-09-01
- Estimated Expiration
- 2041-08-10
AI Technical Summary
Existing measurement technologies for devices under test, particularly MEMS devices, face challenges in accurately determining frequency characteristics due to high-frequency components and multiple reflections, leading to reduced measurement accuracy and increased costs.
A measurement apparatus utilizing a binary digital signal with a multi-tone waveform, combined with a low-pass filter and reference resistor, acquires analog signal waveforms at multiple points to calculate frequency characteristics, thereby reducing costs and improving accuracy by eliminating high-frequency components and multiple reflections.
The solution enhances measurement accuracy and reduces costs by stabilizing frequency characteristic calculations with high reproducibility and enabling simultaneous testing of multiple devices, while minimizing noise and reflections.
Smart Images

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Abstract
Description
[Technical Field]
[0001] The present invention relates to a measurement device, a measurement method, and a program. [Background technology]
[0002] Non-Patent Documents 1 and 2 and Patent Document 1 state, for example, "The first m components of the impulse response (h(k), k = 0 to m-1) can be obtained by following the scheme shown in Fig. 8. Each of these m components corresponds to the output of a simplified correlation cell (SCC) shown in Fig. 7. The input signal of the SCCs is the response to the MLS of the device under test (after an analogue to digital conversion)." (Chapter 5 of Non-Patent Document 1). [Prior art document] [Patent documents] [Non-patent document 1] L. Rufer and 3 others, "On-Chip testing of MEMS using pseudo-random test sequences", [online], ResearchGate, [searched July 23, 2021], Internet <URL:https: / / www.researchgate.net / publication / 4068737_On-chip_testing_of_MEMS_using_pseudo-random_test_sequences> [Non-Patent Document 2] Vytautas Dumbrava and 1 other person, "Uncertainty analysis of IV impedance measurement technique", ResearchGate, [searched on July 23, 2021], Internet <URL:https: / / www.researchgate.net / publication / 256232481_Uncertainty_analysis_of_I-V_impedance_measurement_technique> [Patent Document 1] Japanese Patent Application Laid-Open No. 10-14898 Summary of the Invention
[0003] A first aspect of the present invention provides a measurement apparatus. The measurement apparatus may include a signal source that outputs a binary digital signal that constitutes a multi-tone waveform. The measurement apparatus may include a waveform acquisition unit that acquires an analog signal waveform generated in response to application of the digital signal to a device under test. The measurement apparatus may include a calculation unit that calculates the frequency characteristics of the device under test from the waveform acquired by the waveform acquisition unit.
[0004] The signal source may repeatedly output a signal obtained by multiplying a pseudo-random binary sequence (PRBS) signal by a repeating square wave of a reference frequency and a reference duty ratio and up-converting the signal.
[0005] The measurement apparatus may further comprise a low-pass filter disposed between the signal source and the device under test.
[0006] The measurement apparatus may further include a reference resistor connected in series with the device under test. The waveform acquiring section may acquire analog signal waveforms at a measurement point closer to the signal source than the device under test and the reference resistor, and at a measurement point between the device under test and the reference resistor.
[0007] The measurement apparatus may further include a probe disposed on the bottom surface of the liftable board and electrically connected to a terminal of the device under test. The low-pass filter and the reference resistor may be disposed on the board.
[0008] The measurement apparatus may include a plurality of probes electrically connected to a plurality of devices under test, respectively.
[0009] The waveform acquisition section may acquire the analog signal waveform in synchronization with the signal source.
[0010] The measurement apparatus may further include a judging section that judges the acceptability of the device under test based on the calculated frequency characteristics.
[0011] The device under test may be a MEMS device.
[0012] In a second aspect of the present invention, there is provided a measurement method. The measurement method may include a step of outputting a binary digital signal constituting a multi-tone waveform. The measurement method may include a step of acquiring an analog signal waveform generated in response to application of the digital signal to a device under test. The measurement method may include a step of calculating frequency characteristics of the device under test from the waveform acquired by the waveform acquisition section.
[0013] In a third aspect of the present invention, there is provided a program. The program may cause a computer to function as a signal source that outputs a binary digital signal that constitutes a multi-tone waveform. The program may cause the computer to function as a waveform acquisition unit that acquires an analog signal waveform generated in response to application of the digital signal to a device under test. The program may cause the computer to function as a calculation unit that calculates the frequency characteristics of the device under test from the waveform acquired by the waveform acquisition unit.
[0014] The above summary of the invention does not list all of the necessary features of the present invention, and subcombinations of these features may also constitute inventions. [Brief explanation of the drawings]
[0015] [Figure 1] 1 shows a test system 1 according to an embodiment. [Figure 2] A portion of the digital signal output from the signal source 22 is shown. [Figure 3] 3 shows an analog signal waveform acquired by the waveform acquisition unit 25 when the digital signal of FIG. 2 is applied. [Figure 4] 3 shows an analog signal waveform acquired by the waveform acquisition unit 25 when the digital signal of FIG. 2 is applied. [Figure 5] 3 shows the intensity distribution of the analog signal waveform acquired by the waveform acquiring unit 25 when the digital signal of FIG. 2 is applied. [Figure 6] 2 shows the operation of the measurement device 200. [Figure 7] 1 shows a test system 1A according to a modified example. [Figure 8] An equivalent circuit 110 of the device under test 100 is shown. [Figure 9] 1 shows a chart of admittance of the device under test 100. [Figure 10] 22 illustrates an example computer 2200 in which aspects of the present invention may be embodied, in whole or in part. DETAILED DESCRIPTION OF THE INVENTION
[0016] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention according to the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.
[0017] [1. Test System 1] 1 shows a test system 1 according to an embodiment. The test system 1 includes a device under test (DUT) 100 and a measurement apparatus 200.
[0018] 1-1. Device Under Test 100 The device under test 100 has at least one terminal 101 (two in this embodiment, for example), and is tested by having its frequency characteristics measured by the measuring apparatus 200. The device under test 100 may be an MEMS device such as a piezoelectric element, and a plurality of devices may be arranged on the wafer 1000.
[0019] [1-2. Measuring device 200] The measurement apparatus 200 measures the frequency characteristics of the device under test 100. In this embodiment, as an example, the measurement apparatus 200 may measure the impedance of the device under test 100 using a transfer impedance conversion method. The measurement apparatus 200 may also test the device under test 100 based on the measurement results.
[0020] The measuring device 200 includes a plurality of probes 20, a plurality of reference resistors 21, a signal source 22, a plurality of low-pass filters 23, a synchronization control unit 24, a waveform acquisition unit 25, a calculation unit 26, and a determination unit 27.
[0021] [1-2-1. Probe 20] The plurality of probes 20 are electrically connected to the plurality of devices under test 100, respectively. In the present embodiment, as an example, the plurality of probes 20 may be electrically connected to two terminals 101 of the device under test 100, respectively. Each probe 20 may be placed on the bottom surface of a substrate (not shown) that faces the surface of the wafer 1000 and can be raised and lowered.
[0022] [1-2-2. Reference Resistor 21] Each reference resistor 21 is connected in series with the device under test 100. One end of the series circuit between the reference resistor 21 and the device under test 100 may be connected to ground potential (for example, earth potential). In the present embodiment, as an example, the end of each series circuit between the reference resistor 21 and the device under test 100 on the reference resistor 21 side may be connected to ground potential. Each reference resistor 21 may be arranged on the same substrate as the probe 20.
[0023] Each reference resistor 21 may have a known resistance value. From the viewpoint of improving the measurement accuracy of the frequency characteristics of the device under test 100, it is preferable that the resistance value of each reference resistor 21 be close to the estimated value of the impedance of the device under test 100 connected in series to the reference resistor 21.
[0024] [1-2-3. Signal source 22] The signal source 22 outputs a binary digital signal constituting a multi-tone waveform. The multi-tone waveform may be a waveform having multiple frequency components. The signal source 22 may repeatedly output a reference pattern signal. The signal source 22 may supply the digital signal to at least one of the device under test 100 and the waveform acquiring section 25.
[0025] [1-2-4. Low-pass filter 23] The low-pass filter 23 is disposed between the signal source 22 and the device under test 100. The low-pass filter 23 may be provided for each device under test 100. The low-pass filter 23 may be disposed on the same substrate as the probe 20.
[0026] The low-pass filter 23 may remove high-frequency components from the digital signal output from the signal source 22. In other words, the low-pass filter 23 may smooth the waveform of the digital signal. The low-pass filter 23 may also prevent multiple reflections of the digital signal and may be impedance-matched to the transmission path of the digital signal in the cutoff frequency band. For example, the low-pass filter 23 may be an RC low-pass filter having a resistor and a capacitor connected in series. If the impedance of the transmission path of the digital signal is 50 Ω, the resistance of the low-pass filter 23 may be 50 Ω, the capacitance may be 0.01 μF, and the cutoff frequency may be 160 kHz.
[0027] [1-2-5. Waveform acquisition unit 25] The waveform acquiring section 25 acquires an analog signal waveform generated in response to application of a digital signal to the device under test 100. The waveform acquiring section 25 may acquire a response waveform indicating the response of the device under test 100 to the digital signal. The waveform acquiring section 25 may acquire analog signal waveforms of each of the multiple devices under test 100. The waveform acquiring section 25 may be a digitizer, and may acquire analog signal waveforms represented by digital values by sequentially acquiring analog signal values as digital signal values.
[0028] The waveform acquiring section 25 may acquire an analog signal waveform at a first measurement point 251 located closer to the signal source 22 than the device under test 100 and the reference resistor 21, and at a second measurement point 252 located between the device under test 100 and the reference resistor 21. The first measurement point 251 may be located closer to the signal source 22 than the series circuit of the device under test 100 and the reference resistor 21, or may be located between the series circuit and the low-pass filter 23. The waveform acquiring section 25 may store the acquired analog signal waveform in a storage section (not shown) and supply it to the calculating section 26.
[0029] [1-2-6. Synchronization control unit 24] The synchronization control unit 24 synchronizes the waveform acquiring unit 25 with the signal source 22. As a result, the waveform acquiring unit 25 acquires an analog signal waveform in synchronization with the signal source 22. The synchronization control unit 24 may synchronize the timing of signal output by the signal source 22 with the timing of waveform acquisition by the waveform acquiring unit 25 by supplying a synchronization signal to each of the signal source 22 and the waveform acquiring unit 25. Note that the synchronization control unit 24 is not limited to synchronizing the waveform acquiring unit 25 and the signal source 22, and may also control the operation of each unit of the measurement device 200.
[0030] [1-2-7. Arithmetic unit 26] The calculating section 26 calculates the frequency characteristics of the device under test 100 from the waveform acquired by the waveform acquiring section 25. The calculating section 26 may calculate the frequency characteristics of the device under test 100 from the waveform acquired at the first measurement point 251, i.e., the waveform of the voltage signal applied to the device under test 100, and the waveform acquired at the second measurement point 252, i.e., the waveform of the voltage signal obtained by dividing the voltage signal applied to the device under test 100 by the reference resistor 21 and the device under test 100 (in the present embodiment, as an example, the output signal from the device under test 100). The calculating section 26 may calculate the frequency characteristics of each of the multiple devices under test 100. The calculated frequency characteristics may vary due to the adhesion of foreign matter such as dust to the device under test 100. The calculating section 26 may supply the calculation results to the judging section 27.
[0031] [1-2-8. Judgment section 27] The judging section 27 judges the pass / fail of the device under test 100 based on the calculated frequency characteristics. For example, the judging section 27 may judge the device under test 100 as defective if the calculated frequency characteristics are outside a reference range. The judging section 27 may judge the pass / fail of each of the multiple devices under test 100. The judging section 27 may output the judgment results to a display section (not shown) or the like.
[0032] According to the above-described measuring device 200, the frequency characteristics are measured using a signal source 22 that outputs a binary digital signal, which makes it possible to reduce the cost of measuring device 200 compared to measuring frequency characteristics using a signal source 22 that outputs an analog signal of an arbitrary waveform. Furthermore, because a digital signal with a multi-tone waveform is used, the measurement time can be shortened compared to using a single-tone sine wave signal while sweeping the frequency.
[0033] Furthermore, since the low-pass filter 23 removes high-frequency components from the digital signal applied to the device under test 100, it is possible to prevent high-frequency components that are unnecessary for measuring the frequency characteristics of the device under test 100 from being applied to the device under test 100, and it is also possible to remove frequency components including aliasing noise during waveform observation, thereby improving the accuracy of calculating the frequency characteristics. It is also possible to prevent the digital signal from being subjected to multiple reflections on the transmission path.
[0034] Furthermore, since analog signal waveforms are acquired at a first measurement point 251 located closer to the signal source 22 than the device under test 100 and the reference resistor 21, and at a second measurement point 252 located between the device under test 100 and the reference resistor 21, the frequency characteristics of the device under test 100 can be calculated using the transfer impedance method.
[0035] Furthermore, since the waveform acquisition unit 25 acquires the analog signal waveform in synchronization with the signal source 22, it is possible to measure the frequency characteristics stably with high reproducibility.
[0036] Furthermore, since a plurality of probes 20 are provided that are electrically connected to the plurality of devices under test 100, respectively, the frequency characteristics of the plurality of devices under test 100 can be measured collectively.
[0037] Furthermore, since the reference resistor 21 and the low-pass filter 23 are arranged on the same substrate as the probe 20, the measuring device 200 can be made smaller and the signal transmission path can be shortened compared to when they are arranged on separate substrates.
[0038] [2.Operating waveform] [2-1. Digital Signal] FIG. 2 shows a portion of the digital signal output from the signal source 22.
[0039] The signal source 22 may repeatedly output a signal (also called a reference pattern signal) that is up-converted (also called high resolution) by multiplying a PRBS (Pseudo-Random Binary Sequence) signal by a repeating square wave of a reference frequency and a reference duty ratio.
[0040] The PRBS signal may be generated by a conventionally known method. In this embodiment, for example, the period of the PRBS signal may be set according to the reciprocal of the frequency resolution in analyzing the frequency characteristics of the device under test 100. For example, if the frequency resolution is 62.5 Hz, the period of the PRBS signal may be set to 16 ms (=1000 / 62.5 Hz). The PRBS signal may be a 255-bit signal.
[0041] The repeating square wave may be a signal with a bit rate multiple times that of the PRBS signal, and may be multiplied by the PRBS signal to upconvert each bit of the PRBS signal into a signal with multiple bits. Among the frequency components of the analog signal waveform acquired by the waveform acquiring section 25, frequency components with high signal power vary depending on the bit rate of the repeating square wave. Therefore, it is preferable to set the bit rate of the repeating square wave so that the frequency components with high signal power are close to the resonant frequency of the device under test 100. In this embodiment, as an example, the resonant frequency of the device under test 100 is 60 kHz, and the bit rate of the repeating square wave may be set to eight times that of the PRBS signal.
[0042] The reference pattern signal generated by upconversion may have a period of 16 ms, similar to a PRBS signal. This means that the digital signal, which is a repeat of the reference pattern signal, contains frequency components of at least 62.5 Hz (=1000 / 16 ms), resulting in a frequency resolution of 62.5 Hz for analyzing the frequency characteristics of the device under test 100. Note that the frequency resolution is proportional to the bit rate (i.e., frequency) and inversely proportional to the length of the reference pattern (i.e., number of bits). Therefore, the longer the reference pattern, the smaller the frequency resolution, and the higher the bit rate, the higher the frequency resolution.
[0043] According to the signal source 22, frequency components included in the acquired analog signal waveform that have a large signal power can be adjusted using the reference frequency of the repeating square wave, so that the signal power peak can be positioned at a desired frequency, such as the resonant frequency of the device under test 100. Therefore, the number of bits included in the signal pattern can be increased to reduce the frequency resolution while preventing a decrease in signal power due to dispersion. Therefore, the frequency resolution can be improved while preventing a decrease in signal power.
[0044] The signal source 22 may generate the reference pattern signal to be output by sequentially multiplying a PRBS signal by a repeating rectangular wave, or may store the signal in advance.
[0045] [2-2. Analog Signal] 3 and 4 show analog signal waveforms acquired by waveform acquisition unit 25 when the digital signal of Fig. 2 is applied. More specifically, Fig. 3 shows the analog signal waveform acquired at first measurement point 251, and Fig. 4 shows the analog signal waveform acquired at second measurement point 252. In these figures, the horizontal axis represents time, and the vertical axis represents voltage (V).
[0046] 5 shows the intensity distribution of the analog signal waveform acquired at the second measurement point 252, with the horizontal axis representing frequency (Hz) and the vertical axis representing voltage amplitude (Vrms). As shown in this figure, according to this operation example, the signal power peak can be positioned near the resonant frequency (=60 kHz) of the device under test 100.
[0047] [3. Operation] 6 shows the operation of the measurement apparatus 200. The measurement apparatus 200 tests the device under test 100 by performing the processes of steps S11 to S17.
[0048] In step S11, the signal source 22 outputs a binary digital signal constituting a multi-tone waveform. The signal source 22 may repeatedly output a signal obtained by multiplying a PRBS signal by a repetitive rectangular wave of a reference frequency and a reference duty ratio and up-converting the signal.
[0049] In step S13, the waveform acquiring section 25 acquires an analog signal waveform generated in response to application of a digital signal to the device under test 100. The waveform acquiring section 25 may acquire the analog signal waveform via the low-pass filter 23. Furthermore, the waveform acquiring section 25 may acquire the analog signal waveform at each of the first measurement point 251 and the second measurement point 252, and in this embodiment, as an example, the waveform acquiring section 25 may acquire the analog signal waveform at the first measurement point 251 and the second measurement point 252 for each of the multiple devices under test 100. In this embodiment, as an example, the waveform acquiring section 25 may acquire the analog signal waveform for two or more devices under test 100 simultaneously.
[0050] In step S15, the calculating section 26 calculates the frequency characteristics of the device under test 100 from the waveform acquired by the waveform acquiring section 25. The calculating section 26 may calculate the impedance of the device under test 100 as the frequency characteristics of the device under test 100. For example, the calculating section 26 may calculate the impedance R+jX (Ω) of the device under test 100 from the following equation (1): R+jX=R1{(V 1r +jV 1i ) / (V2r +jV 2i )-1} (1)
[0051] In equation (1), R1 is the resistance value (Ω) of the reference resistor. (V 1r +jV 1i ) is the voltage signal of the analog voltage waveform acquired at the first measurement point 251, and (V 2r +jV 2i ) is a voltage signal of an analog voltage waveform acquired at the second measurement point 252.
[0052] In step S17, the judging section 27 judges the acceptability of the device under test 100 based on the calculated frequency characteristics. If the calculated impedance is within a reference range (step S17; Yes), the judging section 27 may judge the device under test 100 as pass, and if the impedance is outside the reference range (step S17; No), the judging section 27 may judge the device under test 100 as fail.
[0053] [4. Modifications] 7 shows a test system 1A according to a modified example. A measurement apparatus 200A of the test system 1A has a reference resistor 21A. The reference resistor 21A is connected in series with the device under test 100 to form a series circuit, and the end of the series circuit on the side of the device under test 100 is connected to ground potential. This test system 1A can also achieve the same effects as the test system 1 described above.
[0054] [5. Other Modifications] In the above embodiment, the calculating section 26 is described as calculating the impedance as the frequency characteristic of the device under test 100, but the calculating section 26 may calculate the admittance in addition to or instead of the impedance. For example, the calculating section 26 may calculate the admittance by taking the reciprocal of the impedance.
[0055] The calculating section 26 may also calculate, as the frequency characteristics, parameters of elements constituting an equivalent circuit of the device under test 100. Fig. 8 shows an equivalent circuit 110 of the device under test 100. The equivalent circuit 110 may include a resistor 105, an inductor 106, and a capacitor 107 connected in series with each other, and a capacitor 108 connected in parallel with this series circuit. The calculating section 26 may calculate, as the frequency characteristics of the device under test 100, the resistance value Rs of the resistor 105, the inductance Ls of the inductor 106, and the capacitances Cs and Cp of the capacitors 107 and 108.
[0056] 9 shows a chart of the admittance of the device under test 100. In the chart, the horizontal axis represents the real part (G) of the admittance (Y=G+jB(s)), and the vertical axis represents the imaginary part (B). The calculation section 26 may calculate the parameters Rs, Ls, Cs, and Cp using the peak frequency fs of the real part determined from this chart, the frequencies f1 and f2 that are half the peak frequency of the real part, the anti-resonance frequency fa (the frequency at which B=0 intersects), the resonant frequency fr (the frequency at which B=0 intersects), and the maximum value Bmax of the conductance, and the following equations (2) to (6).
[0057] Q=fs / (f2-f1) (2) Rs=1 / Gmax (3) Ls=QRs / (2πfs) (4) Cs=1 / (2πfsQRs) (5) Cp=Cs·fr 2 / (fa 2 -fr 2 ) (6)
[0058] When the calculating section 26 calculates the parameters Rs, Ls, Cs, and Cp, the judging section 27 may determine that the device under test 100 is defective if the peak frequency fs is greater than the reference frequency, or if the resistance value Rs is greater than the reference resistance value.
[0059] Furthermore, in the above embodiment, the low-pass filter 23 is described as being provided for each device under test 100, but the low-pass filter 23 may be provided in common for multiple devices under test 100. For example, the low-pass filter 23 may be disposed between the signal source 22 and multiple devices under test 100.
[0060] Furthermore, although the measuring apparatus 200 has been described as having a synchronization control unit 24, it does not necessarily have to have the synchronization control unit 24 as long as the analog signal waveform generated in response to the application of a digital signal from the signal source 22 to the device under test 100 is acquired by the waveform acquisition unit 25.
[0061] Furthermore, although the measurement apparatus 200 has been described as having multiple probes 20 electrically connected to the terminals 101 of multiple devices under test 100, it may also have only one probe 20 electrically connected to the terminal 101 of a single device under test 100.
[0062] Although the waveform acquiring section 25 has been described as acquiring analog signal waveforms simultaneously for two or more devices under test 100, the analog signal waveforms may be acquired at different times. In this case, the measurement apparatus 200 may further include a switching section (not shown) that switches the set of first measurement point 251 and second measurement point 252 connected to the waveform acquiring section 25 for each device under test 100. In this case, the number of analog signal waveforms acquired simultaneously is reduced, thereby reducing the cost of the measurement apparatus 200.
[0063] Although the waveform acquiring section 25 has been described as acquiring analog signal waveforms simultaneously at the first measurement point 251 and the second measurement point 252 for each device under test 100, the analog signal waveforms may be acquired at different times. In this case, the measurement apparatus 200 may further include a switching section (not shown) that switches the connection target of the waveform acquiring section 25 between the first measurement point 251 and the second measurement point 252. The synchronization control section 24 may synchronize the signal source 22 and the waveform acquiring section 25 before and after switching by the switching section, and the waveform acquiring section 25 may acquire analog signal waveforms before and after switching by the switching section. In this case, the number of analog signal waveforms acquired simultaneously is reduced, thereby reducing the cost of the measurement apparatus 200.
[0064] Although the measurement apparatus 200 has been described as measuring the frequency characteristics of the device under test 100 by the transfer impedance conversion method, it may also measure by the IV method. In this case, the waveform acquiring section 25 may acquire an analog signal waveform of the current flowing through the device under test 100 as a voltage waveform across a reference resistor connected in series with the device under test 100, and may also acquire an analog signal waveform of the voltage across the device under test 100. The calculating section 26 may calculate the frequency characteristics of the device under test 100 from the acquired analog signal waveform.
[0065] Furthermore, the device under test 100 has been described as a MEMS device, but it may also be a system-on-chip (SoC) integrated circuit, a memory device, or any other semiconductor device.
[0066] Various embodiments of the present invention may be described with reference to flowcharts and block diagrams, where the blocks may represent (1) stages of a process in which operations are performed or (2) sections of an apparatus responsible for performing the operations. Particular stages and sections may be implemented by dedicated circuitry, programmable circuitry provided with computer-readable instructions stored on a computer-readable medium, and / or a processor provided with computer-readable instructions stored on a computer-readable medium. Dedicated circuitry may include digital and / or analog hardware circuitry, and may include integrated circuits (ICs) and / or discrete circuits. Programmable circuitry may include reconfigurable hardware circuitry, including logical AND, OR, XOR, NAND, NOR, and other logical operations, flip-flops, registers, memory elements such as field programmable gate arrays (FPGAs), programmable logic arrays (PLAs), and the like.
[0067] A computer-readable medium may include any tangible device capable of storing instructions that are executed by an appropriate device, such that the computer-readable medium having instructions stored thereon comprises an article of manufacture containing instructions that can be executed to create means for performing the operations specified in the flowcharts or block diagrams. Examples of computer-readable media may include electronic, magnetic, optical, electromagnetic, and semiconductor storage media. More specific examples of computer-readable media may include floppy disks, diskettes, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), electrically erasable programmable read-only memory (EEPROM), static random access memory (SRAM), compact disc read-only memory (CD-ROM), digital versatile disc (DVD), Blu-ray (RTM) disc, memory stick, integrated circuit card, and the like.
[0068] The computer readable instructions may include either assembler instructions, Instruction Set Architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state-setting data, or source or object code written in any combination of one or more programming languages, including object-oriented programming languages such as Smalltalk®, JAVA®, C++, etc., and conventional procedural programming languages such as the “C” programming language or similar programming languages.
[0069] The computer-readable instructions may be provided to a processor or programmable circuitry of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus, either locally or over a wide-area network (WAN) such as a local area network (LAN), the Internet, etc., which executes the computer-readable instructions to create means for performing the operations specified in the flowcharts or block diagrams. Examples of processors include computer processors, processing units, microprocessors, digital signal processors, controllers, microcontrollers, etc.
[0070] 10 illustrates an example of a computer 2200 in which aspects of the present invention may be embodied, in whole or in part. Programs installed on the computer 2200 may cause the computer 2200 to function as or perform operations associated with an apparatus or one or more sections of the apparatus according to embodiments of the present invention, and / or to perform a process or steps of a process according to embodiments of the present invention. Such programs may be executed by the CPU 2212 to cause the computer 2200 to perform specific operations associated with some or all of the blocks of the flowcharts and block diagrams described herein.
[0071] A computer 2200 according to this embodiment includes a CPU 2212, a RAM 2214, a graphics controller 2216, and a display device 2218, which are interconnected by a host controller 2210. The computer 2200 also includes input / output units such as a communication interface 2222, a hard disk drive 2224, a DVD-ROM drive 2226, and an IC card drive, which are connected to the host controller 2210 via an input / output controller 2220. The computer also includes legacy input / output units such as a ROM 2230 and a keyboard 2242, which are connected to the input / output controller 2220 via an input / output chip 2240.
[0072] The CPU 2212 operates according to programs stored in the ROM 2230 and RAM 2214, thereby controlling each unit. The graphics controller 2216 acquires image data generated by the CPU 2212 into a frame buffer or the like provided in the RAM 2214 or into the graphics controller 2216 itself, and causes the image data to be displayed on the display device 2218.
[0073] The communications interface 2222 communicates with other electronic devices via a network. The hard disk drive 2224 stores programs and data used by the CPU 2212 in the computer 2200. The DVD-ROM drive 2226 reads programs or data from the DVD-ROM 2201 and provides the programs or data to the hard disk drive 2224 via the RAM 2214. The IC card drive reads programs and data from an IC card and / or writes programs and data to an IC card.
[0074] The ROM 2230 stores therein a boot program or the like that is executed by the computer 2200 upon activation, and / or programs that depend on the hardware of the computer 2200. The input / output chip 2240 may also connect various input / output units to the input / output controller 2220 via a parallel port, a serial port, a keyboard port, a mouse port, etc.
[0075] The programs are provided by a computer-readable medium such as a DVD-ROM 2201 or an IC card. The programs are read from the computer-readable medium, installed in the hard disk drive 2224, RAM 2214, or ROM 2230, which are also examples of computer-readable media, and executed by the CPU 2212. Information processing described in these programs is read by the computer 2200, and brings about cooperation between the programs and the various types of hardware resources described above. An apparatus or method may be configured by realizing information manipulation or processing in accordance with the use of the computer 2200.
[0076] For example, when communication is performed between the computer 2200 and an external device, the CPU 2212 may execute a communication program loaded into the RAM 2214 and instruct the communication interface 2222 to perform communication processing based on the processing described in the communication program. Under the control of the CPU 2212, the communication interface 2222 reads transmission data stored in a transmission buffer processing area provided in the RAM 2214, the hard disk drive 2224, the DVD-ROM 2201, or a recording medium such as an IC card, and transmits the read transmission data to the network, or writes reception data received from the network to a reception buffer processing area or the like provided on the recording medium.
[0077] The CPU 2212 may also cause all or a necessary portion of a file or database stored on an external recording medium such as the hard disk drive 2224, the DVD-ROM drive 2226 (DVD-ROM 2201), an IC card, etc. to be read into the RAM 2214, and perform various types of processing on the data on the RAM 2214. The CPU 2212 then writes back the processed data to the external recording medium.
[0078] Various types of information, such as various types of programs, data, tables, and databases, may be stored on the recording medium and may undergo information processing. The CPU 2212 may perform various types of processing on data read from the RAM 2214, including various types of operations, information processing, conditional judgment, conditional branching, unconditional branching, information search / replacement, etc., as described throughout this disclosure and specified by the instruction sequences of the programs, and write the results back to the RAM 2214. The CPU 2212 may also search for information in a file, database, etc. on the recording medium. For example, if multiple entries each having an attribute value of a first attribute associated with an attribute value of a second attribute are stored on the recording medium, the CPU 2212 may search for an entry that matches a condition specified by the attribute value of the first attribute from among the multiple entries, read the attribute value of the second attribute stored in the entry, and thereby obtain the attribute value of the second attribute associated with the first attribute that satisfies a predetermined condition.
[0079] The above-described programs or software modules may be stored in a computer-readable medium on or near the computer 2200. A recording medium such as a hard disk or RAM provided in a server system connected to a dedicated communication network or the Internet can also be used as a computer-readable medium, thereby providing the programs to the computer 2200 via the network.
[0080] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the claims that such modifications and improvements can also be included within the technical scope of the present invention.
[0081] It should be noted that the execution order of each process, such as operations, procedures, steps, and stages, in the devices, systems, programs, and methods shown in the claims, specifications, and drawings is not specifically stated as "before," "prior to," etc., and that the processes can be performed in any order unless the output of a previous process is used in a subsequent process. Even if the operational flow in the claims, specifications, and drawings is described using "first," "next," etc. for convenience, this does not mean that the processes must be performed in this order. [Explanation of symbols]
[0082] 1 Test System 20 probes 21 Reference Resistor 22 Signal source 23 Low-pass filter 24 Synchronization control section 25 Waveform acquisition section 26 Arithmetic section 27 Judgment section 100 devices under test 101 terminal 105 Resistance 106 Inductor 107 Capacitor 108 Capacitor 110 Equivalent Circuit 200 Measuring Equipment 251 1st measurement point 252 2nd measurement point 2200 Computer 2201 DVD-ROM 2210 host controller 2212 CPU 2214 RAM 2216 Graphics Controller 2218 Display Device 2220 Input / Output Controller 2222 communication interface 2224 hard disk drive 2226 DVD-ROM drive 2230 ROM 2240 I / O chip 2242 keyboard
Claims
1. a signal source that outputs a binary digital signal that constitutes a multi-tone waveform; a waveform acquisition unit that acquires an analog signal waveform generated in response to application of the digital signal to the device under test; a calculation unit that calculates the frequency characteristics of the device under test from the waveform acquired by the waveform acquisition unit; Equipped with The signal source is a measuring device that repeatedly outputs a signal obtained by multiplying a PRBS (Pseudo-Random Binary Sequence) signal by a repetitive rectangular wave of a reference frequency and a reference duty ratio and up-converting the signal.
2. a signal source that outputs a binary digital signal that constitutes a multi-tone waveform; a waveform acquisition unit that acquires an analog signal waveform generated in response to application of the digital signal to the device under test; a calculation unit that calculates the frequency characteristics of the device under test from the waveform acquired by the waveform acquisition unit; a reference resistor connected in series with the device under test; Equipped with The waveform acquisition section acquires analog signal waveforms at a measurement point closer to the signal source than the device under test and the reference resistor, and at a measurement point between the device under test and the reference resistor.
3. 3. The measurement apparatus of claim 2, further comprising a low-pass filter disposed between the signal source and the device under test.
4. A probe is provided on the bottom surface of a substrate that can be raised and lowered and is electrically connected to a terminal of the device under test, The measuring device according to claim 3 , wherein the low-pass filter and the reference resistor are disposed on the substrate.
5. The measurement apparatus according to claim 4 , comprising a plurality of the probes electrically connected to a plurality of the devices under test, respectively.
6. a signal source that outputs a binary digital signal that constitutes a multi-tone waveform; a waveform acquisition unit that acquires an analog signal waveform generated in response to application of the digital signal to the device under test; a calculation unit that calculates the frequency characteristics of the device under test from the waveform acquired by the waveform acquisition unit; Equipped with The device under test is a MEMS device.
7. The measurement device according to claim 1 , wherein the waveform acquisition unit acquires the analog signal waveform in synchronization with the signal source.
8. The measurement apparatus according to claim 1 , further comprising a judging section that judges whether the device under test is good or bad based on the calculated frequency characteristics.
9. outputting a binary digital signal constituting a multi-tone waveform; acquiring an analog signal waveform generated in response to application of the digital signal to a device under test; calculating a frequency characteristic of the device under test from the waveform acquired in the acquiring step; Equipped with In the digital signal output step, a PRBS (Pseudo-Random Binary Sequence) signal is multiplied by a repetitive rectangular wave of a reference frequency and a reference duty ratio to up-convert the signal and then repeatedly output the up-converted signal.
10. outputting a binary digital signal constituting a multi-tone waveform; acquiring an analog signal waveform generated in response to application of the digital signal to a device under test connected in series with a reference resistor; calculating a frequency characteristic of the device under test from the waveform acquired in the acquiring step; Equipped with In the step of acquiring the analog signal waveform, the analog signal waveform is acquired at a measurement point closer to the signal source of the digital signal than the device under test and the reference resistor, and at a measurement point between the device under test and the reference resistor.
11. outputting a binary digital signal constituting a multi-tone waveform; acquiring an analog signal waveform generated in response to application of the digital signal to a device under test, the device being a MEMS device; calculating a frequency characteristic of the device under test from the waveform acquired in the acquiring step; A measurement method comprising:
12. Computer, a signal source that outputs a binary digital signal that constitutes a multi-tone waveform; a waveform acquisition unit that acquires an analog signal waveform generated in response to application of the digital signal to the device under test; a calculation unit that calculates the frequency characteristics of the device under test from the waveform acquired by the waveform acquisition unit; It functions as The signal source is a program that repeatedly outputs a signal obtained by multiplying a PRBS (Pseudo-Random Binary Sequence) signal by a repeating square wave of a reference frequency and a reference duty ratio and up-converting the signal.
13. Computer, a signal source that outputs a binary digital signal that constitutes a multi-tone waveform; a waveform acquiring unit that acquires an analog signal waveform generated in response to application of the digital signal to a device under test that is connected in series with a reference resistor; a calculation unit that calculates the frequency characteristics of the device under test from the waveform acquired by the waveform acquisition unit; It functions as The waveform acquisition unit is a program that acquires analog signal waveforms at a measurement point on the signal source side of the device under test and the reference resistor, and at a measurement point between the device under test and the reference resistor.
14. Computer, a signal source that outputs a binary digital signal that constitutes a multi-tone waveform; a waveform acquisition unit that acquires an analog signal waveform generated in response to application of the digital signal to a device under test that is a MEMS device; a calculation unit that calculates the frequency characteristics of the device under test from the waveform acquired by the waveform acquisition unit; A program that functions as a
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