Stream Repair Memory Management

Abstract

Techniques are described that extend and / or improve the Advanced Television Systems Committee (ATSC) 3.0 television protocol in reliably delivering next generation broadcast television services, using multiple memory buffers to manage the repair and presentation or storage of broadcast packets.

Description

[Technical Field]

[0001] This application relates to technological advancements directed to digital television that are necessarily rooted in computer technology, and in particular to Advanced Television Systems Committee (ATSC) 3.0. [Background technology]

[0002] The Advanced Television Systems Committee (ATSC) 3.0 family of standards, outlined in A / 300, is a set of numerous industry technical standards for delivering next-generation broadcast television. ATSC 3.0 supports the delivery of a wide range of television services, including televised video, interactive services, non-real-time data delivery, and tailored advertising, to a variety of receiving devices, from ultra-high-definition televisions to wireless telephones. ATSC 3.0 also coordinates coordination between broadcast content (called "over the air," or OTA) and related broadband-delivered content and services (called "over the top," or OTT). ATSC 3.0 is designed to be flexible so that advancements can be easily incorporated as technology evolves without requiring a complete overhaul of any related technical standards.

[0003] As understood herein, an ATSC 3.0 receiver scans for services in a single frequency network (SFN) or a multi-frequency network (MFN). ATSC 3.0 receivers can also receive services over broadband if both types of frequency networks are not available. ATSC 3.0 receivers can render content in real time to a display or record content to a storage device. Summary of the Invention [Problem to be solved by the invention]

[0004] As will be further understood herein, broadcast content is processed and error-corrected upon receipt. ATSC broadcast streams incorporate forward error correction (FEC) into their modulation schemes, which corrects many single-bit errors in ATSC Link Layer Packets (ALPs). Multi-bit or missing packets are serious errors that can occur under boundary conditions where the signal path is degraded or loss of signal lock exists. These types of errors cannot be repaired with FEC. As recognized herein, such content is desirably improved by replacing missing or uncorrectable packets before rendering or writing to storage. This process requires examining the content for errors and then determining whether to initiate an extensive repair process, or possibly, if a second frequency exists in the MFN, whether to initiate a reselection of what the primary broadcast feed is. Even if an equivalent service exists on a second frequency, it may be determined that access is temporary and the primary broadcast feed should not be changed. However, if repair is to be attempted, it is usually necessary to replace not only the missing or erroneous packets, but also all relevant packets in the frame in which they occur. These packets can be obtained from packets obtained at a second frequency from the service, or over broadband if they are not available. The repair application requires unfettered access to the content memory. However, problems can arise when different software applications or hardware circuits running on the same device attempting to access the same memory simultaneously write to the content memory. Specifically, when one software application or hardware circuit is accessing the memory, it can lock up the memory for other applications or hardware circuits.That is, conflicts may arise in applications or hardware circuits, such as when an application involved in repair needs to replace a missing or corrupted content segment while a receiving application or circuit needs to store an incoming content segment and a rendering or storage application or circuit needs to access that memory for decompression and playback purposes, or long-term storage such as a hard disk drive or solid-state drive, thereby competing for access to the same memory. [Means for solving the problem]

[0005] Thus, in a digital television having at least one receiver capable of receiving broadcast signals, a method includes receiving broadcast digital television (DTV) data elements into a buffer. The method includes, in response to the buffer containing an amount of data that meets a threshold, identifying whether any replacement content is available for packet errors in the DTV data elements in the buffer, and, in response to the replacement content being available, repairing at least a first DTV data element in the buffer. The method includes communicating the DTV data elements in the buffer to at least one decompression or storage engine to process the DTV data elements for presentation on at least one display or for storage to a recording medium.

[0006] In some embodiments, the method may include, in response to replacement content for the second DTV data element not being available, signaling to a decompression or storage engine that at least the second DTV data element contains at least one error.

[0007] In an implementation, a DTV data element can include a DTV packet.

[0008] In example embodiments, the buffer is a first buffer including a first memory address range, and the method includes repairing errors in DTV data elements in a second buffer having a second memory address range while the DTV data elements are being received in the first buffer before the first buffer is full. In some implementations, the method includes communicating DTV data elements from a third buffer to a decompression or storage engine while the DTV data elements are being received in the first buffer before the first buffer is full and errors are being repaired in the second buffer. The third buffer has a third memory address range. When the third buffer is emptied, its memory pointers are changed to the memory pointers that were for the second buffer. Once error repair of the DTV data elements that were in the second buffer is complete, the DTV data elements from the second buffer that are now in the third buffer can be communicated to a decompression or storage engine.

[0009] The memory addresses of the buffers are all different from each other and, if necessary, do not overlap with each other. Pointers to the various buffers can change as needed. A first buffer becomes a second buffer when it contains an amount of data that meets a threshold, such as when the buffer is full. A repair application can be given a memory location pointer to what was the first buffer. The buffer can be given an end address or buffer size. A pointer to the old second buffer is now given to the application responsible for rendering, and the second buffer now becomes the third buffer. The old third buffer, with the old contents, now becomes an available buffer and can become the first buffer to receive incoming packets.

[0010] In another aspect, a digital television (DTV) device includes at least one digital television (DTV) receiver and at least one processor programmed with instructions that configure the processor to control at least first, second, and third buffers to simultaneously respectively receive broadcast digital television (DTV) data elements, recover the DTV data elements, and communicate the DTV data elements to a processing engine for presentation on at least one display or for storage on a recording medium of content represented in the DTV data elements;

[0011] In another aspect, an apparatus includes at least one processor configured to cycle received broadcast digital television (DTV) data between at least three buffer operations, including receiving, error correction, and data reading, each buffer operation being performed sequentially in each of at least first, second, and third buffers having respective memory register allocations. The processor is configured to prevent contention for buffer use among applications performing the buffer operations.

[0012] The details of the present application, both as to its structure and operation, can best be understood in reference to the accompanying drawings, in which like reference numerals indicate like elements and in which: [Brief explanation of the drawings]

[0013] [Figure 1] FIG. 1 illustrates the Advanced Television Systems Committee (ATSC) 3.0 system. [Figure 2] FIG. 2 illustrates components of the device shown in FIG. 1. [Figure 3] FIG. 1 is a diagram illustrating a specific example of a system. [Figure 4] 1 is a diagram illustrating a first embodiment of a digital TV receiver. [Figure 5] FIG. 10 illustrates a second embodiment of a digital TV receiver. [Figure 6] FIG. 1 illustrates a particular example receiver memory system. [Figure 7]FIG. 10 illustrates example logic for a first buffer in example flow chart form. [Figure 8] FIG. 10 illustrates example logic for a second buffer in example flow chart form. [Figure 9] FIG. 10 illustrates example logic for a third buffer in example flow chart form. DETAILED DESCRIPTION OF THE INVENTION

[0014] This disclosure relates to technological advances in digital television, such as Advanced Television Systems Committee (ATSC) 3.0 television. An example system herein may include an ATSC 3.0 source component and a client component connected via broadcast and / or network so as to exchange data with each other. The client component may include one or more computing devices, such as portable televisions (e.g., smart TVs, Internet-enabled TVs), portable computers, such as laptops and tablet computers, and smartphones and other mobile devices, including further examples described below. These client devices may operate in a variety of operating environments. For example, some client computers may employ operating systems such as, by way of example, Microsoft Corporation's operating system, or the Unix operating system, or Android® manufactured by Apple Computer, Inc. or Google Inc. These operating environments may be used to run one or more browsing programs, such as browsers created by Microsoft Corporation, Google Inc., or Mozilla, or other browsing programs capable of accessing websites hosted by Internet servers, as described below.

[0015] ATSC 3.0 Publication A / 344, which is incorporated herein by reference, may be particularly relevant to the techniques described herein.

[0016] An ATSC 3.0 source component may include a broadcast transmission component and a server and / or gateway, which may include one or more processors that execute instructions that configure the source component to broadcast and / or transmit data over a network such as the Internet. Examples of client components and / or local ATSC 3.0 source components include gaming consoles such as the Sony PlayStation®, personal computers, etc.

[0017] Information may be exchanged between the client and the server over a network. For this purpose and for security, the server and / or client may include firewalls, load balancers, temporary storage, proxies, and other network infrastructure that enhances authenticity and security.

[0018] As used herein, instructions refer to computer-implemented steps for processing information within a system. Instructions may be implemented in software, firmware, or hardware and may include any type of program step performed by a component of the system.

[0019] The processor can be a single-chip or multi-chip processor capable of implementing logic through various lines such as address lines, data lines and control lines, as well as registers and shift registers.

[0020] The software modules illustrated by the flowcharts and user interfaces herein may include various subroutines, procedures, etc. Without limiting the disclosure, logic disclosed as being performed by a particular module may also be redistributed among other software modules and / or combined into a single module and / or utilized in a shareable library. While a flowchart format may be used, it should be understood that the software may also be implemented as a state machine or other logical method.

[0021] The principles described herein may be implemented as hardware, software, firmware, or a combination thereof, and thus, example components, blocks, modules, circuits, and steps are described in terms of their functionality.

[0022] In addition to those suggested above, the logic blocks, modules, and circuits may be implemented or performed using general purpose processors, digital signal processors (DSPs), field programmable gate arrays (FPGAs) or other programmable logic devices such as application specific integrated circuits (ASICs), discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A processor may be implemented by a controller, a state machine, or a combination of computing devices.

[0023] The functions and methods described below, when implemented in software, can be written in any suitable language, such as, but not limited to, Hypertext Markup Language (HTML)-5, Java / Javascript, C#, or C++, and can be stored on or transmitted through a computer-readable storage medium, such as random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM), or other optical disk storage, such as a digital versatile disk (DVD), magnetic disk storage, or other magnetic storage devices, including removable universal serial bus (USB) thumb drives. A connection can constitute the computer-readable medium. Such connections can include wired cables, including, by way of example, optical fiber, coaxial cable, digital subscriber line (DSL), and twisted pair cable.

[0024] Components included in one embodiment may be used in other embodiments in any suitable combination. For example, any of the various components described herein and / or illustrated in the figures may be combined, substituted, or excluded from other embodiments.

[0025] The phrase "having at least one of A, B, and C (and similarly, "having at least one of A, B, or C" and "having at least one of A, B, and C")" includes A only, B only, C only, both A and B, both A and C, both B and C, and / or all of A, B, and C, etc.

[0026] The present principles can employ a variety of machine learning models, including deep learning models. Machine learning models according to the present principles can use a variety of algorithms trained using methods including supervised learning, unsupervised learning, semi-supervised learning, reinforcement learning, feature learning, self-learning, and other forms of learning. Examples of such algorithms that can be implemented by computer circuitry include one or more neural networks, such as convolutional neural networks (CNNs), recurrent neural networks (RNNs), and a type of RNN known as a long short-term memory (LSTM) network. Support vector machines (SVMs) and Bayesian networks can also be considered examples of machine learning models.

[0027] Thus, as understood herein, performing machine learning can involve accessing the training data and then training a model based on the training data so that the model can process additional data and make inferences. Thus, an artificial neural network / artificial intelligence model trained through machine learning can include an input layer, an output layer, and multiple hidden layers therebetween that are configured and weighted to make inferences regarding the appropriate output.

[0028] 1, an example ATSC 3.0 source component, designated as a "broadcast station facility" 10, may include an over-the-air (OTA) facility 12 that broadcasts television data wirelessly, typically via orthogonal frequency division multiplexing (OFDM) in a one-to-many relationship, to multiple receivers 14, such as ATSC 3.0 televisions. The one or more receivers 14 may communicate with one or more companion devices 16, such as remote controls, headphones, tablet computers, and mobile phones, via a short-range link 18, which is typically wireless and may be implemented by Bluetooth®, Bluetooth Low Energy, other Near Field Communication (NFC) protocols, infrared (IR), or the like.

[0029] One or more of the receivers 14 may also communicate with over-the-top (OTT) equipment 22 of the broadcast facility 10 via a wired and / or wireless network link 20, such as the Internet, typically in a one-to-one relationship. The OTA equipment 12 may be co-located with the OTT equipment 22, or both equipments 12, 22 of the broadcast facility 10 may be remotely located and communicate with each other through suitable means. In either case, the receiver 14 may receive ATSC 3.0 television signals over the air via a tuned ATSC 3.0 television channel, or receive related content, including television, over the air (broadband). Note that the computer devices described in all figures herein may include some or all of the components shown for the various devices in FIGS. 1 and 2.

[0030] Referring now to Figure 2, details of example components shown in Figure 1 can be seen. Figure 2 illustrates an example protocol stack that can be implemented using a combination of hardware and software. A broadcaster can transmit a hybrid service distribution that delivers one or more program elements over a computer network (referred to herein as "broadband" and "over the top" (OTT)) and over the air (referred to herein as "broadcast" and "over the air" (OTA)) using the ATSC 3.0 protocol stack, appropriately modified for the broadcaster side, shown in Figure 2. Figure 2 also illustrates an example stack, including hardware that can be embodied by a receiver.

[0031] 2 from the perspective of a broadcast station facility 10, one or more processors 200 accessing one or more computer storage media 202, such as any memory or storage described herein, can be implemented to provide one or more software applications at a top-level application layer 204. The application layer 204 can include one or more software applications written in, for example, HTML5 / Javascript, that operate in a runtime environment. Applications in the application stack 204 can include, but are not limited to, a linear TV application, an interactive services application, a companion screen application, a personalization application, an emergency alert application, and a usage reporting application. Typically, applications are embodied in software that represents elements of the viewer experience, including video coding, audio coding, and the runtime environment. As an example, applications can be provided that allow users to control dialogue, use alternate audio tracks, and control audio parameters such as normalization and dynamic range.

[0032] Below the application layer 204 is the presentation layer 206. The presentation layer 206 includes a broadcast audio-video playback device called a media processing unit (MPU) 208 on the over-the-air (OTA) side, which, when implemented in a receiver, decodes and plays over-the-air broadcast audio-video content on one or more displays and speakers. The MPU 208 is configured to present the International Organization for Standardization (ISO) Base Media File Format (BMFF) data representation 210 and video in High Efficiency Video Coding (HEVC) with audio in, for example, Dolby Audio Compression (AC)-4 format. The ISO BMFF is a generic file structure for time-based media files, divided into "segments" and presentation metadata. Essentially, each file is a set of nested objects, each with its own type and length. The MPU 208 has access to a broadcast-side encrypted media extension (EME) / common encryption (CENC) module 212 to facilitate decryption.

[0033] 2 further shows that on the broadcast side, the presentation layer 206 can include signaling modules, including either a Moving Picture Experts Group (MPEG) Media Transport Protocol (MMTP) signaling module 214 or a real-time object delivery over unidirectional transport (ROUTE) signaling module 216, to deliver non-real-time (NRT) content 218 accessible to the application layer 204. NRT content can include, but is not limited to, stored alternative advertisements.

[0034] On the broadband (OTT or computer network) side, when implemented by a receiver, the presentation layer 206 can include one or more Dynamic Adaptive Streaming over Hypertext Transfer Protocol (HTTP) (DASH) players / decoders 220 to decode and play audio-video content from the Internet. To this end, the DASH players 220 can access an EME / CENC module 222 on the broadband side. The DASH content can be provided as DASH segments 224 in ISO / BMFF format.

[0035] The broadband side of the presentation layer 206, like the broadcast side, may contain NRT content in files 226 and signaling objects 228 that provide playback signaling.

[0036] Below the presentation layer 206 in the protocol stack is the session layer 230, which includes either the MMTP protocol 232 or the ROUTE protocol 234 on the broadcast side. Note that the ATSC standard provides the option of using MPEG MMT for transmission, but this is not shown here.

[0037] The session layer 230 includes the HTTP protocol 236, which can be implemented on the broadband side as HTTP-secure (HTTP(S)). The broadband side of the session layer 230 may also employ an HTTP proxy module 238 and a service list table (SLT) 240. The SLT 240 contains a table of signaling information used to build a basic service list and provide bootstrap discovery of broadcast content. The "ROUTE signaling" table contains media presentation descriptions (MPDs) delivered over the User Datagram Protocol (UDP) by the ROUTE transport protocol.

[0038] Below the session layer 230 in the protocol stack is the transport layer 242 for establishing low-latency, loss-tolerating connections, which uses UDP 244 on the broadcast side and Transmission Control Protocol (TCP) 246 on the broadband side.

[0039] 2 also includes a network layer 248 below the transport layer 242. The network layer 248 uses the Internet Protocol (IP) on both sides for IP packet communication, with multicast delivery being typical on the broadcast side and unicast on the broadband side.

[0040] Below the network layer 248 is a physical layer 250 that includes broadcast transmit / receive equipment 252 and computer network interface(s) 254 for communicating over the respective physical media associated with both sides. The physical layer 250 converts Internet Protocol (IP) packets for transmission over the associated media, adds forward error correction to enable error correction at the receiver, and may include modulation and demodulation modules to incorporate modulation and demodulation functions. The physical layer 250 converts bits into symbols for long-distance transmission and improved bandwidth efficiency. On the OTA side, the physical layer 250 typically includes a wireless broadcast transmitter that broadcasts data over the air using Orthogonal Frequency Division Multiplexing (OFDM), and on the OTT side, it includes a computer transmission component that transmits data over the Internet.

[0041] On the broadband side, the DASH Industry Forum (DASH-IF) profile can be used, transmitted over various protocols in the protocol stack (HTTP / TCP / IP). Media files in the DASH-IF profile, which is based on ISO BMFF, can be used as a distribution, media encapsulation, and synchronization format for both broadcast and broadband distribution.

[0042] Typically, each receiver 14 includes a protocol stack that is complementary to the protocol stack of the broadcast station equipment.

[0043] Receiver 14 of FIG. 1 may include an Internet-enabled TV with an ATSC 3.0 TV tuner 256 (equivalent to a set-top box that controls a TV), as shown in FIG. 2. Receiver 14 may be an Android®-based system. Alternatively, receiver 14 may be implemented by a computerized Internet-enabled (“smart”) phone, a tablet computer, a notebook computer, a wearable computing device such as virtual reality (VR) goggles or smart glasses, or the like. Nevertheless, it should be understood that receiver 14 and / or other computers described herein are configured to implement the present principles (e.g., to communicate with other devices to implement the present principles, to execute the logic described herein, and to perform any other functions and / or operations described herein).

[0044] Accordingly, receiver 14 may be established with some or all of the components shown in FIG. 1 to implement such principles. For example, receiver 14 may include one or more displays 258, which may or may not be implemented with high-definition or ultra-high-definition “4K” or higher flat screens and may be touch-enabled to receive user input signals via touch on the display. Receiver 14 may also include one or more speakers 260 for outputting audio in accordance with present principles and at least one additional input device 262, such as an audio receiver / microphone, for inputting audible commands to receiver 14, e.g., to control receiver 14. An example receiver 14 may further include one or more network interfaces 264 for communicating over at least one network, such as the Internet, a WAN, a LAN, or a PAN, under the control of one or more processors 266. Accordingly, interface 264 may be a Wi-Fi transceiver, which is an example of a wireless computer network interface, such as, but not limited to, a mesh network transceiver. Interface 264 can be, but is not limited to, a Bluetooth® transceiver, a Zigbee® transceiver, an Infrared Data Association (IrDA) transceiver, a wireless USB transceiver, a wired USB, a wired LAN, a powerline, or a Multimedia over Coax Alliance (MoCA). It should be understood that processor 266 controls receiver 14 to implement the present principles, including other elements of receiver 14 described herein, such as controlling display 258 to present images and receive input. Additionally, network interface 264 can be, for example, a wired or wireless modem or router, or other suitable interface, such as a wireless telephone transceiver or Wi-Fi transceiver as described above.

[0045] In addition to the above, receiver 14 may also include one or more input ports 268, such as a High-Definition Multimedia Interface (HDMI) port or a USB port, for physically connecting to another CE device (using a wired connection), and / or a headphone port for connecting headphones to receiver 14 to present audio from receiver 14 to a user through the headphones. For example, input port 268 may be connected via wire or wireless to a cable or satellite source of audio-video content. Thus, the source may be a separate or integrated set-top box or satellite receiver. Alternatively, the source may be a game console or disc player.

[0046] Receiver 14 may further include one or more computer memories 270, such as non-transitory, disk-based or solid-state storage, embodied in some cases as a stand-alone device within the receiver chassis, as a personal video recorder (PVR) or video disc player for playing audio-video (AV) programs, or as removable storage media, either internal or external to the receiver chassis. Also, in some embodiments, receiver 14 may include a position or location receiver 272, such as, but not limited to, a cellular telephone receiver, a global positioning satellite (GPS) receiver, and / or an altimeter, configured to receive geographic location information, e.g., from at least one satellite or cellular telephone tower, and provide this information to processor 266 and / or determine the altitude at which receiver 14 is located with processor 266. However, it should be understood that other suitable position receivers other than a cellular telephone receiver, a GPS receiver, and / or an altimeter may be used in accordance with the present principles to determine the location of receiver 14, e.g., in all three dimensions.

[0047] Continuing with the description of receiver 14, in some embodiments, receiver 14 may include one or more cameras 274, which may include one or more of a thermal imaging camera, a digital camera such as a webcam, and / or a camera integrated into receiver 14 and controllable by processor 266, for collecting photographs / images and / or videos in accordance with the present principles. Receiver 14 may also include a Bluetooth® transceiver 276 or other near field communication (NFC) element for communicating with other devices using Bluetooth® and / or NFC technology, respectively. An example NFC element may be a radio frequency identification (RFID) element.

[0048] Additionally, receiver 14 may also include one or more auxiliary sensors 278 (e.g., motion sensors such as accelerometers, gyroscopes, cyclometers, or magnetic sensors and combinations thereof) that provide input to processor 266, infrared (IR) sensors for receiving IR commands from a remote control device, optical sensors, speed and / or cadence sensors, gesture sensors (for detecting gesture commands), etc. An IR sensor 280 may also be provided for receiving commands from a wireless remote control. A battery (not shown) may also be provided to power receiver 14.

[0049] Companion device 16 may include some or all of the elements shown in connection with receiver 14 above.

[0050] The methods described herein may be implemented as software instructions executed by a processor, a suitably configured application specific integrated circuit (ASIC) or field programmable gate array (FPGA) module, or any other convenient method as would be understood by one of ordinary skill in the art. The software instructions, if employed, may be embodied in a non-transitory device such as a CD ROM or flash drive. Alternatively, the software code instructions may be embodied in a transitory configuration such as a radio or optical signal, or via download over the internet.

[0051] Referring now to Figure 3, a simplified digital TV system, such as an ATSC 3.0 system, is shown. In Figure 3, a mobile or fixed digital TV receiver, such as an ATSC 3.0 receiver 300, which may include some or all of the associated components described above in connection with Figures 1 and 2, is located in a boundary region 302 between a first and a second ATSC 3.0 broadcast station or assembly 304, with signals from both stations 304 being picked up by the receiver 300 within the region 302. The first broadcast station 304 broadcasts a first ATSC 3.0 service ("Service A") on a first frequency 306, while the second broadcast station 304 broadcasts the same Service A on a second frequency 308 that is different from the first frequency 306. The receiver 300 picks up both frequencies, i.e., the receiver 300 picks up signals from both stations 304.

[0052] Figure 4 illustrates a non-limiting example embodiment of a digital TV receiver, such as an ATSC 3.0 receiver 400, which may include some or all of the associated components described above in connection with Figures 1 and 2. In the illustrated example, the ATSC 3.0 receiver 400 may be a fixed receiver, such as a receiver located in a home. In some examples, the ATSC 3.0 receiver 400 may be a mobile receiver, such as implemented in a mobile phone or located in a moving vehicle.

[0053] 4 includes a tuner 402 that receives signals from one or more antennas 406 and sends them to a demodulator 404. The receiver 400 includes only one tuner, only one demodulator, and only one antenna.

[0054] In contrast, Figure 5 illustrates a non-limiting example embodiment of a digital TV receiver, such as an ATSC 3.0 receiver 500, which may include some or all of the associated components described above in connection with Figures 1 and 2. In the illustrated example, the ATSC 3.0 receiver 500 may be a mobile receiver, such as mounted in a mobile phone or located in a mobile vehicle. In some examples, the ATSC 3.0 receiver 500 may be a fixed receiver, such as a receiver located in a home.

[0055] The example ATSC 3.0 receiver 500 shown in FIG. 5 includes multiple tuners 502 that transmit signals picked up from one or more antennas 506 to respective demodulators 504. In the illustrated non-limiting example, the ATSC 3.0 receiver 500 has two tuners and two demodulators, although it should be understood that a greater or lesser number of tuners / demodulators is also possible. In the illustrated non-limiting example, the ATSC 3.0 receiver 500 has four antennas, although it should be understood that a greater or lesser number of antennas is also possible. The receiver 500 can switch antenna inputs to the tuners, such that a first tuner receives signals from, say, three antennas, a second tuner receives a signal from a fourth antenna, and then switch between the antenna inputs. Two antennas can also provide inputs to each respective tuner. All four antennas can also provide inputs to a single tuner. These and other antenna-tuner configurations can be changed on the fly during operation as needed. It should be noted that while a different configuration of terrestrial antenna is envisioned for receiving OTA signals, the receiver 500 may still have a broadband connection 250 to phone, WI-FI or satellite data services.

[0056] The techniques herein may be implemented using any of the above devices, systems and configurations.

[0057] As described in more detail below, the content repair techniques described herein utilize multiple buffers arranged and partitioned into separate memory blocks. In all the various ATSC 3.0 transmission scenarios, content and associated metadata are transmitted using ATSC Link Layer Protocol (ALP) packets. For example, Buffer 1 receives incoming content and UDP / IP content using ALP packets. Buffer 1 is a layer above the physical layer pipe (PLP). Often, there is a connection from a low-level demodulator to memory, allowing content to be received into Buffer 1 without significant involvement from the processor 200 beyond configuration. Buffer 1 can be monitored to determine how much data it contains and when the amount of data meets a threshold, such as 80% full, 100% full, or some other threshold. Packets containing errors can be flagged in memory by setting an error indicator bit associated with each ALP packet. Typically, if a packet fails a cyclic redundancy check (CRC), the demodulator can set the value of this bit upon receipt. Missing packets can also be flagged as null packets. If Buffer 1 is full or otherwise contains a threshold amount of data, processor 200 can reinitialize Buffer 1 with a new memory pointer to free memory, such as playback memory. In the repair scenario outlined herein, Buffer 1's memory now becomes Buffer 2. Typically, Buffer 2 can be linked to a decompression engine. However, in this case, the repair process requires the processor to check each packet in Buffer 2 to see if an error indicator bit is set, indicating that the FEC was unable to correct one or more errors and therefore the received data failed the hardware checksum operation. The processor can determine whether repair action makes sense. If only one packet has an error, simple error concealment during decompression may be sufficient.If multiple packets contain errors or are missing, the processor can take action. In broadcast systems, since different transmission systems may transcode differently to save bandwidth and therefore the same content is not treated identically, the safest approach is for the processor to replace the missing or erroneous packets and the packets of the picture group starting from the Start of Frame (SOF) of the Intracoded-Frame (I-Frame) before all packets, including B-Frames and P-Frames. Audio is not as highly compressed. It is also possible to replace all audio packets received along with the affected video packets, if necessary.

[0058] The data is processed by a repair application which examines the content segments to identify missing or corrupted content segments (and attempts to replace these from adjacent service transmissions (which can be tuned in in parallel) or over the Internet (back to the broadcaster broadband OTT service 22)), and Buffer 3 is the buffer with the best repaired content ready to be sent to the decompression or storage engine. When Buffer 3 is used, its pointer becomes zero and it becomes Buffer 1 to accept new content. Thus, the memory is segmented and some applications are locked out of adjacent memory that is not performing a task. There can actually be four buffers: when Buffer 3 is used, it becomes Buffer 4, a temporary buffer which can become Buffer 1 (when incoming writes to Buffer 1 finish).

[0059] The technique repairs errors due to noise and missing packets from another antenna / demodulator within the same receiver, if possible, or from content available from the Internet, such as a broadcaster's or aggregator's web content 22. This repair must occur while the content is continuously being streamed to the receiver and rendered on the display or stored in memory 270. The buffer should be large enough to accommodate the time required to process the repair buffer to determine the missing content, and to request and receive repair data from a remote server or extract the content from another memory connected to the second tuner / demodulator. This method is typically less expensive than retrieving repair data from a cellular or satellite network.

[0060] 6 illustrates one or more memories 600 accessible by one or more processors 602 in a digital TV receiver, such as any of the receivers described herein, e.g., multi-tuner / demodulator receiver 500 of FIG. 5, to receive and process broadcast digital TV content packets 604 (e.g., ASC3.0). Memory 600 includes at least three buffers in one example, and in the illustrated example, four buffers 1 through 4 (labeled 606, 608, 610, and 612 in FIG. 6). Each buffer is assigned a persistent memory register, with first buffer 606 assigned registers 0 through N-1, second buffer 608 assigned registers N through M-1, third buffer 610 assigned registers M through P-1, and fourth buffer 612 assigned registers P through Q. Applications executed by processor 602 to operate the respective functions of each buffer cannot simultaneously access the memory addresses of other buffers.

[0061] Thus, the processor simultaneously executes a first application executing packet receiving logic as described in FIG. 7 in the first buffer 606, a second application executing packet repair logic as described in FIG. 8 in the second buffer 608, and a third application executing packet reading logic as described in FIG. 9 in the third buffer 610, and these applications cannot access the other buffers until the other buffers have been cycled to their appropriate functions as described further below.

[0062] The data read from the third buffer may be sent to an unpacking engine 614 or other suitable processing component, such as a storage engine 615, for eventual display of the content on a display 616, such as any of the displays described herein.

[0063] Thus, a first application may be assigned memory registers for the first buffer as it receives packets and may be locked out of the memory registers for the second and third buffers during this time. The second and third applications may be assigned memory registers for the second and third buffers, respectively, during this time. Later, when the first buffer becomes full or contains enough data to meet a threshold (such as a high percentage of fullness, e.g., 90% full) and assumes the role of the second buffer, the first application may be locked out of the memory registers for the first buffer and memory registers for a new buffer (e.g., the third or fourth buffer, if provided) may be allocated to receive the incoming packets. With this shift, the second application (error correction) may be assigned memory registers for the first buffer and locked out of the other buffers, and the third application (data being read into the decompressor) may be assigned memory registers for the second buffer, which is now corrected, and locked out of the other buffers. This shifting of memory register allocations for applications continues as content flows in and each buffer shift occurs to prevent contention between applications.

[0064] Beginning at block 700 of FIG. 7, packets of broadcast data (or unpacketized content data received via broadcast) are provided to a first buffer. At block 702, the first buffer may detect and signal whether any errors, such as corrupted or missing data, have been detected. Decision block 704 indicates that this process continues until the buffer has enough data to meet a threshold, such as by filling up, at which point the logic proceeds to block 706, where the first buffer assumes the error correction function of the second buffer, the second buffer cycles from the error correction function to the read function of a third buffer, and the third buffer cycles from the read function to the receive function of the first buffer. In some instances, a fourth, "spare" buffer may be provided to assume the receive function of the first buffer before the third buffer has finished reading the data.

[0065] 7, filtering can be performed on IP addresses, and the receiver hardware is configured to directly source ATSC 3.0 IP packets into a specific memory range, including the first buffer 606. The hardware signals an error for any packets received in memory. The buffers can be interrupt-driven or poll-driven buffers. The first buffer 606 is marked as (takes the role of) the second buffer 608 when it is full or otherwise contains enough data to meet a threshold, which is marked as (takes the role of) the third buffer 610, which is marked as either the first buffer or (if provided) the fourth buffer 612.

[0066] 8 illustrates the error correction logic of a second application operating on a full buffer ready for error correction. Block 800 depicts identifying whether the hardware signaled an error when the buffer was filled with data. If an error was not signaled, the logic ends. However, if an error was signaled, the logic proceeds to decision block 802 to determine whether replacement content is available for the signaled error. If replacement content is not available, then at block 804 the content is not modified and a decompression engine is signaled so that the decompression engine can attempt to smooth or conceal any errors in the content. Additionally or alternatively, data can be sent along this logic path to a storage engine, such as storage engine 615 of FIG. 6.

[0067] On the other hand, if replacement content is available, the logic proceeds to block 806 and fetches the replacement content over broadband, either from another broadcast frequency carrying the same service as the one being processed, received over-the-air, or from the broadcast station, such as may occur in boundary region 302 of Figure 3. Note that such a duplicate stream may be received via a second tuner / demodulator pair as shown in Figure 5. Alternatively, the replacement content may be obtained over-the-top from a broadcaster or aggregator network server. The replacement content is inserted into the data at the appropriate location of the deleted corrupted data.

[0068] Content replacement can identify what the specific error was, what data is missing, and whether the entire group of pictures where corrupted or missing packets were found needs to be replaced, as is often the case. This process requires locating the group of pictures in the received second stream or in the broadcaster content cache. It may also be necessary to identify the specific IP packet in which the starting frame is located and start from there, etc.

[0069] In block 808, content blocks can be moved and added along with the fetched content to create the contiguous memory required for the decompression logic of FIG. 9 executed by the third of the above-mentioned applications.

[0070] Indeed, Figure 9 shows in block 900 a third application communicating with decompression engine 614 of Figure 6 to provide the decompression engine hardware with the memory register identification of the buffer that just completed error correction from the logic of Figure 8. Block 902 shows the application signaling to the decompression or storage engine that new content is available to be decompressed and read for display or storage, and the decompression engine decompresses the data from the buffer and provides it to display 616 of Figure 6. Typically, this is a "fire and forget" operation. The same is true for writing content to memory 270.

[0071] While the present principles have been described with reference to certain example embodiments, it will be understood that these embodiments are not intended to be limiting and that the subject matter claimed herein may be implemented using a variety of alternative configurations.

Claims

1. In a digital television, at least one receiver of which is capable of receiving broadcast signals using the Internet Protocol (IP), receiving broadcast digital television (DTV) data elements into a buffer; In response to the buffer containing an amount of data that meets a threshold, identifying whether any replacement content is available for packet errors in DTV data elements in the buffer; Responsive to replacement content being available, repairing at least a first DTV data element in the buffer; communicating the DTV data elements in the buffer to at least one decompression or storage engine to process the DTV data elements for presentation or storage; A method comprising:

2. in response to replacement content for a second DTV data element being unavailable, signaling to the decompression or storage engine that at least the second DTV data element contains at least one error. The method of claim 1.

3. the DTV data elements include DTV packets; The method of claim 1.

4. the buffer is a first buffer including a first memory address range, and the method includes correcting errors in DTV data elements in a second buffer including a second memory address range while the DTV data elements are being received in the first buffer before the first buffer is full; The method of claim 1.

5. The method includes communicating DTV data elements from a third buffer including a third memory address range to the decompression or storage engine while the DTV data elements are received in the first buffer before the first buffer is full and errors are being repaired in the second buffer. The method of claim 4.

6. transmitting the DTV data elements from the second buffer to the decompression or storage engine upon completion of error correction of the DTV data elements in the second buffer. The method of claim 5.

7. receiving the DTV data elements into the third buffer upon completion of transmission of the DTV data elements from the third buffer; The method of claim 6.

8. the at least one receiver includes an Advanced Television Systems Committee (ATSC) 3.0 receiver; The method of claim 1.

9. A digital television (DTV) device that receives broadcast signals using the Internet Protocol (IP), comprising: at least one digital television (DTV) receiver; at least one processor associated with said DTV receiver and programmed with instructions; wherein the instructions cause the processor to: controlling at least first, second, and third buffers to simultaneously respectively receive broadcast digital television (DTV) data elements, recover the DTV data elements, and communicate the DTV data elements to a processing engine for presentation on at least one display or for storage of content represented in the DTV data elements; Configure it as follows: A DTV device characterized by:

10. The instruction: receiving DTV data elements into the first buffer; In response to the first buffer containing an amount of data that meets a threshold, identifying whether any replacement content is available for packet errors in DTV data elements in the first buffer; Responsive to replacement content being available, repairing at least a first DTV data element in the first buffer; communicating the DTV data elements in the first buffer to a processing engine; 10. The DTV device of claim 9, wherein the DTV device is operable to:

11. The instruction: signaling to the processing engine that at least the second DTV data element contains at least one error in response to replacement content for the second DTV data element being unavailable; 11. The DTV device of claim 10, wherein the DTV device is operable to:

12. the DTV data elements include DTV packets; 10. The DTV device of claim 9.

13. The first buffer includes a first memory address range, and the instructions include: correcting errors in the DTV data elements in a second buffer that includes a second memory address range while the DTV data elements are being received in the first buffer before the first buffer is full; 10. The DTV device of claim 9, wherein the DTV device is operable to:

14. the instructions are executable to communicate DTV data elements from a third buffer including a third memory address range to the processing engine while the DTV data elements are received in the first buffer before the first buffer is full and errors are being corrected in the second buffer.

14. A DTV device according to claim 13.

15. the instructions are executable to communicate the DTV data elements from the second buffer to the processing engine upon completion of error correction of the DTV data elements in the second buffer.

15. A DTV device according to claim 14.

16. the instructions are executable to receive the DTV data element into the third buffer upon completion of transmission of the DTV data element from the third buffer.

16. A DTV device according to claim 15.

17. the DTV receiver comprises an Advanced Television Systems Committee (ATSC) 3.0 receiver; 10. The DTV device of claim 9.

18. An apparatus comprising at least one processor for receiving a broadcast signal using Internet Protocol (IP), the at least one processor comprising: Circulating received broadcast digital television data elements among at least three buffer operations including receiving, error correction, and data reading, each buffer operation being performed sequentially in each of at least first, second, and third buffers having respective memory register allocations; Preventing contention for use of the buffer between applications performing buffer operations; configured to: An apparatus characterized in that

19. the device includes an Advanced Television Systems Committee (ATSC) 3.0 receiver; 20. The apparatus of claim 18.

20. the processor is configured to control at least the first, second, and third buffers to simultaneously respectively receive broadcast digital television data elements, recover the broadcast digital television data elements, and communicate the broadcast digital television data elements to a processing engine for content presentation or storage.

20. The apparatus of claim 18.

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