High-level constraint flags for local chroma quantization parameter control

Abstract

A method and apparatus for improving compression efficiency in a video compression scheme allows for separate control of local chroma quantization parameters. This control can be used to override the local chroma quantization parameters. One embodiment uses existing local luma quantization parameter control flags to control the local chroma quantization parameters. Another embodiment includes separate local chroma quantization parameter control flags. Bitstream syntax is used to carry the flags.

Description

[Technical Field]

[0001] At least one of the present embodiments generally relates to a method or apparatus for video encoding or decoding. [Background technology]

[0002] To achieve high compression efficiency, image and video coding schemes typically employ prediction, including spatial vector prediction and / or motion vector prediction, and transformation to exploit spatial and temporal redundancy in video content. Generally, intra- or inter-prediction is used to exploit correlation within or between frames, and then the difference between the original and predicted image, often called the prediction error or prediction residual, is transformed, quantized, and entropy coded. To reconstruct the video, the compressed data is decoded through the inverse processes corresponding to entropy coding, quantization, transformation, and prediction. Several coding tools, including transform and inverse transform, can be used in the encoding and decoding processes. Summary of the Invention

[0003] The shortcomings and drawbacks of the prior art can be addressed by the general aspects described herein relating to constraint flags used to build profiles and / or control chroma quantization.

[0004] According to a first aspect, there is provided a method, the method including quantizing at least one video block based on at least one quantization parameter used for chroma quantization, and encoding the quantized at least one video block and syntax indicative of the at least one quantization parameter.

[0005] According to a second aspect, a method is provided that includes parsing a video bitstream for syntax used to control at least one quantization parameter used for chroma quantization of at least one coded video block, and decoding the at least one video block using the at least one quantization parameter based on the syntax.

[0006] According to another aspect, there is provided an apparatus, comprising: a processor, the processor may be configured to encode a block of video or decode a bitstream by performing any of the methods described above.

[0007] According to another general aspect of at least one embodiment, there is provided a device comprising an apparatus according to any of the decoding embodiments and at least one of: (i) an antenna configured to receive a signal, the signal including a video block; (ii) a band limiter configured to limit the received signal to a frequency band including the video block; or (iii) a display configured to display an output representing the video block.

[0008] According to another general aspect of at least one embodiment, there is provided a non-transitory computer-readable medium that includes data content generated in accordance with any of the described encoding embodiments or variations.

[0009] According to another general aspect of at least one embodiment, there is provided a signal including video data generated in accordance with any of the described encoding embodiments or variations.

[0010] According to another general aspect of at least one embodiment, a bitstream is formatted to include data content generated according to any of the described encoding embodiments or variations.

[0011] According to another general aspect of at least one embodiment, there is provided a computer program product including instructions that, when executed by a computer, cause the computer to perform any of the described decoding embodiments or variations.

[0012] These and other aspects, features, and advantages of the general aspects will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings. [Brief explanation of the drawings]

[0013] [Figure 1] Indicates a standard common video compression method. [Figure 2] Indicates a standard common video compression method. [Figure 3] 1 illustrates an embodiment of an encoding method in a general aspect for encoding with control of local chroma quantization parameters. [Figure 4] 1 illustrates another embodiment of a decoding method in a general aspect for decoding with control of local chroma quantization parameters. [Figure 5] 1 illustrates one embodiment of an apparatus for encoding or decoding using aspects described herein. [Figure 6] 1 illustrates an exemplary processor configuration in which embodiments described herein may be implemented. [Figure 7] 1 illustrates another embodiment of a method according to aspects described herein. [Figure 8] 1 illustrates another embodiment of a method according to aspects described herein. [Figure 9] 1 illustrates another embodiment of a method according to aspects described herein. DETAILED DESCRIPTION OF THE INVENTION

[0014] To achieve high compression efficiency, image and video coding schemes typically employ prediction, including motion vector prediction, and transformation that exploits spatial and temporal redundancy in the video content. Typically, intra- or inter-prediction is used to exploit correlation within or between frames, and then the difference between the original and predicted image, often called the prediction error or prediction residual, is transformed, quantized, and entropy coded. To reconstruct the video, the compressed data is decoded by the inverse processes corresponding to entropy coding, quantization, transformation, and prediction.

[0015] The following general aspect is a high-level syntax provided for overriding local control of quantization steps in the field of video compression, and more specifically, in video compression schemes. Video compression standards such as High Efficiency Video Coding (HEVC) and Versatile Video Coding (VVC) use quantization with quantization step sizes used to adjust bitrate and / or video quality. The HEVC and VVC (Draft 8) specifications use a quantization parameter QP (or qP) to define the current quantization step.

[0016] The HEVC specification uses an inverse quantization process in which the coded block frequency transform coefficients TransCoeffLevel are scaled by the current quantization step (levelScale[qP%6]<<(qP / 6)) and further scaled by the quantization matrix m[][] as follows: d[x][y]=Clip3(coeffMin,coeffMax,((TransCoeffLevel[xTbY][yTbY][cIdx][x][y] * m[x][y] * levelScale[qP%6]<<(qP / 6))+(1<<(bdShift-1)))>>bdShift) During the ceremony, · TransCoeffLevel[...] is the absolute value of the transformed coefficient of the current block identified by its spatial coordinates xTbY, yTbY and its component index cIdx. · x and y are the horizontal / vertical frequency indexes. qP is the current quantization parameter. · Multiplication of levelScale[qP%6] and a left shift by (qP / 6) is equivalent to multiplication by the quantization step qStep=(levelScale[qP%6])<<(qP / 6)). ·m[...][...] is a two-dimensional quantization matrix. bdShift is an additional scaling factor to account for the image sample bit depth. The term (1<<(bdShift-1)) is used for rounding to the nearest integer. · d[...] is the absolute value of the resulting dequantized transformed coefficient.

[0017] In HEVC (with range extension) and VVC, it is possible to locally adjust the QP using specific syntax. A luma QP offset can be specified, and optionally a chroma QP offset can also be specified. The relevant syntax present in the VVC transform unit syntax structure is shown below.

[0018] [Table 1] Cu_qp_delta_abs and cu_qp_delta_sign_flag are used to calculate CuQpDeltaVal, which is the difference between the luma QP of the current coding unit (CU) and the luma QP prediction, which is based on the luma QPs of the blocks above and to the left of the current quantization group and is not described here. cu_chroma_qp_offset_flag and cu_chroma_qp_offset_idx are used to derive the chroma QP offset: cu_chroma_qp_offset_flag enables the offset feature (otherwise the offset is zero), and cu_chroma_qp_offset_idx specifies the index into the lookup table where the offset for each chroma component resides for all indices as follows:

[0019] [Table 2]

[0020] In VVC, a syntax structure called "general_constraint_info" (referenced by the profile_tier_level syntax structure) contains several flags that can be used to disable some coding tools. This can be used to disable some tools of a given profile, so that decoders conforming to this profile do not need to implement these disabled tools.

[0021] For example, this allows specifying a low-complexity decoder that conforms to a subset of VVC.

[0022] The syntax and semantics of the constraint flags related to local QP control are given below.

[0023] [Table 3] no_qp_delta_constraint_flag equal to 1 specifies that it is a requirement for bitstream conformance that cu_qp_delta_enabled_flag equal to 0. no_qp_delta_constraint_flag equal to 0 imposes no such constraint.

[0024] Note: The cu_qp_delta_enabled_flag is present in the PPS syntax structure and adjusts all syntax related to local luma QP control. Forcing it to zero means that no local luma QP control syntax is present in the bitstream, disabling the feature.

[0025] In the current VVC draft, local chroma QP control cannot be disabled with a constraint flag, which prevents defining a profile without local chroma QP control.

[0026] At least one embodiment disclosed herein allows for overriding local chroma QP control using a high-level constraint flag.

[0027] Method 1: Disable local QP control for both luma and chroma using no_qp_delta_constraint_flag One way to disable local chroma QP control with high-level constraint flags is to reuse the flag designed to disable local luma QP control to disable both luma and chroma local QP control. This approach can be used in encoders only (compatible).

[0028] For encoder-only embodiments, the syntax is unchanged for the decoder, which ignores the values ​​of constraint flags (except to check for conformance with supported profiles, otherwise it crashes); it may also detect invalid PPS flags and crash).

[0029] The encoder must obey the compatibility constraint by effectively disabling the chroma QP control when the constraint flag is 1.

[0030] Example syntax and semantics in the context of VVC Draft 8 are shown below.

[0031] [Table 4] Semantics (additions are underlined): [Table 5] Note: The pps_cu_chroma_qp_offset_list_enabled_flag is present in the PPS syntax structure and adjusts all syntax related to local chroma QP control. Forcing it to zero means that no local chroma QP control syntax is present in the bitstream, disabling the feature.

[0032] Method 2: Adding specific constraint flags to disable local chroma QP control Another way to disable local chroma QP control with high-level constraint flags is to add specific constraint flags. This can be useful to control features of different profiles separately. For example, in HEVC, local luma QP control is a core specification, but local chroma QP control is a range extension. This means that in HEVC without range extension, local luma QP control is possible, but local chroma QP control does not exist. Decoders must parse the new compatibility flags but ignore their values.

[0033] The encoder must obey the compatibility constraint by effectively disabling the chroma QP control when the constraint flag is 1.

[0034] Example syntax and semantics in the context of VVC Draft 8 are shown below:

[0035] [Table 6] Semantics (additions are underlined): [Table 7]

[0036] Method 3: Make Chroma QP control dependent on using Luma QP control An alternative to disabling local chroma QP control with high-level constraint flags is to adjust the chroma QP control syntax to enable luma QP control (at the SPS level) with a flag designed to disable local luma QP control. Example syntax and semantics in the context of VVC Draft 8 are shown below:

[0037] [Table 8] Semantics: No change

[0038] Method 4: Adjust both the luma QP control and the chroma QP control to additional flags An alternative to overriding local chroma QP control with higher level constraint flags is to use a single constraint flag that overrides a new flag (at the PPS level), and this new flag adjusts all QP control related syntax (both luma and chroma). Example syntax and semantics in the context of VVC Draft 8 are shown below:

[0039] [Table 9] Semantics (strikethrough indicates deletion, underline indicates addition): [Table 10]

[0040] Note: These examples are not limiting. In these examples, the flags that are overridden by the constraint flags are present in the PPS syntax structure, but the methods described herein would also be valid if these flags (which may be overridden by the constraint flags) were moved to other syntax structures, such as SPS, or if the constraint flags related to local chroma QP control constrain (override) flags other than pps_cu_chroma_qp_offset_list_enabled_flag in a syntax structure other than PPS (e.g., SPS).

[0041] One embodiment of a method 300 in the general aspects described herein is shown in Figure 3. The method begins at start block 301, with control passing to block 310, which quantizes at least one video block based on at least one quantization parameter used for chroma quantization. Control passes from block 310 to block 320, which encodes the quantized at least one video block and syntax indicating the at least one quantization parameter.

[0042] One embodiment of a method 400 in accordance with the general aspects described herein is shown in Figure 4. The method begins at start block 401, with control passing to block 410, which parses a video bitstream for syntax used to control at least one quantization parameter used for chroma quantization of at least one coded video block. Control passes from block 410 to block 420, which decodes at least one video block using the at least one quantization parameter based on the syntax.

[0043] 5 illustrates one embodiment of an apparatus 500 for compressing, encoding, or decoding video with the ability to disable local chroma quantization parameter control. The apparatus includes a processor 510, which may be interconnected through at least one port to a memory 520. Both the processor 510 and the memory 520 may also have one or more additional interconnections to external connections.

[0044] Additionally, processor 510 is configured to insert or receive information in a bitstream and compress, encode, or decode using any of a variety of encoding tools.

[0045] This application describes various aspects, including tools, features, embodiments, models, approaches, and the like. Many of these aspects are described in specific, and often definitive, terms to at least illustrate their individual characteristics. However, this is for purposes of clarity of description and does not limit the applicability or scope of the aspects. In fact, all of the different aspects can be combined or interchanged to provide further aspects. Furthermore, these aspects can be combined or interchanged with aspects described in previous applications.

[0046] The aspects described and contemplated in this application may be implemented in many different forms. While Figures 1, 2, and 6 provide some embodiments, other embodiments are contemplated, and the descriptions of Figures 1, 2, and 6 do not limit the scope of implementations. At least one of the aspects generally relates to video encoding and decoding, and at least one other aspect generally relates to transmitting a generated or encoded bitstream. These and other aspects may be implemented as a method, an apparatus, a computer-readable storage medium having stored thereon instructions for encoding or decoding video data according to any of the described methods, and / or a computer-readable storage medium having stored thereon a bitstream generated according to any of the described methods.

[0047] In this application, the terms "reconstructed" and "decoded" may be used interchangeably, the terms "pixel" and "sample" may be used interchangeably, and the terms "image," "picture," and "frame" may be used interchangeably. Typically, but not necessarily, the term "reconstructed" is used on the encoder side, and the term "decoded" is used on the decoder side.

[0048] Various methods are described herein, each of which includes one or more steps or actions for achieving the described method. Unless a specific order of steps or actions is required for the proper operation of the method, the order and / or use of specific steps and / or actions may be modified or combined.

[0049] Various methods and other aspects described in this document can be used to modify modules of video encoder 100 and video decoder 200, such as the intra-prediction module, entropy encoding module, and / or decoding module (160, 360, 145, 330), as shown in Figures 1 and 2. Furthermore, aspects of this disclosure are not limited to VVC or HEVC, but can be applied to, for example, other standards and recommendations, whether existing or developed in the future, and extensions of any such standards and recommendations (including VVC and HEVC). Unless otherwise indicated or technically excluded, aspects described in this application can be used individually or in combination.

[0050] Various numerical values ​​are used in this application. The specific values ​​are for illustrative purposes and the described aspects are not limited to these specific values.

[0051] 1 shows an encoder 100. Although variations of this encoder 100 are contemplated, the encoder 100 is described below for clarity without necessarily describing all contemplated variations.

[0052] Before being encoded, the video sequence may undergo pre-encoding processing (101), such as applying a color transformation to the input color picture (e.g., from RGB 4:4:4 to YCbCr 4:2:0) or performing a remapping of the input picture components (e.g., using histogram equalization of one of the color components) to obtain a signal delivery that is more resilient to compression. Metadata can be associated with the pre-processing and added to the bitstream.

[0053] In encoder 100, a picture is coded by encoder elements as described below. The picture to be coded is divided (102) into units, e.g., CUs, and processed. Each unit is coded, e.g., using either intra mode or inter mode. When a unit is coded in intra mode, it performs intra prediction (160). In inter mode, motion estimation (175) and motion compensation (170) are performed. The encoder determines (105) whether to use either intra mode or inter mode to code the unit, and indicates the intra / inter decision, e.g., by a prediction mode flag. A prediction residual is calculated (110), e.g., by subtracting the prediction block from the original image block.

[0054] The prediction residual is then transformed (125) and quantized (130). The quantized transform coefficients, as well as motion vectors and other syntax elements, are entropy coded (145) to output a bitstream. The encoder can skip the transform and apply quantization directly to the untransformed residual signal. The encoder can bypass both the transform and quantization, i.e., the residual is coded directly without applying the transform or quantization processes.

[0055] The encoder decodes the coded block to provide a reference for further prediction. The quantized transform coefficients are dequantized (140) and inverse transformed (150) to decode the prediction residual. The decoded prediction residual and the predicted block are combined (155) to reconstruct an image block. An in-loop filter (165) is applied to the reconstructed picture, for example, performing deblocking / SAO (Sample Adaptive Offset) filtering to reduce coding artifacts. The filtered image is stored in a reference picture buffer (180).

[0056] Figure 2 shows a block diagram of a video decoder 200, in which the bitstream is decoded by decoder elements as described below. The video decoder 200 generally performs a decoding pass that is the reverse of the encoding pass as described in Figure 1. The encoder 100 also typically performs video decoding as part of the video data encoding.

[0057] In particular, the decoder's input includes a video bitstream, which may be generated by video encoder 100. The bitstream is first entropy decoded (230) to obtain transform coefficients, motion vectors, and other coding information. Picture partition information indicates how the picture is partitioned. Thus, the decoder may partition the picture according to the decoded picture partition information (235). The transform coefficients are inverse quantized (240) and inverse transformed (250) to decode the prediction residual. Combining the decoded prediction residual and the predicted block (255) reconstructs an image block. The predicted block may be obtained from intra prediction (260) or motion-compensated prediction (i.e., inter prediction) (275) (270). An in-loop filter (265) is applied to the reconstructed image. The filtered image is stored in a reference picture buffer (280).

[0058] The decoded picture may further undergo post-decoding processing (285), such as an inverse color transform (e.g., YCbCr 4:2:0 to RGB 4:4:4) or an inverse remapping that performs the inverse of the remapping process performed in pre-encoding processing (101). Post-decoding processing may use metadata derived in pre-encoding processing and signaled in the bitstream.

[0059] FIG. 6 illustrates a block diagram of an example system in which various aspects and embodiments may be implemented. System 1000 may be embodied as a device including various components described below and configured to perform one or more of the aspects described herein. Examples of such devices include, but are not limited to, various electronic devices, such as personal computers, laptop computers, smartphones, tablet computers, digital multimedia set-top boxes, digital television receivers, personal video recording systems, connected home appliances, and servers. Elements of system 1000, singly or in combination, may be embodied in a single integrated circuit (IC), multiple ICs, and / or separate components. For example, in at least one embodiment, the processing elements and encoder / decoder elements of system 1000 are distributed across multiple ICs and / or separate components. In various embodiments, system 1000 is communicatively coupled to one or more other systems or other electronic devices, for example, via a communication bus or through dedicated input and / or output ports. In various embodiments, system 1000 is configured to implement one or more of the aspects described herein.

[0060] The system 1000 includes at least one processor 1010, configured to execute instructions loaded therein, for example, to implement various aspects described herein. The processor 1010 may include embedded memory, input / output interfaces, and various other circuitry known in the art. The system 1000 includes at least one memory 1020 (e.g., a volatile memory device and / or a non-volatile memory device). The system 1000 includes a storage device 1040, which may include non-volatile memory and / or volatile memory, including, but not limited to, Electrically Erasable Programmable Read-Only Memory (EEPROM), Read-Only Memory (ROM), Programmable Read-Only Memory (PROM), Random Access Memory (RAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), Flash, magnetic disk drives, and / or optical disk drives. Storage devices 1040 may include, by way of non-limiting example, internal storage devices, attached storage devices (including removable and non-removable storage devices), and / or network-accessible storage devices.

[0061] System 1000 includes, for example, an encoder / decoder module 1030 configured to process data to provide encoded or decoded video, which may include its own processor and memory. Encoder / decoder module 1030 represents a module that may be included in a device to perform encoding and / or decoding functions. As is known, a device may include one or both of an encoding module and a decoding module. Furthermore, encoder / decoder module 1030 may be implemented as a separate element of system 1000 or may be incorporated within processor 1010 as a combination of hardware and software, as is known to those skilled in the art.

[0062] Program code loaded into the processor 1010 or the encoder / decoder 1030 to perform various aspects described herein may be stored in the storage device 1040 and then loaded into the memory 1020 for execution by the processor 1010. According to various embodiments, one or more of the processor 1010, the memory 1020, the storage device 1040, and the encoder / decoder module 1030 may store one or more of various items during execution of the processes stored herein. Such stored items may include, but are not limited to, input video, decoded video, or portions of decoded video, bitstreams, matrices, variables, and intermediate or final results from processing of equations, expressions, operations, and operational logic.

[0063] In some embodiments, memory internal to the processor 1010 and / or the encoder / decoder module 1030 is used to store instructions and provide working memory for processing required during encoding or decoding. However, in other embodiments, memory external to the processing device (which may be, for example, either the processor 1010 or the encoder / decoder module 1030) is used for one or more of these functions. The external memory may be the memory 1020 and / or the storage device 1040, for example, dynamic volatile memory and / or non-volatile flash memory. In some embodiments, the external non-volatile flash memory is used to store, for example, the television's operating system. In at least one embodiment, a fast external dynamic volatile memory such as RAM is used as working memory for video encoding and decoding operations such as MPEG-2 (MPEG stands for Moving Picture Experts Group, MPEG-2 is also known as ISO / IEC 13818, 13818-1 is also known as H.222, and 13818-2 is also known as H.262), HEVC (HEVC stands for High Efficiency Video Coding, also known as H.265 and MPEG-H Part 2), or VVC (Versatile Video Coding, a new standard being developed by the Joint Video Experts Team, JVET).

[0064] Input to the elements of system 1000 can be provided through various input devices, as shown in block 1130. Such input devices include, but are not limited to, (i) a radio frequency (RF) section that receives RF signals transmitted, for example, by a broadcaster, (ii) a component (COMP) input terminal (or set of COMP input terminals), (iii) a Universal Serial Bus (USB) input terminal, and / or (iv) a High-Definition Multimedia Interface (HDMI) input terminal. Although not shown in FIG. 6, another example includes composite video.

[0065] In various embodiments, the input devices of block 1130 have associated respective input processing elements, as is known in the art. For example, the RF section may be associated with elements suitable for (i) selecting a desired frequency (also referred to as selecting a signal or bandlimiting a signal to a band of frequencies), (ii) downconverting the selected signal, (iii) bandlimiting again to a narrower band of frequencies to select a signal frequency band, which in particular embodiments may be referred to as a channel (for example), (iv) demodulating the downconverted, bandlimited signal, (v) performing error correction, and (vi) demultiplexing to select a desired stream of data packets. The RF section of various embodiments includes one or more elements that perform these functions, such as a frequency selector, a signal selector, a band limiter, a channel selector, a filter, a downconverter, a demodulator, an error corrector, and a demultiplexer. The RF section may include a tuner that performs various of these functions, including, for example, downconverting received signals to a lower frequency (e.g., an intermediate frequency or near-baseband frequency) or to baseband. In one embodiment of a set-top box, the RF section and its associated input processing elements receive RF signals transmitted over a wired (e.g., cable) medium and perform frequency selection by filtering, downconverting, and re-filtering to a desired frequency band. Various embodiments rearrange the order of the above-described (and other) elements, remove some of these elements, and / or add other elements that perform similar or different functions. Adding elements may include inserting elements between existing elements, such as inserting amplifiers and analog-to-digital converters. In various embodiments, the RF section includes an antenna.

[0066] Additionally, the USB and / or HDMI terminals may include respective interface processors for connecting system 1000 to other electronic devices over USB and / or HDMI connections. It should be understood that various aspects of the input processing, e.g., Reed-Solomon error correction, may be implemented, for example, in a separate input processing IC or within processor 1010, as desired. Similarly, aspects of the USB or HDMI interface processing may be implemented, for example, in a separate interface IC or within processor 1010, as desired. The demodulated, error corrected, and demultiplexed stream is provided to various processing elements, including, for example, processor 1010 and an encoder / decoder 1030, which operates in combination with memory and storage elements to process the data stream as required for presentation on an output device.

[0067] The various elements of system 1000 may be provided within a unitary housing in which the various elements may be interconnected and transmit data between each other using any suitable connection arrangement, e.g., internal buses known in the art, including an Inter-IC (I2C) bus, wiring, and printed circuit boards.

[0068] The system 1000 includes a communication interface 1050 that enables communication with other devices over a communication channel 1060. The communication interface 1050 may include, but is not limited to, a transceiver configured to transmit and receive data over the communication channel 1060. The communication interface 1050 may include, but is not limited to, a modem or a network card, and the communication channel 1060 may be implemented in a wired and / or wireless medium, for example.

[0069] In various embodiments, data is streamed or otherwise provided to system 1000 using a wireless network such as a Wi-Fi network, e.g., IEEE 802.11 (IEEE refers to the Institute of Electrical and Electronics Engineers). The Wi-Fi signal in these embodiments is received via communication channel 1060 and communication interface 1050 adapted for Wi-Fi communication. Communication channel 1060 in these embodiments is typically connected to an access point or router that provides access to external networks, including the Internet, to enable streaming applications and other over-the-top communications. In other embodiments, streaming data is provided to system 1000 using a set-top box that delivers data via an HDMI connection in input block 1130. In yet other embodiments, streaming data is provided to system 1000 using an RF connection in input block 1130. As noted above, various embodiments provide data in a manner other than streaming. Additionally, various embodiments use wireless networks other than Wi-Fi, such as a cellular network or a Bluetooth network.

[0070] The system 1000 can provide output signals to various output devices, including a display 1100, speakers 1110, and other peripheral devices 1120. The display 1100 of various embodiments includes, for example, one or more of a touchscreen display, an organic light-emitting diode (OLED) display, a curved display, and / or a foldable display. The display 1100 can be for a television, a tablet, a laptop, a mobile phone, or other device. The display 1100 can also be integrated into other components (e.g., as in a smartphone) or separate (e.g., an external monitor for a laptop). The other peripheral devices 1120, in various example embodiments, include one or more of a standalone digital video disc (or digital versatile disc) (DVR, or digital versatile disc, as an abbreviation for both terms), a disc player, a stereo system, and / or a lighting system. Various embodiments use one or more peripheral devices 1120 that provide functionality based on the output of the system 1000. For example, a disc player performs the function of playing the output of the system 1000.

[0071] In various embodiments, control signals are communicated between system 1000 and display 1100, speakers 1110, or other peripheral devices 1120 using signaling such as AV.Link, Consumer Electronics Control (CEC), or other communication protocols that allow control between devices with or without user intervention. Output devices can be communicatively coupled to system 1000 via dedicated connections through respective interfaces 1070, 1080, and 1090. Alternatively, output devices can connect to system 1000 using communication channel 1060 via communication interface 1050. Display 1100 and speakers 1110 can be integrated into a single unit with other components of system 1000 in an electronic device such as a television. In various embodiments, display interface 1070 includes a display driver, such as a timing controller (TCon) chip.

[0072] Alternatively, the display 1100 and speakers 1110 may alternatively be separate from one or more of the other components, for example, if the RF portion of the input 1130 is part of a separate set-top box. In various embodiments in which the display 1100 and speakers 1110 are external components, the output signal may be provided via a dedicated output connection, including, for example, an HDMI port, a USB port, or a COMP output.

[0073] The embodiments may be performed by computer software implemented by the processor 1010, by hardware, or by a combination of hardware and software. As a non-limiting example, the embodiments may be implemented by one or more integrated circuits. The memory 1020 may be of any type suitable for the technology environment and may be implemented using any suitable data storage technology, such as, by way of non-limiting examples, optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory, and removable memory. The processor 1010 may be of any type suitable for the technology environment and may include, by way of non-limiting examples, one or more of a microprocessor, a general-purpose computer, a special-purpose computer, and a processor based on a multi-core architecture.

[0074] Various implementations include decoding. As used herein, "decoding" can encompass all or part of the processing performed on a received encoded sequence to generate a final output suitable for display, for example. In various embodiments, such processing includes one or more of the processing typically performed by a decoder, such as entropy decoding, inverse quantization, inverse transform, and differential decoding. In various embodiments, such processes also or alternatively include the processes performed by the decoders of the various implementations described herein.

[0075] As a further example, in one embodiment, "decoding" refers only to entropy decoding, in another embodiment, "decoding" refers only to differential decoding, and in another embodiment, "decoding" refers to a combination of entropy decoding and differential decoding. Whether the phrase "decoding process" is intended to refer specifically to a subset of operations or to refer generally to a broader decoding process will be clear based on the context of the particular description and is believed to be well understood by those skilled in the art.

[0076] Various implementations include encoding. As used herein, "encoding," similar to the above description of "decoding," can encompass all or part of the processing performed on an input video sequence to generate an encoded bitstream. In various embodiments, such processing includes one or more of the processing typically performed by an encoder, such as, for example, segmentation, differential encoding, transform, quantization, and entropy encoding. In various embodiments, such processes also or alternatively include the processes performed by the encoders of the various implementations described herein.

[0077] As a further example, in one embodiment, "encoding" refers only to entropy encoding, in another embodiment, "encoding" refers only to differential encoding, and in another embodiment, "encoding" refers to a combination of differential and entropy encoding. Whether the phrase "encoding process" is intended to refer specifically to a subset of operations or to refer generally to a broader encoding process will be clear based on the context of a particular description and is believed to be well understood by those skilled in the art.

[0078] It should be noted that the syntax elements used herein are descriptive terms and therefore do not exclude the use of other syntax element names.

[0079] Where a figure is presented as a flowchart, it should be understood that the figure also provides a block diagram of the corresponding apparatus. Similarly, where a figure is presented as a block diagram, it should be understood that the figure also provides a flowchart of the corresponding method / process.

[0080] Various embodiments may relate to parametric models or rate-distortion optimization. In particular, during the encoding process, the balance or trade-off between rate and distortion is typically considered, often subject to computational complexity constraints. This can be measured by a rate-distortion optimization (RDO) metric or by least mean squares (LMS), mean absolute error (MAE), or other such measures. Rate-distortion optimization is typically formulated to minimize a rate-distortion function, which is a weighted sum of rate and distortion. There are different approaches to solving the rate-distortion optimization problem. For example, these approaches may be based on extensive testing of all coding options, including all considered modes or coding parameter values, with a thorough evaluation of their coding costs and the associated distortion of the reconstructed signal after encoding and decoding. Also, to reduce coding complexity, faster approaches may be used, particularly calculation of approximate distortion based on a prediction or prediction residual signal rather than the reconstructed signal. These two approaches may also be used in combination, e.g., using approximate distortion for only some of the possible coding options and full distortion for others. Other approaches evaluate only a subset of the possible coding options. More generally, many approaches employ any of a variety of techniques to perform optimization, but the optimization is not necessarily a complete assessment of both the coding cost and the associated distortion.

[0081] Implementations and aspects described herein may be implemented in, for example, a method or process, an apparatus, a software program, a data stream, or a signal. Even if discussed only in the context of a single type of implementation (e.g., discussed only as a method), the implementation of the discussed feature may also be implemented in other forms (e.g., an apparatus or a program). An apparatus may be implemented in, for example, appropriate hardware, software, and firmware. The method may be implemented in a processor, which generally refers to a processing device, including, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. Processors also include, for example, communication devices such as computers, mobile phones, handheld / personal digital assistants ("PDAs"), and other devices that facilitate communication of information between end users.

[0082] References to "one embodiment" or "embodiment" or "one implementation" or "implementation," as well as other variations thereof, mean that a particular feature, structure, characteristic, etc. described in connection with an embodiment is included in at least one embodiment. Thus, appearances of the phrases "in one embodiment" or "in an embodiment" or "in one implementation" or "in an implementation" appearing in various places throughout this specification, as well as any other variations thereof, do not necessarily all refer to the same embodiment.

[0083] Additionally, the application may refer to "determining" various information. Determining information may include, for example, one or more of estimating information, calculating information, predicting information, or retrieving information from memory.

[0084] Additionally, the application may refer to "accessing" various information. Accessing information may include, for example, one or more of receiving information, retrieving information (e.g., from a memory), storing information, moving information, copying information, calculating information, determining information, predicting information, or estimating information.

[0085] Additionally, the application may refer to "receiving" various information. Receiving, like "accessing," is intended to be a broad term. Receiving information may include, for example, one or more of accessing information or retrieving information (e.g., from a memory). Furthermore, "receiving" generally involves in some way, for example, storing information, processing information, transmitting information, moving information, copying information, erasing information, calculating information, determining information, predicting information, or estimating information.

[0086] For example, in the case of "A / B," "A and / or B," and "at least one of A and B," it should be understood that the use of any of the following " / ," "and / or," and "at least one of" is intended to encompass selection of only the first listed alternative (A), or selection of only the second listed alternative (B), or selection of both alternatives (A and B). As a further example, in the case of "A, B, and / or C" and "at least one of A, B, and C," such phrases are intended to encompass selection of only the first listed alternative (A), or selection of only the second listed alternative (B), or selection of only the third listed alternative (C), or selection of only the first and second listed alternatives (A and B), or selection of only the first and third listed alternatives (A and C), or selection of only the second and third listed alternatives (B and C), or selection of all three alternatives (A and B and C). This can be expanded as many times as the number of listed items, as would be apparent to one of ordinary skill in the art and related arts.

[0087] Also, as used herein, the term "signaling" specifically refers to indicating something to a corresponding decoder. For example, in certain embodiments, an encoder signals a specific one of multiple transforms, coding modes, or flags. Thus, in some embodiments, the same transform, parameter, or mode is used at both the encoder and decoder sides. Thus, for example, an encoder can transmit specific parameters to a decoder (explicit signaling) so that the decoder can use the same specific parameters. Conversely, if the decoder already has the specific parameters and other parameters, it can use signaling without transmission (implicit signaling) to simply allow the decoder to recognize and select the specific parameters. By avoiding the transmission of any actual capabilities, bit savings are realized in various embodiments. It should be understood that signaling can be achieved in various manners. For example, one or more syntax elements, flags, etc. are used to signal information to a corresponding decoder in various embodiments. Although the above refers to the verb form of the word "signal," the word "signal" may also be used herein as a noun.

[0088] As will be apparent to those skilled in the art, implementations can generate a variety of signals formatted to carry information that can be, for example, stored or transmitted. Information can include, for example, instructions for performing a method or data generated by one of the described implementations. For example, a signal can be formatted to carry a bitstream of the described embodiments. Such a signal can be formatted, for example, as an electromagnetic wave (e.g., using the radio frequency portion of the spectrum) or as a baseband signal. Formatting can include, for example, encoding a data stream and modulating a carrier with the encoded data stream. The information carried by the signal can be, for example, analog or digital information. The signal can be transmitted over a variety of different wired or wireless links, as is known. The signal can be stored on a processor-readable medium.

[0089] The inventors have described several embodiments across various claim categories and types. The features of these embodiments may be provided alone or in any combination. Furthermore, the embodiments may include one or more of the following features, devices, or aspects across various claim categories and types, alone or in combination: A process or device for encoding or decoding video data using a syntax that disables local chroma quantization parameter control.

[0090] A process or device for encoding or decoding video data using a syntax that disables local chroma quantization parameter control, wherein the local chroma quantization parameter control is controlled by a local luma quantization parameter. A process or device for encoding or decoding video data using a syntax that disables local chroma quantization parameter control, where the local chroma quantization parameter control is controlled by a separate syntax that is different from the local luma quantization parameter control. One of the above processes or devices according to the HEVC or VVC video standard. A bitstream or signal containing one or more of the listed syntax elements or variations thereof. A bitstream or signal containing syntax carrying information produced by any of the described embodiments. · Generating and / or transmitting and / or receiving and / or decoding according to any of the described embodiments. A method, process, apparatus, instruction storage medium, data storage medium, or signal according to any of the described embodiments. Inserting signaling syntax elements that allow the decoder to determine the coding mode in a manner that corresponds to the method used by the encoder. Creating and / or transmitting and / or receiving and / or decoding a bitstream or signal that includes one or more of the described syntax elements or variations thereof. A television, set-top box, mobile phone, tablet, or other electronic device that performs the conversion method according to any of the described embodiments. A television, set-top box, mobile phone, tablet, or other electronic device that performs the conversion method determination according to any of the described embodiments and displays the resulting image (e.g., using a monitor, screen, or other type of display). A television, set-top box, mobile phone, tablet, or other electronic device that selects, bandlimits, or tunes a channel (e.g., using a tuner) to receive a signal containing an encoded image and performs a conversion method according to any of the described embodiments. A television, set-top box, mobile phone, tablet, or other electronic device that receives a signal containing an encoded image wirelessly (e.g., using an antenna) and performs the described conversion method.

Claims

1. 1. A method comprising: quantizing at least one video block based on at least one quantization parameter used for chroma quantization; encoding the quantized at least one video block and syntax indicating the at least one quantization parameter; Including, A method wherein the syntax includes a flag for disabling local chroma quantization parameter control, the flag being no_chroma_qp_offset_constraint_flag.

2. 1. An apparatus comprising:

1. A processor, comprising: quantizing at least one video block based on at least one quantization parameter used for chroma quantization; encoding the quantized at least one video block and syntax indicating the at least one quantization parameter; a processor configured to execute The apparatus, wherein the syntax includes a flag for disabling local chroma quantization parameter control, the flag being no_chroma_qp_offset_constraint_flag.

3. 1. A method comprising: Parsing the video bitstream for syntax used to control at least one quantization parameter used for chroma quantization of at least one coded video block; decoding the at least one video block using the at least one quantization parameter based on the syntax; and Including, A method wherein the syntax includes a flag for disabling local chroma quantization parameter control, the flag being no_chroma_qp_offset_constraint_flag.

4. 1. An apparatus comprising:

1. A processor, comprising: Parsing the video bitstream for syntax used to control at least one quantization parameter used for chroma quantization of at least one coded video block; decoding the at least one video block using the at least one quantization parameter based on the syntax; and a processor configured to execute The apparatus, wherein the syntax includes a flag for disabling local chroma quantization parameter control, the flag being no_chroma_qp_offset_constraint_flag.

5. The method of claim 1 or claim 3, wherein the syntax includes at least one flag for disabling local luma quantization parameter control.

6. The apparatus of claim 2 or claim 4, wherein the syntax includes at least one flag for disabling local luma quantization parameter control.

7. The at least one flag for disabling local luma quantization parameter control includes a no_qp_delta_constraint_flag; 6. The method of claim 5, wherein no_qp_delta_constraint_flag equal to 1 specifies that cu_qp_delta_enabled_flag equal to 0 is a bitstream conformance requirement, and no_qp_delta_constraint_flag equal to 0 imposes no such constraint.

8. The at least one flag for disabling local luma quantization parameter control includes a no_qp_delta_constraint_flag; 7. The apparatus of claim 6, wherein no_qp_delta_constraint_flag equal to 1 specifies that cu_qp_delta_enabled_flag equal to 0 is a bitstream conformance requirement, and no_qp_delta_constraint_flag equal to 0 imposes no such constraint.

9. A method as described in claim 1 or claim 3, wherein no_qp_delta_constraint_flag equal to 1 specifies that pps_cu_chroma_qp_offset_list_enabled_flag equal to 0 is a requirement for bitstream conformance, and no_qp_delta_constraint_flag equal to 0 does not impose such a constraint.

10. The apparatus of claim 2 or claim 4, wherein no_qp_delta_constraint_flag equal to 1 specifies that pps_cu_chroma_qp_offset_list_enabled_flag equal to 0 is a requirement for bitstream conformance, and no_qp_delta_constraint_flag equal to 0 imposes no such constraint.

11. 10. The method of claim 1, wherein the syntax corresponds to the High Efficiency Video Coding H.265 standard.

12. The apparatus of claim 2, 4, 6, 8, or 10, wherein the syntax corresponds to the High Efficiency Video Coding H.265 standard.

13. The method of claim 1, wherein the syntax corresponds to the H.266 standard for versatile video coding.

14. The apparatus of claim 2, 4, 6, 8, or 10, wherein the syntax corresponds to the H.266 standard for versatile video coding.

15. The method of claim 1 , 3, 5, 7, or 9, wherein the syntax is used for luma quantization control.

16. The apparatus of claim 2, 4, 6, 8, or 10, wherein the syntax is used for luma quantization control.

17. A device, A device according to any one of claims 2, 4, 6, 8 and 10; 1. A device comprising: (i) an antenna configured to receive a signal, the signal including a video block; (ii) a band limiter configured to limit the received signal to a frequency band including the video block; and (iii) a display configured to display an output representing the video block.

18. A computer program comprising instructions which, when executed by a computer, cause the computer to carry out the method of any one of claims 1, 3, 5, 7 and 9.

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