Driving circuit and display panel

Abstract

This application discloses a driving circuit and a display panel 100. The driving circuit includes a light emitting module 10, a switching module 20 having an output terminal connected to the light emitting module 10, a data driving module 30 having an output terminal connected to an input terminal of the switching module 20, a protection module 40 having an output terminal connected to the data driving module 30, and a compensation module 50 having an output terminal connected to an output terminal of the data driving module 30 and an input terminal of the switching module 20.

Description

[Technical Field]

[0001] (CROSS-REFERENCE TO RELATED APPLICATIONS) This application claims priority from a Chinese patent application filed on August 29, 2022, bearing application number 202211046534.9, the entire contents of which are incorporated herein by reference.

[0002] The present application relates to the technical field of displays, and in particular to driving circuits and display panels. [Background technology]

[0003] In the prior art, a display panel typically supplies a data driving voltage to each micro LED (light-emitting diode) in the panel via a data line.

[0004] However, the data lines themselves have electrical resistance, and the lengths of the connecting lines between the data lines and different points on the display panel are different, so the electrical resistance also varies. This inevitably leads to different data driving voltages reaching the display panel from the data lines, resulting in color shifts and uneven brightness in the light emitted by the micro LED. Furthermore, the larger the display panel, the greater the loss caused by the data lines. If the data lines are too long, the large impedance loss will inevitably result in inaccurate data driving voltages, which will cause the light emission brightness and color to fall short of the target values, and even cause uneven image quality on the display panel.

[0005] The preceding merely provides background information related to the present application and may not necessarily constitute prior art. Summary of the Invention [Problem to be solved by the invention]

[0006] The main purpose of the present application is to provide a driving circuit and a display panel for solving the technical problem of how to compensate the data driving voltage of the data line to avoid image quality variations in the display panel. [Means for solving the problem]

[0007] In order to achieve the above object, the present application provides a driving circuit, The drive circuit a light-emitting module; a switching module having an output terminal connected to the light-emitting module, receiving a first scanning signal, and configured to switch between an on state and an off state under the control of the first scanning signal; a data driving module having an output terminal connected to the input terminal of the switching module, receiving a data driving voltage and the first scanning signal, and configured to transmit the data driving voltage to the light-emitting module through the switching module under the control of the first scanning signal; a protection module having an output terminal connected to the data driving module, receiving a second scanning signal, and configured to prevent the data driving module from outputting a data driving voltage to the light-emitting module under the control of the second scanning signal; a compensation module having an output terminal connected to the output terminal of the data driving module and the input terminal of the switching module, configured to input a reference voltage and a third scanning signal, and configured to transmit the reference voltage to the data driving module under the control of the third scanning signal.

[0008] Furthermore, to achieve the above object, the present application further provides a display panel including the above driving circuit. (beneficial effects)

[0009] This application proposes a driving circuit and a display panel. The driving circuit adopts a 5T1C structure, and by combining a switching module, a data driving module, a protection module, and a compensation module, it effectively compensates for the data driving voltage received by each micro LED in the display panel. This ensures that the data driving voltage of each micro LED in the display panel is uniform, ensuring that the luminance and color of the light emission all reach the target values, thereby avoiding the occurrence of uneven image quality on the display panel. This overcomes the technical problem of the prior art, where different data driving voltages from the data lines reach different positions on the display panel, resulting in color deviation and uneven brightness when each micro LED in the display panel emits light.

[0010] In order to more clearly explain the technical solutions of the embodiments of the present application and the prior art, the following briefly introduces the accompanying drawings required for the description of the embodiments or the prior art. It is clear that the accompanying drawings in the following description are only some of the embodiments of the present application, and those skilled in the art can obtain other accompanying drawings from the structures shown in these accompanying drawings without creative work. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a schematic diagram of a functional module of an embodiment of a driving circuit of the present invention; [Figure 2] 1 is a schematic diagram of a circuit configuration of an embodiment of a drive circuit of the present invention; [Figure 3] 1 is a schematic diagram of a section of a display panel according to an embodiment of a driving circuit of the present application; [Figure 4] 1 is a structural schematic diagram of a display panel according to an embodiment of the present application; DETAILED DESCRIPTION OF THE INVENTION

[0012] The realization of the object, function features and advantages of the present invention will be further explained in combination with the embodiments with reference to the accompanying drawings.

[0013] It should be understood that the specific examples described herein are used only to interpret the present application, and are not used to limit the present application.

[0014] An embodiment of the present application provides a driving circuit, and reference is made to FIG. 1, which is a functional module schematic diagram of one embodiment of the driving circuit of the present application.

[0015] In this embodiment, the driving circuit includes: a light emitting module 10; a switching module 20 having an output terminal connected to the light-emitting module 10, configured to receive a first scanning signal Scan1 and switch between an on state and an off state under the control of the first scanning signal Scan1; a data driving module 30, the output terminal of which is connected to the input terminal of the switching module 20, configured to receive a data driving voltage Vdata and the first scanning signal Scan1, and transmit the data driving voltage Vdata to the light emitting module 10 through the switching module 20 under the control of the first scanning signal Scan1; a protection module 40 having an output terminal connected to the data driving module 30, the protection module 40 receiving a second scanning signal Scan2 and configured to prevent the data driving module 30 from outputting a data driving voltage Vdata to the light emitting module 10 under the control of the second scanning signal Scan2; a compensation module 50 having an output terminal connected to the output terminal of the data driving module 30 and the input terminal of the switching module 20, the compensation module 50 receiving a reference voltage VREF and a third scanning signal Scan3, and configured to transmit the reference voltage VREF to the data driving module 30 under the control of the third scanning signal Scan3.

[0016] The driving circuit provided in this embodiment is configured according to the number of micro LEDs in the display panel 100. That is, each micro LED has its corresponding driving circuit, and the data driving voltage Vdata is supplied from the data line, and the reference voltage VREF is supplied from the register of the control chip.

[0017] Furthermore, please refer to FIG. 2, which is a schematic diagram of the circuit configuration of one embodiment of the driving circuit of the present invention.

[0018] The transistors used in all examples herein may be TFTs (Thin Film Transistors), field-effect transistors, or other elements with the same characteristics. Since the source and drain of the transistors used herein are symmetrical, the source and drain may be interchanged. In the examples herein, to distinguish between the two poles of the transistor other than the gate, one pole is referred to as the source and the other pole is referred to as the drain. The transistors used in the examples herein may include two types: P-type transistors that turn on when the gate is at a low level and off when the gate is at a high level, and N-type transistors that turn on when the gate is at a high level and off when the gate is at a low level. Since the source and drain of P-type and N-type transistors are reversed, in the examples herein, the two terminals other than the gate of each transistor are all named as input terminals and output terminals, and the specific source and drain are determined depending on whether the transistor is P-type or N-type. 2, the port characteristics of the first transistor T1 can be identified from the symbols G, D, and S in the figure, where G is the gate of T1, S is the source of T1, and D is the drain of T1. The remaining transistors may be defined based on the start of signal generation so that the intermediate terminal of each transistor is the gate, the signal input terminal is the source or drain, and the signal output terminal is the drain or source corresponding to the signal input terminal.

[0019] As shown in FIG. 2, in some possible embodiments, the light emitting module 10 includes a first transistor T1 and a light emitting element Micro LED; The first transistor T1 has a gate connected to the output terminal of the switching module 20, a source connected to the anode terminal of the light emitting element Micro LED, and a drain receiving the first power supply voltage VDD; A second power supply voltage VSS is input to the cathode terminal of the light emitting element Micro LED.

[0020] In some embodiments, the light-emitting element Micro LED may be a micro light-emitting diode, that is, the embodiment of the present application uses a driving circuit with a 5T1C structure to effectively compensate the threshold voltage of the first transistor T1 corresponding to each light-emitting element Micro LED in the display panel 100, which reduces the number of components used, has a simple and stable structure, and reduces costs.

[0021] In some embodiments, the first power supply voltage VDD and the second power supply voltage VSS may be supplied from an external power supply connected to the drive circuit. The first power supply voltage VDD and the second power supply voltage VSS are each configured to output a single preset voltage value. In some embodiments, the output voltage value of the first power supply voltage VDD is greater than the output voltage value of the second power supply voltage VSS.

[0022] Furthermore, in some possible embodiments, the switching module 20 includes a second transistor T2, The second transistor T2 has a gate to which the first scanning signal Scan1 is input, an input terminal electrically connected to a second node B which is the connection point of the switching module 20, the data driving module 30 and the compensation module 50, and an output terminal connected to the gate of the third transistor T3.

[0023] Furthermore, in some possible embodiments, the data driving module 30 may: a third transistor T3, the gate of which receives the first scanning signal Scan1, the input terminal of which receives the data driving voltage Vdata, and the output terminal of which is electrically connected to a first node A, which is a connection point between the data driving module 30 and the protection module 40; a capacitor C having a first terminal electrically connected to the first node A and a second terminal electrically connected to the second node B;

[0024] Furthermore, in some possible embodiments, the protection module 40 may include: The fourth transistor T4 has a gate to which the second scan signal Scan2 is input, an input terminal electrically connected to the first node A, and an output terminal grounded.

[0025] Furthermore, in some possible embodiments, the compensation module 50 may include: The fifth transistor T5 has a gate to which the third scan signal Scan3 is input, an input terminal to which the reference voltage VREF N is input, and an output terminal electrically connected to the second node B.

[0026] Furthermore, in some possible embodiments, the first scanning signal Scan1, the second scanning signal Scan2 and the third scanning signal Scan3 may be supplied by external scanning lines connected to the driving circuit from an external timing controller.

[0027] Furthermore, in some possible embodiments, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 may be low-temperature polysilicon thin-film transistors, oxide semiconductor thin-film transistors, or amorphous silicon thin-film transistors. By using the same material for the transistors in the driving circuit provided in the embodiments of the present application, it is possible to avoid the difference between transistors made of different materials from affecting the driving circuit.

[0028] Furthermore, in some possible embodiments, when the first scanning signal Scan1 is at a low level and the second scanning signal Scan2 and the third scanning signal Scan3 are at a high level, the first transistor T1, the second transistor T2, and the third transistor T3 are turned off, the light-emitting element Micro LED is turned off and does not emit light, the fourth transistor T4 and the fifth transistor T5 are turned on, the first node A is grounded, the reference voltage VREF N is input to the second node B, and the capacitor C is charged based on the reference voltage VREF N.

[0029] When Scan1 is at a low level and Scan2 and Scan3 are at a high level, T1, T2, and T3 are off and T4 and T5 are on, so that one VREF voltage is written to point B to charge capacitor C, and the magnitude of the VREF voltage written to different partitioned areas of the display panel 100 is made different.

[0030] Furthermore, in some possible embodiments, when the first scanning signal Scan1 is at a high level and the second scanning signal Scan2 and the third scanning signal Scan3 are at a low level, the first transistor T1, the second transistor T2 and the third transistor T3 are all turned on, a compensation voltage obtained by superimposing the data driving signal on the reference voltage VREF N is input to the gate of the first transistor T1, the light emitting element Micro LED is turned on to emit light, and the fourth transistor T4 and the fifth transistor T5 are turned off.

[0031] In addition, when Scan1 is at a high level and Scan2 and Scan3 are at a low level, T2 and T3 are on and T4 and T5 are off, so the voltage at point G of T1 becomes Vg=Vdata+VREF, T1 is turned on, and the light-emitting element Micro LED is turned on and emits light.

[0032] Furthermore, in some possible embodiments, when the first scanning signal Scan1 and the third scanning signal Scan3 are at a low level and the second scanning signal Scan2 is at a high level, the first transistor T1, the second transistor T2, the third transistor T3 and the fifth transistor T5 are in a weakly on state due to high temperature, and the fourth transistor T4 cannot be turned on to cause the light-emitting element Micro LED to be in a weakly emitting state.

[0033] When the display panel 100 operates in a high-temperature environment, the TFT threshold voltage decreases, potentially causing all TFTs to enter a weakly ON state. This may result in the voltage Vdata from the data line reaching the TFT used to drive light, i.e., point G of T1 in the diagram. This may cause T1 to enter a weakly ON state, potentially allowing VDD current to enter the micro LED, causing it to emit weak light. However, in this embodiment, capacitors C and T4 are provided. Adjusting Scan2 to a high level in this case isolates T1 and T3, preventing the DC component of Vdata from entering point G of T1 and preventing the micro LED from entering a weakly emitting state.

[0034] Furthermore, when a display panel 100 is divided into N regions, as shown in FIG. 3, if the display panel 100 is divided into nine regions, the line lengths from the source line 101 (i.e., the data line) to each region are not the same, resulting in different electrical resistances. Furthermore, the larger the panel, the greater the difference in electrical resistance of the data lines, which inevitably leads to color shifts and uneven brightness in the display panel 100. Therefore, this embodiment provides a driving circuit that applies a precharge voltage VREF N (N is the region number) to the data lines, thereby solving the problem of different voltages due to different data line electrical resistances in different regions of the display panel 100. In practice, the magnitude of the voltage for each region of VREF N is manually adjusted via a register in a control chip to avoid a situation where compensation is not ideal due to differences between the theoretical value and the actual process. The more regions there are, the more ideal the adjustment effect becomes. Furthermore, the VREF N voltage only needs to be adjusted once per manufacturing process. At this time, the magnitude of the electrical resistance value of each region of the data line of the display panel 100 is determined, and the magnitude of the difference in electrical resistance value between the regions is also determined. Therefore, in this embodiment, there is no need for a very complicated control circuit that changes the magnitude of the reference voltage VREF N compensated for for each data line in the display panel 100 at any time.

[0035] Furthermore, an alternative solution can be proposed based on this embodiment. Namely, a segment compensation solution in which the VREF voltage is applied to all data on the driver. While this solution simplifies the architecture of the display panel 100, in terms of the driver, the voltage is applied to the data output by the driver, and it is not possible to increase the driver input. This is because the driver has few input pins and many output pins. Furthermore, a series of conversions must be performed from input to output to achieve the goal, which complicates debugging, makes the corresponding driver design difficult, and is costly. In contrast to this alternative solution, the solution proposed by this embodiment is one of the solutions of the present application. According to this embodiment, the data driving voltage Vdata and the voltage compensated by the reference voltage VREF are separated. The reference voltage VREF in this embodiment can be directly connected from the driver input to the output without the need for a series of conversions. Furthermore, the reference voltage VREF in this embodiment can be flexibly adjusted. Therefore, compared to the prior art, this embodiment is characterized by ease of implementation and low cost.

[0036] The driving circuit provided in this embodiment overcomes the technical problem in the prior art, in which different data driving voltages reaching different positions on the display panel 100 from the data lines cause color shift and brightness unevenness when each micro LED in the display panel 100 emits light. This driving circuit adopts a 5T1C structure, and by combining a switching module, a data driving module, a protection module, and a compensation module, effectively compensates for the data driving voltage received by each micro LED in the display panel 100. This ensures that the data driving voltage of each micro LED in the display panel 100 is uniform, allowing the emission brightness and color to all reach the target values, thereby avoiding the occurrence of uneven image quality in the display panel 100.

[0037] Furthermore, the embodiment of the present application further proposes a display panel 100 including the above driving circuit. Please refer to Fig. 4, which is a structural schematic diagram of the display panel 100 according to the embodiment of the present application.

[0038] As shown in FIG. 4, the display panel 100 may include a processor 1001, e.g., a central processing unit (CPU), a communication bus 1002, a user interface 1003, a network interface 1004, and a memory 1005. The communication bus 1002 is configured to enable connection and communication between these components. The user interface 1003 may include a display and an input means (e.g., a keyboard). Preferably, the user interface 1003 may further include a standard wired interface or a wireless interface. Alternatively, the network interface 1004 may include a standard wired interface or a wireless interface (e.g., a wireless fidelity (Wi-FI) interface). The memory 1005 may be a high-speed random access memory (RAM) or a stable non-volatile memory (NVM), such as a magnetic disk memory. Alternatively, the memory 1005 may be a storage device independent of the processor 1001.

[0039] Those skilled in the art will appreciate that the structure shown in FIG. 4 does not constitute a limitation on the display panel 100, and that the display panel 100 may include more or fewer components than those shown, or that some components may be combined or have different component arrangements.

[0040] As shown in FIG. 4, the memory 1005, which serves as a kind of storage medium, may include an operating system, a data storage module, a network communication module, a user interface module, and a computer program.

[0041] In the display panel 100 shown in FIG. 4, the network interface 1004 is mainly configured to perform data communication with other devices, and the user interface 1003 is mainly configured to exchange data with a user. The processor 1001 and memory 1005 in this embodiment may be installed within the display panel 100, and the display panel 100 controls the above-mentioned driving circuits by calling up a computer program stored in the memory 1005 using the processor 1001.

[0042] For each embodiment of the display panel 100, reference can be made to each embodiment of the driving circuit of the present application, and a description thereof will be omitted here.

[0043] As used herein, the terms "comprises," "including," or any other variation thereof, imply a non-exclusive inclusion such that a process, method, article, or system of a set of elements includes not only those elements but also other elements not expressly listed or inherent in such process, method, article, or system. In the absence of further limitations, elements defined by the phrase "comprises a..." do not exclude the presence of other identical elements in the process, method, article, or system that includes the element in question.

[0044] The numbers of the above examples of the present application are for illustrative purposes only and do not represent the superiority or inferiority of the examples.

[0045] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be realized by adding the necessary general-purpose hardware platform to software (of course, hardware is also possible, but in many cases the former is a better implementation method). Based on this understanding, the technical solution of the present application, in essence or in part contributing to the prior art, can be embodied in the form of a software product. The computer software product can be stored in the above-mentioned storage medium (e.g., ROM / RAM, magnetic disk, optical disk) and includes several instructions that cause a terminal device (which may be a mobile phone, computer, server, air conditioner, network device, etc.) to execute the methods described in each embodiment of the present application.

[0046] The above are only some examples of the present application, and do not limit the scope of protection of the present application. Any equivalent structure or equivalent flow conversion made by using the contents of the specification and drawings of the present application, or direct or indirect application to other related technical fields, are also included in the scope of protection of the present application for the same reason.

Claims

1. A drive circuit used in a display panel divided into a plurality of regions, a light-emitting module (10) including a first transistor (T1) and a light-emitting element; a switching module (20) including a second transistor (T2), an output terminal of which is connected to the light-emitting module (10), a first scanning signal (Scan1) being input thereto, and configured so that the second transistor (T2) is switched between an on state and an off state under the control of the first scanning signal (Scan1); a data driving module (30) whose output terminal is connected to the input terminal of the switching module (20), which receives a data driving voltage (Vdata) and the first scanning signal (Scan1), and which is configured to transmit the data driving voltage (Vdata) to the light emitting module (10) through the switching module (20) under the control of the first scanning signal (Scan1); a protection module (40) having an output terminal connected to the data driving module (30), receiving a second scanning signal (Scan2), and configured to prevent the data driving module (30) from outputting a data driving voltage (Vdata) to the light emitting module (10) under the control of the second scanning signal (Scan2); a compensation module (50) whose output terminal is connected to the output terminal of the data driving module (30) and the input terminal of the switching module (20), and which receives a reference voltage (VREF) and a third scanning signal (Scan3), and is configured to transmit the reference voltage (VREF) to the data driving module (30) under the control of the third scanning signal (Scan3); The second transistor (T2) has a gate to which the first scanning signal (Scan1) is input, an input terminal electrically connected to a second node which is a connection point of the switching module (20), the data driving module (30) and the compensation module (50), and an output terminal connected to the gate of the first transistor (T1); The data driven module (30) a third transistor (T3) having a gate to which the first scanning signal (Scan1) is input, an input terminal to which the data driving voltage (Vdata) is input, and an output terminal electrically connected to a first node (A) which is a connection point between the data driving module (30) and the protection module (40); a capacitor (C) having a first terminal electrically connected to the first node (A) and a second terminal electrically connected to the second node; The protection module (40) includes a fourth transistor (T4) having a gate to which the second scanning signal (Scan2) is input, an input terminal electrically connected to the first node (A), and an output terminal grounded; The reference voltage (VREF) written to different areas of the display panel has different magnitudes. Drive circuit.

2. The first transistor (T1) has a gate connected to the output terminal of the switching module (20), a source connected to the anode terminal of the light-emitting element, and a drain to which a first power supply voltage (VDD) is input; A second power supply voltage (VSS) is input to the cathode terminal of the light emitting element.

2. The drive circuit of claim 1.

3. The source and drain of the first transistor (T1) are symmetrical, the first transistor (T1) is a field effect transistor, and The light emitting device is a micro light emitting diode.

3. The drive circuit according to claim 2.

4. The first power supply voltage (VDD) and the second power supply voltage (VSS) are supplied from an external power supply connected to the drive circuit, and the output voltage value of the first power supply voltage (VDD) is greater than the output voltage value of the second power supply voltage (VSS).

3. The drive circuit according to claim 2.

5. the second transistor (T2) includes a P-type transistor and an N-type transistor; The P-type transistor is turned on when the gate is at a low level and turned off when the gate is at a high level; and The N-type transistor is turned on when the gate is at a high level and turned off when the gate is at a low level.

2. The drive circuit of claim 1.

6. The compensation module (50) a fifth transistor (T5) having a gate to which the third scan signal (Scan3) is input, an input terminal to which the reference voltage (VREF) is input, and an output terminal electrically connected to the second node; 2. The drive circuit of claim 1.

7. The first scanning signal (Scan1), the second scanning signal (Scan2), and the third scanning signal (Scan3) are configured to be supplied from an external timing controller via external scanning lines connected to the driving circuit.

7. The drive circuit according to claim 6.

8. The first transistor (T1), the second transistor (T2), the third transistor (T3), the fourth transistor (T4), and the fifth transistor (T5) are all oxide semiconductor thin film transistors.

7. The drive circuit according to claim 6.

9. When the first scanning signal (Scan1) is at a low level and the second scanning signal (Scan2) and the third scanning signal (Scan3) are at a high level, the first transistor (T1), the second transistor (T2), and the third transistor (T3) are turned off, the light-emitting element is turned off and does not emit light, the fourth transistor (T4) and the fifth transistor (T5) are turned on, the first node (A) is grounded, the reference voltage (VREF) is input to the second node, and the capacitor (C) is charged based on the reference voltage (VREF).

7. The drive circuit according to claim 6.

10. When the first scan signal (Scan1) is at a high level and the second scan signal (Scan2) and the third scan signal (Scan3) are at a low level, the first transistor (T1), the second transistor (T2), and the third transistor (T3) are all turned on, a compensation voltage obtained by superimposing a data drive signal on the reference voltage (VREF) is input to the gate of the first transistor (T1), the light emitting element is turned on to emit light, and the fourth transistor (T4) and the fifth transistor (T5) are turned off.

10. The drive circuit of claim 9.

11. When the first scanning signal (Scan1) and the third scanning signal (Scan3) are at a low level and the second scanning signal (Scan2) is at a high level, the first transistor (T1), the second transistor (T2), the third transistor (T3), and the fifth transistor (T5) are in a weakly on state, and the fourth transistor (T4) is turned on, so that the light-emitting element cannot be in a weakly emitting state. The drive circuit of claim 10.

12. A display panel (100) including a driving circuit and divided into a plurality of regions, The drive circuit a light-emitting module (10) including a first transistor (T1) and a light-emitting element; a switching module (20) including a second transistor (T2), an output terminal of which is connected to the light-emitting module (10), a first scanning signal (Scan1) being input thereto, and configured so that the second transistor (T2) is switched between an on state and an off state under the control of the first scanning signal (Scan1); a data driving module (30) whose output terminal is connected to the input terminal of the switching module (20), which receives a data driving voltage (Vdata) and the first scanning signal (Scan1), and which is configured to transmit the data driving voltage (Vdata) to the light emitting module (10) through the switching module (20) under the control of the first scanning signal (Scan1); a protection module (40) having an output terminal connected to the data driving module (30), receiving a second scanning signal (Scan2), and configured to prevent the data driving module (30) from outputting a data driving voltage (Vdata) to the light emitting module (10) under the control of the second scanning signal (Scan2); a compensation module (50) whose output terminal is connected to the output terminal of the data driving module (30) and the input terminal of the switching module (20), and which receives a reference voltage (VREF) and a third scanning signal (Scan3), and is configured to transmit the reference voltage (VREF) to the data driving module (30) under the control of the third scanning signal (Scan3); The second transistor (T2) has a gate to which the first scanning signal (Scan1) is input, an input terminal electrically connected to a second node which is a connection point of the switching module (20), the data driving module (30) and the compensation module (50), and an output terminal connected to the gate of the first transistor (T1); The data driven module (30) a third transistor (T3) having a gate to which the first scanning signal (Scan1) is input, an input terminal to which the data driving voltage (Vdata) is input, and an output terminal electrically connected to a first node (A) which is a connection point between the data driving module (30) and the protection module (40); a capacitor (C) having a first terminal electrically connected to the first node (A) and a second terminal electrically connected to the second node; The protection module (40) includes a fourth transistor (T4) having a gate to which the second scanning signal (Scan2) is input, an input terminal electrically connected to the first node (A), and an output terminal grounded. The reference voltage (VREF) written to different areas of the display panel has different magnitudes. A display panel (100).

13. The first transistor (T1) has a gate connected to the output terminal of the switching module (20), a source connected to the anode terminal of the light-emitting element, and a drain to which a first power supply voltage (VDD) is input; A second power supply voltage (VSS) is input to the cathode terminal of the light emitting element. The display panel (100) of claim 12.

14. The compensation module (50) a fifth transistor (T5) having a gate to which the third scan signal (Scan3) is input, an input terminal to which the reference voltage (VREF) is input, and an output terminal electrically connected to the second node; The display panel (100) of claim 12.

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