Display device

Abstract

The present invention provides a display device which enables an increase in definition.　A display device according an embodiment of the present invention comprises: a substrate; and a display unit which includes a plurality of pixels arranged in a matrix along a first direction and a second direction intersecting the first direction. Each pixel includes a first subpixel including an organic layer of a first color, a second subpixel including an organic layer of a second color, and a third subpixel including an organic layer of a third color. Each subpixel has two overlap regions of overlap with subpixels adjacent in the first direction, and an effective region which contributes to the display of an image. In the first subpixels, neither of the two overlap regions is included in the effective region. In the second subpixels, one of the two overlap regions is included in the effective region and the other is not. In the third subpixels, both of the two overlap regions are included in the effective region.

Description

[Technical Field]

[0001] FIELD An embodiment of the present invention relates to a display device. [Background technology]

[0002] In recent years, display devices using organic light-emitting diodes (OLEDs) as display elements have been put to practical use. The display elements have an organic layer between a pixel electrode and a common electrode. The organic layer includes functional layers such as a hole transport layer and an electron transport layer in addition to the light-emitting layer.

[0003] While display devices using organic light-emitting diodes are becoming more and more practical, there is a problem with such display devices in that it is difficult to achieve high definition. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-69830 Summary of the Invention [Problem to be solved by the invention]

[0005] An object of the present disclosure is to provide a display device that can achieve high definition. [Means for solving the problem]

[0006] A display device according to an embodiment includes: The display device includes a substrate and a display unit including a plurality of pixels arranged in a matrix in a first direction and a second direction intersecting the first direction. Each pixel includes a first subpixel including an organic layer of a first color, a second subpixel including an organic layer of a second color, and a third subpixel including an organic layer of a third color. Each subpixel has two overlapping regions that overlap with adjacent subpixels in the first direction and an effective region that contributes to image display. In the first subpixel, neither of the two overlapping regions is included in the effective region. In the second subpixel, one of the two overlapping regions is included in the effective region and the other is not. In the third subpixel, both of the two overlapping regions are included in the effective region. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a display device according to an embodiment. [Figure 2] FIG. 2 is a plan view showing an example of the pixel shown in FIG. [Figure 3] FIG. 3 is a cross-sectional view showing a cross section of a plurality of sub-pixels taken along line AB shown in FIG. [Figure 4A] FIG. 4A is a schematic diagram illustrating a layer structure of the display element according to the embodiment. [Figure 4B] FIG. 4B is a schematic diagram illustrating the overlapping region according to the embodiment. [Figure 5A] FIG. 5A is a diagram for explaining each layer shown in FIG. 4A in more detail. [Figure 5B] FIG. 5B is a diagram for explaining each layer shown in FIG. 4B in more detail. [Figure 6] FIG. 6 is a cross-sectional view showing a cross section of a sub-pixel having a configuration according to a comparative example. [Figure 7] FIG. 7 is a cross-sectional view showing a cross section of a sub-pixel having a configuration according to a modified example. [Figure 8] FIG. 8 is a schematic diagram for explaining the overlapping region in the configuration according to the modified example. DETAILED DESCRIPTION OF THE INVENTION

[0008] Some embodiments will be described with reference to the drawings. The disclosure is merely an example, and appropriate modifications that a person skilled in the art can easily make while maintaining the gist of the invention are naturally included within the scope of the present invention. Furthermore, the drawings may be more schematic than the embodiments to clarify the description, but they are merely examples and do not limit the interpretation of the present invention. Furthermore, in this specification and each drawing, components that perform the same or similar functions as those described above with respect to the previous drawings are designated by the same reference numerals, and redundant detailed descriptions may be omitted.

[0009] In the drawings, mutually orthogonal X-, Y-, and Z-axes are shown as necessary to facilitate understanding. The direction along the X-axis is referred to as the X-direction or first direction, the direction along the Y-axis is referred to as the Y-direction or second direction, and the direction along the Z-axis is referred to as the Z-direction or third direction. The plane defined by the X-axis and Y-axis is referred to as the XY plane, and the plane defined by the X-axis and Z-axis is referred to as the XZ plane. Viewing the XY plane is referred to as planar view.

[0010] The display device DSP according to some embodiments is an organic electroluminescence display device having organic light-emitting diodes (OLEDs) as display elements, and is mounted on televisions, personal computers, mobile terminals, mobile phones, etc. The display elements described below can be applied as light-emitting elements in lighting devices, and the display device DSP can be diverted to other electronic devices such as lighting devices.

[0011] 1 is a diagram showing an example of the configuration of a display device DSP according to this embodiment. The display device DSP includes a display unit DA that displays an image on an insulating substrate 10. The substrate 10 may be glass or a flexible resin film.

[0012] The display unit DA includes a plurality of pixels PX arranged in a matrix in the first direction X and the second direction Y. Each pixel PX includes a plurality of subpixels SP1, SP2, and SP3. In one example, the pixel PX includes a red subpixel SP1 (first subpixel), a green subpixel SP2 (second subpixel), and a blue subpixel SP3 (third subpixel). Note that the pixel PX may include four or more subpixels, including subpixels of other colors such as white, in addition to the above three subpixels.

[0013] An example of the configuration of one sub-pixel SP included in a pixel PX will be briefly described. The subpixel SP includes a pixel circuit 1 and a display element 20 that is driven and controlled by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a drive transistor 3, and a capacitor 4. The pixel switch 2 and the drive transistor 3 are switch elements formed of, for example, thin film transistors (TFTs).

[0014] The pixel switch 2 has a gate electrode connected to a scanning line GL, a source electrode connected to a signal line SL, and a drain electrode connected to one electrode constituting the capacitor 4 and the gate electrode of the drive transistor 3. The drive transistor 3 has a source electrode connected to the other electrode constituting the capacitor 4 and a power supply line PL, and a drain electrode connected to the anode of the display element 20. The cathode of the display element 20 is connected to a power supply line FL. Note that the configuration of the pixel circuit 1 is not limited to the example shown in the figure.

[0015] The display element 20 is an organic light-emitting diode (OLED), which is a light-emitting element. For example, the subpixel SP1 includes a display element that emits light corresponding to a red wavelength, the subpixel SP2 includes a display element that emits light corresponding to a green wavelength, and the subpixel SP3 includes a display element that emits light corresponding to a blue wavelength. The pixel PX includes multiple subpixels SP1, SP2, and SP3 that display different colors, thereby achieving multicolor display.

[0016] However, the display elements 20 of the subpixels SP1, SP2, and SP3 may be configured to emit light of the same color, thereby achieving a monochromatic display.

[0017] Furthermore, when the display elements 20 of the subpixels SP1, SP2, and SP3 are configured to emit white light, color filters may be disposed facing the display elements 20. For example, the subpixel SP1 includes a red color filter facing the display element 20, the subpixel SP2 includes a green color filter facing the display element 20, and the subpixel SP3 includes a blue color filter facing the display element 20. This allows for multicolor display.

[0018] Alternatively, when the display elements 20 of the subpixels SP1, SP2, and SP3 are configured to emit ultraviolet light, a light conversion layer is disposed opposite the display elements 20, thereby realizing multicolor display.

[0019] The detailed configuration of the display element 20 will be described later.

[0020] FIG. 2 is a plan view showing an example of the pixel PX shown in FIG. The sub-pixels SP1, SP2, and SP3 that make up one pixel PX are each formed in a substantially rectangular shape extending in the second direction Y and aligned in the first direction X in the display section DA.

[0021] Each of the subpixels SP1, SP2, and SP3 includes an overlapping area A1 that overlaps with the subpixel SP adjacent to it in the first direction X, and an effective area A2 that contributes to displaying an image. In this embodiment, "contributing to displaying an image" means that light emitted from the display element 20 can be extracted to the outside.

[0022] Subpixel SP1 is located below subpixel SP2 in one overlapping region A1 where it overlaps with subpixel SP2, and is located below subpixel SP3 in the other overlapping region A1 where it overlaps with subpixel SP3. As will be described in detail later, in overlapping region A1, of the light emitted from the two overlapping subpixels SP, the light from the lower subpixel SP is reflected by the configuration of the upper subpixel SP and is not extracted as light that contributes to image display. For this reason, the two overlapping regions A1 are not included in the effective region A2 of subpixel SP1.

[0023] Subpixel SP2 is located above subpixel SP1 in one overlapping region A1 where it overlaps with subpixel SP1, and is located below subpixel SP3 in the other overlapping region A1 where it overlaps with subpixel SP3. Therefore, the effective region A2 of subpixel SP2 includes one overlapping region A1 where it overlaps with subpixel SP1, but does not include the other overlapping region A1 where it overlaps with subpixel SP3.

[0024] The subpixel SP3 is located above the subpixel SP1 in one overlapping region A1 where it overlaps with the subpixel SP1, and is located above the subpixel SP2 in the other overlapping region A1 where it overlaps with the subpixel SP2. Therefore, the effective region A2 of the subpixel SP3 includes two overlapping regions A1.

[0025] As described above, the effective areas A2 of the subpixels SP1, SP2, and SP3 are different from one another, with the subpixels SP3, SP2, and SP1 being larger in this order. By making the effective area A2 of the subpixel SP3 larger than the effective areas A2 of the subpixels SP1 and SP2, it is possible to extract more blue light, which generally has lower luminous efficiency than red light or green light. Furthermore, it is desirable for the size (area in the XY plane) of the subpixel SP3 to be larger than the subpixels SP1 and SP2 in order to extract more blue light, which has lower luminous efficiency.

[0026] The display elements 20 included in the subpixels SP1, SP2, and SP3 are connected to the pixel circuits 1 included in the subpixels SP1, SP2, and SP3 through the openings OP1. The openings OP1 are preferably formed so that the centers of the subpixels SP1, SP2, and SP3 coincide with the center of the openings OP1. This allows the light-emitting regions of the display elements 20 to be formed so as to expand from the centers of the subpixels SP1, SP2, and SP3. The size of the openings OP1 (area in the XY plane) is not limited to the size shown in the figure and may be any size, such as approximately the same size as the display elements 20.

[0027] 2 illustrates rectangular subpixels SP1, SP2, and SP3, but the shapes of the subpixels SP1, SP2, and SP3 are not limited to this, and the subpixels SP1, SP2, and SP3 may have any shape other than a rectangle, such as an arbitrary polygonal shape, a circular shape, an irregular shape, etc. Furthermore, the subpixels SP1, SP2, and SP3 may have shapes different from each other.

[0028] Fig. 3 is a cross-sectional view showing a cross section of multiple subpixels SP taken along line AB shown in Fig. 2. Note that the subpixels SP1, SP2, and SP3 shown in Fig. 3 have the same configuration except that the light-emitting layers emit different colors of light, which will be described later. Therefore, the configuration of one subpixel SP will be described below first as an example.

[0029] The pixel circuit 1 shown in Fig. 1 is disposed on a substrate 10 and covered with an insulating layer 11. Fig. 3 shows a simplified view of only the drive transistor 3 included in the pixel circuit 1. The insulating layer 11 corresponds to a base layer of the display element 20, and is formed of an insulating material such as polyimide, acrylic resin, silicon nitride (SiN), or silicon oxide (SiO).

[0030] The display element 20 includes a lower electrode E1, an organic layer OR, and an upper electrode E2. The organic layer OR is disposed between the lower electrode E1 and the upper electrode E2.

[0031] The lower electrode E1 is an electrode disposed for each sub-pixel or each display element, and is electrically connected to the drive transistor 3. Such a lower electrode E1 may be called a pixel electrode, a reflective electrode, an anode, or the like.

[0032] The upper electrode E2 is an electrode disposed across multiple sub-pixels or multiple display elements, and is electrically connected to the power supply line FL. Such an upper electrode E2 may also be called a common electrode, a counter electrode, a cathode, etc.

[0033] The lower electrode E1 is disposed on the insulating layer 11 and is connected to the driving transistor 3 through an opening OP1 formed in the insulating layer 11. The opening OP1 is a through-hole that is formed in a region overlapping with the driving transistor 3 and penetrates the insulating layer 11 to the driving transistor 3.

[0034] The lower electrode E1 is a transparent electrode formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The lower electrode E1 may be a metal electrode formed of a metal material such as silver (Ag), aluminum (Al), titanium (Ti), molybdenum (Mo), or tungsten (W). The lower electrode E1 may also be a laminate of a transparent electrode and a metal electrode. For example, the lower electrode E1 may be configured as a laminate in which a transparent electrode, a metal electrode, and a transparent electrode are laminated in this order, or may be configured as a laminate of three or more layers.

[0035] The organic layer OR includes a first functional layer F1, an emitting layer EL, and a second functional layer F2. The second functional layer F2 further includes a specific functional layer F21 arranged for each subpixel or display element, and a common functional layer F22 arranged across multiple subpixels or multiple display elements. The first functional layer F1, the emitting layer EL, the specific functional layer F21, and the common functional layer F22 are stacked in this order from the side of the lower electrode E1.

[0036] The first functional layer F1 is disposed between the lower electrode E1 and the light-emitting layer EL. The light-emitting layer EL is disposed between the first functional layer F1 and the specific functional layer F21. The light-emitting layer EL emits light of any one of red, green, and blue colors. The specific functional layer F21 is disposed between the light-emitting layer EL and the common functional layer F22. The common functional layer F22 is disposed between the specific functional layer F21 and the upper electrode E2.

[0037] As will be described in detail later, each of the first functional layer F1 and the specific functional layer F21 and common functional layer F22 included in the second functional layer F2 is not limited to a single layer, but may be a laminate of multiple layers. In this case, the lower layers may be formed smaller, and the lower layers may be covered by upper layers that are located above the lower layers. In addition, some of the functional layers included in the first functional layer F1, the specific functional layer F21, and the common functional layer F22 may be omitted.

[0038] The upper electrode E2 covers the organic layer OR. The upper electrode E2 is a common layer shared by multiple sub-pixels or multiple display elements. The upper electrode E2 is a transparent electrode made of a transparent conductive material such as ITO or IZO. The upper electrode E2 may also be a semi-transparent metal electrode made of a metal material such as magnesium (Mg), silver (Ag), or aluminum (Al). The upper electrode E2 is electrically connected to a power supply line FL arranged in the display section DA or a power supply line FL arranged outside the display section DA.

[0039] When the potential of the lower electrode E1 is relatively higher than that of the upper electrode E2, the lower electrode E1 corresponds to the anode and the upper electrode E2 corresponds to the cathode. When the potential of the upper electrode E2 is relatively higher than that of the lower electrode E1, the upper electrode E2 corresponds to the anode and the lower electrode E1 corresponds to the cathode. In this embodiment, as an example, it is assumed that the lower electrode E1 corresponds to the anode and the upper electrode E2 corresponds to the cathode.

[0040] According to the configuration shown in Figure 3, the light-emitting region of the display element 20 can be formed in the area where the organic layer OR is located between the lower electrode E1 arranged in the opening OP1 and the upper electrode E2 arranged as a common layer.

[0041] In the configuration according to this embodiment shown in FIG. 3, each of the subpixels SP1, SP2, and SP3 has an overlapping region A1 that overlaps with the adjacent subpixel SP. The subpixel SP1 is disposed below the adjacent subpixels SP2 and SP3 in the two overlapping regions A1 located at both ends. As a result, light emitted from the subpixel SP1 that exits through the overlapping region A1 is reflected by the lower electrodes E1 of the subpixels SP2 and SP3 located above it and is not extracted to the outside as light that contributes to image display. In other words, the effective region A2 of the subpixel SP1 corresponds to the light-emitting region of the subpixel SP1 excluding the two overlapping regions A1.

[0042] The subpixel SP2 is arranged above the subpixel SP1 in the overlapping region A1 that overlaps with the subpixel SP1, one of the two overlapping regions A1 located at both ends. On the other hand, the subpixel SP2 is arranged below the subpixel SP3 in the overlapping region A1 that overlaps with the subpixel SP3, one of the two overlapping regions A1 located at both ends. As a result, light emitted from the overlapping region A1 that overlaps with the subpixel SP3 is reflected by the lower electrode E1 of the subpixel SP3 located above and is not extracted to the outside as light that contributes to image display. In other words, the effective region A2 of the subpixel SP2 corresponds to the light-emitting region of the subpixel SP2 excluding the overlapping region A1 that overlaps with the subpixel SP3.

[0043] The subpixel SP3 is disposed above the adjacent subpixels SP1 and SP2 in the two overlapping regions A1 located at both ends. As a result, there are no subpixels SP located above the subpixel SP3, and therefore all of the light emitted from the subpixel SP3 is extracted to the outside as light that contributes to image display. In other words, the effective region A2 of the subpixel SP3 corresponds to the light-emitting region of the subpixel SP3.

[0044] 3, the periphery of the lower electrode E1 of each of the subpixels SP1, SP2, and SP3 is covered with the organic layer OR, which prevents the lower electrode E1 and the upper electrode E2 from coming into contact with each other and causing a short circuit.

[0045] 4A is a schematic diagram illustrating the layer structure of the display element 20. As described above, the display element 20 has a structure in which a lower electrode E1, a first functional layer F1, an emitting layer EL, a specific functional layer F21 included in the second functional layer F2, a common functional layer F22 included in the second functional layer F2, and an upper electrode E2 are stacked in this order from the lower electrode E1 side.

[0046] The first functional layer F1 covers the peripheral portion of the lower electrode E1. The emitting layer EL covers the peripheral portion of the first functional layer F1. The specific functional layer F21 covers the peripheral portion of the emitting layer EL. The common functional layer F22 covers the peripheral portion of the specific functional layer F21. The upper electrode E2 covers the peripheral portion of the common functional layer F22. As described above, each layer included in the display element 20 is stacked so as to cover the peripheral portion of the lower layer adjacent to it in the third direction Z.

[0047] 4B is a schematic diagram illustrating the overlap region A1. Fig. 4B shows the overlap region A1 in which two adjacent subpixels SP2 and SP3 are arranged to overlap each other, with subpixel SP3 being arranged above subpixel SP2. In the following description, elements corresponding to subpixel SP2 will be designated with the suffix "G," and elements corresponding to subpixel SP3 will be designated with the suffix "B."

[0048] As shown in Figure 4A, the display elements 20 that constitute the subpixels SP2 and SP3 both have a structure in which a lower electrode E1, a first functional layer F1, an emitting layer EL, a specific functional layer F21, a common functional layer F22, and an upper electrode E2 are stacked in this order from the lower electrode E1 side.

[0049] In the overlapping region A1, the peripheral portion of the lower electrode E1G of the subpixel SP2 is covered by a first functional layer F1G disposed on the lower electrode. In the overlapping region A1, the peripheral portion of the first functional layer F1G is covered by an emitting layer ELG disposed on the first functional layer. In the overlapping region A1, the peripheral portion of the emitting layer ELG is covered by a specific functional layer F21G disposed on the emitting layer. In the overlapping region A1, the subpixel SP3 is disposed on the specific functional layer F21G, and the peripheral portion of the specific functional layer is covered by the lower electrode E1B of the subpixel SP3.

[0050] In the overlapping region A1, the lower electrode E1B of the subpixel SP3 is disposed on the specific functional layer F21G of the subpixel SP2. By providing the lower electrode E1B up to a position where it overlaps with the light-emitting layer ELG of the subpixel SP2, light emitted from the light-emitting layer ELG in the overlapping region A1 is reflected by the lower electrode E1B and is not extracted to the outside as light that contributes to image display. This makes it possible to suppress color mixing that can occur when light emitted from the light-emitting layer ELG and light emitted from the light-emitting layer ELB mix together.

[0051] In the overlapping region A1, the peripheral portion of the lower electrode E1B is covered by the first functional layer F1B disposed on the lower electrode. In the overlapping region A1, the peripheral portion of the first functional layer F1B is covered by the emitting layer ELB disposed on the first functional layer. The peripheral portion of the first functional layer F1B is in contact with the specific functional layer F21G of the subpixel SP2. In the overlapping region A1, the peripheral portion of the emitting layer ELB is covered by the specific functional layer F21B disposed on the emitting layer. The peripheral portion of the emitting layer ELB is in contact with the specific functional layer F21G of the subpixel SP2. In the overlapping region A1, the peripheral portion of the specific functional layer F21B is covered by the common functional layer F22 disposed on the specific functional layer. The peripheral portion of the specific functional layer F21B is in contact with the specific functional layer F21G of the subpixel SP2.

[0052] In the overlapping region A1, a common functional layer F22 is disposed on the specific functional layer F21G of the subpixel SP2 and the specific functional layer F21B of the subpixel SP3. In the overlapping region A1, an upper electrode E2 is disposed on the common functional layer F22.

[0053] As described above, at least the first functional layer F1G, the emitting layer ELG, the intrinsic functional layer F21G, and the common functional layer F22 are interposed between the lower electrode E1G and the upper electrode E2 of the subpixel SP2, and the peripheral portion of the lower electrode E1G is also covered by at least one of these layers, thereby preventing contact and a short circuit between the lower electrode E1G and the upper electrode E2. Similarly, at least the first functional layer F1B, the emitting layer ELB, the intrinsic functional layer F21B, and the common functional layer F22 are interposed between the lower electrode E1B and the upper electrode E2 of the subpixel SP3, and the peripheral portion of the lower electrode E1B is also covered by at least one of these layers, thereby preventing contact and a short circuit between the lower electrode E1B and the upper electrode E2.

[0054] Although the overlap region A1 where the subpixels SP2 and SP3 overlap has been described above, the overlap region A1 where the subpixels SP1 and SP2 overlap can also be described in a similar manner by replacing the subpixel SP3 with the subpixel SP2, the subpixel SP2 with the subpixel SP1, and replacing the final codes with the codes of the corresponding colors.Furthermore, the overlap region A1 where the subpixels SP1 and SP3 overlap can also be described in a similar manner by replacing the subpixel SP2 with the subpixel SP1, and replacing the final codes with the codes of the corresponding colors.

[0055] FIG. 5A is a diagram for explaining in more detail each layer included in the first functional layer F1 and each layer included in the second functional layer F2 shown in FIG. 4A. In this embodiment, it is assumed that the lower electrode E1 corresponds to the anode and the upper electrode E2 corresponds to the cathode, so the first functional layer F1 has a structure in which a hole injection layer HIL, a hole transport layer HTL, and an electron blocking layer EBL are stacked in this order from the lower electrode E1 side. The second functional layer F2 has a structure in which an electron injection layer EIL, an electron transport layer ETL, and a hole blocking layer HBL are stacked in this order from the upper electrode E2 side. The specific functional layer F21 of the second functional layer F2 includes an electron transport layer ETL and a hole blocking layer HBL, and the common functional layer F22 of the second functional layer F2 includes an electron injection layer EIL.

[0056] With respect to the first functional layer F1, the hole injection layer HIL covers the periphery of the bottom electrode E1, the hole transport layer HTL covers the periphery of the hole injection layer HIL, and the electron blocking layer EBL covers the periphery of the hole transport layer HTL. The light-emitting layer EL covers the periphery of the electron blocking layer EBL. Regarding the specific functional layer F21, the hole blocking layer HBL covers the periphery of the light-emitting layer EL, and the electron transport layer ETL covers the periphery of the hole blocking layer HBL. Regarding the common functional layer F22, the electron injection layer EIL covers the periphery of the electron transport layer ETL. The upper electrode E2, which is a common layer, covers the periphery of the electron injection layer EIL.

[0057] Fig. 5B is a diagram for explaining in more detail the layers included in the first functional layer F1 and the layers included in the second functional layer F2 shown in Fig. 4B. Note that, as in Fig. 4B, in the following description, elements corresponding to subpixel SP2 will be designated with the suffix "G" and elements corresponding to subpixel SP3 will be designated with the suffix "B".

[0058] As shown in FIG. 5A, each of the subpixels SP2 and SP3 has a structure in which a lower electrode E1, a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, an emitting layer EL, a hole blocking layer HBL, an electron transport layer ETL, an electron injection layer EIL, and an upper electrode E2 are stacked in this order from the lower electrode E1 side.

[0059] In the overlap region A1, the peripheral portion of the lower electrode E1G of the subpixel SP2 is covered by a hole injection layer HILG included in the first functional layer F1G, which is disposed on the lower electrode. In the overlap region A1, the peripheral portion of the hole injection layer HILG is covered by a hole transport layer HTLG included in the first functional layer F1G, which is disposed on the hole injection layer. In the overlap region A1, the peripheral portion of the hole transport layer HTLG is covered by an electron blocking layer EBLG included in the first functional layer F1G, which is disposed on the hole transport layer. In the overlap region A1, the peripheral portion of the electron blocking layer EBLG is covered by an emitting layer ELG, which is disposed on the electron blocking layer.

[0060] In the overlap region A1, the periphery of the emitting layer ELG of the subpixel SP2 is covered by a hole blocking layer HBLG included in the intrinsic functional layer F21G, which is disposed on the emitting layer. In the overlap region A1, the periphery of the hole blocking layer HBLG is covered by an electron transport layer ETLG included in the intrinsic functional layer F21G, which is disposed on the hole blocking layer. In the overlap region A1, the subpixel SP3 is disposed on the electron transport layer ETLG, and the periphery of the electron transport layer is covered by the lower electrode E1B of the subpixel SP3.

[0061] In the overlap region A1, the lower electrode E1B of the subpixel SP3 is disposed on the electron transport layer ETLG of the subpixel SP2. A hole blocking layer HBLG included in the second functional layer F2G of the subpixel SP2 is disposed between the lower electrode E1B of the subpixel SP3 and the emitting layer ELG of the subpixel SP2. In this way, in the overlap region A1, it is desirable to dispose a carrier blocking layer such as a hole blocking layer HBL or an electron blocking layer EBL between the lower electrode of the subpixel SP disposed above and the emitting layer EL of the subpixel SP disposed below. This makes it possible to prevent one subpixel SP from emitting light in response to the emission of the other subpixel SP.

[0062] In the overlapping region A1, the periphery of the bottom electrode E1B is covered with the hole injection layer HILB included in the first functional layer F1B, which is disposed on the bottom electrode.

[0063] In the overlap region A1, the peripheral portion of the hole injection layer HILB is covered by the hole transport layer HTLB included in the first functional layer F1B, which is disposed on the hole injection layer. The peripheral portion of the hole injection layer HILB is in contact with the electron transport layer ETLG of the subpixel SP2. In the overlap region A1, the peripheral portion of the hole transport layer HTLB is covered by the electron blocking layer EBLB included in the first functional layer F1B, which is disposed on the hole transport layer. The peripheral portion of the hole transport layer HTLB is in contact with the electron transport layer ETLG of the subpixel SP2. In the overlap region A1, the peripheral portion of the electron blocking layer EBLB is covered by the emitting layer ELB, which is disposed on the electron blocking layer. The peripheral portion of the electron blocking layer EBLB is in contact with the electron transport layer ETLG of the subpixel SP2.

[0064] In the overlap region A1, the peripheral portion of the emitting layer ELB of the subpixel SP3 is covered by the hole blocking layer HBLB included in the intrinsic functional layer F21B, which is disposed on the emitting layer. The peripheral portion of the emitting layer ELB is in contact with the electron transport layer ETLG of the subpixel SP2. In the overlap region A1, the peripheral portion of the hole blocking layer HBLB is covered by the electron transport layer ETLB included in the intrinsic functional layer F21B, which is disposed on the hole blocking layer. The peripheral portion of the hole blocking layer HBLB is in contact with the electron transport layer ETLG of the subpixel SP2. In the overlap region A1, the peripheral portion of the electron transport layer ETLB is covered by the electron injection layer EIL, which is the common functional layer F22, which is disposed on the electron transport layer. The peripheral portion of the electron transport layer ETLB is in contact with the electron transport layer ETLG of the subpixel SP2.

[0065] In the overlapping region A1, an electron injection layer EIL, which is a common functional layer F22, is disposed on the electron transport layer ETLG of the subpixel SP2 and the electron transport layer ETLB of the subpixel SP3. In the overlapping region A1, an upper electrode E2, which is a common layer, is disposed on the electron injection layer EIL.

[0066] As described above, the hole injection layer HILG, hole transport layer HTLG, electron blocking layer EBLG, emissive layer ELG, hole blocking layer HBLG, electron transport layer ETLG, and electron injection layer EIL are interposed between the lower electrode E1G and the upper electrode E2 of subpixel SP2, and the periphery of the lower electrode E1G is also covered with at least one of these layers, preventing contact and short-circuiting between the lower electrode E1G and the upper electrode E2. Similarly, the hole injection layer HILB, hole transport layer HTLB, electron blocking layer EBLB, emissive layer ELB, hole blocking layer HBLB, electron transport layer ETLB, and electron injection layer EIL are interposed between the lower electrode E1B and the upper electrode E2 of subpixel SP3, and the periphery of the lower electrode E1B is also covered with at least one of these layers, preventing contact and short-circuiting between the lower electrode E1B and the upper electrode E2.

[0067] The effects of this embodiment will now be described using a comparative example shown in Fig. 6. Note that the comparative example is provided to explain some of the effects that can be achieved by this embodiment, and does not exclude effects common to the comparative example and this embodiment from the scope of the present invention.

[0068] 6, the configuration of the comparative example differs from the configuration of the present embodiment in that a partition wall 30 is disposed between adjacent subpixels SP. The partition wall 30 is disposed on the insulating layer 11 and covers the periphery of the lower electrode E1. In the configuration of the comparative example, covering the periphery of the lower electrode E1 with the partition wall 30 prevents the lower electrode E1 and the upper electrode E2 from coming into contact with each other and causing a short circuit.

[0069] However, in the configuration according to the comparative example, there is a problem that the light-emitting region (light-emitting area) of the display element 20 is reduced by the amount of the partition walls 30. In addition, in the configuration according to the comparative example, as the resolution increases, the area where the partition walls 30 are arranged increases, which results in a reduction in the light-emitting region of the display element 20, making it difficult to achieve higher resolution.

[0070] In contrast, in the configuration according to the present embodiment, the subpixels SP1, SP2, and SP3 constituting the pixel PX are each arranged so as to overlap with the subpixel SP adjacent thereto in the first direction X, and the peripheral portion of the lower electrode E1 included in each subpixel SP is covered by the organic layer OR included in each subpixel SP. This makes it possible to prevent the lower electrode E1 and the upper electrode E2 from coming into contact with each other without disposing the partition wall 30 to cover the peripheral portion of the lower electrode E1, and it is possible to increase the light-emitting region by the amount corresponding to the absence of the partition wall 30.

[0071] Furthermore, in the configuration according to this embodiment, as described above, the sub-pixels SP1, SP2, and SP3 that make up the pixel PX are each arranged so as to overlap with the sub-pixel SP adjacent to it in the first direction X. This not only eliminates the need to arrange a partition wall 30, but also eliminates the need to arrange wiring or spaces between the sub-pixels SP to separate the sub-pixels SP, thereby making it possible to increase the light-emitting area accordingly.

[0072] Furthermore, in the configuration according to this embodiment, as described above, it is not necessary to provide the partition walls 30, and therefore it is possible to suppress the reduction in the light-emitting area that accompanies higher definition.

[0073] The following describes a modified example of the configuration according to this embodiment. Note that the following mainly describes differences from the configuration shown in Figures 3 and 5B, and omits a description of the same configuration as the configuration shown in Figures 3 and 5B.

[0074] Fig. 7 is a cross-sectional view illustrating a configuration according to a modified example of the present embodiment. The configuration according to the modified example differs from the configuration shown in Fig. 3 in that a protective layer 40 is further provided between the subpixel SP arranged below and the subpixel SP arranged above in the overlap region A1, as shown in Fig. 7.

[0075] The protective layer 40 is an insulating layer formed of an insulating material such as silicon nitride (SiN), silicon oxide (SiO), or lithium fluoride (LiF), or a carrier blocking layer such as a hole blocking layer or an electron blocking layer.

[0076] 8 is a diagram illustrating the overlap region A1 in a configuration according to a modified example of this embodiment. As shown in FIG. 8, in the overlap region A1, the peripheral portion of the electron transport layer ETLG included in the intrinsic functional layer F21G of the subpixel SP2 is covered with a protective layer 40 that covers the peripheral portion. The subpixel SP3 is disposed on the protective layer 40, and the peripheral portion of the protective layer is covered with the lower electrode E1B of the subpixel SP3. The layers included in the first functional layer F1B of the subpixel SP3, the light-emitting layer ELB, and the layers included in the intrinsic functional layer F21B are in contact with the protective layer 40 at their peripheral portions.

[0077] In the configurations according to the modified examples described above, the sub-pixels SP1, SP2, and SP3 that make up the pixel PX are each arranged so as to overlap with the sub-pixel SP adjacent to them in the first direction X, and the peripheral portions of the lower electrodes E1 included in each of the sub-pixels SP are covered by the organic layers OR included in each of the sub-pixels SP, so it is possible to obtain the same effects as those already described.

[0078] Furthermore, in the configuration of the modified example, a protective layer 40 is arranged between the lower electrode of the subpixel SP arranged above and the light-emitting layer EL of the subpixel SP arranged below, so that it is possible to more effectively prevent one subpixel SP from emitting light in response to the light emission of the other subpixel SP than in the configurations shown in Figures 3 and 5B.

[0079] According to the embodiment described above, the display device DSP has a configuration in which the sub-pixels SP1, SP2, and SP3 constituting the pixel PX are each arranged so as to overlap with the sub-pixel SP adjacent to it in the first direction X, and the peripheral portion of the lower electrode E1 included in each sub-pixel SP is covered by the organic layer OR included in each sub-pixel SP. This makes it possible to suppress the reduction in the light-emitting area that accompanies higher resolution, and enables the display device to have higher resolution.

[0080] In this embodiment, a configuration is shown in which only the common functional layer F22 included in the second functional layer F2 is arranged as a common layer that is arranged across multiple subpixels SP, but this is not limited to this, and all of the second functional layers F2 located above the light-emitting layer EL may be arranged as common layers that are arranged across multiple subpixels SP.

[0081] Furthermore, in this embodiment, a configuration has been shown in which subpixel SP1 is a red subpixel, subpixel SP2 is a green subpixel, and subpixel SP3 is a blue subpixel, but this is not limited to this, and subpixel SP1 may be a green subpixel, subpixel SP2 may be a red subpixel, and subpixel SP3 may be a blue subpixel.

[0082] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0083] 10...substrate, 3...driving transistor, 11...insulating layer, E1...lower electrode, F1...first functional layer, EL...light-emitting layer, F2...second functional layer, F21...specific functional layer, F22...common functional layer, OR...organic layer, E2...upper electrode, 20...display element, SP1, SP2, SP3...subpixels.

Claims

1. A substrate; a display unit including a plurality of pixels arranged in a matrix in a first direction and a second direction intersecting the first direction, each pixel includes a first subpixel including an organic layer of a first color, a second subpixel including an organic layer of a second color, and a third subpixel including an organic layer of a third color; each of the sub-pixels has two overlapping regions that overlap with adjacent sub-pixels in the first direction, and an effective region that contributes to displaying an image; In the first subpixel, neither of the two overlapping regions is included in an effective region, In the second subpixel, one of the two overlapping regions is included in an effective region, and the other is not included in the effective region; In the third subpixel, both of the two overlapping regions are included in an effective region. Display device.

2. Each of the sub-pixels includes a lower electrode and an upper electrode disposed to sandwich the organic layer, the lower electrode is connected to a pixel circuit for driving and controlling each of the sub-pixels; the upper electrode is disposed across a plurality of sub-pixels; The display device according to claim 1 .

3. a peripheral portion of the lower electrode is covered with the organic layer and is not in contact with the upper electrode; The display device according to claim 2 .

4. In an overlapping region where the first subpixel and the second subpixel overlap, the second subpixel is disposed above the first subpixel, and a lower electrode included in the second subpixel reflects light emitted from the first subpixel and prevents the light from contributing to image display; in an overlapping region where the second subpixel and the third subpixel overlap, the third subpixel is disposed above the second subpixel, and a lower electrode included in the third subpixel reflects light emitted from the second subpixel and prevents the light from contributing to image display; In an overlapping region where the third subpixel and the first subpixel overlap, the third subpixel is disposed above the first subpixel, and a lower electrode included in the third subpixel reflects light emitted from the first subpixel, preventing the light from contributing to image display. The display device according to claim 2 or 3.

5. the organic layer included in each of the sub-pixels includes a light-emitting layer corresponding to each color, and a first functional layer and a second functional layer disposed so as to sandwich the light-emitting layer; the first functional layer is disposed between the lower electrode and the light-emitting layer and covers a peripheral portion of the lower electrode; the second functional layer is disposed between the light-emitting layer and the upper electrode and covers a peripheral portion of the light-emitting layer. The display device according to any one of claims 2 to 4.

6. In the overlapping region, a carrier block layer is disposed between a lower electrode included in an upper sub-pixel and a light-emitting layer included in a lower sub-pixel, as the second functional layer of the lower sub-pixel. The display device according to claim 5 .

7. the carrier blocking layer includes at least one of a hole blocking layer and an electron blocking layer; The display device according to claim 6.

8. the second functional layer includes a common layer disposed across the plurality of sub-pixels; The display device according to any one of claims 5 to 7.

9. a protective layer is disposed between the upper sub-pixel and the lower sub-pixel in the overlapping region; The display device according to any one of claims 5 to 8.

10. the protective layer includes a carrier block layer or an insulating layer formed of an insulating material; The display device according to claim 9 .

11. The first color is red, the second color is green, and the third color is blue. The display device according to any one of claims 1 to 10.

12. The first color is green, the second color is red, and the third color is blue. The display device according to any one of claims 1 to 10.

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