Organic Light-Emitting Diode Display Device

Abstract

To provide an organic light emitting diode display with improved light extraction efficiency and reduced bright spot defects.SOLUTION: An organic light emitting diode display of the present invention includes a substrate including a display area and a non-display area outside the display area, a plurality of sub-pixels having a light emitting area and a non-emitting area within the display area, and a plurality of microlenses provided in the light emitting area of each of the plurality of sub-pixels, and the light emitting area of an outermost sub-pixel of the plurality of sub-pixels in the display area has a first flat area from which the plurality of microlenses is removed.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a display device, and more particularly to an organic light emitting diode display device with improved light extraction efficiency. [Background technology]

[0002] As the information society develops, the demand for display devices for displaying images is increasing in various forms, and flat panel display devices (FPDs) such as liquid crystal display devices (LCDs) and organic light emitting diode display devices (OLEDs) have been developed and are being applied in various fields.

[0003] Among flat panel displays, organic light-emitting diode (OLED) displays, also known as organic electroluminescent display devices, are devices that emit light by injecting charges into an emissive layer formed between a negative electrode (electron injection electrode) and a positive electrode (hole injection electrode), forming excitons through the combination of electrons and holes, which then disappear. These OLED displays can be fabricated on flexible substrates such as plastic, and are self-emissive, offering a high contrast ratio and a response time of just a few microseconds, making it easy to display moving images. They are also stable at low temperatures and operate at a relatively low voltage of 5V to 15V DC, making it easy to manufacture and design driver circuits. Summary of the Invention [Problem to be solved by the invention]

[0004] As light generated in the light-emitting layer of such an organic light-emitting diode display device passes through many components and is emitted to the outside, if some of the light cannot be emitted to the outside due to total reflection at the interfaces between the components, the light extraction efficiency will decrease, which will lead to a decrease in brightness and an increase in power consumption.

[0005] Therefore, the present invention provides an organic light emitting diode display device having microlenses and improved light extraction efficiency. [Means for solving the problem]

[0006] In order to achieve the above object, the organic light-emitting diode display device of the present invention includes a substrate including a display area and a non-display area on the periphery of the display area, and a plurality of sub-pixels having a light-emitting area and a non-light-emitting area within the display area, each of the plurality of sub-pixels including a plurality of microlenses, and the light-emitting area of ​​the outermost sub-pixel of the plurality of sub-pixels in the display area includes a first flat portion from which a plurality of the microlenses have been removed.

[0007] The first flat portion is provided for each of the outermost sub-pixels on the left and right short sides of the display area.

[0008] The organic light emitting diode display device of the present invention further includes first vertical lines arranged along the left and right short sides of the display area, and the microlenses of the outermost sub-pixels are spaced apart from the first vertical lines.

[0009] The organic light emitting diode display device of the present invention further includes a second vertical wiring disposed between a subpixel disposed horizontally adjacent to the outermost subpixel and the outermost subpixel, and the microlens of the subpixel disposed horizontally adjacent to the outermost subpixel is disposed to overlap the second vertical wiring.

[0010] The first flat portion is provided only on the left side of the outermost subpixel on the left short side of the display area, and is provided only on the right side of the outermost subpixel on the right short side of the display area.

[0011] The light-emitting regions of the plurality of sub-pixels further include second flat portions at corners where the plurality of microlenses are removed.

[0012] The organic light-emitting diode display device of the present invention further includes a plurality of horizontal wirings arranged horizontally adjacent to or overlapping the plurality of sub-pixels and a plurality of vertical wirings arranged between the light-emitting areas of the plurality of sub-pixels, and the second flat portion is arranged in an area where the horizontal wirings and the vertical wirings overlap.

[0013] Another organic light emitting diode display device of the present invention includes a substrate having a plurality of sub-pixels each having a light emitting region and a non-light emitting region; a circuit unit including a thin film transistor and disposed in the non-light emitting region on an upper portion of the substrate; an overcoat layer disposed above the thin film transistor and including a plurality of microlenses in the light emitting region; a light emitting diode disposed in the light emitting region on the overcoat layer and connected to the thin film transistor; and a bank having an opening corresponding to the light emitting region, wherein the plurality of sub-pixels include first to n-th sub-pixels (n is an integer greater than 1) sequentially disposed along a first direction, and the bank has first and second side surfaces opposing each other along the first direction in each of the first to n-th sub-pixels, and the microlens in the first sub-pixel is spaced apart from the first side surface of the bank and overlaps the second side surface of the bank, and the microlens in the n-th sub-pixel overlaps the first side surface of the bank and is spaced apart from the second side surface of the bank.

[0014] The organic light emitting diode display device of the present invention further includes at least one horizontal wiring arranged on the upper side of the substrate along the first direction, and at least one vertical wiring arranged along the second direction and overlapping with the at least one horizontal wiring to form an overlapping portion, and in each of the first to nth sub-pixels, the microlens is spaced apart from the overlapping portion.

[0015] In each of the first to n-th subpixels, the microlens is spaced apart from a corner of the opening of the bank adjacent to the overlapping portion.

[0016] The light-emitting diode includes a first electrode, a light-emitting layer, and a second electrode, and in each of the first to nth subpixels, the corners of the openings in the first electrode and the bank corresponding to the overlapping portions are recessed toward the light-emitting region.

[0017] The at least one horizontal wiring includes a gate wiring and an auxiliary wiring, the at least one vertical wiring includes a power wiring, a data wiring, and a reference wiring, and the auxiliary wiring overlaps with at least one of the power wiring, the data wiring, and the reference wiring to form the overlapping portion.

[0018] The overcoat layer further includes a dummy lens provided in the non-light-emitting region, the dummy lens being spaced apart from the opening.

[0019] In the first subpixel, the dummy lens is provided only in a non-light-emitting region corresponding to the second side of the bank, and in the nth subpixel, the dummy lens is provided only in a non-light-emitting region corresponding to the first side of the bank.

[0020] The dummy lenses have the same size and shape as the microlenses.

[0021] The microlenses in at least one of the first to n-th sub-pixels are rotated so that a line connecting the centers of adjacent microlenses has a specific angle with respect to the first direction.

[0022] The rotation angle of the microlens is greater than or equal to 0 degrees and less than 60 degrees. [Effects of the Invention]

[0023] In the organic light emitting diode display device of the present invention, a plurality of microlenses are provided within the light emitting region of each subpixel, thereby improving light extraction efficiency and brightness. Therefore, power consumption can be reduced through the improved efficiency and brightness.

[0024] In addition, by arranging the microlenses at a distance from the outer edge of the bank opening in the first and last subpixels located on the edge of the display area, it is possible to prevent the loss of the underlying insulating film during the microlens formation process and prevent electrical shorts between the first electrode and the underlying wiring, thereby preventing bright spot defects and improving image quality.

[0025] In addition, by drawing the corners of the openings of the first electrode and the bank toward the light-emitting region near the overlapping portion of the wiring, the overlapping portion of the first electrode and the wiring is separated, which further prevents electrical shorts between the first electrode and the lower wiring due to double steps.

[0026] Furthermore, by providing a dummy lens outside the opening of the bank, vertical band-like irregularities can be improved.

[0027] In addition, by rotating the microlens of at least one sub-pixel, rainbow patterns and / or circular ring patterns that may occur due to a regular arrangement can be prevented or minimized, thereby improving the image quality of the display device.

[0028] In addition, by providing a flat portion where no microlenses are disposed in the light emitting region, the size of the bank opening can be accurately measured and managed, thereby preventing a decrease in light extraction efficiency. [Brief explanation of the drawings]

[0029] [Figure 1] 1 is a schematic equivalent circuit diagram of one sub-pixel of an organic light emitting diode display device according to an embodiment of the present invention; [Figure 2] 1 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention; [Figure 3] 1 is a schematic plan view of an organic light emitting diode display device according to a first embodiment of the present invention. [Figure 4] 1 is a schematic plan view of a first pixel of an organic light emitting diode display device according to a first embodiment of the present invention; [Figure 5] 1 is a schematic plan view of an m-th pixel of an organic light emitting diode display device according to a first embodiment of the present invention. [Figure 6] 2 is a schematic plan view of one of the second pixel to the (m-1)th pixel of the organic light emitting diode display device according to the first embodiment of the present invention. [Figure 7] FIG. 5 is a cross-sectional view corresponding to line II' in FIG. [Figure 8] FIG. 6 is a cross-sectional view corresponding to line II-II' in FIG. 5. [Figure 9] FIG. 7 is a cross-sectional view corresponding to line III-III' in FIG. [Figure 10] FIG. 7 is a cross-sectional view corresponding to line IV-IV in FIG. 6. [Figure 11] FIG. 10 is a schematic plan view of an organic light emitting diode display device according to a second embodiment of the present invention. [Figure 12] FIG. 10 is a schematic plan view of an organic light emitting diode display device according to a third embodiment of the present invention. [Figure 13] FIG. 10 is a schematic plan view of an organic light emitting diode display device according to a fourth embodiment of the present invention. [Figure 14] FIG. 14 is a cross-sectional view corresponding to the line VV′ in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0030] The advantages and features of the present invention, as well as methods for achieving them, will become more apparent from the following detailed description of the embodiments taken in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, and may be embodied in various different forms. However, the embodiments are provided so that this disclosure will be complete and will fully convey the scope of the invention to those skilled in the art.

[0031] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for illustrating the embodiments of the present invention are merely examples, and the present invention is not limited to the illustrated details. The same reference symbols refer to the same elements throughout the specification. Furthermore, in describing the present invention, if a detailed description of related prior art is deemed to unnecessarily obscure the gist of the present invention, such a detailed description will be omitted. When using words such as "include," "have," and "be," other parts may be added unless "only" is used. When a component is expressed in the singular, it also includes a plural unless otherwise explicitly stated.

[0032] When interpreting elements, they are interpreted as including a margin of error even if there is no other explicit description.

[0033] In describing a positional relationship, for example, when the positional relationship between two parts is described using terms such as "above," "on top," "below," or "beside," one or more other parts may be located between the two parts, unless "immediately" or "directly" is used.

[0034] Although terms such as "first," "second," etc. are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, a first component referred to below may be a second component within the technical concept of the present invention.

[0035] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0036] The organic light emitting diode display device according to an embodiment of the present invention includes a plurality of pixels arranged in a matrix on a display area, each pixel including a plurality of sub-pixels, each of which has substantially the same configuration. The configuration of such sub-pixels will be described with reference to FIGS. 1 and 2.

[0037] FIG. 1 is a schematic equivalent circuit diagram of one sub-pixel of an organic light emitting diode display device according to an embodiment of the present invention.

[0038] 1, a subpixel SP of an organic light emitting diode display device according to an embodiment of the present invention includes first, second, and third transistors T1, T2, and T3, i.e., a switching transistor T1, a driving transistor T2, a sensing transistor T3, a storage capacitor Cst, a light emitting diode De, and a sensing transistor T3. The switching transistor T1, the driving transistor T2, and the sensing transistor T3 may be n-type transistors. However, the present invention is not limited thereto, and the switching transistor T1, the driving transistor T2, and the sensing transistor T3 may be p-type transistors.

[0039] Specifically, a gate line supplying a gate signal SCAN and a data line supplying a data signal Vdata intersect with each other, and a switching transistor T1 is located at the intersection of the gate line and the data line. The gate of the switching transistor T1 is connected to the gate line and receives the gate signal SCAN, and the drain of the switching transistor T1 is connected to the data line and receives the data signal Vdata.

[0040] In addition, the gate of the driving transistor T2 is connected to the source of the switching transistor T1 and the first capacitor electrode of the storage capacitor Cst, the drain of the driving transistor T2 is connected to a high-potential wiring that supplies a high-potential voltage EVDD, and the source of the driving transistor T2 is connected to the anode of the light-emitting diode De, the second capacitor electrode of the storage capacitor Cst, and the source of the sensing transistor T3.

[0041] The gate of the sensing transistor T3 is connected to the gate line, and the drain of the sensing transistor T3 is connected to a reference line that supplies a reference voltage Vref. Alternatively, the gate of the sensing transistor T3 may be connected to a separate sensing line.

[0042] Here, the positions of the source and drain of each of the thin film transistors T1, T2, and T3 are not limited to this, and the positions may be interchanged.

[0043] Alternatively, the cathode of the light emitting diode De may be connected to a low potential wiring that supplies a low potential voltage EVSS, or may be connected to a ground voltage.

[0044] During the light-emitting period of one frame, the switching transistor T1 is switched by the gate signal SCAN transmitted through the gate line to supply the data signal Vdata transmitted through the data line to the gate of the driving transistor T2, and the driving transistor T2 is switched by the data signal Vdata to control the current of the light-emitting diode De. At this time, the storage capacitor Cst maintains a charge corresponding to the data signal Vdata during one frame to keep the amount of current flowing through the light-emitting diode De constant, thereby maintaining a constant gray level displayed by the light-emitting diode De.

[0045] Furthermore, one frame further includes a sensing period, during which the sensing transistor T3 is switched by a gate signal SCAN transmitted through the gate line to supply a reference voltage Vref to the source of the driving transistor T2, senses a voltage change at the source of the driving transistor T2 through the reference line, and calculates the threshold voltage Vth of the driving transistor T2 by comparing the amount of voltage change with a determination range. Accordingly, by calculating the threshold voltage Vth in real time and compensating for image data, it is possible to compensate for changes in the characteristics of the driving transistor T2 and prevent degradation of image quality.

[0046] FIG. 2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention, illustrating a cross-section of one sub-pixel, and will be described by taking a bottom emission type organic light emitting diode display device as an example.

[0047] As shown in FIG. 2, the organic light emitting diode display device according to the embodiment of the present invention includes a substrate 110, a thin film transistor Tr, and a light emitting diode De.

[0048] A subpixel SP having a light-emitting area EA and a non-light-emitting area NEA is provided on the substrate 110. A light-emitting diode De is disposed in the light-emitting area EA, and a thin-film transistor Tr is disposed in the non-light-emitting area NEA.

[0049] Specifically, a light-shielding layer 112 is disposed in a non-light-emitting area (NEA) on the substrate 110. The substrate 110 is made of a transparent insulating material, and may be, for example, a glass substrate or a plastic substrate. The plastic substrate may be made of, but is not limited to, polyimide.

[0050] The light-shielding layer 112 may be formed of at least one of aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W), or an alloy thereof, and may have a single layer or a multi-layer structure. For example, the light-shielding layer 112 may have a double-layer structure including a lower layer of molybdenum-titanium alloy (MoTi) and an upper layer of copper (Cu), and the upper layer may be thicker than the lower layer. However, embodiments of the present invention are not limited thereto.

[0051] A buffer layer 120 made of an insulating material is disposed on the light-shielding layer 112. The buffer layer 120 is disposed on substantially the entire surface of the substrate 110. The buffer layer 120 may be formed of an inorganic material such as silicon oxide (SiO2) or silicon nitride (SiNx), and may have a single-layer or multi-layer structure.

[0052] A patterned semiconductor layer 122 is disposed on the buffer layer 120. The semiconductor layer 122 overlaps the light-shielding layer 112. The semiconductor layer 122 may be made of an oxide semiconductor material, and the light-shielding layer 112 blocks light incident on the semiconductor layer 122 to prevent the semiconductor layer 122 from being deteriorated by light.

[0053] Alternatively, the semiconductor layer 122 may be made of polycrystalline silicon, in which case both ends of the semiconductor layer 122 may be doped with impurities.

[0054] A gate insulating film 124 and a gate electrode 126 are sequentially disposed on the semiconductor layer 122. The gate insulating film 124 and the gate electrode 126 are located corresponding to the center of the semiconductor layer 122, and the gate insulating film 124 may be patterned in the same shape as the gate electrode 126. Alternatively, the gate insulating film 124 may be located substantially over the entire surface of the substrate 110.

[0055] The gate insulating film 124 may be formed of an inorganic insulating material such as silicon oxide (SiO2) or silicon nitride (SiNx). If the semiconductor layer 122 is made of an oxide semiconductor material, the gate insulating film 124 may be formed of silicon oxide (SiO2). Alternatively, if the semiconductor layer 122 is made of polycrystalline silicon, the gate insulating film 124 may be formed of silicon oxide (SiO2) or silicon nitride (SiNx).

[0056] The gate electrode 126 may be made of a conductive material such as a metal, and may be formed of at least one of aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W), or an alloy thereof, and may have a single-layer or multi-layer structure. For example, the gate electrode 126 may be made of a conductive material such as a metal and have a double-layer structure including a lower layer of a molybdenum-titanium alloy (MoTi) and an upper layer of copper (Cu), and the upper layer may be thicker than the lower layer. However, embodiments of the present invention are not limited thereto.

[0057] An interlayer insulating film 130 made of an insulating material is disposed on the gate electrode 126 and covers substantially the entire surface of the substrate 110. The interlayer insulating film 130 may be formed of an inorganic insulating material such as silicon oxide (SiO2) or silicon nitride (SiNx), or an organic insulating material such as photo acryl or benzocyclobutene.

[0058] The interlayer insulating film 130 has contact holes exposing the upper surfaces of both edge portions of the semiconductor layer 122. The contact holes are located on both sides of the gate electrode 126 and spaced apart from the gate electrode 126.

[0059] Source and drain electrodes 132 and 134 are formed on the interlayer insulating film 130 using a conductive material such as metal. The source and drain electrodes 132 and 134 may be formed of at least one of aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W), or an alloy thereof, and may have a single-layer or multi-layer structure. For example, the source and drain electrodes 132 and 134 may have a double-layer structure including a lower layer of molybdenum-titanium alloy (MoTi) and an upper layer of copper (Cu), where the upper layer may be thicker than the lower layer. Alternatively, the source and drain electrodes 132 and 134 may have a triple-layer structure. However, embodiments of the present invention are not limited thereto.

[0060] The source and drain electrodes 132 and 134 are spaced apart from each other around the gate electrode 126 and contact both ends of the semiconductor layer 122 through contact holes in the interlayer insulating film 130 .

[0061] The semiconductor layer 122, the gate electrode 126, and the source and drain electrodes 132 and 134 form a thin film transistor Tr. The thin film transistor Tr has a coplanar structure in which the gate electrode 126 and the source and drain electrodes 132 and 134 are located on one side of the semiconductor layer 122, i.e., on top of the semiconductor layer 122.

[0062] Alternatively, the thin film transistor Tr may have an inverted staggered structure in which the gate electrode is located below the semiconductor layer and the source and drain electrodes are located above the semiconductor layer. In this case, the semiconductor layer may be made of an oxide semiconductor material or amorphous silicon.

[0063] The thin film transistor Tr may be the driving transistor T2 of FIG. 1. Meanwhile, the non-emitting area NEA on the substrate 110 may further include at least one thin film transistor having substantially the same structure as the thin film transistor Tr, for example, the switching transistor T1 and the sensing transistor T3 of FIG. 1.

[0064] A passivation layer 140 made of an insulating material is disposed on the source and drain electrodes 132 and 134 over substantially the entire surface of the substrate 110. The passivation layer 140 may be formed of an inorganic insulating material such as silicon oxide (SiO2) or silicon nitride (SiNx).

[0065] A color filter 145 is disposed on top of the passivation layer 140. The color filter 145 is located in the light-emitting area EA and can be one of red, green, and blue filters.

[0066] An overcoat layer 150 made of an insulating material is disposed on the color filter 145 and covers substantially the entire surface of the substrate 110. The overcoat layer 150 has a source contact hole 152 exposing the source electrode 132 together with the passivation layer 140.

[0067] The overcoat layer 150 may be made of an organic insulating material, for example, photo acrylic, although the present invention is not limited thereto.

[0068] In the light-emitting area EA, the overcoat layer 150 includes a plurality of microlenses 154 on its upper surface. The plurality of microlenses 154 form a microlens array (MLA), and each of the plurality of microlenses 154 has a concave portion. Here, adjacent portions of two microlenses 154 may form a convex portion, and each concave portion may be surrounded by a convex portion. Accordingly, the microlens array may be configured such that concave portions and convex portions are alternately positioned.

[0069] On the other hand, the overcoat layer 150 has a substantially flat upper surface in the non-light-emitting area NEA.

[0070] A first electrode 162 made of a conductive material with a relatively high work function is disposed in the light emitting region EA on the overcoat layer 150. By way of example, the first electrode 162 may be formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), but is not limited thereto.

[0071] The first electrode 162 extends to the non-light-emitting area NEA and contacts the source electrode 132 through the source contact hole 152 .

[0072] In the light emitting area EA, the first electrode 162 is formed along the morphology of the upper surface of the overcoat layer 150 including the microlenses 154. Accordingly, the first electrode 162 has an uneven upper surface.

[0073] A bank 160 made of an insulating material is disposed on the first electrode 162. The bank 160 may be formed of an organic insulating material and overlaps and covers the edge of the first electrode 162. The bank 160 has an opening 160a corresponding to the light-emitting area EA, and the center of the first electrode 162 is exposed through the opening 160a.

[0074] Next, an emitting layer 164 is disposed on the first electrode 162 exposed through the opening 160a of the bank 160. The emitting layer 164 is disposed over substantially the entire surface of the substrate 110. Accordingly, the emitting layer 164 is disposed on the first electrode 162 in the emitting area EA and in contact with the first electrode 162, and on the bank 160 in the non-emitting area NEA and in contact with the top surface of the bank 160. The emitting layer 164 also contacts the side surface of the bank 160.

[0075] The light-emitting layer 164 emits white light and may include at least one hole auxiliary layer, at least one light-emitting material layer, and at least one electron auxiliary layer constituting one light-emitting unit. The hole auxiliary layer may include at least one of a hole injection layer (HIL) and a hole transport layer (HTL), and the electron auxiliary layer may include at least one of an electron injection layer (EIL) and an electron transport layer (ETL).

[0076] The light emitting layer 164 may have a stack structure in which two or more light emitting portions emitting light of different colors are stacked, and a charge generation layer may be provided between the two light emitting portions.

[0077] In the light-emitting area EA, the light-emitting layer 164 is formed along the morphology of the upper surface of the first electrode 162. Accordingly, in the light-emitting area EA, the light-emitting layer 164 is formed substantially along the morphology of the upper surface of the overcoat layer 150, and the light-emitting layer 164 has an uneven upper surface.

[0078] Here, the thickness of the light emitting layer 164 corresponding to the concave portion of the microlens 154 may be thicker than the thickness corresponding to the convex portion where two microlenses 154 are adjacent, and the light emitting layer 164 may have the thinnest thickness between the concave portion and the convex portion.

[0079] A second electrode 166 made of a conductive material with a relatively low work function is disposed on substantially the entire surface of the substrate 110 on the light-emitting layer 164. The second electrode 166 is located on the first electrode 162 in the light-emitting area EA and on the bank 160 in the non-light-emitting area NEA.

[0080] The second electrode 166 may be made of aluminum, magnesium, silver, or an alloy thereof.

[0081] In the light-emitting area EA, the second electrode 166 is formed along the morphology of the upper surface of the light-emitting layer 164. Accordingly, in the light-emitting area EA, the second electrode 166 is formed substantially along the morphology of the upper surface of the overcoat layer 150, and the second electrode 166 has an uneven upper surface.

[0082] The first electrode 162, the light emitting layer 164, and the second electrode 166 form a light emitting diode De. Here, the first electrode 162 may serve as an anode, and the second electrode 166 may serve as a cathode, but is not limited thereto.

[0083] The first electrode 162 is made of a transparent conductive material that transmits light, and the second electrode 166 is made of a metal material that reflects light. Light from the light-emitting layer 164 is emitted through the first electrode 162 and can be output to the outside after passing through the color filter 145 and the substrate 110.

[0084] An encapsulation layer 170 is disposed on the second electrode 166 over substantially the entire surface of the substrate 110. The encapsulation layer 170 may be in the form of a face seal made of a transparent organic or inorganic insulating material having adhesive properties, or may have a multilayer structure in which inorganic film / organic film / inorganic film are stacked.

[0085] An opposing substrate 180 is disposed on the encapsulation layer 170. The opposing substrate 180 may be a glass substrate or a metal substrate. Alternatively, the opposing substrate 180 may be in the form of a film.

[0086] The encapsulation layer 170 and the opposing substrate 180 prevent external oxygen or moisture from penetrating into the light emitting diode De and prevent external impact from being applied to the light emitting diode De.

[0087] As described above, the overcoat layer 150 has a plurality of microlenses 154 on its upper surface in the light-emitting area EA, and the first electrode 162, light-emitting layer 164, and second electrode 166 disposed on the overcoat layer 150 are formed substantially along the morphology of the upper surface of the overcoat layer 150. Therefore, the first electrode 162, light-emitting layer 164, and second electrode 166 in the light-emitting area EA also have concave-convex patterns, i.e., microlenses, corresponding to the microlenses 154 of the overcoat layer 150.

[0088] The microlenses 154 change the path of light so that light that would otherwise be totally reflected and lost after being emitted in the light-emitting layer 164 can be extracted to the outside, thereby improving light extraction efficiency.

[0089] The microlenses 154 are formed by applying an organic material to the substrate 110 to form the overcoat layer 150, followed by a photolithography process and an ashing process. The thickness of the overcoat layer 150 is relatively thin near the edge of the display area. As a result, the overcoat layer 150 and passivation layer 140 corresponding to the microlenses 154 may be washed away during the ashing process, which may cause an electrical short between the first electrode 162 and the wiring, resulting in a bright spot defect. Therefore, in this embodiment of the present invention, the microlenses 154 of the subpixels SP located near the edge of the display area are arranged differently from the microlenses 154 of the other subpixels SP.

[0090] The organic light emitting diode display device according to the first embodiment of the present invention will be described with reference to FIG.

[0091] FIG. 3 is a schematic plan view of an organic light emitting diode display device according to a first embodiment of the present invention, and will be described together with FIG.

[0092] As shown in FIG. 3, the organic light emitting diode display device according to the first embodiment of the present invention includes a display area DA for displaying an image and a non-display area NDA surrounding the display area DA.

[0093] The organic light emitting diode display device of the present invention may have a rectangular shape with long sides at the top and bottom and short sides at the left and right sides, where the long sides may extend horizontally and be parallel to the horizontal direction, and the short sides may extend vertically and be parallel to the vertical direction.

[0094] Here, the horizontal direction is the X direction, which may be defined as the first direction or the direction of the longer side of the display area DA, and the vertical direction is the Y direction, which may be defined as the second direction or the direction of the shorter side of the display area DA.

[0095] The display area DA may include a plurality of pixels P(1) to P(m), and the non-display area NDA may include a gate driver GD. The gate driver GD may be disposed on both the left and right sides of the display area DA and may be a gate-in-panel type formed together with the components of the plurality of pixels P(1) to P(m).

[0096] Specifically, m (m is an integer greater than 0) pixels P(1) to P(m) are arranged along the horizontal direction in the display area DA, and each pixel P(1) to P(m) includes multiple sub-pixels SP(1) to SP(n), and n (n is an integer greater than 1) sub-pixels SP(1) to SP(n) are arranged along the horizontal direction in the display area DA. For example, if one pixel P(m) includes four sub-pixels, 4m sub-pixels are arranged along the horizontal direction in the display area DA.

[0097] Here, the light-emitting areas EA of the outermost subpixels of the display area DA have flat portions where a plurality of microlenses 154 have been removed. That is, the light-emitting areas EA of the first subpixel SP(1), which is the outermost subpixel on the left short side of the display area DA, and the nth subpixel SP(n), which is the outermost subpixel on the right short side, have flat portions where a plurality of microlenses 154 have been removed. Accordingly, the microlens arrangements of the first subpixel SP(1) and the nth subpixel SP(n) differ from the microlens arrangements of the second subpixel SP(2) to the (n-1)th subpixel SP(n-1).

[0098] The organic light emitting diode display device according to the first embodiment of the present invention will be described in detail with reference to FIGS.

[0099] 4 to 6 are schematic plan views of an organic light-emitting diode display device according to a first embodiment of the present invention, in which FIG. 4 illustrates a first pixel, FIG. 5 illustrates an mth pixel, and FIG. 6 illustrates one of the second pixel to the (m-1)th pixel, and the description will be made with reference to both FIG. 1 and FIG. 3.

[0100] 4 to 6, in the organic light emitting diode display device according to the first embodiment of the present invention, the gate lines GL, which are horizontal lines, extend along a first direction, which is the X direction, and the data lines DL, power lines PL, and reference lines RL, which are vertical lines, extend along a second direction, which is the Y direction, and these lines intersect with each other to define a plurality of pixels P and a plurality of sub-pixels SP. Here, the power lines PL may be high-potential lines that supply the high-potential voltage EVDD of FIG. 1.

[0101] In this case, one reference line RL is located between two power lines PL, and two data lines DL are located between one power line PL and one reference line RL, and each subpixel SP is substantially located between the power line PL and the data line DL or between the reference line RL and the data line DL.

[0102] Each sub-pixel SP may have a substantially rectangular shape, but the present invention is not limited thereto, and the shape of each sub-pixel SP may vary.

[0103] As described above, one pixel includes multiple subpixels SP. For example, one pixel may include four subpixels SP, i.e., first, second, third, and fourth subpixels SP1, SP2, SP3, and SP4. The first, second, third, and fourth subpixels SP1, SP2, SP3, and SP4 are sequentially arranged along a first direction. Here, the first subpixel SP1 may be a red subpixel, the second subpixel SP2 may be a blue subpixel, the third subpixel SP3 may be a white subpixel, and the fourth subpixel SP4 may be a green subpixel. However, embodiments of the present invention are not limited thereto, and the number of subpixels included in one pixel and the arrangement order of the red, green, blue, and white subpixels may be changed.

[0104] The areas of the first, second, third, and fourth subpixels SP1, SP2, SP3, and SP4 may be different from one another. For example, the areas of the first and third subpixels SP1 and SP3 may be larger than the areas of the second and fourth subpixels SP2 and SP4. Alternatively, the area of ​​the third subpixel SP3 may be larger than or equal to the area of ​​the first subpixel SP1, and the area of ​​the second subpixel SP2 may be larger than or equal to the area of ​​the fourth subpixel SP4. However, embodiments of the present invention are not limited thereto, and the area relationships among the first, second, third, and fourth subpixels SP1, SP2, SP3, and SP4 may vary. Alternatively, the areas of the first, second, third, and fourth subpixels SP1, SP2, SP3, and SP4 may all be the same.

[0105] Here, between two adjacent subpixels SP1, SP2, SP3, and SP4, there is substantially one power line PL, two data lines DL, or one reference line RL. For example, two data lines DL are located between the first and second subpixels SP1 and SP2 and between the third and fourth subpixels SP3 and SP4, one reference line RL is located between the second and third subpixels SP2 and SP3, and one power line PL is located between the fourth subpixel SP4 and the first subpixel SP1 of the next pixel. Accordingly, one pixel P is disposed between the adjacent power lines PL. However, the present invention is not limited thereto.

[0106] In addition, first auxiliary wiring AL1 and second auxiliary wiring AL2, which are horizontal wirings, are further arranged along the first direction. The first auxiliary wiring AL1 and second auxiliary wiring AL2 are parallel to the gate wiring GL and intersect and overlap at least one of the power supply wiring PL, the data wiring DL, and the reference wiring RL.

[0107] The first auxiliary wiring AL1 is disposed at the upper end of each subpixel SP and extends from the first subpixel SP(1) of the first subpixel SP1 of the first pixel P(1) to the nth subpixel SP(n) of the fourth subpixel SP4 of the mth pixel P(m). The first auxiliary wiring AL1 intersects with the power supply wiring PL, the data wiring DL, and the reference wiring RL. Accordingly, the first auxiliary wiring AL1 overlaps with the power supply wiring PL, the data wiring DL, and the reference wiring RL to form a first overlapping portion OA1.

[0108] The second auxiliary wiring AL2 is located between the gate wiring GL and the first auxiliary wiring AL1 in the second direction and extends from the first subpixel SP1 to the fourth subpixel SP4 of each pixel P. The second auxiliary wiring AL2 intersects with the data wiring DL and the reference wiring RL. Accordingly, the second auxiliary wiring AL2 overlaps with the data wiring DL and the reference wiring RL to form a second overlapping portion OA2. Meanwhile, the second auxiliary wiring AL2 is separated from the power wiring PL. However, embodiments of the present invention are not limited thereto.

[0109] The first auxiliary wiring AL1 may be electrically connected to the power wiring PL. The second auxiliary wiring AL2 may be electrically connected to the circuit part CP and may also be electrically connected to the reference wiring RL. However, the present invention is not limited thereto.

[0110] The first auxiliary wiring AL1 includes an auxiliary pattern AL1a extending in the second direction, which overlaps with the power wiring PL. The width of the auxiliary pattern AL1a in the first direction is narrower than that of the power wiring PL, and two sides of the auxiliary pattern AL1a are positioned on the power wiring PL. Each subpixel SP includes a light-emitting area EA and a non-light-emitting area NEA. The light-emitting area EA of each subpixel SP includes the light-emitting diode De of FIG. 1, and the non-light-emitting area NEA includes a circuit unit CP. The light-emitting diode De includes a first electrode 162 serving as an anode, and the circuit unit CP includes the first, second, and third transistors T1, T2, and T3 of FIG. 1 and a storage capacitor Cst.

[0111] The first electrode 162 extends to the non-light-emitting area NEA and is electrically connected to the circuit part CP, more specifically, to the second transistor T2 of the circuit part CP.

[0112] The light-emitting area EA can be defined by an opening 160a in the bank that exposes the first electrode 162. The opening 160a in the bank has an area smaller than the first electrode 162 and is located within the edge of the first electrode 162.

[0113] Here, the power line PL, the data line DL, and the reference line RL may overlap the first electrode 162 and be spaced apart from the bank opening 160a. In this case, the width of the portion of each of the power line PL and the reference line RL overlapping the first electrode 162 may be wider than the remaining portion. However, the embodiment of the present invention is not limited thereto.

[0114] In addition, the first auxiliary wiring AL1 and the second auxiliary wiring AL2 may overlap the first electrode 162 and be spaced apart from the opening 160a of the bank.

[0115] The light-emitting area EA of each subpixel SP is provided with a plurality of microlenses 154. The microlenses 154 are arranged not only inside the opening 160a but also outside the opening 160a and overlap with the bank. At this time, the microlenses 154 partially overlap with the bank.

[0116] On the other hand, the microlens 154 overlaps the first electrode 162 and is separated from the edge of the first electrode 162 without overlapping it.

[0117] Furthermore, the microlens 154 may overlap at least one of the first auxiliary wiring AL1 and the second auxiliary wiring AL2. In the first embodiment of the present invention, the microlens 154 is illustrated as overlapping the first auxiliary wiring AL1 and being spaced apart from the second auxiliary wiring AL2, but this is not limited thereto, and the microlens 154 may overlap both the first auxiliary wiring AL1 and the second auxiliary wiring AL2. The microlens 154 may have a hexagonal shape in plan, forming a honeycomb structure. Alternatively, the microlens 154 may have a circular, elliptical, rectangular, or other shape in plan.

[0118] At least one dummy lens 156 is provided outside the opening 160a of each sub-pixel SP. That is, the dummy lens 156 is provided in the non-emitting area NEA between the emitting areas EA.

[0119] The dummy lens 156 is spaced from the opening 160a and completely overlaps the bank, and also overlaps the adjacent wirings PL, DL, and RL.

[0120] Here, the dummy lenses 156 are provided only on the left and right sides of the opening 160a, i.e., on sides that face each other in the first direction, but not on the top and bottom sides of the opening 160a, i.e., on sides that face each other in the second direction. Therefore, the dummy lenses 156 overlap with the left and right edges of the first electrodes 162 that face each other in the first direction, and are separated from the top and bottom edges of the first electrodes 162 that face each other in the second direction.

[0121] The dummy lenses 156 may have the same size and shape as the microlenses 154. That is, the dummy lenses 156 may have a hexagonal shape in plan view. Alternatively, the size and shape of the dummy lenses 156 may be different from those of the microlenses 154. For example, the size of the dummy lenses 156 may be larger than that of the microlenses 154. However, embodiments of the present invention are not limited thereto.

[0122] Such a dummy lens 156 can prevent vertical band-like irregularities caused by the bank.

[0123] Specifically, during the bank formation process, the dummy lenses 156 act as a dam that is pre-filled with the bank material, allowing the bank material to spread evenly. This prevents the bank material from flowing down into the openings 160a and filling the microlenses 154 unevenly, thereby improving vertical band-like irregularities.

[0124] As mentioned above, the dummy lenses 156 are provided only on the left and right sides of the opening 160a, not on the top and bottom sides, in order to prevent electrical shorts from occurring by preventing the dummy lenses 156 from being placed at repair points during a repair process following a defect.

[0125] Meanwhile, in the outermost subpixel on the left short side of the display area DA, i.e., the first subpixel SP(1) of the first subpixel SP1 of the first pixel P(1), the microlens 154 does not overlap with but is spaced apart from the edge of the opening 160a adjacent to the power line PL, i.e., the left edge of the opening 160a. Moreover, in the first subpixel SP(1), no dummy lens 156 is provided on the left side of the opening 160a.

[0126] Therefore, the light emitting area EA of the first subpixel SP(1) has a first flat portion FP1 where a plurality of microlenses 154 are removed. Such a first flat portion FP1 is provided only on the left side of the first subpixel SP(1).

[0127] Similarly, in the outermost subpixel on the right short side of the display area DA, i.e., the nth subpixel SP(n) of the fourth subpixel SP4 of the mth pixel P(m), the microlens 154 does not overlap with but is separated from the edge of the opening 160a adjacent to the power line PL, i.e., the right edge of the opening 160a. Moreover, in the nth subpixel SP(n), no dummy lens 156 is provided on the right side of the opening 160a.

[0128] Therefore, the light emitting area EA of the nth subpixel SP(n) has a first flat portion FP1 where a plurality of microlenses 154 are removed. Such a first flat portion FP1 is provided only on the right side of the nth subpixel SP(n).

[0129] Additionally, in each subpixel SP, the first and second overlapping portions OA1 and OA2 are not provided with microlenses 154. The thickness of the overcoat layer is relatively thin in the first and second overlapping portions OA1 and OA2 due to the double step between the two overlapping wirings. As a result, the overcoat layer and passivation layer corresponding to the microlenses 154 may be washed away during the ashing process, which may cause an electrical short between the first electrode 162 and the wirings, resulting in a bright spot defect.

[0130] Therefore, no microlenses 154 are arranged in the first and second overlapping portions OA1 and OA2. Accordingly, the microlenses 154 are spaced apart from the edges of the openings 160a corresponding to the first and second overlapping portions OA1 and OA2, i.e., the corners of the openings 160a. Furthermore, no dummy lenses 156 are provided in the first and second overlapping portions OA1 and OA2 in each subpixel SP.

[0131] The light emitting area EA of the plurality of sub-pixels SP has a second flat portion FP2 at the corner where a plurality of microlenses 154 are removed.

[0132] As described above, in the organic light emitting diode display device according to the first embodiment of the present invention, the microlenses 154 are arranged at a distance from the edge of the opening 160a adjacent to the power line PL in the first subpixel SP(1) and the n-th subpixel SP(n) arranged on the left and right edges of the display area DA. Accordingly, the light emitting areas EA of the outermost subpixels SP(1) and SP(n) on the left and right short sides of the display area DA include first flat portions FP1 from which a plurality of microlenses 154 have been removed.

[0133] On the other hand, by providing a dummy lens 156 on the outside of the opening 160a of each subpixel SP, vertical band-like unevenness can be improved, but in the first subpixel SP(1) and the nth subpixel SP(n), no dummy lens 156 is provided on the edge side of the opening 160a adjacent to the power wiring PL.

[0134] Furthermore, in each subpixel SP, the microlenses 154 are arranged so as to be spaced apart from the corners of the openings 160a corresponding to the first and second overlapping portions OA1 and OA2. Moreover, the first and second overlapping portions OA1 and OA2 are not provided with dummy lenses 156. Therefore, the light-emitting areas EA of the plurality of subpixels SP include second flat portions FP2 where a plurality of microlenses 154 have been removed from the corners, corresponding to the first and second overlapping portions OA1 and OA2.

[0135] Although Figures 4 and 5 illustrate one outermost sub-pixel SP(1), SP(n), embodiments of the present invention are not limited to this, and all sub-pixels in the first column on the left and right of the display area DA have a first flat portion FP1 in the light-emitting area EA.

[0136] Specifically, all sub-pixels in the first column on the left side of the display area DA have a first flat portion FP1 on the left side of the light-emitting area EA, and all sub-pixels in the first column on the right side of the display area DA have a first flat portion FP1 on the right side of the light-emitting area EA. The region where such first flat portions FP1 are provided is a double step region where the power wiring PL and the first auxiliary wiring AL1 overlap.

[0137] The cross-sectional structure of an organic light emitting diode display device according to a first embodiment of the present invention will be described with reference to FIGS.

[0138] Figure 7 is a cross-sectional view corresponding to line II' in Figure 4, Figure 8 is a cross-sectional view corresponding to line II-II' in Figure 5, Figure 9 is a cross-sectional view corresponding to line III-III' in Figure 6, and Figure 10 is a cross-sectional view corresponding to line IV-IV' in Figure 6, and these will be explained with reference to Figures 3 to 6.

[0139] 7 to 10, the substrate 110 includes a plurality of subpixels, i.e., first, second, third, and fourth subpixels SP1, SP2, SP3, and SP4. A power line PL, a data line DL, and a reference line RL, which are first conductive layers, are disposed on the substrate 110. A buffer layer 120 is disposed on the power line PL, the data line DL, and the reference line RL, and a gate line GL, a first auxiliary line AL1, and a second auxiliary line AL2, which are second conductive layers, are disposed on the buffer layer 120.

[0140] Here, as shown in FIG. 10, a gate insulating film 124 may be further provided between the buffer layer 120 and the second conductive layer, i.e., between the buffer layer 120 and the gate line GL, the first auxiliary line AL1, and the second auxiliary line AL2, and such gate insulating film 124 may be disposed substantially over the entire surface of the substrate 110.

[0141] The gate line GL and the first and second auxiliary lines AL1 and AL2 intersect and overlap with at least one of the power line PL, the data line DL, and the reference line RL. The first auxiliary line AL1 includes an auxiliary pattern AL1a, which is located above the power line PL and overlaps with the power line PL.

[0142] A passivation layer 140 is disposed on the gate wiring GL, the first auxiliary wiring AL1, and the second auxiliary wiring AL2.

[0143] A color filter 145 is disposed on the passivation layer 140 corresponding to the light-emitting area EA, and a portion of the color filter 145 may extend to the non-light-emitting area NEA.

[0144] The color filter 145 may include red, green, and blue filters 145R, 145G, and 145B. The red filter 145R may be disposed in the first subpixel SP1, the blue filter 145B may be disposed in the second subpixel SP2, and the green filter 145G may be disposed in the fourth subpixel SP4. No color filter may be disposed in the third subpixel SP3.

[0145] The color filters 145 may overlap adjacent wirings. Specifically, the red filter 145R may overlap a power wiring PL and one data wiring DL, the blue filter 145B may overlap another data wiring DL and a reference wiring RL, and the green filter 145G may further overlap another data wiring DL and another power wiring PL. Furthermore, each of the red filter 145R and the green filter 145G may overlap an auxiliary pattern AL1a of the adjacent first auxiliary wiring AL1.

[0146] Although the red, blue, and green filters 145R, 145B, and 145G are illustrated as being spaced apart from one another, this is not limiting. Adjacent red, blue, and green filters 145R, 145B, and 145G may overlap one another. For example, adjacent red and blue filters 145R, 145B may overlap one another, and adjacent green and red filters 145G, 145R may overlap one another.

[0147] An overcoat layer 150 is disposed on top of the color filter 145. In the light-emitting areas EA of each of the subpixels SP1, SP2, SP3, and SP4, the overcoat layer 150 has a plurality of microlenses 154 on its upper surface. Each microlens 154 includes a concave portion, and adjacent portions of two microlenses 154 form a convex portion. The microlenses 154 overlap the color filter 145 in the first, second, and fourth subpixels SP1, SP2, and SP4.

[0148] Meanwhile, in the outermost subpixel on the left short side of the display area DA, i.e., the first subpixel SP(1) of the first subpixel SP1 of the first pixel P(1), and the outermost subpixel on the right short side of the display area DA, i.e., the nth subpixel SP(n) of the fourth subpixel SP4 of the mth pixel P(m), the microlens 154 is spaced apart from the adjacent power line PL without overlapping it. Also, in the first subpixel SP(1) and the nth subpixel SP(n), the microlens 154 is spaced apart from the auxiliary pattern AL1a of the first auxiliary line AL1 above the power line PL without overlapping it.

[0149] Therefore, the light-emitting area EA of the first subpixel SP(1) and the light-emitting area EA of the n-th subpixel SP(n) have a first flat portion FP1 where a plurality of microlenses 154 are removed. In the first flat portion FP1, the overcoat layer 150 has a flat upper surface.

[0150] In the non-emitting areas NEA of each of the subpixels SP1, SP2, SP3, and SP4, dummy lenses 156 are provided on the top surface of the overcoat layer 150. The dummy lenses 156 have the same size and shape as the microlenses 154. In the first, second, and fourth subpixels SP1, SP2, and SP4, the dummy lenses 156 overlap the color filters 145.

[0151] In each of the subpixels SP1, SP2, SP3, and SP4, the dummy lens 156 is disposed on and may overlap the adjacent lines PL, DL, and RL. On the other hand, in the first subpixel SP(1) and the nth subpixel SP(n), the dummy lens 156 is not disposed on the adjacent power line PL. Accordingly, the overcoat layer 150 on the power line PL in the first subpixel SP(1) and the nth subpixel SP(n) has a flat upper surface.

[0152] 10, in each of the subpixels SP1, SP2, SP3, and SP4, the microlens 154 is spaced apart from the two overlapping lines DL and AL1 without overlapping them. That is, in each of the subpixels SP1, SP2, SP3, and SP4, the microlens 154 is spaced apart from the first and second overlapping portions OA1 and OA2. Also, in each of the subpixels SP1, SP2, SP3, and SP4, no dummy lenses 156 are provided above the first and second overlapping portions OA1 and OA2.

[0153] Therefore, the light-emitting area EA of each of the subpixels SP1, SP2, SP3, and SP4 has a second flat portion FP2 at the corner where a plurality of microlenses 154 have been removed. The second flat portion FP2 is provided corresponding to the first and second overlapping portions OA1 and OA2, and the overcoat layer 150 has a flat upper surface in the second flat portion FP2.

[0154] Next, a first electrode 162 is disposed on the overcoat layer 150 of each of the first, second, third, and fourth subpixels SP1, SP2, SP3, and SP4. The first electrode 162 overlaps the adjacent wirings PL, DL, and RL.

[0155] Furthermore, the first electrode 162 overlaps the microlens 154 and covers the microlens 154 .

[0156] On the other hand, the first electrode 162 may partially overlap at least one of the dummy lenses 156. Accordingly, an edge of the first electrode 162 may be disposed within the dummy lens 156. However, embodiments of the present invention are not limited thereto. A bank 160 is provided on the first electrode 162. The bank 160 has openings 160a corresponding to the light-emitting areas EA of the subpixels SP1, SP2, SP3, and SP4, and the first electrode 162 is exposed through the openings 160a.

[0157] In each of the first, second, third, and fourth subpixels SP1, SP2, SP3, and SP4, the bank 160 overlaps the microlens 154. Here, the bank 160 may partially overlap the microlens 154.

[0158] In addition, the bank 160 may overlap the dummy lenses 156 and cover the dummy lenses 156. Accordingly, the openings 160a of the bank 160 are spaced apart from the dummy lenses 156. In this case, at least one dummy lens 156 may completely overlap the bank 160 and be completely covered by the bank 160.

[0159] Meanwhile, in the first subpixel SP(1) and the nth subpixel SP(n), the outer edge of the opening 160a of the bank 160, i.e., the edge of the opening 160a of the bank 160 corresponding to the power line PL, is spaced apart from the microlens 154. Accordingly, in the first subpixel SP(1) and the nth subpixel SP(n), the side surface of the bank 160 corresponding to the power line PL is spaced apart from the microlens 154 and can be located on the flat upper surface of the overcoat layer 150. In addition, in the first subpixel SP(1) and the nth subpixel SP(n), the bank 160 corresponding to the power line PL does not overlap with the dummy lens 156.

[0160] 10, in each of the subpixels SP1, SP2, SP3, and SP4, the edges of the openings 160a of the banks 160 corresponding to the first and second overlapping portions OA1 and OA2 are spaced apart from the microlenses 154. Accordingly, in each of the subpixels SP1, SP2, SP3, and SP4, the sides of the banks 160 corresponding to the first and second overlapping portions OA1 and OA2 are spaced apart from the microlenses 154 and can be located on the flat upper surface of the overcoat layer 150. In addition, in each of the subpixels SP1, SP2, SP3, and SP4, the banks 160 corresponding to the first and second overlapping portions OA1 and OA2 do not overlap with the dummy lenses 156.

[0161] Next, the light-emitting layer 164 is disposed on the first electrode 162 and the bank 160. The light-emitting layer 164 is located substantially over the entire surface of the substrate 110. The light-emitting layer 164 emits white light and may have a stack structure including light-emitting portions that emit light of different colors.

[0162] A second electrode 166 is disposed on the light-emitting layer 164. The second electrode 166 is disposed over substantially the entire surface of the substrate 110.

[0163] The first electrode 162, the second electrode 166, and the light-emitting layer 164 therebetween form a light-emitting diode De.

[0164] As described above, the overcoat layer 150 has microlenses 154 on its upper surface in the light-emitting area EA, and the first electrode 162, light-emitting layer 164, and second electrode 166 disposed on the overcoat layer 150 are formed according to the morphology of the upper surface of the overcoat layer 150. Accordingly, the first electrode 162, light-emitting layer 164, and second electrode 166 also have the form of a plurality of microlenses 154 in the light-emitting area EA, and these microlenses 154 can change the traveling path of light to improve light extraction efficiency.

[0165] As described above, in the organic light emitting diode display device according to the first embodiment of the present invention, the microlenses 154 are arranged to be spaced apart from the edges of the openings 160a adjacent to the power wiring PL in the first and n-th subpixels SP(1) and SP(n) arranged on the left and right edges of the display area DA. This allows the outermost subpixels SP(1) and SP(n) on the left and right short sides of the display area DA to have the first flat portions FP1 in the light emitting area EA corresponding to the double step regions, thereby preventing the overcoat layer 150 and the passivation layer 140 from being washed away during the ashing process for forming the microlenses 154. This prevents electrical shorts between the first electrodes 162 and the power wiring PL, thereby improving image quality by preventing bright spot defects.

[0166] At this time, in the first subpixel SP(1) and the n-th subpixel SP(n), no dummy lens 156 is provided on the edge side of the opening 160a adjacent to the power supply line PL.

[0167] In addition, by arranging the microlenses 154 at a distance from the corners of the openings 160a corresponding to the first and second overlapping portions OA1 and OA2 in each subpixel SP, the light-emitting area EA of each subpixel SP has the second flat portion FP2 at the corner, which prevents the overcoat layer 150 and the passivation layer 140 from being washed away due to double steps that occur when the vertical wirings PL, DL, and RL and the horizontal wirings AL1 and AL2 cross and overlap. This prevents electrical shorts between the first electrode 162 and the lower wiring. This prevents bright spot defects and improves image quality.

[0168] At this time, the first and second overlapping portions OA1 and OA2 are not provided with dummy lenses 156.

[0169] While the above embodiments have been described with respect to pixels and sub-pixels in one row arranged in the first direction, the present invention is not limited thereto, and pixels and sub-pixels in the same column arranged in the second direction have substantially the same structures as those shown in FIGS.

[0170] In an embodiment of the present invention, the microlens in at least one sub-pixel may be arranged to rotate, and a second embodiment of the present invention will now be described with reference to FIG.

[0171] FIG. 11 is a schematic plan view of an organic light emitting diode display device according to a second embodiment of the present invention, and is an enlarged view corresponding to the A1 region of FIG.

[0172] 11, the microlens 154 provided in at least one subpixel rotates clockwise or counterclockwise with respect to the first and second directions, where the first direction is the X direction and the second direction is the Y direction.

[0173] For example, the microlenses 154 may be rotated clockwise at an angle θ relative to the first and second directions, such that a line connecting the centers of adjacent microlenses 154 has an angle θ relative to the first and / or second directions.

[0174] Here, the angle θ can be selected in the range of greater than or equal to 0 degrees and less than 60 degrees.

[0175] At this time, the microlenses 154 of all the sub-pixels may be rotated, and in this case, the microlenses 154 of adjacent sub-pixels have different rotation angles.

[0176] For example, the microlenses 154 in 20 sub-pixels arranged in a matrix may be rotated clockwise or counterclockwise at rotation angles of 3 degrees each and randomly arranged, but the present invention is not limited thereto.

[0177] As described above, in the organic light emitting diode display device according to the second embodiment of the present invention, the microlenses 154 in at least one subpixel are arranged at a specific angle relative to the first and second directions. Accordingly, the diffraction pattern of the reflected light generated by the regular arrangement of the microlenses 154 is canceled or minimized, or the diffraction pattern of the reflected light becomes irregular or random, thereby suppressing or minimizing the occurrence of a rainbow pattern in the radiation form of the reflected light and a circular ring pattern in the radiation form. Therefore, the image quality of the display device can be improved.

[0178] The organic light emitting diode display device according to the third embodiment of the present invention may include a flat portion for measuring the size of the bank opening. Such an organic light emitting diode display device according to the third embodiment of the present invention will be described with reference to FIG.

[0179] 12 is a schematic plan view of an organic light emitting diode display device according to a third embodiment of the present invention, and is an enlarged view corresponding to area A2 of FIG. 6, and will be described with reference to both FIG. 6 and FIG. 9. The organic light emitting diode display device according to the third embodiment of the present invention has substantially the same configuration as the first embodiment except for a flat portion for measuring the size of the bank opening, and the same parts are denoted by the same reference numerals, and description thereof will be omitted or simplified.

[0180] As shown in FIG. 12, at least one of the first, second, third, and fourth sub-pixels SP1, SP2, SP3, and SP4 has at least one third flat portion FP3 in the light-emitting area EA.

[0181] For example, the first subpixel SP1 may have two third flat portions FP3 in the light-emitting area EA.

[0182] The two third flat portions FP3 are disposed on opposite sides of the light-emitting area EA in the first direction and may be aligned on the same line. No microlenses 154 are disposed in the third flat portion FP3, and the overcoat layer 150 has a substantially flat upper surface in the third flat portion FP3.

[0183] In addition, in the first subpixel SP1, the opposing side surfaces of the bank 160 are placed on the two third flat portions FP3, respectively.

[0184] These two third flat portions FP3 can be used to measure the size of the opening 160a of the bank 160.

[0185] The size of the opening 160a of the bank 160 determines the size of the light-emitting area EA and the number of microlenses 154. However, if the size of the opening 160a is formed smaller than a set range, the number of microlenses 154 contributing to light extraction may decrease, resulting in a decrease in light extraction efficiency. Therefore, it is necessary to manage the size of the opening 160a within a specific range.

[0186] At this time, the size of the openings 160a is measured by capturing an optical image of the patterned bank 160, but the captured optical image may be distorted by the microlenses 154. Therefore, in the third embodiment of the present invention, a third flat portion FP3 is provided in the light-emitting area EA where the microlenses 154 are not substantially disposed, and the boundary of the light-emitting area EA, i.e., the boundary of the openings 160a, is positioned on the third flat portion FP3, so that the size of the openings 160a of the bank 160 and the distance between the openings 160a, i.e., the width of the bank 160, can be accurately measured without gray level distortion.

[0187] The third flat portion FP3 may have an area equal to or larger than four microlenses 154, and may have an area equal to or smaller than nine microlenses 154, but is not limited thereto.

[0188] Meanwhile, the third flat portion FP3 has a size different from that of the first flat portion FP1 provided in the light emitting area EA of the first subpixel SP(1) in FIG. 4 and the nth subpixel SP(n) in FIG.

[0189] As described above, in the third embodiment of the present invention, at least a portion of the top surface of the overcoat layer 150 in the light-emitting area EA is provided with the flat third flat portion FP3, and the side surface of the bank 160 is positioned on the third flat portion FP3, thereby enabling accurate measurement of the size of the opening 160a and the width of the bank 160 without gray level distortion. Accordingly, the opening 160a of the bank 160 can be controlled within a specific range, thereby preventing a decrease in the light extraction efficiency of the display device.

[0190] In the organic light emitting diode display device according to the fourth embodiment of the present invention, the openings of the first electrode and the bank may have at least one chamfered structure. Such an organic light emitting diode display device according to the fourth embodiment of the present invention will be described with reference to FIGS. 13 and 14.

[0191] Figure 13 is a schematic plan view of an organic light emitting diode display device according to a fourth embodiment of the present invention, and Figure 14 is a cross-sectional view corresponding to line V-V' in Figure 13, and Figures 13 and 14 illustrate one of the second pixel to the (m-1)th pixel. The organic light emitting diode display device according to the fourth embodiment of the present invention has substantially the same configuration as the first embodiment except for the chamfered structure, and the same parts are assigned the same reference numerals, and description thereof will be omitted or simplified.

[0192] As shown in Figures 13 and 14, in the organic light emitting diode display device according to the fourth embodiment of the present invention, the first electrodes 162 and the openings 160a of the banks 160 of the first, second, third, and fourth sub-pixels SP1, SP2, SP3, and SP4 may have a chamfered structure at at least one corner.

[0193] Specifically, in each of the subpixels SP1, SP2, SP3, and SP4, the first electrode 162 and the opening 160a of the bank 160 have a chamfered structure corresponding to the first and second overlapping portions OA1 and OA2. In this case, the corners of the first electrode 162 and the opening 160a of the bank 160 may be partially removed in an angular shape and may be recessed toward the light-emitting area EA.

[0194] The microlenses 154 and dummy lenses 156 are not provided to correspond to such a chamfered structure. Accordingly, the microlenses 154 are arranged apart from the edge of the bank 160 having the chamfered structure. In addition, the microlenses 154 are arranged apart from the edge of the first electrode 162 having the chamfered structure.

[0195] Therefore, the light-emitting area EA of each of the subpixels SP1, SP2, SP3, and SP4 has a second flat portion FP2 corresponding to the chamfered structure, and the overcoat layer 150 has a flat upper surface in the second flat portion FP2.

[0196] Although the first electrode 162 and the opening 160a of the bank 160 are illustrated as having angular chamfered structures, embodiments of the present invention are not limited thereto. Alternatively, the first electrode 162 and the opening 160a of the bank 160 may each have a curved or oblique chamfered structure corresponding to the first and second overlapping portions OA1 and OA2.

[0197] As described above, in the organic light emitting diode display device according to the fourth embodiment of the present invention, the first electrode 162 and the bank opening 160a each have a chamfered structure that is recessed toward the light emitting area EA corresponding to the first and second overlapping portions OA1 and OA2. This allows the first electrode 162 and the lower wiring to be spaced apart without overlapping with each other corresponding to the first and second overlapping portions OA1 and OA2, thereby further preventing electrical short circuits between the first electrode 162 and the lower wiring due to double steps in the wiring.

[0198] Although the present invention has been described above with reference to preferred embodiments, it will be understood by those skilled in the art that various modifications and variations can be made to the present invention without departing from the technical spirit and scope of the present invention as set forth in the claims below. [Explanation of symbols]

[0199] SP: Subpixel EA: Emitting area NEA: Non-Emitting Area GL: Gate wiring DL: Data wiring PL: Power wiring RL: Reference wiring AL1: First auxiliary wiring AL1a: Auxiliary pattern AL2: Second auxiliary wiring 154: Microlens 156: Dummy lens 160: Bank 160a: opening 162: 1st electrode

Claims

1. a substrate including a display area and a non-display area outside the display area; a plurality of sub-pixels each having a light-emitting region and a non-light-emitting region within the display region; an overcoat layer including a plurality of microlenses in the light-emitting region of each of the sub-pixels; In the outermost subpixel of the plurality of subpixels, the overcoat layer includes a first flat portion in which some of the microlenses are removed in the light-emitting region; The organic light-emitting diode display device, wherein the first flat portion is provided on a first side surface of the outermost sub-pixel, but is not provided on a second side surface of the outermost sub-pixel opposite to the first side surface.

2. The organic light emitting diode display device of claim 1 , wherein the first flat portion is provided for each of the outermost sub-pixels on the left and right short sides of the display area.

3. 2. The organic light emitting diode display device of claim 1, further comprising first vertical lines arranged in left and right short side directions of the display area, wherein the microlenses of the outermost subpixels are spaced apart from the first vertical lines.

4. 4. The organic light emitting diode display device of claim 3, further comprising a second vertical wiring disposed between the outermost subpixel and a subpixel disposed adjacent to the outermost subpixel in the horizontal direction, wherein the microlens of the subpixel disposed adjacent to the outermost subpixel in the horizontal direction overlaps with the second vertical wiring.

5. 2. The organic light emitting diode display device of claim 1, wherein the first flat portion is provided only on the left side of the outermost subpixel on a left short side of the display area and only on the right side of the outermost subpixel on a right short side of the display area.

6. The organic light emitting diode display device according to claim 1 , wherein the overcoat layer further comprises a second flat portion at a corner of the light emitting region where some of the microlenses are removed, in the plurality of sub-pixels.

7. 7. The organic light emitting diode display device of claim 6, further comprising: a plurality of horizontal lines horizontally arranged adjacent to or overlapping the plurality of sub-pixels; and a plurality of vertical lines arranged between the light emitting regions of the plurality of sub-pixels, wherein the second flat portion is arranged in an area where the horizontal lines and the vertical lines overlap.

8. Wiring provided between the substrate and the overcoat layer; a bank provided on the overcoat layer and having an opening corresponding to the light-emitting region; The organic light emitting diode display device according to claim 6 , wherein the bank overlaps both sides of the wiring, and the first flat portion does not overlap the wiring but is spaced apart from the wiring.

9. a substrate provided with a plurality of sub-pixels each having a light-emitting region and a non-light-emitting region; a circuit section including a thin film transistor, the circuit section being disposed in the non-light-emitting region above the substrate; an overcoat layer disposed on the thin film transistor and including a plurality of microlenses in the light-emitting region; a light emitting diode disposed in the light emitting region above the overcoat layer and connected to the thin film transistor; a bank having an opening corresponding to the light-emitting region; the plurality of sub-pixels include first to n-th sub-pixels (n is an integer greater than 1) sequentially arranged along a first direction, the bank has first and second side surfaces facing each other along the first direction in each of the first to n-th subpixels; In the first subpixel, the microlens is spaced apart from a first side surface of the bank and overlaps a second side surface of the bank; In the nth subpixel, the microlens overlaps a first side of the bank and is spaced apart from a second side of the bank.

10. at least one horizontal wiring arranged on an upper portion of the substrate along the first direction; at least one vertical wiring arranged along a second direction and overlapping with the at least one horizontal wiring to form an overlapping portion; 10. The organic light emitting diode display device of claim 9, wherein the microlens is spaced apart from the overlapping portion in each of the first to n-th subpixels.

11. 11. The organic light emitting diode display device of claim 10, wherein the microlens is spaced apart from a corner of the opening of the bank adjacent to the overlapping portion in each of the first to n-th subpixels.

12. the light emitting diode includes a first electrode, a light emitting layer, and a second electrode; 12. The organic light-emitting diode display device according to claim 11, wherein in each of the first to n-th subpixels, a corner of each of the openings of the first electrode and the bank corresponding to the overlapping portion is recessed toward the light-emitting region.

13. the at least one horizontal wiring includes a gate wiring and an auxiliary wiring; the at least one vertical wiring includes a power wiring, a data wiring, and a reference wiring; The organic light emitting diode display device of claim 10 , wherein the auxiliary wiring overlaps with at least one of the power wiring, the data wiring, and the reference wiring to form the overlapping portion.

14. The organic light emitting diode display device of claim 9 , wherein the overcoat layer further comprises a dummy lens provided in the non-light emitting region, the dummy lens being spaced apart from the opening.

15. In the first subpixel, the dummy lens is provided only in the non-light-emitting region corresponding to the second side surface of the bank; The organic light emitting diode display device according to claim 14 , wherein in the nth subpixel, the dummy lens is provided only in the non-light emitting region corresponding to the first side surface of the bank.

16. The organic light-emitting diode display device according to claim 14 , wherein the dummy lenses have the same size and shape as the microlenses.

17. 10. The organic light emitting diode display device of claim 9, wherein the microlenses in at least one of the first to n-th sub-pixels are rotated such that a line connecting the centers of adjacent microlenses has a specific angle with respect to the first direction.

18. 18. The organic light emitting diode display device according to claim 17, wherein the rotation angle of the microlenses is greater than or equal to 0 degrees and less than 60 degrees.

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