Micro-luminescent display device and manufacturing method thereof

The micro light-emitting display device addresses the challenge of size and resolution by optimizing the layout and connections of transistors and capacitors, achieving reduced element size and increased PPI with a larger capacitor area.

JP7750607B2Active Publication Date: 2025-10-07SAMSUNG ELECTRONICS CO LTD
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Patent Information

Application Number
JP2021163432
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-10-05
Filing Date
2021-10-04
Publication Date
2025-10-07
Estimated Expiration
2041-10-04

AI Technical Summary

Technical Problem

Existing micro light-emitting display devices face challenges in reducing the size of micro light-emitting elements and increasing pixel per inch (PPI) while maintaining sufficient capacitor area within the same subpixel.

Method used

A micro light-emitting display device design that includes a micro light-emitting element with a driving transistor, a switching transistor, a capacitor, and specific via holes and metal line configurations, allowing for reduced size and increased PPI by optimizing the layout and connections of these components.

Benefits of technology

The solution enables a reduction in the size of micro light-emitting elements to 100 μm or less, increases PPI, and secures a larger capacitor area, thereby enhancing the display's resolution and reducing production costs.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a micro light emitting display device and manufacturing method of the micro light emitting display device.SOLUTION: The present invention relates to a micro light emitting display device and manufacturing method of the micro light emitting display device, and the micro light emitting display device includes: a micro light emitting element; a drive transistor that applies a voltage to the micro light emitting element; a switching transistor that is coupled to a gate electrode of the drive transistor; and a first veer hole that is provided so that a source area of the switching transistor, or a drain area thereof is exposed, in which the gate electrode of the drive transistor is provided in the first veer, and the gate electrode of the drive transistor is adapted so as to contact with the source area of the switching transistor or the drain area thereof.SELECTED DRAWING: Figure 4
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Description

[Technical Field]

[0001] The present invention relates to a micro-emissive display device and a method for manufacturing the same. [Background technology]

[0002] Liquid crystal displays (LCDs) and organic light emitting diode (OLED) displays are widely used as display devices. Recently, the technology of using micro LEDs (micro light emitting diodes) to create high-resolution display devices has been attracting attention. Light emitting diodes (LEDs) have the advantages of low power consumption and being environmentally friendly. Due to these advantages, industrial demand for them is increasing.

[0003] Micro light emitting devices are used not only for lighting devices and LCD backlights, but also for LED display devices. That is, display devices using micro LED chips are being developed. In addition, due to the demand for larger display areas and higher resolutions, the number of micro light emitting devices used in display devices is increasing, while the size of the micro light emitting devices is becoming smaller. Summary of the Invention [Problem to be solved by the invention]

[0004] The problem to be solved by the present invention is to provide a micro-luminescent display device. Another problem to be solved by the present invention is to provide a method for manufacturing a micro-luminescent display device. [Means for solving the problem]

[0005] A micro light-emitting display device according to an exemplary embodiment includes a micro light-emitting element, a driving transistor that applies a voltage to the micro light-emitting element, a switching transistor connected to a gate electrode of the driving transistor, a capacitor connected to the driving transistor and the switching transistor, and a first via hole that exposes a source region or a drain region of the switching transistor, wherein the gate electrode of the driving transistor is provided in the first via hole and is configured to contact the source region or the drain region of the switching transistor.

[0006] The micro light-emitting display device may further include an insulating layer provided on the gate electrode of the driving transistor, and a first electrode of the capacitor provided on the insulating layer and arranged opposite the gate electrode of the driving transistor.

[0007] The first electrode of the capacitor is also a flat plate type. The gate electrode of the driving transistor and the first electrode of the capacitor face each other but are spaced apart from each other.

[0008] The source or drain region of the switching transistor may include an implantation region. The micro-luminescent element may have a size of 100 μm or less.

[0009] The micro light emitting display device may further include an anode electrode provided in the micro light emitting element, a second via hole provided to expose the anode electrode, and a metal line provided in the second via hole.

[0010] The metal line includes a first portion provided inside the second via hole and a second portion provided outside the second via hole, and is also configured so that the drain region of the driving transistor contacts the first portion.

[0011] The second via hole may also be provided through the drain region of the driving transistor. The gate electrode of the driving transistor is also shared with the second electrode of the capacitor.

[0012] According to another exemplary embodiment, a micro light-emitting display device includes a substrate, a micro light-emitting element provided on the substrate, an anode electrode provided on the micro light-emitting element, a driving transistor for applying a voltage to the micro light-emitting element, a switching transistor connected to a gate electrode of the driving transistor, a capacitor connected to the driving transistor and the switching transistor, a second via hole provided to expose the anode electrode, and a metal line provided in the second via hole, wherein the second via hole is configured to penetrate a drain region of the driving transistor, the metal line contacts the anode electrode, and the drain region of the driving transistor contacts a side of the metal line.

[0013] A method for manufacturing a micro light-emitting display device according to an exemplary embodiment may include forming a micro light-emitting element on a substrate; forming an anode electrode on the micro light-emitting element in a subpixel unit; forming a first active pattern including a source region and a drain region of a driving transistor and a second active pattern including a source region and a drain region of a switching transistor in a layer in which the anode electrode is located; forming a first insulating layer on the first active pattern and the second active pattern; forming a first via hole in the first insulating layer to expose the source region or the drain region of the switching transistor; and forming a gate electrode of the driving transistor in the first via hole and contacting the gate electrode of the driving transistor to the source region or the drain region of the switching transistor.

[0014] The manufacturing method may further include forming a second insulating layer on the gate electrode of the driving transistor, and forming a first electrode of the capacitor on the second insulating layer. The manufacturing method may further include forming an anode electrode on the micro light emitting device, forming a second via hole to expose the anode electrode, and forming a metal line in the second via hole. [Effects of the Invention]

[0015] The micro light emitting display device according to the exemplary embodiment can reduce the size of the micro light emitting element and increase the pixel per inch (PPI). For example, the PPI can be increased with the same wiring line and space. Furthermore, the micro light emitting display device according to the exemplary embodiment can secure a relatively large capacitor area within the same subpixel, thereby increasing the capacitor capacitance.

[0016] The method for manufacturing a micro-emissive display device according to the exemplary embodiment can provide a method for increasing PPI. [Brief explanation of the drawings]

[0017] [Figure 1] 1 is a diagram illustrating a schematic diagram of a micro-luminescent display device according to an exemplary embodiment. [Figure 2] FIG. 1 illustrates a circuit diagram of a micro-luminescent display device according to an exemplary embodiment. [Figure 3] FIG. 1 illustrates a schematic circuit layout of a micro-emissive display device according to an exemplary embodiment. [Figure 4] FIG. 4 is a cross-sectional view taken along line AA in FIG. 3. [Figure 5] 1 illustrates a circuit layout of an active pattern layer of a micro-emissive display device according to an exemplary embodiment. [Figure 6]FIG. 2 illustrates a circuit layout of the first metal layer of a micro-luminescent display device according to an exemplary embodiment. [Figure 7] FIG. 7 is a cross-sectional view taken along line BB in FIG. 6. [Figure 8] 7 is a diagram illustrating a via hole structure in the first metal layer illustrated in FIG. 6. [Figure 9] FIG. 9 is a cross-sectional view taken along line CC in FIG. 8. [Figure 10] FIG. 2 illustrates a circuit layout of the second metal layer of a micro-luminescent display device according to an exemplary embodiment. [Figure 11] FIG. 11 is a cross-sectional view taken along line DD in FIG. 10. [Figure 12] 1 is a diagram illustrating a first via hole structure of a micro light-emitting display device according to an exemplary embodiment. [Figure 13] FIG. 13 is a diagram illustrating a comparative example to be compared with the structure illustrated in FIG. 12. [Figure 14] 10A and 10B are diagrams illustrating second via hole structures of a micro light-emitting display device according to an exemplary embodiment; [Figure 15] FIG. 15 is a diagram illustrating a comparative example to be compared with the structure illustrated in FIG. 14. [Figure 16] 1A-1C illustrate a method for manufacturing a micro-luminescent display device according to an exemplary embodiment. [Figure 17] 1A-1C illustrate a method for manufacturing a micro-luminescent display device according to an exemplary embodiment. [Figure 18] 1A-1C illustrate a method for manufacturing a micro-luminescent display device according to an exemplary embodiment. [Figure 19] 1A-1C illustrate a method for manufacturing a micro-luminescent display device according to an exemplary embodiment. [Figure 20] 1A-1C illustrate a method for manufacturing a micro-luminescent display device according to an exemplary embodiment. [Figure 21] 1A-1C illustrate a method for manufacturing a micro-luminescent display device according to an exemplary embodiment. [Figure 22]1A-1C illustrate a method for manufacturing a micro-luminescent display device according to an exemplary embodiment. [Figure 23] 1A-1C illustrate a method for manufacturing a micro-luminescent display device according to an exemplary embodiment. [Figure 24] 1A-1C illustrate a method for manufacturing a micro-luminescent display device according to an exemplary embodiment. [Figure 25] 1A-1C illustrate a method for manufacturing a micro-luminescent display device according to an exemplary embodiment. [Figure 26] 1A-1C illustrate a method for manufacturing a micro-luminescent display device according to an exemplary embodiment. [Figure 27] 1 is a diagram illustrating an example in which a micro light emitting display device according to various embodiments is applied; [Figure 28] 1 is a diagram illustrating an example in which a micro light emitting display device according to various embodiments is applied; [Figure 29] 1 is a diagram illustrating an example in which a micro light emitting display device according to various embodiments is applied; [Figure 30] 1 is a diagram illustrating an example in which a micro light emitting display device according to various embodiments is applied; [Figure 31] 1 is a diagram illustrating an example in which a micro light emitting display device according to various embodiments is applied; [Figure 32] 1 is a diagram illustrating an example in which a micro light emitting display device according to various embodiments is applied; [Figure 33] 1 is a diagram illustrating an example in which a micro light emitting display device according to various embodiments is applied; [Figure 34] 1 is a diagram illustrating an example in which a micro light emitting display device according to various embodiments is applied; [Figure 35] 1A and 1B are diagrams illustrating examples in which micro light emitting display devices according to various embodiments are applied; DETAILED DESCRIPTION OF THE INVENTION

[0018] Hereinafter, a micro-luminescent display device and a manufacturing method thereof according to various embodiments will be described in detail with reference to the accompanying drawings. In the following drawings, the same reference numerals refer to the same components, and the size of each component may be exaggerated in the drawings for clarity and convenience. Terms such as "first" and "second" are also used to describe various components, but the components are not limited by the terms. The terms are used only to distinguish one component from another.

[0019] The singular expression includes the plural expression unless the context clearly dictates otherwise. Furthermore, when a part "comprises" a certain element, it does not mean that it excludes other elements, but that it may further include other elements, unless otherwise specified. In the drawings, the size and thickness of each element may be exaggerated for clarity. Furthermore, when a certain material layer is described as existing on a substrate or another layer, the material layer may be in direct contact with the substrate or other layer, or a third layer may be present between them. In the following embodiments, the materials constituting each layer are merely examples, and other materials may also be used.

[0020] Furthermore, terms such as "unit" and "module" used in the specification refer to a unit that processes at least one function or operation, and may be implemented by hardware or software, or a combination of hardware and software.

[0021] The specific implementations described in this embodiment are illustrative and are not intended to limit the technical scope in any way. For the sake of brevity, descriptions of conventional electronic configurations, control systems, software, and other functional aspects of the system may be omitted. Furthermore, wire connections or connecting members between components shown in the drawings are illustrative of functional connections and / or physical or circuit connections, and in an actual device, various functional connections, physical connections, or circuit connections may be shown as alternatives or additions.

[0022] Use of the term "said" and similar referents refers to both the singular and the plural.

[0023] The steps constituting the method may be performed in any suitable order unless there is an explicit reference to performing them in the order described. Furthermore, the use of all exemplary terms (such as, for example, etc.) is merely for the purpose of describing the technical idea in detail, and such terms do not limit the scope of the rights, except as limited by the claims.

[0024] 1 and 2 are equivalent circuit diagrams of circuits for driving a micro-luminescent display device according to an embodiment, respectively.

[0025] The display device 100 may include a sub-pixel SP, a power driver 101, a scan driver 102, and a data driver 103.

[0026] The sub-pixels SP may include light-emitting elements that emit light of different wavelengths or only one wavelength. The power driver 101 supplies voltage to the light-emitting elements of the sub-pixels SP. The scan driver 102 generates a scan signal that forms a channel of a switching transistor. The switching transistor can turn on and off each sub-pixel SP. The data driver 103 generates a data signal that forms a channel of a driving transistor. The driving transistor can adjust the amount of current supplied to each sub-pixel SP to adjust the brightness of the light-emitting element.

[0027] The sub-pixels SP are also arranged in a matrix, for example, and are provided in areas where the scan lines SL connected to the scan driver 102, the data lines DL connected to the data driver 103, and the driving voltage lines PL connected to the power driver 101 intersect with each other.

[0028] FIG. 2 illustrates an example of a circuit of a subpixel SP. Referring to FIG. 2, the subpixel SP may include a first transistor T1, a second transistor T2, a capacitor Cst, and a light-emitting element ED. The first transistor T1 may be, for example, a driving transistor, and the second transistor T2 may be, for example, a switching transistor. However, the present invention is not limited thereto. The switching transistor T2 is connected to a scan line SL and a data line DL and may transmit a data signal input via the data line DL to the driving transistor T1 in response to a scan signal input via the scan line SL.

[0029] The capacitor Cst is also connected to the driving transistor T1 and the switching transistor T2. The capacitor Cst is connected to the switching transistor T2 and the driving voltage line PL, and stores a voltage corresponding to the difference between the voltage transferred from the switching transistor T2 and the driving voltage VDD supplied via the driving voltage line PL.

[0030] The driving transistor T1 is connected to the driving voltage line PL and the capacitor Cst and controls a driving current flowing from the driving voltage line PL to the light emitting element ED in response to a voltage stored in the capacitor Cst. The driving transistor T1 applies a voltage to the light emitting element ED. The light emitting element ED may include, for example, a micro light emitting element. The light emitting element ED may have a size of, for example, 200 μm or less. Alternatively, the light emitting element ED may have a size of, for example, 100 μm or less. The light emitting element ED may emit light having a predetermined brightness in response to the driving current.

[0031] Although FIG. 2 illustrates a case where the subpixel circuit includes two transistors and one capacitor, the present invention is not limited to this.

[0032] The driving transistor T1 may include a gate terminal connected to a first node N1, a second terminal connected to a second node N2, and a third terminal connected to the light emitting element ED. The second terminal may be, for example, a source terminal, and the third terminal may also be a drain terminal. The switching transistor T2 may include a gate terminal connected to a scan line SL, a fourth terminal (e.g., a drain terminal) connected to a data line DL, and a fifth terminal (e.g., a source terminal) connected to the first node N1 (or the gate terminal of the driving transistor T1). The switching transistor T2 is also connected to the gate electrode of the driving transistor T1. The switching transistor T2 is turned on by a scan signal transmitted through the scan line SL and performs a switching operation of transmitting a data signal transmitted to the data line DL to the first node N1. The capacitor Cst may include a first electrode connected to the first node N1 and a second electrode connected to a second node N2 (driving voltage line PL).

[0033] The light emitting element ED includes a pixel electrode and a common electrode facing the pixel electrode, and the common electrode may be applied with a common voltage VSS. The common voltage VSS may be, for example, a ground voltage. The light emitting element ED receives a driving current from the driving transistor T1 and emits light of a predetermined color to display an image. The common electrode may be provided in common to a plurality of sub-pixels.

[0034] 2, the transistors of the pixel circuit are illustrated as P-type transistors, but the embodiment of the present invention is not limited thereto. For example, the transistors of the pixel circuit may also be N-type transistors, and various embodiments are possible, such as some being P-type transistors and other being N-type transistors.

[0035] For example, the anode electrode (pixel electrode) of the light emitting element ED may be electrically connected to the drain region of the driving transistor T1, and the amount of current flowing through the driving transistor T1 may be controlled by a data signal applied via the switching transistor T2.

[0036] The cathode electrode (common electrode) of the light emitting element ED may be electrically connected to the ground voltage VSS. The light emitting element ED may generate light in response to the current provided by the driving transistor T1. For example, the light emitting element ED may include a micro LED.

[0037] The data lines DL receive data signals from the data driver 102 and transmit the data signals to the sub-pixels SP. At this time, the data lines DL transmit the data signals to the sub-pixels SP in response to scan signals. The luminance of the light-emitting element ED of each sub-pixel SP can be controlled by the amount of current supplied from the driving voltage lines PL to the ground power supply VSS via the light-emitting element ED in response to the data signals.

[0038] FIG. 3 shows a circuit layout of a micro-luminescent display device according to an exemplary embodiment, and FIG. 4 shows two consecutive cross-sectional views taken along line AA of FIG.

[0039] A micro-luminescent display device may include, for example, a plurality of sub-pixels SP. A pixel can represent a basic unit for displaying color in a display device. For example, one pixel may include sub-pixels emitting first, second, and third color lights, and display a color using the first, second, and third color lights. For example, the first color light may include red light, the second color light may include green light, and the third color light may include blue light. However, the color lights are not limited thereto. The pixel may also include a plurality of sub-pixels emitting each color light. Each of the sub-pixels may be electrically driven independently.

[0040] Referring to Fig. 3, the subpixel SP may include, for example, a first subpixel SP1 and a second subpixel SP2. The micro light emitting display device may include multiple layers, each of which may include a required circuit layout. Referring to Fig. 4, the micro light emitting display device may include a micro light emitting element array LEA, an active pattern layer AL provided on the micro light emitting element array LEA, a first metal layer ML1 provided on the active pattern layer AL, and a second metal layer ML2 provided on the first metal layer ML1.

[0041] The micro light emitting element array LEA may include a plurality of micro light emitting elements. The micro light emitting element may include a first semiconductor layer 120, a light emitting layer 125 provided on the first semiconductor layer 120, and a second semiconductor layer 128 provided on the light emitting layer 125.

[0042] The first semiconductor layer 120 may also include a first-type semiconductor. For example, the first semiconductor layer 120 may include an n-type semiconductor. Alternatively, the first semiconductor layer 120 may include a p-type semiconductor. The first semiconductor layer 120 may include an n-type III-V group semiconductor, for example, n-GaN. Alternatively, the first semiconductor layer 120 may be an AlN layer or an Al x Ga 1-x The first semiconductor layer 120 may include N layers, where 0≦x≦1. The first semiconductor layer 120 may have a single-layer structure or a multi-layer structure.

[0043] The first light emitting layer 125 may generate light as electrons and holes recombine. The first light emitting layer 125 may have a multi-quantum well (MQW) structure or a single-quantum well (SQW) structure. The first light emitting layer 125 may include a III-V semiconductor, for example, GaN. The first light emitting layer 125 may have a multi-quantum well structure in which an InGaN layer and a GaN layer are stacked one on top of the other.

[0044] The second semiconductor layer 128 may include a second-type semiconductor layer. For example, the second semiconductor layer 128 may include a p-type semiconductor layer. If the first semiconductor layer 120 is n-type, the second semiconductor layer 128 is also p-type. The second semiconductor layer 128 may be, for example, a GaN layer, an AlN layer, or an Al x Ga 1-x It may include an N (0≦x≦1) layer. For example, as a p-type dopant, Mg, Ca, Zn, Cd, Hg, etc. may be used.

[0045] The micro light emitting element array LEA may further include isolation structures 115 configured to define a plurality of subpixels SP. The isolation structures 115 may include, for example, ion-implanted regions. Here, the ions may include, for example, nitrogen (N) ions, boron (B) ions, argon (Ar) ions, or phosphorus (P) ions. When the isolation structures 115 are configured using ion-implanted regions, the light emitting layer 125 may be formed without a mesa structure because no current is injected into the ion-implanted regions, preventing light from being emitted. Alternatively, the isolation structures 115 may include etching regions that physically isolate subpixels SP using an etching process. Alternatively, the isolation structures 115 may be implemented in various ways. The substrate 110 may be, for example, a silicon substrate, a glass substrate, a sapphire substrate, or a silicon substrate coated with SiO 2 . The substrate 110 may be removed.

[0046] A first electrode 131 may be provided on the second semiconductor layer 128. The first electrode 131 may also be, for example, an anode electrode. A first insulating layer 147 may be provided on the first electrode 131.

[0047] Figures 5, 6, 8, and 10 show the circuit layout of each layer. Figure 5 shows the circuit layout of the active pattern layer AL. Figure 6 shows the circuit layout of the first metal layer ML1. Figures 8 and 9 show the via hole structure that electrically connects the first metal layer ML1 to the second metal layer ML2 (described later). Figure 10 shows the circuit layout of the second metal layer ML2 provided on the first metal layer ML1.

[0048] 3, 4, and 5, in the first sub-pixel SP1 and the second sub-pixel SP2, the active pattern layer AL may include a first active pattern 130 and a second active pattern 140. The first active pattern 130 and the second active pattern 140 may include, for example, p-Si (polysilicon).

[0049] The first active pattern 130 may include, for example, a source region 132, a channel 133, and a drain region 135 of the switching transistor T2 (FIG. 2). The positions of the source region 132 and the drain region 135 may be changed. The channel 133 is also a region facing a corresponding gate electrode 152 (FIG. 6), which will be described later. The source region 132 and the drain region 135 are shown only as approximate regions, and the source region 132 and the drain region 135 are also defined by electrical connection structures.

[0050] The second active pattern 140 may include, for example, a drain region 141, a channel 143, and a source region 145 of the driving transistor T1 (FIG. 2). The channel 143 is also a region facing a corresponding gate electrode 155 (FIG. 6), which will be described later. The source region 145 may be shared by, for example, the first sub-pixel SP1 and the second sub-pixel SP2. The first active pattern 130 and the second active pattern 140 may be spaced apart and may have various shapes.

[0051] 4 and 6, a second insulating layer 148 may be stacked on the first active pattern 130 and the second active pattern 140. A first via hole 153 may be formed in the second insulating layer 148 to expose the source region 132 of the first active pattern 130. For example, an implantation region 154 may be further formed in the source region 132 exposed through the first via hole 153. The implantation region 154 may reduce the resistance of a gate electrode 155, which will be described later. The first via hole 153 may be formed before the second metal layer ML2 is formed.

[0052] The first metal layer ML1 may include a scan line 151 and a gate electrode 152 of the switching transistor. The scan line 151 and the gate electrode 152 may be connected. A region of the first active pattern 130 facing the gate electrode 152 of the switching transistor also serves as a channel 133. Here, an example in which the scan line 151 and the gate electrode 152 are integrally formed is illustrated. The first metal layer ML1 may further include a gate electrode 155 of the driving transistor. A region of the second active pattern 140 facing the gate electrode 155 also serves as a channel 143. The gate electrode 155 may be provided in the first via hole 153 and may contact the source region (or drain region) 132 of the switching transistor. The gate electrode 155 may include a first portion 155A provided inside the first via hole 153 and a second portion 155B provided outside the first via hole 153.

[0053] Figure 7 is a cross-sectional view taken along line BB in Figure 6. Referring to Figure 7, an implantation region 154 is provided in a region where the gate electrode 155 contacts the source region 132 of the switching transistor, thereby reducing the resistance of the gate electrode 155. Meanwhile, the gate electrode 155 may also correspond to the second electrode (e.g., the lower electrode) of a capacitor. That is, the gate electrode 155 and the second electrode of the capacitor may be integrally formed.

[0054] 8, a third insulating layer 159 may be formed on the first metal layer ML1. A second via hole 160 may be formed in the third insulating layer 159. A first electrode 131 of the light emitting element may be exposed through the second via hole 160. A third via hole 162 and a fourth via hole 164 may also be formed in the third insulating layer 159. A drain region 135 of the switching transistor may be exposed through the third via hole 162, and a source region 145 of the driving transistor may be exposed through the fourth via hole 164.

[0055] Figure 9 is a cross-sectional view taken along line CC in Figure 8. The light emitting element portion is omitted in Figure 9. Referring to Figure 9, a second via hole 160 is also provided to penetrate the first insulating layer 147, the second insulating layer 148, and the third insulating layer 159 and to penetrate the drain region 141 of the driving transistor, exposing the first electrode 131 of the light emitting element.

[0056] FIG. 10 illustrates the second metal layer ML2. Referring to FIGS. 4 and 10, the second metal layer ML2 may include, for example, a data line 172, a driving voltage line 174, and a third electrode 176 of a capacitor. The third electrode 176 may also serve as, for example, an upper electrode of the capacitor. The second metal layer ML2 may also include a metal line 178 provided in the second via hole 160. The data line 172 may also be provided, for example, on one side of each of the subpixels SP1 and SP2 in the Y direction of the drawing. The driving voltage line 174 may also be provided in a central region where the first subpixel SP1 and the second subpixel SP2 meet. However, this is not limiting. The driving voltage line 174 may be connected to a second electrode 176 of the capacitor. Here, an example is illustrated in which the driving voltage line 174 and the second electrode 176 of the capacitor are integrally formed.

[0057] A data line 172 is also coupled to the drain region 135 of the switching transistor through a third via hole 162 , and a driving voltage line 174 is also coupled to the source region 132 of the driving transistor through a fourth via hole 164 .

[0058] Fig. 11 is a cross-sectional view taken along line DD in Fig. 10. In Fig. 11, the light emitting element portion is omitted.

[0059] A metal line 178 is also provided in the second via hole 160. The metal line 178 is also connected to the first electrode 131 of the light emitting element. The drain region 141 may be in direct contact with the side of the metal line 178. As a result, the first electrode 131 of the light emitting element and the drain region 141 of the driving transistor may be electrically connected by the metal line 178. In this manner, in an exemplary embodiment, the drain region 141 and the first electrode 131 may be connected together by the metal line 178 provided in one second via hole 160. As a result, the line and space of the structure connecting the drain region 141 and the first electrode 131 may be reduced. Therefore, the PPI (pixels per inch) may be increased.

[0060] 12 illustrates a portion of a micro light emitting display device according to an exemplary embodiment, in which a gate electrode 155 of a driving transistor is provided in a first via hole 153. FIG. 13 illustrates a comparative example. The comparative example includes a substrate 10, a first semiconductor layer 21 provided on the substrate 10, a light emitting layer 22, a second semiconductor layer 23, an insulating layer 29 provided on the second semiconductor layer 23, a source region 41 provided on the insulating layer 29, and a gate electrode 50 spaced apart from the source region 41. The source region 41 and the gate electrode 50 are connected by a metal line 43 provided in a first via hole 44 and a second via hole 45.

[0061] 12 and 13 , in the micro light emitting display device according to the exemplary embodiment, the gate electrode 155 directly contacts the source region 132 through one first via hole 153, thereby reducing the line-and-space. The gate electrode 155 and the third electrode 176 may form the capacitor Cst. Alternatively, since the gate electrode 155 is connected to the source region 132, the area where the third electrode 176 and the second active pattern 140 of the driving transistor overlap may form the capacitor Cst. Because the third electrode 176 of the capacitor Cst has a flat plate shape, the area of ​​the capacitor Cst facing the gate electrode 155 in the second pattern 140 can be increased, thereby increasing the capacitance of the capacitor Cst.

[0062] FIG. 14 illustrates a portion of a micro light emitting display device according to an exemplary embodiment, where a second via hole 160 is provided. FIG. 15 illustrates a comparative example. Referring to FIG. 14, a metal line 178 provided in one second via hole 160 can contact both a first electrode 131 and a drain region 141 of a driving transistor. In the comparative example illustrated in FIG. 15, an anode electrode 28 is connected to a drain region 68 via a metal line 65 provided in a first via hole 60 and a second via hole 61. In this comparative example, the metal line 65 is provided across the first via hole 60 and the second via hole 61, and the line-and-space occupies a relatively large area.

[0063] In contrast, in the exemplary embodiment, the connection structure between the metal line 178 and the first electrode 131 and the connection structure between the drain region 141 and the first electrode 131 are implemented through one second via hole 160, thereby reducing the circuit layout area and thereby increasing PPI and improving resolution. Furthermore, under the same resolution conditions, the line width margin can be increased, and when the line width is wide, relatively cheaper manufacturing equipment can be used compared to when the line width is narrow, thereby reducing production costs.

[0064] Therefore, the light-emitting element of the micro light-emitting display device according to the exemplary embodiment may have a width of, for example, 200 μm or less. Alternatively, the light-emitting element may have a width of 100 μm or less. The width of the light-emitting element may refer to the width of the area from which light is emitted in a subpixel. In this way, in a light-emitting display device using small micro light-emitting elements, the area of ​​the circuit layout can be reduced, thereby increasing the resolution.

[0065] 16 to 24 are views illustrating a method for manufacturing a display device according to an exemplary embodiment.

[0066] 16, a first semiconductor layer 220, a light emitting layer 225, and a second semiconductor layer 230 may be grown on a substrate 210. The substrate 210 may be, for example, a silicon substrate, a sapphire substrate, or a glass substrate. However, the substrate 210 is not limited thereto, and various epitaxial substrates may be used. The first semiconductor layer 220 may include, for example, an n-type semiconductor layer. However, in some cases, the first semiconductor layer 220 may include a p-type semiconductor layer. For example, the first semiconductor layer 220 may include n-type GaN.

[0067] The light emitting layer 225 can generate light as electrons and holes recombine. The light emitting layer 225 can have a multiple quantum well (MQW) or single quantum well (SQW) structure. The light emitting layer 225 can include a III-V semiconductor, such as GaN. The second semiconductor layer 230 can include a III-V p-type semiconductor, such as p-GaN. The second semiconductor layer 230 can have a single-layer structure or a multi-layer structure.

[0068] A conductive material layer may be deposited on the second semiconductor layer 230 and then etched to form the first electrode 235. The first electrode 235 may include, for example, Ag, Au, Al, Cr, Ni, or an alloy thereof, but is not limited thereto. A first insulating layer 236 is deposited on the first electrode 235.

[0069] Referring to FIG. 17, a first layer 238 including a conductive material is deposited on a first insulating layer 236. Referring to FIG. 18, the first layer 238 is etched to form an active pattern layer 240. The active pattern layer 240 may include, for example, a source region, a channel region, and a drain region of a driving transistor, and may also include a source region, a channel region, and a drain region of a switching transistor. In FIG. 18, for example, a source region S1 and a channel region C1 of a switching transistor; and a drain region D2 and a source region S2 of a driving transistor may be provided. A drain region may be formed instead of the source region S1.

[0070] 19, a second insulating layer 243 is deposited on the active pattern layer 240. Referring to Fig. 20, a first photoresist layer 245 is deposited on the second insulating layer 243, and ion implantation is performed on the source region S1 (or drain region) of the switching transistor of the active pattern layer 240 using the first photoresist layer 245 to form an ion implantation region 241. The ion implantation region 241 can reduce resistance and allow current to flow smoothly.

[0071] 21, the second insulating layer 243 is etched using the first photoresist layer 245 to form the first via hole 248. As described above, before forming the first via hole 248, an implantation region 241 may be formed in the active pattern layer 240 to be connected to the first metal layer 253, which will be described later. The implantation region 241 may also be formed selectively.

[0072] 22, the first photoresist layer 245 is removed, and a second layer 250 is deposited on the second insulating layer 243. The second layer 250 is then patterned using a second photoresist layer 251. The second layer 250 is then etched to form a first metal layer 253. The first metal layer 253 may include, for example, a gate electrode G1 of the switching transistor and a gate electrode G2 of the driving transistor. The gate electrode G2 of the driving transistor is also commonly used as the second electrode of the capacitance. The gate electrode G2 may directly contact the source region S1 through a first via hole 248. Furthermore, if the source region S1 includes an implantation region 241, the gate electrode G2 contacts the implantation region 241, thereby reducing gate resistance.

[0073] Then, referring to FIG. 23, a second photoresist layer 251 is used to perform ion implantation in the source / drain regions.

[0074] 24, the second photoresist layer 251 is removed, and a third insulating layer 255 is deposited on the first metal layer 253. The third insulating layer 255 may also be, for example, an inter dielectric layer.

[0075] Referring to FIG. 25, the third insulating layer 255, the second insulating layer 243, the drain region D2, and the first insulating layer 236 may be etched to form a second via hole 260 to expose the first electrode 235.

[0076] 26, a third layer is deposited on the third insulating layer 255 and the second via hole 260 and etched to form a second metal layer 265. The second metal layer 265 may include, for example, a metal line 267 provided in the second via hole 260 and a third electrode 269 of the capacitor. The metal line 267 may be in direct contact with the drain region D2 and the first electrode 235. Since the first electrode 235 and the drain region D2 are connected through one second via hole 260, the line and space can be reduced. In addition, the area over which the third electrode 269 of the capacitor and the gate electrode G2, which serves as the second electrode of the capacitor, face each other is large, thereby increasing the capacitance of the capacitor.

[0077] In the method for manufacturing a micro light-emitting display device according to an exemplary embodiment, before forming the first metal layer 265, the first via hole 248 is formed and the gate electrode G2 is provided in the first via hole 248, thereby allowing the gate electrode G2 to directly contact the source region (or drain region) S1 of the switching transistor. In addition, in the method for manufacturing a micro light-emitting display device according to an exemplary embodiment, the overlapping area between the gate electrode G2 formed in the first via hole 248 and the third electrode 259 of the capacitor is increased, thereby increasing the area of ​​the capacitor and thereby increasing the capacitance of the capacitor. Furthermore, before forming the first via hole 248, implantation is performed on the source region S1 connected to the gate electrode G2, thereby reducing the gate resistance. Furthermore, by connecting the first electrode (anode electrode) and the drain region D2 in one step through the metal line 267 provided in one second via hole 260, the line-and-space distance is reduced, thereby increasing the PPI.

[0078] In this embodiment, the substrate 210 may be removed. After removing the substrate 210, a common electrode (not shown) may be provided on the first semiconductor layer 220.

[0079] The common electrode may be formed as a transparent electrode or an opaque electrode. The transparent electrode may include, for example, ITO (indium tin oxide), ZnO, IZO (indium zinc oxide), or IGZO (indium gallium zinc oxide). When the common electrode is formed as a transparent electrode, the common electrode is also disposed to cover the entire first semiconductor layer 220. When the common electrode is an opaque electrode, the common electrode may include a window region (not shown) to allow light emitted from the light-emitting layer 225 to pass through.

[0080] 27 is a block diagram illustrating an electronic device including a display device according to an embodiment. The electronic device 2700 includes an image sensor 1000, a processor 2200, a memory 2300, a display device 2400, and a bus 2500. The image sensor 1000 acquires image information related to an external object under the control of the processor 2200 and provides the image information to the processor 2200. The processor 2200 can store the image information provided from the image sensor 1000 in the memory 2300 via the bus 2500. The processor 2200 can output the image information stored in the memory 2300 to the display device 2400 and display it to a user. As described above, the processor 2200 can also perform various image processing on the image information provided from the image sensor 1000. The display devices according to various embodiments described with reference to FIGS. 1 to 15 can be used as the display device 2400.

[0081] FIG. 28 illustrates a block diagram of an electronic device including a display device according to an exemplary embodiment.

[0082] 28 , an electronic device 8201 may be included in a network environment 8200. In the network environment 8200, the electronic device 8201 may communicate with another electronic device 8202 via a first network 8298 (such as a short-range wireless communication network) or may communicate with another electronic device 8204 and / or a server 8208 via a second network 8299 (such as a long-range wireless communication network). The electronic device 8201 may communicate with the electronic device 8204 via the server 8208. The electronic device 8201 may include a processor 8220, a memory 8230, an input device 8250, an audio output device 8255, a display device 8260, an audio module 8270, a sensor module 8276), an interface 8277), a haptic module 8279, a camera module 8280, a power management module 8288, a battery 8289, a communication module 8290, a subscriber identity module 8296, and / or an antenna module 8297. The electronic device 8201 may omit some of the components or add other components. Some of the components may be implemented as a single integrated circuit. For example, the sensor module 8276 (such as a fingerprint sensor, an iris sensor, or an illuminance sensor) may be embedded in the display device 8260 (such as a display).

[0083] The processor 8220 can execute software (e.g., program 8240) and control one or more other components (e.g., hardware components, software components) of the electronic device 8201 coupled to the processor 8220, and can perform various data processing or calculations. As part of the data processing or calculations, the processor 8220 can load instructions and / or data received from other components (e.g., sensor module 8276, communication module 8290) into volatile memory 8232, process the instructions and / or data stored in volatile memory 8232, and store the resulting data in non-volatile memory 8234. The non-volatile memory 8234 may include internal memory 8236 and external memory 8238. The processor 8220 may include a main processor 8221 (e.g., central processing unit, application processor), and an auxiliary processor 8223 (e.g., graphics processing unit, image signal processor, sensor hub processor, communication processor), which can operate independently of or together with the main processor 8221. The auxiliary processor 8223 uses less power than the main processor 8221 and can perform specialized functions.

[0084] The auxiliary processor 8223 can take the place of the main processor 8221 while the main processor 8221 is in an inactive state (sleep state), or can, together with the main processor 8221, control functions and / or states related to some components (such as the display device 8260, the sensor module 8276, and the communication module 8290) of the electronic device 8201 while the main processor 8221 is in an active state (application execution state). The auxiliary processor 8223 (such as an image signal processor or a communication processor) can also be embodied as part of other functionally related components (such as the camera module 8280 and the communication module 8290).

[0085] The memory 8230 can store various data required by the components (e.g., processor 8220, sensor module 8276) of the electronic device 8201. The data may include, for example, input data and / or output data related to software (e.g., program 8240) and the instructions associated therewith. The memory 8230 may include volatile memory 8232 and / or non-volatile memory 8234.

[0086] The programs 8240 may also be stored as software in the memory 8230 and may include an operating system 8242 , middleware 8244 and / or applications 8246 .

[0087] The input device 8250 can receive instructions and / or data from outside (such as a user) the electronic device 8201 to be used by components (such as the processor 8220) of the electronic device 8201. The input device 8250 may include a remote controller, a microphone, a mouse, a keyboard, and / or a digital pen (such as a stylus pen).

[0088] The audio output device 8255 can output audio signals to the outside of the electronic device 8201. The audio output device 8255 may include a speaker and / or a receiver. The speaker is used for general purposes such as multimedia playback or recording playback, and the receiver is used for receiving incoming calls. The receiver may be integrated into the speaker or may be implemented as a separate, independent device.

[0089] The display device 8260 can visually present information external to the electronic device 8201. The display device 8260 may include a display, a holographic device or projector, and control circuitry for controlling the device. The display device 8260 may include a display device described with reference to Figures 1 to 15. The display device 8260 may include touch circuitry configured to sense a touch and / or sensor circuitry (such as a pressure sensor) configured to measure the strength of a force caused by the touch.

[0090] Audio module 8270 can convert sound into an electrical signal or vice versa. Audio module 8270 can acquire sound via input device 8250 or output sound via speakers and / or headphones of audio output device 8255 and / or other electronic devices (such as electronic device 8102) directly or wirelessly coupled to electronic device 8201.

[0091] The sensor module 8276 can sense an operating state (e.g., power, temperature) of the electronic device 8201 or an external environmental state (e.g., user state) and generate an electrical signal and / or data value corresponding to the sensed state. The sensor module 8276 may include a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, a humidity sensor, and / or an illuminance sensor.

[0092] The interface 8277 may support one or more specified protocols used for the electronic device 8201 to be directly or wirelessly coupled to other electronic devices (such as the electronic device 8102). The interface 8277 may include a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, a secure digital (SD) card interface, and / or an audio interface.

[0093] The connection terminal 8278 may include a connector that physically connects the electronic device 8201 to another electronic device (such as the electronic device 8102). The connection terminal 8278 may include an HDMI connector, a USB connector, an SD card connector, and / or an audio connector (such as a headphone connector).

[0094] The haptic module 8279 can convert electrical signals into mechanical stimuli (such as vibrations or movements) or electrical stimuli that can be perceived by the user via touch or kinesthetic sensations. The haptic module 8279 may include motors, piezoelectric elements, and / or electrical stimulators.

[0095] The camera module 8280 can capture still and video images. The camera module 8280 may include a lens assembly including one or more lenses, an image sensor, an image signal processor, and / or a flash. The lens assembly included in the camera module 8280 can collect light emitted from a subject being imaged.

[0096] The power management module 8288 can manage the power supplied to the electronic device 8201. The power management module 8288 may also be embodied as part of a power management integrated circuit (PMIC).

[0097] The battery 8289 can provide power to the components of the electronic device 8201. The battery 8289 may include a non-rechargeable primary battery, a rechargeable secondary battery, and / or a fuel cell.

[0098] The communication module 8290 can support the establishment of a direct (wired) communication channel and / or a wireless communication channel between the electronic device 8201 and other electronic devices (such as the electronic device 8102, the electronic device 8104, or the server 8108) and the execution of communication via the established communication channel. The communication module 8290 may include one or more communication processors that operate independently of the processor 8220 (such as an application processor) and support the direct communication and / or wireless communication. The communication module 8290 may include a wireless communication module 8292 (such as a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) and / or a wired communication module 8294 (such as a local area network (LAN) communication module or a power line communication module). Among these communication modules, a corresponding communication module can communicate with other electronic devices via a first network 8298 (a short-range communication network such as Bluetooth, Wi-Fi (wireless fidelity) direct, or IrDA (infrared data association)) or a second network 8299 (a long-range communication network such as a cellular network, the Internet, or a computer network (LAN, WAN (wide area network), etc.)). Such various types of communication modules can be integrated into a single component (e.g., a single chip) or embodied as multiple separate components (multiple chips). The wireless communication module 8292 can identify and authenticate the electronic device 8201 in a communication network such as the first network 8298 and / or the second network 8299 using subscriber information (e.g., an international mobile subscriber identity (IMSI)) stored in the subscriber identification module 8296.

[0099] The antenna module 8297 can transmit and receive signals and / or power to and from the outside (such as other electronic devices). The antenna may include a radiator formed by a conductive pattern formed on a substrate (such as a printed circuit board (PCB)). The antenna module 8297 may include one or more antennas. When multiple antennas are included, the communication module 8290 can select an antenna from the multiple antennas that is suitable for a communication method used in a communication network such as the first network 8298 and / or the second network 8299. Signals and / or power can be transmitted and received between the communication module 8290 and other electronic devices via the selected antenna. Components other than antennas (such as a radio frequency integrated circuit (RFIC)) may also be included as part of the antenna module 8297.

[0100] Some of the components are connected to each other via a peripheral communication method (bus, GPIO (general purpose input and output), SPI (serial peripheral interface), MIPI (mobile industry processor interface), etc.) and can exchange signals (commands, data, etc.).

[0101] Commands or data may also be transmitted or received between the electronic device 8201 and an external electronic device 8204 via a server 8108 connected to the second network 8299. The other electronic devices 8202 and 8204 may be the same as or different from the electronic device 8201. All or part of the operations performed by the electronic device 8201 may also be performed by one or more of the other electronic devices 8202, 8204, and 8208. For example, when the electronic device 8201 must perform a certain function or service, instead of performing the function or service itself, it may request one or more other electronic devices to perform the function or service in whole or in part. The one or more other electronic devices that receive the request may perform additional functions or services related to the request and transmit the results of the execution to the electronic device 8201. For this purpose, cloud computing technology, distributed computing technology, and / or client-server computing technology may be used.

[0102] The micro-luminescent display devices according to the above-described embodiments can be applied to display devices of various sizes and applications without limitation. For example, FIGS. 29 to 35 show various examples of display devices. As shown in FIG. 29, the micro-luminescent display devices according to various embodiments can be applied to a head-mounted display (HMD) 700. As shown in FIG. 30, the micro-luminescent display devices according to various embodiments can be applied to a small display panel used in a glasses-type display or a goggle-type display 710. As shown in FIG. 31, the micro-luminescent display devices according to various embodiments can be applied to a display panel of a television, smart television, or computer 720. As shown in FIG. 32, the micro-luminescent display devices according to various embodiments can be applied to a display panel of a mobile phone or smartphone 730. As shown in FIG. 33, the micro-luminescent display devices according to various embodiments can be applied to a display panel of a tablet or smart tablet 740.

[0103] In addition, the micro light-emitting display device according to various embodiments can be applied to the display panel of a notebook computer 750 as shown in FIG. 34, and also to large display panels used in signage 760, large electronic boards, theater screens, etc. as shown in FIG. 35.

[0104] While various embodiments of micro-luminescent display devices and methods for manufacturing the same have been described with reference to the embodiments illustrated in the drawings, these are merely exemplary, and those skilled in the art will recognize that numerous modifications and equivalent alternative embodiments are possible. Accordingly, the disclosed embodiments should be considered in an illustrative rather than a restrictive sense. The scope of the invention is defined by the claims, not the foregoing description, and all variations within the scope of the claims should be construed as encompassing the scope of the invention. [Explanation of symbols]

[0105] 101 Power supply drive unit 102 Scan driver 103 Data Drive Unit 110,210 board 120,220 First semiconductor layer 125,225 luminescent layer 128,230 Second semiconductor layer 131,235 1st electrode 130 First Active Pattern 140 Second Active Pattern 132,145 Source Area 133,143 channels 135,141 Drain region 154,241 implantation areas 147,148,159,236,243,255 Insulating layer 153,248 Beer Hall No. 1 160,260 2nd Beer Hall 152,155 Gate electrode 178 Metal Line AL active pattern layer LEA Light Emitting Array ML1 1st metal layer ML2 2nd metal layer

Claims

1. a micro light-emitting element; a driving transistor that applies a voltage to the micro light emitting element; a switching transistor connected to a gate electrode of the driving transistor; a capacitor connected to the driving transistor and the switching transistor; a first via hole provided to expose a source region or a drain region of the switching transistor; a gate electrode of the driving transistor is provided in the first via hole, and the gate electrode of the driving transistor is configured to contact a source region or a drain region of the switching transistor; an anode electrode provided on the micro light emitting device; a second via hole provided to expose the anode electrode; a metal line provided in the second via hole, The second via hole is formed through the drain region of the driving transistor.

2. an insulating layer provided on the gate electrode of the driving transistor; The micro-luminescent display device according to claim 1 , further comprising: a first electrode of the capacitor provided on the insulating layer and arranged opposite to the gate electrode of the driving transistor.

3. The micro-luminescent display device of claim 2 , wherein the first electrode of the capacitor is a flat plate.

4. The micro-luminescent display device of claim 2 , wherein the gate electrode of the driving transistor and the first electrode of the capacitor are opposed to and spaced apart from each other.

5. The micro-luminescent display device of claim 1 , wherein the source or drain region of the switching transistor comprises an implanted region.

6. 6. The microluminescent display device of claim 1, wherein the microluminescent elements have a size of 100 μm or less.

7. 7. The micro-luminescent display device according to claim 1, wherein the metal line includes a first portion provided inside the second via hole and a second portion provided outside the second via hole, and the drain region of the driving transistor is configured to contact the first portion.

8. The micro-luminescent display device according to claim 2 , wherein the gate electrode of the driving transistor is shared with the second electrode of the capacitor.

9. A substrate; a micro light emitting device provided on the substrate; an anode electrode provided on the micro light emitting device; a driving transistor that applies a voltage to the micro light emitting element; a switching transistor connected to a gate electrode of the driving transistor; a capacitor connected to the driving transistor and the switching transistor; a first via hole provided to expose the anode electrode; a metal line provided in the first via hole; The first via hole is formed to penetrate the drain region of the driving transistor, the metal line contacts the anode electrode, and the drain region of the driving transistor contacts a side of the metal line.

10. 10. The microluminescent display device of claim 9, wherein the microluminescent elements have a size of 100 μm or less.

11. 11. The micro-luminescent display device according to claim 9 or 10, wherein the metal line includes a first portion provided inside the first via hole and a second portion provided outside the first via hole, and the drain region of the driving transistor is provided so as to contact a side of the first portion.

12. an insulating layer provided on the gate electrode of the driving transistor; 12. The micro-luminescent display device of claim 9, further comprising: a first electrode of the capacitor provided on the insulating layer.

13. 13. The micro-luminescent display device of claim 12, wherein the first electrode of the capacitor is a flat plate.

14. The micro-luminescent display device according to claim 12 , wherein the gate electrode of the driving transistor and the first electrode of the capacitor are arranged to face each other and be spaced apart from each other.

15. 15. The microluminescent display device of claim 9, wherein the source or drain region of the switching transistor comprises an implanted region.

16. forming a micro light emitting device on a substrate; forming an anode electrode on the micro light emitting device in subpixel units; forming a first active pattern including a source region and a drain region of a driving transistor and a second active pattern including a source region and a drain region of a switching transistor on the layer where the anode electrode is located; forming a first insulating layer on the first active pattern and the second active pattern; forming a first via hole in the first insulating layer to expose a source region or a drain region of the switching transistor; forming a gate electrode of the driving transistor in the first via hole and contacting the gate electrode of the driving transistor with a source region or a drain region of the switching transistor; forming a second via hole to expose the anode electrode; forming a metal line in the second via hole; The second via hole is formed to penetrate the first drain region of the driving transistor.

17. forming a second insulating layer on the gate electrode of the driving transistor; 17. The method of claim 16, further comprising: forming a first electrode of a capacitor on the second insulating layer.

18. 18. The method of claim 17, wherein the first electrode of the capacitor is a flat plate.

19. 18. The method of claim 17, wherein the gate electrode of the driving transistor and the first electrode of the capacitor are arranged to face each other and be spaced apart from each other.

20. 20. The method of claim 16, further comprising forming an implantation region in the source region or the drain region of the switching transistor before forming the first via hole.

21. 21. The method of claim 16, wherein the micro light emitting elements have a size of 100 μm or less.

22. 22. The method for manufacturing a micro-luminescent display device according to claim 16, wherein the metal line includes a first portion provided inside the second via hole and a second portion provided outside the second via hole, and the first drain region of the driving transistor is configured to contact the first portion.

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