Tuning Assembly for RFID Chips

The tuning assembly for RFID chips with a control unit and selector circuit addresses capacitance mismatches by adjusting capacitance to enhance power transfer and sensitivity, ensuring efficient operation.

JP7772889B2Active Publication Date: 2025-11-18AVERY INT CORP
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Patent Information

Application Number
JP2024154964
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2019-12-28
Filing Date
2024-09-09
Publication Date
2025-11-18
Estimated Expiration
2040-12-18

AI Technical Summary

Technical Problem

Conventional tunable RFID chips face issues with insufficient power transfer due to capacitance mismatches between the antenna and RFID chip, requiring higher power levels and closer proximity to the reader for activation, leading to reduced sensitivity.

Method used

A tuning assembly for RFID chips with a control unit and parallel capacitors, coupled with a selector circuit to selectively allow or prevent current flow through capacitors, adjusting capacitance to optimize power transfer without initializing with mismatched capacitance.

Benefits of technology

The solution ensures efficient power transfer and improved sensitivity by setting initial capacitance close to the target value, avoiding mismatches and enabling precise capacitance adjustment for optimal performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a tunable RFID chip that is less likely to initialize at a capacitance that prevents sufficient power delivery to the RFID chip.SOLUTION: A tuning assembly 10 for an RFID chip includes an input port 12, a control unit 14, a plurality of capacitors 16a to 16e connected in parallel between the input port and the control unit, and a selector circuit 18. The selector circuit is coupled to each capacitor and to the control unit and selectively allows and prevents current flow through any of the capacitors in response to commands from the control unit, thereby adjusting the capacitance of the RFID chip. The commands include a command to always allow current flow through a capacitor, another command to always prevent current flow through a capacitor, and a third command to selectively allow and prevent current flow through a capacitor, for example, for automatic adjustment of the capacitance of the RFID chip.SELECTED DRAWING: Figure 4
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Description

[Technical Field]

[0001] (CROSS-REFERENCE TO RELATED APPLICATIONS) This application claims the benefit of U.S. Provisional Patent Application No. 62 / 954,479, filed December 28, 2019, the entire contents of which are incorporated herein by reference.

[0002] The present invention relates to tunable radio frequency identification ("RFID") devices. More particularly, the present invention relates to RFID chips having capacitance that can be adjusted. [Background technology]

[0003] RFID tags and labels (collectively referred to herein as "devices") are widely used to associate objects with identification codes. RFID devices generally have a combination of an antenna and analog and / or digital electronics and may include, for example, communication electronics, data memory, and control logic. For example, RFID tags are used in conjunction with automobile security locks, to control building access, and to track inventory and packages.

[0004] At its most basic, an RFID device includes an RFID chip coupled to an antenna. RFID chips and antennas can be configured in a variety of ways, and FIG. 1 illustrates one embodiment of a combination RFID chip "M" and antenna "A," referred to herein as an RFID inlay "N." The RFID chip M in FIG. 1 is coupled to a conductive ring "L" to define a reactive strap "S," while the antenna "A" (shown as a dipole antenna) is separate from the reactive strap "S." Although the antenna "A" is physically separate from the reactive strap "S," the two components work in combination to exchange signals with an RFID reader.

[0005] For RFID straps configured to be capacitively or conductively coupled to an antenna (e.g., by coupling the antenna to a conductive pad on the strap), the antenna configuration can be modified to tune the frequency of the resulting RFID inlay. However, because a reactive strap "S" of the type shown in FIG. 1 has a resonant frequency determined by the capacitance of the RFID chip "M" and the inductance of the conductive ring "L," reconfiguring the antenna "A" does not have the same effect as it would for a non-reactive strap. In other words, the reactive strap is part of a tuning loop, whereas a capacitively or conductively coupled strap is part of a tuning loop, whereas a reactive strap "S" of the type shown in FIG. 1 is a tuning loop.

[0006] More specifically, the antenna response of an RFID inlay "N" of the type shown in Figure 1 is composed of two fundamental poles, one associated with the resonant frequency of the reactive strap "S" and the other associated with antenna "A." The coupling of reactive strap "S" and antenna "A" and their relative positions in the frequency domain can be used to optimize the performance of RFID inlay "N" at specific frequencies, for example, in applications involving dielectric loading and proximity to metal or other RFID devices.

[0007] The input of RFID chip "M" can be considered as a resistive element "R" and a capacitive element "C," as shown in Figure 2. In Figure 2, the input port of RFID chip "M" is identified with "P," the capacitor of RFID chip "M" is identified with "T," and the core of RFID chip "M" is identified with "B." In conventional RFID chips "M" of the type shown in Figure 2, the interconnection between input port "P" and core "B" via capacitor "T" is fixed, and the capacitance of RFID chip "M" cannot be adjusted to adjust the resonant frequency of reactive strap "S" (i.e., RFID chip "M" is not tunable).

[0008] Because reactive straps may perform better at different frequencies depending on a number of factors (e.g., the characteristics of the article to which the reactive strap will ultimately be tied), it is known to provide a tunable RFID chip "U" (i.e., one with adjustable capacitance), as shown in FIG. 3. In the embodiment of FIG. 3, the single capacitor "T" of FIG. 2 is replaced with three capacitors "T1," "T2," and "T3." One of the capacitors "T1" is similar to the single capacitor "T" of FIG. 2 and provides a fixed minimum capacitance for RFID chip "U," while the other two capacitors "T2" and "T3" (referred to as "tunable" capacitors) are configured to selectively receive current flow (under the control of an automatic tuning circuit "D") to adjust the total capacitance (i.e., resonant frequency) of RFID chip "U." In particular, when RFID chip "U" is about to power up upon receiving a signal from an RFID reader, auto-tuning circuit "D" automatically determines for each tunable capacitor "T2" and "T3" whether that capacitor should receive current flow through input port "P" (i.e., from the associated antenna) to maximize the power received by RFID chip "U." This ability for RFID chip "U" to automatically adjust its capacitance to increase its sensitivity is commonly referred to as "auto-tuning."

[0009] While the tunable RFID chip "U" of FIG. 3 may be an improvement over the fixed-frequency RFID chip "M" of FIG. 2, it is not without drawbacks. For example, all tunable capacitors "T2" and "T3" are tuned each time RFID chip "U" attempts to power up. Essentially, each tunable capacitor "T2" and "T3" receives a current flow when RFID chip "U" attempts to power up. It may be the case that the starting capacitance (with each capacitor "T1," "T2," and "T3" receiving a current flow) results in such a mismatch between the antenna and RFID chip "U" that insufficient power is transferred to the auto-tuning circuit "D," requiring a higher level of power (related to lower sensitivity and the need for the RFID inlay to be closer to the RFID reader) to initiate the auto-tuning process and optimize the power transferred to allow RFID chip "U" to reach its activation threshold.

[0010] It would be advantageous to provide a tunable RFID chip that is less likely to initialize with capacitance that prevents sufficient power transfer to the RFID chip.

[0011] Thus, described herein is a tuning assembly, method of manufacture and method of use that allows tuning of an RFID chip without initializing it with capacitance that prevents sufficient power transfer to the RFID chip. Summary of the Invention

[0012] The present invention has several aspects that may be implemented individually or together in the devices and systems described and claimed below. These aspects may be employed alone or in combination with other aspects of the invention described herein, and the description of these aspects in combination does not exclude the use of these aspects separately or the claiming of these aspects individually or in different combinations as set forth in the claims appended hereto.

[0013] Described herein is a tuning assembly for an RFID chip. The tuning assembly includes an input port, a control unit, and a plurality of capacitors coupled in parallel between the input port and the control unit. A selector circuit is coupled to each capacitor and the control unit and configured to adjust the capacitance of the RFID chip by selectively allowing and preventing current flow through any of the capacitors in response to commands from the control unit. The commands from the control unit to the selector circuit include commands to always allow current flow through any of the one or more capacitors, other commands to always prevent current flow through any of the one or more capacitors, and third commands to selectively allow and prevent current flow through any of the one or more capacitors. In some embodiments, the tuning assembly enables the RFID chip to be coupled to a conductive ring, the combination of which defines a reactive strap.

[0014] Also described herein is a method for manufacturing an RFID inlay including a tunable RFID chip. The method includes providing a tuning assembly for the RFID chip, the tuning assembly including an input port, a control unit, a plurality of capacitors coupled in parallel between the input port and the control unit, and a selector circuit coupled to each capacitor and the control unit and configured to selectively allow and prevent current flow through any of the capacitors in response to commands from the control unit to adjust the capacitance of the RFID chip. The control unit is programmed to issue multiple commands to the selector circuit, including commands to always allow current flow through one or more of the capacitors, other commands to always prevent current flow through one or more of the capacitors, and third commands to selectively allow and prevent current flow through one or more of the capacitors. The RFID chip is coupled to an antenna to define the RFID inlay. In some embodiments, the RFID chip is coupled to the antenna as part of a reactive strap to define the RFID inlay. [Brief explanation of the drawings]

[0015] [Figure 1] FIG. 1 is a schematic diagram of a reactive strap and associated antenna according to a conventional design. [Figure 2] 1 is a schematic diagram of an RFID chip according to a conventional design. [Figure 3] 1 is a schematic diagram of an RFID chip according to a conventional design. [Figure 4] 1 is a schematic diagram of an exemplary tuning assembly for an RFID chip according to an embodiment of the present disclosure. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0016] While the present invention discloses detailed embodiments of the present invention as necessary, it should be understood that the disclosed embodiments are merely exemplary of the present invention, which may be embodied in various forms. Accordingly, the specific details disclosed herein should not be construed as merely limiting, but as a basis for the claims and as a representative basis for teaching those skilled in the art to employ the present invention in various ways in virtually any suitable manner.

[0017] FIG. 4 illustrates an exemplary embodiment of a tuning assembly 10 for an RFID chip 11 according to aspects of the present disclosure. The tuning assembly 10 includes an antenna or input port 12 and a control unit 14. A plurality of capacitors 16a-16e are coupled in parallel between the input port 12 and the control unit 14. While FIG. 4 illustrates five capacitors, it should be understood that a tuning assembly 10 according to the present disclosure may include more or less than five capacitors. A selector circuit 18 is coupled to each capacitor 16 and the control unit 14. It should be understood that a tuning assembly 10 according to the present disclosure may include other components, such as a storage unit or memory unit, in addition to those shown in FIG. 1 .

[0018] The capacitance of the individual capacitors 16 may vary without departing from the scope of the present disclosure. In one embodiment, each capacitor 16 has a different capacitance, which may be advantageous to allow for a greater variety of coupling capacitances within the achievable range, as described in more detail herein. For example, in one exemplary embodiment, the first capacitor 16a has a capacitance of approximately 50 fF, the second capacitor 16b has a capacitance of approximately 100 fF, the third capacitor 16c has a capacitance of approximately 200 fF, the fourth capacitor 16d has a capacitance of approximately 400 fF, and the fifth capacitor 16e has a capacitance of approximately 800 fF. In this exemplary embodiment, it can be seen that each capacitor 16 (other than the first capacitor 16a) has twice the capacitance of the capacitor 16 with the next lowest capacitance (similar to a binary arrangement). This may be advantageous to allow for a more complete range of possible coupling capacitances, as described in more detail herein. Although it may be advantageous for each capacitor 16 to have a different capacitance, it is also within the scope of this disclosure for two or more capacitors 16 to have the same capacitance and / or for each capacitor 16 to have the same capacitance.

[0019] The selector circuit 18 is configured to selectively allow and prevent current flow through any of the capacitors 16 in response to commands from the control unit 14. By selectively allowing and preventing current flow through different combinations of capacitors 16, the total capacitance or combined capacitance of the RFID chip 11 can be adjusted for increased sensitivity. The selector circuit 18 can be variously configured to perform this function. In one exemplary embodiment, each capacitor 16 includes an associated switch that is opened by the selector circuit 18 to prevent current flow through the capacitor 16 or closed by the selector circuit 18 to allow current flow through the capacitor 16. Other configurations may also be employed without departing from the scope of this disclosure.

[0020] When selector circuit 18 acts to prevent current flow through each capacitor 16, capacitor 16 does not contribute to the coupling capacitance of RFID chip 11, and thus the coupling capacitance of RFID chip 11 is equal to the capacitance of the fundamental input of RFID chip 11 (which is 100 fF in the embodiment described above). When selector circuit 18 acts to allow current flow through each capacitor 16, the coupling capacitance of RFID chip 11 is equal to the sum of the capacitance of the individual capacitor 16 (1,550 fF in the embodiment described above) and the capacitance of the fundamental input (100 fF in the embodiment described above), which is a coupling capacitance of 1,650 fF in the embodiment described above.

[0021] If the selector circuit 18 allows current to flow through at least one but not all capacitors 16, the coupling capacitance will be somewhere between the capacitance of the base input of the RFID chip 11 and the maximum possible capacitance (i.e., the coupling capacitance if current were allowed to flow through all capacitors 16). In the above-described embodiment, coupling capacitances (including the base input capacitance) ranging from 100 fF to 1,650 fF in increments of 50 may be achieved. For example, a coupling capacitance of 150 fF may be achieved by the selector circuit 18 allowing current to flow only through the first capacitor 16a (which has a capacitance of 50 fF in addition to the base input capacitance of 100 fF). A coupling capacitance of 200 fF may be achieved by the selector circuit 18 allowing current to flow only through the second capacitor 16b (which has a capacitance of 100 fF in addition to the base input capacitance of 100 fF). A coupling capacitance of 250 fF can be achieved by the selector circuit 18 only allowing current to flow through the first and second capacitors 16 a, 16 b, etc. up to the maximum achievable coupling capacitance. Tight coverage of the range of achievable coupling capacitance values ​​can be achieved by any of a number of possible approaches, but can be efficiently achieved by capacitors 16 having different capacitance values, and because the difference in capacitance between any pair of capacitors 16 is different from the difference in capacitance between any other pair of capacitors 16, as in the embodiment described above (i.e., using a minimum number of capacitors 16).

[0022] The control unit 14 may be configured to operate like a conventional autotune system by instructing the selector circuit 18 to automatically and selectively allow and prevent current flow through each capacitor 16 until maximum sensitivity is achieved. The control unit 14 may also be configured to issue additional instructions to the selector circuit 18, providing advantages over conventional autotuning devices. For example, the control unit 14 may be configured to instruct the selector circuit 18 to always allow current flow through any one or more of the capacitors 16. This may be advantageous if the RFID chip 11 is known to be used in an application that requires a coupling capacitance in a tighter range than the full range of capacitance values ​​achievable by the RFID chip 11. For example, if it is known (e.g., by testing similarly configured RFID chips in similar applications) that the RFID chip 11 must have at least some minimum value for coupling capacitance, the control unit 14 may be configured to instruct the selector circuit 18 to always allow current flow through the most appropriate capacitor 16 to ensure that the coupling capacitance is always at that minimum value.

[0023] Similarly, control unit 14 may be configured to instruct selector circuit 18 to always prevent current from flowing through any one or more capacitors 16, which may be advantageous even if RFID chip 11 is known to be used in an application that requires a coupling capacitance over a tighter range than the full range of capacitance values ​​achievable by RFID chip 11. For example, if it is known (e.g., by testing similarly configured RFID chips in similar applications) that RFID chip 11 needs to have a coupling capacitance lower than some maximum value, control unit 14 may be configured to instruct selector circuit 18 to always prevent current from flowing through the most appropriate capacitor 16 to ensure that the coupling capacitance is never greater than that maximum value.

[0024] "Freezing" the state of tunable capacitors 16 (i.e., by always allowing or preventing current flow therethrough) prevents a problem with conventional auto-tune systems. As explained in the description of the prior art system, the starting capacitance of a conventional auto-tunable RFID chip "U" (see FIG. 3) can be such that a mismatch between the antenna and RFID chip "U" results in insufficient power being transferred to the auto-tuning circuit "D," requiring a higher level of power (related to lower sensitivity and the need for the RFID inlay to be closer to the RFID reader) to initiate the auto-tuning process and optimize the power transferred to allow RFID chip "U" to reach its activation threshold. By "freezing" the state of one or more capacitors 16, an RFID chip 11 according to the present disclosure will have an initial or starting coupling capacitance close enough to the target value to avoid such mismatch. From an initial configuration (in which the state of one or more capacitors 16 may be “frozen”), control unit 14 and selector circuit 18 work together to adjust the state of each individual capacitor 16 that is not “frozen” (by comparing the amount of power transferred to RFID chip 11 through input port 12 when current is allowed to flow through a particular combination of capacitors 16 with the amount of power transferred when current is allowed to flow through a different combination of capacitors 16) until a combined capacitance is reached at which the amount of power transferred to RFID chip 11 through input port 12 is maximized. After comparison, when allowing and preventing current flow through any of one or more capacitors 16, control unit 14 instructs selector circuit 18 to allow or prevent current flow through any of one or more capacitors 16 based at least in part on the amount of power transferred to RFID chip 11 through input port 12.

[0025] The state of the capacitor 16 can be set at any of a variety of times or locations (e.g., set to a "frozen" state or set to allow for automatic adjustment). In one embodiment, the state of the capacitor 16 is set before the associated RFID chip 11 is coupled to an antenna (as part of a reactive strap). In other embodiments, the state of the capacitor 16 is set after the RFID chip 11 is coupled to an antenna to define an RFID inlay. This may include programming the RFID chip 11 during inlay testing or after the RFID inlay is incorporated into an RFID tag or label. This may also include programming the RFID chip 11 after it is associated with an item (as part of an RFID tag or label).

[0026] Because it can be difficult to determine the appropriate coupling capacitance for an RFID chip 11 before the RFID chip 11 is placed in service, the present disclosure provides an approach that uses data collected from previously placed RFID chips 11 to allow programming of the RFID chip 11 at a relatively early manufacturing stage. With this approach, an RFID reader operates at a relatively high power to sense an RFID label to be placed in service (e.g., attached to an article of denim clothing or a cotton shirt). The RFID reader then operates at a lower power to determine the minimum operating power at which the RFID label will be sensed. The RFID reader is then operated at a power greater than the previously identified minimum operating power, and the control unit 14 of the tuning assembly 10 for the RFID chip 11 of the RFID label is programmed to instruct the selector circuit 18 to transmit current flow through the capacitor 16 with different couplings to achieve different coupling capacitances. The RFID reader then operates at a power lower than the previously identified minimum operating power and determines whether the lower minimum operating power has been achieved (i.e., whether the RFID label can be sensed at the new capacitance). This process can be repeated until the lowest minimum operating power is achieved.

[0027] The above procedure can be repeated for multiple similarly configured and similarly positioned RFID labels to determine the average programming (which may include the average coupling capacitance). This information can then be used to program the control unit 14 to set the state of the capacitor 16 of future RFID chips 11 relatively early in the manufacturing process (once it is known how the RFID chip 11 will be used), without having to wait until the RFID chip 11 is placed in service.

[0028] It will be understood that the above-described embodiments are illustrative of some of the applications of the principles of the present invention. Numerous modifications may be made by those skilled in the art without departing from the spirit and scope of the invention as claimed, including combinations of features individually disclosed or claimed herein. For this reason, the scope of the present invention is not limited to the above description, but is as set forth in the following claims, which claims are understood to be directed to features of the present invention, including combinations of features individually disclosed or claimed herein.

Claims

1. 1. A tuning assembly for an RFID chip, comprising: An input port; a control unit; a plurality of capacitors coupled in parallel between the input port and the control unit; a selector circuit coupled to each capacitor and to the control unit, the selector circuit configured to selectively allow and prevent current flow through any of the capacitors in response to commands from the control unit to adjust the capacitance of the RFID chip; the control unit is configured to issue a plurality of instructions to the selector circuit; The plurality of instructions: instructions to always allow current to flow through each of a portion of the plurality of capacitors selected such that the combined capacitance of the plurality of capacitors at the start of tuning is always at least a minimum value; instructions to always prevent current flow through each of the remaining capacitors of the plurality of capacitors selected such that the combined capacitance of the plurality of capacitors after tuning is never greater than a maximum value; and instructions for selectively allowing and preventing current flow through each of the remaining capacitors of the plurality of capacitors; the minimum value of the combined capacitance of the plurality of capacitors is the capacitance of the RFID chip when the minimum operating power of the RFID reader determined by operating the RFID reader is detected; Tuning assembly.

2. The tuning assembly of claim 1 , wherein each capacitor of the plurality of capacitors has a different capacitance.

3. 3. The tuning assembly of claim 2, wherein the capacitance difference of any pair of capacitors is different from the capacitance difference of any other pair of capacitors.

4. one of the plurality of capacitors has a lower capacitance than the other capacitors; another of the plurality of capacitors has a larger capacitance than the other capacitors; 3. The tuning assembly of claim 2, wherein each other capacitor in the plurality of capacitors has twice the capacitance of the capacitor having the next lowest capacitance and half the capacitance of the capacitor having the next highest capacitance.

5. A tuning assembly according to any preceding claim, wherein each capacitor has a capacitance in the range of about 50 fF to about 800 fF.

6. The plurality of capacitors include: a first capacitor having a capacitance of approximately 50 fF; a second capacitor having a capacitance of approximately 100 fF; a third capacitor having a capacitance of approximately 200 fF; a fourth capacitor having a capacitance of approximately 400 fF; a fifth capacitor having a capacitance of about 800 fF; 6. The tuning assembly of claim 5.

7. The tuning assembly of any one of claims 1 to 4, wherein the plurality of capacitors are configured to provide a combined capacitance of between 0 fF and about 1,550 fF.

8. 8. The tuning assembly of claim 1, wherein the control unit is configured to instruct a selector circuit to selectively allow and prevent current flow through any one or more of the plurality of capacitors to provide a coupling capacitance that maximizes the amount of power transferred to the RFID chip via the input port.

9. 9. The tuning assembly of claim 8, wherein the control unit is configured to instruct a selector circuit to always allow or always prevent current flow through at least one of the capacitors.

10. The instruction to selectively allow and prevent current flow through combinations of the plurality of capacitors comprises: comparing the amount of power transferred to the RFID chip through the input port when allowing a current to flow through a particular combination of capacitors with the amount of power transferred to the RFID chip through the input port when allowing a current to flow through a different combination of capacitors; and instructing the selector circuit to allow or prevent current flow through any of the one or more capacitors based at least in part on an amount of power transferred to the RFID chip through an input port when current flow through any of the one or more capacitors is allowed or prevented.

10. A tuning assembly according to claim 8 or 9.

11. 11. The tuning assembly of claim 1, wherein the tuning assembly allows an RFID chip to be coupled to a conductive ring, the combination of the RFID chip and the conductive ring defining a reactive strap.

12. 1. A method of manufacturing an RFID inlay including an RFID chip configured to be tuned, comprising: providing a tuning assembly for an RFID chip, the tuning assembly including an input port, a control unit, a plurality of capacitors coupled in parallel between the input port and the control unit, and a selector circuit coupled to each capacitor and to the control unit and configured to selectively allow and prevent current flow through any of the capacitors in response to commands from the control unit to adjust the capacitance of the RFID chip; programming a control unit to issue a plurality of instructions to the selector circuit, the plurality of instructions comprising: instructions to always allow current to flow through each of a portion of the plurality of capacitors selected such that the combined capacitance of the plurality of capacitors at the start of tuning is always at least a minimum value; instructions to always prevent current flow through each of the remaining capacitors of the plurality of capacitors selected such that the combined capacitance of the plurality of capacitors after tuning is never greater than a maximum value; and instructions for selectively allowing and preventing current flow through each of the remaining capacitors of the plurality of capacitors, wherein the RFID chip is coupled to an antenna to define an RFID inlay; Including, the minimum value of the combined capacitance of the plurality of capacitors is the capacitance of the RFID chip when the minimum operating power of the RFID reader determined by operating the RFID reader is detected; method.

13. The method of claim 12 , wherein the control unit is programmed before the RFID chip is coupled to the antenna.

14. The method of claim 12 , wherein the control unit is programmed after the RFID chip is coupled to the antenna.

15. The method of claim 14 further comprising testing the RFID inlay, wherein the control unit is programmed during the testing.

16. 15. The method of claim 14, further comprising incorporating the RFID inlay into an RFID label, wherein the control unit is programmed after the RFID inlay is incorporated into the RFID label.

17. incorporating the RFID inlay into an RFID label; 17. The method of any one of claims 12 to 16, further comprising the step of associating the RFID label with an item, wherein the control unit is programmed after the RFID label is associated with the item.

18. The step of programming the control unit comprises: (a) operating an RFID reader at a relatively high power to sense an RFID label; (b) operating the RFID reader at a lower power to determine the minimum operating power; (c) operating the RFID reader at a power greater than the minimum operating power; (d) programming the control unit while the RFID reader is operating at a power greater than the minimum operating power; (e) operating the RFID reader at a power lower than the minimum operating power to determine whether the lower minimum operating power has been achieved; 18. The method of claim 17, comprising: (f) repeating (c) through (e) until a lowest minimum operating power is reached.

19. performing (a) through (f) on a plurality of similarly configured and arranged RFID labels; determining the average programming of the control units of a plurality of similarly configured and arranged RFID labels; 20. The method of claim 18, further comprising: programming a control unit of at least one RFID chip based at least in part on the average programming.

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