Indication device
The display device expands the light-emitting area by using a covering layer to encase the end faces of electrodes and organic layers, addressing the issue of undesired light emission and maintaining color purity in OLED-based displays.
Patent Information
- Application Number
- JP2022581258
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-02-09
- Filing Date
- 2022-01-11
- Publication Date
- 2025-11-25
- Estimated Expiration
- 2042-01-11
AI Technical Summary
Existing display devices using organic light-emitting diodes (OLEDs) face challenges in maximizing the area that contributes to display, as current configurations often result in undesired light emission outside the intended light-emitting region, leading to decreased color purity.
The display device incorporates a substrate with a switching element, a first insulating layer, a conductive material, a lower electrode, an organic layer, and an upper electrode, with a covering layer that covers the end faces of these components, thereby expanding the light-emitting area and preventing short circuits.
This configuration enhances the display area by allowing almost the entire organic layer to function as a light-emitting region, suppressing undesired light emission, and maintaining color purity.
Smart Images

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Abstract
Description
[Technical Field]
[0001] FIELD An embodiment of the present invention relates to a display device. [Background technology]
[0002] In recent years, display devices using organic light-emitting diodes (OLEDs) as display elements have been put to practical use. The display elements have an organic layer between a pixel electrode and a common electrode. The organic layer includes functional layers such as a hole transport layer and an electron transport layer in addition to a light-emitting layer. In such display elements, there is a demand for an increase in the area that contributes to display (light emission). [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2000-195677 [Patent Document 2] Japanese Patent Application Laid-Open No. 2004-207217 [Patent Document 3] Japanese Patent Application Laid-Open No. 2008-135325 [Patent Document 4] Japanese Patent Application Laid-Open No. 2009-32673 [Patent Document 5] Japanese Patent Application Laid-Open No. 2010-118191 [Patent Document 6] International Publication No. 2019 / 026511 Summary of the Invention [Problem to be solved by the invention]
[0004] An object of the embodiment is to provide a display device that can expand the area that contributes to display. [Means for solving the problem]
[0005] According to one embodiment, the display device comprises: the organic layer includes a substrate, a switching element disposed above the substrate, a first insulating layer disposed above the substrate and having a first contact hole penetrating to the switching element, a conductive material filled in the first contact hole, a lower electrode disposed above the first insulating layer and in contact with the conductive material, an organic layer stacked on the lower electrode, the organic layer including a hole injection layer on the lower electrode, a hole transport layer on the hole injection layer, and a light-emitting layer on the hole transport layer, an upper electrode stacked on the organic layer, and a covering layer covering each end face of the lower electrode, the hole injection layer, and the hole transport layer.
[0006] According to one embodiment, the display device comprises: The device comprises a substrate, a switching element disposed above the substrate, a first insulating layer disposed above the substrate and having a first contact hole penetrating to the switching element, a conductive material filled in the first contact hole, a lower electrode disposed above the first insulating layer and in contact with the conductive material, an organic layer including a light-emitting layer and stacked on the lower electrode, an upper electrode stacked on the organic layer, and a covering layer covering an end face of the lower electrode.
[0007] According to one embodiment, the display device comprises: The device comprises a substrate, a switching element disposed above the substrate, a first insulating layer disposed above the substrate and having a first contact hole penetrating to the switching element, a conductive material filled in the first contact hole, a lower electrode disposed above the first insulating layer and in contact with the conductive material, an organic layer including a light-emitting layer, stacked on the lower electrode and covering an end face of the lower electrode, and an upper electrode stacked on the organic layer and covering an end face of the organic layer. [Effects of the Invention]
[0008] According to one embodiment, it is possible to provide a display device that can expand the area that contributes to display. [Brief explanation of the drawings]
[0009] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a display device DSP according to an embodiment. [Figure 2] FIG. 2 is a diagram showing an example of the configuration of the display element 20. As shown in FIG. [Figure 3] FIG. 3 is a cross-sectional view showing the basic structure of the display device DSP. [Figure 4] FIG. 4 is a cross-sectional view showing a first structural example of the display device DSP. [Figure 5] FIG. 5 is a cross-sectional view showing a second structural example of the display device DSP. [Figure 6] FIG. 6 is a cross-sectional view showing a first example of the display element 20. As shown in FIG. [Figure 7] FIG. 7 is a cross-sectional view showing a second example of the display element 20. As shown in FIG. [Figure 8] FIG. 8 is a cross-sectional view showing a third example of the display element 20. As shown in FIG. [Figure 9] FIG. 9 is a cross-sectional view showing a fourth example of the display element 20. As shown in FIG. [Figure 10] FIG. 10 is a cross-sectional view showing a fifth example of the display element 20. As shown in FIG. [Figure 11] FIG. 11 is a cross-sectional view showing a sixth example of the display element 20. As shown in FIG. [Figure 12A] FIG. 12A is a cross-sectional view showing a third structural example of the display device DSP. [Figure 12B] FIG. 12B is a cross-sectional view showing a fourth structural example of the display device DSP. [Figure 13A] FIG. 13A is a cross-sectional view showing a fifth structural example of the display device DSP. [Figure 13B] FIG. 13B is a cross-sectional view showing a sixth structural example of the display device DSP. [Figure 14A] FIG. 14A is a cross-sectional view showing a seventh structural example of the display device DSP. [Figure 14B] FIG. 14B is a cross-sectional view showing an eighth structural example of the display device DSP. [Figure 15A] FIG. 15A is a cross-sectional view showing a ninth structural example of the display device DSP. [Figure 15B]FIG. 15B is a cross-sectional view showing a tenth structural example of the display device DSP. [Figure 16] FIG. 16 is a cross-sectional view showing a seventh example of the display element 20. As shown in FIG. [Figure 17] FIG. 17 is a cross-sectional view showing an eighth example of the display element 20. As shown in FIG. [Figure 18] FIG. 18 is a cross-sectional view showing a ninth example of the display element 20. As shown in FIG. [Figure 19] FIG. 19 is a cross-sectional view showing a tenth example of the display element 20. As shown in FIG. [Figure 20] FIG. 20 is a cross-sectional view showing an eleventh example of the display element 20. As shown in FIG. [Figure 21] FIG. 21 is a cross-sectional view showing a twelfth example of the display element 20. As shown in FIG. [Figure 22] FIG. 22 is a cross-sectional view showing a thirteenth example of the display element 20. As shown in FIG. [Figure 23] FIG. 23 is a cross-sectional view showing a fourteenth example of the display element 20. As shown in FIG. [Figure 24] FIG. 24 is a cross-sectional view showing a fifteenth example of the display element 20. As shown in FIG. [Figure 25] FIG. 25 is a schematic plan view of the display element 20. As shown in FIG. [Figure 26] FIG. 26 is a cross-sectional view illustrating an example of a boundary surface BR between the conductive material CD and the lower electrode E1. [Figure 27] FIG. 27 is a cross-sectional view illustrating another example of the boundary surface BR between the conductive material CD and the lower electrode E1. [Figure 28] FIG. 28 is a plan view showing an example of the configuration of the upper electrode E2. [Figure 29] FIG. 29 is a plan view showing another example of the configuration of the upper electrode E2. [Figure 30A] FIG. 30A is a plan view showing another example of the configuration of the upper electrode E2. [Figure 30B] FIG. 30B is a plan view showing another example of the configuration of the upper electrode E2. [Figure 31A] FIG. 31A is a plan view showing another example of the configuration of the upper electrode E2. [Figure 31B]FIG. 31B is a plan view showing another example of the configuration of the upper electrode E2. [Figure 32] FIG. 32 is a plan view showing one embodiment. [Figure 33] FIG. 33 is a cross-sectional view of the display element 20 shown in FIG. 32 taken along line AB. DETAILED DESCRIPTION OF THE INVENTION
[0010] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The disclosure is merely an example, and appropriate modifications that a person skilled in the art can easily make while maintaining the gist of the invention are naturally included within the scope of the present invention. Furthermore, the drawings may be schematic in terms of the width, thickness, shape, etc. of each part compared to the actual embodiment for clarity of explanation, but these are merely examples and are not intended to limit the interpretation of the present invention. Furthermore, in this specification and each drawing, components that perform the same or similar functions as those described above with reference to the previous drawings are designated by the same reference numerals, and redundant detailed descriptions may be omitted as appropriate.
[0011] In the drawings, mutually perpendicular X-axis, Y-axis, and Z-axis are shown as necessary to facilitate understanding. The direction along the X-axis is referred to as the X-direction or first direction, the direction along the Y-axis is referred to as the Y-direction or second direction, and the direction along the Z-axis is referred to as the Z-direction or third direction. The plane defined by the X-axis and Y-axis is referred to as the XY plane. Viewing the XY plane is referred to as planar view.
[0012] The display device DSP according to this embodiment is an organic electroluminescence display device having organic light-emitting diodes (OLEDs) as display elements, and is mounted on televisions, personal computers, mobile terminals, mobile phones, etc. The display elements described below can be applied as light-emitting elements in lighting devices, and the display device DSP can be diverted to other electronic devices such as lighting devices.
[0013] 1 is a diagram showing an example of the configuration of a display device DSP according to this embodiment. The display device DSP includes a display unit DA that displays an image on an insulating substrate 10. The substrate 10 may be glass or a flexible resin film.
[0014] The display unit DA includes a plurality of pixels PX arranged in a matrix in the first direction X and the second direction Y. Each pixel PX includes a plurality of subpixels SP1, SP2, and SP3. In one example, the pixel PX includes a red subpixel SP1, a green subpixel SP2, and a blue subpixel SP3. Note that the pixel PX may include four or more subpixels, including subpixels of other colors such as white, in addition to the above three subpixels.
[0015] An example of the configuration of one sub-pixel SP included in a pixel PX will be briefly described. That is, the subpixel SP includes a pixel circuit 1 and a display element 20 that is driven and controlled by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a drive transistor 3, and a capacitor 4. The pixel switch 2 and the drive transistor 3 are switching elements formed of, for example, thin film transistors.
[0016] The pixel switch 2 has a gate electrode connected to a scanning line GL, a source electrode connected to a signal line SL, and a drain electrode connected to one electrode constituting the capacitor 4 and the gate electrode of the drive transistor 3. The drive transistor 3 has a source electrode connected to the other electrode constituting the capacitor 4 and a power supply line PL, and a drain electrode connected to the anode of the display element 20. The cathode of the display element 20 is connected to a power supply line FL. Note that the configuration of the pixel circuit 1 is not limited to the example shown in the figure.
[0017] The display element 20 is an organic light-emitting diode (OLED), which is a light-emitting element. For example, the subpixel SP1 includes a display element that emits light corresponding to a red wavelength, the subpixel SP2 includes a display element that emits light corresponding to a green wavelength, and the subpixel SP3 includes a display element that emits light corresponding to a blue wavelength. The pixel PX includes multiple subpixels SP1, SP2, and SP3 that display different colors, thereby achieving multicolor display.
[0018] However, the display elements 20 of the subpixels SP1, SP2, and SP3 may be configured to emit light of the same color, thereby achieving a monochromatic display.
[0019] Furthermore, when the display elements 20 of the subpixels SP1, SP2, and SP3 are configured to emit white light, color filters may be disposed facing the display elements 20. For example, the subpixel SP1 includes a red color filter facing the display element 20, the subpixel SP2 includes a green color filter facing the display element 20, and the subpixel SP3 includes a blue color filter facing the display element 20. This allows for multicolor display.
[0020] Alternatively, when the display elements 20 of the subpixels SP1, SP2, and SP3 are configured to emit ultraviolet light, a light conversion layer is disposed opposite the display elements 20, thereby realizing multicolor display.
[0021] FIG. 2 is a diagram showing an example of the configuration of the display element 20. As shown in FIG. The display element 20 includes a lower electrode (first electrode) E1, an organic layer OR, and an upper electrode (second electrode) E2. The organic layer OR includes a carrier adjustment layer (first carrier adjustment layer) CA1, an emitting layer EL, and a carrier adjustment layer (second carrier adjustment layer) CA2. The carrier adjustment layer CA1 is located between the lower electrode E1 and the emitting layer EL, and the carrier adjustment layer CA2 is located between the emitting layer EL and the upper electrode E2. The carrier adjustment layers CA1 and CA2 each include a plurality of functional layers. Here, an example will be described in which the lower electrode E1 corresponds to the anode and the upper electrode E2 corresponds to the cathode.
[0022] The carrier control layer CA1 includes, as functional layers, a hole injection layer F11, a hole transport layer F12, an electron blocking layer F13, etc. The hole injection layer F11 is disposed on the lower electrode E1, the hole transport layer F12 is disposed on the hole injection layer F11, the electron blocking layer F13 is disposed on the hole transport layer F12, and the light-emitting layer EL is disposed on the electron blocking layer F13.
[0023] The carrier adjustment layer CA2 includes, as functional layers, a hole blocking layer F21, an electron transport layer F22, an electron injection layer F23, etc. The hole blocking layer F21 is disposed on the light-emitting layer EL, the electron transport layer F22 is disposed on the hole blocking layer F21, the electron injection layer F23 is disposed on the electron transport layer F22, and the upper electrode E2 is disposed on the electron injection layer F23.
[0024] In addition, in addition to the above-mentioned functional layers, the carrier adjustment layers CA1 and CA2 may include other functional layers such as a carrier generation layer as necessary, and at least one of the above-mentioned functional layers may be omitted from the carrier adjustment layers CA1 and CA2.
[0025] 《Basic structure》 FIG. 3 is a cross-sectional view showing the basic structure of the display device DSP. The pixel circuit 1 shown in Fig. 1 is disposed above a substrate 10. In Fig. 3, only the drive transistor (switching element) 3 included in the pixel circuit 1 is shown in a simplified manner.
[0026] The insulating layer (first insulating layer) 11 is disposed above the substrate 10 and corresponds to the base layer of the display element 20. The insulating layer 11 is, for example, an organic insulating layer. The insulating layer 11 has a contact hole (first contact hole) CH1 that penetrates to the drive transistor 3. The contact hole CH1 is filled with a conductive material CD and is in contact with the drive transistor 3. The conductive material CD is formed of a material containing a metal such as titanium (Ti), molybdenum (Mo), tungsten (W), magnesium (Mg), silver (Ag), or tantalum (Ta).
[0027] The display element 20 includes a lower electrode E1, an organic layer OR, and an upper electrode E2.
[0028] The lower electrodes E1 of each display element 20 are arranged at intervals in the first direction X and are each disposed on an insulating layer 11. Each of the lower electrodes E1 is in contact with a conductive material CD and is electrically connected to the drive transistor 3. The lower electrode E1 is an electrode disposed for each sub-pixel or each display element, and may also be referred to as a pixel electrode, an anode, etc.
[0029] The lower electrode E1 is a transparent electrode formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The lower electrode E1 may be a metal electrode formed of a metal material such as silver or aluminum. The lower electrode E1 may also be a laminate of a transparent electrode and a metal electrode. For example, the lower electrode E1 may be configured as a laminate in which a transparent electrode, a metal electrode, and a transparent electrode are laminated in this order, or may be configured as a laminate of three or more layers. In this case, a transparent electrode of the lower electrode E1 containing a conductive material different from the conductive material CD will be in contact with the conductive material CD. However, an electrode of the lower electrode E1 made of the same material as the conductive material CD may also be in contact with the conductive material CD.
[0030] 2, the organic layer OR includes an emitting layer EL. The organic layers OR of each display element 20 are stacked on the respective lower electrodes E11 and are spaced apart from each other. The organic layers OR of each display element 20 aligned in the first direction X may include emitting layers EL formed of different materials (the organic layers OR of each display element 20 emit light of different colors), or may include emitting layers EL formed of the same material (the organic layers OR of each display element 20 emit light of the same color).
[0031] The upper electrodes E2 of the display elements 20 are stacked on the organic layers OR and are spaced apart from each other. The upper electrodes E2 stacked on the organic layers OR aligned in the second direction Y may be integrally formed. As will be described later, the upper electrodes E2 are electrically connected to power supply lines within or outside the display area DA. Such upper electrodes E2 may also be referred to as common electrodes, counter electrodes, cathodes, etc.
[0032] The upper electrode E2 is a semi-transparent metal electrode made of a metal material such as magnesium or silver. The upper electrode E2 may be a transparent electrode made of a transparent conductive material such as ITO or IZO. The upper electrode E2 may also be a laminate of a transparent electrode and a metal electrode.
[0033] Substantially the entire organic layer OR is located between the lower electrode E1 and the upper electrode E2, and can form the light-emitting region of the display element 20. In one example, the thickness of the organic layer OR along the third direction Z is set so that the peak wavelength of the emission spectrum of the light-emitting layer EL matches the effective optical path length between the lower electrode E1 and the upper electrode E2, thereby realizing a microcavity structure for obtaining a resonance effect.
[0034] 3, an end surface SS1 of the lower electrode E1 is exposed from the organic layer OR and the upper electrode E2. An end surface SS2 of the organic layer OR is located on the lower electrode E1 and exposed from the upper electrode E2. An end surface SS3 of the upper electrode E2 is located on the organic layer OR.
[0035] The sealing layer 30 covers each display element 20. That is, the sealing layer 30 covers the end surface SS1 of the lower electrode E1, the end surface SS2 of the organic layer OR, and the end surface SS3 and top surface U2 of the upper electrode E2. Furthermore, between adjacent display elements 20, the sealing layer 30 is in contact with the insulating layer 11. The sealing layer 30 is, for example, a laminate of an inorganic insulating film and an organic insulating film. Such a sealing layer 30 has the function of protecting each display element 20 from moisture and the like.
[0036] In comparison with a configuration in which a rib is provided to cover the peripheral edge of the lower electrode E1, such a display device DSP allows almost the entire organic layer OR to be formed as the light-emitting region of the display element 20, thereby expanding the area contributing to display or light emission (the area of the light-emitting region).In addition, undesired light emission in regions other than the predetermined light-emitting region is suppressed, thereby preventing a decrease in color purity.
[0037] 《First structure example》 FIG. 4 is a cross-sectional view showing a first structural example of the display device DSP. The first structure example shown in Fig. 4 differs from the basic structure shown in Fig. 3 in that the organic layer OR covers an end surface SS1 of the lower electrode E1. The organic layer OR is in contact with the insulating layer 11 on the outer side of the lower electrode E1. The upper electrode E2 is stacked on the organic layer OR and covers an end surface SS2 of the organic layer OR. The upper electrode E2 is in contact with the insulating layer 11 on the outer side of the organic layer OR. The upper electrodes E2 of the display elements 20 aligned in the first direction X are spaced apart from each other.
[0038] The sealing layer 30 covers the upper electrode E2. That is, the sealing layer 30 is in contact with the end surface SS3 of the upper electrode E2. The sealing layer 30 also is in contact with the insulating layer 11 between adjacent display elements 20.
[0039] According to this first structure example, the same effects as those of the basic structure can be obtained. In addition, since the organic layer OR covers the end surface SS1 of the lower electrode E1, it is possible to prevent a short circuit between the lower electrode E1 and the upper electrode E2.
[0040] 《Second structure example》 FIG. 5 is a cross-sectional view showing a second structural example of the display device DSP. The second structural example shown in Fig. 5 differs from the first structural example shown in Fig. 4 in that the upper electrodes E2 of the display elements 20 aligned in the first direction X are integrally formed. The upper electrodes E2 cover the end faces SS2 of the organic layers OR aligned in the first direction X. The upper electrodes E2 are in contact with the insulating layer 11 between the organic layers OR aligned in the first direction X. The sealing layer 30 is stacked on the upper electrode E2 and is spaced apart from the insulating layer 11. In this second structural example, the same effects as in the first structural example can be obtained.
[0041] Next, a specific example of the display element 20 based on the concepts of the first and second structural examples will be described. Here, layers below the insulating layer 11 are not shown.
[0042] FIG. 6 is a cross-sectional view showing a first example of the display element 20. As shown in FIG. The hole injection layer F11 covers the entire lower electrode E1, the hole transport layer F12 covers the entire hole injection layer F11, the electron blocking layer F13 covers the entire hole transport layer F12, and the light-emitting layer EL covers the entire electron blocking layer F13. Here, the expression "covering the entire" means covering the top surface and end surfaces (side surfaces) of the component. The hole blocking layer F21 covers the entire light emitting layer EL, the electron transporting layer F22 covers the entire hole blocking layer F21, the electron injection layer F23 covers the entire electron transporting layer F22, and the upper electrode E2 covers the entire electron injection layer F23.
[0043] A light extraction layer (sometimes referred to as an optical adjustment layer) 40 for improving the light extraction efficiency from the display element 20 covers the entire upper electrode E2. A sealing layer 30 covers the entire light extraction layer 40. Each layer constituting the organic layer OR, the upper electrode E2, the light extraction layer 40, and the sealing layer 30 are in contact with the insulating layer 11.
[0044] According to this first specific example, the upper electrode E2 is in contact with the electron injection layer F23, which is the uppermost layer of the organic layer OR, but is not in contact with the other functional layers and the light-emitting layer EL that constitute the organic layer OR, which prevents undesired current leakage at the periphery of the organic layer OR and thus prevents performance degradation of the display element 20.
[0045] FIG. 7 is a cross-sectional view showing a second example of the display element 20. As shown in FIG. 7 differs from the first specific example shown in Fig. 6 in that the light extraction layer 40 is integrally formed across adjacent display elements 20. That is, the light extraction layer 40 covers adjacent upper electrodes E2 and is in contact with the insulating layer 11 between the adjacent upper electrodes E2. The sealing layer 30 is stacked on the light extraction layer 40 and is spaced apart from the insulating layer 11.
[0046] FIG. 8 is a cross-sectional view showing a third example of the display element 20. As shown in FIG. 8 differs from the first specific example shown in Fig. 6 in that the upper electrode E2 is integrally formed across adjacent display elements 20. That is, the upper electrode E2 covers adjacent electron injection layers F23 and is in contact with the insulating layer 11 between the adjacent electron injection layers F23. The sealing layer 30 and the light extraction layer 40 are spaced apart from the insulating layer 11.
[0047] FIG. 9 is a cross-sectional view showing a fourth example of the display element 20. As shown in FIG. 9 differs from the first specific example shown in Fig. 6 in that the electron injection layer F23 is integrally formed across adjacent display elements 20. That is, the electron injection layer F23 covers adjacent electron transport layers F22 and is in contact with the insulating layer 11 between the adjacent electron transport layers F22. The sealing layer 30, the light extraction layer 40, and the upper electrode E2 are separated from the insulating layer 11.
[0048] FIG. 10 is a cross-sectional view showing a fifth example of the display element 20. As shown in FIG. 6 in that the electron transport layer F22 is integrally formed across adjacent display elements 20. That is, the electron transport layer F22 covers adjacent hole blocking layers F21 and is in contact with the insulating layer 11 between the adjacent hole blocking layers F21. The sealing layer 30, the light extraction layer 40, the upper electrode E2, and the electron injection layer F23 are spaced apart from the insulating layer 11.
[0049] FIG. 11 is a cross-sectional view showing a sixth example of the display element 20. As shown in FIG. 6 in that the hole blocking layer F21 is integrally formed across adjacent display elements 20. That is, the hole blocking layer F21 covers adjacent light-emitting layers EL and is in contact with the insulating layer 11 between the adjacent light-emitting layers EL. The sealing layer 30, the light extraction layer 40, the upper electrode E2, the electron injection layer F23, and the electron transport layer F22 are spaced apart from the insulating layer 11.
[0050] In these second to sixth specific examples, the same effect as in the first specific example can be obtained.
[0051] 《Third structure example》 FIG. 12A is a cross-sectional view showing a third structural example of the display device DSP. 3, the third structural example shown in Fig. 12A differs from the basic structure shown in Fig. 3 in that a coating layer 50 is provided to cover the end surface SS1 of the lower electrode E1. The coating layer 50 is an insulating material and may be formed of an inorganic material or an organic material. Furthermore, as will be described in detail later, the coating layer 50 may be formed using at least one of an electron blocking layer F13 that blocks the movement of electrons from the cathode side to the anode side and a hole blocking layer F21 that blocks the movement of holes from the anode side to the cathode side. The covering layer 50 is provided individually for each of the lower electrodes E1 aligned in the first direction X. That is, of two lower electrodes E1 aligned in the first direction X, the covering layer 50 provided corresponding to one lower electrode E1 is spaced apart from the covering layer 50 provided corresponding to the other lower electrode E1. Between adjacent covering layers 50, the insulating layer 11 is exposed. From the viewpoint of making the area of the light emitting region as large as possible, it is desirable that the area of the upper surface U1 of the lower electrode E1 that is covered by the covering layer 50 be as small as possible. The sealing layer 30 covers the upper electrodes E2 and the organic layers OR of each display element 20 aligned in the first direction X, and also covers the covering layers 50. The sealing layer 30 is in contact with the insulating layer 11 between the covering layers 50 aligned in the first direction X. According to the third structure example, the same effects as those of the basic structure can be obtained. In addition, since the covering layer 50 covers the end surface SS1 of the lower electrode E1, it is possible to suppress a short circuit between the lower electrode E1 and the upper electrode E2.
[0052] 《Fourth structure example》 FIG. 12B is a cross-sectional view showing a fourth structural example of the display device DSP. 12A in that the upper electrodes E2 of the display elements 20 aligned in the first direction X are integrally formed. The upper electrodes E2 cover the organic layers OR of the display elements 20 aligned in the first direction X and also cover the covering layers 50. The upper electrodes E2 are in contact with the insulating layers 11 between the covering layers 50 aligned in the first direction X. The sealing layer 30 is stacked on the upper electrode E2 and is spaced apart from the insulating layer 11. In this fourth structural example, the same effects as in the third structural example can be obtained.
[0053] 《Fifth structure example》 FIG. 13A is a cross-sectional view showing a fifth structural example of the display device DSP. 13A differs from the third structure example shown in Fig. 12A in that the covering layer 50 covers the end surface SS1 of the lower electrode E1 and the end surface SS2 of the organic layer OR. Between adjacent covering layers 50, the insulating layer 11 is exposed. The sealing layer 30 covers the upper electrodes E2 of the display elements 20 aligned in the first direction X, and also covers the covering layers 50. The sealing layer 30 is in contact with the insulating layer 11 between the covering layers 50 aligned in the first direction X.
[0054] The fifth structural example also provides the same effects as those of the third structural example. In addition, since the covering layer 50 covers the end faces of the layers constituting the organic layer OR, undesired current leakage and the like at the periphery of the organic layer OR are suppressed, and performance degradation of the display element 20 can be suppressed.
[0055] 《6th structure example》 FIG. 13B is a cross-sectional view showing a sixth structural example of the display device DSP. 13A in that the upper electrodes E2 of the display elements 20 aligned in the first direction X are integrally formed. The upper electrodes E2 cover the organic layers OR of the display elements 20 aligned in the first direction X and also cover the covering layers 50. The upper electrodes E2 are in contact with the insulating layers 11 between the covering layers 50 aligned in the first direction X. The sealing layer 30 is stacked on the upper electrode E2 and is spaced apart from the insulating layer 11. In this sixth structural example, the same effects as in the fifth structural example can be obtained.
[0056] 《Seventh structure example》 FIG. 14A is a cross-sectional view showing a seventh structural example of the display device DSP. 14A differs from the third structural example shown in Fig. 12A in that the covering layers 50 are integrally formed to cover the end faces SS1 of adjacent bottom electrodes E1. Between adjacent bottom electrodes E1, the insulating layer 11 is covered with the covering layer 50. The sealing layer 30 covers the upper electrodes E2 of the display elements 20 arranged in the first direction X, and also covers the covering layer 50. In this seventh structural example, the same effects as in the third structural example can be obtained.
[0057] 《8th structure example》 FIG. 14B is a cross-sectional view showing an eighth structural example of the display device DSP. 14A in that the upper electrodes E2 of the display elements 20 aligned in the first direction X are integrally formed. The upper electrodes E2 cover the organic layers OR of the display elements 20 aligned in the first direction X and also cover the covering layer 50. The upper electrodes E2 and the sealing layer 30 are spaced apart from the insulating layer 11 between the display elements 20 aligned in the first direction X. In this eighth structural example as well, the same effects as in the third structural example can be obtained.
[0058] 《9th structure example》 FIG. 15A is a cross-sectional view showing a ninth structural example of the display device DSP. 15A differs from the seventh structural example shown in Fig. 14A in that the covering layer 50 covers the end surface SS1 of the lower electrode E1 and the end surface SS2 of the organic layer OR. Between adjacent lower electrodes E1, the insulating layer 11 is covered with the covering layer 50. The sealing layer 30 covers the upper electrodes E2 of the display elements 20 arranged in the first direction X, and also covers the covering layer 50. In this ninth structural example, the same effects as in the third structural example can be obtained.
[0059] 《10th structure example》 FIG. 15B is a cross-sectional view showing a tenth structural example of the display device DSP. 15A in that the upper electrodes E2 of the display elements 20 aligned in the first direction X are integrally formed. The upper electrodes E2 cover the organic layers OR of the display elements 20 aligned in the first direction X and also cover the covering layer 50. The upper electrodes E2 and the sealing layer 30 are spaced apart from the insulating layer 11 between the display elements 20 aligned in the first direction X. In this tenth structural example, the same effects as in the third structural example can be obtained.
[0060] Next, specific examples of the display element 20 based on the concepts of the third, fourth, fifth, sixth, seventh, eighth, ninth, and tenth structural examples will be described. Here, illustration of layers below the insulating layer 11 is omitted.
[0061] FIG. 16 is a cross-sectional view showing a seventh example of the display element 20. As shown in FIG. An end surface SS11 of the hole injection layer F11 is located on the lower electrode E1. An end surface SS12 of the hole transport layer F12 is located on the hole injection layer F11. The covering layer 50 covers the end surface SS1 of the lower electrode E1, the end surface SS11 of the hole injection layer F11, and the end surface SS12 of the hole transport layer F12. An end surface SS13 of the electron blocking layer F13 is located on the covering layer 50. An end surface SSEL of the light-emitting layer EL is located on the electron blocking layer F13. Although layers above the light-emitting layer EL are not shown, the layers constituting the organic layer OR are formed so that the area of the upper layer is smaller than the area of the lower layer. In other words, the layers constituting the display element 20 are formed so that the area of the upper layer is smaller.
[0062] FIG. 17 is a cross-sectional view showing an eighth example of the display element 20. As shown in FIG. 17 differs from the seventh example shown in Fig. 16 in that the covering layer 50 covers not only the end surface SS1, the end surface SS11, and the end surface SS12 but also the end surface SS13 of the electron blocking layer F13. The end surface SSEL of the light-emitting layer EL is located on the covering layer 50.
[0063] FIG. 18 is a cross-sectional view showing a ninth example of the display element 20. As shown in FIG. 18 differs from the eighth example shown in Fig. 17 in that the covering layer 50 covers not only the end surface SS1, the end surface SS11, the end surface SS12, and the end surface SS13, but also the end surface SSEL of the light-emitting layer EL. The end surface SSEL is located on the electron blocking layer F13.
[0064] FIG. 19 is a cross-sectional view showing a tenth example of the display element 20. As shown in FIG. The tenth example shown in Fig. 19 differs from the ninth example shown in Fig. 18 in that the covering layer 50 covers not only the end surface SS1, the end surface SS11, the end surface SS12, the end surface SS13, and the end surface SSEL, but also the end surface SS21 of the hole blocking layer F21. The end surface SS21 is located on the light-emitting layer EL. Note that layers above the hole blocking layer F21 are not shown in the figure.
[0065] FIG. 20 is a cross-sectional view showing an eleventh example of the display element 20. As shown in FIG. The eleventh example shown in Fig. 20 differs from the tenth example shown in Fig. 19 in that the covering layer 50 covers not only the end surface SS1, the end surface SS11, the end surface SS12, the end surface SS13, the end surface SSEL, and the end surface SS21, but also the end surface SS22 of the electron transport layer F22. The end surface SS22 is located on the hole blocking layer F21. Note that layers above the electron transport layer F22 are not shown in the figure.
[0066] FIG. 21 is a cross-sectional view showing a twelfth example of the display element 20. As shown in FIG. The twelfth example shown in Fig. 21 differs from the eleventh example shown in Fig. 20 in that the covering layer 50 covers not only the facets SS1, SS11, SS12, SS13, SSEL, SS21, and SS22, but also the facet SS23 of the electron injection layer F23. The facet SS23 is located on the electron transport layer F22. Note that layers above the electron injection layer F23 are not shown in the figure.
[0067] FIG. 22 is a cross-sectional view showing a thirteenth example of the display element 20. As shown in FIG. 22 corresponds to an example in which the electron blocking layer F13 constitutes the covering layer 50. That is, the electron blocking layer F13 covers the lower electrode E1 including the end surface SS1, the hole injection layer F11 including the end surface SS11, and the hole transport layer F12 including the end surface SS12. The light-emitting layer EL is located on the electron blocking layer F13. The electron blocking layer F13 is in contact with the insulating layer 11 on the outer side of the lower electrode E1. Note that layers above the light-emitting layer EL are not shown in the figure.
[0068] FIG. 23 is a cross-sectional view showing a fourteenth example of the display element 20. As shown in FIG. 23 corresponds to an example in which the hole blocking layer F21 constitutes the covering layer 50. That is, the hole blocking layer F21 covers the lower electrode E1 including the end surface SS1, the hole injection layer F11 including the end surface SS11, the hole transport layer F12 including the end surface SS12, the electron blocking layer F13 including the end surface SS13, and the light-emitting layer EL including the end surface SSEL. The hole blocking layer F21 is in contact with the insulating layer 11 outside the lower electrode E1. Note that layers above the hole blocking layer F21 are not shown in the figure.
[0069] FIG. 24 is a cross-sectional view showing a fifteenth example of the display element 20. As shown in FIG. The fifteenth specific example shown in FIG. 24 corresponds to an example in which the electron blocking layer F13 and the hole blocking layer F21 constitute the covering layer 50. That is, the electron blocking layer F13 covers the lower electrode E1 including the end surface SS1, the hole injection layer F11 including the end surface SS11, and the hole transport layer F12 including the end surface SS12. The light-emitting layer EL is located on the electron blocking layer F13. The hole blocking layer F21 covers the electron blocking layer F13 and the light-emitting layer EL including the end surface SSEL. The electron blocking layer F13 is in contact with the insulating layer 11 on the outer side of the lower electrode E1. The hole blocking layer F21 is in contact with the insulating layer 11 on the outer side of the electron blocking layer F13. Note that layers above the hole blocking layer F21 are not shown in the figure.
[0070] In the display element 20 described above, the position and shape of the contact hole CH1 (or the conductive material CD) for connecting the lower electrode E1 and the drive transistor 3 are not particularly limited.
[0071] FIG. 25 is a schematic plan view of the display element 20. As shown in FIG. In the example shown on the left side of the figure, the contact hole CH1 is formed in a substantially circular shape and is filled with the conductive material CD. In the example shown on the right side of the figure, the contact hole CH1 is formed in a substantially elliptical or oval shape and is filled with the conductive material CD.
[0072] The position of the contact hole CH1 may be anywhere as long as it overlaps with the lower electrode E1 in a plan view. The shape of the contact hole CH1 may be a polygon, such as a rectangle. In the example shown in FIG. 25, the ratio of the area of the contact hole CH1 to the area of the lower electrode E1 in a plan view is very small, but it may be larger, for example, 50% or more but less than 100%.
[0073] FIG. 26 is a cross-sectional view illustrating an example of a boundary surface BR between the conductive material CD and the lower electrode E1. In the example shown in FIG. 26, the boundary surface BR is located below the upper surface U11 of the insulating layer 11. In other words, the conductive material CD does not fill the contact hole CH1 up to the upper end indicated by the dotted line. The lower electrode E1 is disposed in the contact hole CH1 and is formed along the inclined surface of the insulating layer 11. Therefore, the lower electrode E1 has a concave upper surface U1. The organic layer OR is disposed on the upper surface U1. The upper electrode E2 is disposed on the organic layer OR. Such a display element 20 emits light in the direction indicated by the dotted arrow, thereby widening the viewing angle.
[0074] FIG. 27 is a cross-sectional view illustrating another example of the boundary surface BR between the conductive material CD and the lower electrode E1. In the example shown in FIG. 27, the boundary surface BR is located above the upper surface U11 of the insulating layer 11. In other words, the conductive material CD fills the contact hole CH1 beyond the upper end indicated by the dotted line. Therefore, the boundary surface BR is formed in an upwardly convex shape. The lower electrode E1 has a convex upper surface U1. The organic layer OR is disposed on the upper surface U1. The upper electrode E2 is disposed on the organic layer OR. Such a display element 20 also emits light in the direction indicated by the dotted arrow, so that the viewing angle can be widened.
[0075] FIG. 28 is a plan view showing an example of the configuration of the upper electrode E2. In the display section DA, the red subpixel SP1, the green subpixel SP2, and the blue subpixel SP3 are aligned in the first direction X. A plurality of subpixels of the same color are aligned in the second direction Y.
[0076] The multiple upper electrodes E2 are each formed in a strip shape extending in the second direction Y and are aligned at intervals in the first direction X. Each of the upper electrodes E2 is disposed in the display area DA and extends to the outside of the display area DA. One upper electrode E2 is disposed across sub-pixels of the same color aligned in the second direction Y.
[0077] The power supply lines FL are arranged outside the display area DA and overlap the upper electrodes E2 in a plan view. The upper electrodes E2 are in contact with the power supply lines FL through contact holes CH2. This allows a predetermined voltage to be applied to each of the upper electrodes E2. In other words, optimal voltages can be applied to the red subpixel SP1, green subpixel SP2, and blue subpixel SP3. In the configuration example shown in Figure 28, the upper electrode E2 is electrically connected to the power supply line FL on both sides of the display section DA, but it may also be connected to the power supply line FL on only one side.
[0078] FIG. 29 is a plan view showing another example of the configuration of the upper electrode E2. The configuration example shown in Figure 29 differs from the configuration example shown in Figure 28 in that the power supply lines FL each extend to the display section DA and the upper electrode E2 contacts the power supply lines FL at a contact hole CH21 in the display section DA. The upper electrode E2 extends outside the display area DA and is in contact with the power supply line FL through a contact hole CH22. However, when the upper electrode E2 is in contact with the power supply line FL in the display area DA, the upper electrode E2 does not have to be in contact with the power supply line FL outside the display area DA.
[0079] FIG. 30A is a plan view showing another example of the configuration of the upper electrode E2. 30A differs from the configuration example shown in Fig. 28 in that the upper electrode E2 is arranged across the subpixels SP1, SP2, and SP3 of different colors. The upper electrode E2 extends in the second direction Y, is arranged in the display area DA, and extends outside the display area DA. The power supply line FL is disposed outside the display section DA and overlaps the upper electrode E2 in a plan view. The upper electrode E2 is in contact with the power supply line FL through a plurality of contact holes CH2. This allows a predetermined voltage to be applied to the upper electrode E2. In the configuration example shown in Figure 30A, the upper electrode E2 is electrically connected to the power supply line FL on both sides of the display section DA, but it may be connected to the power supply line FL on only one side.
[0080] FIG. 30B is a plan view showing another example of the configuration of the upper electrode E2. The configuration example shown in Figure 30B differs from the configuration example shown in Figure 30A in that the power supply lines FL each extend to the display section DA and the upper electrode E2 contacts the power supply lines FL at a contact hole CH21 in the display section DA. The upper electrode E2 extends outside the display area DA and is in contact with the power supply line FL through a contact hole CH22. However, when the upper electrode E2 is in contact with the power supply line FL in the display area DA, the upper electrode E2 does not have to be in contact with the power supply line FL outside the display area DA.
[0081] FIG. 31A is a plan view showing another example of the configuration of the upper electrode E2. In the illustrated example, the area of the blue (B) subpixel SP3 is larger than the areas of the red (R) subpixel SP1 and the green (G) subpixel SP2, respectively, and the length of the subpixel SP3 along the second direction Y is longer than the subpixels SP1 and SP2. In the display section DA, the subpixels SP1 and SP3 are alternately arranged in the first direction X. The subpixels SP2 and SP3 are alternately arranged in the first direction X. The subpixels SP1 and SP2 are alternately arranged in the second direction Y. The subpixel SP3 is arranged in the second direction Y. In this subpixel layout, the upper electrode E2 is disposed across the subpixels SP1, SP2, and SP3 of different colors, similar to the configuration example shown in Fig. 30A. The upper electrode E2 also extends in the second direction Y, is disposed in the display area DA, and extends outside the display area DA. The power supply line FL is disposed outside the display section DA and overlaps the upper electrode E2 in a plan view. The upper electrode E2 is in contact with the power supply line FL through a plurality of contact holes CH2. This allows a predetermined voltage to be applied to the upper electrode E2.
[0082] FIG. 31B is a plan view showing another example of the configuration of the upper electrode E2. In the sub-pixel layout described with reference to Figure 31A, where multiple sub-pixels of the same color are lined up in the second direction Y, upper electrodes E2 formed in a strip shape are arranged, and where sub-pixels of different colors are lined up in the second direction Y, upper electrodes E2 formed in an island shape are arranged. In the illustrated example, the blue (B) subpixels SP3 are aligned in the second direction Y. The upper electrodes E2 arranged in these subpixels SP3 are formed in strip shapes extending in the second direction Y, and are in contact with the power supply line FL at a contact hole CH21 in the display area DA, and are also in contact with the power supply line FL at a contact hole CH22 outside the display area DA. However, the upper electrode E2 may be in contact with the power supply line FL at either one of the contact holes CH21 and CH22. The upper electrodes E2 disposed in the red (R) subpixel SP1 and the green (G) subpixel SP2 are formed in an island shape and are in contact with the power supply line FL through a contact hole CH21 in the display section DA.
[0083] Example FIG. 32 is a plan view showing one embodiment. The power supply line FL is disposed in the display area DA and extends to the outside of the display area DA. In the display area DA, the power supply line FL does not overlap the contact hole CH1. The lower electrode E1 of each display element 20 overlaps the contact hole CH1 and also overlaps the power supply line FL. The contact hole CH21 is formed next to the lower electrode E1 and overlaps the power supply line FL. Outside the display area DA, a contact hole CH22 is formed that overlaps the power supply line FL. In the display area DA, the upper electrode E2 overlaps the lower electrode E1 and the contact hole CH21, and outside the display area DA, it overlaps the contact hole CH22.
[0084] FIG. 33 is a cross-sectional view of the display element 20 shown in FIG. 32 taken along line AB. A plurality of insulating layers I1 to I4 are disposed between the substrate 10 and the insulating layer (first insulating layer) 11. The insulating layer I1 is disposed on the substrate 10, the insulating layer I2 is disposed on the insulating layer I1, the insulating layer I3 is disposed on the insulating layer I2, the insulating layer I4 is disposed on the insulating layer I3, and the insulating layer 11 is disposed on the insulating layer I4. The insulating layers I1 to I4 are inorganic insulating layers formed of, for example, silicon nitride, silicon oxide, or the like.
[0085] The semiconductor SC1 of the pixel switch 2 and the semiconductor SC2 of the driving transistor 3 are made of, for example, polycrystalline silicon and are located between the insulating layer I1 and the insulating layer I2. The drain electrode DE of the driving transistor 3 is located between the insulating layer I4 and the insulating layer 11 and is in contact with the semiconductor SC2. The conductive material CD is in contact with the drain electrode DE through a contact hole (first contact hole) CH1 formed in the insulating layer 11.
[0086] The power supply line FL is disposed on the insulating layer 11. The insulating layer (second insulating layer) 12 is disposed on the insulating layer 11 and has a contact hole (second contact hole) CH21 that penetrates to the power supply line FL.
[0087] The lower electrode E1 is disposed on the insulating layer 12 and is in contact with the conductive material CD through the contact hole CH1. The organic layer OR is laminated on the lower electrode E1. The covering layer 50 covers an end surface SS1 of the lower electrode E1 and an end surface SS2 of the organic layer OR. The covering layer 50 is in contact with the insulating layer 12 on the outside of the lower electrode E1.
[0088] The upper electrode E2 covers the organic layer OR and the covering layer 50. The upper electrode E2 is in contact with the power supply line FL at a contact hole CH21 outside the display element 20.
[0089] According to this embodiment, as described above, the area contributing to display can be expanded, and undesired current leakage and the like at the periphery of the organic layer OR can be suppressed, thereby suppressing performance degradation of the display element 20. In addition, the power supply line FL arranged in the display area DA can apply a desired voltage to the upper electrode E2 of each display element 20. In other words, a uniform voltage can be applied across the entire display area DA.
[0090] All display devices that can be implemented by a person skilled in the art by appropriately modifying the design based on the display devices described above as embodiments of the present invention also fall within the scope of the present invention as long as they include the gist of the present invention.
[0091] Within the scope of the concept of the present invention, a person skilled in the art may conceive of various modifications, and these modifications are also understood to fall within the scope of the present invention. For example, even if a person skilled in the art appropriately adds or deletes components or modifies the design of the above-described embodiment, or adds or omits steps or modifies conditions, these modifications are also included within the scope of the present invention as long as they maintain the gist of the present invention.
[0092] Furthermore, with regard to other effects brought about by the aspects described in the above embodiments, those that are clear from the description in this specification or that can be appropriately thought of by a person skilled in the art are naturally understood to be brought about by the present invention. [Explanation of symbols]
[0093] DSP...display device 3...driving transistor (switching element) 10...substrate 11...insulating layer (first insulating layer) CH1...contact hole (first contact hole) 12...insulating layer (second insulating layer) CH21...contact hole (second contact hole) CD…Conducting material FL…Power line 20...Display element E1...Lower electrode E2...Upper electrode OR...Organic layer F11: Hole injection layer F12: Hole transport layer F13: Electron blocking layer F21: Hole blocking layer F22: Electron transport layer F23: Electron injection layer 30...Sealing layer 40...Light extraction layer 50…Covering layer
Claims
1. A substrate; a switching element disposed above the substrate; a first insulating layer disposed above the substrate and having a first contact hole penetrating to the switching element; a conductive material filled in the first contact hole; a lower electrode disposed above the first insulating layer and in contact with the conductive material; an organic layer stacked on the lower electrode, the organic layer including a hole injection layer on the lower electrode, a hole transport layer on the hole injection layer, an electron blocking layer on the hole transport layer, and a light-emitting layer on the electron blocking layer; an upper electrode laminated on the organic layer; Equipped with a first end surface of the lower electrode is located on the first insulating layer; a second end surface of the hole injection layer is located on the lower electrode; a third end surface of the hole transport layer is located on the hole injection layer; the electron blocking layer directly covers the first end surface, the second end surface, and the third end surface, and is in contact with the first insulating layer outside the lower electrode.
2. the organic layer further comprises a hole-blocking layer over the light-emitting layer; an end face of the light-emitting layer is located on the electron blocking layer; The display device according to claim 1 , wherein the hole blocking layer covers an end face of the light emitting layer, covers a portion of the electron blocking layer outside the light emitting layer, and is in contact with the first insulating layer.
3. A substrate, a switching element disposed above the substrate; a first insulating layer disposed above the substrate and having a first contact hole penetrating to the switching element; a conductive material filled in the first contact hole; a lower electrode disposed above the first insulating layer and in contact with the conductive material; an organic layer stacked on the lower electrode, the organic layer including a hole injection layer on the lower electrode, a hole transport layer on the hole injection layer, an electron blocking layer on the hole transport layer, an emissive layer on the electron blocking layer, and a hole blocking layer on the emissive layer; an upper electrode laminated on the organic layer; Equipped with a first end surface of the lower electrode is located on the first insulating layer; a second end surface of the hole injection layer is located on the lower electrode; a third end surface of the hole transport layer is located on the hole injection layer; a fourth end surface of the electron blocking layer is located on the hole transport layer; a fifth end surface of the light-emitting layer is located on the electron blocking layer; the hole blocking layer directly covers the first end surface, the second end surface, the third end surface, the fourth end surface, and the fifth end surface, and is in contact with the first insulating layer outside the lower electrode.
4. the interface between the conductive material and the lower electrode is located below the upper surface of the first insulating layer; the lower electrode has a concave upper surface directly above the first contact hole, The display device according to claim 1 , wherein the organic layer overlaps the concave upper surface.
5. the interface between the conductive material and the lower electrode is located above the upper surface of the first insulating layer; the lower electrode has a convex upper surface directly above the first contact hole, The display device according to claim 1 , wherein the organic layer overlaps the convex upper surface.
6. a power supply line disposed on the first insulating layer; a second insulating layer having a second contact hole penetrating to the power supply line; 4. The display device according to claim 1, wherein the upper electrode is in contact with the power supply line through the second contact hole.
7. Further, a sealing layer is provided, The display device according to claim 1 , wherein the sealing layer covers the upper electrode and is in contact with the first insulating layer.
8. Further, a sealing layer is provided, the upper electrode is in contact with the first insulating layer; The display device according to claim 1 , wherein the sealing layer is laminated on the upper electrode.
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